This fixes current build failure.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
mvblm7.c: fix warning: implicit declaration of function
'mv_reset_environment'
Signed-off-by: Wolfgang Denk <wd@denx.de>
The "console: unify printing current devices" patch goofed:
CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot
time noise, not add it. Said patch changed the #ifndefs
to #ifdef; this one restores them to the proper sense.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
apparently the ITX was missed last round.
Also make bootdelay consistent with other boards, so as to give on the
opportunity to fix mistakenly set bootcmd without having checked for an
bootdelay zero setting first.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Fix ECC Correction bug where the byte offset location were double
flipped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
/* The NDFC uses Smart Media (SMC) bytes order */
ecc_code[0] = p[2];
ecc_code[1] = p[1];
ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the s1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
byteoffs = (s1 << 0) & 0x80;
.
.
byteoffs |= (s0 >> 4) & 0x08;
The order is change to read it in straight and let the correction
function to revert it to SMC order.
Signed-off-by: Feng Kan <fkan@amcc.com>
Acked-by: Victor Gallardo <vgallardo@amcc.com>
Acked-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Newer revisions of these boards have slightly larger flashes, so increase
the configured number of sectors so that U-Boot works on all revisions.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start a common header file for common linker script code (such as
workarounds for older linkers) rather than doing this in the build system.
As fallout, we no longer execute the linker every time config.mk is
included by a build file (which can easily be 70+ times), but rather only
execute it once.
This also fixes a bug in the major version checking by creating a macro to
easily compare versions and keep people from making the same common
mistake (forgetting to check major and minor together).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot
at either:
NET: Registered protocol family 16
or the
io scheduler cfq registered
message. Fixing up these DDR settings appears to fix the problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 9993e196da "mpc83xx: convert all
remaining boards over to 83XX_GENERIC_PCI" remapped pci windows on
tqm834x to make it more consistent with the other 83xx boards. During
that time however, the author failed to realize that FLASH_BASE was
occupying the same range as what PCI1_MEM_BASE was being assigned.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Wolfgang Denk <wd@denx.de>
This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.
u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
u-boot$
It currently isn't used, so delete it before it spreads further.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes some issues with JFFS2 summary support in U-Boot.
1/ Summary support made compilation configurable (as summary support
considered expiremental even in Linux).
2/ Summary code can do unaligned 16-bit and 32-bit memory accesses.
We need to get data byte by byte to exclude data aborts.
3/ Make summary scan in two passes so we can safely fall back to full
scan if we found unsupported entry in the summary.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
The TRAB board references local libgcc helper routines
(lib_arm/div0.o and lib_arm/_umodsi3.o) which cause build problems
when we try to use the normal, compiler provided libgcc instead.
Removing these references allows to build both with and without the
local libgcc helper routines.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit f62fb99941 fixed handling of all rodata sections by using a
wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT()
and SORT_BY_NAME(). Unfortunately these functions were only
introduced with biunutils version 2.16, so the modification broke
building with all tool chains using older binutils.
This patch makes it work again. This is done by omitting the use of
these functions for such old tool chains. This will result in
slightly larger target binaries, as the rodata sections are no longer
in optimal order alignment-wise which reauls in unused gaps, but the
effect was found to be insignificant - especially compared to the fact
that you cannot build U-Boot at all in the current state.
As ld seems to have no support for conditionals we run the linker
script through the C preprocessor which can be easily used to remove
the unwanted function calls.
Note that the C preprocessor must be run with the "-ansi" (or a
"-std=") option to make sure all the system-specific predefined
macros outside the reserved namespace are suppressed. Otherise, cpp
might for example substitute "powerpc" to "1", thus corrupting for
example "OUTPUT_ARCH(powerpc)" etc.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
For some time there have been repeated reports about build problems
with some ARM (cross) tool chains. Especially issues about
(in)compatibility with the tool chain provided runtime support
library libgcc.a caused to add and support a private implementation
of such runtime support code in U-Boot. A closer look at the code
indicated that some of these issues are actually home-made. This
patch attempts to clean up some of the most obvious problems and make
building of U-Boot with different tool chains easier:
- Even though all ARM systems basicy used the same compiler options
to select a specific ABI from the tool chain, the code for this was
distributed over all cpu/*/config.mk files. We move this one level
up into lib_arm/config.mk instead.
- So far, we only checked if "-mapcs-32" was supported by the tool
chain; if yes, this was used, if not, "-mabi=apcs-gnu" was
selected, no matter if the tool chain actually understood this
option. There was no support for EABI conformant tool chains.
This patch implements the following logic:
1) If the tool chain supports
"-mabi=aapcs-linux -mno-thumb-interwork"
we use these options (EABI conformant tool chain).
2) Otherwise, we check first if
"-mapcs-32"
is supported, and then check for
"-mabi=apcs-gnu"
If one test succeeds, we use the first found option.
3) In case 2), we also test if "-mno-thumb-interwork", and use
this if the test succeeds. [For "-mabi=aapcs-linux" we set
"-mno-thumb-interwork" mandatorily.]
This way we use a similar logic for the compile options as the
Linux kernel does.
- Some EABI conformant tool chains cause external references to
utility functions like raise(); such functions are provided in the
new file lib_arm/eabi_compat.c
Note that lib_arm/config.mk gets parsed several times, so we must
make sure to add eabi_compat.o only once to the linker list.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Dirk Behme <dirk.behme@googlemail.com>
Cc: Magnus Lilja <lilja.magnus@gmail.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
Tested-by: Andrzej Wolski <awolski@poczta.fm>
Tested-by: Gaye Abdoulaye Walsimou <walsimou@walsimou.com>
Tested-by: Tom Rix <Tom.Rix@windriver.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The code copy data from NAND flash block by block, so when
the data length isn't a whole-number multiple of the block
size, it will overlap the rest space.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Previously, waiting for auto-negotiation would only occur if a valid
link had been detected. Problems arose when attempting to use a
tsec immediately after bootup but before link was achieved, eg:
=> dhcp
Auto-neg error, defaulting to 10BT/HD
eTSEC1: No link.
Auto-neg error, defaulting to 10BT/HD
eTSEC2: No link.
=>
With this patch applied the same operation as above resulted in:
=> dhcp
Waiting for PHY auto negotiation to complete. done
Enet starting in 1000BT/FD
Speed: 1000, full duplex
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
U-boot might use non-8-byte-aligned addresses for sending data, which
the kwgbe_send doesn't accept (bootp does this for me). This patch
copies the data to be sent to a malloced temporary buffer if it is
non-aligned.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch makes the device wait for up to 5 seconds for the link to
come up, similar to what many of the other network drivers do. This
avoids confusing situations where, e.g., a tftp fails when initiated
early after U-boot has started (before the link has come up).
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The Intel E1000 driver was making assumptions about the relationship between
some virtual, physical, and PCI addresses.
Also fix some bad usage of the DEBUGOUT macro
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
We should call jffs2_clean_cache() if we return from jffs2_build_lists()
with an error to prevent usage of incomplete lists. Also we should
free() a local buffer to prevent memory leaks.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
The name of the atmel nand driver in the kernel changed from at91_nand
to atmel_nand back in June 2008, but the at91-based boards config files
still refer to at91_nand. This patch updates them with the new name
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
This patch fixes the "chip_config" command for I2C bootstrap EEPROM
configuration. First it changes the I2C bootstrap EEPROM address to
0x54 as this is used on Arches (instead of 0x52 on Canyonlands/
Glacier). Additionally, the NAND bootstrap settings are removed
for Arches since Arches doesn't support NAND-booting.
Signed-off-by: Stefan Roese <sr@denx.de>
Current code for the Monahans CPU defined OSCR_CLK_FREQ as 3.250 (MHz)
which caused floating point operations to be used. This resulted in
unresolved references to some FP related libgcc functions when using
U-Boot's private libgcc functions.
Change the code to use fixed point math only.
Signed-off-by: Wolfgang Denk <wd@denx.de>
When we init the addrmap based on the TLB we will not end up getting
the TLB that covers memory if we are using SPD. The reason is we
haven't relocated at the point that we setup the memory TLB and thus it
will not get setup in the addrmap.
Instead we can just walk over the TLB array after we've relocated and
see all the TLBs that have been set and use that information to populate
the initial addrmap. By doing this we insure that we get the TLB
entries that cover memory.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix bug introduced by 9c048b5234.
The cfi_flash.c driver cast the flash buffer size to a uchar in
flash_write_cfibuffer(). On some flash parts, (tested on Numonyx
part PC32F512M29EWH), the buffer size is 1KB. Remove the cast to
uchar to enable buffer sizes to be larger.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The local board-specific spi_init() function conflicts with the common SPI
layer, so rename it to something board-specific.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds watchdog reset call to allow its invokation during decompression
phase. This control was present on old zlib version and here it is
backported for those relevant routines. This patch is sent as a zlib separate
one beacuse it was not tested due to specific board lack.
zlib patches will be unified just in one when this will be validated through
tests.
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
This patch updates zlib to the latest stable version.
Only relevant zlib parts were ported to u-boot tree, as already did for the
current zlib (0.95). New zlib guarantees a faster inflate performances
other then others improvements as explained at www.zlib.net.
It also includes Alessandro Rubini's patches to allow 0 as destination pointer
and to call watchdog reset if required by architecture.
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Reviewed-by: Angelo Castello <angelo.castello@st.com>
Reviewed-by: Alessandro Rubini <rubini-list@gnudd.com>
The initial pixclock for the MIMC200 board is wrong (and causes
screen corruption due to DMA underruns).
This patch simply reduces the pixel clock to fix the problem.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Fixed a misunderstanding in the original implementation, 'devnum' that
was used in the cpu/ppc4xx/4xx_enet.c implementation was NOT the
PHY's SMI address, rather it was the number of the MAC interface on
the CPU. The equivalent of this for uec_phy will be the UEC number
stored in mii_info->dev->name. Usage example is updated for uec.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
It is set to 0x1F by default and can be overwritten on the board
header file by defining CONFIG_UTBIPAR_INIT_TBIPA. This allows
the CPU to simply "reserve" one SMI address instead of using
a different one for each UEC.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
eth_setenv_enetaddr is avaible by upper layer
using this saves 204 bytes on total image size
used Local OUI instead of Marvell OUI for
random MAC address generation logic
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Fix E1000 build warning on AP1000 board
Fix the build warning on AP1000 board:
e1000.c:131: warning: 'e1000_read_eeprom' used but never defined
e1000.c:2012: warning: 'e1000_set_phy_mode' defined but not used
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Due to recent changes to the NET support on U-boot, DM9000
is no longer detected on the DM355 EVM.
This minor update enables DM9000 on the DM355 EVM.
Tested on the DM355 EVM
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
1. mv88E61xx driver compiler warnings fixed
2. idstr if-else statements changed to switch() construct
and added default case too.
This fixed idstr may be uninitialized warning
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that
got copied int the MPC8536, MPC8572 and P2020 DS boards. The BEDBUG
support has never been made to work completely on e500/85xx so we
just disable it to save space and match the other FSL 85xx boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
tftp.c:294: warning: pointer targets in passing argument 1 of 'strlen'
differ in signedness
This was only visible for the utx8245 board which seems to have DEBUG
enabled.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is a port of Linux driver for SDHC host controller hardware
found on Freescale's MX2 and MX3 processors. Uses new generic MMC
framework (CONFIG_GENERIC_MMC) and it looks like there are some
problems with a framework (at least on LE cpus). Some of these
problems are addressed in the following patches.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This chip is used in a number of boards manufactured by Calao-Systems
which should be supported soon. This driver provides the necessary
spi_read and spi_write functions necessary to communicate with the chip.
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards. As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot project.
IBM is dual-licensing the IBM code contributions already present in U-Boot
under either the terms of the GNU General Public License version 2, or the
original code license already present.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
If the size of a region equal to 4G it can't be represnted in a 32-bit
BAR so we should have marked that case as MEM64.
Additionally bump the number of inbound windows up to 4 to handle the
fact that Freescale PPCs that have an implicit window for CCSRBAR.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ARM EABI defines new names for GCC helper functions,
and GCC seems to need some new functions as well.
This patch is a minimal-invasive approach to fix problems with EABI
conformant tool chains (to be used with "USE_PRIVATE_LIBGCC=yes").
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Dirk Behme <dirk.behme@googlemail.com>
An off-by-one error in hush.c resulted in an unintentional free() call
every time a command was executed
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Add mtc state subcommand description to the
help of mtc command.
Remove some newlines in description of commands
for proper help formating.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The only environment type that uses this variable is spi flash, and that is
only because it is reimplementing the common set_default_env() function.
So fix the spi flash code and kill off the default_environment_size in the
process.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The attached patch corrects an error in the examples/Makefile which
causes the applications in the examples directory to hang on OMAP3
based boards. The current Makefile sets -Ttext during linking to
0x0c100000 which is outside of addressable SDRAM memory. The script
corrects the existing ifeq...else...endif logic to look at the VENDOR
tag rather than the CPU tag.
The patch affects the following configs: omap3_beagle_config,
omap3_overo_config, omap3_evm_config, omap3_pandora_config,
omap3_zoom1_config and omap3_zoom2_config.
Signed-off-by: Michael Evans <horse_dung@hotmail.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
replace variable types in ctrl_structs for omap3 by those with
fixed size (u8, u16, u32).
Additional ifndef-protection is needed by examples which do not
compile when including asm/types.h
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Based on Intel PRO/1000 Network Driver 7.3.20-k2
Add Intel E1000 PCIE card support. The following cards are added:
INTEL_82571EB_COPPER
INTEL_82571EB_FIBER,
INTEL_82571EB_SERDES
INTEL_82571EB_QUAD_COPPER
INTEL_82571PT_QUAD_COPPER
INTEL_82571EB_QUAD_FIBER
INTEL_82571EB_QUAD_COPPER_LOWPROFILE
INTEL_82571EB_SERDES_DUAL
INTEL_82571EB_SERDES_QUAD
INTEL_82572EI_COPPER
INTEL_82572EI_FIBER
INTEL_82572EI_SERDES
INTEL_82572EI
INTEL_82573E
INTEL_82573E_IAMT
INTEL_82573L
INTEL_82546GB_QUAD_COPPER_KSP3
INTEL_80003ES2LAN_COPPER_DPT
INTEL_80003ES2LAN_SERDES_DPT
INTEL_80003ES2LAN_COPPER_SPT
INTEL_80003ES2LAN_SERDES_SPT
82571EB_COPPER dual ports,
82572EI single port,
82572EI_COPPER single port PCIE cards
and
82545EM_COPPER,
82541GI_LF
pci cards are tested on both P2020 board
and MPC8544DS board.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
In the previous enetaddr refactoring, the assumption with commit 56b555a644
was that the eth layer would handle the env -> device enetaddr syncing.
This was not the case as eth_initialize() is called only once and the sync
occurs there. So make sure the eth_init() function does the env -> device
sync with every network init.
Reported-by: Andrzej Wolski <awolski@poczta.fm>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Minor ./net cleanups - no functional changes
- change #ifdef DEBUG printf(); #endif to just debug()
- changed __FUNCTION__ to __func__
- got rid of extra whitespace between function and opening brace
- removed unnecessary braces on if statements
gcc dead code elimination should make this functionally/size equivalent
when DEBUG is not defined. (confirmed on Blackfin, with gcc 4.3.3).
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses. All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.
No documented erratum justifies these accesses. It looks like maybe
some pre-release BDI-2000 setup code has been carried along by cargo
cult programming since at least late 2004 (per GIT history).
Here's a patch disabling what seems to be bogosity. Tested on a
csb337; there were no behavioral changes.
Signed-off-by: David Brownell <david-b@pacbell.net>
on RM9200ek
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Some Canyonlands boards are equipped with different SODIMM's. This is no
problem with the "normal" NOR booting Canyonlands U-Boot, since it
automatically detects the SODIMM's via SPD data and correctly configures
them. But the NAND booting version is different. Here we only have 4k
of image size to completely setup the hardware, including DDR2 setup.
So we need to use a fixed DDR2 setup here. This doesn't work for different
SODIMM's right now.
Currently only this Crucial SODIMM is support:
CT6464AC667.8FB (dual ranked)
Now some boards are shipped with this SODIMM:
CT6464AC667.4FE (single ranked)
This patch now supports both SODIMM's by configuring first for the dual
ranked DIMM. A quick shows, if this module is really installed. If this test
fails, the DDR2 controller is re-configured for the single
ranked SODIMM.
Tested with those SODIMM's:
CT6464AC667.8FB (dual ranked)
CT6464AC667.4FE (single ranked)
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves the load addresses for kernel, fdt and ramdisk to higher
addresses (>= 16MB). This enables booting of bigger kernel images (e.g.
lockdep enabled).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes CONFIG_SYS_BOOTMAPSZ from 8MB to 16MB which is the
initial TLB on 40x PPC's in the Linux kernel. With this change even bigger
Linux kernels (> 8MB) can be booted.
This patch also sets CONFIG_SYS_BOOTM_LEN to 16MB (default 8MB) to enable
decompression of bigger images.
Signed-off-by: Stefan Roese <sr@denx.de>
When updating the "reg" in the "/localbus/flash@f0000000,0" node
size was wrong updated for the first flash, because the total
size was filled in, instead of the right size for it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
These defines have been subplanted by the equivelent defines in
include/twl4030.h
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
Because twl4030 now has its own device files, move and rename
twl4030_mmc_config.
twl4030_mmc_config initializes the twl4030 power setting to
the mmc device. Because it is in the twl4030 power domain, move
it out of drivers/mmc/omap3_mmc.c and into drivers/power/twl4030.c.
The function was renamed to twl4030_power_mmc_init because all
the functions in this file are to have the format
twl4030_power_<device>_<action>
In this case the suffix is mmc_init so
device : mmc
action : init
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
Because twl4030 now has its own device files, move exiting
omap3 power_init_r to a new location.
power_init_r is the only function in board/omap3/common.
It initializes the twl4030 power for the board and enables
the led.
The power part of the the function is moved to twl4030_power_init in
drivers/power/twl4030.c The power compilation is conditional on the
existing config variable CONFIG_TWL4030_POWER.
The led part is moved to twl4030_led_init in the new file
drivers/misc/twl4030_led.c The led compilation is conditional on
the new config variable CONFIG_TWL4030_LED
The directory board/omap3/common was removed because power_init_r
was the only function in it.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
Commit 2b3f12c2 added support for configurable SMC Rx buffer length on
8xx systems. Enable this feature on TQM8xx* based boards.
This fixes the problem that pasting text in the middle of a line
(i. e. inserting in edit mode) did not work - only the first two
characters got inserted, the rest was lost.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Make the ext2load command return 0 on success (instead of the file
length).
Also fix output format (get rid of random newlines) and some coding
style issues (long lines etc.).
Signed-off-by: Wolfgang Denk <wd@denx.de>
The Zoom2 power reset button is on the top right side of the
main board. Press and hold for about to 8 seconds to completely
reset the board.
Some of the beta boards have a hardware problem that prevents
using this feature. If is difficult to further characterize the
boards that fail. So disable resetting for all beta boards.
The Zoom1 reset button is the red circle on the top right,
front of the board. Press and hold the button for 8 seconds to
completely reset the board.
After analyzing beagle, it was determined that other boards
that use the twl4030 for power managment can also make use
this function.
The resetting is done by the power management part of the twl4030.
Since there is no existing drivers/power, add one.
The compilation of power/twl4030.h is controlled by the config
variable CONFIG_TWL4030_POWER
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
This problem is seen on Zoom1 and Zoom2 in the startup and
when i2c probe is used
Before :
In: serial
Out: serial
Err: serial
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_pin: I2C_STAT=1000
I2C read: I/O error
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot: 0
OMAP3 Zoom1# i2c probe
Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000
02 03 04 05 06 07 08 09 0A 0B 0C 0D <snip>
After :
In: serial
Out: serial
Err: serial
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot: 0
OMAP3 Zoom1# i2c probe
Valid chip addresses: 48 49 4A 4B
The addresses are for the twl4030.
The prescalar that converts the function clock to the sampling
clock is hardcoded to 0. The reference manual recommends 7
if the function clock is 96MHz.
Instead of just changing the hardcoded values, the prescalar
is calculated from the value I2C_IP_CLK.
The i2c #defines are in kHz. The speed passed into the
i2c init routine is in Hz. To be consistent, change the
defines to be in Hz.
The timing calculations are based on what is done in the
linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as
apposed to what is done in TRM.
The major variables in the timing caculations are
specified as #defines that can be overriden as required.
The variables and their defaults are
I2C_IP_CLK SYSTEM_CLOCK_96
I2C_INTERNAL_SAMPLING_CLK 19200000
I2C_FASTSPEED_SCLL_TRIM 6
I2C_FASTSPEED_SCLH_TRIM 6
I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLH I2C_FASTSPEED_SCLH_TRIM
This was runtime verified on Zoom1, Zoom2, Beagle and Overo.
The 400kHz and 3.4M cases were verifed on test Zoom1,
Zoom2, Beagle and Overo configurations.
Testing for omap2 will be done in a second step as Nishanth
and Jean-Christophe commented.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
This patch fixes the problem, that the current fdt board fixup code only
set's one range, the one for NOR. By this it's overwriting the already
correctly configured values done in __ft_board_setup(). Just remove this
now unneeded NOR fixup and all the ranges are correctly defined.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Felix Radensky <felix@embedded-sol.com>
This patch adds some I2C bootstrap setting for NAND booting to the Kilauea
chip_config command ("533-nand" and "600-nand").
Additionally some incorrectly indented lines are fixed.
Signed-off-by: Stefan Roese <sr@denx.de>
DDR2 Auto-calibration needs to be disabled on the NAND booting PPC4xx
targets. Otherwise the configured fixed init values for some DDR2
controller registers (e.g. RQDC) are not initialized at all resulting
in a non working SDRAM.
Signed-off-by: Stefan Roese <sr@denx.de>
Testing on AMCC Arches with the latest U-Boot version yielded that DDR2
initialization is currently broken. U-Boot hangs upon relocation to SDRAM
or crashes with random traps. This patch fixes this problem. Arches now
uses a different WRDTR and CLKTR default setting than Canyonlands/Glacier.
Signed-off-by: Stefan Roese <sr@denx.de>
Board support for the Guntermann & Drunck CompactCenter and
DevCon-Center.
Based on the AMCC Canyonlands board support by Stefan Roese.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the esd VME8349 board equipped with the
MPC8349. It's a VME PMC carrier board equipped with the Tundra
TSI148 VME-bridge.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Up to this point in time, the sbc8349 board was storing the u-boot
image in flash 2x. One for the HRCW value at the beginning of
flash (0xff80_0000), and once close to the end of flash (0xfff8_0000)
for the actual image that got executed.
This moves the TEXT_BASE to be the beginning of flash, which makes
the second copy of the image redundant, and frees up the flash
from the end of the environment storage to the end of the flash
device itself.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Commit 7024aa14 was supposed to fix the #ifdef/#endif pairing in
include/configs/at91cap9adk.h, but did not cate all problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The reordering of include/common.h by commit fcd3c87e49 broke
boards with status LED support, resulting in
error: #error Status LED configuration missing
errors. Undo this reordering to avoid this issue.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Loading vxWorks 5.x images resulted just into 3 or 4 lines of output.
With vxWorks 6.x and the new GCC it emits about 30 lines, which is
far too noisy in my opinion.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Commit 70ebf316 factored out the ROUND() macro into include/common.h,
not realizing that the primary use of this macro on AT91 systems was
in start.S where common.h was not included, and could not be included
because it contains a lot of C code which the assembler doesn't
understand.
This patch wraps such code in common.h in a "#ifndef __ASSEMBLY__"
construct, and then adds an include to cpu/arm926ejs/start.S thus
solving the problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Many (especially ARM) tool chains seem to come with broken or
otherwise unusable (for the purposes of builing U-Boot) run-time
support libraries `libgcc.a'. By using the "USE_PRIVATE_LIBGCC"
setting we allow to use alternative libraries instead.
"USE_PRIVATE_LIBGCC" can either be set as an environment variable in
the shell, or as a command line argument when running "make", i. e.
$ make USE_PRIVATE_LIBGCC=yes
or
$ USE_PRIVATE_LIBGCC=yes
$ export USE_PRIVATE_LIBGCC
$ make
The value of "USE_PRIVATE_LIBGCC" is the name of the directory which
contains the alternative run-time support library `libgcc.a'. The
special value "yes" selects the directory $(OBJTREE)/lib_$(ARCH) .
Note that not all architectures provide an alternative `libgcc.a' in
their lib_$(ARCH) directories - so far, only ARM does.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Stefan Roese <sr@denx.de>
Use do_div from div64.h for vsprintf in case of 64bit division.
For 32bit division, do_div from div64.h can't be used as it
needs a 64bit parameter.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Stefan Roese <sr@denx.de>
CC: Simon Kagstrom <simon.kagstrom@netinsight.net>
This reverts commit 982adfc610.
This patch causes problems on MPC83xx boards - flash recognition stops
working.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch updates the support for EB+MCF-EV123 board and needs
the [PATCH 1/2 V3] new video driver for bus vcxk framebuffers
* remove the board framebuffer driver
* use the common bus_vcxk framebuffer driver
* adds bmp support
* adds splashimage support
* fix serveral cosmetical errors
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
[agust@denx.de: fixed some style issues before applying]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch adds a new video driver
* adds common bus_vcxk framebuffer driver
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
[agust@denx.de: fixed lots of style issues before applying]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
include/lcd.h has different vidinfo for different platforms,
and several extern declaration, but one for the default case was
missing. This makes them a single extern declaration for everyone.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
This patch adds support for the AVR32 LCD controller. This patch is
based off the latest u-boot-video.
A quick summary of what's going on:-
Enable LCDC pixel clock
Enable LCDC port pins
Add framebuffer pointer to global_data struct
Allocate framebuffer
To use the new code, update your board config to include something like
this:-
#define CONFIG_LCD 1
#if defined(CONFIG_LCD)
#define CONFIG_CMD_BMP
#define CONFIG_ATMEL_LCD 1
#define LCD_BPP LCD_COLOR16
#define CONFIG_BMP_16BPP 1
#define CONFIG_FB_ADDR 0x10600000
#define CONFIG_WHITE_ON_BLACK 1
#define CONFIG_VIDEO_BMP_GZIP 1
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144
#define CONFIG_ATMEL_LCD_BGR555 1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
#define CONFIG_SPLASH_SCREEN 1
#endif
The standard U-Boot BMP and Splash-screen features should just work.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
[agust@denx.de: fixed some style issues]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This moves some extern declaration from lcd.c to lcd.h, removing
unneeded ifdef around a pair of them. Additionally, since
gunzip_bmp() was declared static in cmd_bmp.c but extern in lcd.c, I
removed the static. The extra "#include <lcd.h>" in cmd_bmp.c is
added to ensure the header is consistent with the source.
This has been compile-tested on both ARM (at91 boards) and PowerPC
(HH405_config, TQM823L_LCD_config, mcc200_config), to test all use
combinations.
Signed-off-by: Alessandro Rubini <rubini@gnudd.it>
[agust@denx.de: removed gunzip_bmp() fixes as commit c01171ea did it]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Sadly, the Blackfin linker script unification lost a small #ifdef logic
needed on older parts. Restore that CONFIG_BFIN_BOOTROM_USES_EVT1 logic.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This reverts commit b201171f2b.
The commit caused problems for example when unpacking kernel images:
Uncompressing Kernel Image ... Error: inflate() returned -2
GUNZIP: uncompress, out-of-mem or overwrite error - must
RESET board to recover
Conflicts:
include/u-boot/zlib.h
lib_generic/zlib.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch removes the "alterpll" command and replaces it with the now
ppc4xx standard "chip_config" command to configure the I2C bootstrap
EEPROM.
Signed-off-by: Stefan Roese <sr@denx.de>
Kilauea has an AT24C02 EEPROM which has an 8 byte page. Without defining
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS to 3 the "eeprom" command doesn't
work correctly.
Additionally the page write delay (CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
is set to a more defensive value of 10ms.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a generic command for programming I2C bootstrap
eeproms on PPC4xx. An implementation for Canyonlands board is
included.
The command name is intentionally chosen not to be PPC4xx specific.
This way other CPU's/SoC's can implement a similar command under
the same name, perhaps with a different syntax.
Usage on Canyonlands:
=> chip_config
Available configurations (I2C address 0x52):
600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100
600-nand - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100
800-nor - NOR CPU: 800 PLB: 200 OPB: 100 EBC: 100
800-nand - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100
1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100
1000-nand - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100
1066-nor - NOR CPU:1066 PLB: 266 OPB: 88 EBC: 88 ***
1066-nand - NAND CPU:1066 PLB: 266 OPB: 88 EBC: 88
=> chip_config 600-nor
Using configuration:
600-nor - NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100
done (dump via 'i2c md 52 0.1 10')
Reset the board for the changes to take effect
Other 4xx boards will be migrated to use this command soon
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
The XPedite1000 is an X-ES product thus it can be put in board/xes along
with other X-ES boards. Along with the move, the board was renamed to
XPedite1000 from XPedite1K to fit X-ES's standard naming convention.
Maintainership was also transfered to Peter Tyser.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The XPedite1000 only has 2 available ethernet ports:
ppc_4xx_eth2 (EMAC2) and ppc_4xx_eth3 (EMAC3)
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Previously an I2C EEPROM was used. The EEPROM had size, reliability,
and access issues which are resolved by storing the environment in
flash.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Enable GPIO pins for an I2C EEPROM write protect, a system reset pin,
and a PMC #MONARCH pin. These pins are not currently used in U-Boot,
but are used in OSes and may be used in U-Boot in the future.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The XPedite1000 can be built with 4 total flashes:
- 512KB AMD socketed
- 16MB Intel soldered
- 2 x 32MB AMD MirrorBit flashes
Add support for the optional 2 32MB CFI-compliant AMD flashes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
By default, the XPedite1000 comes installed with xMon, a proprietary
bootloader. xMon stores its MAC address in an onboard EEPROM. Rather
than requiring a non-standard location in the EEPROM to be reserved for
MAC addresses, store the MAC addresses in U-Boot's standard environment.
A U-Boot application or OS application can be used to migrate xMon MAC
addresses to U-Boot's environment if necessary.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
All XPedite1000's have SPD EEPROMs present and no fixed configuration
parameters are currently defined or used
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Using the CFI flash driver will allow write access to the 16MB Intel
StrataFlash present on the XPedite1000. The 512KB socketed (non
CFI-compliant flash) will no longer be writable.
The mapping of the 16MB Strata flash was moved to 0xff000000 and the
512KB AMD socketed flash was moved to 0xfe000000.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
In cpu/ppc4xx/speed.c initialization of sysInfo->freqOPB for 405EP was
left out for no obvious reason.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal"
booting on some 44x platforms. This breakage is only noticed in some
cases while powercycling. As it seems, the code in question in start.S
didn't invalidate TLB #0. This makes sense since this TLB is used for
the bootrom mapping. With the patch mentioned above even TLB #0 got
invalidated resulting in an error later on.
This patch now fixes this issue by only invalidating TLB #0 in the RAM-
booting case.
Tested succesfully on Sequoia and Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <Eibach@gdsys.de>
This change is cheked in Linux source and fix found to be in sync.
This patch is tested for USB host interface on Kirkwood based
Sheevaplug platform (ARM little endian board)
Risk: the impact of this patch is not validated on big endian board.
This need to be checked...
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
By including autoconf.mk before config.mk, all top level files can use any
config options it sets up (like <arch>_config.mk) or the Makefile itself
without being forced to use lazy evaluation.
This patch removes the static declaration from gunzip_bmp()
Without it, the gunzip_bmp() function is not visible to
common/lcd.c and fails to compile with an error.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
The top build system sets up HOSTCFLAGS a bit and exports it, but other
places use HOST_CFLAGS instead. Unify the two as HOSTCFLAGS so that the
values stay in sync.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds I2C support for mvBC-P and defines flash layout
matching the shipped product.
Signed-off-by: Andr Schwarz <andre.schwarz@matrix-vision.de>
ahci.c: In function 'ata_scsiop_read_capacity10':
ahci.c:616: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
biosemu.c: In function 'BE_setVGA':
biosemu.c:147: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously, non-e500 architectures only unlocked their data cache which
was used as early RAM when booting to Linux using the "bootm" command.
This change causes all PPC boards with CONFIG_SYS_INIT_RAM_LOCK defined
to unlock their data cache during U-Boot's initialization. This
improves U-Boot performance and provides a common cache state when
booting to different OSes.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This patch updates zlib to the latest stable version.
Only relevant zlib parts were ported to u-boot tree, as was done for
the previously used version of zlib (0.95). New zlib gives faster
inflate performance and other improvements, see www.zlib.net
Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Reviewed-by: Angelo Castello <angelo.castello@st.com>
Edited commit message
Signed-off-by: Wolfgang Denk <wd@denx.de>
Linux's netconsole works much better when you can pass it the MAC address of
the server. (otherwise it just uses broadcast, which everyone else on my
network complains about :)
This sets the env var "serveraddr" (to match ethaddr), so that you can pass
it to linux with whatever bootargs you want to....
addnetconsole=set bootargs $(bootargs) netconsole=@$(ipaddr)/eth0,@$(serverip)/$(serveraddr)
Signed-of-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch fixes a compilation warning for some Ethernet PHY-less
PPC4xx platforms (440SPE based ones) and a potential compilation
error for 440SP platforms (use of undefined 'ethgroup' variable).
In the original code and in case of 440SPE platforms, 'ethgroup'
is initialized to -1 and never modified. Later in the function,
within an #ifdef statement, an 'if statement' executes code only
if 'ethgroup' is set to 4, therefore it is harmless to avoid
executing the 'if statement' by removing the CONFIG_440SPE from
the affected #ifdefs. In case of 440SP platforms with on-board
Ethernet PHY, 'ethgroup' is undefined but used (there are not such
platforms in the repository yet). All other architectures are not
affected by this change.
Signed-off-by: Alessio Centazzo acpatin@yahoo.com
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Fixed the DHCP/BOOTP/RARP regression introduced in u-boot-2009.06
by initializing our IP addr to 0 in order to accept any IP addr
assigned to us by the DHCP/BOOTP/RARP server.
Ack-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
With these fixes, this driver works properly for multi chip
addressging mode
Bugfixes:
1. Build error fixed for function mv88e61xx_busychk_multic-fixed
2. PHY dev address error detection- fixed
3. wrong busy bit was refered in function mv88e61xx_busychk -fixed
4. invalid data read ptr was refered for RD_PHY in case of
multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having
MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The Marvell documentation for the 88f6281 states that the error coding
is only valid if the error summary and last frame bits in the transmit
descriptor status field are set. This patch adds checks for these for
transmit (I would get transmit errors on bootp with the current check,
which I believe are spurious).
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
kwgbe_send/recv both have loops waiting for the hardware to set a bit.
GCC 4.3.3 cleverly optimizes the send case to ... a while(1); loop. This
patch uses readl to force a read from device memory. Other volatile
accesses have also been replaced with readl/writel where appropriate
(as per suggestions on the U-boot mailing list).
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch sets the returned value to 0xFFFF if the PHY does not exist
and does not assert Transfer Acknowledge. A NULL check for the value
pointer is also added for buffer overflow protection.
Without this patch 'mii info' will show 'phantom' devices because the
value will be not be initialized and return with some random value.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
- changed CONFIG_DRIVER_SMC911X* to CONFIG_SMC911X*
- cleaned up line lengths
- modified all boards that override weak function in this driver
- added
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
These PHYs are on P2020RDB platform.
Also revamped Freescale copyright message in drivers/net/tsec.c.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
On 04 Oct 2008 Pieter posted a dns implementation for U-Boot.
http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg10216.html
>
> DNS can be enabled by setting CFG_CMD_DNS. After performing a query,
> the serverip environment var is updated.
>
> Probably there are some cosmetic issues with the patch. Unfortunatly I
> do not have the time to correct these. So if anybody else likes DNS
> support in U-Boot and has the time, feel free to patch it in the main tree.
Here it is again - slightly modified & smaller:
- update to 2009-06 (Pieter's patch was for U-Boot 1.2.0)
- README.dns is added
- syntax is changed (now takes a third option, the env var to store
the result in)
- add a random port() function in net.c
- sort Makefile in ./net/Makefile
- dns just returns unless a env var is given
- run through checkpatch, and clean up style issues
- remove packet from stack
- cleaned up some comments
- failure returns much faster (if server responds, don't wait for
timeout)
- use built in functions (memcpy) rather than byte copy.
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
fix this gcc 4.4 warning:
tsec.c: In function 'tsec_init':
tsec.c:200: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The net code is mostly consistent in using 'Packet' rather than 'Pkt', so
rename the minor detractor to follow suite.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
CSB337 boards originally shipped with MicroMonitor, not U-Boot;
and with a version using a different convention for recording
Ethernet addresses than anyone else. To avoid breaking Linux
when it uses U-Boot, have it use the same convention on that
hardware.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This is Marvell's 88F6281_A0 based reference design board
This patch is tested for-
1. Boot from DRAM/NAND flash/NFS
2. File transfer using tftp and loadb
3. NAND flash read/write/erase
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch fixes broken build introduced by commit
84bf7ca522 (api: remove un-needed
ifdef CONFIG_API already handle by the Makefile).
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Commit 1bc15386 moved the examples/ to examples/standalone but failed
to adapt the Makefiles that need to link against libstubs.a
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Use the MPC8572's eLBC to access 1 GB (or greater) onboard NAND flash
via the 'nand' command.
Previously, the XPedite5370's NAND chip selects were properly
configured, but NAND support was not enabled.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Increasing CONFIG_SYS_BOOTM_LEN from 8 MB to 16 MB is necessary to
support uncompressing images larger than 8 MB when using the bootm
command.
Note that recent Linux kernels for the 85xx and 86xx map greater than
16MB of memory on bootup, but we use 16MB to maintain compatibility with
older Linux kernels for now.
Signed-off-by: Nate Case <ncase@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Buffered writes are possible on the XPedite5200 and XPedite5370 and greatly
improve NOR flash write speeds
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously, 85xx and 86xx boards would display DRAM information on
bootup such as:
...
I2C: ready
DRAM:
Memory controller interleaving enabled: Bank interleaving!
2 GB
FLASH: 256 MB
...
This patch moves the printing of the DRAM controller configuration to a
common board_add_ram_info() function which prints out DDR type, width,
CAS latency, and ECC mode. It also makes the DDR interleaving
information print out in a more sane manner:
...
I2C: ready
DRAM: 2 GB (DDR2, 64-bit, CL=4, ECC on)
DDR Controller Interleaving Mode: bank
FLASH: 256 MB
...
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This is in preparation for adding one common 8xxx board_add_ram_info()
function for all 8xxx boards
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This is in preparation for adding one common 8xxx board_add_ram_info()
fuction for all 8xxx boards
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match
the 86xx user's manual and other Freescale architectures
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks. This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MPC8641HPCN board is capable of swizzling the upper address bit of
the NOR flash we boot out of which creates the concept of "virtual"
banks. This is useful in that we can flash a test of image of u-boot
and reset to one of the virtual banks while still maintaining a
working image in "bank 0".
The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
A large number of boards (all AT91 based) duplicated the ROUND()
macro in their board specific config files. Add the definition to
include/common.h and clean up the board config files.
Signed-off-by: Wolfgang Denk <wd@denx.de>
We have always mapped at least 16M in the kernel and we have seen cases
with new kernel features that a kernel image needs more than 8M of
memory.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CONFIG_SYS_MALLOC_LEN is defined in the board config, and
the keymile-common.h, which collects common options used
by all keymile-boards. This results in a compile error
when compiling the kmeter1 board. So remove this define
in the board config file.
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch adds the possibility to call a board specific
i2c bus reset routine for the fsl_i2c bus driver, and adds
this option for the keymile kmeter1 board.
The deblock sequence for this board is implemented and
tested in the following way:
CR = 0x20 (release SDA and SCL pin)
CR = 0xa0 (start read)
dummy read
dummy read
if 2. dummy read == 0x00
3. dummy read
CR = 0x80 (SDA and SCL now 1 SR = 0x86)
CR = 0x00 (Modul reset SR=0x81)
CR = 0x80 (SDA and SCL = 1, SR = 0x81)
Signed-off-by: Heiko Schocher <hs@denx.de>
The current files in examples are all standalone application examples,
so put them in their own subdirectory for organizational purposes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This cleans up U-Boot's toplevel directory a bit and makes the
architecture 'config.mk' file naming and location similar to board
and cpu 'config.mk' files
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
- CONFIG_SYS_MAX_I2C_BUS changed to 1
We use only one I2C hardwarecontroller on this boards, so
change the CONFIG_SYS_MAX_I2C_BUS to 1.
- common: dont print errormsg if second IVM Block lacks.
- 82xx, mgcoge: fix double mtdpart entry in environment
- 82xx, mgcoge: activate on second Flash the second bank.
- common: CONFIG_ENV_SIZE 0x4000 for all keymile boards
- common: Change malloc size to 1MByte for all Keymile boards
We need a bigger malloc area for the environment support (128k)
on some Keymile boards (kmeter1) and the upcoming UBI support.
Change it to 1MB for all Keymile boards to be on the save side.
Also define CONFIG_SYS_64BIT_VSPRINTF which is needed for
UBI/UBIFS support.
- Add UBI support to all Keymile boards
- change manner of writing "/localbus/ranges" node
instead of writting the complete "/localbus/ranges" node
before booting Linux, only update the ranges entries
which gets dynamical detected (size of flashes).
This is needed, because keymile adds in the DTS
"/localbus/ranges" node entries, which u-boot must
not overwrite/delete.
- kmeter, mgcoge: define 2 seperate regions needed for the Intel P30 chips
The Intel P30 chip has 2 non-identical chips on
one die, so we need to define 2 seperate regions
that are scanned by physmap_of independantly.
- kmeter1: Add MTD concat support to Keymile boards
- 82xx, mgcoge: add "unlock=yes" to default environment
- added CONFIG_MTD_DEVICE to get in sync with mainline code
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Update fsl_sata to use common structures instead of casting
back and forth between the fsl specific ones and the common ones
(which are identical).
fsl_sata.c: In function 'scan_sata':
fsl_sata.c:550: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:549: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:548: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:545: note: initialized from here
fsl_sata.c:592: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:590: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:588: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:586: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:579: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
...
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds unaligned.h for ARM (needed to build with LZO
compression). The file is taken from the linux kernel, but includes
u-boot headers instead.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
Fix incorrect information about size units and correct typo.
Signed-off-by: Andrzej Wolski <awolski@poczta.fm>
Signed-off-by: Stefan Roese <sr@denx.de>
Fix incorrect information about size units and correct typo.
Signed-off-by: Andrzej Wolski <awolski@poczta.fm>
Signed-off-by: Stefan Roese <sr@denx.de>
We need to switch back to 1-bit before initialization or SD 2.0 cards
will fail to send SCR if we've switched to 4-bit already.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Shove a lot of the HOSTCC and related #ifdef checking crap into the new
compiler.h header so that we can keep all other headers nice and clean.
Also introduce custom uswap functions so we don't have to rely on the non
standard implementations that a host may (or may not in the case of OS X)
provide. This allows mkimage to finally build cleanly on an OS X system.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
fix this gcc 4.4 warning:
xyzModem.c: In function 'xyzModem_stream_open':
xyzModem.c:564: warning: 'dummy' is used uninitialized in this function
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Each arch should handle setting a proper default CROSS_COMPILE value in
their own config.mk file rather than having to maintain a large ugly list
in the Makefile. By using conditional assignment, we don't have to worry
about the variable already being set (env/cmdline/etc...).
The common config.mk file takes care of exporting CROSS_COMPILE already,
and while a few variables (toolchain ones) utilize CROSS_COMPILE before
including the arch config.mk, they do so with deferred assignment.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Commit 2419169f removed support for legacy NAND and disk on chip but
missed to update the code for a few boards. This patch fixes the
resulting build issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 5669ed45 ("cmd_flash.c: fix warning: unused variable
'addr_first'/'addr_last'") changed the #ifdef logic areound the
declaration of these variables and missed a combination of settings
of HAS_DATAFLASH with SYS_NO_FLASH; this patch fixes this.
Also spotted by Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 0a87dd90 that was supposed to fix out-of-tree building for the
pcm030 board was unfortunately incomplete.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds unaligned.h for ARM (needed to build with LZO
compression). The file is taken from the linux kernel, but includes
u-boot headers instead.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
This patch adds a SATA harddisk driver for the canyonlands.
This patch is kernel driver's porting.
This patch corresponded to not cmd_scsi but cmd_sata.
This patch divided an unused member with ifndef __U_BOOT__ in the structure.
[environment variable, boot script]
setenv bootargs root=/dev/sda7 rw
setenv bootargs ${bootargs} console=ttyS0,115200
ext2load sata 0:2 0x400000 /canyonlands/uImage
ext2load sata 0:2 0x800000 /canyonlands/canyonlands.dtb
fdt addr 0x800000 0x4000
bootm 0x400000 - 0x800000
If you drive SATA-2 disk on Canyonlands, you must change parts from
PI2PCIE212 to PI2PCIE2212 on U25. We confirmed to boot by using
following disks:
1.Vendor: Fujitsu Type: MHW2040BS
2.Vendor: Fujitsu Type: MHW2060BK
3.Vendor: HAGIWARA SYS-COM:HFD25S-032GT
4.Vendor: WesternDigital Type: WD3200BJKT (CONFIG_LBA48 required)
5.Vendor: WesternDigital Type: WD3200BEVT (CONFIG_LBA48 required)
6.Vendor: Hitachi Type: HTS543232L9A300 (CONFIG_LBA48 required)
7.Vendor: Seagate Type: ST31000333AS (CONFIG_LBA48 required)
8.Vendor: Transcend Type: TS32GSSD25S-M
9.Vendor: MTRON Type: MSD-SATA1525-016
Signed-off-by: Kazuaki Ichinohe <kazuichi at fsi.co.jp>
While the 1.0 and 1.2 spin of the bf533-stamp boards can handle the higher
SCLK speeds just fine, the 1.1 spin cannot due to the bugs introduced with
the shortened SDRAM traces. So lower the SCLK speed down to a value that
all three can handle.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Part of the mini Blackfin ABI with operating systems is that they can use
0x4f0-0x4f8 to pass log buffers to/from bootloaders. So add support to
U-Boot for reading the log buffer.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fix these:
pati.c: In function 'checkboard':
pati.c:358: warning: pointer targets in passing argument 2 of 'getenv_r' differ in signedness
../common/flash.c: In function 'write_word':
../common/flash.c:824: warning: dereferencing type-punned pointer will break strict-aliasing rules
cmd_pati.c: In function 'do_pati':
cmd_pati.c:279: warning: 'value' may be used uninitialized in this function
Signed-off-by: Wolfgang Denk <wd@denx.de>
Currently the mpl boards duplicate the code to print the current
devices from common/console.c; use stdio_print_current_devices()
instead
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
On build of omap3 targets in MAKEALL, the *.ERR files have
cpu.c: In function 'cleanup_before_linux':
cpu.c:64: warning: implicit declaration of function 'v7_flush_dcache_all'
cpu.c:64: warning: implicit declaration of function 'get_device_type
The functions v7_flush_dcache_all and get_device_type are declared
in include/asm-arm/arch-omap3/sys_proto.h, so use this file to
declare the functions.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The board/armltd/integrator/split_by_variant.sh script used to print
"Configuring for integrator*p board..." no matter which board name
was being compiled. This made it difficult to match MAKEALL output to
board names. This patch fixes this.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 8d2effea added a warning for configurations that use NAND
without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but
failed to fix the affected boards.
This patch covers the non-PPC boards that were missed in the previous
patch (commit 170c1972).
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is Marvell's 88F6281_A0 based custom board developed
for wireless access point product
This patch is tested for-
1. Boot from DRAM/SPI flash/NFS
2. File transfer using tftp and loadb
3. SPI flash read/write/erase
4. Booting Linux kernel and RFS from SPI flash
5. Boot from USB supported
Reviewed-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Reference:
http://plugcomputer.org/http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support
This patch is tested for-
1. Boot from DRAM/NAND flash
2. File transfer using tftp
3. NAND flash read/write/erase
4. Linux kernel and RFS Boot from NAND
5. Enabled USB PHY init for kernel need
6. Boot from USB supported
Note: to boot Kirkwood kernel with USB support,
you should add "usb start" in the boot sequence
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Commit c9969947, which added support for the pcm030 board
(aka phyCORE-MPC5200B-tiny), broke out-of-tree building.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 8e55258f created function uec_standard_init() to initialize
all UEC interfaces for 83xx and 85xx but failed to provide a
prototype for it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The "stdio/device: rework function naming convention" patch
(commit 52cb4d4f) broke the MIP405T board; this patch fixes it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 8d2effea added a warning for configurations that use NAND
without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but
failed to fix the affected boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The sub-command parser missed a brace, so "return 0;" is always
taken and no error message is diplayed if you say "i2c scan"
instead of "i2c probe", for example.
Proper brace is added. Also, a misleading and unneeded else
is removed.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com.it>
So far the console API uses the following naming convention:
======Extract======
typedef struct device_t;
int device_register (device_t * dev);
int devices_init (void);
int device_deregister(char *devname);
struct list_head* device_get_list(void);
device_t* device_get_by_name(char* name);
device_t* device_clone(device_t *dev);
=======
which is too generic and confusing.
Instead of using device_XX and device_t we change this
into stdio_XX and stdio_dev
This will also allow to add later a generic device mechanism in order
to have support for multiple devices and driver instances.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
A bug was introduced by commit e94e460c6e
which affected non-MPC83xx/85xx/86xx ppc boards which had CONFIG_DDR_ECC
defined and resulted in errors such as:
Configuring for canyonlands board...
fsl_dma.c:50:2: error: #error "Freescale DMA engine not supported on your
processor"
make[1]: *** No rule to make target `.depend', needed by `libdma.a'. Stop.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
arranged configurations in alphabetical order
CONFIG_CMD_FLASH moved under ifndef CONFIG_SYS_NO_FLASH
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
The curr_device variable really should be namespaced with a "sata_" prefix
since it is only used by the sata code. It also avoids random conflicts
with other pieces of code (like cmd_mmc):
common/libcommon.a(cmd_sata.o):(.data.curr_device+0x0):
multiple definition of `curr_device'
common/libcommon.a(cmd_mmc.o):(.data.curr_device+0x0): first defined here
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The curr_device variable isn't used outside of cmd_mmc, so mark it static
to avoid conflicts with other pieces of code (like sata which also exports
a curr_device). Otherwise we end up with stuff like:
common/libcommon.a(cmd_sata.o):(.data.curr_device+0x0):
multiple definition of `curr_device'
common/libcommon.a(cmd_mmc.o):(.data.curr_device+0x0): first defined here
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the envcrc building was made conditional, it missed a bunch of env
storage types, so add all currently supported types.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The following commit introduced $(PCI_CLOCK) reference so that
we could tweak `PCI_66M' definition via an environment variable.
> commit f046ccd15c
> Author: Eran Liberty <liberty@freescale.com>
> Date: Thu Jul 28 10:08:46 2005 -0500
>
> * Patch by Eran Liberty
> Add support for the Freescale MPC8349ADS board.
But I suggest a removal of it for the following reasons:
* In 2006, MPC8349ADS was merged into MPC8349EMDS port,
and it seems that MPC8349EMDS port is PCI_66M free.
* OTOH, PCI_66M is used by MPC832XEMDS an MPC8360EMDS ports,
but they don't need $(PCI_CLOCK) environment variable at all.
PCI_66M is automatically configured via $(BOARD)_config names
with the help of $(findstring _66_,$@).
* Unfortunately $(PCI_CLOCK) has been undocumented anywhere,
so only a few people know the existence of it these days.
* Keep config.mk independent from $(BOARD) as much as possible.
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
At the first run of make we generate the autoconf.mk and
autoconf.mk.dep if not already the case and we currently include only
to .dep
In order to use these autogenerated values we need to include it also
even if it's included in config.mk but it's done before their
generation
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds support splash image positioning by adding an
additional variable "splashpos" to the environment. Please see
README for details.
Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Legacy NAND had been scheduled for removal. Any boards that use this
were already not building in the previous release due to an #error.
The disk on chip code in common/cmd_doc.c relies on legacy NAND,
and it has also been removed. There is newer disk on chip code
in drivers/mtd/nand; someone with access to hardware and sufficient
time and motivation can try to get that working, but for now disk
on chip is not supported.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This is needed for the MPC512x NAND driver (fsl_nfc_nand.c) which already
defines such a 4k plus 218 bytes ECC layout.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Now that the 4xx NAND driver ndfc is moved to the common NAND driver
directory we don't need this #ifdef's anymore.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Since we have simple hwconfig interface now, we don't need
pci_external_arbiter variable any longer.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and
also will fixup clock-frequency property.
Plus, since DR USB and eSDHC are mutually exclusive, we should
only configure the eSDHC if asked through hwconfig.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for eSDHC on MPC837XERDB boards. The WP
switch doesn't seem to work on RDB boards though, the WP pin is
always asserted (can see the pin state when it's in GPIO mode).
FSL DR USB and FSL eSDHC are mutually exclusive because of pins
multiplexing, so user should specify 'esdhc' or 'dr_usb' options
in the hwconfig environment variable to choose between the
devices.
p.s.
Now we're very close to a monitor len limit (196 bytes left using
gcc-4.2.0), so also increase the monitor len by one sector (64 KB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.
The function adds status = "disabled" propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
This patch implements simple hwconfig infrastructure: an
interface for software knobs to control a hardware.
This is very simple implementation, i.e. it is implemented
via `hwconfig' environment variable. Later we could write
some "hwconfig <enable|disable|list>" commands, ncurses
interface for Award BIOS-like interface, and frame-buffer
interface for AMI GUI[1] BIOS-like interface with mouse
support[2].
Current implementation details/limitations:
1. Doesn't support options dependencies and mutual exclusion.
We can implement this by integrating apt-get[3] into the
u-boot. But I didn't bother yet.
2. Since we don't implement hwconfig command, i.e. we're working
with the environement directly, there is no way to tell that
toggling a particular option will need a reboot to take
an effect. So, for now it's advised to always reboot the
target after modifying hwconfig variable.
3. We support hwconfig options with arguments. For example,
set hwconfig dr_usb:mode=peripheral,phy_type=ulpi
That means:
- dr_usb - enable Dual-Role USB controller;
- dr_usb:mode=peripheral - USB in Function mode;
- dr_usb:phy_type=ulpi - USB should work with ULPI PHYs;
The purpose of this simple implementation is to define some
internal API and then we can continue improving user experience
by adding more mature interface, like hwconfig command with
bells and whistles. Or not adding, if we feel that current
interface fits its needs.
[1] http://en.wikipedia.org/wiki/American_Megatrends
[2] Regarding ncurses and GUI with mouse support -- I'm just
kidding.
[3] The comment regarding apt-get is also a joke, meaning that
dependency tracking could be non-trivial. For example, for
enabling HW feature X we may need to disable Y, and turn Z
into reduced mode (like RMII-only interface for ethernet,
no MII).
It's quite trivial to implement simple cases though.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Update for...
* BDI2000 -> BDI3000 (BDI2000 is obsolete).
* Add a line to read the doc/README.* files
* Fix coding standard violations
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
a.k.a cfi_mtd.c does as cfi_flash.c does. This also prevents
the TQM834x build from doing a:
cfi_mtd.c:36: error: variably modified 'cfi_mtd_info' at file scope
cfi_mtd.c:37: error: variably modified 'cfi_mtd_names' at file scope
using gcc 4.4.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Saving the environment leads to overwriting u-boot itself,
bricking boards. Increase u-boot's image size so the environment
base address doesn't end up overlapping u-boot text.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Remove individual CPU specific DSPI driver.
Add required feature for the common DSPI driver in cpu_init and
in platform configuration file.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Update serial boot DRAM's Internal RAM, vector table and DRAM in
start.S, serial flash's read status command over SPI and NOR
flash.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Now that we have 3 boards for the MPC512x it turns out that they all
use the very same fixed_sdram() code.
This patch factors out this common code into cpu/mpc512x/fixed_sdram.c
and adds a new header file, include/asm-ppc/mpc512x.h, with some
macros, inline functions and prototype definitions specific to MPC512x
systems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
The mecp5123 board did not compile because the MSCAN Clock Control
Registers were missing; these got added, but as an array instead
of 4 individual registers. Adapt the code so it builds.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
When enabling NAND support for a board, one must also define
CONFIG_SYS_64BIT_VSPRINTF because this is needed in nand_util.c
for correct output.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
For JEDEC flash, we should issue word programming command relative to
base address rather than sector base address. Original source makes
SST Flash fails to program sectors which are not on the 0x10000 boundaries.
e.g.
SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector
is 0x1000 bytes.
Thus, if we issue command to "sector base (0x41000) + offset(0x5555)",
it sends to 0x46555 and the chip fails to recognize that address.
This patch is tested with SST39LF040.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Stefan Roese <sr@denx.de>
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.
The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Pandora is using both SDRC CSes. The MUX setting is needed
for the second CS clock signal to allow the 2 RAM parts to
be put in self-refresh correctly.
Based on similar patch for beagle and overo by
Jean Pihet and Steve Sakoman.
Set pullups or pulldowns for GPIOs which need them.
Disable them for others, which have external pulls.
Also make disabled pull setting consistent (some pins had
type set to "up" even if pull type selection was disabled).
Setup pin mux for GPIO pins connected on rev3 or later
boards. Also change NUB2 IRQ pin. This should not affect
older boards because they don't have any nubs (analog
controllers) attached to them.
ehci-hcd.c: In function 'ehci_submit_root':
ehci-hcd.c:719: warning: value computed is not used
ehci-hcd.c:748: warning: value computed is not used
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
* Remove symlinking of files located outside api_examples/
* Auto generate dependencies for files located outside api_examples/
* Update names of variables to be similar to those in tools/Makefile
* Fix out of tree build error
Dependencies are calculated for all files in the SRCS variable.
Previously, the SRCS variable contained files which were symlinked
into the api_examples/ directory. These symlinked files did not exist
when dependencies were calculated when building out of tree. This
resulted in errors such as:
make[1]: *** No rule to make target `/work/wd/tmp-ppc/api_examples/.depend', needed by `_depend'. Stop.
make[1]: Leaving directory `/home/wd/git/u-boot/work/api_examples'
make: *** [depend] Error 2
Since symlinked source files are no longer used, this bug no longer
exists.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
This cleans up the Makefile a bit and simplifies future changes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet
driver, but the code that used that macro was removed over a year
ago, so board configuration files no longer need to define it.
The _IO_BASE macro is also automatically defined to 0 if it isn't
already set, so there's no need to define that macro either in the
board configuration files.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Add support for the Phytec phyCORE-MPC5200B-tiny.
Code originally from Pengutronix.de.
Created CONFIG_SYS_ATA_CS_ON_TIMER01 define for when IDE CS is on
Timer 0/1
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
The current kallsyms code is using \\0 to escape the backslash in the awk
code, but the shell too needs escaping. This way we make sure gcc is
passed the \0. Then gcc itself will consume this as an octal, so we have
to use 000 so gcc will create the final NUL.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The cm-bf561 module can easily hook up to the EXT-BF5xx-USB-ETH2 extender
board, so add a simple example of how to do that in the board config.
Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The latest blackstamp boards can only run the SPI flash at 15MHz before
they start to crap out, so lower the max speeds accordingly. The new SPI
flash also has different sector requirements, so update the environment
sizes as well.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A few debug-type commands used to dump the raw icache/dcache data. Useful
when trying to track down cache-related bugs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Current code only sets the PCI vendor id to 0x1014 and
leaved device id to 0x0000.
Ths patch ....
a) uses the correct PCI_VENDOR_ID_IBM macro for this
b) sets the default device ID as stated in the UM to 0x0156
by using PCI_DEVICE_ID_IBM_405GP for this.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves some basic PCI initialisation from the 4xx cpu_init_f()
to cpu/ppc4xx/4xx_pci.c.
The original cpu_init_f() function enabled the 405EP's internal arbiter
in all situations. Also the HCE bit in cpc0_pci is always set.
The first is not really wanted for PCI adapter designs and the latter
is a general bug for PCI adapter U-Boots. Because it enables
PCI configuration by the system CPU even when the PCI configuration has
not been setup by the 405EP. The one and only correct place is
in pci_405gp_init() (see "Set HCE bit" comment).
So for compatibility reasons the arbiter is still enabled in any case,
but from weak pci_pre_init() so that it can be replaced by board specific
code.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
It fixes the access to the 'ehci' struct elements for mpc83xx which
should have been taken care of in 4ef01010aa
Sorry about that.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch fixes the access to the 'ehci' struct elements which should
have been taken care off in 4ef01010aa
Sorry about that.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
These functions are no longer defined, so remove their prototypes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch use blackfin errno.h implementation which
correspond Linux kernel one.
MIPS implemetation is different that's why I keep it.
I removed ppc_error_no.h from Marvell boards which
was the same too.
I have got ack from ppc40x, blackfin, arm, coldfire and avr custodians.
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Check that an argument is passed to ubifsmount and that addresses and
sizes are actually numbers for ubifsload. Also improve the instructions
a bit.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
The VID header offset is sometimes needed to initialize the UBI
partition. This patch adds it (optionally) to the command line
for the ubi part command.
(Lines have been properly wrapped since last version)
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch makes pll_write on PPC405EP boards
global and callable from C code.
pll_write can be used to dynamically modify the PLB:PCI divider
as it is required for 33/66 MHz pci adapters based on the 405EP.
board_early_init_f() is a good place to do that (check M66EN signal
and call pll_write() when it is required).
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch implements the is_pci_host() function in a similiar way
as it is used on 440 targets.
The former path with CONFIG_PCI_HOST == PCI_HOST_AUTO does not
build on 405EP targets because checking the PCI arbiter is different.
So putting the fixed code into a separate function makes the code
more readable.
Also using is_pci_host() on 405 brings 405 and 440 PCI code
a little bit closer.
In preparation for an upcoming 405EP based PMC module I made this
function weak so that it can be overwritten from board specific code.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a debug compilation error for PPC4xx platforms, all
other architectures are not affected by this change. The 'handler'
pointer was undefined. The fix is exercised and has effect only if
DEBUG is defined.
Signed-off-by: Alessio Centazzo acpatin@yahoo.com
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes printf format string compilation warnings in several
debug statements. It also fixes the dump of DDR controller MQ registers
found on some 44x and 46x platforms. The current register dump code
uses incorrect DCRs to access these registers.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes 2 problems with FDT EBC mappings on Canyonlands.
First, NAND EBC mapping was missing, making Linux NAND driver
unusable on this board. Second, NOR remapping code assumed that
NOR is always on CS0, however when booting from NAND NOR is on CS3.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
all sh boards use the same cpu linker script so move it to cpu/$(CPU)
that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk
tested on r2dplus
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
currently we need to sync the linker script enty and TEXT_BASE manualy
and the reloc_dst is based on it
instead provide it now from the ldflags
tested on r2dplus
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
If use the onenand boot, the env_relocate_spec() calls mtd->read(),
and the type of the argument #2 of mtd->read() was changed to loff_t.
But, the "env_addr" type is still unsigned long, thus this patch change
the type from unsigned long to loff_t.
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The bbt descriptors contains the pointer to the bbt pattern which
are statically initialized memory struct. When relocated to RAM,
these pointers will continue point to NOR flash(or L2 SRAM, or
other boot device). If the contents of NOR flash changed or L2
SRAM disabled, it'll hang the system.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
When adding large page NAND support to this file, I had a misunderstanding
about the exact semantics of NAND_CTRL_CHANGE (which isn't documented
anywhere I can find) -- it is apparently just a hint to drivers,
which aren't required to preserve the old value for subsequent
non-"change" invocations.
This change makes nand_boot.c no longer assume this. Note that this
happened to work by chance with some NAND drivers, which don't preserve
the value, but treat 0 equivalently to NAND_CTRL_ALE.
I don't have hardware to test this, so any testing is appreciated.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Currently, when booting from NAND using nand_spl, in the beginning the default
environment is used until later in boot process the dynamic environment is read
out. This way environment variables that must be interpreted early, like the
baudrate or "silent", cannot be modified dynamically and remain at their
default values. Fix this problem by reading out main and redundand (if used)
copies of the environment in the nand_spl code.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
nand_util currently uses size_t which is arch dependent and not always a
unsigned long. Now use loff_t, as does the linux mtd layer.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The "nand markbad" and "onenand markbad" commands did not check if an
argument was passed; if this was forgotten, no error was raised but
block 0 was marked as bad.
While fixing this bug, clean up the code a bit and allow to pass more
than one block address, thus allowing to mark several blocks as bad
in a single command invocation.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped. Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does: as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:
Device 0: 2x nand0, sector size 128 KiB
Switch to use the default chipselect function unless the board
really needs its own. The logic for the Sonata board moves out
of the driver into board-specific code. (Which doesn't affect
current build breakage if its NAND support is enabled...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
All DaVinci SOC's use a CLE mask of 0x10 and an ALE mask of 0x8
except the DM646x. This was decided by the design team driving the design.
This patch updates the CLE and ALE values for DM646x.
Updated patches for DM646x will be sent shortly.
This applies to u-boot-nand-flash git
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The ALE mask used by DaVinci SOCs is wrong. The patch changes the mask value
from '0xa' to '0x8'. This is the mask we use for all TI releases.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).
DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages. Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.
Since this option itself seems broken, remove it. Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Minor cleanup for DaVinci NAND code:
- Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
be defined when there are multiple chipselect lines in use
(as with common 2 GByte chips).
- Cleanup handling of EMIF control registers
* Only need one pointer pointing to them
* Remove incorrect and unused struct supersetting them
- Use the standard waitfunc; we don't need a custom version
- Partial legacy cleanup:
* Don't initialize every board like it's a DM6446 EVM
* #ifdef a bit more code for BROKEN_ECC
Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch fixes a build problem noticed on Apollon by using
mtd_dev_by_eb() instead of "/" as done in the Linux UBI version.
So this brings the U-Boot UBI version more in sync with the Linux
version again.
Signed-off-by: Stefan Roese <sr@denx.de>
new chips supported:-
MX25L1605D, MX25L3205D, MX25L6405D, MX25L12855E
out of which MX25L6405D and MX25L12855E tested on Kirkwood platforms
Modified the Macronix flash support to use 2 bytes of device id instead of 1
This was required to support MX25L12855E
Signed-off-by: Piyush Shah <spiyush@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Looks like when I was encoding the sector sizes, I forgot to divide by 8
(due to the stupid marketing driven process that declares all sizes in
useless megabits and not megabytes).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This sets CONFIG_SYS_HZ to 1000 as required, and completely rewrites
timer code, which is now both correct and much smaller. Unused
functions like udelay_masked() have been removed as no driver uses
them, even the ones that are not currently active for this board.
mtu.h is copied literally from the kernel sources.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The evaluation kit has both Nand and OneNand, both drivers are there
and the two configurations only select a different default for the
jffs partition. This adds the OneNand driver and cleans up storage.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
There is only one public release of the Nomadik chip, so the ifdef
in reset code as well as a define in the config file are not needed
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
This is an error in my side in the initial submission: nobody
calls it ""nmdk8815", it's "nomadik hardware kit", nhk8815, instead.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Due to change in the usb_board_init() prototype, the USB for
the TrizepsIV was not correctly initialized.
Removed dummy print from usb_board_stop().
Signed-off-by: Stefano Babic <sbabic@denx.de>
This patch looks okay on u-boot-net.git/next branch
but when it was merged to u-boot.git/master the last line is missing
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds support for esd gmbh MEESC board.
The MEESC is based on an Atmel AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
To enable CAN init, CONFIG_CAN has to be defined in the board config file
and at91_can_hw_init() has to be called in the board specific code.
CAN is available on AT91SAM9263 and AT91CAP9 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).
This patch assumes that some other program performs the actual
NAND boot.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Acked-by: Fabio Estevam <fabioestevam@yahoo.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.
Without this patch, EMIF configurations made in board_init()
will be invalidated.
Signed-off-by: Thomas Lange <thomas@corelatus.se>
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Do backup the old reset length and restore it after the MACB initialisation.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: Stelian Pop <stelian@popies.net>
sys_eeprom.c: In function 'do_mac':
sys_eeprom.c:323: warning: dereferencing type-punned pointer will break strict-aliasing rules
sys_eeprom.c: In function 'mac_read_from_eeprom':
sys_eeprom.c:395: warning: dereferencing type-punned pointer will break strict-aliasing rules
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to
CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures
use
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Defining the next two configs allows to switch the serial port from the
console using the setenv stdin and stdout
1. #define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */
2. #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Initial support for Extreme Engineering Solutions XPedite5170 -
a MPC8640-based 3U VPX single board computer with a PMC/XMC
site.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The calculate for rank density in compute_ranksize() for DDR3 used all
integers for the expression, so the result was also a 32-bit integer, even
though the 'bsize' variable is a u64. Fix the expression to calculate a
true 64-bit value.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make DMA transactions snoopable so that CPUs can keep caches up-to-date.
This allows dma transactions to be used for operations such as memory
copies without any additional cache control operations.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Also update dmacpy()'s argument order to match memcpy's and use
phys_addr_t/phy_size_t for address/size arguments
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests. Previously, CS was being
set, not cleared.
Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Support DMA transfers larger than the DMA controller's limit of
(2 ^ 26 - 1) bytes
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch allows the guard time parameter to be set in
the Atmel LCDC driver.
By default, the previous value of 1 is used, unless the
setting is defined elsewhere.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.
This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Unify with 83xx and 85xx and use CPU_TYPE_ENTRY. We are going to use
this to convey the # of cores and DDR width in the near future so its
good to keep in sync.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If doing a pure write with register address and data (not a read/write
combo transfer), we don't set the initial transfer length properly which
ends up causing only the register address to be transferred.
While we're here, fix the i2c_write() parameter description of the buffer.
Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Because of the reset_cpu is soc specific, should be move to soc
And read reset value from SYS_ID register instead of hard code
this patch also supports s3c6410
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
UART hardware on i.MX27 is the same as on the i.MX31 so we just
need to provide the driver with correct address of the registers.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.
It has been tested on a i.MX31 PDK board with large page NAND. Small
page NANDs should work as well, but this has not been tested.
Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
whether this is compatible with a particular setup depends on how
the NAND device is programmed by the flash programmer (e.g. JTAG
debugger).
The patch is based on the work by Maxim Artamonov.
Signed-off-by: Maxim Artamonov <scn1874@yandex.ru>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's
in start.S. In preparation for adding support for NAND SPL
the macro CONFIG_PRELOADER is introducted and replaces the
CONFIG_ONENAND_IPL in start.S.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
this will allow you to store use it for the env and to boot directly U-Boot from
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
move PSRAM init to pm9263.c
this will allow us after to make the nor lowlevel_init generic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The way the ALL variable is used allows for config.mk's to add more
targets themselves without having to clutter up the top level Makefile.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SPI flash define is named CONFIG_SF_DEFAULT_SPEED, not
CONFIG_SF_DEFAULT_HZ, so fix the typos in the Blackfin boards.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Building the compression code in lib_generic/ with -O2 rather than -Os
gives a nice speed boost without too much code size increase.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The latest version of U-Boot got a bit fatter in the BSS section which
caused overflows in the RAM region, so increase the monitor size.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SPI flash layer is much stricter about sector usage than the eeprom
layer we used to use, so update the env settings to better match the
sector alignment of the flashes we use.
Signed-off-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The debug tools that interface with the other side of the JTAG console
got much slower when generalizing things, so bump up the default timeout
value on the U-Boot side to cope. Hopefully at some point we can improve
the debug tools to speed things back up.
Signed-off-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This script is similar to the netconsole script, but instead works with
the JTAG console device driver that exists on Blackfin parts.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
All drivers need to be converted to CONFIG_NET_MULTI.
This patch converts the dm9000 driver.
Signed-off-by: Thomas Smits <ts.smits@gmail.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Different flavours of DaVinci SOC's have differences in their EMAC IP
This patch does the following
1) Updates base addresses for DM365
2) Updates MDIO frequencies for DM365 and DM646x
3) Update EMAC wrapper registers for DM365 and DM646x
Patch applies to u-boot-net git. the EMAC driver itself
will be updated shortly to add support for DM365 and DM646x
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
From 584b5fbd4abfc43f920cc1c329633e03816e28be Mon Sep 17 00:00:00 2001
From: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Date: Wed, 20 May 2009 18:26:01 -0400
Subject: [PATCH] Standardize the use of MCFFEC_TOUT_LOOP as a udelay(1) loop counter.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The problem is that BOOTP_SIZE uses ETHER_HDR_SIZE which is 14 bytes.
If sending a VLAN tagged frame (when env variable vlan is set) this
should be VLAN_ETHER_HDR_SIZE=18 which is what NetSetEther returns.
Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
All the Blackfin linker scripts were duplicated across the board dirs with
no difference save from the semi-often used ENV_IS_EMBEDDED option. So
unify all of them in the lib_blackfin/ dir and for the few boards that
need to embedded the environment directly, add a LDS_BOARD_TEXT define for
them to customize via their board config file. This is much simpler than
forcing them to duplicate the rest of the linker script.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF51xF parts have an internal SST SPI flash, so make sure the driver is
enabled by default so we can access it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin port was using asm/blackfin-config-{pre,post}.h to setup
common Blackfin board defines. The common method now is to use config.h,
so convert blackfin-config-post.h to that. Rename the still Blackfin
specific blackfin-config-pre.h to config-pre.h so the naming conventions
at least line up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Allow boards to easily override the root= and default bootcmd, allow
people to tweak the file used in default bootcmds at runtime via one env
var, and add a stock nandboot command.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes,
so add a new 'spibootldr' command to take advantage of it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
For the most part, the Blackfin processor boots files in the LDR format
rather than binary/ELF files. So we want to export the environment as a
raw blob to the LDR utility so it can embed it at the right location.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Linux kernel has some helper rules which allow you to quickly produce
some of the intermediary files from C source. Specifically, you can
create .i files which is the preprocessed output and you can create .s
files which is the assembler output. This is useful when you are trying
to track down header/macro expansion errors or inline assembly errors.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The $(SUBDIRS) variable is only declared when U-Boot has been configured,
but it gets used all the time. In the non-configured case, it is used to
generate a helpful error message, but it needs to be set properly for that
to occur.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
New command allows to:
o check FW version
o set LED status
o set digital output status
o get digital input status
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
With our Blackfin boards, we like to build the compression routines with
-O2 as our tests show a pretty good size/speed tradeoff. For the rest of
U-Boot though, we want to stick with the default -Os as that is mostly
control code. So in our case, we would add a line like so to the board
specific config.mk file:
CFLAGS_lib_generic += -O2
Now all files under lib_generic/ will have -O2 appended to their build.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This reverts commit ca9c8a1e10,
which causes compile warnings ("large integer implicitly truncated
to unsigned type") on all systems that use this driver. The warning
results from passing long constants (TX_CFG, RX_CFG) into
smc911x_set_mac_csr() which is declared to accept "unsigned
character" arguments only.
Being close to a release, with nobody available to actually test the
code or the suggested fixes, it seems better to revert the patch.
Add defines similar to those already used for the the 86xx architecture.
This will ease sharing of PCI code between the 85xx and 86xx
architectures.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The following changes were made to sync up the DMA code between the 85xx
and 86xx architectures which will make it easier to break out common
8xxx DMA code:
85xx:
- Don't set STRANSINT and SPCIORDER fields in SATR register. These bits
only have an affect when the SBPATMU bit is set.
- Write 0xffffffff instead of 0xfffffff to clear errors in the DMA
status register. We may as well clear all 32 bits of the register...
86xx:
- Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers
- Add clearing of errors in the DMA status register when initializing
the controller
- Clear the channel start bit in the DMA mode register after a transfer
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to
reduce a large amount of code duplication
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via
UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we
disable UEC6 and UEC8 by default.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The uec driver contains code to hard code configuration information for the uec
ethernet controllers. This patch creates an array of uec_info structures, which
are then parsed by the corresponding driver instance to determine configuration.
It also creates function uec_standard_init() to initialize all UEC interfaces
for 83xx and 85xx.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We support up to 8 mac addresses in system eeprom, so we define the macro
MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr
according to mac_count.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is more accurate.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Its reasonable that we may have ethernet devices but dont have drivers
or support enabled for them in u-boot and want the device tree fixed up.
Unconditionally calling the ethernet fixup is fine since if we dont have
ethernet nodes that match (or aliases) we will not attempt to do
anything.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds NAND support to the MPC5121ADS board. Please
note that the image size increased since NAND support didn't
fit in the current image size (256k).
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
This patch adds NAND Flash Controller driver for MPC5121 revision 2.
All device features, except hardware ECC and power management, are
supported.
This NFC driver replaces the one orignally posted by John Rigby:
"[PATCH] Freescale NFC NAND driver"
It's a port of the Linux driver version posted by Piotr Ziecik a few
weeks ago. Using this driver has the following advantages (from my
point of view):
- Compatibility with the Linux NAND driver (e.g. ECC usage)
- Better code quality in general
- Resulting U-Boot image is a bit smaller (approx. 3k)
- Better to sync with newer Linux driver versions
The only disadvantage I can see, is that HW-ECC is not supported right
now. But this could be added later (e.g. port from Linux driver after
it's supported there). Using HW-ECC on the MCP5121 NFC has a general
problem because of the ECC usage in the spare area. This collides with
JFFS2 for example.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Piotr Ziecik <kosmo@semihalf.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
This is needed for the upcoming esd MECP5123 board port which uses
I2C EEPROM for environment storage.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Acked-by: Heiko Schocher<hs@denx.de>
The CPCI750 can be built as CPCI host or adapter/target board. This patch
adds support for runtime detection of those variants.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
The Marvell bridge 64360 supports serveral PCI functions, not only 0. This
patch enables access to those functions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
This command is used to load/boot an OS-image which is transferred from
the CPCI host to the CPCI target/adapter.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
UBI is quite memory greedy and requires at least approx. 512k of malloc
area. This patch adds a compile-time check, so that boards will not
build with less memory reserved for this area (CONFIG_SYS_MALLOC_LEN).
Signed-off-by: Stefan Roese <sr@denx.de>
Added macronix SF driver for MTD framework
MX25L12805D is supported and tested
TBD: sector erase implementation, other deivces support
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds CONFIGs for enabling USB in mpc8536ds and also
adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its
Copyright.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch adds CONFIGs for enabling USB in mpc8315erdb and also
adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its
Copyright.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The following patch adds 85xx-specific USB support and also
revamps Copyright in immap_85xx.h
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The following patch reorganizes/reworks the USB support for mpc83xx
as under:-
* Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to
cpu/mpx83xx/cpu_init.c
* Board specific usb_phy_type is read from the environment
* Adds USB EHCI specific structure in include/usb/ehci-fsl.h
* Copyrights revamped in most of the following files
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The following patch moves 8xxx-specifc USB #defines from
drivers/usb/host/ehci-fsl.h to include/usb.
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
To prepare for the 85xx USB support, which requires interface enablement
only once in (specified) order, no different than instructions for
enabling the interface under 83xx. It is unknown why the original author
enabled the interface twice (checked for references in errata, etc).
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch removes the duplicated code for baudrate generator configuration
in the PSC serial_init() implementation by calling serial_setbrg() instead
of duplicating the code.
Signed-off-by: Stefan Roese <sr@denx.de>
The wrong input frequency was used in serial_setbrg(). This patch fixes
this by using ips_clk as input frequency for the PSC baudrate generator.
Signed-off-by: Stefan Roese <sr@denx.de>
Move needed definitions (register descriptions etc.) from
include/mpc512x.h into include/asm-ppc/immap_512x.h.
Instead of using a #define'd register offset, use a function that
provides the PATA controller's base address.
All the rest of include/mpc512x.h are register offset definitions
which can be eliminated by proper use of C structures.
There are only a few register offsets remaining that are needed in
cpu/mpc512x/start.S; for these we provide cpu/mpc512x/asm-offsets.h
which is intended as a temporary workaround only. In a later patch
this file will be removed, too, and then auto-generated from the
respective C structs.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
This commit changes the MPC512x code to use I/O accessor calls (i.e.
out_*() and in_*()) instead of using deprecated pointer accesses.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
We rename the board so we use a consistent name in U-Boot and in
Linux. Also, we use this opportunity to move the board into the
Freecale vendor directory.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
We will soon see several new MPC521x based boards added. This patch
moves files that are not board specific to a common directory so they
can be shared by all such ports. It also splits off common IDE code
into a new file, cpu/mpc512x/ide.c .
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Many of the help messages were not really helpful; for example, many
commands that take no arguments would not print a correct synopsis
line, but "No additional help available." which is not exactly wrong,
but not helpful either.
Commit ``Make "usage" messages more helpful.'' changed this
partially. But it also became clear that lots of "Usage" and "Help"
messages (fields "usage" and "help" in struct cmd_tbl_s respective)
were actually redundant.
This patch cleans this up - for example:
Before:
=> help dtt
dtt - Digital Thermometer and Thermostat
Usage:
dtt - Read temperature from digital thermometer and thermostat.
After:
=> help dtt
dtt - Read temperature from Digital Thermometer and Thermostat
Usage:
dtt
Signed-off-by: Wolfgang Denk <wd@denx.de>
In case of incorrect command invocations U-Boot used to print pretty
useless "usage" messages, for example:
=> nand markbad
Usage:
nand - NAND sub-system
In the result, the user would have to run the "help" command to get
the (available) information about correct command usage. Change this,
so that this information gets always printed.
Note that this changes the user interface of all commands, but
hopefully to the better.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The printing code would check the same environment byte multiple times and
write to the console one byte at a time. For some devices (such as the
Blackfin JTAG console which operates in 8 bytes at a time), this is pretty
damned slow. So create a small 16 byte buffer to fill up and send to puts
as needed. In the process, unify the different print functions, shrink
the resulting code (source and compiled), and avoid excess env reads as
those too can be somewhat expensive depending on the board.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
as $(obj) is empty when in tree build
%.s: %.S
$(CPP) $(AFLAGS) -o $@ $<
and
$(obj)%.s: %.S
$(CPP) $(AFLAGS) -o $@ $<
are the same
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
The static function compare_sign is only used to compare the fs_type string
and does not do anything more than what strncmp does.
The addition of the trailing '\0' to fs_type, while legal, is not needed
because the it is never printed out and strncmp does not depend on NULL
terminated strings.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The kernel stores address<->symbol names in it so things can be decoded at
runtime. Do it in U-Boot, and we get nice symbol decoding when crashing.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
There is actually no good reason to enforce that all board
configuations must define default settings for "mtdids" and
"mtdparts". Actually this may be difficult to handle, especially on
boards where different sizes of flash chips can be fit, so there is no
real "default" partition map for all boards.
Lift this arbitrary limitation.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch removes all references to the direct CFI FLASH interface
(via flash_info[]). Now that all FLASH types currently handled in
mtdparts are available (if selected, see below) via the MTD infrastructure.
This is NOR, NAND and OneNAND right now. This can be achieved by defining
the following options:
CONFIG_MTD_DEVICE (for all FLASH types)
plus
CONFIG_FLASH_CFI_MTD (for NOR FLASH)
So we need to add those defines to the board config headers currently
using the mtdparts commands. This is done via another patch, so
we shouldn't break mtdparts compatibility.
One big advantage from this solution is that the cmd_mtdparts.c is
*much* cleaner now. Lot's of #ifdef's are removed and the code itself
is smaller. Additionally the newly added MDT concatenation feature
can new be used via the mtdparts infrastructure and therefor via
UBI etc.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Scott Wood <scottwood@freescale.com>
This new define enables mtdcore.c compilation and with this we can
select the MTD device infrastructure needed for the reworked mtdparts
command.
We now have the 2 MTD infrastructure defines, CONFIG_MTD_DEVICE and
CONFIG_MTD_PARTITIONS. CONFIG_MTD_DEVICE is needed (as explained above)
for the "mtdparts" command and CONFIG_MTD_PARTITIONS is needed for UBI.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
By changing the cmd_mtdparts to only use the MTD infrastructure and
not the direct interface to the CFI NOR FLASH driver we now need
to add the MTD infrastructure to all boards using those mtdparts
commands. This patch adds those components:
CONFIG_MTD_DEVICE (for all FLASH types)
plus
CONFIG_FLASH_CFI_MTD (for NOR FLASH)
To all board maintainers: Please test this on your platforms and
report any problems/issues found. Thanks.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ron Madrid <info@sheldoninst.com>
Cc: Georg Schardt <schardt@team-ctech.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Martin Krause <martin.krause@tqs.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Ricardo Ribalda <ricardo.ribalda@uam.es>
This patch brings the U-Boot MTD infrastructure in sync with the current
Linux MTD version (2.6.30-rc3). Biggest change is the 64bit device size
support and a resync of the mtdpart.c file which has seen multiple fixes
meanwhile.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Kyungmin Park <kmpark@infradead.org>
This patch adds concatenation support to the U-Boot MTD infrastructure.
By enabling CONFIG_MTD_CONCAT this MTD CFI wrapper will concatenate
all found NOR devices into one single MTD device. This can be used by
e.g by UBI to access a partition that spans over multiple NOR chips.
Signed-off-by: Stefan Roese <sr@denx.de>
and fix comment
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Adjusted Copyright message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
There are currently 3 versions of the zoom2 board.
The production board, that is currently being released.
The beta board, similar in form to the production board but not released.
The alpha board, a set of PCBs with a very limited circulation.
GPIO 94 is used to determine the version of the board. If GPIO 94 is clear,
the board is a production board, otherwise it is a beta board.
The alpha board will likely be mistaken for a beta board. An alpha board
was unavailible for testing.
This has been tested on the beta and production boards.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
There is no new functionality in the change.
This change is a conversion from the using raw register access to using
the OMAP3 GPIO API described in doc/README.omap3.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Using the example for reading a gpio, shows the problem.
NULL should be the gpio number.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
The function and interface clocks for each GPIO bank, except the first, must
be explicitly turned on. These are controlled by the config level defines
CONFIG_OMAP3_GPIO_n where n is from 2 to 6.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
This patch assigns the u-boot system timer interrupt to
interrupt level 3, priority 6. Without this patch the interrupt
will be a level 0, priority 0, which disables it and cause
u-boot functions that relies on the timer (e.g. sleep command)
to never return.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Follow up to git commit: 19b5b533cc
Cleanup on compiler warnings on unused variables now that
bd->bi_enetaddr is no longer used.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Ported from lib_ppc/interrupts.c, this adds the ability for
the coldfire system timer to auto-reset the watchdog when
dtimer_interrupts is called.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
The Beagle rev Cx and Overo boards are using both SDRC CSes. The MUX
setting is needed for the second CS clock signal to allow the 2 RAM
parts to be put in self-refresh correctly. This also works on rev B
Beagle boards with 128M of RAM.
From: Steve Sakoman <steve@sakoman.com>
From: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
With other OMAP3 boards we recently switched to CPU and Board
info API. From parallel merge, this is missing for Zoom2.
Enable it for Zoom2, too.
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Zoom2 serial is in general supplied by one of the 4 UARTS on the debug board.
The default serial is from the USB connector on left side of the debug board.
The USB connector will produce 2 of the 4 UARTS. On your host pick the first
enumeration.
The details of the setting of the serial gpmc setup are not available.
The values were provided by another party.
The serial port set up is the same with Zoom1.
Baud rate 115200, 8 bit data, no parity, 1 stop bit, no flow.
The kernel bootargs are
console=ttyS3,115200n8
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
all arm init the IRQ stack the same way
so unify it in lib_arm/interrupts.c and then call arch specific interrupt init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
all arm boards except a few use the same cpu linker script
so move it to cpu/$(CPU)
that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Also enable display of 'E'mpty sectors in "flinfo" output.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Also reserve more space for U-Boot as it will probably grow soon.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Once the Davinci watchdog has been enabled, the timeout
value cannot be changed. If the timeout in use is long,
it can take a long time for card to reset. By writing
an invalid service key, we can trigger an immediate reset.
Signed-off-by: Thomas Lange <thomas@corelatus.se>
This patch adds an option to skip the video initialization on for all
video drivers. This is needed for the CPCI750 which can be built as
CPCI host and adapter/target board. And the adapter board can't
access the video cards located on the CompactPCI bus.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Rebased against simplifying patch.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Simplify nesting of drv_video_init() and use a consistent way of
indicating failure / success. Before, it took me some time to realize
which of the returns was due to an error condition and which of them
indicated success.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Initial U-Boot support for the DaVinci DM355 EVM. This is a board
from Spectrum Digital. Board docs include schematic and firmware
for its microcontroller:
http://c6000.spectrumdigital.com/evmdm355/revd/
Most of the DM355 chip is fully documented by TI, the most notable
exception being the MPEG/JPEG coprocessor (programmable using codecs
available at no cost from TI), which is omitted from its DM335 sibling:
http://focus.ti.com/docs/prod/folders/print/tms320dm355.html
This version can boot from the on-board DM9000 Ethernet chip, after
being loaded (from NAND, MMC/SD, or UART). In the near future, NAND
and USB support could be added ... NAND support is being held back
until the support for the 4-bit ECC hardware is ready.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The current configuration doesn't define default
bootfile; leading to this warning at execution:
OMAP3_EVM # dhcp
...
...
DHCP client bound to address 192.168.1.11
*** Warning: no boot file name; using 'AC18BE16.img'
TFTP from server 0.0.0.0; our IP address is 192.168.1.11;
sending through gateway 192.168.1.1
Filename 'AC18BE16.img'.
Load address: 0x82000000
Loading: *
TFTP error: 'File not found' (1)
Signed-off-by: Sanjeev Premi <premi@ti.com>
Port version 2.6.27 of the linux kernel's omap gpio interface to u-boot.
The orignal source is in linux/arch/arm/plat-omap/gpio.c
See doc/README.omap3 for instructions on use.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
The u-boot.lds is common for all DaVinci boards. The patch removes
multiple instances and moves the u-boot.lds to /cpu/arm926ejs/davinci
folder. This addresses one of the comments i received while submitting
patches for DM3xx
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The u-boot.lds file is common for all omap boards.
Move a cleaned up version to the cpu layer and add makefile logic to use it.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
This updates the optional (non-default!) NAND support for the
DaVinci DM6446 EVM:
- include MTD partitioning, defaulting to what Linux uses
- use a flash-based BBT, which among other things speeds bootup
This matches code that's now queued for mainline Linux, and might
even merge in an upcoming 2.6.30-rc; and the MTIDS are set up so
that the U-Boot $mtdparts environment variable can be passed as-is
on the kernel command line as a cmdlinepart override.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move the clock-rate dumping code into the cpu/.../davinci area
where it should have been, enabled by CONFIG_DISPLAY_CPUINFO,
updating the format and showing the DSP clock (where relevant).
Switch boards to use the cpuinfo() hook for this stuff.
Remove a few now-obsolete PLL #defines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This document describes the u-boot status LED API.
This allows common u-boot commands to use a board's leds to
provide status for activities like booting and downloading files.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
actually the timer init use the interrupt_init as init callback
which make the interrupt and timer implementation difficult to follow
so now rename it as int timer_init(void) and use interrupt_init for interrupt
btw also remane the corresponding file to the functionnality implemented
as ixp arch implement two timer - one based on interrupt - so all the timer
related code is moved to timer.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Remove duplicated interrupt code. Original, identical code can be found
in lib_arm/interrupts.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Add some basic declarations for DaVinci DM355/DM350/DM335 support,
keyed on CONFIG_SOC_DM355. (DM35X isn't quite right because the
DM357 is very different; while the DM355 is like a DM355 without
the MPEG/JPEG coprocessor).
These have different peripherals than the DM6446, and some of
the peripherals are at different addresses. Notably for U-Boot,
there's no EMAC, and the NAND controller address is different
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix two buglets in the dm644x support: don't set two must-be-zero
bits in the UART management register; and only include the I2C hooks
if the I2C driver is being included.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Split out DaVinci DM6446-specific bits from more generic bits:
- Add a CONFIG_SOC_DM644X. All current boards use DM6446 chips;
DM6443 and DM6441 chips differ in available peripherals.
- Move most DM644X-specific bits from psc.c to a new dm644x.c file,
which is conditionally built. It provides device-specific setup.
Plus minor coding style and comment updates with respect to the PSC.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Update cpu/arm926ejs/davinci/Makefile to use COBJ-y type syntax.
Add the first conditional: for EMAC driver support. Not all
chips have an EMAC; and boards might not use it, anyway.
This doesn't touch PHY configuration; that should eventually
become conditional too.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Move DaVinci PSC support from board/* to cpu/* where it belongs.
The PSC module manages clocks and resets for all DaVinci-family
SoCs, and isn't at all board-specific.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't needlessly include lowlevel init code; that's only really
needed with boot-from NOR (not boot-from-NAND). The 2nd stage
loader (UBL) handles that before it loads U-Boot.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Chips without the EMAC controller won't need the utilities
it uses to read an Ethernet address from EEPROM; so don't
include them needlessly.
Use is_valid_ether() to validate the address from EEPROM.
All-zero addresses aren't the only invalid addresses.
A fully erased EEPROM returns all-ones, also invalid...
Switch those Ethernet utilities to use "%pM" for printing
MAC addresses; and not say ROM when they mean EEPROM.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This patch moves the malloc initialization before calling flash_init().
Upcoming changes to the NOR FLASH common CFI driver with optional
MTD infrastructure and MTD concatenation support will call malloc().
And nothing really speaks against enabling malloc just a little earlier
in the boot stage. Some architectures already enable malloc before
calling flash_init() so they don't need any changes here.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Scott McNutt <smcnutt@psyent.com>
Cc: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: John Rigby <jcrigby@gmail.com>
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").
Here the commands to load and start this image from the BDI2000:
440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000
Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.
Signed-off-by: Stefan Roese <sr@denx.de>
The --binary option to envcrc can be used to export the embedded env as a
binary blob so that it can be manipulated/examined/whatever externally.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch removes the cpld binary bitstream that is
used by esd's cpld command on DP405 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the cpld binary bitstream that is
used by esd's cpld command on VOM405 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the cpld binary bitstream that is
used by esd's cpld command on PMC405 boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the cpld binary bitstream that is
used by esd's cpld command on CMS700 boards.
Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for an address parameter to esd's
cpld command. This is in preparation to remove compiled-in
binary cpld (xsvf) bitstreams.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
When CONFIG_I2C_MUX was defined the output of 'help i2c' was not
correct, eg:
=> help i2c
i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.
speed [speed] - show or set I2C bus speed
i2c dev [dev] - show or set current I2C bus
...
It has been changed to:
i2c speed [speed] - show or set I2C bus speed
i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes
i2c dev [dev] - show or set current I2C bus
...
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop,
and isdram are no longer available so all references to them have been
updated to the new form of "i2c <cmd>".
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The following individual I2C commands have been removed: imd, imm, inm,
imw, icrc32, iprobe, iloop, isdram.
The functionality of the individual commands is still available via
the 'i2c' command.
This change only has an impact on those boards which did not have
CONFIG_I2C_CMD_TREE defined.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
New default, weak i2c_get_bus_speed() and i2c_set_bus_speed() functions
replace a number of architecture-specific implementations.
Also, providing default functions will allow all boards to enable
CONFIG_I2C_CMD_TREE. This was previously not possible since the
tree-form of the i2c command provides the ability to display and modify
the i2c bus speed which requires i2c_[set|get]_bus_speed() to be
present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Add "_test" to cm5200's function test command names to prevent
overlap with common, global function names. Originally, the
"do_i2c" function test command interfered with
common/cmd_i2c.c's "do_i2c" when CONFIG_I2C_CMD_TREE was defined.
The functions were also made static as they are not globally accessed.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Add the i2c_init() function so that the tsi108_i2c.c driver fits
U-Boot's standard I2C API which is utilized by cmd_i2c.c
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Add standard CONFIG_SYS_I2C_SPEED define for the mpc7448hpc2 so that
it can use the common 'i2c speed' command. Note that the I2C controller
utilized by the mpc7448hpc2 has a fixed speed and cannot be changed
dynamically.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The following changes were made, primarily to bring the Marvell i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
offhand chance someone adds slave support in the future
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The following changes were made, primarily to bring the cpci750 i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
offhand chance someone adds slave support in the future
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Many boards/controllers/drivers don't support an I2C slave interface,
however CONFIG_SYS_I2C_SLAVE is used in common code so provide a
default
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The ddr code computes most things as 64-bit quantities and had some places
in the middle that it was using phy_addr_t and phys_size_t.
Instead we use unsigned long long through out and only at the last stage of
setting the LAWs and reporting the amount of memory to the board code do we
truncate down to what we can cover via phys_size_t.
This has the added benefit that the DDR controller itself is always setup
the same way regardless of how much memory we have. Its only the LAW
setup that limits what is visible to the system.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
- Increase the size of malloc to 512KB because MPC8569MDS needs more memory for
malloc to support up to eight Ethernet interfaces.
- Move Environment address out of uboot thus the saved environment variables
will not be erased after u-boot is re-programmed.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove "saveenv" from "update" definition: the environment is outside
the U-Boot image on TQM85xx and therefor not affected by updates.
Also "beautify" code a bit (vertical alignment).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Old TQM85xx boards had 'M' type Spansion Flashes from the S29GLxxxM
series while new boards have 'N' type Flashes from the S29GLxxxN
series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB.
We now change the configuration to the new flash types for all
boards; this also works on old boards - we just waste two flash
sectors for the environment which could be smaller there.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The SYS_CLK_IN of MPC8569MDS is 66.66MHz,
The DDR_CLK_IN is same with SYS_CLK_IN in 8569 processor.
so, change the SYS_CLK_IN from 66MHz to 66.66MHz.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The BCSR17[7] = 1 will unlock the write protect of FLASH.
The WP# pin only controls the write protect of top/bottom sector,
That is why we can save env, but we can't write the first sector
before the patch.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits.
This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum
(256 MB)
which made u-boot hang in board_init_f() when trying to create a new stack
in RAM.
I have an mpc8540 with one 1GB dimm.
Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Currently the clk_adj is 6 (3/4 cycle), The settings will cause
the DDR controller hang at the data init. Change the clk_adj
from 6 to 4 (1/2 cycle), make the memory system stable.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch corrects the missing PLLB initialization in usb_cpu_init()
for AT91SAM9261.
Because of the missing PLLB initialization, the USB support for all
AT91SAM9261 based boards will work only if the PLLB is configured by a
precedent bootloader.
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch fixes MDIO clock setup in case when OPB frequency is 100MHz.
Current code assumes that the value of sysinfo.freqOPB is 100000000
when OPB frequency is 100MHz. In reality it is 100000001. As a result
MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating
the standard. This in not a problem on boards equipped with Marvell PHYs
(e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz,
but can be a problem for other PHYs (e.g. Realtek ones).
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
When PCI device use system memory, some PCI host controller should be
set physical memory address.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
eth_halt() function in the smc911x drivers used to call the
smc911x_reset() function. eth_halt() used to be called after
tftp transfers. This used to put the ethernet chip in reset
while the linux boots up resulting in the ethernet driver
not coming up. NFS boot used to fail as a result.
This patch calls smc911x_shutdown() instead of smc911x_reset().
Some comments received has also been fixed.
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some boards do not have SROM support for the DM9000 network adapter.
Instead of listing these board names in the driver code, make this
option configurable from the board config file.
It also removes a build warning for the at91sam9261ek board:
'dm9000x.c:545: warning: 'read_srom_word' defined but not used'
And it repaires the trizepsiv board build which was broken around the
same routines
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer
impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0.
SICRH[TSIOB1] was erroneously being set high.
U-Boot always operated this PHY interface in GMII mode. It is assumed this
was missed in the clean up by the original board porters, and copied along
to the TQM and sbc boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Ira Snyder <iws@ovro.caltech.edu>
Reviewed-by: David Hawkins <dwh@ovro.caltech.edu>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Dave Liu <DaveLiu@freescale.com>
Several boards used different ways to specify the size of the
protected area when enabling flash write protection for the sectors
holding the environment variables: some used CONFIG_ENV_SIZE and
CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even
a mix of both for the "normal" and the "redundant" areas.
Normally, this makes no difference at all. However, things are
different when you have to deal with boards that can come with
different types of flash chips, which may have different sector
sizes.
Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the
biggest sector size, which may include several sectors on boards using
the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE
or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the
case that only the first of these sectors get protected, while the
following ones aren't.
This is no real problem, but it can be confusing for the user -
especially on boards that use CONFIG_ENV_SECT_SIZE to protect the
"normal" areas, while using CONFIG_ENV_SIZE_REDUND for the
"redundant" area.
To avoid such inconsistencies, I changed all sucn boards that I found
to consistently use CONFIG_ENV_SECT_SIZE for protection. This should
not cause any functional changes to the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Paul Ruhland
Cc: Pantelis Antoniou <panto@intracom.gr>
Cc: Stefan Roese <sr@denx.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Dave Ellis <DGE@sixnetio.com>
Acked-by: Stefan Roese <sr@denx.de>
Return value of mmc_send_if_cond() can be safely ignored (as it is
done in Linux). This makes older cards work with MXC MCI controller.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch now enabled this cfi-mtd wrapper to correctly detect and
erase the last sector in an NOR FLASH device.
Signed-off-by: Stefan Roese <sr@denx.de>
SCR & switch data are read from card as big-endian words and should be
converted to CPU byte order.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Cards which are not compatible with SD 2.0 standard, may return response
for CMD8 command, but it will be invalid in terms of SD 2.0. We should
accept this case as admissible, just like Linux does.
Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The mmc code defines the response as an array of chars. However, it
access the response bytes both as (i) an array of four uints (with
casts) and (ii) as individual chars. The former case is used more
often, including by the driver when it assigns the response.
The char-wise accesses are broken on little endian systems because they
assume that the bytes in the uints are in big endian byte order.
This patch fixes this by changing the response to be an array of four
uints and replacing the char-wise accesses with equivalent uint-wise
accesses.
Signed-off-by: Rabin Vincent <rabin@rab.in>
The generic MMC core uses direct long long divisions, which do not build
with ARM EABI toolchains. Use lldiv() instead, which works everywhere.
Signed-off-by: Rabin Vincent <rabin@rab.in>
find_mmc_device returns NULL if an invalid device number is specified.
Check for this to avoid dereferencing NULL pointers.
Signed-off-by: Rabin Vincent <rabin@rab.in>
A missing set of parenthesis caused the silicon revision to apply only to
the BF533 and not the BF531/BF532 variants.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Currently using JFFS2 with MTDPARTS enabled doesn't work. This is because
mtdparts_init() is available in both files, cmd_mtdparts.c and
cmd_jffs2.c. Please note that in the original cmd_jffs2.c file (before
the jffs2/mtdparts command/file split those 2 different versions
already existed. So this is nothing new. The main problem is that the
variables "current_dev" and "current_partnum" are declared in both
files now. This doesn't work.
This patch now changes the names of those variable to more specific
names: "current_mtd_dev" and "current_mtd_partnum". This is because
this patch also changes the declaration from static to global, so
that they can be used from both files.
Please note that my first tests were not successful. The MTD devices
selected via mtdparts are now accessed but I'm failing to see the
directory listed via the "ls" command. Nothing is displayed. Perhaps
I didn't generate the JFFS2 image correctly (I never used JFFS2 in
U-Boot before). Not sure. Perhaps somebody else could take a look at
this as well. I'll continue looking into this on Monday.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Renaud barbier <renaud.barbier@ge.com>
The pins for async memory where parallel flash lives are not enabled by
default, so make sure we mux them as needed.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch enables Smart Media (SMC) ECC byte ordering which is used
on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch now uses the correct ECC byte order (Smart Media - SMC)
to be used on the 4xx NAND FLASH driver. Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in
drivers/mtd/nand/nand_ecc.c for correct operation. This is done with
a seperate patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch moves the definition for the PPC4xx NAND FLASH controller
(NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the
upcoming fix for the ECC byte ordering of the NDFC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
cmd_ide.c:547: error: inline function 'ide_inb' cannot be declared weak
removing the inline attribute fixes it.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Return -ENODEV instead of 0 when trying to read from a non existing volume.
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The timer_init() function was not using the right csync instruction, nor
was it doing it right after disabling the core timer.
The timer_reset() function would reset the timestamp, but not the actual
timer, so there was a common edge case where get_timer() return a jump of
one timestamp (couple milliseconds) right after resetting. This caused
many functions to improperly timeout right away.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This fixes the following build warnings:
board.c: In function 'board_init_r':
board.c:328: warning: unused variable 'i'
board.c:326: warning: unused variable 'e'
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
All these functions are expected to be static inline-ed.
This patch also fixes the following build warnings on MIPS targets:
include/asm/bitops.h: In function 'ext2_find_next_zero_bit':
include/asm/bitops.h:862: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
include/asm/bitops.h:885: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
include/asm/bitops.h:887: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Implement ethernet halt() by putting MAC0 in reset.
If we do not do this, we will get memory corruption
when ethernet frames are received during early OS boot.
Signed-off-by: Thomas Lange <thomas@corelatus.se>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
U-Boot does not currently build for PXA platforms with USB support
enabled:
usb.c:46: error: 'UP2OCR' undeclared (first use in this function)
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Markus Klotzbuecher <mk@denx.de>
Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit 574b319512 introduced a subtle bug by mixing a list of tests
for "dev_desc->type" and "dev_desc->if_type" into one switch(), which
then mostly did not work because "dev_desc->type" cannot take any
"IF_*" type values. A later fix in commit 8ec6e332ea changed the
switch() into testing "dev_desc->if_type", but at this point the
initial test for unknown device types was completely lost, which
resulted in output like that for IDE ports without device attached:
Device 1: Model: Firm: Ser#:
Type: # 1F #
Capacity: not available
This patch re-introduces the missing test for unknown device types.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
This patch fixes a problem in the CPU frequency calculation. Without it
a 798MHz CPU is displayed as 368.503 MHz. And with it it's 798 MHz.
Signed-off-by: Stefan Roese <sr@denx.de>
The 'inline' is conflicting with the semantic of 'weak' attribute and with the
way the show_boot_progress() function is used.
Also gcc 4.4 is complaining about it:
main.c:51: error: inline function 'show_boot_progress' cannot be declared weak
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
cpu/mpc8260/cpu.c used to use do_fixup_by_path_u32() to update the
clock frequencies in the device tree, using a CPU path
"/cpus/OF_CPU", with OF_CPU beind defined in the board config file.
However, this does not work when one board config file (here:
MPC8260ADS.h) is intended to be used for several diffrent CPUs and
therefor contains a generic definition like "cpu@0", as the device
trees that will then be loaded will contain specific names like
"PowerPC,8272@0".
We switch to using do_fixup_by_prop_u32() instead, so we can search
for device_type="cpu", as it is done in other architectures, too.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Add CONFIG_SYS_MONITOR_LEN macro to apollon board config.
CONFIG_SYS_MONITOR_LEN defines the U-Boot image size.
and is used by OneNAND ipl when reading U-Boot image.
Signed-off-by: Rohit Hagargundgi <h.rohit at samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
This will make CONFIG_NET_MULTI the only net driver configuration and
we'll be able to remove this option.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The pin which was used in preliminary versions of the board for ide
reset is really connected to the rtc clock.
Signed-off-by: Detlev Zundel <dzu@denx.de>
This patch adds, under tools folder, a new command called imls. Its
goal is the same of UBoot's imls but it can be used as Linux shell
command. It reads from raw mtd partition and prints the list of the
stored images.
Signed-off-by: Marco Stornelli <marco.stornelli@gmail.com>
Fix some issues introduced from commit:
2f70c49e5b
suggested by Mike Frysinger.
- added some comment for the env_id variable in common_cmd_nvedit.c
- moved some variables in fn scope instead of file scope
- NetInitLoop now static void
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
I never acked a patch that adds me as phycore i.MX31 maintainer nor was
it me who pushed the patches, so remove myself from the maintainer list
so that other people do not longer wait for my ack.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
AFEB9260 uses PA10, PA11 for ETX2 and ETX3.
Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence,
not 0.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
We don't know what state the ethernet PHY is in when starting up, so make
sure we set it to a sane state. This fixes troubles seen when Linux boots
up, configures the PHY is a non-default state, and then the system reboots
into U-Boot which previously expected a reset state only.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF527-EZKIT settings for storing the environment in SPI flash wasn't
using the correct sector settings for the SPI flash part that is actually
on the board.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the clock functions were changed to use cached values (and thereby
avoiding expensive math functions), early serial debug broke because the
baud programming is called before external memory is available.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When dropping jump block support, the assumption was that all bootroms
supported entry point redirection via the EVT1 register. Unfortunately,
this turned out to be incorrect for the oldest Blackfin parts (BF533-0.2
and older and BF561). No one really noticed earlier because these parts
usually are booted by bypassing the bootrom entirely, and older BF533
parts are not supported at all (too many anomalies).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we recurse through serial_putc() rather than bang on the UART
transmit register directly to avoid hardware overflows when using \n.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
lowlevel_init.S is not used any more so remove it.
As consequence, we also don't have to generate u-boot.lds
but can use a static version as before.
This also fixes the out-of-tree build problem introduced
with commit f0a2c7b4 "at91: add support for the PM9263 board"
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The Beagle Rev C boards pull UART2 from an alternate set of balls.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Blocks compressed with zlib dont have the full gzip header.
Without this patch, block compressed with zlib cannot be readed!
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Separate gunzip in
gunzip: Find the end of the header and call zunzip.
zunzip: Inflate gunzip block without header.
UBI fs blocks can be compresed in lzo, zlib or no-compression. The
current implementation of u-boot supported all the compressions but
there was a bug in the implementation of the zlib blocks.
UBIFS's Zlib blocks do not have header but they were compressed using
gunzip, a function used to decompress gunzip files/sectors with a
header.
This patch adds a new function zunzip that uncompress a zlib block with
no header.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of
get_timer.
Changes since original version:
* Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to
improve timer resolution.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
The function display_board_info() displays incorrect
silicon revision - based on the return value from
function get_cpu_rev().
This patch fixes the problem.
Signed-off-by: Sanjeev Premi <premi@ti.com>
The board-types defined in struct omap3_sysinfo seem to be
unused. The function display_board_info() is passed
board type as an argument; which is ignored.
This patch removes all uses of board-type, related definitions
and functions.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Use the functions print_cpuinfo() and checkboard() to
display the cpu and board specific information.
These functions reuse content from the existing function
display_board_info() - which has been removed.
Also, updated the existig OMAP3 configurations to
define:
- CONFIG_DISPLAY_CPUINFO
- CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Sanjeev Premi <premi@ti.com>
With this patch non-uniform NOR FLASH chips (chips with multiple erase
regions) can be exported via the cfi-mtd layer and therefor used by UBI.
We select the largest sector size as erasesize. The cfi driver will make
sure that the smaller sectors are handled correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix bug in drawing long version/info strings:
U-Boot version string like
"U-Boot 2009.03-05647-g7c51e06 (Apr 23 2009 - 12:40:00) MPC83XX"
is long and doesn't wrap around correctly while drawing
beside the logo. Such long strings partially overwrite
the logo. This patch is an attempt to fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Get rid of these warnings:
cmd_ext2.c:247: warning: format '%ld' expects type 'long int', but argument 2 has type 'int'
cmd_ext2.c:248: warning: format '%lX' expects type 'long unsigned int', but argument 3 has type 'int'
Signed-off-by: Wolfgang Denk <wd@denx.de>
because legacy NAND support is deprecated converting to current
NAND interface. !This just compile, because I have no more the
hardware to test it.
Signed-off-by: Heiko Schocher <hs@denx.de>
If the memory used to copy the link_make is "dirty" the string wont
be ended with NULL, throwing out multiple memory bugs.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>
Add basic error handling to fread() function calls. This prevents
compililation warnings such as:
bmp_logo.c: In function ‘main’:
bmp_logo.c:71: warning: ignoring return value of ‘fread’, declared with
attribute warn_unused_result
...
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This prevents the compilation warning:
ncb.c: In function 'main':
ncb.c:32: warning: ignoring return value of ‘write’, declared with
attribute warn_unused_result
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
With this patch the NAND and OneNAND devices are registered in the MTD
subsystem and can then be referenced by the mtdcore code (e.g.
get_mtd_device_nm()). This is needed for the new "ubi part" command
syntax without the flash type parameter (nor|nand|onenand).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes this compilation warning when CONFIG_MTD_PARTITIONS is
defined:
nand_base.c: In function 'nand_release':
nand_base.c:2922: warning: implicit declaration of function 'del_mtd_partitions'
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the now unnecessary flash type parameter from the
"ubi part" command. Currently the user has to define the type of flash
he will be using UBI on. Example:
=> ubi part nor partition1
With this patch this type parameter is not needed anymore. The user can
now select the partition directly without the flash type paramter.
Example:
=> ubi part partition1
This breaks backward compatibility right now because of the change in the
command syntax. But UBI support is still quite fresh and the advantage of
this new command is syntax big enough for this change. Additionally the
code is much cleaner now.
Signed-off-by: Stefan Roese <sr@denx.de>
CC: Kyungmin Park <kyungmin.park@samsung.com>
As the common code also handles baudrate switching, which the board
specific vct.c driver did not support, this is one of the rare
occassions where deleting code actually adds a feature :)
Signed-off-by: Detlev Zundel <dzu@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
On Thu, Mar 19, 2009 at 01:30:36PM +0100, Stefan Roese wrote:
> Currently the mtdparts commands are included in the jffs2 command support.
> This doesn't make sense anymore since other commands (e.g. UBI) use this
> infrastructure as well now. This patch separates the mtdparts commands from
> the jffs2 commands making it possible to only select mtdparts when no JFFS2
> support is needed.
One more leftover... Let nboot command know about partitions even if JFFS2
support is not enabled.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Stefan Roese <sr@denx.de>
The output_data_short() and input_data_short() functions for the
AmigaOneG3SE are unused and result in compiler warnings.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
__asm__ follows gcc's documented syntax and is generally more common
than __asm. This change is only asthetic and should not affect
functionality.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
__attribute__ follows gcc's documented syntax and is generally more
common than __attribute. This change is only asthetic and should not
affect functionality.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Make the headers in the "mtdparts" command output line up
with their columns ... strike the extra TAB character.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I missed removing this file while implementing the UBIFS support. It's
not referenced at all, so let's remove it. Thanks to Artem Bityutskiy
for spotting.
Signed-off-by: Stefan Roese <sr@denx.de>
UBIFS did not recovery in a situation in which it could
have. The relevant function assumed there could not be
more nodes in an eraseblock after a corrupted node, but
in fact the last (NAND) page written might contain anything.
The correct approach is to check for empty space (0xFF bytes)
from then on.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The filelen should be signed type, not unsigned type.
otherwise, The condition as below never take.
if (filelen < 0)
Signed-off-by: Gao Guanhua <B22826@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Make the U-Boot dm9000 driver read addresses from EEPROM just
like Linux does ... read six bytes, instead of reading twelve
bytes and then discarding every other one.
Using the right Ethernet address is a big win.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
For a long time, the print_cpuinfo() declaration in lib_arm/board.c
had been marked as "test-only", which is plain wrong considering
current usage. Delete this misleading comment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Minor cleanup to clock-related defines for DaVinci DM6446 boards:
- CONFIG_SYS_CLK_FREQ is unused; remove it.
- CONFIG_SYS_NS16550_CLK must be the same as CONFIG_SYS_HZ_CLOCK
On DM6446 both of those peripheral clocks actually come from the
same source, the primary oscillator. Having them use the same
symbol avoids bugs in the clone'n'modify development cycle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
if using CONFIG_BOOTCOUNT_LIMIT feature on a MPC8360 CPU
in the muram-data node, the reg entry needs to be updated.
This is done in fdt_fixup_muram(), but we should use
the compatible "fsl,qe-muram-data" for searching the
node instead of searching the muram-data node with
an absolute path.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The size of U-Boot binary for MPC8360ERDK increased
(> 2 flash sectors now), so 'saveenv' will partially
overwrite U-Boot in flash and will brick the board.
This patch moves environment offset to fourth flash
sector and also fixes CONFIG_SYS_MONITOR_LEN.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The patch fixes the bug of partial initialization of global network
parameters.
Upon u-boot's start up the first ping command causes a failure of the
consequent TFTP command. It happens in the recently added mechanism of
the NetLoop initialization where initialization of global network
parameters is separated in the NetInitLoop routine which is called per
env_id change. Thus, ping request will initialize the network parameters
necessary for ping operation only, afterwards the env_changed_id will be
set to the env_id that will prevent all following initialization requests
from other protocols.
The problem is that the initialized by ping subset of network parameters
is not sufficient for other protocols and particularly for TFTP which
requires the NetServerIp also.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Change netdev.h to use CONFIG_ULI526X instead of CONFIG_ULI526. CONFIG_ULI526X
is used everywhere else, so that's the correct macro name. Without this fix,
Ethernet will not work on the Freescale MPC8610 HPCD.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Update the DaVinci DM6446 boards to use the new convention
for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed
from the original 4 bytes, but these chips are little-endian.
(Resolves a regression added recently by the include/ns16550.h
patch to "Unify structure declaration for registers". The code
previously worked just fine because the registers were accessed
as host-endian words, not as bytes.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The first if statement checks for NULL ptrs, so there is no need to check
it again in later else cases (such as .oob).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Scott Wood <scottwood@freescale.com>
Fix dependency goofage: it should certainly be possible to have the
partition support without bringing in UBI commands.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Stefan Roese <sr@denx.de>
Don't run the memory POST on the NAND-booting version. It will
overwrite part of the U-Boot image which is already loaded from NAND
to SDRAM. We were just lucky that it booted at all with this SDRAM
test enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Don't run the memory POST on the NAND-booting version. It will
overwrite part of the U-Boot image which is already loaded from NAND
to SDRAM. We were just lucky that it booted at all with this SDRAM
test enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
The current define of get_bus_freq() in the CONFIG_NAND_SPL #ifdef is not
used at all. This patch changes it's define to the currently used value of
133333333 and removes the unnecessary code.
Signed-off-by: Stefan Roese <sr@denx.de>
This additional text in the bootup log helps to see if the board is
configured for NAND-booting. Especially helpful for boards that can
boot from NOR and NAND (e.g. most of the AMCC eval boards).
Signed-off-by: Stefan Roese <sr@denx.de>
Currently the NOR & NAND support in Linux only works for the "standard"
Sequoia, the version booting for NOR flash. The NAND-booting version
has the chip-selects swapped. Here the chip-select mappings:
"Standard" NOR-booting version:
CS0 NOR
CS3 NAND
NAND-booting version:
CS0 NAND
CS3 NOR
With this path the dtb gets fixed-up, so that the correct chip-select
numbers are patched in the dtb enabling correct NOR & NAND support
in Linux on the NAND-booting Sequoia version.
Signed-off-by: Stefan Roese <sr@denx.de>
There is no code change here, just new comments, but this keeps me from
having to do another audit from scratch in the future.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
DESCRIPTION:
The column address width settings for banks 2 and 3 are misconnected in
the SDRAM controller. Accesses to bank 2 will result in an error if the
Column Address Width for bank 3 (EB3CAW ) is not set to be the same as
that of bank 2.
WORKAROUND:
If using bank 2, make sure that banks 2 and 3 have the same column address
width settings in the EBIU_SDBCTL register. This must be the case
regardless of whether or not bank 3 is enabled.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
DESCRIPTION:
If the DF bit is set prior to a hardware reset, the PLL will continue to
divide CLKIN by 2 after the hardware reset, but the DF bit itself will be
cleared in the PLL_CTL register.
WORKAROUND:
Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by
2 after reset.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
DESCRIPTION:
The Boot ROM is executed at power up/reset and changes the value of the
SICA_IWR registers from their default reset value of 0xFFFF, but does not
restore them.
WORKAROUND:
User code should not rely on the default value of these registers. Set
the desired values explicitly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We need to make sure the data written to the nand flash controller makes
it there before we start polling its status register. Otherwise, we may
get stale data and return before the controller is actually ready.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
This Patch adds Support for PXA27X UDC.
(Rebased to drivers/usb reorganisation)
Signed-off-by: Vivek Kutal <vivek.kutal@azingo.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
move to linux usb driver organisation
as following
drivers/usb/gadget
drivers/usb/host
drivers/usb/musb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Blackfin SPI driver was not driving the SPI chip-select high before
putting the chip-select signals into tri-state mode. This is probably
something that slipped by unnoticed in most designs. If the signals are
put directly into a tri-state mode, then the board is relying on the
pull-up resistors to pull up the chip-select before the next transaction.
Most of the time this is fine, except when you have two transactions that
follow each other very closely, such as the flash erase and read status
register commands. In this case I was seeing a 500ns separation between
the transactions. In my setup, with a 10kOhm pull-up, it would meet
timing spec about half the time and resulted in intermittent errors. (A
stronger pull up would fix this, but our design is targeted for low power
consumption and a 3.3kOhm @ 3.3v is 3.3mW of needless power consumption.)
I modified the spi_cs_deactivate() function in bfin_spi.c to drive the
chip-selects high before putting them into tri-state. For me, this
resulted in a rise time of 5ns instead of the previous rise time of about
1us, and fully satisfied the timing spec of the chip.
Signed-off-by: Todor I Mollov <tmollov@ucsd.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A new Overo expansion board uses GPIO 14, 21, 22 and 23 for LED's and
switches. This patch changes the pinmux configuration for those pins.
They were previously set up for unused MMC3_DAT4-7.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
imx31_phycore_eet is a variant of the imx31_phycore board with a few
extensions, which justifies a separate entry in the MAINTAINERS list,
whereas normally all entries sharing a single configuration file and a
board/ directory have only one entry in MAINTAINERS.
Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
The previous code waited 1000us before checking i2c
status. Measurement shows i2c is usually ready in
under 50us. Change the polling interval to 15us,
loop 6,667 times to keep the polling timeout constant
at 100ms.
Fixes this compile error:
board.c: In function 'do_switch_ecc':
board.c:339: error: 'cmd_tbl_t' has no member named 'help'
make[1]: *** [board.o] Error 1
make[1]: Leaving directory `/db/psp_git/users/a0756819/u-boot/cpu/arm_cortexa8/omap3'
make: *** [cpu/arm_cortexa8/omap3/libomap3.a] Error 2
This is due to the fact that current command uses long
help for the usage print even if the CONFIG_SYS_LONGHELP
is not enabled. (Thanks Jean-Christophe for explanation).
Signed-off-by: Sanjeev Premi <premi@ti.com>
Move machine specific code to smdk6400.
Some board use OneNAND instead of NAND.
Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w.
So it's better to use macro instead of hard-coded value.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
In addition to the changes for CONFIG_ENV_IS_IN_FLASH as done in
commit afcbce07, we also need to do the same for
CONFIG_ENV_IS_IN_EEPROM and CONFIG_ENV_IS_IN_NVRAM.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Without this, u-boot can crash or print garbage if the original link
address no longer points to a valid string.
Signed-off-by: Scott Wood <scottwood@freescale.com>
On platforms with multiple NOR chips, currently only the first one
can be selected using the "ubi part" command. This patch fixes this
problem by using different names for the NOR "mtd devices".
It also changes the name of the NOR MTD device from "cfi-mtd" to
"norX" (X indexing the device numer) to better match the mtdparts
defaults.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Now UBIFS is supported by u-boot. If we ever decide to change the
media format, then people will have to upgrade their u-boots to
mount new format images. However, very often it is possible to
preserve R/O forward-compatibility, even though the write
forward-compatibility is not preserved.
This patch introduces a new super-block field which stores the
R/O compatibility version.
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Acked-by: Adrian Hunter <Adrian.Hunter@nokia.com>
Signed-off-by: Stefan Roese <sr@denx.de>
On Thu, Mar 19, 2009 at 01:30:36PM +0100, Stefan Roese wrote:
> Currently the mtdparts commands are included in the jffs2 command support.
> This doesn't make sense anymore since other commands (e.g. UBI) use this
> infrastructure as well now. This patch separates the mtdparts commands from
> the jffs2 commands making it possible to only select mtdparts when no JFFS2
> support is needed.
... and to make it useful for NAND chips as well, we should also remove now
unrelated CONFIG_JFFS2_NAND. Note that struct part_info etc is in
jffs2/load_kernel.h which is a bit misleading filename for that purpose,
but that can be fixed later (tm).
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Rather than sticking Blackfin-specific stuff into the eeprom example, use
an indirect macro so that any board can override it with their own magic
sauce in their board config file.
Also fix some spurious semi-colons in defines while I'm at it ...
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Update the rm9200 reset sequence to try executing a board-specific reset
function and move specific board reset to board.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
introduce serial_exit for this purpose. Use it only when the rm9200
serial driver is active
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The AT91RM9200-EK Evaluation Board supports the AT91RM9200
ARM9-based 32-bit RISC microcontroller and enables real-time code development
and evaluation.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507
with
- NOR (cfi driver)
- DataFlash
- USB OHCI
- Net
- I2C (hard)
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
In set_ddr_laws() when we determined how much of the size requested
to be mapped was covered by the the first LAW we needed to recalculate
the size based on what was actually mapped.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Since commit a706bfc7 common/env_embedded.o and tools/envcrc were
only built when CONFIG_ENV_IS_EMBEDDED was set, but this breaks
building for many boards.
We always have to build these files when CONFIG_ENV_IS_IN_FLASH is
set.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some systems have zlib.h installed in /usr/include/. This isn't the
desired file for u-boot code - we want the one in include/zlib.h.
This rename will avoid the conflict.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Instead of special casing the different access patterns, use common
code with light macros sprinkled in to accomodate for the different
layouts of the register structure.
Note that this also changes the types of the registers for the
"positively packed (>1)" cases. As the registers truly are unsigned
chars, this is surely the Right Thing, but it is a semantic change.
Note that for this case depending on the endianness on the bus, we may
see a change of behaviour.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Add support for compiling the host tools in the tools directory using
the MinGW toolchain. This produces executables which can be used on
standard Windows computers without requiring cygwin.
One must specify the MinGW compiler and strip utilities as if they
were the host toolchain in order to build win32 executables, eg:
make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Files in the SRCS variable have their dependencies automatically
generated so remove duplicate explicit dependencies
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
crc32.c uses the zlib.h header in include/u-boot/zlib.h. The symlink
was previously necessary to give U-Boot's version of zlib.h precedence
over the host computer's version of zlib.h.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Split variable declarations into multiple lines and use the standard
VAR-y convention. Also move object and binary variable declarations to
after config.mk has been included to allow for these lists to utilize
the CONFIG_XXX variables.
These changes lay the groundwork for conditional compilation of files
in the tools directory.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Replace random()/srandom() use with rand()/srand() to support
compilation with the mingw toolchain. The rand()/srand() functions are
generally more common and are functionally equivalent to the original
random()/srandom() calls.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The original code provided an incomplete set of typedefs for WIN32
compiles and replicated the standard typedefs that are already
provided by stdint.h
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The original code did not generate autoconf.mk until after some targets
dependencies had already been calculated, for example the directories in
the SUBDIRS variable
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Mflash is fusion memory device mainly targeted consumer eletronic and
mobile phone.
Internally, it have nand flash and other hardware logics and supports
some different operation (ATA, IO, XIP) modes.
IO mode is custom mode for the host that doesn't have IDE interface.
(Many mobile targeted SoC doesn't have IDE bus)
This driver support mflash IO mode.
Followings are brief descriptions about IO mode.
1. IO mode based on ATA protocol and uses some custom command. (read
confirm, write confirm)
2. IO mode uses SRAM bus interface.
Signed-off-by: unsik Kim <donari75@gmail.com>
Fix problems introduced in commit
7b5611cdd1 [inka4x0: Add hardware
diagnosis functions for inka4x0] which redefined MSR_RI which is
already used on PowerPC systems.
Also eliminate redundant definitions in ps2mult.h. More cleanup will
be needed for other redundant occurrences though.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Legacy NAND is marked for feature removal after April 2009 (i.e. this
upcoming release). There are still several boards that reference it
(though many do so only for disk-on-chip support which has been silently
disabled for a while now). These boards will now fail to build
with #error, though the code is still there if the user removes #error.
The plan is to remove the code outright in the next release, along with
any board code that refers to it (such as board/esd/common/auto_update.c).
Also, remove the legacy NAND API description from README.nand.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Currently OneNAND initial program loader (ipl) reads only block 0 ie 128KB.
However, u-boot image for apollon board is 195KB making the board
unbootable with OneNAND.
Fix ipl to read CONFIG_SYS_MONITOR_LEN.
CONFIG_SYS_MONITOR_LEN macro holds the U-Boot image size.
Signed-off-by: Rohit Hagargundgi <h.rohit@samsung.com>
Signed-off-by: Gangheyamoorthy <moorthy.apg@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
According to the doc/feature-removal-schedule.txt, the "autoscr"
command will be replaced by the "source" command in approximately 6
months from now.
This patch prepares this change and starts a 6 month transition
period as follows:
- The new "source" command has been added, which implements exactly
the same functionlaity as the old "autoscr" command before
- The old "autoscr" command name is kept as an alias for compatibility
- Command sequences, script files atc. have been adapted to use the
new "source" command
- Related environment variables ("autoscript", "autoscript_uname")
have *not* been adapted yet; these will be renamed resp. removed in
a separate patch when the support for the "autoscr" command get's
finally dropped.
Signed-off-by: Wolfgang Denk <wd@denx.de>
I can't find anywhere in the datasheet that says the status register needs
3 dummy bytes sent to it before being able to read back the first real
result. Tests on a Blackfin board show that after writing the opcode, the
status register starts coming back immediately. So only write out the
read status register opcode before polling the result.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Jason McMullan <mcmullan@netapp.com>
CC: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Since timeouts are only hit when there is a problem in the system, we
don't want to prematurely timeout on a functioning setup. Thus having
low timeouts (in milliseconds) doesn't gain us anything in the production
case, but rather increases likely hood of causing problems where none
otherwise exist.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Some SPI flash drivers like to have extended id information available
(like the spansion flash), so rather than making it re-issue the ID cmd
to get at the last 2 bytes, have the common code read 5 bytes rather than
just 3. This also matches the Linux behavior where it always reads 5 id
bytes from all flashes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
CC: Mingkai Hu <Mingkai.hu@freescale.com>
Add MTD SPI Flash support for S25FL008A, S25FL016A,
S25FL032A, S25FL064A, S25FL128P.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the Blackfin timer code requires HZ to be 1000, barf on any board
that tries to use a different value.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin SDH controller is still using the legacy framework, so update
the driver to use the renamed functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When testing a u-boot binary that hasn't been booted from the bootrom, we
have to make sure the bootstruct structure has sane storage space. If we
don't, the initcode will crash when it tries to dereference an invalid
pointer.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
.../dtc/libfdt/fdt_sw.c: In function 'fdt_end_node':
.../dtc/libfdt/fdt_sw.c:81: error: assuming signed overflow does not occur when assuming that (X + c) < X is always false
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Currently, callers of fdt_next_tag() must usually follow the call with
some sort of call to fdt_offset_ptr() to verify that the blob isn't
truncated in the middle of the tag data they're going to process.
This is a bit silly, since fdt_next_tag() generally has to call
fdt_offset_ptr() on at least some of the data following the tag for
its own operation.
This patch alters fdt_next_tag() to always use fdt_offset_ptr() to
verify the data between its starting offset and the offset it returns
in nextoffset. This simplifies fdt_get_property() which no longer has
to verify itself that the property data is all present.
At the same time, I neaten and clarify the error handling for
fdt_next_tag(). Previously, fdt_next_tag() could return -1 instead of
a tag value in some circumstances - which almost none of the callers
checked for. Also, fdt_next_tag() could return FDT_END either because
it encountered an FDT_END tag, or because it reached the end of the
structure block - no way was provided to tell between these cases.
With this patch, fdt_next_tag() always returns FDT_END with a negative
value in nextoffset for an error. This means the several places which
loop looking for FDT_END will still work correctly - they only need to
check for errors at the end. The errors which fdt_next_tag() can
report are:
- -FDT_ERR_TRUNCATED if it reached the end of the structure
block instead of finding a tag.
- -FDT_BADSTRUCTURE if a bad tag was encountered, or if the
tag data couldn't be verified with fdt_offset_ptr().
This patch also updates the callers of fdt_next_tag(), where
appropriate, to make use of the new error reporting.
Finally, the prototype for the long gone _fdt_next_tag() is removed
from libfdt_internal.h.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Currently fdt_next_node() will find the next node in the blob
regardless of whether it is above, below or at the same level in the
tree as the starting node - the depth parameter is updated to indicate
which is the case. When a depth parameter is supplied, this patch
makes it instead terminate immediately when it finds the END_NODE tag
for a node at depth 0. In this case it returns the offset immediately
past the END_NODE tag.
This has a couple of advantages. First, this slightly simplifies
fdt_subnode_offset(), which no longer needs to explicitly check that
fdt_next_node()'s iteration hasn't left the starting node. Second,
this allows fdt_next_node() to be used to implement
_fdt_node_end_offset() considerably simplifying the latter function.
The other users of fdt_next_node() either don't need to iterate out of
the starting node, or don't pass a depth parameter at all. Any
callers that really need to iterate out of the starting node, but keep
tracking depth can do so by biasing the initial depth value.
This is a semantic change, but I think it's very unlikely to break any
existing library users.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
The mpc8313erdb board currently sets DBAT6 to cover all of the final 256MiB of
address space; however, not all of this space is covered by a device. In
particular, flash sits at 0xfe000000-0xfe7fffff, and nothing is mapped
at the far end of the address space.
In zlib, there is a loop that references p[-1] if p is non-NULL. Under
some circumstances, this leads to the CPU speculatively loading from
0xfffffff8 if p is NULL. This leads to a machine check.
Signed-off-by: Scott Wood <scottwood@freescale.com>
continuation to the remaining mpc83xx boards that suffer from the same problem.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
commit 04e11cf3 "rtc: add support for 4543 RTC (manufactured by e.g.
EPSON)" introduces the following build error on boards configuring e.g,
the ds1374 rtc:
Configuring for MPC837XEMDS board...
ds1374.c:103: error: static declaration of 'rtc_read' follows non-static declaration
/home/r1aaha/git/u-boot/include/rtc.h:64: error: previous declaration of 'rtc_read' was here
ds1374.c:104: error: conflicting types for 'rtc_write'
/home/r1aaha/git/u-boot/include/rtc.h:65: error: previous declaration of 'rtc_write' was here
this reverts the erroneous chunk.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
CC: Detlev Zundel <dzu@denx.de>
CC: Andreas Pfefferle <ap@denx.de>
We had a bug on 86xx in which the boot page used to bring up secondary
cores was being overwritten and used for the malloc region in u-boot.
We need to reserve the region of memory that the boot page is going to
be put at so nothing uses it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
Match determine_mp_bootpg() that was added for 86xx. We need this to
address a bug introduced in v2009.03 with 86xx MP booting. We have to
make sure to reserve the region of memory used for the MP bootpg() so
other u-boot code doesn't use it.
Also added a comment about how cpu_reset() is dealing w/an errata on
early 85xx MP HW.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Use CONFIG_MP instead of CONFIG_NUM_CPUS to match 85xx
* Introduce determine_mp_bootpg() helper. We'll need this to address a
bug introduced in v2009.03 with 86xx MP booting. We have to make sure
to reserve the region of memory used for the MP bootpg() so other
u-boot code doesn't use it.
* Added dummy versions of cpu_reset(), cpu_status() & cpu_release() to
allow cmd_mp.c to build and work. In the future we should look at
implementing all these functions. This could be common w/85xx if we
use spin tables on 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We're missing the board_lmb_reserve definitions that allow
cpu_mp_lmb_reserve to be called; this means that Linux
is free to reallocate reserved pages. Linux currently boots
because we're getting lucky - the page we've reserved is
high enough in memory that it isn't allocated by Linux
while we still need it to be in existence.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix NAND support broken during new NAND code merge. Move those few lines of
code to board/netstar/netstar.c
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
This patch fix the compiler/linker errors
common/cmd_i2c.c:1252: undefined reference to `i2c_get_bus_speed'
common/cmd_i2c.c:1256: undefined reference to `i2c_set_bus_speed'
if board use CONFIG_I2C_CMD_TREE and CONFIG_I2C_MULTI_BUS is not
uesd/undef (wrong define order)
and
removes additional empty lines
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
This patch adds MPC8569MDS board support. The UART, QE UEC1 and UEC2, BRD
EEPROM on I2C2 bus, PCI express and DDR3 SPD are supported in this patch.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For the silicon which doesn't have ROM support in QE, it always needs to load
a pre-built ucode binary to IRAM so that QE can work.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
- support mirrored DIMMs, not support register DIMMs
- test passed on P2020DS board with MT9JSF12872AY-1G1D1
- test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
1. wr_lat
UM said the total write latency for DDR2 is equal to
WR_LAT + ADD_LAT, the write latency is CL + ADD_LAT - 1.
so, the WR_LAT = CL - 1;
2. rd_to_pre
we missed to add the ADD_LAT for DDR2 case.
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Dave Liu <daveliu@freescale.com>
The masks for various bit defines of LSDMR are common and thus we can
define them in one place rather than replicating them in each config.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds the board specific communication routines needed by
the external 4543 RTC.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Andreas Pfefferle <ap@denx.de>
This patch adds advanced diagnosis functions for the inka4x0 board.
Signed-off-by: Andreas Pfefferle <ap@denx.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Fix these:
cmd_vcma9.c:82: warning: implicit declaration of function 'eth_getenv_enetaddr'
cmd_vcma9.c:89: error: 'enetaddr' undeclared (first use in this function)
Signed-off-by: Wolfgang Denk <wd@denx.de>
cs8900.c: In function 'eth_init':
cs8900.c:164: warning: passing argument 2 of 'eth_getenv_enetaddr' from incompatible pointer type
cs8900.c:165: error: invalid operands to binary <<
cs8900.c:166: error: invalid operands to binary <<
cs8900.c:167: error: invalid operands to binary <<
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Other commands implementing subcommands can reuse this code nicely.
Signed-off-by: Detlev Zundel <dzu@denx.de>
Signed-off-by: Andreas Pfefferle <ap@denx.de>
Current u-boot top of tree builds with warnings/errors for
the following boards:
ads5121 cpci5200 mecp5200 v38b IAD210 MBX MBX860T NX823
RPXClassic debris PN62
following patch solves this.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
This patch fixes a bug in the Sequoia TLB init code to reconfigure
the correct TLB (boot space) after running from RAM. This bug was
introduced with patch 4d332dbeb0
[ppc4xx: Make Sequoia boot vxWorks] which changed the order of the
TLB in the Sequoia init.S file.
Signed-off-by: Stefan Roese <sr@denx.de>
Enabling the instruction cache significantly accelerates U-Boot
operations like CRC checking, image uncompression, etc.
Kudos to Andrea Scian for pointing out.
Signed-off-by: Wolfgang Denk <wd@denx.de>
On boards which have the environment in eeprom, i2c_init() is called
before the console and RAM are initialized.
Suppress printfs until the console is initialized.
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
http://www.denx.de/wiki/DULG/UBootCmdGroupFlash#UBootCmdFlMtdparts
provides a flexible way to create and maintain u-boot mtd
partitions. This allows commands such as "nand erase fs"
to work and the user no longer needs to decode the absolute
nand offsets. This patch enables this function for beagleboard
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Since all of the bf537-stamp and bf537-ezkit boards out there can handle it,
increase the speed of SCLK to 125MHz rather than 100MHz.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the common net eth functions to setup the env/global data with the MAC
address, and properly handle the case where CONFIG_SYS_NO_FLASH is defined.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the hardware can handle it, bump the default clocks from 80mhz SCLK
and 398mhz CCLK to 100mhz SCLK and 498mhz CCLK.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Again, don't clobber pins that we aren't actually using, and use the common
LED framework rather than our own hob-job-but-not-really-working.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than duplicate the same ADI settings in every ADI board, create a
common ADI config header and have all ADI boards start using that. This
will also make merging the ~10 boards I have to forward port a lot easier.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
OneNAND IPL has common codes for RAM init, load data, and jump to 2nd
bootloader, but it's common code used about 300~400 bytes. So board
specific codes, such as lowlevel_init, can't has enough code. It make
a difficult to implement OneNAND IPL.
his patch make this common code as small as possible. and give
lowlevel_init can have more codes.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patches configures the NAND UPM-FSL driver with multi-chip
support for the Micron MT29F8G08FAB NAND flash memory on the
TQM8548 modules.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The NAND flash on the TQM8548_BE modules requires a short delay after
running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE
requires a further short delay after writing out a buffer. Normally the
R/B pin should be checked, but it's not connected on the TQM8548_BE.
The corresponding Linux FSL UPM driver uses similar delay points at the
same locations. To manage these extra delays in a more general way, I
introduced the "wait_flags" field allowing the board-specific driver to
specify various types of extra delay.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be set via UPM machine address
register (mar). This patch adds such support to the FSL-UPM driver.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now
called with the argument "chip_nr" to allow testing the proper chip
select line. The NAND support of the MPC8360ERDK is updated as well.
No other boards are currently using the FSL UPM driver.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch adds support for NAND_MAX_CHIPS to the MTD NAND layer.
Multi-chips devices are displayed as shown:
Device 0: 2x NAND 512MiB 3,3V 8-bit, sector size 128 KiB
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
When initializing the core clocks, stick external memory into self-refresh.
This gains us a few cool things:
- support suspend-to-RAM with Linux
- reprogram clocks automatically when doing "go" on u-boot.bin in RAM
- make sure settings are stable before flashing new version
- finally fully unify initialize startup code path between LDR/non-LDR
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some newer Blackfins (like the BF51x) do not have an on-chip voltage
regulator, so do not attempt to program the memory as if it does.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If the board config does not specify an explicit EBIU_SDBCTL value, set it
up with sane values based on other configuration options.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Workaround anomaly 432:
The bfrom_SysControl() firmware function does not clear the SIC_IWR1
register before executing the PLL programming sequence. Therefore, any
interrupt enabled in the SIC_IWR1 register prior to the call to
bfrom_SysControl() can prematurely terminate the idle sequence required
for the PLL to relock properly. SIC_IWR0 is properly handled.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Boot ROM uses EVT1 as the entry point so set that rather than having
to use a tiny jump block in the default EVT1 location.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SPORT_TX registers cannot be read (the hardware will trigger an error),
so drop the read helper macros.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If there is some problem in the flash init/checking code, it's nicer to see
the message "Flash:" before crashing. This way the source of the problem
is a bit more straightforward.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the PORTJ on the BF537 is peripheral-only (no GPIO functionality),
then there is no PORTJ_FER register for us to worry about.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The jtag tstc operation was checking the hardware to see if data is
available from it (which is fine for the jtag getc operation), but the
higher layers need to know whether any data is available. Since we have
to read up to 4 bytes at a time from the hardware, the higher layers need
to know they can consume the cached bytes as well.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Unify all of the net-related init code in the common Blackfin board init
code to clean up the ifdef mess a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
On the pcm030 the environment is located in the onboard EEPROM. But we want
to handle flash sector protection in a safe manner. So we must read the
unlock environment variable from EEPROM instead from flash.
This patch is required as long the evironment is saved into the EEPROM.
Stefan: Additional change as suggested by Wolfgang, use bigger char array
(instead of 4).
Signed-off-by: Eric Schumann <E.Schumann@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
On systems where U-Boot is linked to another address than it really lays
(e.g. backup image), calls via function pointers must be fixed with a
'+= gd->reloc_off'.
This was not done for none_compr in ubifs_compressors_init() what leads
to system crash on ubifsmount command.
Signed-off-by: Michael Lawnick <ml.lawnick@gmx.de>
Acked-by: Stefan Roese <sr@denx.de>
This patchset adds these UBIFS related commands:
- ubifsmount
Mount an UBIFS volume
- ubifsls
List a directory of the mounted UBIFS volume
- ubifsload
Load a file from the mounted UBIFS volume to memory
Signed-off-by: Stefan Roese <sr@denx.de>
The U-Boot UBIFS implementation is largely a direct copy from the current
Linux version (2.6.29-rc6). As already done in the UBI version we have an
"abstraction layer" to redefine or remove some OS calls (e.g. mutex_lock()
...). This makes it possible to use the original Linux code with very
little changes. And by this we can better update to later Linux versions.
I removed some of the Linux features that are not used in the U-Boot
version (e.g. garbage-collection, write support).
Signed-off-by: Stefan Roese <sr@denx.de>
CC: Artem Bityutskiy <dedekind@infradead.org>
CC: Adrian Hunter <ext-Adrian.Hunter@nokia.com>
This patch adds LZO decompression support to U-Boot. It is needed for
the upcoming UBIFS support, since UBIFS uses LZO as default compressor/
decompressor. Since we only support read-only in UBIFS, only the
decompressor is needed.
All this is copied with minor changes from the current Linux kernel
version (2.6.28-rc8).
This patch only implements this LZO decompressor support for PPC.
Other platforms using UBIFS will have to add the required
"include/asm/unaligned.h" as well. It should be fairly easy to copy this
from the Linux source tree as I have done it for PPC in this patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Currently the mtdparts commands are included in the jffs2 command support.
This doesn't make sense anymore since other commands (e.g. UBI) use this
infrastructure as well now. This patch separates the mtdparts commands from
the jffs2 commands making it possible to only select mtdparts when no JFFS2
support is needed.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Remove this code. It's not needed. The 4xx EMAC driver stores the MAC
addresses into the SoC registers instead.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32
macros. Also volatile pointer references are replaced by the
new accessors.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32
macros. Also volatile pointer references are replaced by the
new accessors.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Fix building DASA_SIM boards by increasing U-Boot's size in flash.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Moved sub-features of the SC520 code which is currently selectively compiled
using #ifdef out of sc520.c into individual files selectively compiled via
the makefile
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
Rewrite interrupt handling functionality for the i386 port. Separated
functionality into separate CPU and Architecture components.
It appears as if the i386 interrupt handler functionality was intended
to allow multiple handlers to be installed for a given interrupt.
Unfortunately, this functionality was not fully implemented and also
had the problem that irq_free_handler() does not allow the passing
of the handler function pointer and therefore could never be used to
free specific handlers that had been installed for a given IRQ.
There were also various issues with array bounds not being fully
tested.
I had two objectives in mind for the new implementation:
1) Keep the implementation as similar as possible to existing
implementations. To that end, I have used the leon2/3
implementations as the reference
2) Seperate CPU and Architecture specific elements. All specific i386
interrupt functionality is now in cpu/i386/ with the high level
API and architecture specific code in lib_i386. Functionality
specific to the PC/AT architecture (i.e. cascaded i8259 PICs) has
been further split out into an individual file to allow for the
implementation of the PIC architecture of the SC520 CPU (supports
more IRQs)
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script. Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.
However, '*(.rodata*)' by itself will result in sub-optimal section
ordering. The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file. This is easy to fix by using the
SORT_BY_ALIGNMENT command.
This patch has not be tested one most of the boards modified. Some boards
have a linker script that looks something like this:
*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)
I change this to:
*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
In the ppc case, these things are part of the legacy ABI, so keep them
around but mark them as legacy so no new code will touch them.
Also stop calling load_sernum_ethaddr() since all boards now implement
this as a stub.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Rather than have common ppc code call a board-specific function like
load_sernum_ethaddr(), have each board call it in its own board-specific
misc_init_r() function.
The boards that get converted here are:
- kup4k/kup4x
- pcs440ep
- tqm8xx
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Stefan Roese <sr@denx.de>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Also rename load_sernum_ethaddr() to misc_init_r() so we don't need to
handle this board specially in common ARM code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Rather than have the common ppc code have board-specific hooks, move the
board_get_enetaddr() function into the board-specific init functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Some warts are remaining and should be killed off (by moving the func to
the appropriate board init code):
- davinci_eth_set_mac_addr
- cs8900_get_enetaddr
- smc_set_mac_addr
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
For the nx823, the serial number is moved out of load_sernum_ethaddr() and
into misc_init_r() as is the env setup. This lets us kill off the former
function in the process.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The resulting code can also be simplified even further.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Stefan Roese <sr@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The cpus that get converted here:
at91rm9200
mpc512x
mpc5xxx
mpc8260
mpc8xx
ppc4xx
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: John Rigby <jrigby@freescale.com>
CC: Stefan Roese <sr@denx.de>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Also, do not bother checking the EEPROM if the env is setup. This
simplifies the code greatly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Dnek <wd@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Rolf Offermanns <rof@sysgo.de>
CC: Erik Stahlman <erik@vt.edu>
CC: Daris A Nevil <dnevil@snmc.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The sh_eth driver can also be simplified a bit by using enetaddr member of
the eth_device structure.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Carlos Munoz <carlos@kenati.com>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
The cs8900 driver also changes slightly in that the hardware is not
consulted if the mac address in the env is sane.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Marius Groeger <mgroeger@sysgo.de>
CC: Ben Warren <biggerbadderben@gmail.com>
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.
Since the address is in the PLM_DEVICE_BLOCK structure already, there is
no need to pass the NodeAddress as a second parameter. So drop the second
argument to the LM_SetMacAddress() function (and update the tigon3 driver
accordingly).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Always use the MAC address that is stored in the environment first before
falling back to the ROM. This also cuts out any comparison steps: if the
mac in the env is sane, the ROM is never consulted.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Thomas Frieden <ThomasF@hyperion-entertainment.com>
CC: Ben Warren <biggerbadderben@gmail.com>
Since the ethernet layer handles updating of device addresses itself from
the environment, there is no point in calling eth_set_enetaddr().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Since the on-chip MAC does not have an eeprom or similar interface, force
all Blackfin boards that use this driver to setup the board data with a
proper MAC.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Declare new utility functions for converting between the environment
variables (eth*addr) and the binary MAC address representation. This way
we can unify all the random places that already do this kind of thing.
The functions in question:
eth_parse_enetaddr - "..." -> {...}
eth_getenv_enetaddr - env -> {...}
eth_setenv_enetaddr - {...} -> env
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Now that our printf functions support the %pI4 modifier like the kernel,
let's drop the inflexible print_IPaddr() function and covert over to the
%pI4 modifier.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
This brings in support for the %p modifier which allows us to easily print
out things like ip addresses, mac addresses, and pointers.
It also converts the rarely used 'q' length modifier to the common 'L'
modifier when dealing with quad types.
While this new code is a bit larger (~1k .text), most of it should be made
up by converting the existing ip/mac address code to use format modifiers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
sh_eth_reset is function to reset Ether IP.
The MAC address is stored in IP, but it is initialized by this function.
OS (e.g. Linux Kernel) can not use this device when initialized.
This revises this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
PCI outbound address map configuration doesn't match the
PCI memory address range covered by appropriate TLB entry
configuration for canyonlands causing machine check
exceptions while accessing PCI memory regions. This patch
provides a fix for this issue.
Kazuaki Ichinohe observed and reported this issue while
testing display output with PCI ATI video card on canyonlands.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Follow up to the flash_fixup_stm to fix geometry reversal
on STMicro M29W320ET flash chip. The M29W320DT has 4 erase region.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The smc911x driver changed the naming convention for its register funcs,
so update the eeprom code accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
Total5200 and digsy MTC use I2C port 2 pins as a ATA chip select.
To avoid adding board-specific ifdefs to cpu/mpc5xxx/ide.c new
define CONFIG_SYS_ATA_CS_ON_I2C2 was introduced. It is used by
Total5200 and will be used by digsy MTC and other boards with
ATA CS on I2C pins.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
This patch adds support for the kmsupx4 board from Keymile,
based on a Freescale MPC852T CPU
- serial console on SMC1
- 32 MB SDRAM
- 32 MB NOR Flash
- Ethernet over SCC3
- I2C Bitbang
Signed-off-by: Heiko Schocher <hs@denx.de>
renaming the "mgsuvd" board port into "km8xx", because
there come more similar boards from keymile.
Compiling the mgsuvd board with "make mgsuvd_config"
remains.
Signed-off-by: Heiko Schocher <hs@denx.de>
- added to keymile-common.h:
- bootcount support
- COMMAND HISTORY
- CONFIG_AUTO_COMPLETE
- CONFIG_SYS_FLASH_PROTECTION
- JFFS2 support
- CONFIG_VERSION_VARIABLE
- extracted common I2C settings for all boards
- common default environment settings summarized
Signed-off-by: Heiko Schocher <hs@denx.de>
The Nand flash was unable to read and write properly
due to Nand Chip Select (nCE) setup was in reverse
order. Also, increase the Nand time out value to 60.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
The serial boot dram extended/standard mode register was not
setup and was using default DRAM setup causing the U-boot was
unstable to boot up in serial mode.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
According to coldfire manual data timeout > address time out
also use correct macro to program XARB_CFG
Signed-off-by: Arun C <arunedarath@mistralsolutions.com>
nboot command currently does not skip bad blocks and gives read error when
loading image stored over bad block. With patch applied, nboot works as
expected:
Device 0 bad blocks:
00780000
014a0000
02000000
02cc0000
04aa0000
Loading from NAND 128MiB 3,3V 8-bit, offset 0x2c00000
Image Name: Linux-2.6.22-omap1
Created: 2008-11-20 23:44:32 UTC
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 1052520 Bytes = 1 MB
Load Address: 10008000
Entry Point: 10008000
Skipping bad block 0x02cc0000
Automatic boot of image at addr 0x10400000 ...
...
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch fixes a problem spotted by Mikhail Zolotaryov on Sequoia with
the DDR2 configuration to only use one CS (rank). As this code is most
likely copied from the original Sequoia version, this error was copied
as well.
This patch also removes some dead code.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem spotted by Mikhail Zolotaryov on Sequoia with
the DDR2 configuration to only use one CS (rank). As this code is most
likely copied from the original Sequoia version, this error was copied
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Sequoia board schematics (DES0211_11_SCH_11.pdf, page 5, unit U1D)
specifies that BankSel#1 is not connected, while bootloader memory
configuration is (board/amcc/sequoia/sdram.c):
mtsdram(DDR0_10, 0x00000300);
i.e. both Chip Selects used - not correct.
If we change to correct value here:
mtsdram(DDR0_10, 0x00000100);
memory is accessible OK also.
Signed-off-by: Mikhail Zolotaryov <lebon@lebon.org.ua>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch makes sure the correct mask is applied when setting
the encryption and I2C bus 0 clock in SCCR.
Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
won't function.
Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The rtl8139 driver use pci_mem_to_phys. So it need PCI system memory
registration.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
We can built 'make sh7785lcr_32bit_config'. And add new command "pmb"
for this mode. This command changes PMB for using 512MB system memory.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Some register value was hardcoded for System memory size 128MB and
memory offset 0x08000000. This patch fixed the problem.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Commit af1c2b84 added a generic phy support, with an ID of zero
and a 32 bit mask; meaning that it will match on any PHY ID.
The problem is that there is a test that checked if a matching
PHY was found, and if not, it printed the non-matching ID.
But since there will always be a match (on the generic PHY,
worst case), this test will never trip.
In the case of a misconfigured PHY address, or of a PHY that
isn't explicitly supported outside of the generic support,
you will never see the ID of 0xffffffff, or the ID of the
real (but unsupported) chip. It will silently fall through
onto the generic support.
This change makes that test useful again, and ensures that
the selection of generic PHY support doesn't happen without
some sort of notice. It also makes it explicitly clear that
the generic PHY must be last in the PHY table.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Fix typo in makefile which broke out of tree builds.
Also use expolicit "rm" instead of "ln -sf" which is known to be
unreliable.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
These were left in accidentally, and are not really useful unless the
code is as broken as it was when it was being developed.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Fix typo in makefile which broke out of tree builds.
Also use expolicit "rm" instead of "ln -sf" which is known to be
unreliable.
Signed-off-by: Wolfgang Denk <wd@denx.de>
add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU.
The bootcounter uses 8 bytes from the muram,
because no other memory was found on this
CPU for the bootcount feature. So we must
correct the muram size in DTS before booting
Linux.
This feature is actual only implemented for
MPC8360, because not all 83xx CPU have qe,
and therefore no muram, which this feature
uses.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
old code implemented the QE_ENET10 errata only for Silicon
Revision 2.0. New code reads now the Silicon Revision
register and sets dependend on the Silicon Revision the
values as advised in the QE_ENET10 errata.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
it is possible that some board variants have different DDR II
RAM sizes. So we autodetect the size of the assembled RAM.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds I2C mux support for the fsl_i2c driver. This
allows you to add "new" i2c busses, which are reached over
i2c muxes. For more infos, please look in the README and
search for CONFIG_I2C_MUX.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds I2C support for the Keymile kmeter1 board.
It uses the First I2C Controller from the CPU, for
accessing 4 temperature sensors, an eeprom with IVM data
and the booteeprom over a pca9547 mux.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
In case where a board not uses CONFIG_POST, it is not
necessary to init the DTTs when running from flash.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.
The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.
items 1, 2 and 5:
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The previous version rebooted forever with DDR bigger than 256MB.
Access the DS1339 RTC chip is on I2C1 bus.
Allow DHCP.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The SerDes initialization should be finished before negating the reset
signal according to the reference manual. This isn't an issue on real
hardware, but we'd better stick to the specifications anyway.
Suggested-by: Liu Dave <DaveLiu@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Fix following warning while compilation for mcc200 board:
lcd.c: In function 'lcd_display_bitmap':
lcd.c:625: warning: unused variable 'cmap'
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The smc911x driver has a lot of useful defines/functions which can be used
by pieces of code (such as example eeprom programmers). Rather than
forcing each place to duplicate these defines/functions, split them out
of the smdc911x driver into a local header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>
The "eet" variant of the imx31_phycore board has an OLED display, using a
s6e63d6 display controller on the first SPI interface, using GPIO57 as a
chip-select for it. With this configuration you can display 256 colour BMP
images in 16-bit RGB (RGB565) LCD mode.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add a driver for the Synchronous Display Controller and the Display
Interface on i.MX31, using IPU for DMA channel setup. So far only
displaying of bitmaps is supported, no text output.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This patch also simplifies some ifdefs in lcd.c, introduces a generic
vidinfo_t, which new drivers are encouraged to use and old drivers to switch
over to.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This patch adds 16bpp BMP support to the common lcd code.
Use CONFIG_BMP_16BPP and set LCD_BPP to LCD_COLOR16 to enable the code.
At the moment it's only been tested on the MIMC200 AVR32 board, but extending
this to other platforms should be a simple task !!
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
This is a driver for the S6E63D6 SPI OLED display controller from Samsung.
It only provides access to controller's registers so the client can freely
configure it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
Some SPI devices have special requirements on chip-select handling.
With this patch we can use a GPIO as a chip-select and strictly follow
the SPI_XFER_BEGIN and SPI_XFER_END flags.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This is a minimal driver, so far only managing output. It will
be used by the mxc_spi.c driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fix setting the SPI Control register, 8 and 16-bit transfers
and a wrong pointer in the free routine in the mxc_spi driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe
slots. Let's support them.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
We should use pci_last_busno() in pci_init_bus(), otherwise we'll
erroneously re-use PCI0's first_busno for PCI1 hoses.
NOTE: The patch is untested. All MPC83xx FSL boards I have have
PCI1 in miniPCI form, for which I don't have any cards handy.
But looking in cpu/mpc85xx/pci.c:
...
#ifdef CONFIG_MPC85XX_PCI2
hose = &pci_hose[1];
hose->first_busno = pci_hose[0].last_busno + 1;
And considering that we do the same for MPC83xx PCI-E support,
I think this patch is correct.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes copy-paste issue: pci_hose[0]'s first and last
busnos were used to fixup pci1's nodes.
We don't see this bug triggering only because Linux reenumerate
buses anyway.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes an issue in config space read accessors: we should
fill-in the value even if we fail (e.g. skipping devices), otherwise
CONFIG_PCI_SCAN_SHOW reports bogus values during boot up.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently we assign first_busno = 0 for the first PCIe hose, but this
scheme won't work if we have ordinary PCI hose already registered (its
first_busno value is 0 too).
The old code worked fine only because we have PCI disabled on
MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae92
"mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards").
But on MPC837XERDB boards we have PCI and PCIe, so the bug actually
triggers.
So, to fix the issue, we should use pci_last_busno() + 1 for the
first_busno (i.e. last available busno).
Reported-by: Huang Changming <Chang-Ming.Huang@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.
Will be used by PCI/PCIe initialization code.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently, we get 256MB as the default, but since all the 86xx
board configs define a 2G BAT mapping for RAM, raise default
to 2G.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
Added code to setup the extra Flash and FRAM chip selects as used on the
MIMC200 board.
V2 moves the init code from the common "cpu.c" file into the board specific
setup file.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Change the MIMC200 startup code to use the built-in (rather than
hard-coded) funtions for setting up gclk outputs.
We'll also move the code to the new, more-appropriate
board_postclk_init() routine.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The AVR32A architecture (which AT32UC3A-series is based on) has a
different memory layout than the AVR32B-architecture. This patch moves
addrspace.h to an arch-dependent directory in preparation for
AT32UC3A-support. It also moves some address-space manipulation
functions from io.h to addrspace.h.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
NetLoop polls every cycle with getenv some environment variables.
This is horribly slow, especially when the environment is big.
This patch reads only the environment variables in NetLoop,
when they were changed.
Also moved the init part of the NetLoop function in a seperate
function.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
A forward port of the last version to work with the newer smc911x driver.
I only have a board with a LAN9218 part on it, so that is the only one
I've tested. But there isn't anything in this that would make it terribly
chip specific afaik.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added the struct containing PHY settings for the Vitesse VSC8211 phy to
the phy_info list in tsec.c
Signed-off-by: Pieter Henning <phenning@vastech.co.za>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Compiling dbau1x00 and gth2 boards with GCC-4.2, you would see new warnings
like this:
skuribay@ubuntu:u-boot.git$ ./MAKEALL dbau1000
Configuring for dbau1x00 board...
au1x00_eth.c: In function 'au1x00_send':
au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_recv':
au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_init':
au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_recv':
au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_init':
au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
au1x00_eth.c: In function 'au1x00_send':
au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
We're passing a volatile pointer to a function which is expecting a non-
volatile pointer. That's potentially dangerous, so gcc warns about it.
Confirmed with ELDK 4.2 (GCC 4.2.2) and Sourcey G++ 4.2 (GCC 4.2.3).
To fix this, we add a volatile attribute to the argument in question.
The virt_to_phys function in Linux kernel also does the same thing.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Clock pin must have input enabled for MMC3 to work.
Also enable pull-ups for cmd/data lines to be consistent
with remaining MMC host pin setup.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
This patch adds OMAP3 cpu type auto detection based on OMAP3 register
and removes hardcoded values.
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX)
which might need different software handling. For this, GPIO pin 171 (GPIO
module 6, offset 11) can be used to check for board revision. If this pin
is low, we have a rev C board. Else it must be a revision Ax or Bx board.
To handle board differences you can call function beagle_get_revision().
E.g.:
if (beagle_get_revision()) {
/* do special revision C stuff here */
}
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* Make Overo GPIO114 an input for touchscreen PENDOWN
* Make Overo GPIO144-147 readable
* Make Overo EHCI pinmux match beagle rev c setup
* Adjust pinmux for SMSC911X network chip support
* Remove unnecessary GPIO setup
* Fix merge error in Makefile
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Serial driver via the EmbeddedICE macrocell's DCC channel using
co-processor 14.
It does include a timeout to ensure that the system does not
totally freeze when there is nothing connected to read.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Taken all the duplicated code for enabling common modules and apply
software workarounds from the board specific code into common
functions. Also added comments explaining the workarounds
(from TI errata documents) and replaced some numerical bit numbers
with more meaningful defines.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
This trivially enables Ethernet support in the debug board
by setting up the proper chip select.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
This driver implements the ECC algorithm described in
the CPU data sheet and uses the OOB layout chosen in
already-released development systems (shipped with a custom-made
u-boot 1.3.1).
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Fix the problem that cannot use external hub, because this driver
did not control correctly a DEVADDx register.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Looks like the initcode updates fell out of order during my merges. The
patch that really fixes up this code is part of power-on overhaul and so
is too large for merging at this point. Instead, we can disable the code
as no currently in-tree board depends on it. The next merge window will
fix things up properly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The previous merge for cleaning up the I2C driver incorrectly reverted the
CFG_xxx rename for some of the I2C defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
Commit e4943ec5 moved the ARM boards to a vendor directory but forgot
to adapt the cleanup rules in the Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch clarifies the way m68k passes linux boot argument.
The one gotcha here is that the assembly instruction that
the compiler uses to jump to the kernel is 'jsr' which pushes the
program counter for the instruction after the jsr into the stack pointer.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Although load address and image start address are same address,
bootm command always does memmove.
That is unnecessary memmove and can be taken few milliseconds
(about 500 msec to 1000 msec).
If skip this memmove, we can reduce the boot time.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch does some minor fixing of the Xilinx Spartan III
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch does some minor fixing of the Xilinx Spartan II
FPGA boot code:
- Fixed call order of post configuration callback and
success message printing (result of copy-paste?)
- relocate post configuration callback only when it
is implemented
- remove obsolete comment
- minor coding style cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
In the commit 79b51ff820 ([MIPS] cpu/mips/
Makefile: Split [CS]OBJS onto separate lines), I wrongly deleted a START
line. This patch puts it back.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
These names are being taken over by the new MMC framework. Hopefuly
the PXA can be easily ported, and these functions will go away entirely.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fixing the get_timer function to return time in miliseconds instead of
ticks. Also fixed PXA boards to use the conventional value of 1000 for
CONFIG_SYS_HZ.
Signed-off-by: Micha Kalfon <smichak.uv@gmail.com>
omap3_mmc.c was changed to define mmc_legacy_init.
Remove unused functions.
Compile tested on all arm
Runtime tested on Zoom1.
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
- activate CS4 for accessing the FPGA
- activate Rx buf len > 1 on SMC
- pram activated
- MTDPARTS_DEFAULT defined
- update the size of the flashes in the DTS
before booting Linux
- MONITOR_LEN updated to 384k
- added CONFIG_HOSTNAME
- added CONFIG_ENV_BUFFER_PRINT
- Environment size reduced to 16k
Signed-off-by: Heiko Schocher <hs@denx.de>
- activate Rx buf len > 1 on SMC
- pram activated
- MTDPARTS_DEFAULT defined
- update the size of the flash in the DTS
before booting Linux
- MONITOR_LEN updated to 384k
- added CONFIG_HOSTNAME
- added CONFIG_ENV_BUFFER_PRINT
- Environment size reduced to 16k
Signed-off-by: Heiko Schocher <hs@denx.de>
THe TQM8xxL use a ahnd-optimized linker script to efficiently use the
small boot sectors in the flash. This patch makes some room in the
first sector to prepare for a size increase of lib_generic/vsprintf.o
by a future patch.
Signed-off-by: Wolfgang Denk <wd@denx.de>
judging from other printfs in the same file, it seems ata should be
postpended with the interface number, not the address of the global
port variable. Fixes this for current u-boot-mpc83xx tree:
Configuring for MPC8349ITX board...
sata_sil3114.c: In function 'sata_bus_softreset':
sata_sil3114.c:99: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'struct sata_port *'
sata_sil3114.c:108: warning: format '%u' expects type 'unsigned int', but argument 2 has type 'struct sata_port *'
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch will create a configuration option for a minimum configuration for
the ns16550 serial driver at drivers/serial/ns16550.c and will apply this new
configuration option to the SIMPC8313.h config file in order to fix the NAND
bootstrap build error. This option will exclude all functions with exception of
NS16550_putc and NS16550_init. This will be used primarily to save space and
remove unused code from builds in which space is limited.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
swapping the include order suppresses warnings for board configs
that define their own CONFIG_MAX_MEM_MAPPED:
In file included from /home/r1aaha/git/u-boot/include/config.h:5,
from /home/r1aaha/git/u-boot/include/common.h:35,
from simpc8313.c:26:
/home/r1aaha/git/u-boot/include/configs/SIMPC8313.h:81:1: warning:
"CONFIG_MAX_MEM_MAPPED" redefined
In file included from /home/r1aaha/git/u-boot/include/config.h:4,
from /home/r1aaha/git/u-boot/include/common.h:35,
from simpc8313.c:26:
/home/r1aaha/git/u-boot/include/asm/config.h:28:1: warning: this is
the location of the previous definition
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch prepares the good old PMC405 board support for
upcoming PMC405V2 patches.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes coding style for PMC405 board support.
Also some unneeded features/code is removed.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
1. Changes to the default environment:
- "bootcmd" defined as "run flash_self"
- "saveenv" command removed from "update"
- "uboot" changed to "u-boot" (also in "load")
- "addmtd" variable defined (and added to all boot commands)
2. CONFIG_CMD_JFFS2 defined to enable "mtdparts" command
3. MTDIDS_DEFAULT and MTDPARTS_DEFAULT defined
4. CONFIG_SYS_CBSIZE changed from 256 to 512. That solves the problem
with truncated "bootargs" environment variable.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Move the CONFIG_8xx mpc8xx_pcmcia.c protection out of the C file and
into the Makefile so we avoid pointless compiling of the file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Because the functions have been defined using macros, grepping for
their definitions is not possible. This patch adds the real function
names in comments.
Signed-off-by: Petri Lehtinen <petri.lehtinen@inoi.fi>
Acked-by: Mike Frysinger <vapier@gentoo.org>
The CONFIG_CMD_ENV option controls enablement of the `saveenv` command
rather than a generic "env" command, or anything else related to the
environment. So, let's make sure the define is named accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
- Extend ub_dev_read() and ub_dev_recv() so they return the length actually
read, which allows for better control and error handling (this introduces
additional error code API_ESYSC returned by the glue mid-layer).
- Clean up definitions naming and usage.
- Other minor cosmetics.
Note these changes do not touch the API proper, so the interface between
U-Boot and standalone applications remains unchanged.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
De-hardcode range in RAM we search for the API signature. Instead use the stack
pointer as a hint to narrow down the range in which the signature could reside
(it is malloc'ed on the U-Boot heap, and is hoped to remain in some proximity
from stack area). Adjust PowerPC code in API demo to the new scheme.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
This patch allows using of SATA devices connected
to the onboard PCI SIL1334 SATA controller.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Here's a new framework (based roughly off the linux one) for managing
MMC controllers. It handles all of the standard SD/MMC transactions,
leaving the host drivers to implement only what is necessary to
deal with their specific hardware.
This also hooks the infrastructure into the PowerPC board code
(similar to how the ethernet infrastructure now hooks in)
Some of this code was contributed by Dave Liu <daveliu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The current MMC infrastructure relies on the existence of an
arch-specific header file. This isn't necessary, and a couple
drivers were forced to implement dummy files to meet this requirement.
Instead, we move the stuff in those header files into a more appropriate
place, and eliminate the stubs and the #include of asm/arch/mmc.h
Signed-off-by: Andy Fleming <afleming@freescale.com>
This errata fix is required for 32 bit DDR2 controller on 8572.
May also be required for P10XX20XX platforms
Signed-off-by: Poonam_Agarwal-b10812 <b10812@lc1106.zin33.ap.freescale.net>
The ecm variable in sdram.c was being declared for all 8548, but only
used by specific 8548 boards, so we make that variable require those
specific boards, too
The nand code was using an index "i" into a table, and then re-using "i"
to set addresses for each upm. However, then it relied on the old value
of i still being there to enable things. Changed the second "i" to "j"
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch adds the workaround for erratum DDR20 according to MPC8548
Device Errata document, Rev. 1: "CKE signal may not function correctly
after assertion of HRESET". Furthermore, the bug DDR19 is fixed in
processor version 2.1 and the work-around must be removed.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch makes accesses to the system memory cachable by removing the
caching-inhibited and guarded flags from the relevant TLB entries for
the TQM8548_BE and TQM8548_AG modules. FYI, the Freescale MPC85* boards
are configured similarly.
This results in a big averall performace improvement. TFTP downloads,
NAND Flash accesses, kernel boots, etc. are much faster.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch add support for the 1 GiB DDR2-SDRAM on the TQM8548_AG
module.
Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
The TQM8548_AG is a variant of the TQM8548 module with 1 GiB memory,
CAN and without PCI/PCI-X and RTC. U-Boot can be built for this module
with "$ make TQM8548_AG_config".
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
The TQM8548_BE is a variant of the TQM8548 module with NAND and CAN
interface. With NAND support, the image is significantly larger and
TEXT_BASE is adjusted accordingly. U-Boot can be built for this
module with "$ make TQM8548_BE_config".
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
The TQM8548_AG module does not have the standard PCI/PCI-X interface
connected but just the PCI Express interface . So far it was not
possible to disable it without disabling the complete PCI interface
(CONFIG_PCI) including PCI Express.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
As the reset vector is located at 0xfffffffc, all flash sectors from the
beginning of the U-Boot binary to 0xffffffff must be protected. On the
TQM8548-AG having small sectors at the end of the flash it happened that
the last two sector were not protected and an "erase all" left an
un-bootable system behind:
Bank # 2: CFI conformant FLASH (32 x 16) Size: 32 MB in 270 Sectors
AMD Standard command set, Manufacturer ID: 0xEC, Device ID: 0x257E
Erase timeout: 8192 ms, write timeout: 1 ms
FFFA0000 E RO FFFC0000 RO FFFE0000 RO FFFE4000 RO FFFE8000 RO
FFFEC000 RO FFFF0000 RO FFFF4000 RO FFFF8000 E FFFFC000
The same bug seems to be in drivers/mtd/cfi_flash.c:flash_init() and many
board BSPs as well.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Update the 86xx reset sequence to try executing a board-specific reset
function. If the board-specific reset is not implemented or does not
succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard
reset procedure than the previous method and allows all board
peripherals to be reset if needed.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Previously if we >=4G of memory and !CONFIG_PHYS_64BIT we'd report
an error and hang. Instead of doing that since DDR is mapped in the
lowest priority LAWs we setup the DDR controller and the max amount
of memory we report back is what we can map (CONFIG_MAX_MEM_MAPPED)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
Added some info that is printed out when we boot to distiquish if we
built MPC8572DS_config vs MPC8572DS_36BIT_config since they have
different address maps.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The device tree's PHY addresses need to be fixed up if we're using the
SGMII Riser Card.
The 8572, 8536, and 8544 DS boards were modified to call this function.
Code idea taken from Liu Yu <yu.liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
In the 36-bit physical config for MPC8572DS when need the start address
of memory and it size to be kept in phys_*_t instead of a ulong since
we support >4G of memory in the config and ulong cant represent that.
Otherwise we end up seeing the memory node in the device tree reporting
back we have memory starting @ 0 and of size 0.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When we introduced the 36-bit config of the MPC8572DS board we had the
wrong PCI MEM bus address map. Additionally, the change to the address
map exposes a small issue in our dummy read on the ULI bus. We need
to use the new mapping functions to handle that read properly in the
36-bit config.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Previously we only allowed power-of-two memory sizes and didnt
handle >2G of memory. Now we will map up to CONFIG_MAX_MEM_MAPPED
and should properly handle any size that we can make in the TLBs
we have available to us
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If we only have one controller we can completely ignore how
memctl_intlv_ctl is set. Otherwise other levels of code get confused
and think we have twice as much memory.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The LUN number is not part of the Command Descriptor Block (CDB) for scsi inquiry, request sense, test unit ready, read capacity and read10 commands. This patch removes the LUN number information from the CDB.
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
V3: Fixed line-wrap problem due to user error in mail!
Added usb_configured() checks in usbtty_puts() and usbtty_putc() to get around a hang
when usb is not connected and the user has set up multi-io (setenv stdout serial,usbtty etc).
Got rid of redundant __attribute__((packed)) directives that were causing warnings from gcc.
Signed-off-by: Atin Malaviya <atin.malaviya@gmail.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
i.MX31 powers on with most clocks running, so, after a power on this explicit
clock start up is not required. However, as Linux boots it disables most clocks
to save power. This includes the I2C clock. If we then soft reboot from Linux
the I2C clock stays off. This breaks the phycore, which has its environment in
I2C EEPROM. Fix the problem by explicitly starting the clock in I2C driver
initialisation routine.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Ack-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Blackfin i2c driver has been rewritten thus the special ifdefs in the
common code are no longer needed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
With actual u-boot compiling the mgcoge port fails, because
since commit ba705b5b1a it is
necessary to define CONFIG_NET_MULTI.
Seems to me the mgcoge port is the only actual existing 8260
port who uses CONFIG_ETHER_ON_SCC, so no other 8260 port needed
to be fixed.
Signed-off-by: Heiko Schocher <hs@denx.de>
This fixes the initialization of the SDRAM_CODT register in the ppc4xx DDR2
initialization code. It also removes use of the SDRAM_CODT_FEEDBACK_RCV_SINGLE_END
and SDRAM_CODT_FEEDBACK_DRV_SINGLE_END #define's since they are reserved bits.
Signed-off-by: Carolyn Smith <carolyn.smith@tektronix.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Some AMCC eval boards do have a board_eth_init() function calling
pci_eth_init(). These boards need to call cpu_eth_init() explicitly now
with the new eth_init rework.
Signed-off-by: Stefan Roese <sr@denx.de>
The criteria of the AMCC SDRAM Controller DDR autocalibration
U-Boot code is to pick the largest passing write/read/compare
window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample
Cycle Select value.
On some Kilauea boards the DDR autocalibration algorithm can
find a large passing write/read/compare window with a small
SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select
value "T1 Sample".
This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of
"T1 Sample" proves to be to aggressive when later on U-Boot
relocates into DDR memory and executes.
The memory traces on the Kilauea board are short so on some
Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select
value of "T1 Sample" shows up as a potentially valid value for
the DDR autocalibratiion algorithm.
The fix is to define a weak default function which provides
the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value
to accept for DDR autocalibration. The default will be the
"T2 Sample" value. A board developer who has a well defined
board and chooses to be more aggressive can always provide
their own board specific string function with the more
aggressive "T1 Sample" value or stick with the default
minimum SDRAM_RDCC.[RDSS] value of "T2".
Also put in a autocalibration loop fix for case where current
write/read/compare passing window size is the same as a prior
window size, then in this case choose the write/read/compare
result that has the associated smallest RDCC T-Sample value.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
CONFIG_SDRAM_PPC4xx_IBM_DDR2 is not set when include/asm-ppc/config.h is
included. So for katmai, CONFIG_MAX_MEM_MAPPED will get set to 256MB.
It makes perfect sense to set CONFIG_MAX_MEM_MAPPED to 2GB for all PPC4xx
boards right now.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN.
With this option it is possible to allow the receive
buffer for the SMC on 8xx to be greater then 1. In case
CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the
old version.
When defining CONFIG_SYS_SMC_RXBUFLEN also
CONFIG_SYS_MAXIDLE must be defined to setup the maximum
idle timeout for the SMC.
Signed-off-by: Heiko Schocher <hs@denx.de>
Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into
the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb
code in the process.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
At some point an intentional double space at the end of the sentence
got changed into a tab in the GPL header line:
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
This patch fixes the damage.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
If on your board is more than one flash, you must know
the size of every single flash, for example, for updating
the DTS before booting Linux. So make this function
flash_get_info() extern, and you can have all info
about your flashes.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Added new CONFIG options for the three type of MAC-PHY interconnect and
applied them all relevant board config files
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30
clock cycles, so it's been mostly working. But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles). This
enforces a 2 microsecond gap between assertion and deassertion.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
100Mbs ethernet does not work on sh7763 chips due to the wrong value being
used in the GECMR register. Following diff fixes the problem
Signed-off-by: Simon Munton <simon@nidoran.m5data.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This fixes MPC8260 compilation with ethernet on SCC. Probably was a
typo or something...
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN.
With this option it is possible to allow the receive
buffer for the SMC on 82xx to be greater then 1. In case
CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the
old version.
When defining CONFIG_SYS_SMC_RXBUFLEN also
CONFIG_SYS_MAXIDLE must be defined to setup the maximum
idle timeout for the SMC.
Signed-off-by: Heiko Schocher <hs@denx.de>
If we call flush_cache(0xfffff000, 0x1000) it would never
terminate the loop since end = 0xffffffff and we'd roll over
our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved CONFIG_MAX_MEM_MAPPED to the asm/config.h so its kept consistent
between the two current users (lib_ppc/board.c, 44x SPD DDR2).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
We have common defines that we duplicate in various ways. Having an
arch specific config.h gives us a common location for those defines.
Eventually we should be able to replace this when we have proper
Kconfig support.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Now that the rest of u-boot can support it, change the PCI bus
address of the PCI MEM regions from 0x80000000 to 0xc0000000,
and use the same bus address for both PCI1 and PCI2. This will
maximize the amount of PCI address space left over to map RAM
on systems with large amounts of memory.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
The code assumes that the pci bus address and the virtual
address used to access a region are the same, but they might
not be. Fix this assumption.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Clean up PCI mapping concepts in the 8641 config - rename _BASE
to _BUS, as it's actually a PCI bus address, separate virtual
and physical addresses into _VIRT and _PHYS, and use each
appopriately.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
The BAT fields are architected; there's no need for these to be in
cpu-specific files. Drop the duplication and move these to
include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only
used by the alaska board, and switch to using the BATU_BL_xxx defines
used by all the other boards. The BL_ defines previously in use
had to be shifted into the proper position for use, which was inefficient.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses. pci_map_bar()
is created to return the virtual address for a pci region.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Because the inbound pci windows are mapped generously, set up
the more specific outbound windows first. This way, when we
search the pci regions for something, we will hit on the more
specific region. This can actually be a problem on systems
with large amounts of RAM.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
If the VA and PA of the flash aren't the same, the banks list
should be initialized to hold the physical address. Correct this.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Driver for Dave DNET ethernet controller (used on Dave/DENX
QongEVB-LITE board).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys}
we should give preference to memory regions that aren't system memory.
Its possible that we have over mapped system memory in the regions and
we want to avoid depending on the order of the regions.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and
can be confusing when reading the code.
Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used
for system memory mapping purposes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Without the timeout present an infinite loop can occur if the
NAND device is broken or not present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Commit cfa460adfd removed support
for disabling the "No NAND device found!!!" warning when
CONFIG_SYS_NAND_QUIET_TEST was defined. This re-adds support
for silencing the warning.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Dear Wolfgang,
You are right, the patch was ugly.
The new one seems to be better.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This fixes a bug that tmp environment memory not being released.
Signed-off-by: Derek Ou <dou@siconix.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The "size" variable in start_armboot() in lib_arm/board.c is only really
used in "#ifndef CONFIG_SYS_NO_FLASH" case, and even there it can be
eliminated (thanks to Jean-Christophe PLAGNIOL-VILLARD for a suggestion.)
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Modified mii_init to support boards with PHYs that are not set to
autonegotiate, but still want to use u-boot's mii commands to probe
the smi bus. Such PHYs will not set the Autonegotiate-done bit.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Applied the patch for baudrate divider value truncation for
serial_init to serial_setbrg as well.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Cleanup for M5271EVB:
Added clarification on the use of CONFIG_SYS_CLOCK.
Modified to use u-boot's HUSH parser.
Cleanup on environment settings.
Removed compiler warning by defining CONFIG_SYS_CS0_*
Dependencies:
Added the use of CONFIG_SYS_MCF_SYNCR for clock multiplier.
This depends on a patch to include/asm-m68k/m5271.h
that defines the multiplier and divider ratios.
Removed the definition of CONFIG_SYS_FECI2C.
This depends on a patch that removes the use of it in
cpu/mcf52x2/cpu_init.c
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
M5271 dynamic clock multiplier. It is currently fixed at 100MHz.
Allow the board header file to set their own multiplier and divider.
Added the #define for the multiplier and divider to the cpu header file.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Discontinue the use of CONFIG_SYS_FECI2C (only used by M5271EVB).
Use read-modify-write to activate the FEC pins without disabling I2C.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
CONFIG_M68K bdinfo cleanup:
Fixed compiler warning about baudrate printing.
format '%d' expects type 'int', but argument 2 has type 'long unsigned int'.
Added printing of "cpufreq"
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Added the CONFIG_M5271 to the list of Coldfire V2 processor. This
was causing the bus clock (not CPU clock) to be declared twice as
fast as it actually is. This causes UARTS to operate at half the
specified baudrate.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
On some platforms PCIE support is not required, but would be included
because the cpu supports it. To reduce fooprint it is now configurable
via CONFIG_PCI_DISABLE_PCIE.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the fdt UART clock fixup code to
only touch CPU internal UARTs on 4xx systems.
Only these UARTs are definitely clocked by gd->uart_clk.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Move the default SPI CS that we boot from into common code so that it can
be used in other SPI drivers and environment settings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Previously, booting over the UART required the baud rate to be known ahead
of time. Using a bit of tricky simple math, we can calculate the new board
rate based on the old divisors.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Newer Blackfin boot roms support using the fast SPI read command rather than
just the slow one. If the functionality is available, then use it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some bits of the DDR MMRs should not be set. If they do, bad things may
happen (like random failures or hardware destruction).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Newer Blackfin's have an on-chip rom with a syscontrol() function that needs
to be used to properly program the memory and voltage settings as it will
include (possibly critical) factory tested bias values.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patch "flash/cfi_flash: Use virtual sector start address, not phys"
introduced a small typo and compilation warning for systems with CFI
legacy support (e.g. hcu4). This patch fixes it.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the double defined manufacturer defines from
jedec_flash.c. Since the common defines in flash.h are 32bit
we now need the (16) cast. This patch also removes the compilation
warning (e.g. seen on hcu5):
./MAKEALL hcu5
Configuring for hcu5 board...
jedec_flash.c:219: warning: large integer implicitly truncated to unsigned type
Signed-off-by: Stefan Roese <sr@denx.de>
Patch "flash/cfi_flash: Use virtual sector start address, not phys"
introduced a small compilation warning. This patch fixes it.
Signed-off-by: Stefan Roese <sr@denx.de>
include/flash.h was commented to say that the address in
flash_info->start was a physical address. However, from u-boot's
point of view, and looking at most flash code, it makes more
sense for this to be a virtual address. So I corrected the
comment to indicate that this was a virtual address.
The only flash driver that was actually treating the address
as physical was the mtd/cfi_flash driver. However, this code
was using it inconsistently as it actually directly dereferenced
the "start" element, while it used map_physmem to get a
virtual address in other places. I changed this driver so
that the code which initializes the info->start field calls
map_physmem to get a virtual address, eliminating the need for
further map_physmem calls. The code is now consistent.
The *only* place a physical address should be used is when defining the
flash banks list that is used to initialize the flash_info struct,
usually found in the board config file.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Original patch from Ralph Kondziella
plus clean up by Wolfgang Denk
plus changes by John Rigby
use ips clock not lpc
port forward to current u-boot release
Signed-off-by: Ralph Kondziella <rk@argos-messtechnik.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: John Rigby <jrigby@freescale.com>
IIM (IC Identification Module) is the fusebox for the mpc5121.
Use #define CONFIG_IIM to turn on the clock for this module
use #define CONFIG_CMD_FUSE to add fusebox commands.
Fusebox commands include the ability to read
the status, read the register cache, override the register cache,
program the fuses and sense them.
Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
Add support for using a bmp other than
FSL_Logo_BMP for the DIU splash screen.
Can now set the env var "diu_bmp_addr" to
the address of a BMP in flash to use instead
of the default FSL_Logo_BMP.
Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
Somehow I missed the real driver part in my last patch version. This patch
now adds the driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This is a port of the Linux Blackfin on-chip SDH driver to U-Boot.
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Knowing the booting source of the part is useful, especially when the part
can switch dynamically between sources.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Set the default CONFIG_ENV_SPI_CS value to match the SPI CS that is used by
the Blackfin on-chip bootrom to boot out of SPI flash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is a port of the Linux Blackfin on-chip ATAPI driver to U-Boot.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the -mno-fdpic flag so that any Blackfin toolchain can be used to build
up u-boot, including ones that output FDPIC ELF by default.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Rather than using 8bit transfers for everything, use 8/16/32 bit transfers
as usable with the source/destination addresses and the count size.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The performance difference from doing an 8 bit DMA memcpy vs an optimized
core memcpy can be pretty big when you add in the overhead of setting up the
MDMA registers, cache flushes, etc... So only use dma_memcpy() when we
actually require it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We have to make sure the DMA channel is actually disabled in hardware before
attempting to reprogram it. Otherwise the new settings are ignored and we
end up with random hangs/failures.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Take the cache flush functions from the kernel as they use hardware loops in
order to get optimal performance.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
For systems with CONFIG_NET_MULTI disabled, bi_enetaddr does not get setup
based on $ethaddr, so set it up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Calculating the clocks requires a bit of calls to gcc math functions, so
cache the values after the first run since they'll most likely never
change once U-Boot is up and running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start building all Blackfin boards with -ffunction-sections/-fdata-sections
and linking with --gc-sections.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Redo how pointers are managed to get rid of ugly casts and strict pointer
aliasing issues that are highlighted by gcc 4.3.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
No point in having a Blackfin-specific define "CONFIG_BFIN_MAC_RMII" that
does exactly the same thing as common "CONFIG_RMII".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than having the on-chip MAC hardcoded to phy address 1 and a speed
of 2.5mhz, use these as defaults if the board doesn't specify otherwise.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Cleanup and rewrite the MII/PHY related functions so that we can reuse the
existing common linux/miiphy.h code and hook into the `mii` command.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Rather than hardcoding MDCDIV to 24 (which is correct for ~125mhz SCLK),
use the real algorithm so it gets set correctly regardless of SCLK.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
instead the board will have to load it from flash or ram
which will be specified by npe_ucode env var
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch updates the default environmental variables for the
Korat PPC 440EPx board, and makes additional minor fixes.
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The new environment variable "korat_usbcf" selects the USB
port used by the Korat board's CompactFlash controller.
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for searching through available PHY-addresses in
the macb-driver. This is needed for the ATEVK1100 evaluation board,
where the PHY-address will be initialized to either 1 or 7.
This patch adds a config option, CONFIG_MACB_SEARCH_PHY, which when
enabled tells the driver to search for the PHY address.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch removes volatile from:
volatile IP_t *ip = (IP_t *)xip;
Due to a bug, avr32-gcc will assume that ip is aligned on a word boundary when
using volatile, which causes an exception since xip isn't aligned on a word
boundary.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch adjusts the LED control so that interrupt lines are not reading LEDs
and effectively causing indefinite interrupts to the controller.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Import the is_valid_ether_addr() function from the Linux kernel.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This fixes an error which raises just a warning:
sbc8560.c:250: warning: passing argument 2 of 'strmhz' makes integer from pointer without a cast
Signed-off-by: Wolfgang Denk <wd@denx.de>
Since the SPD823TS board does not actually have any writable flash to save
its environment, undefine CONFIG_CMD_ENV so the "saveenv" command is
disabled.
This fixes the build error:
common/libcommon.a(cmd_nvedit.o): In function `do_saveenv':
common/cmd_nvedit.c:557: undefined reference to `saveenv'
make: *** [u-boot] Error 1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Configuring for MPC8540EVAL board...
mpc8540eval.c: In function 'checkboard':
mpc8540eval.c:53: error: invalid operands to binary /
make[1]: *** [mpc8540eval.o] Error 1
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We should check the return of usb_new_device() so that if no USB device is
found, we print out the right message rather than always saying "new usb
device found".
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
With this patch the USB related connection speed output ("usb tree" command and
debug output) is now high-speed enabled.
This patch also fixes a compilation warning when debugging is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch adds routines to handle (flush/invalidate) the dcache for the
QH and qTD structures and data buffers. This is needed on platforms using
this EHCI support with dcache enabled (like the MIPS VCT board port).
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch adds the config option CONFIG_EHCI_HCD_INIT_AFTER_RESET
to call ehci_hcd_init() again after ehci_reset() is executed. This
is needed for the upcoming VCT EHCI support which needs to re-init
the hcd part again after the EHCI CMD_RESET is executed.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch fixes an issue that the speed of USB devices was not detected
correctly on some EHCI controllers. This will be used on the upcoming VCT
EHCI support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Enabling DM6446 (TI DaVinci) USB module power and MUSB low-level
controller hook up to USB core layer.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Adding DM6446 (TI DaVinci) platform specific USB functionality for
USB Phy and VBUS initialization.
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Adding Mentor USB core functionality and Mentor USB Host controller
functionality for Mentor USB OTG controller (musbhdrc).
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Swaminathan S <swami.iyer@ti.com>
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Rather than forcing people to define a custom "LITTLEENDIAN", just use the
__LITTLE_ENDIAN one from the Linux byteorder headers that every arch is
already setting up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Add USB ehci ixp4xx host controller. Test on ixdp465 board.
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
USB ehci code cleanup. Use handshake instead of infinite while loop
to check the STD_ASS status
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Add USB ehci pci support. This patch doesn't include any
pci_ids and it is not tested on real hardware.
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The SanDisk Corporation U3 Cruzer Micro 1/4GB Flash Drive 000016244373FFB4
does not like to be reset, so check for it.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch populates the 'priv' field of the USB keyboard device_t
structure. The 'priv' field is populated with the address of the
'struct usb_device' structure that represents the USB device.
The 'priv' field can then be used in the 'usb_event_poll' function to
determine the USB device that requires to be polled. An
example of its usage in 'usb_event_poll' function is as below.
device_t *dev;
struct usb_device *usb_kbd_dev;
<snip>
dev = device_get_by_name("usbkbd");
usb_kbd_dev = (struct usb_device *)dev->priv;
iface = &usb_kbd_dev->config.if_desc[0];
Signed-off-by: Thomas Abraham <t-abraham@ti.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
- fix ehci_readl, ehci_writel
- introduce new define in ehci.h
- introduce the handshake function for waiting on a register
- fix usb_ehci_fsl with the new HC_LENGTH macro
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Böhmer <linux@bohmer.net>
IXP465 board and I find some errors in the code. This
patch fix:
- descriptor initizialization (config, interface and endpoint
must be one next-to the other when the USB_DT_CONFIG message
is send.
- FIX little/endian bigendian (introduce the CONFIG_EHCI_DESC_BIG_ENDIAN
and the CONFIG_EHCI_MMIO_BIG_ENDIAN)
- Introduce the linux version of the usb_config_descriptor and
usb_interface descriptor. This descriptor does't contains
u-boot extension.
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it>
Signed-off-by: Remy Böhmer <linux@bohmer.net>
The old swap function tended to clobber unrelated pins and screw up masks.
Rewrite the thing from scratch so it only uses the resources it needs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF53x/BF56x parts do not have an on-chip ROM to boot LDRs out of
arbitrary memory locations, so implement a basic one in software.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that real documentation has been released for the OTP interface and
the on-chip ROM wrt writing/timings, implement support for reading/writing
as well as dumping/locking.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some devices have no UART device pulled out, so allow people to disable the
driver completely in favor of other methods (like JTAG-console).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Blackfin JTAG has the ability to pass data via a back-channel without
halting the processor. Utilize that channel to emulate a console.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we save the value of RETX at power on and then pass it on to the
kernel so that it can nicely debug a "double-fault-caused-a-reset" crash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
People often ask questions about the init process and when things go
from flash to relocated base, so clarify the comments a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
As pointed out by Ivan Koryakovskiy, the initialization code was not
actually respecting the CONFIG_CLKIN_HALF option when configuring the
PLL_CTL register.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This video driver used to live in the Blackfin cpu directory, but it was
lost during the unification process. This brings it back.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The DEBUG code in initdram() is quite old and was never really useful, so
just drop it altogether. Common Blackfin debug code does a better job.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some of the flash defines weren't in the correct location and caused build
problems in some configurations, so let's move types and defines to better
local locations.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current Blackfin i2c driver does not work properly with certain devices
due to it breaking up transfers incorrectly. This is a rewrite of the
driver and relocates it to the newer place in the source tree.
Also remove duplicated I2C speed defines in Blackfin board configs and
disable I2C slave address usage since it isn't implemented.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Respect the CONFIG_SYS_MONITOR_LEN define rather than assuming a size of
128kB when setting up the default flash protection region for U-Boot
itself.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When setting up the global data, rather than relying on sizeof(), use the
common CONFIG_SYS_GBL_DATA_SIZE define.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Our dcache invalidate function doesn't just invalidate, it also flushes.
So rename the function accordingly and fix the dma_memcpy() function so it
doesn't inadvertently corrupt the data destination.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Creating a new dma_memcpy() function that skips all cache checks allows us
to use the function in very early init where the cache is not yet setup.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
extend commit c70564e6b1
"NAND: Fix cache and memory inconsistency issue" to add the cache.o dependency
to the simpc8313 build and fix this:
...Large Page NAND...Configuring for SIMPC8313 board...
nand_boot_fsl_elbc.o: In function `nand_boot':
nand_spl/board/sheldon/simpc8313/nand_boot_fsl_elbc.c:150: undefined reference to `flush_cache'
make[1]: *** [/home/r1aaha/git/u-boot-mpc83xx/nand_spl/u-boot-spl] Error 1
make: *** [nand_spl] Error 2
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Remove command name from all command "usage" fields and update
common/command.c to display "name - usage" instead of
just "usage". Also remove newlines from command usage fields.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The pcs440ep's led command usage formatting is non-standard. It
was made standard in preparation for larger command usage updates.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The diufb command usage formatting is non-standard. It was
made standard in preparation for larger command usage updates.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Rather than have the board code initialize SATA automatically during boot,
make the user manually run "sata init". This brings the SATA subsystem in
line with common U-Boot policy.
Rather than having a dedicated weak function "is_sata_supported", people
can override sata_initialize() to do their weird board stuff. Then they
can call the actual __sata_initialize().
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The ending LBA is inclusive. Hence, the partition size should be
((ending-LBA + 1) - starting-LBA) to get the proper partition size.
This is confirmed against the results from the parted tool.
(e.g. use parted /dev/sda -s unit S print) and observe the size.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
This patch fixes a bug (?) introduced after inclusion of the new
JFFS2 code.
When not using CONFIG_JFFS2_CMDLINE, the code in cmd_jffs2.c doesn't
fill in part->sector_size (keeping it as 0), but a correct value is
needed by the code in jffs2_1pass.c. This causes all JFFS2 accesses
to be in the same place of the memory, what obviously means
impossibility to use the JFFS2 partition.
This problem is fixed in this patch by including sector size
calculation in non-CONFIG_JFFS2_CMDLINE mtdparts_init variant.
Signed-off-by: Tomasz Figa <tomasz.figa_at_gmail.com>
Rather than special casing each environment type for enabling the saveenv
command, have them all behave the same. This avoids bitrot as new env
sources are added/removed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds a #define to optionally change the behaviour of
i2c_read() in soft_i2c.c to send an I2C repeated start instead of a
stop-start between sending the device address pointer write and
reading back the data. The current behaviour is retained as the
default.
While most devices will work either way, I have a smart battery(*)
that requires repeated start, and someone at some point found a
device that required a stop-start.
(*) http://www.inspired-energy.com/Standard_Products/NL2054/NL2054%20Rev1.0%20Data%20Sheet.pdf
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
U-Boot's gunzip() function does not handle the return code
of zlib's inflate() function correctly. gunzip() is implemented
to uncompress all input data in one run. So the correct return
code for the good case is Z_STREAM_END. In case of insufficient
output buffer memory inflate returns Z_OK. For gunzip() this
is an error.
It also makes sense to me to call inflateEnd() also in case
of an error.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds flush_/invalidate_dcache_range() to the MIPS architecture.
Those functions are needed for the upcoming dcache support for the USB
EHCI driver. I chose this API because those cache handling functions are
already present in the PPC architecture.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch removes the now obsolete and additionally wrongly defined
board_nand_init() prototype from nand_spl/nand_boot.c.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Added flash_fixup_stm to fix geometry reversal on STMicro M29W320ET flash chip.
Modeled after flash_fixup_amd, this patch handles the geometry reversal
or erase sectors that exist for ST Micro (now Numonyx) M29W320ET flash.
Since I cannot test all STM's chips, the detection is implemented as
narrow as possible for now.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The function find_sector() doesn't need to be called twice in
the case of AMD command set.
Tested on TQM5200S-BD with Samsung K8P2815UQB.
Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Lot's of 405 board config files use CONFIG_SYS_IGNORE_405_UART_ERRATA_59.
Either they define or undef it. Because it's not used in any source
files this patch removes any references to it.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Board support for the Guntermann & Drunck PowerPC 440 ETX module.
Based on the AMCC Yosemite board support by Stefan Roese.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Added support for a second memory bank to DDR autodetection for 440
platforms.
Made hardcoded values configurable.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This change is needed for mgcoge because it uses two ethernet drivers.
Add a check for the presence of the PIGGY board on mgcoge. Without this
board networking cannot work and the initialization must be aborted.
Only allocate rtx once to prevent DPRAM exhaustion.
Initialize ether_scc.c and the keymile-specific HDLC driver (to be added
soon) in eth.c.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch changes the reg_read/_write to smc911x_reg_read/_write
and defines then as weak so that they can be overridden by board
specific version.
This will be used by the upcoming VCTH board support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The NMDK8815 board is distributed by ST Microelectornics.
Other (proprietary) code must be run to unlock the CPU before
U-Boot runs. doc/README.nmdk8815 outlines the boot sequence.
This is the initial port, with basic infrastructure and
a working serial port.
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Some images can be quite large, so add an option to compress the
image data with gzip in the U-Boot image. Then at runtime, the
board can decompress it with the normal zlib functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A couple of buffers in the fat code are declared as an array of bytes.
But it is then cast up to a structure with 16bit and 32bit members.
Since GCC assumes structure alignment here, we have to force the
buffers to be aligned according to the structure usage.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Higher spi flash layers expect to be given back a pointer that was
malloced so that it can free the result, but the lower layers return
a pointer that is in the middle of the malloced memory. Reorder the
members of the lower spi structures so that things work out.
Signed-off-by: Brad Bozarth <bflinux@yumbrad.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
When compile u-boot with the 2.18 binutils the following
warning messages for each object file in post/lib_ppc/fpu/ is
produced at the linking stage:
post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float
...
This is because of the fact that, in general, the soft-float and
hard-float ABIs are incompatible; the 2.18 binutils do checking
of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and
produce the worning like above if these are not compatible.
The incompatibility of ABIs is concerned only the float values:
e.g. the soft-float ABI assumes the float argument passing in the
pair of rX registers, and the hard-float ABI assumes passing of
the float argument in the fX register. When we don't pass the float
arguments between the functions compiled with different floatness,
then such an application will work correctly.
This is the case for the FPU POST: u-boot (compiled with soft-float)
doesn't pass to (and doesn't get from) the FPU POST functions any
floats; there are no functions exported from the post/lib_ppc/fpu/
objects which would work with float parameters/returns too. So, we
can reassure the linker not to worry about the difference in ABI
attributes of linking files just by setting the 'soft-float'
attribute for the objects in post/lib_ppc/fpu. And this patch does
this.
Also, to avoid passing both soft- and hard-float options in CFLAGS
when compiling the files from post/lib_ppc/fpu (which is OK, but
looks rather dirty) this patch removes the soft-float string from
CFLAGS in post/lib_ppc/fpu/Makefile.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Initial support for the DS4510, a CPU supervisor with
integrated EEPROM, SRAM, and 4 programmable non-volatile
GPIO pins. The CONFIG_DS4510 define enables support
for the device while the CONFIG_CMD_DS4510 define
enables the ds4510 command. The additional
CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and
CONFIG_DS4510_RST defines add additional sub-commands
to the ds4510 command when defined.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The iteration limit is passed to mtest as a fourth parameter:
[start [end [pattern [iterations]]]]
If no fourth parameter is supplied, there is no iteration limit and the
test will loop forever.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Moved driver vcth.c to vct.c to better reflect the VCT board series.
This driver is now used by the VCT platforms:
vct_premium
vct_platinum
vct_platinumsvc
Signed-off-by: Stefan Roese <sr@denx.de>
Support bootdelay=0 in abortboot for the CONFIG_AUTOBOOT_KEYED case
similar to the CONFIG_ZERO_BOOTDELAY_CHECK support for the
!CONFIG_AUTOBOOT_KEYED case.
Do this by reversing the loop so we do at least one iteration before
checking for timeout.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Reset function specific to AMD SC520 microcontroller - Is more of a
'hard reset' that the triple fault.
Requires CONFIG_SYS_RESET_SC520 to be defined in config
I would have liked to add this to a new file (cpu/i386/sc520/reset.c)
but ld requires that a object file in a library arhive MUST contain
at least one function which does not override a weak function (and is
called from outside the object file) in order for that object file to
be extracted from the archive. This would be the only function on the
new file, and hence, will never get linked in.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Moved from interrupts.c to cpu.c and made into a weak function to
allow vendor specific override
Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be
added to the vendor specific code without the need to remember to
#undef usage of the generic method and if you forget to include your
custom reset method, you will always get the default.
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Brings i386 in line with other CPUs with a reset vector and frees up reset.c
for CPU reset functions
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
This patch extracts the identical config options for the
keymile boards mgcoge, mgsuvd and kmeter1 in a new
common config file keymile-common.h.
Signed-off-by: Heiko Schocher <hs@denx.de>
Check the presence of the PIGGY on the keymile boards mgcoge,
mgsuvd and kmeter1. If the PIGGY is not present, dont register
this Ethernet device.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
This patch adds support for the kmeter1 board from Keymile,
based on a Freescale MPC8360 CPU.
- serial console on UART 1
- 256 MB DDR2 RAM
- 64 MB NOR Flash
- Ethernet RMII Mode over UCC4
- PHY SMSC LAN8700
Signed-off-by: Heiko Schocher <hs@denx.de>
Add a do_div() wrapper, lldiv(). The new inline function doesn't modify
the dividend and returns the result of division, so it is useful
in complex expressions, i.e. "return(a/b)" -> "return(lldiv(a,b))"
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The eLBC only handles 32-bit physical address in systems with 36-bit
physical. The previos generation of LBC handled 34-bit physical
address in 36-bit systems. Added a new CONFIG option to convey
the difference between the LBC and eLBC.
Also added defines for XAM bits used in LBC for the extended 34-bit
support.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use the new BR_ADDR macro to properly setup the address field of the
localbus chipselects used by NAND.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS,
and prints each CPU's frequency separately. It also fixes up each CPU's
frequency in "clock-frequency" of fdt blob.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
The wake up ARP feature need use the memory to process
wake up packet, we enable auto self refresh to support it.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Some 85xx processors have the advanced power management feature,
such as wake up ARP, that needs enable the automatic self refresh.
If the DDR controller pass the SR_IT (self refresh idle threshold)
idle cycles, it will automatically enter self refresh. However,
anytime one transaction is issued to the DDR controller, it will
reset the counter and exit self refresh state.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
- The DDR3 controller is expanding the bits for timing config
- Add the DDR3 32-bit bus mode support
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
According to the latest 8572 UM, the DDR3 controller
is expanding the bit mask, and we use the extend ACTTOPRE
mode when tRAS more than 19 MCLK.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Introduce a new define to seperate out the virtual address that PCI
IO space is at from the physical address. In most situations these are
mapped 1:1. However any code accessing the bus should use VIRT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Introduce a new define to seperate out the virtual address that PCI
memory is at from the physical address. In most situations these are
mapped 1:1. However any code accessing the bus should use VIRT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields
of TLBs. This is what we should have always been using from the start.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead
of _IO_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead
of _MEM_BASE so we are more explicit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and
maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Added a PIXIS_BASE_PHYS for use as the physical address and maintain
PIXIS_BASE as the virtual address of the PIXIS fpga registers.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
This patch will create a new board, SIMPC8313, from Sheldon Instruments. This
board boots from NAND devices and is configureable for either large or small
page devices. The board supports non-soldered DDR2, one ethernet port, a
Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected
to the eLBC providing glue logic to a TMS320C67xx DSP.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Error with CONFIG_NAND_LEGACY in common/cmd_nand.c:
With current code "nand read.jffs2s" (read and skip bad blocks) is always interpreted as
"nand read.jffs2" (read and fill bad blocks with 0xff). This is because ".jffs2" is
tested before ".jffs2s" and only the first two characters are compared.
Correction:
Test for ".jffs2s" first and compare the first 7 characters.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
changes the default from 8 to 1 for the legacy and the new MTD
NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
in the board config files because none of the boards use multi
chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
define
#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
but that's bogus and did not work anyhow.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
We load the secondary stage u-boot image from NAND to
system memory by nand_load, but we did not flush d-cache
to memory, nor invalidate i-cache before we jump to RAM.
When the system has cache enabled and the TLB/page attribute
of system memory is cacheable, it will cause issues.
- 83xx family is using the d-cache lock, so all of d-cache
access is cache-inhibited. so you can't see the issue.
- 85xx family is using d-cache, i-cache enable, partial
cache lock. you will see the issue.
This patch fixes the cache issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Enable nand lock, unlock and status of lock feature.
Not every device and platform requires this, hence,
it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK
Nand unlock and status operate on block boundary instead
of page boundary. Details in:
http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT
Intial solution provided by Vikram Pandita <vikram.pandita@ti.com>
Includes preliminary suggestions from Scott Wood
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Rather than putting the function prototype for board_nand_init() in the one
place where it gets called, put it into nand.h so that every place that also
defines it gets the prototype. Otherwise, errors can go silently unnoticed
such as using the wrong return value (void rather than int) when defining
the function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
- Add subpage write support
- Add onenand_oob_64/32 ecclayout
This has been missing and without it UBI has some incompatibilies issues
with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is
placed differently (2048 instead of 512) without this fix.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Update OneNAND command to support bad block awareness.
Also change the OneNAND command style to better match the
NAND version.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
The version (ver_id) was not stored in the onenand_chip structure and
because of this the continuous locking scheme could be enabled on some
chips.
Signed-off-by: Stefan Roese <sr@denx.de>
This ensures that subsequent accesses properly hit the new window.
The dcbi during the NAND loop was accidentally working around this;
it's no longer necessary, as the cache is not enabled.
Reported-by: Suchit Lepcha <Suchit.Lepcha@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card
provides two PCI-E (x2) ports. Though, only one port can be used in x2
mode. Two ports can function simultaneously in x1 mode.
PCI-E x1/x2 modes can be switched via "pex_x2" environment variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.
The patch is based on Tony Li and Dave Liu work[1].
Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.
To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.
[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html
Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do
not enable them. See the MPC8349EA Reference Manual, Section 4.4.2
"Clocking in PCI Agent Mode".
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.
The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.
When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.
Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently there are in excess of 100 bytes located at the beginning of the image
built by start.S that are not being utilized. This patch moves a few functions
into this part of the image. This will create a greater number of *available*
bytes that can be used by board specific code in NAND builds and will decrease
the size of the assembled code in other builds.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The x86 based version of Darwin behaves the same quirky way as the powerpc
Darwin, so only check HOSTOS when setting up Darwin workarounds.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The code in fdt_resize() to extend the fdt size to end on a page boundary
is wrong for fdt's not located at an address aligned on a page boundary.
What's even worse, the code would make actualsize shrink rather than grow
if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(),
causing fdt_add_mem_rsv to fail.
Fix it by aligning end address (blob + size) to a page boundary instead.
For aligned fdt's this is equivalent to what we had before.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
lowlevel_init of SH was corrected to use the write/readXX macro.
However, there was a problem that was not able to be compiled partially.
This patch corrected this.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Parallel builds would occasionally issue this build warning:
ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists
Use "ln -sf" as quick work around for the issue.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds esd's loadpci BSP command to CPCI4052 and
CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch cleans up CPCI405 board support:
- wrap long lines
- unification of spaces in function calls
- remove dead code
Use correct io accessors on peripherals.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch turns on the auto RS485 mode in the 2nd external
uart on PLU405 boards. This is a special mode of the used
Exar XR16C2850 uart. Because these boards only have a 485 physical
layer connected it's a good idea to turn it on by default.
Signed-off-by: Matthias Fuchs <mf@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
- Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode,
all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0
can not access PIXIS_BASE anymore (any access will cause DataTLBError exception)
- Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
So that we can locate the DDR tlb start entry to the value other than 8. By
default, it is still 8.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
The IO port selection for MPC8544DS board:
Port cfg_io_ports
PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
PCIE2 0x4, 0x5, 0x6, 0x7
PCIE3 0x6, 0x7
This patch changes the PCIE12 and PCIE2 logic more readable.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of
PCIE1 bit.
On MPC8572DS board, PCIE refers to PCIE1.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The IO port selection is not correct on MPC8572DS and MPC8544DS board.
This patch fixes this issue.
For MPC8572
Port cfg_io_ports
PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf
PCIE2 0x3, 0x7
PCIE3 0x7
For MPC8544
Port cfg_io_ports
PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
PCIE2 0x4, 0x5, 0x6, 0x7
PCIE3 0x6, 0x7
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately. This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Rename _BASE to _BUS, as it's actually a PCI bus address,
separate virtual and physical addresses into _VIRT and _PHYS,
and use each appopriately. This makes the code easier to read
and understand, and facilitates mapping changes going forward.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Many of the Blackfin board linker scripts are preprocessed, so make sure we
output the linker script into the build tree rather than the source tree.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure all .text sections get pulled in and the entry point is properly
referenced so they don't get discarded when linking with --gc-sections.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
In order to boot an LDR out of parallel flash, the ldr utility needs a few
flags to tell it to generate the right header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Currently MPC85xx and MPC86xx boards just calculate the localbus frequency
and print it out, but don't save it.
This changes where its calculated and stored to be more consistent with the
CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock.
The localbus frequency is added to sysinfo and calculated when sysinfo is
set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are.
get_clocks() copies the frequency into the global data, as the other
frequencies are, into a new field that is only enabled for MPC85xx and
MPC86xx.
checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency
from sysinfo, like the other frequencies, instead of calculating it on the
spot.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
The clock divider for the MPC8568 local bus should be doubled, like the
other newer MPC85xx chips.
Since there are now more chips with a 2x divider than a 1x, and any new
85xx chips will probably be 2x, invert the sense of the #if so that it
lists the 1x chips instead of the 2x ones.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
If one custom board is using the 8MB flash, it is set
as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000.
The current start.S code will be broken at switch_as.
It is because the TLB1[15] is set as 16MB page size,
EPN = TEXT_BASE & 0xff000000, RPN = 0xff000000.
For the 8MB flash case, the EPN = 0xefxxxxxx,
RPN = 0xffxxxxxx. Assume the virt address of switch_as
is 0xef7ff18c, the real address of the instruction at
switch_as should be 0xff7ff18c. the 0xff7ff18c is out
of the range of the default 8MB boot LAW window
0xff800000 - 0xffffffff.
So when we switch to AS1 address space at switch_as,
the core can't fetch the instruction at switch_as any
more. It will cause broken issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The values given for the PHY address were wrong, so the code
read no valid PHY ID, and fell through to the generic PHY
support, which would work on 1000M but would not auto negotiate
down to 100M or 10M.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
These interfaces don't have usable connectors on the board, so don't
bother enumerating or configuring them.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Assuming the OSes exception vectors start from the base of kernel address, and
the kernel physical starting address can be relocated to an non-zero address.
This patch enables the second core to have a valid IVPR for debugger before
kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid
value for second core which runs kernel at different physical address other
than 0x0.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.
In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It
should be safe as the fifth bit was defined as reserved and set to 0.
Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
Export the localbus frequency in the device tree, the same way the CPU, TB,
CCB, and various other frequencies are exported in their respective device
tree nodes.
Some localbus devices need this information to be programed correctly, so
it makes sense to export it along with the other frequencies.
Unfortunately, when someone wrote the localbus dts bindings, they didn't
bother to define what the "compatible" property should be. So it seems no
one was quite sure what to put in their dts files.
Based on current existing dts files in the kernel source, I've used
"fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all
of the 85xx devices, and are looked for by the Linux code. The eLBC is
apparently not entirely backward compatible with the pq3 LBC and so eLBC
equipped platforms like 8572 won't use pq3-localbus.
For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems
and is also looked for by the Linux code. On MPC8641, I've also used
"fsl,mpc8641-localbus" as it is also commonly used in dts files, some of
which don't use "fsl,elbc" or any other acceptable name to match on.
Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
The current code that determines which bank/chipselect is used for a
given NAND instance only worked for 32-bit addresses and assumed
a 1:1 mapping. This breaks in 36-bit physical configs.
The proper way to handle this is to use the virt_to_phys() and
BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address
with the the virtual address the NAND code uses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Scott Wood <scottwood@freescale.com>
If we have addr map support enabled use the mapping functions to
implement virt_to_phys() and map_physmem().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Initial support for Extreme Engineering Solutions XPedite5200 -
a MPC8548-based PMC single board computer.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Update X-ES Freescale boards to allow inbound PCI configuration
cycles when configured as agent/endpoint.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Initial support for Extreme Engineering Solutions XPedite5370 -
a MPC8572-based 3U VPX single board computer with a PMC/XMC
site.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Initial support for NXP's 4 and 8 bit I2C gpio expanders
(eg pca9537, pca9557, etc). The CONFIG_PCA953X define
enables support for the devices while the CONFIG_CMD_PCA953X
define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO
define enables an 'info' sub-command which provides summary
information for the given pca953x device.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Add fsl_pci_config_unlock() function to enable a
PCI/PCIe interface configured in agent/endpoint mode to
respond to inbound PCI configuration cycles.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The second definition introduced by 65e43a1063 conflicts with the
existing one.
Also, convert the existing definition to use phys_addr_t. The volatile
qualifier is still needed due to brain damage elsewhere.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Apply changes from commit 44b4dbed to board/trab/memory.c, too.
Actually we'd need a major cleanup here - as it turns out,
board/trab/memory.c is more or less a verbatim copy of
post/drivers/memory.c ... but then, trab is EOL anyway,r
so this is not worth the effort.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Otherwise, recursion can occur if scan_bbt does not find a bad block
table, and tries to write one, and the attempt to erase the BBT area
causes a bad block check.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Include <linux/mtd/compat.h> header for min_t definition instead of
providing our own one. Removes warnings in case of OneNAND support
enabled.
Although I thinks it's a bit silly to include <linux/mtd/compat.h>
just for min_t...
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
Casting a pointer to a phys_addr_t when it's an unsigned long long
on a 32-bit system without first casting to a non-pointer type
generates a compiler warning. Fix this.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Parallel builds (using "make -jN") would occasionally fail with error
messages like
ppc_4xxFP-objdump: string.o: File format not recognized
or
post/libpost.a(cpu.o): In function `cpu_post_test':
/home/wd/git/u-boot/work/post/lib_ppc/cpu.c:130: undefined reference to `cpu_post_test_string'
or similar. We now make sure to run the 'postdeps" step before
attempting to build the specific POST libraries.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Parallel builds (using "make -jN") would occasionally fail with error
messages like
include/autoconf.mk:212: *** missing separator. Stop.
Line numbers and affected boards were changing. Obviously some
Makefiles included autoconf.mk while it was still being written to.
As a fix, we now write to a temporary file first and then rename it,
so that it is really ready to use as soon as it appears.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The stmicro_wait_ready() func tries to show the actual opcode that was sent
to the device, but instead it displays the array pointer. Fix it to pull
out the opcode from the start of the array.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If both CONFIG_ENV_SECT_SIZE and CONFIG_ENV_SIZE are defined, and the sect
size is larger than the env size, then it means the env is embedded in a
block. So we have to save/restore the part of the sector which is not the
environment. Previously, saving the environment in SPI flash in this
setup would probably brick the board as the rest of the sector tends to
contain actual U-Boot data/code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
All implementations of the functions i2c_reg_read() and
i2c_reg_write() are identical. We can save space and simplify the
code by converting these functions into inlines and putting them in
i2c.h.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-By: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- It is possible to miss flush/invalidate the last
cache line, we fix it at here.
- add the volatile and memory clobber.
They are pointed by Scott Wood.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Add a library that helps in translating between virtual and physical
addresses. This library can be useful as a simple means to implement
map_physmem() and virt_to_phys() for platforms that need functionality
beyond the simple 1:1 mapping.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
virt_to_phys() returns the physical address given a virtual. In most
cases this will be just the input value as the vast majority of
systems run in a 1:1 mode.
However in systems that are not running this way it should report the
physical address or ~0 if no mapping exists for the given virtual
address.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This warning is issued by modern ARM-EABI GCC on non-thumb targets.
Signed-off-by: Vladimir Panfilov <pvr@emcraft.com>
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
FDT support is used for both FIT style images and for architectures
that can pass a fdt blob to an OS (ppc, m68k, sparc).
For other architectures and boards which do not pass a fdt blob to an
OS but want to use the new uImage format, we just need FIT support.
Now we can have the 4 following configurations :
1) FIT only CONFIG_FIT
2) fdt blob only CONFIG_OF_LIBFDT
3) both CONFIG_OF_LIBFDT & CONFIG_FIT
4) none none
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch now adds a flush to the data cache upon relocation. The
current implementation is missing this. Only a comment states that it
should be done. So let's really do it now.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This
enables support for boards where the lowlevel initialization is
already done when U-Boot runs (e.g. via OnChip ROM).
This will be used in the upcoming VCTH board support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds the board_early_init_f() call to the MIPS init
sequence. A weak dummy implementation is also added which can be
overridden by a board specific version.
This will be used by the upcoming VCTH board support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds a call to onenand_init() for OneNAND support and moves
the nand_init() call to an earlier place, so that the environment can
be used from NAND and OneNAND.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
SH4 is different a value of CACHE_OC_NUM_ENTRIES and
CACHE_OC_WAY_SHIFT every CPU.
This patch corrects these values.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The address of SCFSR register is wrong at SH7720/SH7721.
This patch fix this.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
With this patch we set the type back to NONE upon failing UBI partition
initialization. Otherwise further calls to the UBI subsystem would try
to really access the non-existing UBI partition.
Thanks to Michael Lawnick for pointing this out.
Signed-off-by: Stefan Roese <sr@denx.de>
---
Microblaze platforms use generic settings and to have
many platforms is confusing that's why I decided to remove this
platform from U-BOOT. ml401 tree is sufficient for covering
all Microblaze platforms.
This change will go through microblaze custodian tree.
While the doc/README.NetConsole does have a snippet for people to
create their own netcat script, it's a lot easier to make a simple
dedicated script and tell people to use it.
Also spruce it up a bit to make it user friendly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The FAT file system driver should also handle FAT on SATA devices.
Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the
following warnings from FDT:
include/libfdt_env.h:50: warning: redefinition of 'uintptr_t'
/usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here
Fix: Protect the definition of uintptr_t when compiling on the host
system.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
As we moved data_crc() invocation from jffs2_1pass_build_lists() to
jffs2_1pass_read_inode() data_crc is going to be calculated on each
inode access. This patch adds caching of data_crc() results. There
is no significant improvement in speed (because of flash access
caching added in previous patch I think, crc in RAM is really fast)
but this patch impacts memory usage -- every b_node structure uses
12 bytes instead of 8.
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch adds support for reading fs information from summary
node instead of scanning full eraseblock.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
With this patch JFFS2 code allocates memory buffer of max_totlen size
(size of the largest node, calculated during scan time) and uses it to
store entire node. Speeds up loading. If malloc fails we use old ways
to do things.
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Rewrites jffs2_1pass_build_lists() function in style of Linux's
jffs2_scan_medium() and jffs2_scan_eraseblock().
This includes:
- Caching flash acceses
- Smart dealing with free space
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
We need to update i_version inside cycle to find really latest version
inside jffs2_1pass_list_inodes(). With that fixed we can use isize inside
dump_inode() instead of calling expensive jffs2_1pass_read_inode().
Signed-off-by: Alexey Neyman <avn@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Hi,
I found a bug when working with the u-boot USB subsystem on IXP425 processor
(big endian Xscale aka ARMv5).
I recognized that the second usb_endpoint_descriptor of the attached memory
stick was corrupted.
The reason for this are the packed structures below (either u-boot and
u-boot-usb):
--------------
/* Endpoint descriptor */
struct usb_endpoint_descriptor {
unsigned char bLength;
unsigned char bDescriptorType;
unsigned char bEndpointAddress;
unsigned char bmAttributes;
unsigned short wMaxPacketSize;
unsigned char bInterval;
unsigned char bRefresh;
unsigned char bSynchAddress;
} __attribute__ ((packed));
/* Interface descriptor */
struct usb_interface_descriptor {
unsigned char bLength;
unsigned char bDescriptorType;
unsigned char bInterfaceNumber;
unsigned char bAlternateSetting;
unsigned char bNumEndpoints;
unsigned char bInterfaceClass;
unsigned char bInterfaceSubClass;
unsigned char bInterfaceProtocol;
unsigned char iInterface;
unsigned char no_of_ep;
unsigned char num_altsetting;
unsigned char act_altsetting;
struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS];
} __attribute__ ((packed));
------------
As usb_endpoint_descriptor is only 7byte in length, the start of all
odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize
of these structures also not word aligned.
ARMv5 Architecture however does not support non-aligned multibyte
data type (see A2.8 of ARM Architecture Reference Manual).
Signed-off-by: Stefan Althoefer <stefan.althoefer@web.de>
Signed-off-by: Remy Böhmer <linux@bohmer.net>
fsl_pci_init.c: In function 'fsl_pci_setup_inbound_windows':
fsl_pci_init.c:122: warning: comparison is always true due to limited range of data type
The check only makes sense if we are CONFIG_PHYS_64BIT
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Since commit 561858ee building for FADS823 and RRvision
doesn't work. Let's include version.h and timestamp.h
unconditionally to fix the problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
With this patch now, the user can call "ubi part" multiple times to
re-connect the UBI device to another MTD partition.
Signed-off-by: Stefan Roese <sr@denx.de>
Don't use LIST_HEAD() but initialize the struct via INIT_LIST_HEAD() upon
first call of add_mtd_partitions(). Otherwise this won't work on platforms
where the relocation is broken (like MIPS or PPC).
Signed-off-by: Stefan Roese <sr@denx.de>
Add logic to the MAKEALL script to determine the number of CPU cores
on the system, and run a parallel build if there is more than one.
Usually this significantrly accelerates builds.
Allow to manually adjust the number of parallel make jobs by using
the "BUILD_NCPUS" environment variable.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some Make script commands rely on bash-specific features like brace
expansion, so default to bash for the SHELL variable with a fallback
to the standard sh shell
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
rename devices_init () in common/jffs2.c to
jffs2_devices_init (), because there is also a
devices_init () in common/devices.c.
Signed-off-by: Heiko Schocher <hs@denx.de>
Modifications to support console multiplexing. This is controlled using
CONFIG_SYS_CONSOLE_MUX in the board configuration file.
This allows a user to specify multiple console devices in the environment
with a command like this: setenv stdin serial,nc. As a result, the user can
enter text on both the serial and netconsole interfaces.
All devices - stdin, stdout and stderr - can be set in this manner.
1) common/iomux.c and include/iomux.h contain the environment setting
implementation.
2) doc/README.iomux contains a somewhat more detailed description.
3) The implementation in (1) is called from common/cmd_nvedit.c to
handle setenv and from common/console.c to handle initialization of
input/output devices at boot time.
4) common/console.c also contains the code needed to poll multiple console
devices for input and send output to all devices registered for output.
5) include/common.h includes iomux.h and common/Makefile generates iomux.o
when CONFIG_SYS_CONSOLE_MUX is set.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
When running `strings` on really long strings, the stack tends to get
smashed due to printf(). Switch to puts() instead since we're only passing
the data through.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
- fix size too small by one in sprintf
- changed old (pre 2004) device name ibmEmac to emac
- boot device may be overriden in board config
- servername may be defined in board config
- additional parameters may be defined in board config
- fixed some line wrappings
- replaced redundant MAX define by max
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Currently the arm926ejs tree has the armv4 option set during compilation.
This flag does not belong here because a arm926 CPU is always a armv5 CPU.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
This patch adds the possiblity to choose the media where the environment will
be located. This allow to choose this fundamental configuration without editing
config files.
Documentation file added.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Stelian Pop <stelian@popies.net>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Commit 6b59e03e02
lcd: Let the board code show board-specific info
introduced some bugs which prevent U-Boot building
for lwmon board if CONFIG_LCD_INFO_BELOW_LOGO will
be defined in the board configuration.
Also "LCD enabled" building for TQM823L doesn't work
since this commit.
This patch fixes above-mentioned issues.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
The TftpStart() function modifies the 'BootFile'
string when 'BootFile' contains both an IP address
and filename (eg 1.2.3.4:/path/file). This causes
subsequent calls to TftpStart to incorrectly parse
the TFTP filename and server IP address to use.
For example:
=> tftp 0x100000 10.52.0.62:/home/ptyser/non_existant
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.62; our IP address is 10.52.253.79
^^^^^^^^^^ CORRECT
Filename '/home/ptyser/non_existant'.
^^^^^^^^^^^^^^^^^^^^^^^^^ CORRECT
Load address: 0x100000
Loading: *
TFTP error: 'File not found' (1)
Starting again
eTSEC2: No link.
Speed: 100, half duplex
Using eTSEC1 device
TFTP from server 10.52.0.33; our IP address is 10.52.253.79
^^^^^^^^^^ WRONG
Filename '10.52.0.62'.
^^^^^^^^^^ WRONG
Load address: 0x100000
Loading: *
TFTP error: 'File not found' (1)
Starting again
TftpStart() was modified to not modify the 'BootFile' string.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ignore IP packets which have the "more fragments" flag bit
set. This flag indicates the IP packet is fragmented and
must be ignored by U-Boot.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch tries to ensure that phy interrupt pin
won't be asserted after booting. We experienced
following issues with current 88E1121R phy init:
Marvell 88E1121R phy can be hardware-configured
to share MDC/MDIO and interrupt pins for both ports
P0 and P1 (e.g. as configured on socrates board).
Port 0 interrupt pin will be shared by both ports
in such configuration. After booting Linux and
configuring eth0 interface, port 0 phy interrupts
are enabled. After rebooting without proper eth0
interface shutdown port 0 phy interrupts remain
enabled so any change on port 0 (link status, etc.)
cause assertion of the interrupt. Now booting Linux
and configuring eth1 interface will cause permanent
phy interrupt storm as the registered phy 1 interrupt
handler doesn't acknowledge phy 0 interrupts. This
of course should be fixed in Linux driver too.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
When CONFIG_SYS_HUSH_PARSER is defined network download
commands with 1 argument in the format 'tftp "/path/file"'
do not work as expected. The hush command parser strips
the quotes from "/path/file" which causes the network
commands to interpret "/path/file" as an address
instead of the intended filename.
The previous check for a leading quote in netboot_common()
was replaced with a check which ensures only valid
numbers are treated as addresses.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This code contains some non-ascii characters in comment lines and code.
Most editors do not display those characters properly and editing those
files results always in diffs at these places which are usually not required
to be changed at all. This is error prone.
So, remove those weird characters and replace them by normal C-style
equivalents for which the proper defines were already in the header.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
The default DDR freq is 400MHz or 800M data rate,
the old settings is pure wrong for the default case.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Moved up the initialization of GD so C code like set_tlb() can use
gd->flags to determine if we've relocated or not in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
If the virtual address for CCSRBAR is the same after relocation but
the physical address is changing we'd end up having two TLB entries with
the same VA. Instead we new us the new CCSRBAR virt address + 4k as a
temp virt address to access the old CCSRBAR to relocate it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
The BR_PHYS_ADDR macro is useful on all machines that have local bus
which is pretty much all 83xx/85xx/86xx chips.
Additionally most 85xx & 86xx will need it if they want to support
36-bit physical addresses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Add define used to determine if PCI1 interface is in PCI or PCIX mode.
Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The current code will cause the creation of a 4GB window
starting at 0 if we have more than 4GB of RAM installed,
which overlaps with PCI_MEM space and causes pci_bus_to_phys()
to return erroneous information. Limit the size to 4GB - 1;
which causes the code to create one 2GB and one 1GB window
instead.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Prevent further viral propogation of the unused
symbol CONFIG_L1_INIT_RAM by just removing it.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
since commit be0bd8234b
tlb entry for socrates DDR SDRAM will be reconfigured
by setup_ddr_tlbs() from initdram() causing an
inconsistency with previously configured DDR SDRAM tlb
entry from tlb_table:
socrates>l2cam 7 9
IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS
7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX
8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX
9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX
This patch makes the presence of the DDR SDRAM tlb entry in
the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this
inconsistency.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction from an I/O master tagged to make
quick forward progress is present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
This patch fix the problem that only the [NB_DATAFLASH_AREA - 1] dataflash
partition can be defined to use the area to the end of dataflash size.
Now it is possible to have only one dataflash partition from 0 to the end
of of dataflash size.
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Without this patch "saveenv" crashes when MTD partitions are enabled (e.g.
for use in UBI) via CONFIG_MTD_PARTITIONS.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Introducing 64-bit (36-bit) support for the MPC8641HPCN
failed to accomodate the other two 86xx boards.
Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH}
CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L}
with nominal 32-bit values.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
This caused the operation to be needlessly repeated if there were
no bad blocks and no errors.
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This BSP should be outside u-boot source tree.
The second reason is that xilinx ppc405 was moved to generic platform.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch disables some unused features from the PCI405 configuration
to keep U-Boot image size below 192k.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch extracts the identical config options for the
keymile boards mgcoge, mgsuvd and kmeter1 in a new
common config file keymile-common.h.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Check the presence of the PIGGY on the keymile boards mgcoge,
mgsuvd and kmeter1. If the PIGGY is not present, dont register
this Ethernet device.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if
CONFIG_AT91RM9200 is defined and nor preloader is used.
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
Remove a printf() from add_mtd_device(), which produces spurious output.
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add cfi-mtd driver, which exports CFI flash to MTD layer.
This allows CFI flash devices to be used from MTD layer.
Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD
option. Initialization is done by calling cfi_mtd_init() from
flash_init().
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add interface for flash verbosity control. It allows
to disable output from low-level flash API. It is useful
when calling these low-level functions from context other
than flash commands (for example the MTD/CFI interface
implmentation).
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Export flash_sector_size() function from drivers/mtd/cfi_flash.c,
so that it can be used in the upcoming cfi-mtd driver.
Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch defines all flash access functions as weak so that
they can be overridden by board specific versions.
This will be used by the upcoming VCTH board support where the NOR
FLASH unfortunately can't be accessed memory-mapped. Special
accessor functions are needed here.
To enable this weak functions you need to define
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS in your board config header.
Otherwise the "old" default functions will be used resulting
in smaller code.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Currently the size parameters of the UBI commands (e.g. "ubi write") are
decoded as decimal instead of hex as default. This patch now interprets
all these values consistantly as hex, as all other standard U-Boot commands
do.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables support for EXT2, and increases the
CONFIG_SYS_BOOTMAPSZ size for the default configuration
of the katmai boards to use them as the RAID-reference
AMCC setups.
EXT2 enabling allows one to boot kernels from the EXT2
formatted Compact Flash cards.
CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the
Linux kernels, which use PAGE_SIZE of 256KB. Otherwise,
the memory area with DTB file (which is placed at the
end of the bootmap area) will turn out to be overlapped
with the BSS segment of the 256KB kernel, and zeroed
in early_init() of Linux.
Actually, increasing of the bootmap size could be done
via setting of the bootm_size U-Boot variable, but it looks
like the current U-Boot implementation have some bootm_size-
related functionality lost. In many places through the U-Boot
code the CONFIG_SYS_BOOTMAPSZ definition is used directly
(instead of trying to read the corresponding value from the
environment). The same is truth for the boot_jump_linux()
function in lib_ppc/bootm.c, where U-Boot transfers control
to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size)
value to the booting kernel.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Expanded OCM TLB to allow access to 64K OCM as well as 256K of
internal SRAM.
Adjusted internal SRAM initialization to match updated user
manual recommendation.
OCM & ISRAM are now mapped as follows:
physical virtual size
ISRAM 0x4_0000_0000 0xE300_0000 256k
OCM 0x4_0004_0000 0xE304_0000 64k
A single TLB was used for this mapping.
Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.
Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.
Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The definitions of bits in SDR_CFG are incorrect, and not used within
U-Boot. Therefore, they can be removed.
The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions,
and are unused, so they can be removed too.
A definition for SDR0_DDRCFG is added.
Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch corrects a small bug in the "if" condition:
the parameter "flag" is 0 and the "if" condition is always true.
The result is - the boom command doesn't start the kernel.
Affected targets: all arm based.
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
At least some (old ?) versions of the AT91Bootstrap do not set up the
PLLB correctly to 48 MHz in order to make USB host function correctly.
This patch sets up the PLLB to the same values Linux uses, and makes USB
work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263
This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all
the relevant AT91CAP9/AT91SAM9 atmel boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Introduce AT91_CPU_CLOCK and use it for displaying the CPU
speed in the LCD driver.
Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the
corresponding board clocks.
Signed-off-by: Stelian Pop <stelian@popies.net>
This patch adds support for the kmeter1 board from Keymile,
based on a Freescale MPC8360 CPU.
- serial console on UART 1
- 256 MB DDR2 RAM
- 64 MB NOR Flash
- Ethernet RMII Mode over UCC4
- PHY SMSC LAN8700
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This is needed on Canyonlands which still has an exception pending
while running relocate_code(). This leads to a failure after trap_init()
is moved to the top of board_init_r().
Signed-off-by: Stefan Roese <sr@denx.de>
modify the CAS timings. my understanding is that these
settings decrease various wait times in the DDR interface.
Because these wait times are in clock cycles, and the DDR
clock on the 8315 RDB runs slower than on some other 83xx
platforms, we can dial down these values without a problem,
thereby decreasing the latency of memory a little.
Signed-off-by: Howard Gregory <Greg.Howard@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI
macro.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds these UBI commands:
ubi part [nand|onenand] [part] - Show or set current partition
ubi info [l[ayout]] -Display volume and UBI layout information
ubi create[vol] volume [size] [type] - Create volume name with size
ubi write[vol] address volume size - Write volume from address with size
ubi read[vol] address volume [size] - Read volume to address with size
ubi remove[vol] volume - Remove volume
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds basic UBI (Unsorted Block Image) support to U-Boot.
It's based on the Linux UBI version and basically has a "OS"
translation wrapper that defines most Linux specific calls
(spin_lock() etc.) into no-ops. Some source code parts have been
uncommented by "#ifdef UBI_LINUX". This makes it easier to compare
this version with the Linux version and simplifies future UBI
ports/bug-fixes from the Linux version.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This MTD part infrastructure will be used by the upcoming
UBI support.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
address-cells defaults to 2, not 1; so in the unlikely
event that it isn't specified, this patch is required
for correct operation.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Doing trap_init immediately once we're running from RAM
means we're no longer dependent on the physical location of
the flash on non-BookE platforms. Before trap_init, those
platforms switch to real mode and go to 0xfff00100 on exception.
After the switch, they go to 0x00000100 This makes it easier to
move the flash location.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Since we've changed the memory map of the board, be nice and
add some checking to try to catch out-of-date .dts files. We do
this by checking the CCSRBAR location in the .dts and comparing
it to the CCSRBAR location in u-boot. If they don't match, a
warning msg is printed. This isn't foolproof, but it's simple and
will catch most of the cases where an out-of-date .dts is present,
including all of the cases where a new u-boot is used with an old
standard MPC8641 .dts file as supplied with Linux.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled. With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations. This means we have to distinguish between
the two in the config file. The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.
Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.
The regions for some of the mappings were far larger than they
needed to be. I have reduced the mappings to match the
actual sizes supported by the hardware.
In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them. These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.
Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
We define CONFIG_MONITOR_BASE_EARLY to define the initial location
of the bootpage in flash. Use this to create an early mapping
definition for the FLASH, and change the early_bats code to use this.
This change facilitates the relocation of the flash since the early
mappings are no longer tied to the final location of the flash.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Using a mtmsr/blr means that you have to be executing at the
same virtual address once you enable translation. This is
unnecessarily restrictive, and is not really how this is
usually done. Change it to use the more common mtspr SRR0/SRR1
and rfi method.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
There's a lot of setup and foo for the second flash
bank. The problem is, this board doesn't actually have one.
Clean this up. Also, the flash is 8M in size. Get rid
of the confusing aliased overmapping, and just map 8M.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
It's currently defined twice inside in an if/else block, but
both halves set the same value. Move the define outside
the if.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
In order to later allow for a physical relocation of the
flash, setup_bats, which sets up the final BAT mapping
for the board, needs to happen *after* init_laws().
Otherwise, there will be no window programmed for the flash
at the new physical location at the point when we change
the mmu translation.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c.
This adds support for PHY-less MAC connections to the UEC.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Also changed path in all linker scripts that reference this driver
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Affected boards:
Several MPC8xx boards
Several MPC8260/MPC8272 boards
Several MPC85xx boards
Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init
as a part of ongoing eth_initialize cleanup work. The function ret value
is also fixed as it should be negative on fail.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and
PKTSIZE_ALIGN bytes long.
Acked-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current uec_miiphy_read and uec_miiphy_write hardcode access devlist[0]
This patch makes these function use the devname argument that is passed in to
allow access to the phy registers of other devices in devlist[].
Signed-of-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
AT91_BASE_EMAC is never used outside the board specific files,
so replace its usage by the board specific AT91xxx_BASE_EMAC.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined.
Since they are never used outside the board specific files, they can
be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 /
AT91xxx_ID_US2.
Bug spotted by Jesus Alvarez <jalvarez@micromint.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch provides support for AFEB9260 board, a product of
OpenSource hardware and software. Some commertial projects
are made with this design. A board is basically AT91SAM9260-EK
with some modifications and different peripherals and different
parts used. Main purpose of this project is to gain experience in
hardware design.
More info: http://groups.google.com/group/arm9fpga-evolution-board
(In Russian only, sorry).
Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory.
It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap
Signed-off-by: Roman Mashak <romez777@gmail.com>
We put the bootpg for the secondary cpus into memory and use
BPTR to get to it. This is a step towards converting to the
ePAPR boot methodology. Also, the code is written to
deal properly with more than 4GB of RAM.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
There are several items in the config file that were hardcoded
but that should really be based on other config options, since
the regions are contiguous and depend on being so. This cleans
that up a bit. Also, add BR_PHYS_ADDR() macro to convert
addresses into the proper format for BR registers.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Currently, the CCSR gets relocated while translation is
enabled, meaning we need 2 BAT translations to get to both the
old location and the new location. Also, the DEFAULT
CCSR location has a dependency on the BAT that maps the
FLASH region. Moving the relocation removes this unnecessary
dependency. This makes it easier and more intutive to
modify the board's memory map.
Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same
BAT for CCSR space.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
You can't actually have both, and with some coming changes to
change the memory map for the board and support 36-bit physical,
we need the extra BAT that is being consumed by having both.
I also make non-PCI configs build cleanly, for the sake of sanity.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Fix compilation issue caused by a few mismatches.
Provide proper nand chip select enable/disable in
nand_hwcontrol() rather than in board_nand_init()
just enable once. Remove redundant local nand driver
functions - nand_read_byte(), nand_write_byte() and
nand_dev_ready() to use common nand driver.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
The error was caused by the change for strmhz() in cpu.c.
A few of them were one extra close parenthesis.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Will use mcfmii.c driver in drivers/net rather than
keep creating new mii.c for each future platform.
Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB,
M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB,
M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's
mii.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG,
MDHA, SKHA, INTC, and FlexBus structures and
definitions in immap_5xxx.h to more unify modules
header files. Append DSPI support for m547x_8x.
SSI cleanup. Remove USB Host structure from immap_539.h.
Apply changes to use FlexBus structures in mcf52x2's
cpu_init.c and platform configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Each different build for M54455EVB and M5235EVB will
create a u-boot.lds linker file. It is redundant to
keep the u-boot.lds
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
This removes in nand.h code that is verbatim duplicated from bbm.h,
including directly bbm.h in nand.h. The previous state of affairs
prevented compiling code for a board hosting both NAND and OneNAND chips.
Reported-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.
Singed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch fixes a problem on systems where the NOR flash is attached
to a 64 bit bus. The toggle bit detection in flash_toggle() is based
on the assumption that the same flash address is read twice without
any other interjacent flash accesses. However, on 32 bit systems the
function flash_read64() [as currently implemented] does not perform
an atomic 64 bit read - instead, this is broken down into two 32 bit
read accesses on addresses "addr" and "addr + 4". So instead of
reading a 64 bit value twice from "addr", we see a sequence of 4 32
bit reads from "addr", "addr + 4", "addr", and "addr + 4". The
consequence is that flash_toggle() fails to work.
This patch implements a simple, but somewhat ugly solution, as it
avoids the use of flash_read64() in this critical place (by breaking
it down manually into 32 bit read operations) instead of rewriting
flash_read64() such to perform atomic 64 bit reads as one could
expect. However, such a rewrite would require the use of floating
point load operations, which becomes pretty complex:
save MSR;
set Floating Point Enable bit in MSR;
use "lfd" instruction to perform atomic 64 bit read;
use "stfd" to store value to temporary variable on stack;
load u64 value from temporary variable;
restore saved MSR;
return u64 value;
The benefit-cost ratio of such an implementation was considered too
bad to actually attempt this, especially as we can expect that such
an implementation would not only have a bigger memory footprint but
also cause a performance degradation.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch brings PMC440 board support up to date:
- fix GPIO configuration
- add misc_init_f()
- use better values for usbact variable
- fix USB 2.0 phy reset sequence
- shrink BAR2 to save PCI address space
- add FDT support
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes esd's loadpci command when not all
memory on adapter boards is accessable via PCI.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Xilinx ppc440 and ppc405 have many similarities. This patch merge the
config files of both infrastuctures
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
There's currently an off-by-one bug in fdt_subnode_offset_namelen()
which causes it to keep searching after it's finished the subnodes of
the given parent, and into the subnodes of siblings of the original
node which come after it in the tree.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
fdt_add_mem_rsv() requires space for a struct fdt_reserve_entry
(16 bytes), so make sure that fdt_resize at least adds that much
padding, no matter what the location or size of the fdt is.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Andy Fleming <afleming@freescale.com>
The patch is following the commit 3924384060
mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.
lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
also, the r2 is used as global data pointer.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The current calculation will fail to cover all memory if
its size is not a power of two.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The commit 67256678f0 add
the another global data pointer save, but in fact the
global data pointer will be initialized in the board_init_r,
so remove it such as the 85xx/83xx family.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
The DDR controller of 86xx processors have the ECC data init
feature, and the new DDR code is using the feature, we don't
need the way with DMA to init memory again.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
We must invalidate TLBs before MMU turn on, but
currently the code is not, if there are some stale
TLB entry valid in the TLBs, it will cause strange
issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.
This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
make room for the increased code size with NAND enabled.
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
85xx can share them.
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.
Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This brings the core NAND code up to date with the Linux kernel.
Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.
I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Add the ability to break the steps of the bootm command into several
subcommands: start, loados, ramdisk, fdt, bdt, cmdline, prep, go.
This allows us to do things like manipulate device trees before
they are passed to a booting kernel or setup memory for a secondary
core in multicore situations.
Not all OS types support all subcommands (currently only start, loados,
ramdisk, fdt, and go are supported).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This removes a bit of code and makes it easier for the upcoming sub bootm
command support to call into the proper OS specific handler.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Renamed show_boot_progress in assembler init phase to
show_boot_progress_asm to avoid link conflicts with C version
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
The MPC8572 has a 4-bit wide PORDEVSR IO_SEL field. Other MPC85xx
processors have a 3-bit wide IO_SEL field but have the most
significant bit is wired to 0 so this change should not affect
them.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
The existing code has a few errors that need to be fixed in
order to support large RAM sizes. Fix those, and add a
comment to make it clearer.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
The information displayed when CONFIG_LCD_INFO is set is inherently
board-specific, so it should be done by the board code. The current code
dealing with this only handles two cases, and is already a horrible mess
of #ifdeffery.
Yes, this duplicates some code, but it also allows boards to print more
board-specific information; this used to be very difficult.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This allows the logo/info rendering routines to use the regular
lcd_putc/lcd_puts/lcd_printf calls.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
lcd_printf() has a prototype in include/lcd.h but no implementation. Fix
this by borrowing the lcd_printf() implementation from the cogent board
code (which appears to use its own LCD framework.)
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
If the board _didn't_ request INVLINE_INVERTED, we set INVLINE_INVERTED,
otherwise we don't. WTF?
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
atmel_lcdfb doesn't actually need anything from asm/arch/hardware.h. It
includes a file that does, asm/arch/gpio.h, but this file doesn't
include <asm/arch/hardware.h> like it's supposed to.
Add the missing include to asm/arch/gpio.h and remove the workaround
from the atmel_lcdfb driver. This makes the driver compile on avr32.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Add a common setup function that determines the pci_region(s) based
on how much memory we have in the system.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
* PCI Inbound window was setup incorrectly. The PCI address and system
address were swapped. The PCI address should be setting piwar/piwbear
and the system address should be setting pitar.
* Removed masking of addresses to allow for system address to support
system address & PCI address >32-bits
* Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses
* Respect the PCI_REGION_PREFETCH for inbound windows
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Added fdt_pci_dma_ranges() that parses the pci_region info from the
struct pci_controller and populates the dma-ranges based on it.
The max # of windws/dma-ranges we support is 3 since on embedded
PowerPC based systems this is the max number of windows.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
PCI bus is inherently 64-bit. While not all system require access to
the full 64-bit PCI address range some do. This allows those systems
to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
The 8572 DDR erratum1:
DDR controller may enter an illegal state when operating
in 32-bit bus mode with 4-beat bursts.
Description:
When operating with a 32-bit bus, it is recommended that
DDR_SDRAM_CFG[8_BE] is cleared when DDR2 memories are used.
This forces the DDR controller to use 4-beat bursts when
communicating to the DRAMs. However, an issue exists that
could lead to data corruption when the DDR controller is
in 32-bit bus mode while using 4-beat bursts.
Projected Impact:
If the DDR controller is operating in 32-bit bus mode with
4-beat bursts, then the controller may enter into a bad state.
All subsequent reads from memory is corrupted.
Four-beat bursts with a 32-bit bus only is used with DDR2 memories.
Therefore, this erratum does not affect DDR3 mode.
Work Arounds:
To work around this issue, software must set DEBUG_1[31] in
DDR memory mapped space (CCSRBAR offset + 0x2f00 for DDR_1
and CCSRBAR offset + 0x6f00 for DDR_2).
Currenlty, the code is using incorrect register DDR_SDRAM_CFG_2
as condition, but it should be DDR_SDRAM_CFG register.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Introduce CONFIG_E500MC to deal with the minor differences between
e500v2 and e500mc.
* Certain fields of HID0/1 don't exist anymore on e500mc
* Cache line size is 64-bytes on e500mc
* reset value of PIR is different
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle
e500mc's 64-byte cacheline properly when it gets added.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds support for the avnet fx12 minimodul.
It needs the "ppc4xx: Generic architecture for xilinx ppc405"
patch from Ricardo.
Signed-off-by: Georg Schardt <schardt@team-ctech.de>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
As "ppc44x: Unification of virtex5 pp440 boards" did for the xilinx
ppc440 boards, this patch presents a common architecture for all the
xilinx ppc405 boards.
Any custom xilinx ppc405 board can be added very easily with no code
duplicity.
This patch also adds a simple generic board, that can be used on almost
any design with xilinx ppc405 replacing the file ppc405-generic/xparameters.h
This patch is prepared to work with the latest version of EDK (10.1)
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
Since the new autocalibration still has some problems on some Kilauea
boards with 200MHz DDR2 frequency we disable the autocalibration and
use the hardcoded values as done before. This seems to work reliably
on all known DDR2 frequencies.
After the autocalibration issue is fixed we will enable it again.
Signed-off-by: Stefan Roese <sr@denx.de>
Some Blackfin UARTs are read-to-clear while others are write-to-clear.
This can cause problems when we poll the LSR and then later try and handle
any errors detected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The USB/LAN register settings are not actually used/needed in order to
drive things from U-Boot, so drop the code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure that the start.o object is always the first object in our linker
script regardless of configuration settings, and add some linker symbols
so the ldr utility can properly locate the initcode when generating a LDR.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Use the sti instruction to set the initial interrupt mask rather than
banging on the core IMASK MMR to save both space and time.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We should use the algorithm in the Linux kernel so that the UART divisor
calculation is more accurate. It also fixes problems on some picky UARTs
that have sampling anomalies.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
During cpu init, make sure we initialize the CEC properly so that
interrupts can fire and be handled while U-Boot is running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If booting out of NAND, we need to make sure we initialize it properly
before attempting to relocate the environment.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This is done to allow other 83XX based platforms which also have UPM
(e.g. 8360) to configure and use their UPM in u-boot.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
With this patch u-boot can fixup the dr_mode and phy_type properties
for the Dual-Role USB controller.
While at it, also remove #ifdefs around includes, they are not needed.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Though NAND chip is replaceable on the MPC837XE-MDS boards, the
current settings don't work with the default chip on the board.
Nevertheless Freescale's U-Boot sets the option register correctly,
so I just dumped the register from the working u-boot. My guess is
that the old settings were applicable for some pilot boards, not
found in the production.
This patch also enables FSL ELBC driver so that we could access
the NAND storage in the u-boot.
The NAND support costs about 45KB, so the u-boot no longer fits
into two 128KB NOR flash sectors, thus we also have to adjust
environment location: add another 128KB to the monitor length.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
It is due to hardware design and logic defect, that is the
I/O[0:7] of NAND chip is connected to LAD[7:0], so when
the NAND chip connected to nLCS3, you have to set up the
OR3[BCTLD] = '1' for normal operation, otherwise it will have
bus contention due to the pin 48/25 of U60 is enabled.
Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not
asserted upon access to the NAND chip, keep the default state.
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:
- When the CPLD recognizes its location on the PIB it automatically
configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatically
configured as an Agent and the PCI is configured to an external arbiter.
This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
any arbiter bad things will happen (here the board hangs during any config
space reads).
In this situation we must disable the PCI. And in case of anybody really
want to use an external arbiter, we provide "pci_external_aribter"
environment variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.
For Linux we also fix up the device tree.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The rfcks should be shifted by 28 bits left. We didn't notice the bug
because we were using only 100MHz clocks (for which rfcks == 0).
Though, for SGMII we'll need 125MHz clocks.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC837xE specs says that SerDes1 has:
— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
And for SerDes2:
— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
The spec also explicitly states that PEX options are not valid for
the SD1.
Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
it difficult to use (b/c then the memory is discontinuous and
there is quite big memory hole between the DDR/SDRAM regions).
This patch reworks LBC SDRAM setup so that now we dynamically
place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
DDR memory).
With this patch we're able to:
- Boot without external DDR memory;
- Use most "DDR + SDRAM" setups without need to support for
sparse/discontinuous memory model in the software.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
On some systems (for example Fedora Core 4) U-Boot builds with the
following wanrings only:
...
In file included from /home/wd/git/u-boot/include/libfdt_env.h:33,
from fdt.c:51:
/usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include <endian.h> instead!
This patch fixes this problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Previously only the NOR flash mapping was written into the ranges
property of the ebc node. This patch now writes all enabled chip
select areas into the ranges property.
Signed-off-by: Stefan Roese <sr@denx.de>
I reorganized my config files, putting the common stuff into netstal-common.h
(got the idea by looking a amcc-common.h from Stefan).
Added stuff to boot the new powerpc linux via NFS (only tested with HCU4).
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Provide a weak defined routine to retrieve the CPU number for
reference boards that have multiple CPU's. Default behavior
is the existing single CPU print output. Reference boards with
multiple CPU's need to provide a board specific routine.
See board/amcc/arches/arches.c for an example.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch add the capability to configure a PPC440 based IBM SDRAM
Controller with static, compiled-in, values. PPC440 memory subsystem
includes a Memory Queue core.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Several customers have reported problems with the environment in
EEPROM, including corrupted content after board reset. Probably the
code to prevent I2C Enge Conditions is not working sufficiently.
We move the environment to flash now, which allows to have a backup
copy plus gives much faster boot times.
Also, change the default console initialization to 115200 bps as used
on most other boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
mpc8536ds.c: In function 'is_sata_supported':
mpc8536ds.c:615: warning: unused variable 'devdisr'
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Round clock frequencies for printing.
Many boards printed off clock frequencies like 399 MHz instead of the
exact 400 MHz because numberes were not rounded. This is fixed now.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Commit f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot
to add a comment that the correct value disagrees with the 8544 reference
manual. The changelog for that commit is also wrong, as it says "bit 28"
when it should be "bit 24".
Signed-off-by: Timur Tabi <timur@freescale.com>
The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.
Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
PIXIS_VCFGEN1_MASK in header file for both boards.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Debug sessions may have left enabled laws.
Changing lawbar with an unkown enabled tgtid could cause problems.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0.
Include host_agent == 0 decode for end-point determination.
This is not needed for the ds reference board since pcie3 will be a host
in order to connect to the uli chip. Include it here as a reference for
other mpc8572 boards.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Some cores don't support ethernet stashing at all, and some
instances have errata. Adds 3 properties to gianfar nodes
which support stashing. For now, just add this support to
85xx SoCs.
Signed-off-by: Andy Fleming <afleming@freescale.com>
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay based on board ddr frequency and n_ranks.
* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.
* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.
* Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
* Check DDR interleaving mode from environment by reading memctl_intlv_ctl and
ba_intlv_ctl.
* Print DDR interleaving mode information
* Add doc/README.fsl-ddr to describe the interleaving setting
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.
* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Fix some bugs:
1. Correctly set intlv_ctl in cs_config.
2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
3. Set base_address and total memory for each ddr controller in memory
controller interleaving mode.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Changing the flash from cacheable to cache-inhibited was taking a significant
amount of time due to the fact that we were iterating over the full 256M of
flash. Instead we can just flush the L1 d-cache and invalidate the i-cache.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Added the ability for C code to invalidate the i/d-cache's and
to flush the d-cache. This allows us to more efficient change mappings
from cache-able to cache-inhibited.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
in ft_blob_update () for both boards was an unneccessary
repetition of code, which this patch moves in a common
function for this boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Each architecture has different ways of determine what regions of memory
might not be valid to get overwritten when we boot. This provides a
hook to allow them to reserve any regions they care about. Currently
only ppc, m68k and sparc need/use this.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Sub-command can benefit from using the same table and search functions
that top level commands have. Expose this functionality by refactoring
find_cmd() and introducing find_cmd_tbl() that sub-command processing
can call.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The EEprom contains some Manufacturerinformation,
which are read from u-boot at boot time, and saved
in same hush shell variables.
Signed-off-by: Heiko Schocher <hs@denx.de>
This new command shows the local variables defined in
the hush shell:
=> help showvar
showvar
- print values of all hushshell variables
showvar name ...
- print value of hushshell variable 'name'
Also make the set_local_var() and unset_local_var ()
no longer static, so it is possible to define local
hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR
is defined, u-boot calls hush_init_var (), where
boardspecific code can define local hush shell
variables at boottime.
Signed-off-by: Heiko Schocher <hs@denx.de>
With this Command it is possible to add new I2C Busses,
which are behind 1 .. n I2C Muxes. Details see README.
Signed-off-by: Heiko Schocher <hs@denx.de>
As documented in doc/I2C_Edge_Conditions, adding a
board specific deblocking mechanism via CFG_I2C_INIT_BOARD
for the mgcoge and mgsuvd board.
This code was originally written by Keymile in association
with Anatech and Atmel in 1998. The Code toggels the SCL
until the SCA line goes to HIGH (max. 16 times).
And after this, a start condition is sent.
This is another approach to deblock the I2C Bus. The
soft I2C driver actually sends 9 clocks with SDA High,
and then a stop at the end, to deblock the I2C Bus.
Maybe we should use the approach from Keymile as
the new standard?
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch fixes the following warnings, when using
the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx
systems:
soft_i2c.c: In function 'send_reset':
soft_i2c.c:93: warning: unused variable 'immr'
soft_i2c.c: In function 'send_start':
soft_i2c.c:124: warning: unused variable 'immr'
soft_i2c.c: In function 'send_stop':
soft_i2c.c:146: warning: unused variable 'immr'
soft_i2c.c: In function 'send_ack':
soft_i2c.c:171: warning: unused variable 'immr'
soft_i2c.c: In function 'write_byte':
soft_i2c.c:196: warning: unused variable 'immr'
soft_i2c.c: In function 'read_byte':
soft_i2c.c:244: warning: unused variable 'immr'
Signed-off-by: Heiko Schocher <hs@denx.de>
If I2C Bus is blocked (see doc/I2C_Edge_Conditions),
it is not possible to get out of this, until the
complete Hardware gets a reset. This new commando
calls again i2c_init (and that calls i2c_init_board
if defined), which will deblock the I2C Bus.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
There are some more extensions, which are for both boards
and some more boards from this manufacturer will follow soon.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds support for the National LM63 temperature
sensor with integrated fan control. It's used on the GDSys
Neo board (405EP) which will be submitted later.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Stefan Roese <sr@denx.de>
Now it's used at UBI module. Of course other modules can use it.
If you want to use it, please define CONFIG_RBTREE
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Now that the auto-update feature uses the 'firmware' type for updates, it is
useful to inspect the load address of such images.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
The auto-update feature allows to automatically download software updates
from a TFTP server and store them in Flash memory during boot. Updates are
contained in a FIT file and protected with SHA-1 checksum.
More detailed description can be found in doc/README.update.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
The upcoming automatic update feature needs the ability to adjust an
address within Flash to the end of its respective sector. Factor out
this functionality to a new function flash_sect_roundb().
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
There are two aspects of a TFTP transfer involving timeouts:
1. timeout waiting for initial server reply after sending RRQ
2. timeouts while transferring actual data from the server
Since the upcoming auto-update feature attempts a TFTP download during each
boot, it is undesirable to have a long delay when the TFTP server is not
available. Thus, this commit makes the server timeout (1.) configurable by two
global variables:
TftpRRQTimeoutMSecs
TftpRRQTimeoutCountMax
TftpRRQTimeoutMSecs overrides default timeout when trying to connect to a TFTP
server, TftpRRQTimeoutCountMax overrides default number of connection retries.
The total delay when trying to download a file from a non-existing TFTP server
is TftpRRQTimeoutMSecs x TftpRRQTimeoutCountMax milliseconds.
Timeouts during file transfers (2.) are unaffected.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Enforce millisecond semantics of the first argument to NetSetTimeout() --
the change is transparent for well-behaving boards (CFG_HZ == 1000 and
get_timer() countiing in milliseconds).
Rationale for this patch is to enable millisecond granularity for
network-related timeouts, which is needed for the upcoming automatic
software update feature.
Summary of changes:
- do not scale the first argument to NetSetTimeout() by CFG_HZ
- change timeout values used in the networking code to milliseconds
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added as a convenience for other platforms that uses MPC8360 (has 8 UCC).
Six eth interface is chosen because the platform I am using combines
UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth.
Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Change UEC phy interface from GMII to RGMII on MPC8568MDS board
Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed,
but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable.
Now both UEC1 and UEC2 can work properly under u-boot.
It is also in consistent with the kernel setting for 8568 UEC phy interface.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
At least some revisions of the 8313, and possibly other chips, do not
wait for all pages of the initial 4K NAND region to be loaded before
beginning execution; thus, we wait for it before branching out of the
first NAND page.
This fixes warm reset problems when booting from NAND on 8313erdb.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
Previously the appropriate initialization had been made in Linux, by the
ppc440spe ADMA driver, which is wrong because modifying the MQ configuration
registers after normal operation has begun is not supported and could
have unpredictable results.
Comment from Stefan: This patch doesn't change the resulting value of the
MQ registers. It explicitly sets/clears all bits to the desired state which
better documents the resulting register value instead of relying on pre-set
default values.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
Previously the appropriate initialization had been made in Linux, by the
ppc440spe ADMA driver, which is wrong because modifying the MQ configuration
registers after normal operation has begun is not supported and could
have unpredictable results.
Comment from Stefan: This patch doesn't change the resulting value of the
MQ registers. It explicitly sets/clears all bits to the desired state which
better documents the resulting register value instead of relying on pre-set
default values.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being
bit 26, instead it should be bit 28. This caused in incorrect
interpretation of the i2c_clk which is the same as the SEC clk on
MPC8544. The SEC clk is controlled by cfg_sec_freq that is reported
in PORDEVSR2.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This reverts commit dffd2446fb.
The fix introduced by this patch is not correct. The problem is
that the documentation is not correct for the MPC8544 with regards
to which bit in PORDEVSR2 is for the SEC_CFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
mpc8536ds.c: In function 'is_sata_supported':
mpc8536ds.c:614: warning: unused variable 'devdisr'
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The function parse_line() in common/main.c was exposed globally by commit
6636b62a6e, Result in conflict with the same
name funciton in drivers/bios_emulator/x86emu/debug.c when define the DEBUG.
This patch fix this by renaming the function in the debug.c file.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Reference manual states that MxMR[MAD] increment is the indication
of write to UPM array is complete. Honour that. Also, make the dummy
write explicit.
also fix the comment.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently this is not creating any problem. But it will result
in compilation error when used as below.
printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2);
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
continuation of the theme based on git grep "^#define CFG_.*;$" include/
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes a type mismatch and thus removes a compiler
warning when compiling with CONFIG_API on powerpc.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Original code displayed:
=> help i2c
i2c i2c speed [speed] - show or set I2C bus speed
i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device
...
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup.
This patch try to fix this by reading the serdes status before the SATA
initialize.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
At a lot of places in the code the PIPE_INTERRUPT flags and friends
are used wrong. The wrong bits are compared to this flag resulting
in wrong conditions. Also there are macros that should be used for
PIPE_* flags.
This patch tries to fix them all, however, I was not able to test the
changes, because I do not have any of these boards.
Review required!
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The max packet size is encoded as 0,1,2,3 for 8,16,32,64 bytes.
At some places directly 8,16,32,64 was used instead of the encoded
value. Made a enum for the options to make this more clear and to help
preventing similar errors in the future.
After fixing this bug it became clear that another bug existed where
the 'pipe' is and-ed with PIPE_* flags, where it should have been
'usb_pipetype(pipe)', or even better usb_pipeint(pipe).
Also removed the triple 'get_device_descriptor' sequence, it has no use,
and Windows nor Linux behaves that way.
There is also a poll going on with a timeout when usb_control_msg() fails.
However, the poll is useless, because the flag will never be set on a error,
because there is no code that runs in a parallel that can set this flag.
Changed this to something more logical.
Tested on AT91SAM9261ek and compared the flow on the USB bus to what
Linux is doing. There is no difference anymore in the early initialisation
sequence.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
When aligning malloc()ed screen_base, invalid offset was added.
This not only caused misaligned result (which did not cause hardware
misbehaviour), but - worse - caused screen_base + smem_len to
be out of malloc()ed space, which in turn caused breakage of
futher malloc()/free() operation.
This patch fixes screen_base alignment.
Also this patch makes memset() that cleans framebuffer to be executed
on first initialization of diu, not only on re-initialization. It looks
correct to clean the framebuffer instead of displaying random garbage;
I believe that was disabled only because that memset caused breakage
of malloc/free described above - which no longer happens with the fix
described above.
Signed-off-by: Nikita V. Youshchenko <yoush@debian.org>
This patch fixes building with CONFIG_API and CONFIG_USB_STORAGE.
USB_MAX_STOR_DEV is defined in include/usb.h, but
needed in api/api_storage.c.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
The checks for CFG_EEPROM_PAGE_WRITE_ENABLE and
CFG_EEPROM_PAGE_WRITE_BITS in various temperature
sensor drivers are not necessary
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Since we're working with unsigned data, you can't apply a signed pointer
cast and then attempt to print the result. Otherwise you get wrong output
when the sign bit is set like "0xFF" incorrectly extended to "0xFFFFFFFF".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We don't need CONFIG_CFG_STRINGS anymore now that we have the define
CONFIG_CMD_STRINGS and Makefile control.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the total size of all NAND devices exceeds 4 GiB, the size will
overflow. This patch tries to fix this.
Note that we still have a problem when a single NAND device is bigger
than 4 GiB: then the overflow would actually happen earlier, i. e.
when storing the size in nand_info[].size, as nand_info[].size is an
"u_int32_t".
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Currently VSC8601 doesn't link with 10/100M partners if the
EEPROM/Strapping is not set up.
Setting the auto-neg register fixes this.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
get_prom function was used __attriute__ , but it is not enable.
ax88796.o does not do link besides ne2000.o. When ld is carried
out, get_prom function of ax88796.c is ignored.
This problem is a thing by specifications of ld.
I checked and test this patch on SuperH and MIPS.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.
lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
For some reason we duplicated the majority of code in lib_ppc/interrupts.c
Not know how that happened, but there is no good reason for it.
Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
they exist.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The flash_unlock_seq requires a sector for AMD_LEGACY.
Fix a retcode check typeo.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 445a7b3830 introduced the following
compile warnings:
cmd_i2c.c:112: warning: missing braces around initializer
cmd_i2c.c:112: warning: (near initialization for 'i2c_no_probes[0]')
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Measurements with our MPC8544 board showed that the I2C bus frequency
is wrong by a factor of 1.5. Obviously, the interpretation of the
MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
correct. There seems to be an error in the 8544 RM.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.
The change has been successfully tested on MPC8555CDS system.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Switch to the standard CFG_HZ=1000 value, while at it, minor white-space
cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads,
provides 2% or 0.4% precision depending on the
CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s
boot-delay.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
due to the arm implementation which supposed that U-Boot is in RAM
when we jump to start_armboot
Signed-off-by: gnusercn <gnusercn@gmail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
After changing SDRAM_CLKTR phase value rerun the memory preload
initialization sequence (INITPLR) to reset and relock the memory
DLL. Changing the SDRAM_CLKTR memory clock phase coarse timing
adjustment effects the phase relationship of the internal, to the
PPC chip, and external, to the PPC chip, versions of MEMCLK_OUT.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The ID EEPROM on MPC8572DS board locates on I2C bus 1. Its the storage for
system information like mac addresses etc. This patch enables it.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
MPC8572DS has two i2c buses. This patch moves the DDR SPD_EEPROM to i2c bus 1
according to the board spec, and adds the 2nd i2c bus offset.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111),
The display is still sync mode DDR freq. This patch try to fix
this. The display DDR freq is now the actual freq in both
sync and async mode.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
ePAPR says if the *cache-block-size is the same as *cache-line-size
than we don't need the *cache-line-size property.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Changed MIMC200 board setup and config to use CONFIG_DISABLE_CONSOLE.
Also fixed default uImage location.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Oops, screwed up the function name in the documenting comment for this
function. Trivial correction in this patch.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Kumar has already added alias expansion to fdt_path_offset().
However, in some circumstances it may be convenient for the user of
libfdt to explicitly get the string expansion of an alias. This patch
adds a function to do this, fdt_get_alias(), and uses it to implement
fdt_path_offset().
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
The CFI flash driver starts at flash_init() which calls down into
flash_get_size(). This starts by calling flash_detect_cfi(). If said
function fails, flash_get_size() finishes by attempting to reset the
flash. Unfortunately, it does this with an info->portwidth set to 0x10
which filters down into flash_make_cmd() and that happily smashes the
stack by sticking info->portwidth bytes into a cfiword_t variable that
lives on the stack. On a 64bit system you probably won't notice, but
killing the last 8 bytes on a 32bit system usually leads to a corrupt
return address. Which is what happens on a Blackfin system.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Set force parameter in fdt_chosen() call in do_bootm_linux() call.
Without this, the chosen node is not overwritten if it already
exists.
Signed-off-by: Stefan Roese <sr@denx.de>
Using Gcc 4.3 detected this problem:
../dtc/libfdt/fdt.c: In function 'fdt_next_tag':
../dtc/libfdt/fdt.c:82: error: assuming signed overflow does not
occur when assuming that (X + c) < X is always false
To fix the problem, treat the offset as an unsigned int.
The problem report and proposed fix were provided
by Steve Papacharalambous <stevep@freescale.com>.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The current implementation of fdt_get_path() has a couple of bugs,
fixed by this patch.
First, contrary to its documentation, on success it returns the length
of the node's path, rather than 0. The testcase is correspondingly
wrong, and the patch fixes this as well.
Second, in some circumstances, it will return -FDT_ERR_BADOFFSET
instead of -FDT_ERR_NOSPACE when given insufficient buffer space.
Specifically this happens when there is insufficient space even to
hold the path's second last component. This behaviour is corrected,
and the testcase updated to check it.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
we need this due to the arm implementation which supposed that U-Boot
is in RAM when we jump to start_armboot
This reverts commit f96b44cef8.
in order to do it for all arm board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
bootdelay set to -1 'permanently' disables autobooting, even if
bootcmd is specified. Change to a positive value to allow
autobooting when a bootcmd is set.
Reported-by: Coray Tate <Coray.Tate@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
the operating system may leave flash in a h/w locked state after writing.
This allows u-boot to continue to write flash by enabling h/w unlocking
by default.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.
Found this bug while trying to relocate a DDR memory at the base != 0.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Depending on the configuration jumper "SATA SELECT", U-Boot disabled
either one PCIe node or the SATA node in the device tree blob. This
patch removes the unnecessary and even confusing warning, when the node
is not found at all.
Signed-off-by: Stefan Roese <sr@denx.de>
eventually leads to a machine check. This change assures that DPRAM
is allocated only once in that case.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
A few Spartan-3 definitions erroneously use Spartan-3E size
constants. This patch fixes them.
Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
Running mtest command on socrates without specifying
an address range crashes the board. This patch changes
default mtest address range to prevent this behavior.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Currently U-Boot crashes after relocation to RAM.
Changing the CPO value of the DDR SDRAM TIMING_CFG_2
register to READ_LAT + 1 (to the value it was before
conversion of socrates to new DDR code) fixes the
problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Commit be0bd8234b
changed SPD EEPROM address to 0x51 and DDR SDRAM
detection stopped working. Change this address
back to 0x50.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Old U-Boot supported 4KB page size only. If this version, Linux
kernel can not get command line from U-Boot.
SH Linux kernel can change page size and empty_zero_page.
This patch support this function and fix promlem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
There are several differences between Linux, Windows and U-boot for initialising the
USB devices. While analysing the behaviour of U-boot it turned out that U-boot does
things really different, and some are wrong (compared to the USB standard).
This patch fixes some errors:
* The NEW_init procedure that was already in the code is good, while the old procedure
is wrong. See code comments for more info.
* On a Control request the data returned by the device can be more than 8 bytes, while
the host limits it to 8 bytes. This caused the host to generate a DataOverrun error.
This results in a lot of USB sticks not being recognised, and the transmission ended
frequently with a CTL:TIMEOUT Error.
* Added a flag CONFIG_LEGACY_USB_INIT_SEQ to allow users to use the old init procedure.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch refactors some large routines of the USB OHCI code by
making some routines smaller and more readable which helps
debugging and understanding the code. (Makes the code looks
somewhat more like the Linux implementation.)
Also made entire file compliant to Linux Coding Rules (checkpatch.pl compliant)
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The GCC-compiler makes an optimisation error while optimising the routine
usb_set_maxpacket(). This should be fixed in the compiler in the first place,
but there lots of compilers out there that makes this error, that it is
probably wiser to workaround it in U-boot itself.
What happens is that the register r3 is used as loop-counter 'i', but gets
overwritten later on. From there it starts using register r3 for several other
things and the assembler code is becoming a big mess. This is clearly a compiler bug.
This error occurs on at least several versions of Code Sourcery Lite compilers
for ARM. Like the Edition 2008q1, and 2008q3, It has also been seen on other
compilers, while compiling for armv4t, or armv5te with Os, O1 and O2.
We work around it by splitting up this routine in 2 parts, and making sure that
the split out part is NOT inlined any longer. This will make GCC spit out assembler
that do not show this problem. Another possibility is to adapt the Makefile to stop
optimisation for the complete file. I think this solution is nicer.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
After switching to using the CFI flash driver, the correct remapping
of the flash banks was forgotten.
Also, some boards were not adapted, and the old legacy flash driver
was not removed yet.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch is an attempt to implement autoprobing for the Lime
presence on the bus.
Configure GPCM for Lime CS2 and try to access chip ID registers.
Second read atempt delivers register values if the chip is present.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Commit 2a1a2cb6 didnt remove the dummy mem reservation in fdt_chosen,
and this stopped Linux from booting with a Ramdisk. This patch fixes
this, by deleting the useless dummy mem reservation.
When booting with a Ramdisk, a fix offset FDT_RAMDISK_OVERHEAD is now
added to of_size, so we dont need anymore a dummy mem reservation.
I measured the value of FDT_RAMDISK_OVERHEAD on a MPC8270 based
system (=0x44 bytes) and rounded it up to 0x80).
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.
Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.
But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.
This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:
OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.
To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch fixes a problem introdiced with patch
bbeff30c [ppc4xx: Remove superfluous dram_init() call or replace it by
initdram()].
The boards affected are:
- PCI405
- PPChameleonEVB
- quad100hd
- taihu
- zeus
Signed-off-by: Stefan Roese <sr@denx.de>
This patch prevents linker error on AT91RM9200 boards, if
CONFIG_CMD_I2_TREE is set.
It implements i2c_set_bus_speed and i2c_get_bus_speed as a dummy function.
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
This patch changes get_timer() for i.MX to return the time since
'base' instead of the time since the counter was at zero.
Symptom seen is flash timeout errors when erasing or programming a
sector using the common cfi flash code.
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
1) Change the i.MX serial driver to use the baud rate set in the
u-boot environment
2) don't assume a 16MHz value for PERCLK1 in baud rate calculations
3) don't write a 1 to the RDR bit in the USR2 reg. (bit is not "write
one to clear" like other status bits in the reg.)
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Code in cpu/arm920t/start.S will die with a compilation error if
CONFIG_STACKSIZE + CFG_MALLOC_LEN works out to an invalid constant for
the ARM sub instruction. Change the code so that each is subtracted
independently to avoid the error.
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
- Correct Invalid #define of MPUTIM_PTV_MASK for
omap1510 & omap730 register definition
MPUTIM_PTV_MASK is defined as
#define MPUTIM_PTV_MASK (0x7<<PTV_BIT)
while it should have been
#define MPUTIM_PTV_MASK (0x7<<MPUTIM_PTV_BIT)
- Below Patch corrects the same
Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
The i.MX31 has three SPI buses and each bus has several chip selects
and the MC13783 chip can be connected to any of these. The current
RTC driver for MC13783 is hardcoded for CSPI2/SS2.
This patch makes make MC13783 SPI bus and chip select configurable
via CONFIG_MC13783_SPI_BUS and CONFIG_MC13783_SPI_CS.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
This patch adds the reset_timer() function (needed by nand_base.c) and
modifies the get_timer_masked() to work in the same way as the omap24xx
function.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Based on original patch by Bernard Blackham <bernard@largestprime.net>
U-boot's HW ECC support for large page NAND on Davinci is completely
broken. Some kernels, such as the 2.6.10 one supported by
MontaVista for DaVinci, rely upon this broken behaviour as they
share the same code for ECCs. In the existing scheme, error
detection *might* work on large page, but error correction
definitely does not. Small page ECC correction works, but the
format is not compatible with the mainline git kernel.
This patch adds ECC code that matches what is currently in the
Davinci git repository (since NAND support was added in 2.6.24).
This makes the ECC and OOB layout written by u-boot compatible with
Linux for both small page and large page devices and fixes ECC
correction for large page devices.
The old behaviour can be restored by defining the macro
CFG_DAVINCI_BROKEN_ECC, which is undefined by default.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
When not using hush, the autoscr command now executes lines that are
only one character long. It also runs the last line of scripts even if
it does not end in a newline.
Signed-off-by: Petri Lehtinen <petri.lehtinen@inoi.fi>
Fix printf format-string/arg mismatches under -DDEBUG.
These warnings occur with DEBUG defined for a platform using
cpu/mpc85xx. Users of other architectures can unearth similar
problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right
after "CFLAGS += $(call cc-option,-fno-stack-protector)".
Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The e500um says the timebase is volatile out of reset. To ensure
TB sync works we need to make sure its zero.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The patch is that check if usb_get_dev_index() function return valid
pointer. If valid, continue. Otherwise return -1.
Signed-off-by: Ryan Chen <ryan.chen@st.com>
Acked-by: Markus Klotzbuecher <mk@denx.de>
A recent commit (936897d4d1)
enabled the usb_stop() command in common/cmd_bootm.c which was
not enabled for some time, because no board did actually set the
CFG_CMD_USB flag. So, now the usb_stop() is executed before
loading the linux kernel.
However, the usb_ohci driver hangs up (at least on AT91SAM) if the
driver is stopped twice (e.g. the peripheral clock is stopped on AT91).
If some other piece of code calls usb_stop() before the bootm command,
this command will hangup the system during boot.
(usb start and stop is typically used while booting from usb memory stick)
But, stopping the usb stack twice is useless anyway, and a flag already
existed that kept track on the usb_init()/usb_stop() calls.
So, we now check if the usb stack is really started before we stop it.
This problem is now fixed in both the upper as low-level layer.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Acked-by: Markus Klotzbuecher <mk@denx.de>
This patch solves the problems compiling ml507, v5fx30teval and
ppc440-generic out of tree.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Fix output of the usb storage command. It was printing "Device 0: not
available" because IF_TYPE_USB was not included into the switch
statement.
Signed-off-by: Nicolas Lebedenco <nicolas.lebedenco@tasksistemas.com.br>
- add function fit_all_image_check_hashes() that verifies if all
hashes of all images in the FIT are valid
- improve output of fit_image_check_hashes() when the hash check fails
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Pantelis Antoniou stated:
AFAIK, it is still used but the products using PPC are long gone.
Nuke it plz (from orbit).
So remove it since it cleans up a usage of env_get_char outside of
the environment code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Several source files need to be compiled and linked when one or more
config options are selected. To allow for easy selection in the
Makefiles yet to avoild multiple compilation (which costs build time)
and especially multiple linking (which causes errors), we use
"COBJS = $(sort COBJS-y)" which eliminates duplicates.
By courtesy of Detlev Zundel who suggested this approach.
Signed-off-by: Wolfgang Denk <wd@denx.de>
They only differ in the init function.
This also adds the missing watchdog support for the PL011.
Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
SREC files do not need gap fill: The load address is specified in the
file. On the other hand, it can't be avoided in a .bin object. It has
no information about memory location.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Add support for environment in NAND with automatic NOR / NAND recognition,
including unaligned environment, bad-block skipping, redundant environment
copy.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds Lime GDC support together with support for the PWM
backlight control through the w83782d chip. The reset pin of the
latter is attached to GPIO, so we need to reset it in
early_board_init_r.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
- Update the local bus ranges in the FDT for Linux for the various
devices connected to the local bus via chip-select.
- Set the LCRR_DBYP bit in the LCRR for local bus frequencies
lower than 66 MHz and uses I/O accessor functions consequently.
- UPM data update.
- Update of default environment and configuration. Use I2C multibus
as we do have two I2C buses. Also enable sdram and ext2 commands.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
86xx boards already use sys_eeprom.c, so this patch migrates the remaining
Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
Signed-off-by: Timur Tabi <timur@freescale.com>
This patch adds Lime GDC support together with support for the PWM
backlight control through the w83782d chip. The reset pin of the
latter is attached to GPIO, so we need to reset it in
early_board_init_r.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
- Update the local bus ranges in the FDT for Linux for the various
devices connected to the local bus via chip-select.
- Set the LCRR_DBYP bit in the LCRR for local bus frequencies
lower than 66 MHz and uses I/O accessor functions consequently.
- UPM data update.
- Update of default environment and configuration. Use I2C multibus
as we do have two I2C buses. Also enable sdram and ext2 commands.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
This patch fixes warnings like this:
start.S:0: warning: target CPU does not support interworking
which come from some ARM cross compilers and are caused by hard-coded
(with "--with-cpu=arm9" configuration option) ARM targets (which
support ARM Thumb instructions), while the ARM target selected from
the command line (with "-march=armv4") doesn't support Thumb
instructions.
This warning is issued by the compiler regardless of the real use of
the Thumb instructions in code.
To fix this problem, we use options according to compiler version
being used.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
86xx boards already use sys_eeprom.c, so this patch migrates the remaining
Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
Signed-off-by: Timur Tabi <timur@freescale.com>
This patch add FDT support and command line editing capabilities
for CPCI405 and CPCI405AB boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch replaces the BOARD_REVISION variable in include/config.mk
by a using a temporary include file in the platform directory.
The former way does not work anymore and the latter is also used by
some other boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Since this define is only used on one board that was never really in
production, removing this compile time option doesn't hurt and makes
the code more readable.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a compilation warning for the PIP405 board. It moves the
#ifndef CONFIG_CS8952_PHY define a little so that the warning doesn't
occur anymore. I am a little unsure if this #ifdef is at the correct
place now or if it could be removed completely. This needs to get
tested on the PIP405 board.
Signed-off-by: Stefan Roese <sr@denx.de>
ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
ctrl_regs.c:523: warning: 'caslat' may be used uninitialized in this function
ctrl_regs.c:523: note: 'caslat' was declared here
Add a warning in DDR1 case if cas_latency isn't a value we know about.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Adds returning an error from the ramdisk detection code if
its not a real ramdisk (invalid). There is no reason we can't
just return back to the console if we detect an invalid
ramdisk or CRC error.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds bootm_start() return value check. If
error status is returned, we do not proceed further to
prevent board reset or crash as we still can recover
at this point.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
I didn't try to use drivers/mtd/nand/fsl_upm.c for the NAND driver,
because I have no longer access to the hardware.
Signed-off-by: Heiko Schocher <hs@denx.de>
Added new CONFIG_DISABLE_CONSOLE define and GD_FLG_DISABLE_CONSOLE.
When CONFIG_DISABLE_CONSOLE is defined, setting
GD_FLG_DISABLE_CONSOLE disables all console input and output.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Some of multi-function USB controllers (e.g. ISP1562) allow root hub
resetting only via EHCI registers. So, this patch adds the
corresponding kind of reset to OHCI's hc_reset() if the newly
introduced CONFIG_PCI_EHCI_DEVNO option is set (e.g. for Socrates
board).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Markus Klotzbuecher <mk@denx.de>
This patch fixes a problem spotted on Glacier/Canyonlands (and most
likely lots of other board ports), that no serial output was seen
after console initialization in console_init_r(). This is because the
last added console device was used instead of the first added.
This patch fixes this problem by using list_add_tail() instead of
list_add() to register a device. This way the first added console
is used again.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds GPCS, SGMII and M88E1112 PHY support
for the AMCC PPC460GT/EX processors.
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Alternate SDRAM DDR autocalibration routine that can be generically used
for any PPC4xx chips that have the IBM SDRAM Controller core allowing for
support of more DIMM/memory chip vendors and gets the DDR autocalibration
values which give the best read latency performance (SDRAM0_RDCC.[RDSS]).
Two alternate SDRAM DDR autocalibration algoritm are provided in this patch,
"Method_A" and "Method_B". DDR autocalibration Method_A scans the full range
of possible PPC4xx SDRAM Controller DDR autocalibration values and takes a
lot longer to run than Method_B. Method_B executes in the same amount of time
as the currently existing DDR autocalibration routine, i.e. 1 second or so.
Normally Method_B is used and it is set as the default method.
The current U-Boot PPC4xx DDR autocalibration code calibrates the IBM SDRAM
Controller registers.[bit-field]:
1) SDRAM0_RQDC.[RQFD]
2) SDRAM0_RFDC.[RFFD]
This alternate PPC4xx DDR autocalibration code calibrates the following
IBM SDRAM Controller registers.[bit-field]:
1) SDRAM0_WRDTR.[WDTR]
2) SDRAM0_CLKTR.[CKTR]
3) SDRAM0_RQDC.[RQFD]
4) SDRAM0_RFDC.[RFFD]
and will also use the calibrated settings of the above four registers that
produce the best "Read Sample Cycle Select" value in the SDRAM0_RDCC.[RDSS]
register.[bit-field].
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch provides an unificated way of handling xilinx v5 ppc440 boards.
It unificates 3 different things:
1) Source code
A new board called ppc440-generic has been created. This board includes
a generic tlb initialization (Maps the whole memory into virtual) and
defines board_pre_init, checkboard, initdram and get_sys_info weakly,
so, they can be replaced by specific functions.
If a new board needs to redefine any of the previous functions
(specific initialization) it can create a new directory with the
specific initializations needed. (see the example ml507 board).
2) Configuration file
Common configurations are located under configs/xilinx-ppc440.h, this
header file interpretes the xparameters file generated by EDK and
configurates u-boot in correspondence. Example: if there is a Temac,
allows CMD_CONFIG_NET
Specific configuration are located under specific configuration file.
(see the example ml507 board)
3) Makefile
Some work has been done in order to not duplicate work in the Main
Makefile. Please see the attached code.
In order to support new boards they can be implemented in the next way:
a) Simple Generic Board (90% of the time)
Using EDK generates a new xparameters.h file, replace
ppc440-generic/xparameters.h and run make xilinx-ppc440-generic_config
&& make
b) Simple Boards with special u-boot parameters (9 % of the time)
Create a new file under configs for it (use ml507.h as example) and
change your paramaters. Create a new Makefile paragraph and compile
c) Complex boards (1% of the time)
Create a new folder for the board, like the ml507
Finally, it adds support for the Avnet FX30T Evaluation board, following
the new generic structure:
Cheap board by Avnet for evaluating the Virtex5 FX technology.
This patch adds support for:
- UartLite
- 16MB Flash
- 64MB RAM
Prior using U-boot in this board, read carefully the ERRATA by Avnet
to solve some memory initialization issues.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
Cleans up some latent issues with the data cache control so that
dcache_enable() and dcache_disable() will work reliably (after
unlock_ram_in_cache() has been called)
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Record the Arbiter Event Register values and optionally display them.
The Arbiter Event Register can record the type and effective address of
an arbiter error, even through an HRESET. This patch stores the values in
the global data structure.
Display of the Arbiter Event registers immediately after the RSR value
can be enabled with defines. The Arbiter values will only be displayed
if an arbiter event has occured since the last Power On Reset, and either
of the following defines exist:
#define CONFIG_DISPLAY_AER_BRIEF - display only the arbiter address and
and type register values
#define CONFIG_DISPLAY_AER_FULL - display and interpret the arbiter
event register values
Address Only transactions are one of the trapped events that can register
as an arbiter event. They occur with some cache manipulation instructions
if the HID0_ABE (Address Broadcast Enable) is set and the memory region
has the MEMORY_COHERENCE WIMG bit set. Setting:
#define CONFIG_MASK_AER_AO - prevents the arbiter from recording address
only events, so that it can still capture
other real problems.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.
lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Set DAT value before DIR values to avoid creating glitches on the
GPIO signals.
Set gpio level register before direction register to inhibit
glitches on high level output pins.
Dir and data gets cleared at powerup, so high level output lines see
a short low pulse between setting the direction and level registers.
Issue was seen on a new board with the nReset line of the NOR flash
connected to a GPIO. Setting the direction register puts the NOR flash
in reset so the next instruction to set the level cannot get executed.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds initdram() to DASA_SIM boards that has been
removed accidentally by a previous commit.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some direct references to common/lists.o from some
esd linker scripts. This is necessary because the lists source was moved
and is not in the "common" directory anymore.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes initdram() and testdram() from most esd 405 platforms.
Some boards also have an empty dummy implementation of
misc_init_f(). This is also removed.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removed the obsolete initdram() function from
VOM405 platform file.
Some minor cleanup.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the PCI-OHCI controller on PLU405 board.
Also the default CPU frequency is updated to 266 MHz and
command line editing is enabled.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch
- wraps some long lines
- removes unused/obsolete functions: misc_init_f() and initdram()
Signed-off-by: Matthias Fuchs <mf@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
If a board has a variable number of flash banks, there are empty entries
in flash_info[] and CFG_DIRECT_FLASH_TFTP is set, tftp boot fails with
"Outside available Flash". This patch skips flash banks with unknown
flash ids.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The RSK7203 board has the SMSC9118 wired up 'incorrectly'.
Byte-swapping is necessary, and so poor performance is inevitable.
This problem cannot evade by the swap function of CHIP, this can
evade by software Byte-swapping.
And this has problem by FIFO access only. pkt_data_pull/pkt_data_push
functions necessary to solve this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Modified board_eth_init() functions of boards that have this FEC in addition
to other Ethernet controllers.
Affected boards:
bc3450
icecube
mvbc_p
o2dnt
pm520
total5200
tq5200
Removed initialization of controller from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Affected boards:
hidden_dragon
MPC8544DS
MPC8610HPCN
R2DPLUS
TB0229
Removed initialization of the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This addresses all drivers whose initializers have already
been moved to board_eth_init()/cpu_eth_init().
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The 8544DS and 8572DS platforms support an optional SGMII riser card to
expose ethernet over an SGMII interface. Once the card is in, it is also
necessary to configure the board such that it uses the card, rather than
the on-board ethernet ports. This can either be done by flipping dip switches
on the motherboard, or by modifying registers in the pixis. Either way
requires a reboot.
This adds a command to allow users to choose which ports are routed through
the SGMII card, and which through the onboard ports. It also allows users
to revert to the current switch settings.
This code does not work on the 8572, as the PIXIS is different.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The 8544 DS has an optional SGMII Riser card, which uses different PHY
addresses. Check if we are in SGMII mode, and invoke the SGMII Riser
setup code if so.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The 8544DS and 8572DS systems have an optional SGMII riser card which
exposes new ethernet ports which are connected to the eTSECs via an
SGMII interface. The SGMII PHYs for this board are offset from the standard
PHY addresses, so this code modifies the passed in tsec_info structure to
use the SGMII PHYs on the card, instead.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The tsec driver contains a hard-coded array of configuration information
for the tsec ethernet controllers. We create a default function that works
for most tsecs, and allow that to be overridden by board code. It creates
an array of tsec_info structures, which are then parsed by the corresponding
driver instance to determine configuration. Also, add regs, miiregs, and
devname fields to the tsec_info structure, so that we don't need the kludgy
"index" parameter.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This is expected by the callers, but this fact was hidden well within
the old list implementation.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The "GPIO" port mux is used on AVR32 UC3 parts as well as AT32AP7200 and
all later AVR32 chips. This patch adds a driver for it, implementing the
same API as the existing portmux-pio driver but with more functionality.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Replace the avr32-specific board_init_info hook by the standard
board_early_init_r hook and make it optional.
board_early_init_r() runs somewhat earlier than board_init_info used to
do, but this isn't a problem for any of the in-tree boards.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Replace the avr32-specific gclk_init() board hook with the standard
board_postclk_init() hook which is supposed to run at the same point
during initialization.
Provide a dummy weak alias for boards not implementing this hook. The
cost of this is:
- 2 bytes for the dummy function (retal 0)
- 2 bytes for each unnecessary function call (short rcall)
which is a pretty small price to pay for avoiding lots of #ifdef
clutter. In this particular case, all boards probably end up slightly
smaller because we avoid the conditional checking if the gclk_init
symbol is NULL.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Use the new gclk helper functions to set up the PHY clock instead of
accessing the PM registers directly.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Add two helper functions for configuring and enabling generic clocks:
- gclk_enable_output: Enables output on a GCLKx pin
- gclk_set_rate: Configures a gclk to run at a specific rate
This should eliminate any reason to go mucking about with PM registers
from board code.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
- Separate the portmux configuration functionality from the GPIO pin
control API.
- Separate the controller-specific code from the chip-specific code.
- Allow "ganged" port configuration (multiple pins at once).
- Add more flexibility to the "canned" peripheral select functions:
- Allow using more than 23 address bits, more chip selects, as
well as NAND- and CF-specific pins.
- Make the MACB SPEED pin optional, and choose between MII/RMII
using a parameter instead of an #ifdef.
- Make it possible to use other MMC slots than slot 0, and support
different MMC/SDCard data bus widths.
- Use more reasonable pull-up defaults; floating pins may consume a
lot of power.
- Get rid of some custom portmux code from the mimc200 board code. The
old gpio/portmux API couldn't really handle its requirements, but
the new one can.
- Add documentation.
The end result is slightly smaller code for all boards. Which isn't
really the point, but at least it isn't any larger.
This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if
the board maintainers could help me test this on their boards. In
particular, the mimc200 port has lost a lot of code, so I'm hoping Mark
can help me out.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Mark Jackson <mpfj@mimc.co.uk>
Cc: Alex Raimondi <alex.raimondi@miromico.ch>
Cc: Julien May <julien.may@miromico.ch>
Changes since v1:
* Enable pullup on NWAIT
* Add missing include to portmux-pio.h
* Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
Make the data_bits enum in struct sdram_config reflect the actual number
of data bits on the bus, i.e. 16 or 32. Having 0 mean 16 bits and 1 mean
32 bits is just too confusing.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Remove some outdated and/or unnecessary information, and add updated
information about the toolchain and buildroot.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
AP325RXA is SH7723's reference board.
This has SCIF, NOR Flash, Ethernet, USB host, LCDC, SD Host, Camera and other.
In this patch, support SCIF, NOR Flash, and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other.
This patch supports CPU register's header file and SCIF serial driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This board has SH7785, 512MB DDR2-SDRAM, NOR Flash,
Graphic, Ethernet, USB, SD, RTC, and I2C controller.
This patch supports the following functions:
- 128MB DDR2-SDRAM (29-bit address mode only)
- NOR Flash
- USB host
- Ethernet
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
SMDK6400 can only boot U-Boot from NAND-flash. This patch adds a nand_spl
driver for it too. The board can also boot from the NOR flash, but due to
hardware limitations it can only address 64KiB on it, which is not enough
for U-Boot. Based on the original sources by Samsung for U-Boot 1.1.6.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
As noted by Harald Welte, HWFLOW support in the S3C64XX serial driver is
broken and currently unused. Remove it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Notice: USB on S3C6400 currently works _only_ with switched off MMU. One could
try to enable the MMU, but map addresses 1-to-1, and disable data cache, then
it should work too and we could still profit from instruction cache.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
DM644x is just one of a series of DaVinci chips that use the EMAC driver.
By replacing all the function names that start with dm644x_* to davinci_*
we make these function more portable. I have tested this change on my EVM.
DM6467 is another DaVinci SOC which uses the EMAC driver and i will
be sending patches that add DaVinci DM6467 support to the list soon.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
- memsetup.s is changed/merged to lowlevel_init.S
memsetup.S has a global label memsetup that just returns back to caller
- memsetup global label is changed/merged to lowlevel_init
This label is not called from anywhere.
Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
This function is needed for the new NAND infrastructure. We only need
a dummy implementation though for the NDFC.
Signed-off-by: Stefan Roese <sr@denx.de>
This is needed since now with HUSH enabled (amcc-common.h) the image
read from NAND exceeds the previous limit.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a UIC external_interrupt hang if critical or non-critical
interrupt is set at the same time as a normal interrupt is set on UIC0.
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Removed Magic numbers from Initialization preload registers
Tested with Kilauea, Glacier, Canyonlands and Katmai boards
About 5-7% improvement seen for LMBench memtests
Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
MPC5121 rev 2 silicon has a new register for controlling how long
CS is asserted after deassertion of ALE in multiplexed mode.
The default is to assert CS together with ALE. The alternative
is to assert CS (ALEN+1)*LPC_CLK clocks after deassertion of ALE.
The default is wrong for the NOR flash and CPLD on the ADS5121.
This patch turns on the alternative for CS0 (NOR) and CS2 (CPLD)
it does so conditionally based on silicon rev 2.0 or greater.
Signed-off-by: Martha J Marx <mmarx@silicontkx.com>
Signed-off-by: John Rigby <jrigby@freescale.com>
The existing I2C freqency dividers for FDR does not apply
to ColdFire platforms; thus, a seperate table is added
based on MCF5xxx Reference Manual
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Tabi Timur <timur@freescale.com>
Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
For some reason we duplicated the majority of code in lib_ppc/interrupts.c
not show how that happened, but there is no good reason for it.
Use the interrupt_init_cpu() and timer_interrupt_cpu() since its why
they exist.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
dm9000 has code to detect and initialize external phy parts, but later
on in the code the part is forced to use the internal phy
unconditionally. Remove the unused/untested code.
change the GPIO initialization so that only the GPIO used as an
internal phy reset (hardwired in the chip) is set as an output. The
remaining GPIO need to be handled by board specific code to prevent
possible drive conflicts. Set as inputs for safety.
replace a few magic numbers with defines
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
cmd_net.c command descriptions were updated to describe the optional
hostIPaddr argument. The dhcp command help message was also updated
to more closely reflect the other commands in cmd_net.c
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The DHCP handler has 1 state that is not listed in this case, causing a
failure message when there is actually no failure.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The option CONFIG_BOOTP_RANDOM_DELAY does not compile, because of a
missing extern inside the net/bootp.h header
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The only board using this driver is the SL8245 board.
Removed initialization for the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The only board using this driver is the Freescale MPC8610HPCD board.
Removed initialization for the driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added board_eth_init() function to bf537-stamp board.
Removed initialization for the Blackin EMAC driver from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers. (83xx, 85xx, 86xx).
The code is broken up into the following steps:
GET_SPD
COMPUTE_DIMM_PARMS
COMPUTE_COMMON_PARMS
GATHER_OPTS
ASSIGN_ADDRESSES
COMPUTE_REGS
PROGRAM_REGS
This allows us to share more code an easily allow for board specific code
overrides.
Additionally this code base adds support for >4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Provide a helper function that will setup the last available
LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There is no need for each OS specific function to call do_reset() we
can just do it once in bootm. This means its feasible on an error for
the OS boot function to return.
Also, remove passing in cmd_tbl_t as its not needed by the OS boot
functions. flag isn't currently used but might be in the future so
we left it alone.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Created a new fdt_initrd() to deal with setting the initrd properties
in the device tree and fixing up the mem reserve. We can use this
both in the choosen node handling and lets us remove some duplicated
code when we fixup the initrd info in bootm on PPC.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Created a bootm_start() that handles the parsing and detection of all
the images that will be used by the bootm command (OS, ramdisk, fdt).
As part of this we now tract all the relevant image offsets in the
bootm_headers_t struct. This will allow us to have all the needed
state for future sub-commands and lets us reduce a bit of arch
specific code on SPARC.
Created a bootm_load_os() that deals with decompression and loading
the OS image.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
To allow for persistent state between future bootm subcommands we
need the lmb to exist in a global state.
Moving it into the bootm_headers_t allows us to do that.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Set the fdt working address so "fdt FOO" commands can be used as part
of the bootm flow. Also set an the environment variable "fdtaddr"
with the value.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move the code that handles finding a device tree blob and relocating
it (if needed) into common code so all arch's have access to it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move determing if we have a ramdisk and where its located into the
common code. Keep track of the ramdisk start and end in the
bootm_headers_t image struct.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move entry point code out of each arch and into common code.
Keep the entry point in the bootm_headers_t images struct.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires
PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O
space such that 0xFA000000 in the processor's address space maps to 0
on the PCI I/O bus.
Signed-off-by Randy Vinson <rvinson@mvista.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
This patch adds elements to the 83xx sysconf structure and #define values that are used
by mpc83xx family devices.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
PCI card rather than a host computer.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This adds a helper function to unlock the PCI configuration bit, so that
any extra PCI setup (such as outbound windows, etc.) can be done after
using the 83XX_GENERIC_PCI code to set up the PCI bus.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Change the MPC8349EMDS board to use the generic PCI initialization code
for the mpc83xx cpu.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This "||" doesn't seem to work. Now using the idea suggest by Scott Wood
to combine both config options into one line. This even allows defining
both options and not generating the target object twice.
Signed-off-by: Stefan Roese <sr@denx.de>
- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
-- Timer Value Register @ TIMER Base + 4 is Read-only.
-- Prescale Value (Bits 3-2 of TIMER Control register)
can only be one of 00,01,10. 11 is undefined.
-- CFG_HZ for Versatile board is set to
#define CFG_HZ (1000000 / 256)
So Prescale bits is set to indicate
- 8 Stages of Prescale, Clock divided by 256
- The Timer Control Register has one Undefined/Shouldn't Use Bit
So we should do read/modify/write Operation
Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
If the path doesn't start with '/' check to see if it matches some alias
under "/aliases" and substitute the matching alias value in the path
and retry the lookup.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
As well as fdt_subnode_offset(), libfdt includes an
fdt_subnode_offset_namelen() function that takes the subnode name to
look up not as a NUL-terminated string, but as a string with an
explicit length. This can be useful when the caller has the name as
part of a longer string, such as a full path.
However, we don't have corresponding 'namelen' versions for
fdt_get_property() and fdt_getprop(). There are less obvious use
cases for these variants on property names, but there are
circumstances where they can be useful e.g. looking up property names
which need to be parsed from a longer string buffer such as user input
or a configuration file, or looking up an alias in a path with
IEEE1275 style aliases.
So, since it's very easy to implement such variants, this patch does
so. The original NUL-terminated variants are, of course, implemented
in terms of the namelen versions.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
In commit b6d80a20fc293f3b995c3ce1a6744a5574192125, we renamed all
libfdt functions to be prefixed with fdt_ or _fdt_ to minimise the
chance of collisions with things from whatever package libfdt is
embedded in, pulled into the libfdt build via that environment's
libfdt_env.h.
Except... I missed one. This patch applies the same treatment to
_stringlist_contains(). While we're at it, also make it static since
it's only used in the same file.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
libfdt is supposed to easy to embed in projects all and sundry.
Often, it won't be practical to separate the embedded libfdt's
namespace from that of the surrounding project. Which means there can
be namespace conflicts between even libfdt's internal/static functions
and functions or macros coming from the surrounding project's headers
via libfdt_env.h.
This patch, therefore, renames a bunch of libfdt internal functions
and macros and makes a few other chances to reduce the chances of
namespace collisions with embedding projects. Specifically:
- Internal functions (even static ones) are now named _fdt_*()
- The type and (static) global for the error table in
fdt_strerror() gain an fdt_ prefix
- The unused macro PALIGN is removed
- The memeq and streq macros are removed and open-coded in the
users (they were only used once each)
- Other macros gain an FDT_ prefix
- To save some of the bulk from the previous change, an
FDT_TAGALIGN() macro is introduced, where FDT_TAGALIGN(x) ==
FDT_ALIGN(x, FDT_TAGSIZE)
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Enabling -Wcast-qual warnings in dtc shows up a number of places where
we are incorrectly discarding a const qualification. There are also
some places where we are intentionally discarding the 'const', and we
need an ugly cast through uintptr_t to suppress the warning. However,
most of these are pretty well isolated with the *_w() functions. So
in the interests of maximum safety with const qualifications, this
patch enables the warnings and fixes the existing complaints.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
This patch turns on the -Wpointer-arith option in the dtc Makefile,
and fixes the resulting warnings due to using (void *) in pointer
arithmetic. While convenient, pointer arithmetic on void * is not
portable, so it's better that we avoid it, particularly in libfdt.
Also add necessary definition of uintptr_t needed by David Gibson's
changeset "dtc: Enable and fix -Wpointer-arith warnings" (the definition
comes from stdint.h, which u-boot doesn't have). -- gvb
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
During recent PCI-E tests it has been found that current
driverl level and de-emphasis values are not set correctly.
After sweeping throgh all de-ephasis values, it was found that
0x130 is a right value. Where 0x13 is driver level and 0 is
de-emphasis.
Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Recently the YAFFS filesystem support has been added to U-boot.
However, just enabling CONFIG_YAFFS2 is not enough to get it working.
ymount will generate an exception (when dereferencing mtd->readoob()), because
the genericDevice is a null pointer. Further, a lot of logging is produced
while using YAFFS fs, so logging should also be disabled.
Both issues are solved by this patch.
With this patch and CONFIG_YAFFS2 enabled, I get a readable filesystem
in U-boot, as well as in Linux.
Tested on a Atmel AT91SAM9261EK board.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Acked-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch fixes some minor issues introduced with the patch:
ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:
- Rework memory-queue and PLB arbiter optimization code, that the
local variable is not needed anymore. This removes one #ifdef.
- Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
of XXX+ 0x01). This was not introduced by Prodyut, just a
copy-paste problem.
Signed-off-by: Stefan Roese <sr@denx.de>
PPC405EX and PPC460EX/GT/SX
- Read pipeline depth set to 4 for PPC440SP/SPE, PPC405EX, PPC460EX/GT/SX
processors
- Moved PLB4 Arbiter register definitions to ppc4xx.h since it is shared
across processors (405 and 440/460)
- Optimize Memory Queue settings for PPC440SP/SPE and PPC460EX/GT/SX
processors
- Add register bit definitions for Memory Queue Configuration registers
Signed-off-by: Prodyut Hazarika <phazarika@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Move to using the environment variables 'ethaddr', 'eth1addr', etc..
instead of bd->bi_enetaddr, bi_enet1addr, etc.
This makes the code a bit more flexible to the number of ethernet
interfaces.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch changes the debug_printf() marco for U-Boot in hush.c and
moves the definition of DEBUG_SHELL to a place that is actually compiled
under U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de>
ARM, i386, m68k and ppc all have identical implementations of strmhz().
Other architectures don't provide this function at all.
This patch moves strmhz() into lib_generic, reducing code duplication
and providing a more unified API across architectures.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
fix build warnings @ mvBC-P board by using correct types, i.e. change
out_be32 to out_be16 and out_8 accordingly.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
This patch adds a hook whereby a board-specific routine can be called to
configure hardware for a PIO mode. The prototype for the board-specific
routine is:
int inline ide_set_piomode(int pio_mode)
ide_set_piomode should be prepared to configure hardware for a pio_mode
between 0 and 6, inclusive. It should return 0 on success or 1 on failure.
Signed-off-by: Steven A. Falco <sfalco@harris.com>
This patch removes some enums from ata.h and replaces them with an
include of libata.h. This way, we eliminate duplicated code, and
prevent errors whereby the different versions could be out of sync.
Signed-off-by: Steven A. Falco <sfalco@harris.com>
This patch fixes a missing vendor code in the flash_real_protect() function.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
New implement sector lock and unlock or softlock commands
do not exist in AMD legacy flash. Thus, causing issue
when erasing AMD legacy flash (such as lv040)
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The rest of the MAINTAINERS file appears to be sorted
almost-alphabetically, but entries for the newly added AVR32 boards were
added somewhat randomly. This patch sorts the list alphabetically again.
Also update my e-mail address. The old one still works, but it may not
work forever.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The MIMC200 board is based on Atmel's NGW100 dev kit, but with an extra
8MByte FLASH and 128KByte FRAM.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The received status and len was in little endian
format and caused the ethernet unable to proceed
further. Add __le16_to_cpu() in dm9000_rx_status_8/16/32bit().
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
There is no point in disabling the icache on 7xx/74xx/86xx parts and not
also flushing the icache. All callers of invalidate_l1_instruction_cache()
call icache_disable() right after. Make it so icache_disable() calls
invalidate_l1_instruction_cache() for us.
Also, dcache_disable() already calls dcache_flush() so there is no point
in the explicit calls of dcache_flush().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ePAPR spec has some subtle differences from the current device
tree based boot interface to the powerpc linux kernel. The powerpc
linux kernel currently ignores the differences that ePAPR specifies.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The 'license' command includes the U-Boot license (GPLv2) into the
actual bootloader binary. The license text can be shown interactively
at the U-Boot commandline.
For products where the commandline can actually be accessed by the
end user, this helps to prevent inadvertent GPL violations, since the
GPLv2 license text can no longer be 'forgotten' to be included into
the product.
The 'license' command can be enabled by CONFIG_CMD_LICENSE.
Signed-off-by: Harald Welte <laforge@openmoko.org>
[PATCH] add new 'unzip' command to u-boot commandline
common/cmd_mem.c: new command "unzip srcaddr dstaddr [dstsize]" to unzip from
memory to memory, and option CONFIG_CMD_UNZIP to enable it
Signed-off-by: Werner Almesberger <werner@openmoko.org>
Signed-off-by: Harald Welte <laforge@openmoko.org>
The CFG_ENV_SIZE is not suitable used for SPI flash erase
sector size if CFG_ENV_SIZE is less than CFG_ENV_SECT_SIZE.
Add condition check if CFG_ENV_SIZE is larger than
CFG_ENV_SECT_SIZE, calculate the right number of sectors for
erasing.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Incorrect CFG_HZ value, change 1000000 to 1000.
Rename #waring to #warning. RAMBAR1 uses twice
in start.S, rename the later to FLASHBAR. Insert
nop for DRAM setup. And, env_offset in linker file.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Remove non-common flash driver in
board/freescale/m54455evb/flash.c. The non-cfi flash will
use CONFIG_FLASH_CFI_LEGACY to configure the flash
attribute.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Since page size field is changed from oobblock to writesize. But OneNAND is not updated.
- fix bufferram management at erase operation
This patch includes the NAND/OneNAND state filed too.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
onenand_print_device_info():
- Now returns a string to be placed in mtd->name,
rather than calling printf.
- Remove verbose parameter as it becomes useless.
Signed-off-by: Fathi Boudra <fabo@debian.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Supporting page-aligned reads doesn't incure any sinificant overhead, just
a small change in the algorithm. Also replace in_8 with readb, since there
is no in_8 on ARM.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Also, remove the ctrl variable in favor of passing the constants
directly, and remove redundant (u8) casts.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset. I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Environment can be smaller than NAND block size, do not need to read a whole
block and minimum for writing is one page. Also remove an unused variable.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Fixes an issue with chip->state not always being set causing troubles.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Rather than scanning on boot, scan upon the first attempt to check the
badness of a block. This speeds up boot when not using NAND, and reduces
the likelihood of needing to reflash via JTAG if NAND becomes
nonfunctional.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Use of the non-skipping versions was almost always (if not always)
an error, and no valid use case has been identified.
Signed-off-by: Scott Wood <scottwood@freescale.com>
The hardware has separate registers for block and page-within-block,
but the division between the two has no apparent relation to the
actual erase block size of the NAND chip.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Using current driver elbc sometimes hangs during nand write. Reading back
last byte helps though (thanks to Scott Wood for the idea).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This is a driver for the Flash Control Machine of the enhanched Local Bus
Controller found on some Freescale chips (such as the mpc8313 and the
mpc8379).
Signed-off-by: Scott Wood <scottwood@freescale.com>
Some hardware, such as the enhanced local bus controller used on some
mpc83xx chips, does ecc transparently when reading and writing data, rather
than providing a generic calculate/correct mechanism that can be exported to
the nand subsystem.
The subsystem should not BUG() when calculate, correct, or hwctl are
missing, if the methods that call them have been overridden.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch turns off printing of bad blocks per default upon bootup.
This can always be shown via the "nand bad" command later.
Signed-off-by: Stefan Roese <sr@denx.de>
Here comes a trivial patch to cpu/arm926ejs/davinci/nand.c. Unfortunately I
don't have hardware handy so I can not test it at the moment but changes are
rather trivial so it should work. It would be nice if somebody with a
hardware checked it anyways.
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
This patch changes the NAND booting driver nand_spl/nand_boot.c to match
the new infrastructure from the updated NAND subsystem. This NAND
subsystem was recently synced again with the Linux 2.6.22 MTD/NAND
subsystem.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the 4xx NAND driver ndfc.c to match the new
infrastructure from the updated NAND subsystem. This NAND
subsystem was recently synced again with the Linux 2.6.22 MTD/NAND
subsystem.
Tested successfully on AMCC Sequoia and Bamboo.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes nand_wait_ready() to not just call nand_wait(),
since this will send a new command to the NAND chip. We just want to
wait for the chip to become ready here.
Signed-off-by: Stefan Roese <sr@denx.de>
Direct import of yaffs as a tarball as of 20071113 from their public
CVS-web at http://www.aleph1.co.uk/cgi-bin/viewcvs.cgi/yaffs2/
The code can also be imported on the command line with:
export CVSROOT=:pserver:anonymous@cvs.aleph1.co.uk:/home/aleph1/cvs cvs logon
(Hit return when asked for a password)
cvs checkout yaffs2
Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Changes requested by maintainer Stefan Roese after
posting patch to U-boot mailing list.
Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
- Fixing leading white spaces
- Fixing indentation where 4 spaces are used instead of tab
- Removing C++ comments (//), wherever I introduced them
Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
A lot changed in the Linux MTD code, since it was last ported from
Linux to U-Boot. This patch takes U-Boot NAND support to the level
of Linux 2.6.22.1 and will enable support for very large NAND devices
(4KB pages) and ease the compatibility between U-Boot and Linux
filesystems.
This patch is tested on two custom boards with PPC and ARM
processors running YAFFS in U-Boot and Linux using gcc-4.1.2
cross compilers.
MAKEALL ppc/arm has some issues:
* DOC/OneNand/nand_spl is not building (I have not tried porting
these parts, and since I do not have any HW and I am not familiar
with this code/HW I think its best left to someone else.)
Except for the issues mentioned above, I have ported all drivers
necessary to run MAKEALL ppc/arm without errors and warnings. Many
drivers were trivial to port, but some were not so trivial. The
following drivers must be examined carefully and maybe rewritten to
some degree:
cpu/ppc4xx/ndfc.c
cpu/arm926ejs/davinci/nand.c
board/delta/nand.c
board/zylonite/nand.c
Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
The autostart revert caused a bit of duplicated code as well as
code that was using images->autostart that needs to get removed so
we can build again.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When building the 8544DS board we get this error:
In file included from r8a66597-hcd.c:22:
u-boot/include/usb.h:190:2: error: #error USB Lowlevel not defined
make[1]: *** [r8a66597-hcd.o] Error 1
The cleanest fix is to only build r8a66597-hcd.c if CONFIG_USB_R8A66597_HCD
is set.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This is needed because we will be possibly be locating
devices at physical addresses above 32bits, and the asm
preprocessing does not appear to deal with ULL constants
properly. We now call write_bat in lib_ppc/bat_rw.c.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Correct the mx31_gpio_mux() function to allow changing all i.MX31 IOMUX
contacts instead of only the first 256 ones as is the case prior to
this patch.
Add missing MUX_* macros and update board files to use the new macros.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
The block and page parameters of onenand_verify_page() are not used. This causes a compiler error when CONFIG_MTD_ONENAND_VERIFY_WRITE is enabled.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
FILL_15BIT_555RGB macro extension for pixel swapping
by commit bed53753dd
introduced a bug in cfb_console:
Bitmaps with odd-numbered width won't be rendered
correctly and even U-Boot crashes are observed on
some platforms while repeated rendering of such
bitmaps with "bmp display". Also if a bitmap is
rendered to an odd-numbered x starting position,
the same problem occurs. This patch is an attempt
to fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
If logo_plot() should ever be called with x starting
position other than zero and for pixel depths greater
than 8bpp, logo colors distortion will be observed.
This patch fixes the issue.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
- os_data_header Variable is a carry over feature
& unused. So removed all instance of this variable
- Minor Code Style Update
Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
While locally preparing some U-Boot patches for ARM based OMAP3 boards, some
using OneNAND and some using NAND, we found some differences in OneNAND and
NAND command address handling.
As this might confuse users (it already confused us), we like to align OneNAND
and NAND address handling.
The issue is that cmd_onenand.c subtracts the onenand base address from the
addresses you type into the u-boot command line so, unlike nand, you can't
use addresses relative to the start of the onenand part e.g. this won't work:
onenand read 82000000 280000 400000
you have to use:
onenand read 82000000 20280000 400000
Looking at recent git, the only board currently using OneNAND is Apollon, and
for this the OneNAND base address is 0 (apollon.h)
#define CFG_ONENAND_BASE 0x00000000
so patch below won't break any existing boards and will align OneNAND and NAND
handling on boards where OneNAND base address is != 0.
Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Manikandan Pillai <mani.pillai@ti.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
The recent change to move the .bss outside of the image gives older
binutils (ld from eldk4.1/binutils-2.16) some headache:
ppc_85xx-ld: u-boot: Not enough room for program headers (allocated 3, need 4)
ppc_85xx-ld: final link failed: Bad value
We workaround it by being explicit about the program headers and not
assigning the .bss to a program header.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This reverts commit f5614e7926.
The commit was based on a misunderstanding of the (documented)
meaning of the 'autostart' environment variable. It might cause
boards to hang if 'autostart' was used, with the potential to brick
them. Go back to the documented behaviour.
Conflicts:
common/cmd_bootm.c
common/image.c
include/image.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
boot_get_ramdisk() should not treat the case when a FIT image does
not contain a ramdisk as an error.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Michal Simek <monstr@monstr.eu>
When switching the TQM8xxL modules to use the CFI flash driver,
support for the second flash bank was broken because the CFI driver
did not support dynamically sized banks. This gets fixed now.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The CFI driver allowed only for static initializers in the
CFG_FLASH_BANKS_LIST definition, i. e. it did not allow to map
several flash banks contiguously if the bank sizes were not known in
advance, which kind of violates U-Boot's design philosophy.
(will be used for example by the TQM8xxL boards)
Signed-off-by: Wolfgang Denk <wd@denx.de>
Add MII commands to the UEC driver. Note that once a UEC device is selected,
any device on its MDIO bus can be addressed.
Signed-off-by: David Saada <david.saada@ecitele.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
add support for Renesas R8A66597 usb controller.
This patch supports USB Host mode.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Add support to drivers/usb/usbdcore_omap1510.c for OMAP5912 and OMAP16xx devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The Sequoia board has two UARTs in "4-pin" mode. This patch modifies the GPIO
configuration to match the schematic, and also sets the SDR0_PFC1 register to
select the corresponding mode for the UARTs.
Signed-off-by: Steven A. Falco <sfalco@harris.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the Favr-32 board made by EarthLCD.
This kit, which is also called ezLCD-101 when running with EarthLCD firmware,
has a 10.4" touch screen LCD panel, 16 MB 32-bit SDRAM, 8 MB parallel flash,
Ethernet, audio out, USB device, SD-card slot, USART and various other
connectors for cennecting stuff to SPI, I2C, GPIO, etc.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Some of the flash memories produced by ATMEL start in read-only mode.
We need to unprotect it. This patch allows the AT49BV6416 to work with
cfi_flash memories. Tested in the at91rm9200ek board.
Signed-off-by: Rafael Campos Las Heras <rafael.campos@hanscan.com>
Signed-off-by: Stefan Roese <sr@denx.de>
On ADS5121 when booting linux the following errors are seen:
Unable to update property /soc5121@80000000:bus-frequency, err=FDT_ERR_NOTFOUND
Unable to update property /soc5121@80000000/ethernet@2800:local-mac-address, err=FDT_ERR_NOTFOUND
Unable to update property /soc5121@80000000/ethernet@2800:address, err=FDT_ERR_NOTFOUND
This is caused by ft_cpu_setup trying to deal with
both old and new soc node naming. This patch
fixes this by being smarter about what to
fixup.
Also do soc node fixups by compatible instead of by path.
A new board config called OF_SOC_COMPAT defined
to be "fsl,mpc5121-immr" replaces the old
OF_SOC node path that was defined to be "soc@80000000".
Old device trees still work, but the compatiblity
is conditional on CONFIG_OF_SUPPORT_OLD_DEVICE_TREES
which is on by default in include/configs/ads5121.h.
Signed-off-by: John Rigby <jrigby@freescale.com>
The current lcd_display_bitmap() function does not work properly
for the Atmel LCD controller.
2 fixes need to be done:-
(a) when setting the colour map, use the lcd_setcolreg() function
as provided by the Atmel driver
(b) the data is never actually written to the lcd framebuffer !!
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
TASREG is ColdFire platform, the include ppc4xx.h in
board/esd/common/flash.c causes conflict.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
The README file states that CONFIG_VIDEO_BMP_GZIP behaves as follows:
If this option is set, additionally to standard BMP
images, gzipped BMP images can be displayed via the
splashscreen support or the bmp command.
However, the splashscreen function *only* supports standard BMP images.
This patch adds the documented gzip support.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
The Atmel lcd controller is used on Atmel's AT91 (little endian) and
AVR32 (big endian) platforms.
As such, the controller can handle both big and little endian memory.
This patch fixes the driver for the AVR32 platform.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
U-Boot allows for configurable prompt strings using the
CONFIG_AUTOBOOT_PROMPT resp. CONFIG_MENUPROMPT definitions. So far,
the assumption was that any such user defined problts would contain
exactly one "%d" format specifier. But some boards did not.
To allow for flexible boot prompts without adding too complex code we
now allow to specify the whole list of printf() arguments in the user
definition. This is powerful, but requires a responsible user who
really understands what he is doing, as he needs to know for exanple
which variables are available in the respective context.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds pci_clk field to the global_data structure for the
processors which have CPM2 module in case the CONFIG_PCI is defined.
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
* Move to using absolute addressing always. Makes the scripts a bit more
portable and common
* Moved .bss after the end of the image. These allows us to have more
room in the resulting binary image for code and data.
* Removed .text object files that aren't really needed
* Make sure _end is 4-byte aligned as the .bss init code expects this.
(Its possible that the end of .bss isn't 4-byte aligned)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The origional code was using on odd reference to get to the first
real element in av_[]. The first two elements of the array are
not used for actual bins, but for house keeping. If we are more
explicit about how use the first few elements we can get rid of the
warnings:
dlmalloc.c: In function 'malloc_extend_top':
dlmalloc.c:1971: warning: dereferencing type-punned pointer will break strict-aliasing rules
dlmalloc.c:1999: warning: dereferencing type-punned pointer will break strict-aliasing rules
dlmalloc.c:2029: warning: dereferencing type-punned pointer will break strict-aliasing rules
...
The logic of how this code came to be is:
bin_at(0) = (char*)&(av_[2]) - 2*SIZE_SZ
SIZE_SZ is the size of pointer, and av_ is arry of pointers so:
bin_at(0) = &(av_[0])
Going from there to bin_at(0)->fd or bin_at(0)->size should be straight forward.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
A recent patch used '#if (CONFIG_CMD_USB)' instead of
'#if defined(CONFIG_CMD_USB)'. This patch fixes this problem and makes
common/bootm.c compile again.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
Tried fixing NAND support for the at91rm9200dk board; untested.
Disabled NAND support in the csb637 board config file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
- Relocate the location of U-Boot in the flash
- Save the environment in one sector of the flash memory
- MTD Support
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch allows booting from FLASH the ML507 board by Xilinx.
Previously, U-Boot needed to be loaded from JTAG or a Sytem ACE CF
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Signed-off-by: Stefan Roese <sr@denx.de>
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel. It offers versatile peripherals, such as ethernet, usb
device, usb host etc.
The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).
Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.
For more information see: http:///www.miromico.com/hammerhead
Signed-off-by: Julien May <mailinglist@miromico.ch>
[haavard.skinnemoen@atmel.com: various small fixes and adaptions]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The current implementation of get_timer() is only really useful after we
have relocated u-boot to memory. The i2c code is used before that as part
of the SPD DDR setup.
We actually have a bug when using the get_timer() code before relocation
because the .bss hasn't been setup and thus we could be reading/writing
a random location (probably in flash).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Due to increased space usage, U-Boot can no longer be stored in three sectors.
The current U-Boot use just over three flash sectors (197k), and U-Boot will
become corrupt after saving environment variables. This patch adds another 64k
to CFG_MONITOR_LEN.
Signed-off-by: Frank E. Svendsbøe <frank.svendsboe@gmail.com>
Because the cmd_tbl_s structure depends on the configuration file, it
must be assured that config.h is included before the structure is
evaluated by the compiler. If this is not certain, it could happen
that the compiler generates structures of different size, depending
on the fact if the source file includes <config.h> before or after
<command.h>.
The effect is that u-boot crashes when tries to relocate the command
table (for ppc) or try to access to the command table for other
architectures.
The problem can happen on board-depending commands. All general
commands under /common are unaffected, because they include already
config.h before command.h.
Signed-off-by: Stefano Babic <sbabic@denx.de>
cmd_ide.c:827: Warnung: weak declaration of `ide_outb' after first use results in unspecified behavior
cmd_ide.c:839: Warnung: weak declaration of `ide_inb' after first use results in unspecified behavior
Signed-off-by: Heiko Schocher <hs@denx.de>
Support for the adsvix was originally provided by Applied Data
Systems (ADS), inc., now EuroTech, Inc.
The board never shipped aside from some sample boards.
Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
If CONFIG_SKIP_RELOCATE_UBOOT is set the flag GD_FLG_RELOC is usually
never set, because relocation to RAM is actually never done by U-boot
itself. However, several pieces of code check if this flag is set at
some time.
So, to make sure this flag is set on boards skipping relocation, this
is added to the initialisation of U-boot at a moment where it is safe
to do so.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Prevent i2c_init() in fsl_i2c.c from writing to the data segment before
relocation. Commit d8c82db4 added the ability for i2c_init() to program the
I2C bus speed and save the value in i2c_bus_speed[], which is a global
variable. It is an error to write to the data segment before relocation,
which is what i2c_init() does when it stores the bus speed in i2c_bus_speed[].
Signed-off-by: Timur Tabi <timur@freescale.com>
Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
on alchemy cpus.
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Renamed initialization functions for atngw100 and atstk1000.
Removed initializations for these boards from net/eth.c
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
map_physmem() takes a phys_addr_t as parameter. This type is defined in
asm/types.h, so we need to include that file.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Some CPU POST tests did not disable the interrupts while running. This
seems to be necessary to protect this self modifying code.
Signed-off-by: Stefan Roese <sr@denx.de>
The SPR IVPR register is only present (as far as I know) for
processors with a PPC440 core.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Acked-by: Stefan Roese <sr@denx.de>
This patch defines CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL for all
440/460 platforms. This may be needed since those platforms support
36bit physical address space.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem with incorrect MODTx (On Die Termination)
setup for a configuration with multiple DIMM's and multiple ranks.
Without this change Katmai was unable to boot Linux with DDR2 frequency
>= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
with DDR2 frequency = 640MHz and mem=4GB.
Signed-off-by: Stefan Roese <sr@denx.de>
The Xilinx ML507 Board is a Virtex 5 prototyping board that includes,
among others:
-Virtex 5 FX FPGA (With a ppc440x5 in it)
-256MB of SDRAM2
-32MB of Flash
-I2C Eeprom
-System ACE chip
-Serial ATA connectors
-RS232 Level Conversors
-Ethernet Transceiver
This patch gives support to a standard design produced by EDK for this
board: ppc440, uartlite, xilinx_int and flash
- Includes Changes propossed by Stefan Roese and Michal Simek
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>
-This patchs gives support for the embbedded ppc440
on the Virtex5 FPGAs
-interrupts.c divided in uic.c and interrupts.c
-xilinx_irq.c for xilinx interrupt controller
-Include modifications propossed by Stefan Roese
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Stefan Roese <sr@denx.de>
This got broken by commits 93c56f212c
[cfi_flash: support of long cmd in U-boot.]
That command needs to be in little endian format on BE machines
with CFG_WRITE_SWAPPED_DATA. Without this patch, the command 0xf0
gets saved on stack as 0x00 00 00 f0 and 0x00 gets written into
the cmdbuf in case portwidth = chipwidth = 8bit.
Cc: Alexey Korolev <akorolev@infradead.org>
Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
The thinko was quite silly indeed, I messed with !ptr. Normally this
would trigger some fault, but in U-Boot NULL pointer is equal to phys
0, so the code was working still, just didn't actually test mpc8315erdb
environment variable value. Heh.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Freescale ships MPC8315E-RDB boards either with TSEC1 and USB UTMI
support, or without TSEC1 but with USB ULPI PHY support in addition.
With this patch user can specify desired USB PHY.
Also, it seems that we can't distinguish the two boards in software, so
user have to set `mpc8315erdb' environment variable to either 'tsec1'
(TSEC1 enabled) or `ulpi' (board with ULPI PHY, TSEC1 disabled), so that
Linux will not probe for TSEC1.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently U-Boot can only fixup the usb dr_mode, but some boards (namely
MPC8315E-RDB) can use two PHY types: ULPI (stand-alone OTG port) or UTMI
(connected to the four-ports hub, usb host only).
This patch implements support for passing Dual-Role USB controller's
device tree property phy_type through the usb_phy_type environment
variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
on the network with it's offered IP number; it should not reply until
after it has received a DHCP ACK message. Also ensures that U-Boot
does it's DHCPREQUEST as broadcast (per RFC 2131).
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This got changed by commit 93c56f212c
[cfi_flash: support of long cmd in U-boot.]
Long is the wrong type because it will behave differently on 64bit
machines in a way that is probably not expected. u32 should be
enough.
Cc: Alexey Korolev <akorolev@infradead.org>
Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats. The
NXID format replaces the older CCID format, but it's important to support both
since most boards out there still use the CCID format. This change is in
preparation for using one file to handle both formats. This will also unify
EEPROM support for all Freescale 85xx and 86xx boards.
Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
instead of ID_EEPROM_ADDR.
Signed-off-by: Timur Tabi <timur@freescale.com>
The L2_INIT_RAM option was unused, and recent changes to the TLB code
meant that the INIT_RAM TLBs weren't being cleared out. In order to reduce
the amount of mapped space attached to nothing, we change things so the TLBs
get cleared.
Signed-off-by: Andy Fleming <afleming@freescale.com>
The fake flash bank was generating errors for anyone who didn't have a
PromJET hooked up to the board. As that constitutes the vast majority of
users, we remove it.
Signed-off-by: Andy Fleming <afleming@freescale.com>
The L2 size detection code was a bit confusing and we kept having to add
code to it to handle new processors. Change the sense of detection so we
look for the older processors that aren't changing.
Also added support for 1M cache size on 8572.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This was proposed by Paul Gortmaker in response to Wolfgang's comments on
similar #defines in sbc8560.h.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add in the default fdt settings and the typical EXTRA_ENV
settings as borrowed from the mpc8560ads. Fix a couple
of stale references to the mpc8560ads dating back to the
original clone/fork.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add in for the sbc8560, the ft_board_setup() routine, based on what is
in use for the Freescale MPC8560ADS board.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The existing config doesn't define CONFIG_HAS_ETH0, and so the
fdt support doesn't update the zeros in the dtb local-mac with
real data from the u-boot env. Since the existing config is
tailored to just two interfaces, get rid of the ETH2 definitions
at the same time.
Also don't include any end user specific data into the environment
by default -- things like MAC address, network parameters etc. need
to come from the end user.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
The sbc8560 board ships with 512MB of memory installed,
but the current cs0_bnds is hard coded for 256MB. Set the
value based on CFG_SDRAM_SIZE.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The definitions for the TSEC have become out of date. There is no
longer any such options like "CONFIG_MPC85xx_TSEC1" or similar.
Update to match those of other boards, like the MPC8560ADS.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Some boards that have external 16550 UARTs don't have a direct
tie between bi_busfreq and the clock used for the UARTs. Boards
that do have such a tie should set CFG_NS16550_CLK to be
get_bus_freq(0) -- which most of them do already.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
With a page size of BOOKE_PAGESZ_16M, both the real and effective
addresses must be multiples of 16MB. The hardware silently truncates
them so the code happens to work. This patch clarifies the situation
by establishing addresses that the hardware doesn't need to truncate.
Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Delete the crypto node if not on an E-processor. If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping
space for some anyway, we were allowing speculative loads into unmapped space,
which would cause an exception (annoying, even if ultimately harmless).
Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
problem.
Signed-off-by: Andy Fleming <afleming@freescale.com>
We need to wait while drawing engine clears frame
buffer before any further software accesses to frame
buffer will be initiated. Otherwise software drawn
parts could be partially destroyed by the drawing
engine or even GDC chip freeze could occur (as
observed on socrates board).
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Clean Makefile
Move device specific values to driver for better reading
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefan Roese <sr@denx.de>
Microblaze and PowerPC use boot_get_ramdisk for loading
ramdisk to memory with checking return value.
Return 0 means success. Return 1 means failed.
Here is correspond part of code from bootm.c which check
return code.
ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_PPC,
&rd_data_start, &rd_data_end);
if (ret)
goto error;
Signed-off-by: Michal Simek <monstr@monstr.eu>
Redesign uartlite driver to in_be32 and out_be32 macros
Fix missing header in io.h
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.
Signed-off-by: Stefan Roese <sr@denx.de>
Mail to kharris@nexus-tech.net bounces because the user doesn't exist
anymore. You can't be a maintainer without a valid e-mail address, so
move all boards that used to be maintained by Kyle Harris to the
"orphaned" list.
Currently, only PowerPC has a list of orphaned boards, so this patch
creates one for ARM as well.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
On the at91sam9260ep development board there is an EEPROM
connected to the TWI interface (PA23, PA24 Peripheral A
multiplexing), so we cannot use these pins as ETX2, ETX3.
This patch configures PA10, PA11 pins for ETX2, ETX3
instead of PA23, PA24 pins.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Manuel Sahm <Manuel.Sahm@feig.de>
The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values
so it was not possible to set a slow pixel clock and thus prevented
display on small screens.
Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
Acked-by: John Rigby <jrigby@freescale.com>
board/ads5121/iopin.c
Replace bit fields in struct iopin_t with a single
field and intialize it via plain old macros.
This fixes the type pun warnings and makes the code
more readable.
board/ads5121/ads5121.c
Add include iopin.h to ads5121.c for the iopin_initialize
prototype.
Add an extern void ads5121_diu_init(void)
Signed-off-by: John Rigby <jrigby@freescale.com>
Remove all CFG_CSn_RO in cpu/mcf52x2/cpu_init.c. If
CFG_CSn_RO is defined as 0, the chipselect will not
be assigned.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
clock module in cpu/<cf arch>/cpu_init.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
The timer was assigned to wrong timer memory mapped which
caused udelay() and timer() not working properly.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
The formula "counter = (u32) (gd->bus_clk / gd->baudrate) / 32"
can generate the wrong divisor due to integer division truncation.
Round the calculated divisor value by adding 1/2 the baudrate
before dividing by the baudrate.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
This patch now moves common.h to the top of the inlcude list. This
is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that
the phys_size_t/phys_addr_t are defined to the correct size in this
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch cleans up the 440SPe PCIe register usage. Now only defines
from the include/asm-ppc/4xx_pcie.h are used.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch reworks the 440GX interrupt handling so that the common 4xx
code can be used. The 440GX is an exception to all other 4xx variants
by having the cascading interrupt vectors not on UIC0 but on a special
UIC named UICB0 (UIC Base 0). With this patch now, U-Boot references
the 440GX UICB0 when UIC0 is selected. And the common 4xx interrupt
handling is simpler without any 440GX special cases.
Also some additional cleanup to cpu/ppc4xx/interrupt.c is done.
Signed-off-by: Stefan Roese <sr@denx.de>
This 2nd patch now removes all UIC mask bit definition. They should be
generated from the vectors by using the UIC_MASK() macro from now on.
This way only the vectors need to get defined for new PPC's.
Also only the really used interrupt vectors are now defined. This makes
definitions for new PPC versions easier and less error prone.
Another part of this patch is that the 4xx emac driver got a little
cleanup, since now the usage of the interrupts is clearer.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is the first step to consolidate the UIC related defines in the
4xx headers. Move header from asm-ppc/ppc4xx-intvec.h to
asm-ppc/ppc4xx-uic.h as it will hold all UIC related defines in the next
steps.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes all EBC related defines from the PPC4xx headers
ppc405.h and ppc440.h and introduces a new header
include/asm-ppc/ppc4xx-ebc.h
with all those defines.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for placing the RGMII bridge on the
PPC405EX(r) into MII/GMII mode and allows a board-specific
configuration to specify the bridge mode at compile-time.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch completes the preprocessor mneomics for the IBM DDR2 SDRAM
controller registers (MODT and INITPLR) used by the
PowerPC405EX(r). The MMODE and MEMODE registers are unified with their
peer values used for the INITPLR MR and EMR registers,
respectively. Finally, a spelling typo is correct (MANUEL to MANUAL).
With these mnemonics in place, the CFG_SDRAM0_* magic numbers for
Kilauea are replaced by equivalent mnemonics to make it easier to
compare and contrast other 405EX(r)-based boards (e.g. during board
bring-up).
Finally, unified the SDRAM controller register dump routine such that
it can be used across all processor variants that utilize the IBM DDR2
SDRAM controller core. It produces output of the form:
PPC4xx IBM DDR2 Register Dump:
...
SDRAM_MB0CF[40] = 0x00006701
...
which is '<mnemonic>[<DCR #>] = <value>'. The DCR number is included
since it is not uncommon that the DCR values in header files get mixed
up and it helps to validate, at a glance, they match what is printed
in the user manual.
Tested on:
AMCC Kilauea/Haleakala:
- NFS Linux Boot: PASSED
- NAND Linux Boot: PASSED
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add additional DDR2 SDRAM memory controller DCR mneomnics, condition
revision ID DCR based on 405EX, and add field mnemonics for bus error
status and ECC error status registers.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds bit field mnemonics for the 405EX(r) SDR0_SRST soft reset register.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
While the PowerPC 405EX(r) shares in common the AMCC/IBM DDR2 SDRAM
controller core also used in the 440SP, 440SPe, 460EX, and 460GT, in
the 405EX(r), SDRAM_MCSTAT has a different DCR value.
Its present value on the 405EX(r) causes a read back of 0xFFFFFFFF
which causes SDRAM initialization to periodically fail since it can
prematurely indicate SDRAM ready status.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add AMCC Redwood reference board that uses the latest
PPC 464 CPU processor combined with a rich mix of peripheral
controllers. The board will support PCIe, mutiple Gig ethernet
ports, advanced hardware RAID assistance and IEEE 1588.
Signed-off-by: Feng Kan <fkan@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Some boards based on AT91SAM926X-EK use smaller DF chips to keep
bootstrap, u-boot and its environment, using NAND or other external
storage for kernel and rootfs. This patch adds support for
small 1024x263 chip.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
This patch fixes a potentially serious issue related to USB which was
discouvered by Martin Krause <martin.krause@tqs.de> and fixed for
ARM920T. Martin wrote:
Turn off USB to prevent the host controller from writing to the
SDRAM while Linux is booting. This could happen, because the HCCA
(Host Controller Communication Area) lies within the SDRAM and the
host controller writes continously to this area (as busmaster!), for
example to increase the HccaFrameNumber variable, which happens
every 1 ms.
This is a slightly modified version of the patch in order to shutdown
USB when booting on all architectures.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
ADS5121 Rev 3 board is now the default config
config targets are now
ads5121_config
Rev 3 board with
PCI
M41T62 on board RTC
512MB DRAM
ads5121_rev2_config
Rev 2 board with
No PCI
256MB DRAM
Signed-off-by: Martha Marx <mmarx@silicontkx.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Rigby <jrigby@freescale.com>
Only print partition for selected device if user supplied the <dev>
arg with the "usb part [dev]" command.
Signed-off-by: Christian Eggers <ceggers@gmx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
This patch fixes bugs in usbdcore*.c related to the use of devices
with multiple configurations.
The original code made mistakes about the meaning of configuration value and
configuration index, and the resulting off-by-one errors resulted in:
* SET_CONFIGURATION always selected the first configuration, no matter what
wValue is being passed.
* GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
configuration (index 0).
Signed-off-by: Harald Welte <laforge@openmoko.org>
Acked-by: Markus Klotzbuecher <mk@denx.de>
Only print partition for selected device if user supplied the <dev>
arg with the "usb part [dev]" command.
Signed-off-by: Christian Eggers <ceggers@gmx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
This patch fixes bugs in usbdcore*.c related to the use of devices
with multiple configurations.
The original code made mistakes about the meaning of configuration value and
configuration index, and the resulting off-by-one errors resulted in:
* SET_CONFIGURATION always selected the first configuration, no matter what
wValue is being passed.
* GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
configuration (index 0).
Signed-off-by: Harald Welte <laforge@openmoko.org>
Acked-by: Markus Klotzbuecher <mk@denx.de>
This patch fixes NAND related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves the check, if a device should be skipped in PCI PNP
configuration into the function pci_skip_dev(). This function is defined
as weak so that it can be overwritten by a platform specific one if
needed. The check if the device should get printed in the PCI summary upon
bootup (when CONFIG_PCI_SCAN_SHOW is defined) is moved to the function
pci_print_dev() which is also defined as weak too.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes ppc4xx related printf format warning. Those warnings are
now visible since patch dc4b0b38d4
[Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
really helpful.
Signed-off-by: Stefan Roese <sr@denx.de>
Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
To support such configurations, we "only" map the first 2GB via the TLB's. We
need some free virtual address space for the remaining peripherals like, SoC
devices, FLASH etc.
Note that ECC is currently not supported on configurations with more than 2GB
SDRAM. This is because we only map the first 2GB on such systems, and therefore
the ECC parity byte of the remaining area can't be written.
Signed-off-by: Stefan Roese <sr@denx.de>
This PCI-X e1000 variant works by just adding in the correct
PCI IDs in the appropriate places.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
(introduced by commit 391fd93ab2)
This patch makes SPARC targets build again. It is caused by
phys_addr_t and phys_size_t being defined in the wrong header
file. include/lmb.h need those typedefs to build.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Some macros such as NAND_CTL_SETALE conflict between current and legacy
NAND, being defined by the subsystem in the former case and the board
config file in the latter.
Signed-off-by: Scott Wood <scottwood@freescale.com>
ARM: Fix for incorrect version of patch applied when
adding support for the Lyrtech SFF-SDR board.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Philip Balister, OpenSDR <philip@opensdr.com>
The LMB code now uses phys_addr_t and phys_size_t. Also, there were a couple
of casting problems in the bootm code that called the LMB functions.
Signed-off-by: Andy Fleming <afleming@freescale.com>
gcc-4.3.x generates the following:
bootm.c: In function 'do_bootm_linux':
bootm.c:208: warning: cast from pointer to integer of different size
bootm.c:215: warning: cast from pointer to integer of different size
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
common/env_common.c (default_env): new function that resets the environment to
the default value
common/env_common.c (env_relocate): use default_env instead of own copy
common/env_nand.c (env_relocate_spec): use default_env instead of own copy
include/environment.h: added default_env prototype
Signed-off-by: Werner Almesberger <werner@openmoko.org>
Signed-off-by: Harald Welte <laforge@openmoko.org>
The writeenv() and readenv() calls introduced by the recently added bad block
management for environment variables were missing casts therefore producing
compile time warnings.
While at it fixing some typo in a comment and indentation.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This is particularly problematic now that non-NAND-specific code is
including <nand.h>, and thus all debugging code is being compiled
regardless of whether it was requested, as reported by Scott McNutt
<smcnutt@psyent.com>.
Signed-off-by: Scott Wood <scottwood@freescale.com>
After we move the atmel_mci driver into drivers/mmc, we can't select
it with CONFIG_MMC anymore. Introduce a new symbol specifically for
this driver so that there's no ambiguity.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
In order to consolidate more of the various MMC drivers around the
tree, we must first have a common place to put them.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Acked-by: Jean-Chritophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The compiler will help find mismatches between printf formats and
arguments if you let it. This patch adds the necessary attributes to
declarations in include/common.h, then begins to correct the resulting
compiler warnings. Some of these were bugs, e.g., "$d" instead of
"%d" and incorrect arguments. Others were just annoying, like
int-long mismatches on a system where both are 32 bits. It's worth
fixing the annoying errors to catch the real ones.
Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
Add 'ethaddr' and 'eth1addr' to the Linux kernel environment if
they are set in the U-Boot environment.
Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
As pointed out by Jerry Hicks, this patch corrects the device ID of
the Spansion AM29DL800BB NOR device. Verified against latest Spansion
datasheet (rev C4 from Dezember 2006).
Signed-off-by: Stefan Roese <sr@denx.de>
By Cleanup out-or-tree building for some boards (.depend)
(commit:c8a3b109f07f02342d097b30908965f7261d9f15)
because filse ware changed, some SH-boards have compile error.
I revised this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The watchdog on 8610 board is enabled by setting sw[6]
to on. Once enabled, the watchdog can not be disabled
by software. So feed the dog in u-boot is necessary for
normal operation.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c.
Remove duplicate code in a if/else block in
cpu/arm926ejs/davinci/lxt972.c.
Fixed style issues.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remove duplicate definitions in include/lxt971a.h.
Remove duplicate registers and bits definitions in
include/lxt971a.h for standard MII registers, and
use values in include/miiphy.h instead.
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Renesas SH7763 has 2 channel Ethernet device.
This is 10/100/1000 Base support.
But this patch check 10/100 Base only.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
New NOR Flash board support and remove old type flash board config.
And Remove network setting from config file.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This change helps with better handling with others
Xilinx based platform.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stefan Roese <sr@denx.de>
This patch is the first step in cleaning up net/eth.c, by moving Ethernet
initialization to CPU or board-specific code. Initial implementation is
only on the Freescale TSEC controller, but others will be added soon.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Conflicts:
board/amirix/ap1000/serial.c
board/exbitgen/exbitgen.c
board/exbitgen/flash.c
board/ml2/serial.c
board/xilinx/ml300/serial.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
AT91 RSTC registers are battery-backuped, so their values
are not reset across power cycles. One of those registers,
the AT91_RSTC_MR register, is being modified by U-Boot, in
the ethernet initialisation routine, to generate a 500ms
user reset.
Unfortunately, this value is not being restored afterwards,
causing subsequent resets to also last for 500ms.
This long reset sequence causes problems (at least) in the
boot sequence from NOR: by the time the CPU tries to load
a program from the NOR flash, the latter is still in reset
and not yet available.
Additionaly, this patch fixes a bug in the original code which
caused the reset delay to last for 2s instead of 500ms.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
My text-editor (vim) has a bit of trouble syntax-highlighting the
cmd_nvedit.c file, because it apparently does not parse C
ifdef/else/endif. The following patch does not change the behavior of
the code at all, but does allow the editor to properly
syntax-highlight the file.
Signed-off-by: Steve Falco <sfalco@harris.com>
The Register URXD contains status information in bits [15..8].
With status bit 15 set, CTRL-C was reported as 0x8003 instead
of 0x03. Therefore CTRL-C was not detected.
To solve this, bits [15..8] were masked out now.
Signed-off-by: Juergen Kilb <J.Kilb@gmx.de>
Acked-by: Felix Radensky <felix@embedded-sol.com>
This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
this out.
Signed-off-by: Stefan Roese <sr@denx.de>
Global FIT image operations like format check cannot be performed on
a first sector data, defer them to the point when whole FIT image was
uploaded to a system RAM.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Partial ('cmd_nand' case) Acked-by: Grant Erickson <gerickson@nuovations.com>
NAND and DOC bits Acked-by: Scott Wood <scottwood@freescale.com>
The driver need wait for the device updating signature to host.
If we don't wait for it, the driver can not detect the device(disk)
when the system powers up.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch implements a fix provided by AMCC so that the lockup upon
simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
anymore:
Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
(bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
USB 2.0 host and SATA.
This errata is not officially available yet. I'll update the comment
to add the errata number later.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the Lyrtech SFF-SDR board,
based on the TI DaVinci architecture (ARM926EJS).
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Philip Balister <philip@balister.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This moves the MMC and SD Card command definitions from
include/asm/arch/mmc.h into include/mmc.h. These definitions are
given by the MMC and SD Card standards, not by any particular
architecture.
There's a lot more room for consolidation in the MMC drivers which
I'm hoping to get done eventually, but this patch is a start.
Compile-tested for all avr32 boards as well as lpc2292sodimm and
lubbock. This should cover all three mmc drivers in the tree.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Current code requires that a compiled device tree have space added to the end to
leave room for extra nodes added by board code (and the chosen node). This
requires that device tree creators anticipate how much space U-Boot will add to
the tree, which is absurd. Ideally, the code would resize and/or relocate the
tree when it needed more space, but this would require a systemic change to the
fdt code, which is non-trivial. Instead, we resize the tree inside
boot_relocate_fdt, reserving either the remainder of the bootmap (in the case
where the fdt is inside the bootmap), or adding CFG_FDT_PAD bytes to the size.
Signed-off-by: Andy Fleming <afleming@freescale.com>
__lmb_alloc_base can underflow if it fails to find free space. This was fixed
in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc. This patch
merely updates __lmb_alloc_base to resemble the current version in Linux.
Signed-off-by: Andy Fleming <afleming@freescale.com>
lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
lmb_reserve to temporarily reserve some memory.
Signed-off-by: Andy Fleming <afleming@freescale.com>
ALIGN() returns the smallest aligned value greater than the passed
in address or size. Taken from Linux.
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch includes <asm/types.h> before <asm/u-boot.h> in some 4xx
board specific files where it has been missing.
Signed-off-by: Stefan Roese <sr@denx.de>
When compile-testing on powerpc, I get errors like this:
net/nfs.c:422: undefined reference to `__stack_chk_fail_local'
This seems to be because -fstack-protector is on by default, so
let's explicitly disable it on all architectures that support the
option.
The Ubuntu toolchain is affected by this problem, and according to
Mike Frysinger, Gentoo has been running with SSP enabled for years.
More and more distros are turning SSP on by default, so this problem
is likely to get worse in the future.
Also, powerpc just happens to be one of the arches I do
compile-testing on. There may be other arches affected by this too.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
During 83xx setup the "System I/O configuration register high" gets
overwritten with user defined value if CFG_SICRH is defined.
Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH
must keep their reset value regardless of configuration.
On my board (using RGMII) those bits are set after reset - yet it's
unclear where they come from.
The patch keeps both bits on MPC834x and MPC8313.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
to avoid this:
cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined
In file included from cpu.c:33:
/home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted
left by one. So the additional shift is bogus.
Signed-off-by: Stefan Roese <sr@denx.de>
The ATNGW100 has 8MB DataFlash on board. Give users access to it through
the new SPI flash framework.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Use the new GPIO manipulation functions to set up the chip select lines,
and make sure both busses use GPIO for chip select control.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch is based on the following patch sent a few minutes ago:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
It is untested, of course. Anton, could you please give it a try.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Building for 4xx doesn't work since commit 4dbdb768:
In file included from 4xx_pcie.c:28:
include/asm/processor.h:971: error: expected ')' before 'ver'
make[1]: *** [4xx_pcie.o] Error 1
This patch fixes the problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
This patch simplifies flash_toggle() (AMD commandset), which is used to
detect if a FLASH device is still busy with erase/program operations. On
800MHz Canyonlands/Glacier boards (460EX/GT) the current implementation
did not detect the busy state reliably, resulting in non erased sectors
etc. This patch now simplifies this function by "just" comparing the
complete data-word instead of ANDing it with the command-word (0x40)
before the compatison. It is done the same way in the Linux implementation
chip_ready() in cfi_cmdset_0002.c.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch disables the square wave output of the M41T62 RTC used on
Canyonlands & Glacier. Here the explanation:
The serial real-time clock part used in the design is an
STMicro M41T62. This part has a full-time 32KHz square wave
output that is connected to the TmrClk input to the
processor. The default state for this square wave output is
enabled so the output runs continuously when the board is
powered normally and also from the battery. The TmrClk input
to the processor goes to ground when the power is removed
from the board/processor, and therefore the running square
wave output is driving ground which drains the battery quickly.
Signed-off-by: Stefan Roese <sr@denx.de>
This commit:
commit 338cc03846
Author: Wolfgang Denk <wd@denx.de>
Date: Fri Jun 6 14:28:14 2008 +0200
tools/mkimage: fix compiler warnings on some systems.
Broke building on some systems, because the host's string.h was interfering
with u-boot's linux/string.h. It doesn't look like we need the u-boot one if
we're building for the host, so now we only include when building inside
u-boot.
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory. phys_size_t is defined as an unsigned long on almost
all current platforms.
This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram). It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.
Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This updates the lmb code to use phys_size_t
and phys_addr_t instead of unsigned long. Other code
which interacts with this code, like getenv_bootm_size()
is also updated.
Booted on MPC8641HPCN, build-tested ppc, arm, mips.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Currently, both are defined as an unsigned long, but
should be phys_size_t. This should result in no real change,
since phys_size_t is currently an unsigned long for all the
default configs. Also add print_lnum to cmd_bdinfo to deal
with the potentially wider memsize.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
LAWs have the concept of priority so its useful to be able to allocate
the lowest (highest number) priority. We will end up using this with the
new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose. This makes life
a bit easier going forward with the new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
Make it so we keep track of which LAWs have allocated and provide
a function (set_next_law) which can allocate a LAW for us if one is
free.
In the future we will move to doing more "dynamic" LAW allocation
since the majority of users dont really care about what LAW number
they are at.
Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
A number of board ports have empty version of board_early_init_f
for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove unused and unconfigured DDR test code from FSL 85xx boards.
Besides, other common code exists.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
memory. The current memory map only supports up to 128 MiB Flash.
This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
set, up to 1 GiB flash is supported. To achieve this, the memory
map has to be adjusted in great parts (for example the CCSRBAR is
moved from 0xE0000000 to 0xA0000000).
If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
memory map also has to be considered in the kernel (changed
CCSRBAR address, changed PCI IO base address, ...). Please use
an appropriate Flat Device Tree blob (tqm8548.dtb).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds support for NAND FLASH on the TQM8548. It is disabled by
default and can be enabled for the TQM8548 modules. It is now based on
the re-written FSL NAND UPM driver. A patch has been posted earlier today
with the subject:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
Note that the R/B pin is not supported by that module requiring to use
the specified maximum delay time.
Note: With NAND support enabled the size of the U-Boot image exceeds
256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
doubling the image size :-(.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds support for PCI express cards. The board support
now uses common FSL PCI init code, for both, PCI and PCIe on all
TQM85xx modules.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds basic support for the TQM8548 module from TQ-Components
(http://www.tqc.de/) including DDR2 SDRAM initialisation and support for
eTSEC 3 and 4
Furthermore Flash buffer write has been enabled to speed up output to
the Flash by approx. a factor of 10.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds support for Linux kernels using the Flat Device Tree.
It also re-defines the default environment settings for booting Linux
with the FDT blob.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch adds initialization of the UPMC RAM to support up to two
Intel 82527 compatible CAN controller on the TQM85xx modules.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
This patch fixes the re-calculation of the automatic chip select
configuration for boards with two populated FLASH banks.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
The 'N' type Spansion flashes (S29GLxxxN series) have bigger sectors,
than the formerly used 'M' types (S29GLxxxM series), so the flash layout
needs to be changed -> new start address of the environment. The macro
definition CONFIG_TQM_FLASH_N_TYPE is undefined by default and must be
defined for boards with 'N' type flashes.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
as serial interface anyway. Worse, on some board variants configuring the
pins for SCC1 leads to short circuits (for example on the TQM8541-BG).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
The working_fdt pointer was declared in common/fdt_support.c but was
not used there. Move it to common/cmd_fdt.c where it is used (it is
also used in lib_ppc/bootm.c).
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
differentiate with local variables of the same name by renaming the
global 'fdt' variable 'working_fdt'.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The submitted patch seems to have been more up-to-date, but an older patch was
already in the repository. This patch encompasses the differences
Taken entirely from Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This is a re-write of the NAND FSL UPM driver using the more universal
hwcontrol callback (instead of the cmdfunc callback). Here is a brief
list of furher modifications:
- For the time being, the UPM setup writing the UPM array has been
removed from the driver and must now be done by the board specific
code.
- The bus width definition in "struct fsl_upm_nand" is now in bits to
comply with the corresponding Linux driver and 8, 16 and 32 bit
accesses are supported.
- chip->dev_read is only set if fun->dev_ready != NULL, which is
required for boards not connecting the R/B pin.
- A few issue have been fixed with MxMR bit manipulation like in the
corresponding Linux driver.
Note: I think the "io_addr" field of "struct fsl_upm" could be removed
as well, because the address is already determined by
"nand->IO_ADDR_[RW]", but I'm not 100% sure.
This patch has been tested on a TQM8548 modules with the NAND chip
Micron MT29F8G08FABWP.
This patch is based on the following patches posted to this list a few
minutes ago:
PPC: add accessor macros to clear and set bits in one shot
83xx/85xx/86xx: add more MxMR local bus definitions
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
The boot output is now aligned poperly with other boot output
lines, e.g.:
FLASH: 128 MB
L2: 512 KB enabled
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
PPC: add accessor macros to clear and set bits in one shot
This patch adds macros from linux/include/asm-powerpc/io.h to clear and
set bits in one shot using the in_be32, out_be32, etc. accessor functions.
They are very handy to manipulate bits it I/O registers.
This patch is required for my forthcoming FSL NAND UPM driver re-write and
the support for the TQM8548 module.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Move all TQM board directories to the vendor specific directory "tqc"
for modules from TQ-Components GmbH (http://www.tqc.de).
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
83xx/85xx/86xx: add more MxMR local bus definitions
This patch adds more macro definitions for the UPM Machine Mode Registers
They are copied from "include/mpc82xx.h" to simplify the merge of all 8xxx
common local bus definitions into include/asm-ppc/fsl_lbc.h. They are
required for my forthcoming FSL NAND UPM driver re-write and the support
for the TQM8548 module.
This patch is based on the following two patches from Anton Vorontsov:
http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06511.htmlhttp://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg06587.html
I leave coding style violation fixes, code beautification and name
corrections to somebody else ;-(.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Merge mpc85xx.h's LBC defines to fsl_lbc.h. Also, adopt ACS names
from mpc85xx.h, so ACS_0b10 renamed to ACS_DIV4, ACS_0b11 to ACS_DIV2.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
use it on MPC85xx and MPC86xx processors.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
The current cpu identification code is used just to return the name
of the processor at boot. There are some other locations that the name
is useful (device tree setup). Expose the functionality to other bits
of code.
Also, drop the 'E' suffix and add it on by looking at the SVR version
when we print this out. This is mainly to allow the most flexible use
of the name. The device tree code tends to not care about the 'E' suffix.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add MPC8343 based board mvBlueLYNX-M7.
It's a single board stereo camera system.
Please read doc/README.mvblm7 for details.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Add MPC8343 based board mvBlueLYNX-M7.
It's a single board stereo camera system.
Please read doc/README.mvblm7 for details.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
move the BRx_* and ORx_* left behind in mpc85xx.h
The same is needed for mpc8xx.h and mpc8260.h (defines are almost
the same, just few differences which needs some attention though).
But the bad news for mpc8xx and mpc8260 is that there are a lot of users
of these defines. So this cleanup I'll leave for the "better times".
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
It was checking just for "b", which is not unique with respect to the
"boot" command. Change to check for "boa"[rdsetup].
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This patch makes a couple of small cleanups to parameter checking of
libfdt functions.
- In several functions which take a node offset, we use an
idiom involving fdt_next_tag() first to check that we have indeed been
given a node offset. This patch adds a helper function
_fdt_check_node_offset() to encapsulate this usage of fdt_next_tag().
- In fdt_rw.c in several places we have the expanded version
of the RW_CHECK_HEADER() macro for no particular reason. This patch
replaces those instances with an invocation of the macro; that's what
it's for.
- In fdt_sw.c we rename the check_header_sw() function to
sw_check_header() to match the analgous function in fdt_rw.c, and we
provide an SW_CHECK_HEADER() wrapper macro as RW_CHECK_HEADER()
functions in fdt_rw.c
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Use CONFIG_OF_LIBFDT instead to support flattened device trees. It is
cleaner, has better functionality, and is better supported.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.
WARNING: It appears that this board lost its ability to boot via a
flattened device tree prior to this changeset.
WARNING: This conversion was untested because I do not have a board to
test it on.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.
WARNING: This conversion is untested because I do not have a board to
test it on.
NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible. Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
SH7763RDP has SCIF, NOR Flash, Ethernet, USB host, LCDC and MMC.
In this patch, support SCIF, NOR Flash, and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
SH7763 has 3 SCIF channels. SCIF0 and 1 are same register constitution,
but only SCIF2 is different. This patch work all SCIF channel.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CONFIG_SOC_AU1X00
Common Alchemy Au1x00 stuff. All Alchemy processor based machines
need to have this config as a system type specifier.
CONFIG_SOC_AU1000, CONFIG_SOC_AU1100, CONFIG_SOC_AU1200,
CONFIG_SOC_AU1500, CONFIG_SOC_AU1550
Machine type specifiers. Each port should have one of aboves.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Modified to check for bad blocks and to skipping over them when
CFG_ENV_RANGE has been defined.
CFG_ENV_RANGE must be larger than CFG_ENV_SIZE and aligned to the NAND
flash block size.
Signed-off-by: Stuart Wood <stuart.wood@labxtechnologies.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible. Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd to prevent us from trying to access
non-mapped memory.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
We use upper case letters for the AMCC processor defines (like
CONFIG_440SPE) in U-Boot. So the 440SPe is labeled CONFIG_440SPE and
not CONFIG_440SPe. This patch fixes the last misspelled config options.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:
include/configs/amcc-common.h
This header now includes all common configuration options/defines which
are removed from the board specific headers.
The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:
include/configs/amcc-common.h
This header now includes all common configuration options/defines which
are removed from the board specific headers.
The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch series unifies the AMCC eval board ports by introducing
a common include header for all AMCC eval boards:
include/configs/amcc-common.h
This header now includes all common configuration options/defines which
are removed from the board specific headers.
The reason for this is ease of maintenance and unified look and feel
of all AMCC boards.
Signed-off-by: Stefan Roese <sr@denx.de>
According to the Application Notes of the DM9000, only the 2 bits 0:1 of
the status byte need to be checked to identify a valid packet in the fifo
But, The several different Application Notes do not all speak the same
language on these bits. They do not disagree, but only 1 Application Note
noted explicitly that only these 2 bits need to be checked.
Even the datasheets do not mention anything about these 2 bits.
Because the old code, and the kernel check the whole byte, I left this piece
untouched.
However, I tested all board/DM9000[A|E|EP] devices with this 2 bit check, so
it should work.
Notice, that the 2nd iteration through this receive loop (when a 2nd packet is
in the fifo) is much shorter now, compared to the older U-boot driver code,
so that we can maybe run into a hardware condition now that was never seen
before, or maybe was seen very unfrequently.
Additionaly added a cleanup of a stack variable.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
MIPS port has two problems in timer routines. One is now we assume CFG_HZ
equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000
in the U-Boot system.
The other is we don't have a proper time management counter like timestamp
other ARCHs have. We need the 32-bit millisecond clock counter.
This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a
32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number
of calculated CP0 counter cycles in a CFG_HZ.
STRATEGY:
* Fix improper CFG_HZ value to have 1000
* Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead.
* timer_init: initialize timestamp and set up the first timer expiration.
Note that we don't need to initialize CP0 count/compare registers here
as they have been already zeroed out on the system reset. Leave them as
they are.
* get_timer: calculate how many timestamps have been passed, then return
base-relative timestamp. Make sure we can easily count missed timestamps
regardless of CP0 count/compare value.
* get_ticks: return the current timestamp, that is get_timer(0).
Most parts are from good old Linux v2.6.16 kernel.
v2:
- Remove FIXME comments as they turned out to be trivial.
- Use CP0 compare register as a global variable for expirelo.
- Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY
instead.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
What we have to do is just to wait for given micro-seconds. No need to
take into account current time, get_timer and CFG_HZ.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
We already have many pre-defined CP0 access macros in <asm/mipsregs.h>.
This patch replaces mips_{compare,count}_set and mips_count_get with
existing macros.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
U-boot can complain a lot about 'checksum bad' when it is attached to the network.
It is annoying for ordinary users who start to doubt the network connection
in general when they see messages like this.
This is caused by the routine NetCksumOk() which cannot handle IP-headers longer
than 20 bytes. Those packages can be ignored anyway by U-boot, so we trash them
now before checking the checksum.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
A last minute cleanup before submitting the DM9000A patch series yesterday introduced
a bug in reading the rx-status registers in 32bit mode only.
This patch repairs this.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Some lines of the U-boot DM9000x driver are longer than 80 characters, or
need some other minor cleanup.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The DM9000A network controller does not work with the U-boot DM9000x driver.
Analysis showed that many incoming packets are lost.
The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to
check for a valid rx packet be done on the interrupt status register, not
directly by performing the dummy read and the rx status check as is currently
the case in the u-boot driver.
When the recommended poll is done as suggested the driver starts working
correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there
can be more than 1 package in the fifo at the same time.
The driver must perform the rx-status check in a loop and read and handle all
packages until there is no more left _after_ the interrupt RX flag is set.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the
reset procedure must be done twice to properly reset the DM9000 by means of software.
This errata is not needed anymore for the DM9000A, but it does not bother it.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The eth_send routine of the U-boot DM9000x driver does not match the
DM9000 or DM9000A application notes/programming guides.
This change improves the stability of the DM9000A network controller.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
It seems that the debugging code of the DM9000x driver in U-boot has not been
compiled for a long time, because it cannot compile...
Also rearranged some loglines to get more useful info while debugging.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The U-boot DM9000x driver contains a compile time bus-width definition for
the databus connected to the network controller.
This compile check makes the code unclear, inflexible and is unneccessary.
It can be asked to the network controller what its bus-width is by reading bits
6 and 7 of the interrupt status register.
The linux kernel already uses a runtime mechanism to determine this bus-width,
so the implementation below looks somewhat like that implementation.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch fixes a problem spotted by Eugene O'Brian (thanks Eugene)
introduced by the commit:
ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
With this patch SDRAM will get initialized again and booting from NAND
is working again.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Use correct field in block_dev_desc_t when writing interface type in
dev_print. Error introduced in 574b3195.
Also added fix from Martin Krause
Signed-off-by: Tor Krill <tor@excito.com>
Removed unneeded command line history initialization. Also, the original
code would access the 'initted' variable before relocation to SDRAM
which resulted in erratic behavior since the bss is not initialized when
executing from flash.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Added new command set ID. Buffered write command processing is changed
in order to support M18 flash chips family.
Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Some NOR flash chips needs support of commands with length grether than max
value size of uchar. For example all M18 family chips use 0x1ff command in
buffered write mode as value of program loops count.
Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
On AD7414 the first value upon bootup is not read correctly.
This is most likely because of the 800ms update time of the
temp register in normal update mode. To get current values
each time we issue the "dtt" command including upon powerup
we switch into one-short mode.
This patch fixes the problem on AD7414 equipped boards (Sequoia,
Canyonlands etc), that temp value printed in the bootup log was
incorrect.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some dead code from CPCI405 board's
config files. JFFS2 support is also removed. It's not used and
CPCI4052 does not build anymore without some size reduction.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
UNDEF_SYM is a shell variable in the main Makefile used to force the
linker to add all u-boot commands to the final image. It has no use here.
Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
This is pretty incomplete...it doesn't handle reading the environment
before relocation, it doesn't support redundant environment, and it
doesn't support embedded environment. But apart from that, it does
seem to work.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This adds a new command, "sf" which can be used to manipulate SPI
flash. Currently, initialization, reading, writing and erasing is
supported.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This adds a new SPI flash subsystem.
Currently, only AT45 DataFlash in non-power-of-two mode is supported,
but some preliminary support for other flash types is in place as
well.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This adds a driver for the SPI controller found on most AT91 and AVR32
chips, implementing the new SPI API.
Changed in v4:
- Update to new API
- Handle zero-length transfers appropriately. The user may send a
zero-length SPI transfer with SPI_XFER_END set in order to
deactivate the chip select after a series of transfers with chip
select active. This is useful e.g. when polling the status
register of DataFlash.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
AVR32 and AT91SAM9 both have their own identical definitions of
container_of() taken from the Linux kernel. Move it to common.h so
that all architectures can use it.
container_of() is already used by some drivers, and will be used
extensively by the new and improved SPI API.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Spotted by Dean Capindale.
Systems that support open-drain GPIO properly are allowed provide an
empty I2C_TRISTATE define. However, this means that we need to be
careful not to drive SDA low when the slave is expected to respond.
This patch adds a missing I2C_SDA(1) to read_byte() required to
tristate the SDA line on systems that support open-drain GPIO.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.
This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:
csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG
I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch makes the common 4xx ECC code really usable on 440GP style
platforms.
Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
we need to make some processor dependant defines used later on by the
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the kilauea and kilauea_nand (for NAND booting)
board port to not use a board specific DDR2 init routine anymore. Now
the common code from cpu/ppc4xx is used.
Thanks to Grant Erickson for all his basic work on this 405EX early
bootup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all
ppc4xx related SDRAM/DDR/DDR2 controller defines.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes all SDRAM related defines from the PPC4xx headers
ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
the same SDRAM controller as 440 systems do (like 405EX and 440SP).
It also introduces new defines for the equipped SDRAM controller based on
which PPC variant is used. There new defines are:
used on 405GR/CR/EP and some Xilinx Virtex boards.
used on 440GP/GX/EP/GR.
used on 440EPx/GRx.
used on 405EX/r/440SP/SPe/460EX/GT.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch consolidates the 405 and 440 parts of the NAND booting code
selected via CONFIG_NAND_SPL. Now common code is used to initialize the
SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
Only *after* running from this location, nand_boot() is called.
Please note that the initsdram() call is now moved from nand_boot.c
to start.S. I experienced problems with some boards like Kilauea
(405EX), which don't have internal SRAM (OCM) and relocation needs to
be done to SDRAM before the NAND controller can get accessed. When
initdram() is called later on in nand_boot(), this can lead to problems
with variables in the bss sections like nand_ecc_pos[].
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
This patch (Part 2 of 2):
* Rolls up a suite of changes to enable correct primordial stack and
global data handling when the data cache is used for such a purpose
for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
* Related to the first, unifies DDR2 SDRAM and ECC initialization by
eliminating redundant ECC initialization implementations and moving
redundant SDRAM initialization out of board code into shared 4xx
code.
* Enables MCSR visibility on the 405EX(r).
* Enables the use of the data cache for initial RAM on
both AMCC's Kilauea and Makalu and removes a redundant
CFG_POST_MEMORY flag from each board's CONFIG_POST value.
- Removed, per Stefan Roese's request, defunct memory.c file for
Makalu and rolled sdram_init from it into makalu.c.
With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch (Part 1 of 2):
* Rolls up a suite of changes to enable correct primordial stack and
global data handling when the data cache is used for such a purpose
for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
* Related to the first, unifies DDR2 SDRAM and ECC initialization by
eliminating redundant ECC initialization implementations and moving
redundant SDRAM initialization out of board code into shared 4xx
code.
* Enables MCSR visibility on the 405EX(r).
* Enables the use of the data cache for initial RAM on
both AMCC's Kilauea and Makalu and removes a redundant
CFG_POST_MEMORY flag from each board's CONFIG_POST value.
- Removed, per Stefan Roese's request, defunct memory.c file for
Makalu and rolled sdram_init from it into makalu.c.
With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
* The cfi_flash.c memset fix actual allows the board to boot so there is
a bit more going on here than just resolving warnings associated with
uninitialized variables.
* include/asm/bitops.h:302: warning: '__swab32p' is static but used in
inline function 'ext2_find_next_zero_bit' which is not static
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible. Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
If common.h isn't first we can get CONFIG_ options defined in the
board config file ignored. This can cause an issue if any of those
config options impact the size of types of data structures
(eg CONFIG_PHYS_64BIT).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add logbuffer to reserved LMB areas to prevent initrd allocation
from overlaping with it.
Make sure to use correct logbuffer base address.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This function prints the values of all the BAT register
pairs - I needed this for debug earlier this week; adding it to
lib_ppc so others can use it (and add it to reginfo commands
if so desired).
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Currently, this code only deals with BATs 0-3, which makes
it useless on systems that support BATs 4-7. Add the
support for these registers.
Signed-off-by: Becky Bruce <Becky.bruce@freescale.com>
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now. Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
All other u-boot architectures have an include/asm/errno.h, so
this change adds it to the mips include/asm-mips headers also.
Stolen from Linux 2.6.25.
Signed-off-by: Jason McMullan <mcmullan@netapp.com>
The mips architecture currently does not call 'spi_init()' in the generic
board initialization routine is CONFIG_CMD_SPI is defined.
This patch rectifies that problem.
Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds the standard 'nand_init()' call to the mips generic
'board_init_r()' call, bringing MIPS in line with the other architectures.
Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
The nand_info array is declared as extern in several .c files.
Those days, nand.h contains a reference to the array, so there is
no need to declare it elsewhere.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This allows the header to be included regardless of whether a board's
config file provides NAND-related defininitions.
Signed-off-by: Scott Wood <scottwood@freescale.com>
If the specified delay is very short, the cycle counter may go past the
"end" time we are waiting for before we get around to reading it.
Fix it by checking the different between the cycle count "now" and the
cycle count at the beginning. This will work as long as the delay
measured in number of cycles is below 2^31.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Remove #ifdef CONFIG_MMC from the source file and use conditional
compilation in the Makefile instead.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Make sure we check for CRC errors when sending commands that use CRC
checking.
Reported-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This cleans up the SDRAM initialization and related code a bit, and
allows faster booting.
* Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
* Remove memory test from sdram_init() and make caller responsible
for verifying the SDRAM and determining its size.
* Remove base_address member from struct sdram_config (was sdram_info)
* Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
* Add support for a common STK1000 hack: 16MB SDRAM instead of 8.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Don't do a stack dump if the stack pointer is outside the memory area
reserved for stack.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Since the reset vector is always aligned to a very large boundary, we
can save a couple of KB worth of alignment padding by placing the
exception vectors at the same address.
Deciding which one it is is easy: If we're handling an exception, the
CPU is in Exception mode. If we're starting up after reset, the CPU is
in Supervisor mode. So this adds a very minimal overhead to the reset
path (only executed once) and the exception handling path (normally
never executed at all.)
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
All C code is compiled with -ffunction-sections -fdata-sections.
Assembly functions should get their own sections as well so that
everything looks consistent.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
pm_init() was always more about clock initialization than anything
else. Dealing with PLLs, clock gating and such is also inherently
SoC-specific, so move it into a SoC-specific directory.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Rework the HMATRIX configuration interface so that it becomes easier
to configure the HMATRIX for boards with special needs, and add new
parts.
The HMATRIX header file has been split into a general,
chip-independent part with register definitions, etc. and a
chip-specific part with SFR bitfield definitions and master/slave
identifiers.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on
board. It's currently in production and will be available soon.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The .flashprog section was only needed back when we were running
directly from flash, and it's even more useless on NGW100 since it
uses the CFI flash driver which never used this workaround in the
first place.
Remove it on STK1000 as well, and get rid of all the associated code and
annotations.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
get_macb_pclk_rate() and get_macb_hclk_rate() should be available when
the chip has a MACB controller, not when it has a USART.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch forces the watchdog off in all cases. That will at least
get rid of the constant reboot cycle, though it won't let the watchdog
actually run in the new kernels: its probe() comes up with a polite
warning.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Make STK1002 and NGW100 boards act more alike:
- STK boards can use as many arguments as NGW
- STK boards don't need to manage FPGAs either
- NGW commands should match STK ones
Also spell U-Boot right in prompts for STK1002 and NGW100.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
[haavard.skinnemoen@atmel.com: update STK100[34] as well]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
In case of several PCI USB controllers on a board this variable
specifys which controller to use.
See doc/README.generic_usb_ohci for details.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Add new configuration variable CONFIG_PCI_OHCI_DEVNO.
In case of several PCI USB controllers on a board this variable
specifys which controller to use.
Also add USB support for sokrates board.
See doc/README.generic_usb_ohci for details.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Add DIU and cfb console support to FSL 5121ADS board.
Use #define CONFIG_VIDEO in config file to enable fb console.
Signed-off-by: York Sun <yorksun@freescale.com>
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This way we become able to utilize the full post_log_word for POST
activities (overwise, POST ECC, which has 0x8000 ID, could be
erroneously treated as started in post_output_backlog() even if there
was actually no POST ECC run (because of OCM POST failure, for
example).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Don't run futher tests in case of a test fails that is marked as
POST_STOP.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Switch the OCM testid with the codec one. The reason is that current
implementation requires the POST_ROM testid to fit into lower 16
bits, and the codec test will never run with POST_ROM hopefully.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Added OCM test to POST layer. This version runs before all other tests
but doesn't yet interrupt post sequence on failure.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Change LCRR clock ratio from 2 to 4 to commodate VSC7385.
Correct TSEC1 vs TSEC2 assignment.
Define ETHADDR and ETH1ADDR always.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
When SATA is selected (via jumper J6) we need to disable the first PCIe
node in the device tree, so that Linux doesn't initialize it. Otherwise
the Linux SATA driver will fail to detect the devices.
The same goes the other way around too. So if PCIe is selected we need
to disable the SATA node in the device tree.
This is because PCIe port 0 and SATA on 460EX share the same pins
(multiplexed) and we have to configure in U-Boot which peripheral is
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Several board/<...>/config.mk files include dynamically built (by
the Makefile) config files but used the wrong file name of
$(TOPDIR)/board/$(BOARDDIR)/config.tmp
instead if the correct
$(OBJTREE)/board/$(BOARDDIR)/config.tmp
The bug is nasty because the build result is correct for the (normal)
in-tree builds, and because 'sinclude' is used no errors get raised
even for out-of-tree build tests. But out-of-tree builds use an
incomplete and thus usually incorrect configuration...
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch fixes the canyonlands config.mk file to enable correct
out-of-tree builds. Thanks to Wolfgang Denk for spotting this.
Signed-off-by: Stefan Roese <sr@denx.de>
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.
Signed-off-by: Stefan Roese <sr@denx.de>
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.
Signed-off-by: Stefan Roese <sr@denx.de>
The nand_info array is declared as extern in several .c files.
Those days, nand.h contains a reference to the array, so there is
no need to declare it elsewhere.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Calculation of tail was incorrect when size % 4 == 0.
New code removes the conditional and does the same thing but with arithmetic
Signed-off-by: Nick Spence <nick.spence@freescale.com>
CONFIG_ENV_OVERWRITE is commented out in the config header files,
so let's cleanup the files by removing the whole definition.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).
The revC silicon needs a special initialisation sequence to
switch from the internal (imprecise) RC oscillator to the
external 32k clock.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds a custom vendor logo for the Atmel AT91 boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9RLEK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9263EK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91SAM9261EK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch makes the necessary adaptations (PIO configurations and
defines in config header file) to hook up the Atmel LCD driver to the
AT91CAP9ADK board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the ATMEL LCDC driver which is used on some
AT91 and AVR platforms.
Is has been tested with the AT91CAP9ADK, AT91SAM9261EK, AT91SAM9263EK and
AT91SAM9RLEK boards. Adaptation for AVR32 should probably be easy.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the AT91SAM9RL chip and the AT91SAM9RLEK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the AT91SAM9263 chip and the AT91SAM9263EK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds support for the AT91SAM9261 chip and the AT91SAM9261EK
board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
in order to cope with the changes in DataFlash partitionning scheme
(cset c3a60cb3).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
DataFlash or from NAND), and gives to Linux a fully specified mtdparts
variable.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch changes the SPI timings to closely match the ones
used by the Linux kernel and the Atmel's own bootstrap project.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch fixes the dataflash offsets used in CONFIG_BOOTCOMMAND
in order to cope with the changes in DataFlash partitionning scheme
(cset c3a60cb3).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adapts CONFIG_BOOTARGS to the chosen boot method (boot from
DataFlash or from NAND), and gives to Linux a fully specified mtdparts
variable.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch changes the SPI timings to closely match the ones
used by the Linux kernel and the Atmel's own bootstrap project.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Atmel boards can handle 8 or 16 bit NAND memories. This patch
makes the support configurable in the board config header file
(CFG_NAND_DBW_8 or CFG_NAND_DBW_16).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
All the AT91CAP9/AT91SAM9 boards have the same linker script. The patch
below avoids the duplication of u-boot.lds by putting the file in the
cpu directory instead of the board one.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The Makefiles for the AT91CAP9/AT91SAM9 boards have an incomplete
copyright notice. This patch adds the missing pieces.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
When Ulf did the dataflash.c cleanup, he didn't add his copyright on
the new created files. This patch fixes the problem.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
When doing the AT91CAP9/AT91SAM9 port, a number of header files were
copied from the Linux kernel sources. This patch explicitly specifies
this origin for all the copied headers, and for those missing copyright
information, adds it.
Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
in the latest kernel sources by 'at91sam9_smc.h'.
The copyright information has been confirmed by the AT91 Linux kernel
maintainer, Andrew Victor <avictor.za@gmail.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
When using dhcp/bootp the "netmask" environment variable is not set
because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is
desireable, so the following patch adds this this option to the board
config.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch reworks the default environment on Makalu. Now "net_nfs" for
example uses the device-tree style booting formerly know as "net_nfs_fdt".
Also the addresses in RAM were changed because of the new image booting
support, which check for image overwriting. So the addresses needed to
get adjusted.
Signed-off-by: Stefan Roese <sr@denx.de>
map_physmem currently generates a warning when CONFIG_PHYS_64BIT is
enabled. This quiets the warning.
Signed-off-by: Becky Bruce <Becky.Bruce@freescale.com>
Physical addrs need to be represented by phys_addr_t, not
unsigned long. Otherwise, systems that use CONFIG_PHYS_64BIT
are going to fail mightily.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This patch enables legacy multi-type images containing only a Linux kernel
and root file system to be loaded, maintaining compatibility with previous
versions of u-boot.
This is required when using old image files such as a Linux 2.4 kernel /
filesystem.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.
The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).
Signed-off-by: Stelian Pop <stelian@popies.net>
When doing the AT91CAP9/AT91SAM9 port, a number of header files were
copied from the Linux kernel sources. This patch explicitly specifies
this origin for all the copied headers, and for those missing copyright
information, adds it.
Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
in the latest kernel sources by 'at91sam9_smc.h'.
The copyright information has been confirmed by the AT91 Linux kernel
maintainer, Andrew Victor <avictor.za@gmail.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
When Ulf did the dataflash.c cleanup, he didn't add his copyright on
the new created files. This patch fixes the problem.
Signed-off-by: Stelian Pop <stelian@popies.net>
According to schematics and to RedBoot sources, the MX31ADS uses a 32768Hz
oscillator as a SKIL source. Fix previously wrongly assumed 32000Hz value.
Also fix a typo when verifying a jumper configuration. While at it, make
two needlessly global functions static.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Add logbuffer to reserved LMB areas to prevent initrd allocation
from overlaping with it.
Make sure to use correct logbuffer base address.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Recent modifcations to LOGBUFFER handling code were incorrecly
introduced to fit_check_kernel() routine during
"Merge branch 'new-image' of git://www.denx.de/git/u-boot-testing",
commit 27f33e9f45.
This patch cleans up this merge issue.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Changed implementation such that fw_printenv returns failure status
when one or more specified variables do not exist or when incorrect
command syntax is used.
This aids scripting fw_printenv such that the script can key of the
return status rather than relying on standard error "scraping".
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
In the current top-of-tree, 1.3.3.-rc2, the optional tool
'tools/env/fw_printenv' fails to compile for two reasons:
1) The header watchdog.h cannot be found.
2) The header zlib.h is picked up from the tool chain rather than the
project causing a prototype conflict for crc32.
This patch addresses both of these issues.
Platforms Tested On:
- AMCC "Kilauea"
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
When CONFIG_CMDLINE_EDITING is enabled, readline_into_buffer() doesn't
work before relocating to RAM because command history is written into
a global array that is not writable before relocation. This patch
defers to the no-editing and no-history code in readline_into_buffer()
if it is called before relocation.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch fixes three typos.
The first is a repetition of CONFIG_CMD_BSP.
The second makes the #endif comment match its #if.
The third is a spelling error.
Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
Add support for the recognition of 'powerpc' as an alias for the PowerPC
architecture type since Linux is already trending in that direction,
preferring 'powerpc' to 'ppc'.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
The 7610 and related parts have an L2IP bit in the L2CR that is
monitored to signal when the L2 cache invalidate is complete whereas the
7450 and related parts utilize L2I for this purpose. However, the
current code does not account for this difference. Additionally the 86xx
L2 cache invalidate code used an "andi" instruction where an "andis"
instruction should have been used.
This patch addresses both of these bugs.
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
Acked-By: Jon Loeliger <jdl@freescale.com>
Fix a bogus circular dependency that caused an infinite loop of
"Generating include/autoconf.mk" again and again.
Signed-off-by: Wolfgang Denk <wd@denx.de>
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.
The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch adds fdt (flattened device tree) support to all remaining AMCC
eval boards. Most newer boards already support device tree. With this patch,
all AMCC boards now enable device tree passing from U-Boot to Linux
arch/powerpc kernels.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a default ft_board_setup() routine to the 4xx fdt code.
This routine is defined as weak and can be overwritten by a board specific
one if needed.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds fdt (flattened device tree) support to the AMCC
Acadia eval board. This increases the image size and it doesn't
fit anymore into 256kByte. Since we didn't want to remove features
from the configuration, we decided to increase the U-Boot image size
(add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for booting with a device tree blob. This is needed to boot
ARCH=powerpc kernels. Also add support for setting the eth0 mac address
via the ethaddr variable.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Stefan Roese <sr@denx.de>
Some old GNU assemblers, such as v2.14 (ELDK 3.1.1), v2.16 (ELDK 4.1.0),
warns illegal global symbol references by bal (and jal also) instruction.
This does not happen with the latest binutils v2.18.
Here's an example on gth2_config:
mips_4KC-gcc -D__ASSEMBLY__ -g -Os -D__KERNEL__ -DTEXT_BASE=0x90000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isy
stem /opt/eldk311/usr/bin/../lib/gcc-lib/mips-linux/3.3.3/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4k
c -EB -c -o cache.o cache.S
cache.S: Assembler messages:
cache.S:243: Warning: Pretending global symbol used as branch target is local.
cache.S:250: Warning: Pretending global symbol used as branch target is local.
In principle, gas might be sensitive to global symbol references in PIC
code because they should be processed through GOT (global offset table).
But if `bal' instruction is used, it results in PC-based offset jump.
This is the cause of this warning.
In practice, we know it doesn't matter whether PC-based reference or GOT-
based. As for this case, both will work before/after relocation. But let's
fix the code.
This patch explicitly sets up a target address, then jump there.
Here's an example of disassembled code with/without this patch.
90000668: 1485ffef bne a0,a1,90000628 <mips_cache_reset+0x20>
9000066c: ac80fffc sw zero,-4(a0)
90000670: 01402821 move a1,t2
-90000674: 0411ffba bal 90000560 <mips_init_icache>
-90000678: 01803021 move a2,t4
-9000067c: 01602821 move a1,t3
-90000680: 0411ffcc bal 900005b4 <mips_init_dcache>
-90000684: 01a03021 move a2,t5
-90000688: 03000008 jr t8
-9000068c: 00000000 nop
+90000674: 01803021 move a2,t4
+90000678: 8f8f83ec lw t7,-31764(gp)
+9000067c: 01e0f809 jalr t7
+90000680: 00000000 nop
+90000684: 01602821 move a1,t3
+90000688: 01a03021 move a2,t5
+9000068c: 8f8f81e0 lw t7,-32288(gp)
+90000690: 01e0f809 jalr t7
+90000694: 00000000 nop
+90000698: 03000008 jr t8
+9000069c: 00000000 nop
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Some systems are dumb and do not implement the -n flag to echo (like OS X).
Convert the Makefile to use printf as this should work everywhere.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
If you enable environment in the flash, but disable the embedded
option, and you disable the saveenv command, then the #if nested
logic will trigger a compile failure:
env_flash.c: In function 'env_relocate_spec':
env_flash.c:399: error: 'flash_addr' undeclared (first use in this function)
The fix is to add CMD_SAVEENV ifdef protection like everywhere else.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Fix incorrect mask to enable all 64MB of onboard flash.
Previously U-Boot incorrectly mapped only 8MB of flash, this
patch correctly maps all the available flash.
Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
The mmap() related code is full of inconsistent casts/constants when
it comes to error checking, and may break when building on some
systems (like ones that do not implicitly define the caddr_t type).
Let's just avoid the whole mess by writing the code nice and clean in
the first place.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The Vitesse VSC8601 RGMII PHY has internal delay for both Rx
and Tx clock lines. They are configured using 2 bits in extended
register 0x17.
Therefore CFG_VSC8601_SKEW_TX and CFG_VSC8601_SKEW_RX have
been introduced with valid values 0-3 giving 0.0, 1.4,1.7 and 2.0ns delay.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
--
drivers/net/tsec.c | 6 ++++++
drivers/net/tsec.h | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)
Some config.mk files reference $(CC) to test for specific tool chain
features, so make sure $(CC) gets set before including any such
config files.
This patch replaces commit b7166e05a5 ("ColdFire: Get information from
the correct GCC").
Signed-off-by: Wolfgang Denk <wd@denx.de>
start.S:183:1: warning: "ICMR" redefined
In file included from start.S:33:
include/asm/arch/pxa-regs.h:935:1: warning: this is the location of the previous definition
start.S:187:1: warning: "RCSR" redefined
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch fixes a problem with the month being read and written
incorrectly (offset by one). This only gets visible by also using
the Linux driver (rtc-m41t80).
Tested on AMCC Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
Current trick to pick up GNU assembler minor version uses a dot(.) as a
delimiter, and take the second field to obtain minor version number. But
as can be expected, this doesn't work with a version string which has
dots more than needs.
Here's an example:
$ mips-linux-gnu-as --version | grep 'GNU assembler'
GNU assembler (Sourcery G++ Lite 4.2-129) 2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | cut -d. -f2
2-129) 2
$
This patch restricts the version format to 2.XX.XX... This will work
in most cases.
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+'
2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2
18
$
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Onenand needs a version of memcpy() which performs 16 bit accesses
only; make sure the name does not conflict with the standard
function.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2.
There is no pattern that can be used to determine which chips use which
frequency, so the only way to determine is to look up the actual SOC
designation and use the right value for that SOC.
Signed-off-by: Timur Tabi <timur@freescale.com>
The ethernet hang is caused by receiving buffer in DRAM is not
yet ready due to access cycles require longer time in DRAM.
Relocate DMA buffer descriptors from DRAM to internal SRAM.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Fix warnings
nv_nand.c: In function 'saveenv':
env_nand.c:200: warning: passing argument 3 of 'nand_write' from incompatible pointer type
env_nand.c: In function 'env_relocate_spec':
env_nand.c:275: warning: passing argument 3 of 'nand_read' from incompatible pointer type
if compiled for davinci_schmoogie_config.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Ack by: Sergey Kubushyn <ksi@koi8.net>
MPC8610HPCD board adds -O2 gcc option to PLATFORM_CPPFLAGS
causing overriding default -Os option. New gcc (ver. 4.2.2)
produces warnings while compiling net/net.c file with -O2
option. The patch is an attempt to fix this.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This problem shows up with parallel builds only; it results in
somewhat cryptic error messages like
$ JOBS=-j6 MAKEALL netstar
Configuring for netstar board...
arm-linux-ld: cannot find -lgeneric
make[1]: *** [eeprom.srec] Error 1
A few boards (like netstar and voiceblue) need some libraries for
building; however, the board Makefile does not contain any such
dependencies which may cause problems with parallel builds. Adding
such dependencies is difficult as we would also have to provide build
rules, which already exist in the respective library Makefiles.
To solve this, we make sure that all libraries get built before the
board code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch changes the Canyonlands/Glacier fixed DDR2 controller setup
used for NAND booting to match the values needed for the new 512MB
DIMM modules shipped with the productions boards:
Crucial: CT6464AC667.8FB
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem with DIMMs that have 8 banks. Now the
MCIF0_MBxCF register will be setup correctly for this setup too.
This was noticed with the 512MB DIMM on Canyonlands/Glacier.
Signed-off-by: Stefan Roese <sr@denx.de>
Newer gcc's might be configured to enable autovectorization by default.
If we happen to build with one of those compilers we will get SPE
instructions in random code.
-mno-spe disables the compiler for automatically generating SPE
instructions without our knowledge.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Rename init_addr and init_ext_addr to match the docs between
85xx and 86xx. Both now use 'init_addr' and 'init_ext_addr'.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* adjust __spin_table alignment to match ePAPR v0.94 spec
* loop over all cpus when determing who is up. This fixes an issue if
the "boot cpu" isn't core0. The "boot cpu" will already be in the
cpu_up_mask so there is no harm
* Added some protection in the code to ensure proper behavior. These
changes are explicitly needed but don't hurt:
- Added eieio to ensure the "hot word" of the table is written after
all other table updates have occurred.
- Added isync to ensure we don't prefetch loading of table entries
until we a released
These issues we raised by Dave Liu.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
LWMON5 DSPIC POST uses the watch-dog scratch register. So, make
the CFG_DSPIC_TEST_ADDR definition more readable.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Some boards (e.g. lwmon5) need rather a frequent watch-dog
kicking. Since the time it takes for the flush_cache() function
to complete its job depends on the size of data being flushed, one
may encounter watch-dog resets on such boards when, for example,
download big files over ethernet.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().
Tested on Katmai with ECC DIMM.
Signed-off-by: Stefan Roese <sr@denx.de>
As it seems the "old" ECC initialization routine by using dflush() didn't
write all lines in the dcache back to memory on lwmon5. This could lead
to ECC error upon Linux booting. This patch changes the program_ecc()
routine to now use clean_dcache_range() instead of dflush().
clean_dcache_range() uses dcbst which is exactly what we want in this
case.
Since dflush() is known is cause problems, this routine will be
removed completely and replaced by clean_dcache_range() with an
additional patch.
Signed-off-by: Stefan Roese <sr@denx.de>
On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb
and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc
doesn't exist.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Move non-inlied functions into specific drivers file
Set get_prom as weak
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Currently the timeout waiting for an ARP reply is hard set to 5 seconds.
On i.MX31ADS due to a hardware "strangeness" up to four first IP packets
to the boards get lost, which typically are ARP replies. By configuring
the timeout to a lower value we significantly improve the first network
transfer time on this board. The timeout is specified in milliseconds,
later internally it is converted to deciseconds, because it has to be
converted to hardware ticks, and CFG_HZ ranges from 900 to 27000000 on
different boards.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remove a redundant register definition, clean up some coding style
violations.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The specification for the lwmon5 board dsPIC POST got changed.
Also add defines for the temperatures and voltages.
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.
Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The IDE driver can use 32-bit addresses in LBA mode, in which case it
spits multiple warnings during compilation. Fix them.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
out_8 wants a pointer to an unsigned as the first argument. Add a
maintainer for Linkstation boards.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Arithmetic expressions do not get evaluated under stringification. Remove
default network configuration, add DHCP command support. Thanks to Felix
Radensky for reporting.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Since we didn't want to remove features from the configuration, we
decided to increase the U-Boot image size (add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Since we didn't want to remove features from the configuration, we
decided to increase the U-Boot image size (add one flash sector).
Also changed the default environment definition to make it
independent of such changes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
This patch removes the unknown flash message information:
'## Unknown FLASH on Bank 1 - Size = 0xdeadbeef = -286261248 MB'
This unknown flash message is caused by PromJet.
Some of the board user is unhappy with this information.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
this seems as a good compromise between human memory, typing,
and last but not least, to accommodate for current and future kernel bloat.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
This patch adds a configurable flash auto protection list that can be used
to make U-Boot protect flash regions in flash_init().
The idea has been discussed on the u-boot mailing list starting
on Nov 18th, 2007.
Even this patch brings a new feature it is used as a bugfix for 4xx
platforms where flash_init() does not completely protect the
monitor's flash range in all situations.
U-Boot protects the flash range from CFG_MONITOR_BASE to
(CFG_MONITOR_BASE + monitor_flash_len - 1) by default. This does not
include the reset vector at 0xfffffffc.
Example:
#define CFG_FLASH_AUTOPROTECT_LIST {{0xfff80000, 0x80000}}
This config option will auto protect the last 512k of flash that
contains the bootloader on board like APC405 and PMC405.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Some files didn't get updated properly with the "Use watchdog-aware
functions when calculating hashes of images" commit, this commit
fixes this.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The PCIe root-complex/endpoint setup as configured via the "pcie_mode"
environment variable will now get passed to the Linux kernel by setting
the device_type property of the PCIe device tree node. For normal root-
complex configuration it will keep its defaults value of "pci" and for
endpoint configuration it will get changed to "pci-endpoint".
Signed-off-by: Stefan Roese <sr@denx.de>
Use the GPT0_MASKx registers as the temporary storage for watch-dog
timer POST test instead of GPT0_COMPx. The latter
(GPT0_COMP1..GPT0_COMP5) are used for the log-buffer header.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
This reverts commit 70431e8a73 which has
proven problematic getting right from the start at least on 83xx and
4xx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
CONFIG_ENV_OVERWRITE is also added.
This patch is originally created by Jean-Christophe PLAGNIOL-VILLARD.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Implement watchodg-aware variants of hash calculation functions:
- crc32_wd()
- md5_wd()
- sha1_csum_wd()
The above functions calculate the hash of the input buffer in chunks,
triggering the watchdog after processing each chunk. The chunk size
is given as a function call parameter.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
No functional change.
This patch was originally submitted by Jean-Christophe PLAGNIOL-VILLARD.
Then I re-created from scratch, and changed more lines than the original.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
in commit fad634071 "make show_boot_progress () weak."
show_boot_progress is supposed to be declared as weak but declared as
inline instead.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
As suggested by Wolfgang Denk:
- image printing functions:
- remove wrappers
- remove indentation prefix from functions' signatures
- merge getenv_verify and getenv_autostart into one parametrized function
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Update MX31ADS default environment to better match the flash layout and
the memory map, support SPI and RTC.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
The envcrc.c does sizeof(unsigned long) when calculating the crc, but
this is done with the build toolchain instead of the target tool
chain, so if the build is a 64bit system but the target is 32bits,
the size will obviously be wrong. This converts all unsigned long
stuff related to crc32 to uint32_t types. Compile tested only: output
of ./tools/envcrc when run on a 32bit build system matches that of a
64bit build system.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code.
Changes:
- Remove *_masked() functions as noted by Wolfgang
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing!
Patch is compile tested with davinci_dvevm & sonata & schmoogie configuration and tested by Pieter on DaVinci EVM hardware.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
Limit the rate of h/w watch-dog triggering on the LWMON5 board by
the CONFIG_WD_MAX_RATE value.
Note that an earlier version of this patch which used microseconds
instead of ticks dis not work. The problem was that we used
usec2ticks() to convert microseconds into ticks. usec2ticks() uses
get_tbclk(), which in turn calls get_sys_info(). It turns out that
this function does a lot of prolonged operations (like divisions)
which take too much time so we do not trigger the watchdog in time,
and it resets the system.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Introduce the new logical option CONFIG_HAS_POST which is set when the
platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles
to determine should the POST libs be compiled for the selected target
platform, or not.
To avoid breaking u-boot linking process, the empty post/libpost.a file is
created for platforms which do not have POSTs.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch fixes the Canyonlands and Glacier default environment to better
fit to the arch/powerpc device-tree kernels. The variables dealing with
arch/ppc booting are removed, since these boards are supported only in
arch/powerpc. Glacier uses the same config file as Canyonlands.
Also, the Glacier now uses non-FPU rootpath, since 460GT has no FPU.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the temporary 'test' strapping option
of the sbe command. The '667' strapping option now uses
a PLB/PCI divider of 3.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
- Coding style cleanup (long lines)
- Add s1d13505 support
- Make some functions return a result code instead of void
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
dcache_enable() was missing for 440 and the patch
017e9b7925 ["allow ports to override bootelf
"] behavior uses this function.
Note: Currently the cache handling functions like
d/icache_disable/enable() are NOP's on 440. This may be changed in the
future.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch correctly sets the oobavail variable
and fixes a bug where the oob data was not valid when
there where multiple groups in oobfree.
First segment fixes a typo
Second segment fixes a bug where oob data may be copied incorrectly.
Third segment adds an error message when exiting due to write protect.
Forth segment fixes a bug where oobavail may be set incorrectly.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This patch assigns the correct EBC clock for 405GP(r) CPUs
to PPC4xx_SYS_INFO structure. Without this patch U-Boot
uses an uninitialized EBC clock in its startup message.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Some 85xx chips use CCB as the base clock for the I2C. Some use CCB/2, and
some use CCB/3. There is no pattern that can be used to determine which
chips use which frequency, so the only way to determine is to look up the
actual SOC designation and use the right value for that SOC.
Update immap_85xx.h to include the GUTS PORDEVSR2 register.
Signed-off-by: Timur Tabi <timur@freescale.com>
This patch allows U-Boot to use buffered writes to the Spansion NOR
flash installed on this board, and eliminates long delays in network
transfers after the board startup.
Also modify flash layout to embed main and redundant environment
blocks in the U-Boot image.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by
Freescale.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for booting from 2k page sized NAND device
(e.g. Micron 29F2G08AAC).
Tested on AMCC Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
Currently U-Boot crashes in ppc_4xx_eth_init on sequoia
with cache enabled (TLB Parity exeption). This patch
fixes the problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Currently U-Boot crashes on sequoia board in CPU POST if
cache is enabled (CONFIG_4xx_DCACHE defined). The cache
won't be disabled by change_tlb before CPU POST because
there is an insufficient adress range check since
CFG_MEM_TOP_HIDE was introduced. This patch tries to fix
this problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Current assembler codes are inconsistent in the way of register jump
instruction usage; some use jr, some use j. Of course GNU as allows both
usages, but as can be expected from `Jump Register' the mnemonic `jr' is
more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
at all.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
MC13783 is a multifunction IS with an SPI interface to the host. This
driver handles the RTC controller in this chip.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
only implemented and tested on i.MX31, can with a modified register layout
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
controllers too.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Split the arch-specific logic out of the common go code and into a dedicated
weak function called do_go_exec() that lives in cpu directories. This will
need review from i386/nios people to make sure I didn't break them.
Change the bootelf setup function into a dedicated weak function called
do_bootelf_exec. This way ports can control the behavior however they
like before/after calling the ELF entry point.
Rearrange ARM boards in Makefile so that ARM926EJ-S boards
are no longer under ARM92xT header.
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Ack-By Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch removes the board dependent parts from
"drivers/mtd/dataflash.c".
Each board relying on this, will have the appropriate
code in a new file, "partition.c" in the board directory.
board Makefiles updated to use the file.
The dataflash partitions are aligned on sector/page boundaries.
The CONFIG_NEW_DF_PARTITION was used to create named partitions
This is now the default operation, and the CONFIG variable is removed.
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Before new uImage code was merged, bootm code allowed for the kernel image to
get overwritten during decompresion. new uImage introduced a check for image
overwrites and refused to boot the image that got overwritten. This patch
restores the old behavior. It also adds a warning when the image overwriten is
a multi-image file, because in such case accessing componentes other than the
first one will fail.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
The cross compiler is responsible for providing the correct libraries
and the logic to find the linking libraries.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Cache operations have to take line address (addr), not start_addr.
I noticed this bug when debugging ping failure.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Before the first call of ide_reset(), the level of the IDE reset
signal on the TQM5200 is low (reset asserted). This patch sets the
default value to high (reset not asserted).
Currently this patch fixes no real problem, but it is cleaner to
assert the reset signal only on demand, and not permanently.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
According to the ata (ata5) specification the RESET- signal
shall be asserted for at least 25 us. Without this patch,
the RESET- signal is asserted on some boards for only < 1 us
(e. g. on the TQM5200). This patch adds a general delay of
25 us to the RESET- signal.
Without this patch a Platinum 4 GiB CF card is not recognised
properly on boards with a TQM5200 (STK52xx, TB5200).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
In function 'logbuff_init_ptrs':
cmd_log.c:79: warning: pointer targets in assignment differ in signedness
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.
Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
Current libata.h of u-boot is out of sync from linux kernel,
this patch make it be consistent with linux kernel.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Tor Krill <tor@excito.com>
The linux kernel is now mostly ARCH=powerpc, so to make life easier
allow use to use ARCH=powerpc and convert it to ARCH=ppc.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
It should access with 16-bit instead of 8-bit
Now it uses the generic memcpy with 8-bit access. It means it reads wrong data from OneNAND.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This patch is based on the port by Mihai Georgian (see linkstation.c for
Copyright information) and implements support for LinkStation / KuroBox HD
and HG PPC models from Buffalo Technology, whereby HD is deactivated at
the moment, pending network driver fixing.
Notice to users: this is pretty much a barebone port. Support for network
on HG models is already in the U-Boot mainline, but you might also want
patches to switch fan / phy modes depending on the negotiated ethernet
parameters. This patch also doesn't support console switching, booting EM
mode, Buffalo specific ext2 magic number. So, if you want to use any of
those, you need additional patches. Otherwise this patche provides a fully
functional u-boot with a network console on your system.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Replace CONFIG_8xx and CONFIG_MCF532x to CONFIG_MII_INIT in
cmd_init.c. Add CONFIG_MII_INIT to board configuration files
that use mii_init() in cmd_init.c.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Remove test for CONFIG_MPC5200 in drivers/pci/pci_auto.c and define
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE in related board configuration files.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
that have larger physical addresses like 44x, 85xx, and 86xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some systems have md5.h installed in /usr/include/. This isn't the
desired file (we want the one in include/md5.h). This will avoid the
conflict. This fixes the host tools building problem by creating a new
directory for U-Boot specific header files.
[Patch by Andy Fleming, modified to use separate directory by Wolfgang
Denk]
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Adds Support for Altera's Stratix II.
Within your board specific init file you will have to call
1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off);
2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc);
Altera_desc* contines (for example):
{
Altera_StratixII, /* part type */
passive_serial, /* interface type */
1, /* bytes of data part can accept */
(void *)(&funcs), /* interface function table */
0L, /* base interface address */
0 /* implementation specific cookie */
}
funcs is the interface. It is of type altera_board_specific_func.
It looks like this:
altera_board_specific_func func = {
pre_fn,
config_fn,
status_fn,
done_fn,
clk_fn,
data_fn,
abort_fn,
post_fn,
};
you will have to implement these functions, which is usually bit
banging some gpio.
Signed-off-by: Eran Liberty <liberty@extricom.com>
This patch adds support for the Phytec Phycore-i.MX31 board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the mx31 litekit board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds the core support for Freescale mx31
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
It isn't generally save to execute applications outside of U-Boot with caches
enabled due to the way the Blackfin processor handles caches (requires
software assistance). This patch disables caches before booting an ELF or
just booting raw code. The previous discussion on the patch was that we
wanted to use weaks instead, but that proved to not be feasible when multiple
symbols are involved, which puts us back at the ifdef solution. I've
minimized the ugliness by moving the setup step outside of the main function.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When the LM73 temperature sensor measures a temperature below 0 C, the
current driver does not perform sign extension, so the result returned is
512 C too high. This patch fixes the problem, and does general cleanup
of the code.
Signed-off-by: Larry Johnson <lrj@acm.org>
Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
series require different addresses for buffered write commands. Define a
configuration option to support buffered writes on those chips. A more
elegant solution would be to automatically detect those chips by parsing
their CFI records, but that would require introduction of a fixup table
into the cfi_flash driver.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
32-bit wide ECC memory modules report 40-bit width.
Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'.
Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Currently the SATA controller clock is configured as CSB clock,
usually the CSB clock is 400/333/266MHz.
However, The SATA IP block is only guaranteed to operate up to
200 MHz as stated in the HW spec.
The bug is reported by Joe D'Abbraccio <ljd015@freescale.com>
This patch makes the SATA clock as half of CSB clock.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
We were looking at the wrong memory offset to determine of a secondary
cpu had been spun up or not. Also added a warning message if the
all the secondary cpus we expect don't spin up.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch reworks the default environment on Kilauea/Haleakala. Now
"net_nfs" for exmaple uses the device-tree style booting formerly know
as "net_nfs_fdt". Also the addresses in RAM were changed because of the
new image booting support, which check for image overwriting. So the
addresses needed togeet adjusted.
Signed-off-by: Stefan Roese <sr@denx.de>
Since the new image support checks for image overwriting, the default
environment needs to get adjusted to use correct addresses.
Signed-off-by: Stefan Roese <sr@denx.de>
The patch 70431e8a73 (Make MPC83xx one step
closer to full relocation.) doesn't use CFG_MONITOR_BASE anymore. But
on 4xx systems _start currently cannot be used for this calculation.
So revert back to the original version for now.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem with the RGMII setup of the 460GT. The 460GT
has 2 RGMII instances and we need to configure the 2nd RGMII instance
for the EMAC2+3 channels.
Signed-off-by: Stefan Roese <sr@denx.de>
fdt.c: In function 'ft_cpu_setup':
fdt.c:33: warning: implicit declaration of function 'do_fixup_by_prop_u32'
fdt.c:39: warning: implicit declaration of function 'do_fixup_by_compat_u32'
fdt.c:43: warning: implicit declaration of function 'fdt_fixup_ethernet'
fdt.c:45: warning: implicit declaration of function 'fdt_fixup_memory'
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The fdt set command was treating properties specified as <00> and <0011>
as byte streams, rather than as an array of cells. As we already have
syntax for expressing the desire for a stream of bytes ([ xx xx ...]),
we should use the <> syntax to describe arrays of cells, which are always
32-bits per element. If we imagine this likely (IMHO) scenario:
> fdt set /ethernet-phy@1 reg <1>
With the old code, this would create a bad fdt, since the reg cell would be
made to be one byte in length. But the cell must be 4 bytes, so this would
break mysteriously.
Also, the dts spec calls for constants inside the angle brackets (<>)
to conform to C constant standards as they pertain to base.
Take this scenario:
> fdt set /ethernet@f00 reg <0xe250000\ 0x1000>
The old fdt command would complain that it couldn't parse that. Or, if you
wanted to specify that a certain clock ran at 33 MHz, you'd be required to
do this:
> fdt set /mydev clock <1f78a40>
Whereas the new code will accept decimal numbers.
While I was in there, I extended the fdt command parser to handle property
strings which are split across multiple arguments:
> fdt set /ethernet@f00 interrupts < 33 2 34 2 36 2 >
> fdt p /ethernet@f00
ethernet@f00 {
interrupts = <0x21 0x2 0x22 0x2 0x24 0x2>;
};
Lastly, the fdt print code was rearranged slightly to print arrays of cells
if the length of the property is a multiple of 4 bytes, and to not print
leading zeros.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
correctly configures the SATA/PCIe PHY for SATA usage when this jumper
is installed.
Signed-off-by: Stefan Roese <sr@denx.de>
finish off what commit 43ddd9c820,
"Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T"
started.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch makes SPARC/LEON processors able to read and write
to the SMC91111 chip using the chip external I/O bus of the memory
controller. This patchs defines the standard in and out macros
expected by the SMC9111 driver.
To access that I/O bus one must set up the memory controller
(MCTRL or FTMCTRL) correctly. It is assumed that the user sets
up this correctly when the other MCTRL parameters are set up. It
can be set up from the board configuration header file.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 2 of the replacement: more header imports and edits.
Signed-off-by: Stelian Pop <stelian@popies.net>
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 1 of the replacement: pristine header files import.
Signed-off-by: Stelian Pop <stelian@popies.net>
AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a
common infrastructure can be used. Let this infrastructure be
named after the AT91SAM9 family, and move the existing AT91CAP9
files to the new place.
Signed-off-by: Stelian Pop <stelian@popies.net>
The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by
the board, so use timer_init() instead of interrupt_init().
Signed-off-by: Stelian Pop <stelian@popies.net>
DataFlash partition information has become a mess. This patch
defines a single partition scheme for Atmel DataFlashes. This partition
scheme will be used by all AT91CAP9 and AT91SAM9 boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
When the version_string function in start.S is not 4-byte align,
it will cause the compiler generates "unaligned opcodes detected
in executable segment". This issue affects all ColdFire CPUs.
By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if
it is not aligned.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms
environment variables.
Cleanup pci_target_init.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
All of the duplicated code for Blackfin processors and boot modes have been
unified. After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Many Atmel boards have no "real" (NOR) flash on board, and rely only
on DataFlash and NAND memories. This patch enables CFG_NO_FLASH to
be present in a board configuration file, while still enabling flash
commands like 'flinfo', 'protect', etc.
Signed-off-by: Stelian Pop <stelian@popies.net>
This punts the old spi flash driver for a new/generalized one until the
common one can be integrated.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2. This
makes code use the register name from chip datasheets.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2. This
makes code use the register name from chip datasheets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add some missing ARM boards to MAKEALL. These build correctly,
unlike several of the boards already listed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by Freescale.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the Phytec Phycore-i.MX31 board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds support for the mx31 litekit board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds a driver for the following smsc network controllers:
LAN9115
LAN9116
LAN9117
LAN9215
LAN9216
LAN9217
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
This patch adds the core support for Freescale mx31
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a
delay of factor 16 (e.g 2 seconds became 32). While the
overflow fix is basically okay, it missed to divide udelay by
16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x)
macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com>
and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for
the hints & testing!
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
Add 82541ER device with latest integrated IGP2 PHY.
Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
a debug link (EDCL). The GRETH core is documented in GRIP.pdf
available at www.gaisler.com.
If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
offloading etc.) can be determined by a bit in the control register.
The GBIT MAC is supported by operating in GRTEH 10/100 legacy mode.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional
delay before sending "DHCP Request" in net/bootp.c. Required to overcome
interoperability problems with Windows Server 200x DHCP server when U-Boot
client responds too fast for server to handle.
Signed-off-by: Aras Vaichas <arasv@magtech.com.au>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.
For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.
Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
and use GOT relative reference.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.
It also makes the board take MAC addresses, if found, from EEPROM.
User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr. Any unused addresses should be zero. This group of
four six-byte values should have it's CRC at the end. crc32 and
eeprom commands can be used to accomplish this.
If CRC fails, MAC addresses come from the environment. If CRC
succeeds, the environment is overwritten at startup.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Commit 55774b512f broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.
This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
in the spirit of commit 1ced121600,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display. Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to
mem_*_clk for consistency's sake.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Enable the first two SATA interfaces on MPC837xEMDS board,
The two SATA ports are on LYNX1. (SATA0/1 on J4/5)
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch is stolen from Anton Vorontsov's patch
for mpc837xerdb boards.
The reference clk and xcorevdd voltage of serdes1/2
is same between mpc837xemds and mpc837xerdb.
8377E: LYNX1- 2 SATA LYNX2- 2 PCIE
8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE
8379E: LYNX1- 2 SATA LYNX2- 2 SATA
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
displays the current configuration upon bootup and changes the PCIe
init loop, to only initialize the availabel PCIe slots.
Signed-off-by: Stefan Roese <sr@denx.de>
Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback
Signed-off-by: Tor Krill <tor@excito.com>
R2D plus is SH reference board used with SH7751R.
This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
one PCI bus, VGA, and two Ethernet controller.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Receive FIFO level register is different in SH4A.
Because register is different, cannot occasionally receive data.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Renesas Solutions R7780MP is a reference board on SH7780.
This board has serial, 10/100 base Ethernet deivice, CF slot
and VGA devices. This board can set extension board.
Extension board has 10/100/1000 base Ethernet device, PCI slot,
S-ATA, iDVR slot.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch add support PCI of SuperH base code and SH7780 specific code.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
SH7780 is CPU of Renesas Technology.
This CPU has
- CPU clock 400MHz
- PCI support
- DDR-SDRAM controller
- etc ...
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Migo-R is a board based on SH7722 and has may devices.
In this patch, supported SCIF, NOR flash and Ethernet.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.
We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch contains updates for changes for the Korat PPC440EPx board.
These changes include:
(1) Support for "permanent" and "upgradable" copies of U-Boot, as
described in the new "doc/README.korat" file;
(2) a new memory map for the registers in the board's CPLD;
(3) a revised format for manufacturer's data in serial EEPROM; and
(4) changes to track updates to U-Boot for the Sequoia board.
Signed-off-by: Larry Johnson <lrj@acm.org>
This bug was introduced with commit aee747f19b
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.
Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
Since this board will probably be ported to arch/powerpc in the
near future, we add device tree support now. This way we are
"ready" for arch/powerpc from now on.
Signed-off-by: Stefan Roese <sr@denx.de>
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.
This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:
CHIP_11: End of memory range area restricted access.
Category: 3
Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.
Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.
Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.
This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia
The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:
PMC440.h:
/* esd expects pram at end of physical memory.
* So no logbuffer at the moment.
*/
It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.
Signed-off-by: Stefan Roese <sr@denx.de>
The routine ft_board_setup() configures the EBC NOR mappings for the
Linux physmap_of driver. Since on 460EX/GT we remap the FLASH from
0x4.fc00.0000 to 0x4.cc00.0000 because of the max. 16MByte boot-CS
problem, we need to pass the corrected address here too.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the AMCC Glacier 460GT eval board.
The main difference to the Canyonlands board are listed here:
- 4 ethernet ports instead of 2
- no SATA port
- no USB port
Currently EMAC2+3 are not working. This will be fixed in a later
release.
Signed-off-by: Stefan Roese <sr@denx.de>
Currently U-Boot building in some external directory
doesn't work. This patch tries to fix the problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying
the I2C bus speed. Current 8[356]xx boards define the CFG_I2C_SPEED macro,
but fsl_i2c.c ignores it and uses conservative value when programming the
I2C bus speed.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Add the Freescale on-chip SATA controller driver to u-boot,
The SATA controller is used on the 837x and 8315 targets,
The driver can be used to load kernel, fs and dtb.
The features list:
- 1.5/3 Gbps link speed
- LBA48, LBA28 support
- DMA and FPDMA support
- Two ports support
Signed-off-by: Dave Liu <daveliu@freescale.com>
original ata_piix driver is using IDE framework, not real
SATA framework. For now, the ata_piix driver is only used
by x86 sc520_cdp board. This patch makes the ata_piix driver
use the new SATA framework, so
- remove the duplicated command stuff
- remove the CONFIG_CMD_IDE define in the sc520_cdp.h
- add the CONFIG_CMD_SATA define to sc520_cdp.h
Signed-off-by: Dave Liu <daveliu@freescale.com>
move the cmd_sata.c from common/ to drivers/ata_piix.c,
the cmd_sata.c have some part of ata_piix controller drivers.
consolidate the driver to have better framework.
Signed-off-by: Dave Liu <daveliu@freescale.com>
f6b44e0e4d that will cause usb_stor_info
to only print only information on one storage device, but not for
multiple.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Provide a board_lmb_reserve helper function to ensure we reserve
the page of memory we are using for the boot page translation code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The following changes are needed to be inline with ePAPR v0.81:
* r4, r5 and now always set to 0 on boot release
* r7 is used to pass the size of the initial map area (IMA)
* EPAPR_MAGIC value changed for book-e processors
* changes in the spin table layout
* spin table supports a 64-bit physical release address
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed. And CONFIG_ defines were added
to various board config files to make sure that happens.
The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.
Boards that are CDS specific were renamed with cds_ prefix.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were
called. However, get_sys_info() recalculates extraneous information when
called each time. Have get_ddr_freq() and get_bus_freq() return memoized
values from global_data instead.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Show the DDR memory data rate in addition to the memory clock
frequency. For DDR/DDR2 memories the memory data rate is 2x the
memory clock.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Speed up get_tbclk() by referencing pre-computed bus clock
frequency value from global data instead of sys_info_t. Fix
rounding of result to nearest; previously it was rounding
upwards.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
FSL has taken to using SVR[16:23] as an SOC sub-version field. This
is used to distinguish certain variants within an SOC family. To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value. We also add SVR numbers for all
of the current variants. Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.
Added support for using the ePAPR defined spin-table mechanism on 85xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.
Added support for using the ePAPR defined spin-table mechanism on 85xx.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.
For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The default settings for RTC DS1337 keeps the OSC
output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to
turn it off.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
This patch changes the "usb storage" command to return success if it
finds a USB storage device, otherwise it returns error.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Linux understands "host" (default), "peripheral" and "otg" (broken).
Though, U-Boot doesn't restrict dr_mode variable to these values (think
of renames in future).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
RTL8211B sets link state register after autonegotiation complete,
so with bootdelay=0 RTL8211B will report lack of the link.
To fix this, we should wait for aneg to complete, even if the
link is currently down.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
device_type = "soc" is being deprecated, newer device trees will use
"fsl,soc" and/or "fsl,immr" for the soc nodes.
This patch also adds clock-frequency property for soc nodes (the same
value as bus-frequency).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
With the original value of 1/2 clock cycle delay, the system ran relatively
stable except when we run benchmarks that are intensive users of memory.
When I run samba connected disk with a HDBENCH test, the system locks-up
or reboots sporadically.
Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
The device trees for these boards describe PCI I/O as starting from
address zero from the device's perspective.
Placing I/O elsewhere may cause problems with certain PCI boards, and may
cause problems with Linux.
Signed-off-by: Scott Wood <scottwood@freescale.com>
At least on the "33MHz Pilot" board crystal is actually 33.3MHz.
This patch fixes "system time drifting" problem.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Plus modify environment to use it and remove bootfile env variable,
it is internal and CONFIG_BOOTFILE is used for these purposes.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Current DDR setup easily causes memory corruption, this patch fixes it.
Also fix TIMING_CFG0_MRS_CYC definition.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
controller and FHCI (QE USB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
This patch adds basic support for Broadcom BCM5481 PHY.
RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is
Peter Barada <peterb@logicpd.com>.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
The following changes are based on kernel UCC ethernet performance:
1. Make the CSB bus pipeline depth as 4, and enable the repeat mode
2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT
switch to enable this setting.
The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:
3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting
previously.
5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on
Twr=15ns, and this was already the setting in DDR_MODE)
6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
Trp=15ns)
7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
Tras=40ns)
8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
Trcd=15ns)
9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on
Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based
on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
on CL=3 and WL=2).
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX
and other boards. A small firwmare must be uploaded to its on-board memory
before it can be enabled. This patch adds the code which uploads firmware
(but not the firmware itself).
Previously, this feature was provided by a U-Boot application that was
made available only on Freescale BSPs. The VSC7385 firmware must still
be obtained separately, but at least there is no longer a need for a separate
application.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
These defines embedded the u-boot env variables and/or the bd_t structure
in the fdt blob. The conclusion of discussion on the u-boot email list
was that embedding these in the fdt blob is not useful: there are better
ways of passing the data (in fact, the fdt blob itself replaces the
bd_t struct).
The only board that enables these is the stxxtc and they don't appear
to be used by linux.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.
Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Include FEC specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
defined. Systems without FEC, i.e. no FEC node in DTB, should be possible.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
AX88796L is device of NE2000 compatible.
This patch support AX88796L ethernet device.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
There are more devices of the NE2000 base.
A present code is difficult for us to support more devices.
To support more NE2000 clone devices, separated the function.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board
directory, but it is not board specific, so relocate it to the drivers dir
so that other Blackfin ports can utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the "ssync" instruction may have hardware anomalies associated with
it, have the smc91111 driver use the SSYNC macro rather than invoking it
directly. We workaround all the anomalies via this macro.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capble of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add a simple expr style command that will set an env variable as the result
of the command. This allows us to do simple math in shell. The following
operations are supported: &, |, ^, +, -, *, /.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Without this change, we'll be suffering from deffered WATCH exception
once Status.EXL is cleared. Make sure Cause.WP is cleared.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you
don't need to do Hit_Invalidate_I, but flush_cache() needs it since this
function is used not only in U-Boot specfic programs but also at loading
target binaries.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I
again per a loop for I-cache initialization. But according to 'See MIPS
Run', we're encouraged to use three separate loops rather than combining
them *for both I- and D-cache*. This patch tries to fix this.
In accordance with fixing above, mips_init_[id]cache are separated from
mips_cache_reset(), and rewrite cache loops are completely rewritten with
useful macros.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch replaces the current function definitions with NESTED, LEAF
and END macro. They specify some more additional information about the
function; an alignment of symbol, type of symbol, stack frame usage, etc.
These information explicitly tells the assembler and the debugger about
the types of code we want to generate.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
The initial intension of having mips_cache_lock() was to use the cache
as memory for temporary stack use so that a C environment can be set up
as early as possible.
But now mips_cache_lock() follow lowlevel_init(). We've already have the
real memory initilaized at this point, therefore we could/should use it.
No reason to lock at all.
Other problems:
Cache locking is not consistent across MIPS implementaions. Some imple-
mentations don't support locking at all. The style of locking varies -
some support per line locking, others per way, etc. Some parts use bits
in status registers instead of cache ops. Current mips_cache_lock() is
not necessarily general-purpose.
And this is worthy of special mention; once U-Boot/MIPS locks the lines,
they are never get unlocked, so the code relies on whatever gets loaded
after U-Boot to re-initialize the cache and clear the locks. We're sup-
posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
but leave the situation as it is for a long time.
For these reasons, I proposed the removal of mips_cache_lock() from the
global start-up code.
This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
*things have changed*. If he wants the same behavior as before, he needs
to have CFG_INIT_RAM_LOCK_MIPS in his config file.
If we don't have any regression report through several releases, then
we'll remove codes entirely.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Acked-by: Andrew Dyer <amdyer@gmail.com>
If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be
run on the board, then the SYSMON POST controls the display backlight
(doesn't switch backlight ON if POST FAILED, and does switch the
backlight ON if PASSED).
If not, then the video driver controls the display backlight (just
switch ON the backlight upon initialization).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.
When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
use this patch.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Stefan Roese <sr@denx.de>
Disable default building of new uImage format support in preparation
for merge with the master. Support for new format can be enabled on
a per-board basis, by defining the following in the board's config file:
#define CONFIG_FIT 1
#define CONFIG_OF_LIBFDT 1
This can be optionally defined to give more verbose output:
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Fix imxtract command not being compiled-in despite CONFIG_CMD_XIMG being in
include/config_cmd_default.h. Fix few warnings and handling of new format
images.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
and so on).
The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.
The POST RTC test was modified to detect the RTC faults utilizing
this new rtc_get() feature.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
- insert partition for dtb blob to TQM5200B MTD layout
- set env variables dependent on the configured board
(TQM5200 or TQM5200B)
Signed-off-by: Martin Krause <martin.krause@tqs.de>
With this patch we don't need that many #ifdef's in the code. It moves
the subtraction into the macro and defines a NOP-macro when
CONFIG_FLASH_SHOW_PROGRESS is not defined.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Since fdt_node_offset_by_compatible() was converted to the new
fdt_next_node() iterator, a chunk of initialization code became
redundant, but was not removed by oversight. This patch cleans it up.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Currently the CHECK_HEADER() macro is defined local to fdt_ro.c.
However, there are a handful of functions (fdt_move, rw_check_header,
fdt_open_into) from other files which could also use it (currently
they open-code something more-or-less identical). Therefore, this
patch moves CHECK_HEADER() to libfdt_internal.h and uses it in those
places.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
fdt_add_subnode_namelen() has a bug if asked to add a subnode to a
node which has NOP tags interspersed with its properties. In this
case fdt_add_subnode_namelen() will put the new subnode before the
first NOP tag, even if there are properties after it, which will
result in an invalid blob.
This patch fixes the bug, and adds a testcase for it.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This patch adds an fdt_next_node() function which can be used to
iterate through nodes of the tree while keeping track of depth. This
function is used to simplify the iteration code in a lot of other
functions, and is also exported for use by library users.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This patch adds an fdt_set_name() function to libfdt, mirroring
fdt_get_name(). This is a r/w function which alters the name of a
given device tree node.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Backlight was switched on even when temperature was too low.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).
The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Backlight was switcehd on even when temperature was too low.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory),
the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ...,
PPC440EPX_GPT0_COMP5).
To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).
The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
marked as POST_CRITICAL fails then the alternative, post_critical,
boot-command is used. If this command is not defined then U-Boot
enters into interactive mode.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
The parallel flash on the BF537-STAMP is CFI compliant, so there is no need
for the board specific driver at all. Just use the common CFI driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Stop tying things to the processor that should be tied to other defines and
change BFIN_CPU to CONFIG_BFIN_CPU so that it can be used in the build
system to select the -mcpu option.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This moves the Blackfin-common bootldr command out of the BF537-STAMP
specific board directory and into the common directory so that all Blackfin
boards may utilize it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This patch adds CFG_OHCI_USE_NPS to the common USB-OHCI driver. This
way a board just needs to define this new option to enable the "force
NoPowerSwitching mode" instead of adding new CPU/architecture defines
to the USB source itself.
This new option will be used first with the new AMCC 460EX Canyonlands
board port, which will be posted in a few days.
This patch also fixes a small compilation problem when DEBUG is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.
This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.
Tested with 512 byte page NAND device (32MByte) on Canyonlands.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is a rework of the 4xx interrupt handling done while
adding the 460EX/GT support. Interrupts are needed on 4xx for the
EMAC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).
Signed-off-by: Stefan Roese <sr@denx.de>
Cleanup: Remove custom flash driver for 8 bit boot-eprom and replace it with
the FLASH_CFI_LEGACY et al. config options.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
MD5 supoprt is turned on by defining CONFIG_MD5, the digest can be then
calculated using the md5() function -- see include/md5.h for details.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Change the automatic local version to have the form -nnnnn-gSHA1SUMID,
where 'nnnnn' is the number of commits since the last tag (i.e.,
1.3.2-rc3). This makes it much easier to recognize "newer" versions
and to see how much has been changed since the referenced tag.
Stolen from Linux kernel's scripts/setlocalversio, see commit d882421f.
Signed-off-by: Wolfgang Denk <wd@denx.de>
verify, autostart and lmb fields are used regardless of CONFIG_FIT
setting, move their definitions to common section.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Save FIT configuration provied in the first bootm argument and use it
when to get ramdisk/FDT subimages when second and third (ramdisk/FDT)
arguments are not specified.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch allocates a set of show_boot_progress() IDs for new uImage format
and adds show_boot_progress() calls in new uImage format handling code.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
autoscript() routine is updated to accept second argument, which
is only used for FIT images and provides a FIT subimage unit name.
autoscript() routine callers must now pass two arguments. For
non-interactive use (like in cmd_load.c, cmd_net.c), new environment
variable 'autoscript_uname' is introduced and used as a FIT
subimage unit name source.
autoscript command accepts extended syntax of the addr argument:
addr:<subimg_uname>
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch updates architecture specific implementations of
do_bootm_linux() adding new uImage format handling for
operations like get kernel entry point address, get kernel
image data start address.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch adds new node offset fields to struct bootm_headers
and updates bootm_headers processing code to make use of them.
Saved node offsets allow to avoid repeating fit_image_get_node() calls.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Support for new (FIT) format uImages is added to powerpc specific
boot_get_fdt() routine which now recognizes, sanity checks FIT image
and is able to access data sections of the requested component image.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Re-enable interrupts if we return from do_bootm_<os> and 'autostart'
environment variable is not set to 'yes'.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
boot_get_ramdisk() and image_get_ramdisk() do not need all
cmdtp, flag, argc and argv arguments. Simplify routines definition.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch updates boot_get_ramdisk() routine adding format
verification and handling for new (FIT) uImages.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
New format uImages are recognized by the bootm command,
validity of specified kernel component image is checked and
its data section located and used for further processing
(uncompress, load, etc.)
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Support for the new uImage format (FIT) is added to mkimage tool.
Commandline syntax is appropriately extended:
mkimage [-D dtc_options] -f fit-image.its fit-image
mkimage (together with dtc) takes fit-image.its and referenced therein
binaries (like vmlinux.bin.gz) as inputs, and produces fit-image file -- the
final image that can be transferred to the target (e.g., via tftp) and then
booted using the bootm command in U-Boot.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Add FDT-based functions for handling new format component images,
configurations, node operations, property get/set, etc.
fit_ - routines handling global new format uImage operations
like get/set top level property, process all nodes, etc.
fit_image_ - routines handling component images subnodes
fit_conf_ - routines handling configurations node
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
When rtl_recv() of rtl8169 is called, OWNbit of status register
is not enable occasionally.
rtl_recv() doesn't work normally when the driver doesn't do
appropriate processing.
This patch fix this problem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
the dts file basenames were updated in linux - this helps avoid
inadvertently loading any old dtbs laying around.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
allow u-boot to recover (and, e.g., switch to another interface) in the
case where a PHY does not report autonegotiation is complete within its
two second timeout value.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The taihu board used gpio_read_out_bit which reads the output register and not
the pin state.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
1. Make the CSB bus pipeline depth as 4, and enable
the repeat mode;
2. Raise the eTSEC emergency priority;
3. Use the highest IP blocks clock.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The latter version stops when "run load" fails for whatever reasons
rendering the combination *a lot* more secure.
Signed-off-by: Detlev Zundel <dzu@denx.de>
This patch fixes a problem seen on PPC4xx boards, when no MAC address is
defined. Then no ethernet interface is available but a simple "tftp"
command will return without any error message which is quite confusing.
Signed-off-by: Stefan Roese <sr@denx.de>
Many of the spd.h #includers don't need it,
and wanted to have spd_sdram() declared instead.
Since they didn't get that, some also had open
coded extern declarations of it instead or as well.
Fix it all up by using spd_sdram.h where needed.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch fixes a problem seen on PPC4xx boards, when no MAC address is
defined. Then no ethernet interface is available but a simple "tftp"
command will return without any error message which is quite confusing.
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 5013c09f (Makefile: cleanup "clean" target) introduced a
problem for out-of-tree builds which caused "make clean" to fail.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Every now and then a Sequoia board (or equivalent hardware) had
problems connecting to a Gigabit capable network interface.
There were differences in the PHY setup between Linux and U-Boot.
This patch fixes the problem. Apparently "remote fault" is being set,
which signals to some devices (on the other end of the cable) that a
fault has occurred, while other devices ignore it. I believe the RF bit
was causing the issue, but I removed T4 also, to match up with Linux.
Signed-off-by: Mike Nuss <mike@terascala.com>
Fix a typo in qe_upload_firmware() that prevented uploading firmware on
systems with more than one RISC core.
Signed-off-by: Timur Tabi <timur@freescale.com>
If I try to "cp.b <ram> <dataflash>", u-boot selects normal flash
routines instead of dataflash. This is because it checks "if source
address is not dataflash" instead of target address.
Signed-off-by: Kim B. Heino <Kim.Heino@bluegiga.com>
This fixes the cluster size tests in the FAT32 file system.
The current implementation of VFAT support doesn't work if the
referred cluster has an offset > 16bit representation, causing
"fatload" and "fatls" commands etc. to fail.
Signed-off-by: michael trimarchi <trimarchi@gandalf.sssup.it>
The 405EZ only supports 512 bytes of rx-/tx-fifo EMAC sizes. But
currently 4k/2k is configured. This patch fixes this issue.
Thanks to Thomas Kindler <tkindler@lenord.de> for pointing this out.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix alignment fault on ARM when running modules. With out an explicit
linker file gcc4.2.1 will half word align __bss_start's value. The word
dereference will crash hello_world.
signed-off-by Richard Woodruff <r-woodruff2@ti.com>
erratum 5.6 states the autoneg completion bit is functional only if the
autoneg bit is asserted.
This fixes any secondarily-issued networking commands on non-gigabit
links on the mpc8360 mds board.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Adds PCI support for MPC5121
Tested with drivers/net/rtl8139.c
Support is conditional since PCI on old silicon does not work.
ads5121_PCI_config turns on PCI
In this version, condition compilation of PCI code has been moved
from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as
suggested by Jean-Christophe PLAGNIOL-VILLARD
Signed-off-by: John Rigby <jrigby@freescale.com>
U-Boot crashes in the net loop if CONFIG_4xx_DCACHE is
enabled. To reproduce the problem ensure that 'ethrotate'
environment variable isn't set to "no" and then run
"tftp 200000 not_existent_file".
This patch tries to fix the issue.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Currently (since commit b2e2142c) u-boot crashes on
sequoia board while SPR test if CONFIG_4xx_DCACHE is
enabled. This patch disables the cache while SPR test.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S,
TB5200 and TB5200_B to fixup the /memory node with the memory values
detected by U-Boot.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Call fdt_fixup_memory() on the boards TQM5200, TQM5200_B, TQM5200S,
TB5200 and TB5200_B to fixup the /memory node with the memory values
detected by U-Boot.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
This patch fixes a bug in the SDRAM initialization code for the
TQM5200. The hi_addr bit is now set correctly. Without this patch
the hi_addr bit is always set to 1, if the second SDRAM bank is
not populated.
For other MPC5200 boards a correspondig patch has already been applied
some time ago, see commit a63109281a.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
--
Forget the first patch please. I confused flash with SDRAM in
the comment ...
The previous patch was lacking of i386, microblaze, nios and nios2. This
patch tries to fix them.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch adds an fdt_next_node() function which can be used to
iterate through nodes of the tree while keeping track of depth. This
function is used to simplify the iteration code in a lot of other
functions, and is also exported for use by library users.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Use uint32_t when accessing size table in image_multi_count() and
image_multi_getimg() for multi component images.
Add missing uimage_to_cpu() endianness conversion.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch adds the following common routines:
1) Dedicated mkimage print_header() is replaced with common
image_print_contents()
image_print_contents_noindent()
2) Common os/arch/type/comp fields name <--> id translation routines
genimg_get_os_name()
genimg_get_arch_name()
genimg_get_type_name()
genimg_get_comp_name()
genimg_get_os_id()
genimg_get_arch_id()
genimg_get_type_id()
genimg_get_comp_id()
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch introduces the following prefix convention for the
image format handling and bootm related code:
genimg_ - dual format shared code
image_ - legacy uImage format specific code
fit_ - new uImage format specific code
boot_ - booting process related code
Related routines are renamed and a few pieces of code are moved around and
re-grouped.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Allow the user to set 'bootm_low' and 'bootm_size' env vars as a way
to restrict what memory range is used for bootm.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Convert generic ramdisk_high(), get_boot_cmdline(), get_boot_kbd()
functions over to using lmb for allocation of the ramdisk, command line
and kernel bd info.
Convert PPC specific fdt_relocate() to use lmb for allocation of the device
tree.
Provided a weak function that board code can call to do additional
lmb reserves if needed.
Also introduce the concept of bootmap_base to specify the offset in
physical memory that the bootmap is located at. This is used for
allocations of the cmdline, kernel bd, and device tree as they should
be contained within bootmap_base and bootmap_base + CFG_BOOTMAPSZ.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The autostart env variable was dropped as part of the initial new uImage
cleanup. Add it back here so the arch specific code can decide if it
wants to really boot or not.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Introduce the LMB lib used on PPC in the kernel as a clean way to manage
the memory spaces used by various boot images and structures. This code
will allow us to simplify the code in bootm and its support functions.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capable of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Changed image_get_ramdisk() to just return NULL on error and have
get_ramdisk() propogate that error to the caller. It's left to the
caller to call do_reset() if it wants to.
Also moved calling do_reset() in get_fdt() and fdt_relocate() on ppc
to a common location. In the future we will change get_fdt() and
fdt_relocate() to return success/failure and not call do_reset() at all.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
Doing the fdt before the ramdisk allows us to grow the fdt w/o concern
however it does mean we have to go in and fixup the initrd info since
we don't know where it will be.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If we are bootin OF style than we can skip setting up some things
that are used for the old boot method.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
We don't actually need the kdb param as we are just using it to get
bd->bi_memsize which we can get from gd->bd->bi_memsize. Also, if we
boot via OF we might not actually fill out a kdb.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
There is no reason to icbi when invalidating the temporary stack in
the d-cache. Its impossible on e500 to have the i-cache contain
any addresses in the temp stack and it can be problematic in generating
transactions on the bus to non-valid addresses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The source vector for the ECM was being set to 2,
but that's what the source vector for DDR was being
set to. Change it to 1.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Commit 0db37dc... (and some others) changed the INIT_RAM TLB
mappings to be unguarded. This collided with an existing "bug"
where the mappings for the INIT_RAM were being kept around.
This meant that speculative loads to those addresses were
succeeding in the TLB, and going out to the bus, where they
were causing an exception (there's nothing at that address). The
Flash code was coincidentally causing such a speculative load.
Rather than go back to mapping the INIT RAM as guarded, we fix
it so that the entries for the INIT_RAM are invalidated. Thus
the speculative loads will fail in the TLB, and have no effect.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Dual format image code must properly handle all three FDT passing methods:
- raw FDT blob passed
- FDT blob embedded in the legacy uImage
- FDT blob embedded in the new uImage
This patch enables proper raw FDT handling when no FIT imaeg support
is compiled in. This is a bit tricky as we must dected FIT format even
when FIT uImage handling is not enabled as both FIT uImages and raw FDT
blobs use tha same low level format (libfdt).
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
FDT blob may be passed either: (1) raw (2) or embedded in the legacy uImage
(3) or embedded in the new uImage. For the (2) case embedding image must be
verified before we get FDT from it. This patch factors out legacy image
specific verification routine to the separate helper routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Legacy image specific verification is factored out to a separate helper
routine to keep get_kernel() generic and simple.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Do not pass image verification flag directly to related routines.
Simplify argument passing and move it to the bootm_header structure which
contains curently processed image specific data and is already being passed
on the argument list.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
When CONFIG_HAS_DATAFLASH is not defined gen_get_image() routine has nothing
to do, update its control flow to better reflect that simple case.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
PPC specific FDT blob handling code is divided into two separate routines:
get_fdt() - find and verify a FDT blob (either raw or image embedded)
fdt_relocate() - move FDT blob to within BOOTMAP if needed
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Back in commit a551cee99a
(86xx: Fix GUR PCI config registers properly), we should have
changed the MPC86xx_PORBMSR_HA and MPC86xx_PORDEVSR_IO_SEL
symbols in the sbc8641d board as well. Fix this oversight.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Don't include testdram() on NAND-booting target acadia_nand. This saves
a few bytes and makes the target build clean again.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds framework for dual format images. Format detection is added
and the bootm controll flow is updated to include cases for new FIT format
uImages.
When the legacy (image_header based) format is detected appropriate
legacy specific handling is invoked. For the new (FIT based) format uImages
dual boot framework has a minial support, that will only print out a
corresponding debug messages. Implementation of the FIT specific handling will
be added in following patches.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
----------------------------------------------------------------
Olaf Hering [Wed, 17 Oct 2007 06:27:13 +0000 (23:27 -0700)]
Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on
32bit targets.
GCC can be made to warn about usage of long long types with ISO C90
(-ansi), but only with -pedantic. You can write this in a way that even
then it doesn't cause warnings, namely by:
#ifdef __GNUC__
__extension__ typedef __signed__ long long __s64;
__extension__ typedef unsigned long long __u64;
#endif
The __extension__ keyword in front of this switches off any pedantic
warnings for this expression.
Signed-off-by: Olaf Hering <olh@suse.de>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
----------------------------------------------------------------
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This reduces the build time by ~10%. Here's the gth2_config example.
BEFORE AFTER
real 0m31.441s 0m27.833s
user 0m24.766s 0m23.045s
sys 0m10.425s 0m7.468s
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
In the thread "[1.3.2-rc1] MPC8548CDS/MPC8555CDS configs fails to link",
the define2mk.sed script was identified as the source of the link
failure on FreeBSD. The problem is that sed(1) does not always support
the '+' operator. It isn't on FreeBSD. The attach patch implements the
equivalent, using the '*' operator instead and should work everywhere.
Signed-off-by: Marcel Moolenaar <marcelm@juniper.net>
The Linux commit fac8b209b1084bc85748bd54e13d00c1262b220f ("Remove
final traces of long-deprecated "ramdisk" kernel parm") makes these
changes neccessary.
Signed-off-by: Detlev Zundel <dzu@denx.de>
When the LM75 temperature sensor measures a temperature below 0 C, the
current driver does not perform sign extension, so the result returned is
256 C too high. This patch fixes the problem.
Signed-off-by: Larry Johnson <lrj@acm.org>
Some boards (e.g. lwmon5) may use rather small watchdog intervals, so
causing it to reboot the board if U-Boot does a long busy-wait with
udelay(). Thus, for these boards we have to restart WD more
frequently.
This patch splits the busy-wait udelay() into smaller, predefined,
intervals, so that the watchdog timer may be resetted with the
configurable (CONFIG_WD_PERIOD) interval.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Adds configuration option for ATI Radeon 9200 card
support to sequoia config file. If CONFIG_VIDEO
is enabled, TEXT_BASE should be changed to 0xFFF80000.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capable of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This bumps the autoconf.mk include step above board/cpu/arch/etc... so that
those .mk files can have make if statements based on the current config.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If any of the steps for generating autoconf.mk fail currently, they go
unnoticed. To fix, we can simply add 'set -e' to the long list of commands.
This is simpler and more robust than placing '|| exit $$?' after every line.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
By adding VERSION_FILE to the PHONY targets the script
/tools/setlocalversion is always called and version_autogenerated.h
is replaced only if the script find a modified source file.
Signed-off-by: Stefano Babic <sbabic@denx.de>
- Fix flash_init call when CFG_NO_FLASH is used
- Remove no more needed flash.c for qemu-mips
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Michael Hennerich added support for outputting an image in RGB format rather
than forcing YUYV all the time. This makes obvious sense if the display you
have takes RGB input rather than YUYV.
Rather than hack in support for options, I've converted it to use getopt and
cleaned up the argument parsing in the process.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
If the $(LDSCRIPT) does not exist (normally it's board/$(BOARD)/u-boot.lds),
then change into the board directory and try and create it. This allows you
to generate the linker script on the fly based upon board defines (like the
Blackfin boards do).
There should be no regressions due to this change as the normal case is to
already have a u-boot.lds file. If that's the case, then there's nothing to
generate, and so make will always exit. The fix here is that if the linker
script does not exist, the implicit rules take over and attempt to guess how
to generate the file.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Introducing routines for parsing new uImage format bootm arguments:
[<addr>]#<conf> - configuration specification
[<addr>]:<subimg> - subimage specification
New format images can contain multiple subimages of the same type. For example
a single new format image file can contain three kernels, two ramdisks and a
couple of FDT blobs. Subimage and configuration specifications are extensions
to bootm (and other image-related commands) arguments' syntax that allow to
specify which particular subimage should be operated on.
Subimage specification is used to denote a particular subimage. Configurations
are a bit more complex -- they are used to define a particualr booting setup,
for example a (kernel, fdt blob) pair, or a (kernel, ramdisk, fdt blob) tuple,
etc.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This routine assures that image (whether legacy or FIT) is not
in a special dataflash storage.
If image address is a dataflash address image is moved to system RAM.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
New uImage format (Flattened Image Tree) requires libfdt
functionality, print out error message if CONFIG_OF_LIBFDT
is not defined.
New uImage support is enabled by defining CONFIG_FIT (and CONFIG_OF_LIBFDT).
This commit turns it on by default.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Do not use uninitialized cmd_reset; issue both AMD and Intel reset
commands instead
From a short test, it looks like AMD-style flash roms treat *any* unknown
command write as a reset, at least when in CFI Query mode, so issuing the
Intel reset command to AMD-style flashs seems safe (from the small sample I
have), plus the 3-cycle magic sequence should kick the state machine into
the right state even without a reset command. Since the AMD-style flashs
require the unlock sequence for real operation, I chose to try the AMD reset
command first, so that Intel flashs do no see an invalid command prior to
the CFI query.
I have tested the patch on AM29LV320-style flashs from Fujitsu and Macronix,
plus Intel StrataFlash.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The CPU POST test code (run from cpu_post_exec_31()) doesn't follow the
ABI carefully, at least the CR3, CR4, and CR5 fields of CR are clobbered
by it. The gcc-4.2 with its more aggressive optimization exposes this fact.
This patch just saves the CR value before running the test code, so allowing
it to do anything it wants with CR.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
--
Back in commit 975a083a5e where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't. Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.
My bad. Lovely Wednesday with git bisect. You know.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Without an actual supported video card hooked up, enabling
the CONFIG_VIDEO by default just makes it look broken by
routing all console output to the video card. Don't.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars. Fix this by removing the 85xx cruft from the
86xx codebase.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is the proper fix for a missing closing brace in the function
ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com.
The ft_cpu_setup() function in mpc8641hpcn.c should have been
removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE,
but was missed. Only, the sbc8641d was nominally still using it.
It all got ripped out, and the funcality that was in ft_board_setup()
was refactored to remove the CPU portions into the new file
cpu/mpc86xx/fdt.c instead. Make sbc8641d use this now.
Based loosely on an original patch from joe.hamman@embeddedspecialties.com
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The option CONFIG_I2C_MULTI_BUS does not have any effect on Sequoia, the
PPC440EPx reference platform, because IIC1 is never enabled. Add Sequoia board
code to turn on IIC1 if CONFIG_I2C_MULTI_BUS is selected.
Signed-off-by: Mike Nuss <mike@terascala.com>
Cc: Stefan Roese <sr@denx.de>
This patch tries to get rid of some assembler warnings about
changed .got2 section type while compiling x86 bios emulator
code.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This patch extends PCI device id table of the
radeon driver so that the driver will also support
Radeon Mobility 9200 (M9+) based boards.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Constantly rebuilding the version header will force useless relinking, so we
simply need to compare the new header with the existing one before updating
it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx.
Update the get_clocks() function in 85xx and 86xx to determine the I2C
clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk.
Signed-off-by: Timur Tabi <timur@freescale.com>
R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
will refuse to use load/store multiple insns; instead, it issues a
list of simple load/store instructions upon function entry and exit,
resulting in bigger code size, which in turn makes the build for a
few boards fail.
Use r2 instead.
Signed-off-by: Wolfgang Denk <wd@denx.de>
If the variable "machid" exists, let do_bootm_linux use that instead
of bd->bi_arch_number.
Signed-off-by: Uwe Kleine-Knig <Uwe.Kleine-Koenig@digi.com>
Current MII_DEBUG is confusing in two ways. One is useless define-then-
undef at the top of the file. The other is there is only one debug() in
this file, and that doesn't seem worthwhile to bother having MII_DEBUG.
While there are many useful printf()/puts() debug codes, but they are for
DEBUG, not for MII_DEBUG.
This patch tries to put them all together into MII_DEBUG and debug().
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch enables the OneNAND boot within U-Boot.
Before this work, we used another OneNAND IPL called X-Loader based
on open source. With this work, we can build the oneboot.bin image
without other program.
The build sequence is simple.
First, it compiles the u-boot.bin
Second, it compiles OneNAND IPL
Finally, it becomes the oneboot.bin from OneNAND IPL and u-boot.bin
The mechanism is similar with NAND boot except it boots from itself.
Another thing is that you can only use the OneNAND IPL only to work
other bootloader such as RedBoot and so on.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
A #if statement in fat.c depended on CONFIG_MMC, instead of
defined(CONFIG_MMC). This meant CONFIG_MMC needed to be defined
as "1" rather than just defined. Now it's better.
Signed-off-by: Andy Fleming <afleming@freescale.com>
---------------------------------
read_dataflash() takes a signed char pointer as a parameter. Silence a
few warnings dues to incorrect parameter types in env_dataflash.c.
Signed-off-by: Stelian Pop <stelian@popies.net>
Fix arm926ejs compile when SKIP_LOWLEVEL_INIT is on.
cpu/arm926ejs/start.o: In function `cpu_init_crit':
.../cpu/arm926ejs/start.S:227: undefined reference to `lowlevel_init'
Signed-off-by: Stelian Pop <stelian@popies.net>
Remove the "#undef DEBUG" line from all Freescale 83xx board header files.
The inclusion of this line makes it impossible to enable debug code in
other source files, because "#define DEBUG" typically needs to be defined
before any header files are included.
Signed-off-by: Timur Tabi <timur@freescale.com>
Move the flat device tree setup for QE related devices into
a common file shared between 83xx & 85xx platforms that have QE's.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Verification of the kernel image (in old format) and finding kernel
data is moved to a dedicated routine. The routine will also hold
support for, to be added, new image format.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Move FDT blob finding and relocation to a dedicated
get_fdt() routine. It increases code readability and
will make adding support for new uImage format easier.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch moves common pre-boot allocation steps shared between PPC
and M68K to a helper routines:
common:
- get_boot_sp_limit()
- get_boot_cmline()
- get_boot_kbd()
platform:
- set_clocks_in_mhz()
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Ramdisk loading code, including initrd_high variable handling,
was duplicated for PPC and M68K platforms. This patch creates
common helper routine that is being called from both platform
do_bootm_linux() routines.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Microblaze do_bootm_linux() includes ramdisk processing code but
the ramdisk does not get used anywhere later on.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Architecture specific do_bootm_linux() routines share common
ramdisk image processing code. Move this code to a common
helper routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
FDT error handling in PPC do_bootm_linux() shares the same message format.
This patch moves error message printing to a helper fdt_error() routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Move numeric-id to name translation for image os/arch/type/comp header
fields to a helper routines: image_get_os_name(), image_get_arch_name(),
image_get_type_name(), image_get_comp_name().
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Standalone applications are supposed to be run using the "go" command.
This patch removes standalone images handling from the do_bootm().
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Support for OF_FLAT_TREE is to be obsoleted in the near future,
remove related code from the bootm routines.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Implementation of the do_bootm_linux() and other bootm helper routines is
architecture specific code. As such it resides in lib_<arch> directories
in files named <arch>_linux.c
This patch renames those files to a more clear and accurate
lib_<arch>/bootm.c form.
List of the renamed files:
lib_arm/armlinux.c -> lib_arm/bootm.c
lib_avr32/avr32_linux.c -> lib_avr32/bootm.c
lib_blackfin/bf533_linux.c -> lib_blackfin/bootm.c
lib_i386/i386_linux.c -> lib_i386/bootm.c
lib_m68k/m68k_linux.c -> lib_m68k/bootm.c
lib_microblaze/microblaze_linux.c -> lib_microblaze/bootm.c
lib_mips/mips_linux.c -> lib_mips/bootm.c
lib_nios/nios_linux.c -> lib_nios/bootm.c
lib_nios2/nios_linux.c -> lib_nios2/bootm.c
lib_ppc/ppc_linux.c -> lib_ppc/bootm.c
lib_sh/sh_linux.c -> lib_sh/bootm.c
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Check for overwrites during image move/uncompress, return with error
when the original image gets corrupted. Report clear message to the user
and prevent further troubles when pointer to the corrupted images is passed
to do_bootm_linux routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
- use single image header pointer instead of a set of auxilliary variables.
- add multi component image helper routines: get component size/data address
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
- sort and cleanup headers, declarations, etc.
- group related routines
- cleanup indentation, white spaces
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
I386 targets are not using a uImage format, instead fake header
is added to ram image before it is further processed by bootm.
Remove this fixup and force proper uImage use for I386.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
CHUNKSZ defined for PPC and M68K is set to the same value of 64K,
move this definition to a common header.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Move gunzip(), zalloc() and zfree() to a separate file.
Share zalloc() and zfree() with cramfs uncompress routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Make CONFIG_OF_LIBFDT and CONFIG_OF_FLAT_TREE use more
readable in PPC variant of do_bootm_linux() routine.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
- Add inline helper macros for basic header processing
- Move common non inline code common/image.c
- Replace direct header access with the API routines
- Rename IH_CPU_* to IH_ARCH_*
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Changes to match 5121 device tree going mainline in 2.6.25.
Change OF_SOC from "soc5121" to plain "soc".
Remove unneeded "ref-frequency" fixups.
Remove "address" enetaddr fixup.
Add bus-frequency fixup for old OF_SOC so old
kernels with old device trees will work with new
u-boot with 66MHz IPS clock
Signed-off-by: John Rigby <jrigby@freescale.com>
Move the flat device tree setup for QE related devices into
a common file shared between 83xx & 85xx platforms that have QE's.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The existing code assumes the SDRAM row refresh period should always
be 15.6 us. This is not always true, and indeed on the ATNGW100, the
refresh rate should really be 7.81 us.
Add a refresh_period member to struct sdram_info and initialize it
properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
panic() until the refresh_period member is updated properly.
Big thanks to Gerhard Berghofer for pointing out this issue.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The (now obsolete) atngw100 flash programming code was having problems
programming the onboard at49bv642 chip. The atstk1000 flash
programming code may have the same bug, so import fix for this problem
from the AVR32 Linux BSP.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The default load address is SDRAM + 2MB, not SDRAM + 4MB. The latter
wouldn't have worked anyway since the board can only access 4MB of
SDRAM.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Many people run into problems when they compile a big kernel and load
the uImage at the default SDRAM + 2MB address as the kernel will
overwrite the uImage as it is being unpacked. Increase the default
load address so that we can load a 4MB kernel image without any
problems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
allow to use a different server as set in serverip
add CONFIG_TFTP_FILE_NAME_MAX_LEN to configure the file name length
if not defined the max length will be at 128
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx.
Update the get_clocks() function in 85xx and 86xx to determine the I2C
clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk.
Signed-off-by: Timur Tabi <timur@freescale.com>
According to the OMAP5912 Serial Interfaces Reference Guide (see
http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the
FIFO_EN enable bit in the FIFO Control Register (FCR) can only be
changed when the baud clock is not running, i. e. when both DLL and
DLH are set to 0.
Thus make sure that DLL and DLH are 0 when writing the FCR.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch allows us to use the 'gd' pointer (and thus environment
and everything else associated with it) from interrupt context on
arm920t.
Signed-off-by: Harald Welte <laforge@openmoko.org>
This patch adds a IRQ demultiplexer callback to the arm920 cpu core code,
plus a stub implementation of it for the S3C2410.
The purpose is to allow arm920t implementations such as the s3c24x0 to
implement interrupt handlers in u-boot without having to touch core
arm920t code.
Signed-off-by: Harald Welte <laforge@openmoko.org>
Add ifdef to bdinfo command to display ethernet information
only if CONFIG_CMD_NET is defined for arm modules.
Signed-off-by: K R Gururaja Hebbar <gururajakr@sanyo.co.in>
Adds I2C init func call to init sequence for ARM boards. This is
present in ppc,blackfin and other processor init sequence.
Signed-off-by: K R Gururaja Hebbar <gururajakr@sanyo.co.in>
The current ndfc HW ECC implementation swaps the first two ECC bytes.
But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering,
so this swapping in the HW ECC driver is bogus. This patch fixes this
problem and now really uses the SMC ECC byte order.
Thanks to Sean MacLennan for pointing this out.
Signed-off-by: Stefan Roese <sr@denx.de>
The SRD0_PFC0 register was not configured correctly to enable the GPIO's
49-63 for GPIO. They have been configured as trace signals. This patch
fixes this by clearing the corresponding bit.
Signed-off-by: Stefan Roese <sr@denx.de>
Somewhere during development of U-Boot-1.1.3 CONFIG_BOOTBINFUNC was
renamed into CONFIG_INIT_CRITICAL which was 04 Apr 2005 replaced
with CONFIG_SKIP_LOWLEVEL_INIT and CONFIG_SKIP_RELOCATE_UBOOT.
However CONFIG_SKIP_LOWLEVEL_INIT has oposite meaning to
CONFIG_BOOTBINFUNC, so fix configuration to reflect this fact.
I'm sending this patch 4th (!) time in hope it produces at least some
reaction.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Fix at91rm9200dk base and environment address.
MMC support for X_Scale PXA is broken and does not work.
Mainly, the mmc_init() function cannot recognize current SD/MMC cards.
There were already some patches around the world but none of them was
merged into the official u-boot tree.
This patch makes order fixing this issue. Resubmit after code cleanup.
Applied and tested on PXA 270 (TrizepsIV module).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Fix gcc4 issue. With some toolchain, a previous patch that fixes gcc4
issues generates wrong code.
(Problem was reported with gcc-4.0.2-glibc-2.3.6/arm-softfloat-linux-gnu).
This patch fixes the problem and solves the gcc-4 issues as the linux
kernel does.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Dmitry Ivanov <ivadmitry@gmail.com>
This fixes a build breakage with CONFIG_API enabled, which appeared after
the recent changes in the U-Boot build system.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Adds the support code in cpu/mpc86xx for the new law setup code
recently created fsl_law.c, and changes the MPC8641HPCN config
to use this code.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* split the BAT initialization so that only 2 BATs (for the boot page
and stack) are programmed very early on. The rest are initialized later.
* Move other BAT setup, ccsrbar setup, and law setup later in the code
after translation has been enabled.
These changes will facilitate the moving of law and BAT initialization
to C code, and will aid with 36-bit physical addressing support.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
The commit 04a9e1180a
cause the 83xx immap broken, so the DMA and PCI will
be failed.
The patch fix the struct spi8xxx and rm struct spi83xx.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Add support for the ATNGW100 Network Gateway reference design,
including flash, ethernet and MMC support.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Hi,
The patch adds 4 boards, called AcTux-1 .. AcTux-4. This patch contains the
files that
contain changes for multiple boards, the board-specific files follow as
separate patches.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
enables the RTS signal with CONFIG_SERIAL_RTS_ACTIVE.
No handshaking is done, but the active RTS signal allows to
connect to the target using a PC which is using RTS/CTS
handshake, and does no harm if the PC is set to ignore RTS.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
allow to load the microde from flash or ram by download it through
the serial or other.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stefan Roese <sr@denx.de>
Hi,
the following patch adds support to move the IXP42X NPE firmware to a
separate flash block, whose start address is defined in
CONFIG_IXP4XX_NPE_EXT_UCODE_BASE. Using that, it is possible to build
NPE-enabled u-boot without copyright problems due to the NPE firmware.
I hope the patch applies, I get whitespace-related differences in the NPE
files due to trailing whitespace in the original versions.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- Fix EEPROM_data structure definition according to System EEPROM Data Format.
- Read MAC addresses from EEPROM to ethXaddr before saving ethXaddr to
bd->bi_ethaddr.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board.
This board has an ST M25P40 4Mbit EEPROM on its SPI bus
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch adds support for the SPI controller found on Freescale PowerPC
processors such as the MCP834x family. Additionally, a new config option,
CONFIG_HARD_SPI, is added for general purpose SPI controller use.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The commit 9e89647889
will cause the mpc8315erdb board can't boot up.
The patch fix that bug, and remove the duplicated #ifdef
CFG_SPCR_TSECEP code and clean the SCCR_TSEC2 for
MPC8313E processor.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
[PATCH] net: add 'ethrotate' environment variable
This patch replaces the buildtime configuration option
CONFIG_NET_DO_NOT_TRY_ANOTHER through the 'ethrotate' runtime
configuration veriable. See README.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
- Moved some common code to netstal/common/nm_bsp.c.
- sdram initialisation goes go netstal/common/fixed_sdram.c.
- Added support for POST.
- Stylistic cleanups (multi-line comments/ enforce 80 colomn width)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Added some routines used by all Netstal boards:
- nm_bsp.c: - nm_show_print and
- common_misc_init_r
- set_params_for_sw_install. Very specific code to handle our SW
installation procedure
- fixed_sdram.c: Common routines for HCU4 (and upcoming) MCU25 boards
to handle sdram initialization.
- nm.h: Common header
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
- Moved some common code to nestal/common/nm_bsp.c.
- Added support for the vxWorks EDR.
- Enable trace for Lauterbach, if present.
- Added support for POST.
- Stylistic cleanups (multi-line comments/ enforce 80 colomn width)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
- Various fixes
- Reduced rom_size from 384 to 320 kB
- Environment is now in flash
- Added POST
- Support for OF
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
- Various fixes
- Reduced rom_size from 384 to 320 kB
- Environment is now in flash
- Added POST
- Support for OF
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
This patch fixed wrong SH7720 CPU macro and changed macro that
calculated value of SCBRR register.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Previous setting cause ips clock to be out of spec. This bug was found by John
Rigby from Freescale.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Now that all boards have been converted, remove old config code and the
config option for the new style.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Reworked the initial processor initialzation sequence:
* introduced cpu_early_init_f that is run in address space 1 (AS=1)
* Moved TLB/LAW and CCSR init into cpu_early_init_f()
* Reworked initial asm code to do most of the core init before TLBs
The main reasons for these changes are to allow handling of 36-bit phys
addresses in the future and some of the issues that will exist when we
do that.
There are a few caveats on what can be initialized via the LAW and TLB
static tables:
* TLB entry 14/15 can't be initialized via the TLB table
* any LAW that covers the implicit boot window (4G-8M to 4G) must map to
the code that is currently executing.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add a set of functions to manipulate TLB entries:
* set_tlb() - write a tlb entry
* invalidate_tlb() - invalidate a tlb array
* disable_tlb() - disable a variable size tlb entry
* init_tlbs() - setup initial tlbs based on static table
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We should be using the _MEM_PHYS for LAW and TLB setup and not _MEM_BASE.
While _MEM_BASE & _MEM_PHYS are normally the same, _MEM_BASE should only
be used for configuring the PCI ATMU.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move the initialization of the LAWs into C code and provide an API
to allow modification of LAWs after init.
Board code is responsible to provide a law_table and num_law_entries.
We should be able to use the same code on 86xx as well.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
With serial, NE2000, IDE support. Tested in big-endian mode.
Memory size hard-coded to 128M for now, so don't play with
the -m option.
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
rx_status on the memory is basically in LE, but needs to be handled in CPU
endian. le32_to_cpu() takes up this mission. Even if on the sane hardware,
it'll work fine.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Masami Komiya <mkomiya@sonare.it>
Cc: Lucas Jin <lucasjin@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
"to = (currticks() + RTL_TIMEOUT)" has possibilities to wrap around. If it
does, the condition "(currticks() < to)" becomes invalid and immediately
leads to tx timeout error. This patch introduces the fine-graded udely(10)
loops to ease the impact of wrapping around.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Masami Komiya <mkomiya@sonare.it>
Cc: Lucas Jin <lucasjin@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Add the support of RealTek RTL8211B PHY, the RTL8211B
PHY only supports RGMII and MII mode.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
PHY less board prints out lots of "read wrong ...":
read wrong value : mii_id 3,mii_reg 2, base e0102320
read wrong value : mii_id 3,mii_reg 3, base e0102320
UEC: PHY is Generic MII (ffffffff)
read wrong value : mii_id 3,mii_reg 4, base e0102320
read wrong value : mii_id 3,mii_reg 0, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 1, base e0102320
read wrong value : mii_id 3,mii_reg 5, base e0102320
FSL UEC0: Full Duplex
FSL UEC0: Speed 100BT
FSL UEC0: Link is up
Using FSL UEC0 device
Make this printout depend on UEC_VERBOSE_DEBUG and
remove its definition in uec_phy.c
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
actually polling for PHY autonegotiation to finish enables us to remove the
5 second boot prompt latency present on QE based boards.
call to qe_set_mii_clk_src in init_phy, and mv call to init_phy from
uec_initialize to uec_init by Joakim Tjernlund; autonegotiation wait
code shamelessly stolen from tsec driver.
also rm unused CONFIG_RMII_MODE code.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The current TSEC driver limits MDIO access to the devices that have been configured as attached
to a TSEC MAC. This patch allows access to any PHY device on the MDIO bus through the 'mii' commands.
Signed-off-by: Michael Firth <michael.firth@bt.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
MPC837xERDB board support includes:
* DDR2 330MHz hardcoded (soldered on the board)
* Local Bus NOR Flash
* I2C, UART and RTC
* eTSEC RGMII (TSEC0 - RTL8211B with MII;
* TSEC1 - VSC7385 local bus, hardcoded, requires seperate firmware
* load)
Signed-off-by: Kevin Lam <kevin.lam@freescale.com>
Signed-off-by: Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
System registers that are modified are the Arbiter Configuration
Register (ACR), the System Priority Control Register (SPCR), and the
System Clock Configuration Register (SCCR).
Signed-off by: Michael F. Reiss <Michael.F.Reiss@freescale.com>
Signed-off by: Joe D'Abbraccio <ljd015@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Before, the order of arguments to the pixis_reset
command needed to be supplied in a hard-coded order.
Generalize the command parsing to allow any order.
Signed-off-by: James Yang <james.yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Convert the board/freescale/common/Makefile to use
CONFIG_* options to select which files to conditionally
compile into the board/freescale/common library rather
than conditionally compiling entire files.
Now handles::
CONFIG_FSL_PIXIS
CONFIG_FSL_DIU_FB
CONFIG_PQ_MDS_PIB
CONFIG_ID_EEPROM is introduced until CFG_ID_EEPROM is gone.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Use driver/net/uli526x.c as MPC8610HPCD default Ethernet driver.
Remove unused ethernet CONFIG_ options.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
mpc8360emds.c: In function 'ft_board_setup':
mpc8360emds.c:327: warning: assignment makes pointer from integer without a cast
mpc8360emds.c:329: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast
mpc8360emds.c:334: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast
mpc8360emds.c:341: warning: assignment makes pointer from integer without a cast
mpc8360emds.c:343: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast
mpc8360emds.c:348: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
use tree passed to us in local blob, not global fdt.
Also use fdt_path_offset to convert to relative offset, since absolute
reference is needed to check for rgmii-id mode string value.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
These changes were identified by HighSmith Bill ,Mazzyar and Joseph for
DDR configuration in u-boot code. Some are related to performance, some
affect stability and some correct few basic errors in the current
configuration.
The changes have been tested and found to give better memory latency
figures on MPC8313eRDB.LMBench figures prove it.
The changes are:
- CS0_CONFIG[ AP_n_EN] is changed from 1 to 0
(this may improve performance for application with many read
or write to open pages).
- CS0_CONFIG[ODT_WR_CFG] is currently changed from 100 to
001 (activating all the CS when only one is used may cause
unwanted noise on the system)
- TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 8clks (based on
Tras=45ns)
- TIMING_CFG_1[REFREC] changed from 21 clks to 18clks.
- TIMING_CFG_2[AL] value changed from 0 setting to 1 clk to
comply with the 3 ODT clk requirements)
- TIMING_CFG_2[CPO] was set to a reserved value, changed to RL+3/4.
- TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 6clks.
- DDR_SDRAM_MODE[AL]changed from 0 to 1.
- DDR_SDRAM_MODE[WRREC] changed from 1 clk to 3 clks.
- DDR_SDRAM_INTERVAL[REFINT] is changed from 0x0320 to 0x0510.
- DDR_SDRAM_INTERVAL[BSTOPRE] is changed from 0x64 to 0x0500.
The patch is based of git://www.denx.de/git/u-boot-mpc83xx.git
The last commit on this tree was 6775c68683
Signed-off-by: Poonam Aggrwal-b10812 <b10812@freescale.com>
Cc: Bill HighSmith <Bill.Highsmith@freescale.com>
Cc: Razzaz Mazyar <MRazzaz@freescale.com>
Cc: Josep P J <PJ.Joseph@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The isdram command prints out decoded information the "serial presence
detect" (SPD) chip on the SDRAM SIMMs. This can be very helpful when
debugging memory configuration problems.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The features list:
- Boot from NOR Flash
- DDR2 266MHz hardcoded configuration
- Local bus NOR Flash R/W operation
- I2C, UART, MII and RTC
- eTSEC0/1 support
- PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The TSEC emergency priority definition of 831x/837x
is different than the definition of 834x in SPCR register.
Add the other config of TSEC emergency priority into
cpu_init.c
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MPC8360ERDK board support patch is added before
the commit 2c5b48fc20
so, miss clean up it.
The patch clean up the miss cache config.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The ECC POST reported intermittent failures running after power-up on
the Korat PPC440EPx board. Even when the test passed, the debugging
output occasionally reported additional unexpected ECC errors.
This refactoring has three main objectives: (1) minimize the code
executed with ECC enabled during the tests, (2) add more checking of the
results so any unexpected ECC errors would cause the test to fail, and
(3) use synchronization (only) where required by the processor.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch extends the number of supported UECs to 4. Note that the
problem of QE thread resources exhaustion is resolved by setting the
correct number of QE threads according to Ethernet type (GBE or FE).
Signed-off-by: David Saada <david.saada@ecitele.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
SH7710/SH7712 of SH3 CPU are supported.
SH771X is called SH-Ether, and has the Ether controller in CPU.
The driver of Ether is not included in this patch.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch add the support of map_physmem() and unmap_physmem()
used with Common Flash Interface(CFI) driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
post/cpu/ppc4xx/spr.c contained a few checks for registers only present
for PPC440 and derivates processor.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
qe.c: In function 'qe_upload_firmware':
qe.c:390: warning: pointer targets in passing argument 2
uec.c: In function 'uec_initialize':
uec.c:1236: warning: 'uec_info' may be used uninitialized
Signed-off-by: Dave Liu <daveliu@freescale.com>
Now that bit 29 is the USB PHY reset bit, update the Kilauea port
to remove the USB PHY reset after powerup. The CPLD will keep the
USB PHY in reset (active low) until the bit is set to 1 in
board_early_init_f().
Signed-off-by: Stefan Roese <sr@denx.de>
- get rid of "version" target whichdidn't really work
- make autoconf.mk depend on version_autogenerated.h to make sure
to rebuild files as needed
- add XECHO macro to allow for silent build using "make -s"
Signed-off-by: Wolfgang Denk <wd@denx.de>
Currently, when CONFIG_CMDLINE_EDITING is set, bootretry doesn't work.
This patch fixes the problem.
Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
Many of the SPD bytes for DDR2 SDRAM are not interpreted correctly by the
"i2c sdram" command. This patch provides correct alternative
interpretations when DDR2 memory is detected.
Signed-off-by: Larry Johnson <lrj@acm.org>
With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]
For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.
The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.
Signed-off-by: Wolfgang Denk <wd@denx.de>
There were some size and unsigned problems.
Also add support for "ll" size modifier in format string like glibc
Signed-off-by: James Yang <James.Yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
The TK885D board uses a TQM885D module from TQ, this port adds an
own configuration file and adds a last_stage_init() method to
configure the two PHYs, depending on the phy_auto_nego environment
variable.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Lines of the lenght CONSOLE_COLS or greater than CONSOLE_COLS
are not displayed correctly. This is an attempt to fix
this issue. Also add carriage return handling.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
Clear possible errors in MCSR resulting from data-eye-search.
If not done, then we could get an interrupt later on when
exceptions are enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
According to the latest user manual of MPC8315E,
1) The SVCOD of HRCWL is different than 837x
2) The SCCR has changes
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This is MPC8360E based board with:
- 256MB fixed SDRAM;
- 8MB Intel Strata NOR flash;
- StMICRO 64MiB NAND flash;
- two 10/100/1000 ethernet ports connected via Broadcom
BCM5481 PHYs;
- two 10/100 ethernet ports connected via National
DP83848 PHYs;
- one PCI and one miniPCI slots;
- four serial ports (two NS16550-compatible, two UCCs);
- four USB ports working through MPC8360E "FHCI" USB controller;
- Fujitsu MB86277 graphics controller;
- Analog to Digital Converter/Touchscreen controller, AD7843
connected to SPI.
Features not supported in this patch are:
- StMICRO 64MiB NAND flash (patch sent);
- MINT framebuffer initialization (patch is pending);
- Fetching production information from the EEPROM via I2C;
- FHCI USB;
- Two slow UCCs used as RS-485 UARTs.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
the new libfdt code only updates eth0 if CONFIG_HAS_ETH0
is defined; add the define to the missing board configs.
Thanks to Emilian Medve for finding this.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Configure the number of bits used to address the banks inside the SDRAM
device. The default register value of 0 means 2 bits to address 4 banks.
Higher capacity devices like a 2GB DIMM require 3 bits to address 8 banks.
Signed-off-by: Becky Bruce <bgill@freescale.com>
vxWorks expects in
TLB 0 a entry for the Machine Check interrupt
TLB 1 a entry for the RAM
TLB 2 a entry for the EBC
TLB 3 a entry for the boot flash
After changing the baudrate to 9600 I had no problems to boot the
vxWorks image as distributed by WindRiver (Revision 2.0/1 from
June 18, 2007)
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Change return values of init() functions in all Ethernet drivers to conform
to the following:
>=0: Success
<0: Failure
All drivers going forward should return 0 on success. Current drivers that
return 1 on success were left as-is to minimize changes.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-By: Timur Tabi <timur@freescale.com>
Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it. Add function qe_upload_firmware() to parse the blob and
perform the actual upload. Add command-line command "qe fw" to take a firmware
blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the
'firmware' device tree node if U-Boot has uploaded a firmware. Fully define
'struct rsp' in immap_qe.h to include the actual RISC Special Registers.
Signed-off-by: Timur Tabi <timur@freescale.com>
Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.
Also, minor cleanup in cache.h to make the code a bit more readable.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In order to use GETH1 and GETH2 on the MPC8568E-MDS, we should reset
UCCs.
p.s Similar code exists in the Linux kernel board file (for capability
reasons with older U-Boots), but should be removed some day.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry. Actually use the bit masks for these items
since they are only a single bit.
Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Grab the FSL Book-E MAS register macros from Linux. Also added
defines for page sizes up to 4TB and removed SHAREN since it doesnt
really exist.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Way back in August I merged Heiko's patch:
566a494f59: [PCS440EP] upgrade the PCS440EP board
with Jon's CONFIG_COMMANDS patches.
This was done in commit: 6bf6f114dc
However, in the process, I left out some of Heiko's good changes.
Now Heiko's and Jon's patches are properly merged in fat_register_device()
Signed-off-by: Andy Fleming <afleming@freescale.com>
Add new function readline_into_buffer() that allows the
output of readline to be put into a pointer to char buffer.
This refactoring allows other functions besides the
main command loop to also use the same input mechanism.
Signed-off-by: James Yang <James.Yang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Ctrl combo key support is added, which is very useful to input Ctrl-C
for interrupt current job.
Also add usb_event_poll() calling to usb_kbd_testc(), which can get
key input when tstc() is called.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
We now have more useful version of do_mii() and everybody use it.
Gerald Van Baren says:
> When I originally wrote the mii command 6(!) years ago, I wrote a
> verbose version that printed human readable decomposition of the flags,
> etc., and a terse one that didn't print as much stuff and thus had a
> smaller memory footprint.
>
> It sounds like the terse version has withered and died, apparently
> people are only using the verbose version (which is very understandable,
> I do myself).
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
If type mii command without arguments, we suffer from uninitialized argv[]
entries; for example we MIPS get stuck by TLB error.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
This is an API for external (standalone) applications running on top of
U-Boot, and is meant to be more extensible and robust than the existing
jumptable mechanism. It is similar to UNIX syscall approach. See api/README
for more details.
Included is the demo application using this new framework (api_examples).
Please note this is still an experimental feature, and is turned off by
default.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Assumes the presence of the aliases node in the DTS to
locate the pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
didnt realize how out of shape easylogo actually was until i tried using it.
this patch does byte swapping as need be on the input tga header since the tga
is in little endian but the host could just as well be big endian. i didnt
bother using bswap macros or such stuff from system headers as nothing in
POSIX dictates byte swapping functionality.
Signed-Off-By: Mike Frysinger <vapier@gentoo.org>
- make the Makefile not suck
- include proper headers for prototypes
- fix obvious broken handling of strchr() when handling '.' in filenames
Signed-Off-By: Mike Frysinger <vapier@gentoo.org>
This patch allows u-boot to build without error in a cygwin
environment. Cygwin does not define __u64 in it's
include/asm/types.h file. The -idirafter flag in the u-boot
build causes the inclusion of the cygwin types.h file as opposed
to u-bot/include/asm/types.h file which does define __u64.
Subsequently, sha1.c compile fails due to unknown symbol.
Signed-off-by: Brian Miller <raptorbrino@netscape.net>
The existing code can show information about a gzip compressed BMP
image, but can't actually display it.
Therefore, move the decompression code out of bmp_info() and use it in
bmp_display() as well in order to display a compressed BMP image.
Also, clean things up a bit and fix a memory leak while we're at it.
[hskinnemoen@atmel.com: a bit of refactoring]
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch fixes several issues at least on a MPC885 based system with two
FEC interfaces used in MII mode.
1. PHY discovery should first read PHY_PHYIDR2 register and only then
PHY_PHYIDR1 like cpu/mpc8xx/fec.c::mii_discover_phy() does it,
otherwise the values read are wrong. Also notice, that PHY discovery
cannot work on MPC88x / MPC87x in setups with both FECs active at all
in its present form, because for both interfaces the registers from FEC
1 are used to communicate over MII.
2. Remove code duplication for resetting the FEC by isolating it into a
separate function.
3. Initialize MII on FEC 1 when communicating over FEC 2 in fec_init().
4. Optimize mii_init() to only reset the FEC 1 controller once.
5. Fix a typo in mii_init() using index i instead of j thus potentially
leading to unpredictable results.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
It is unclear on what platforms this driver has been tested, since
noone up to now defines CONFIG_RTL8169 in the board configuration
header. Now it has been fixed for a big-endian mpc8241 based
linkstation platform. This patch presents the necessary endianness
conversion fixes.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Ctrl combo key support is added, which is very useful to input Ctrl-C
for interrupt current job.
Also add usb_event_poll() calling to usb_kbd_testc(), which can get
key input when tstc() is called.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch removes the unnecessary bit swapping when
booting .bit files with the 'fpga loadb' command.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds a post configuration callback for Spartan2/3 FPGAs.
pre and post configuration callback are now optional and
not called when the function pointer is set to NULL.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch removes the FPGA subsystem configuration through
the CONFIG_FPGA bitmask configuration option.
See README for the new options:
CONFIG_FPGA,
CONFIG_FPGA_<vendor>,
CONFIG_FPGA_<family>
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
With this patch it is possible to reimplement default_serial_console()
in board specific code. This will be done in the upcomming PMC440
U-Boot port. This also allows the lwmon board maintainer to
remove the '#if !defined(CONFIG_LWMON) ...' from common/serial.c.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds a 'cu' like serial terminal command to u-boot
using which you can access other serial ports from the system console.
OpenMoko uses this in their Neo1973 phones to get access to the GSM
Modem and GPS chip from the bootloader.
Signed-off-by: Harald Welte <laforge@openmoko.org>
On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses
self modifying code and this doesn't work with stack in d-cache, since
I can't move the code from d-cache to i-cache. We move the SPR test to
be executed a little later, after relocation. Then stack is located in
SDRAM and this self-modifying code is no problem anymore.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch configures the LWMON5 port to use d-cache as init-ram and
the unused GPT0_COMP6 as POST WORD storage.
Signed-off-by: Stefan Roese <sr@denx.de>
The privious 4xx POST implementation only supported storing the POST
WORD in OCM. Since we need to reserve the OCM on LWMON5 for the logbuffer
we need to store the POST WORD in some other non volatile location.
This patch adds CFG_POST_ALT_WORD_ADDR to specify an address for such
a location.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for locking the init-ram/stack in d-cache,
so that other regions may use d-cache as well
Note, that this current implementation locks exactly 4k of d-cache,
so please make sure that you don't define a bigger init-ram area. Take
a look at the lwmon5 440EPx implementation as a reference.
Signed-off-by: Stefan Roese <sr@denx.de>
ext2fs_read_file() had the function arguments swapped.
Pointed out by Mike Montour, 19 Dec 2007 22:34:25 -0800
Signed-off-by: Wolfgang Denk <wd@denx.de>
The MPC5200 OHCI controller operates in big endian, so
CFG_OHCI_BE_CONTROLLER must be defined for it to work properly.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch updates the fw_printenv/fw_setenv userspace tool to include
the correct MTD header in order to compile against current kernel
headers. Backward compatibility is preserved by introducing an option
MTD_VERSION which can be set to "old" for compilation using the old MTD
headers. Along with this a number of warnings are fixed.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This patch allows the use of 4xx interrupt vector number defines
in board specific code outside cpu/ppc4xx.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch updates the PLB/PCI divider when running at
400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Add CFG_NAND_QUIET_TEST option to disable error message when
no NAND chip is installed on PMC440 boards.
Disable a couple of config defines that are only used for NAND_U_BOOT.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch updates the fw_printenv/fw_setenv userspace tool to include
the correct MTD header in order to compile against current kernel
headers. Backward compatibility is preserved by introducing an option
MTD_VERSION which can be set to "old" for compilation using the old MTD
headers. Along with this a number of warnings are fixed.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This is partial patch from the DTC/libfdt
commit 67b6b33b9b413a450a72135b5dc59c0a1e33e647
Author: David Gibson <david@gibson.dropbear.id.au>
Date: Wed Nov 21 11:56:14 2007 +1100
The patch also fixes one genuine bug caught by valgrind -
_packblocks() in fdt_rw.c was using memcpy() where it should have been
using memmove().
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This patch adds more documenting comments to libfdt.h. Specifically,
these document the read/write functions (not including fdt_open_into()
and fdt_pack(), for now).
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This patch adds some more documenting comments to libfdt.h.
Specifically this documents all the write-in-place functions.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Implement a suggestion by Scott Wood to make the /chosen handling fine
grained. Don't overwrite pre-existing properties on a per-property basis,
so if /chosen exists but a necessary /chosen/property doesn't, it gets
created. If a /chosen property exists, it is NOT overwritten unless the
"force" flag is true.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Add a note that "fdt copy" makes the new address active.
Remove most of the extra hints at the end of the fdt help.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Fix a bug found and documented by Bartlomiej Sieka where the optional
value on "fdt set <path> <prop> [<val>]" wasn't optional.
=> fdt mknode / testnode
=> fdt print /testnode
testnode {
};
=> fdt set /testnode testprop
=> fdt print /testnode
testnode {
testprop;
};
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
fdt_find_and_setprop() is used by several 4xx boards and it's
missing in the appropriate header. This patch eliminates a
warning when building U-Boot for such boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Acked-by: Stefan Roese <sr@denx.de>
convert to using simpler mpc85xx style fdt update code; streamline by
eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm
the old school FLAT_TREE code from 83xx (since the sbc8349 was just
converted over to using libfdt).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Make libfdt the default for the WRS SBC8349 board.
Parallel of commit 35cc4e4823
done for the other 83xx based boards. Also fix a typo in CONFIG_PCI.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
This adds libfdt support code for the Wind River sbc8349 board.
Parallel of commit 3fde9e8b22 for
the other Freescale 83xx boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
ECC code is now shared for all 83xx boards, so remove board specific one.
See commit daab8c67d2 for reference.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The MPC8360E MDS config defined:
CONFIG_OF_HAS_BD_T
CONFIG_OF_HAS_UBOOT_ENV
Which we don't use or ever needed. This seems like copy-paste feature creep.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
mpc8360emds.c: In function ‘ft_board_setup’:
mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type
mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for 837x.
This change guarantees that the environment will be located on the
first flash sector after the U-Boot image.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type
properties in the device tree so the PHY gets configured for internal delay on
RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MPC8315E SoC including e300c3 core and new IP blocks,
such as TDM, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
The MPC837x SoC including e300c4 core and new IP blocks,
such as SDHC, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Despite user manual, BCSR9.7 is negated (high) on HRST, so
UART2 is disabled. Fix that and configure QE pins properly.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the
currently-defined 83xx boards. This change guarantees that the environment
will be located on the first flash sector after the U-Boot image.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Now that there are no board-specific versions of
"denali_core_search_data_eye()", the weak binding on the common version
can be removed.
Signed-off-by: Larry Johnson <lrj@acm.org>
On Katmai the complete auto-calibration somehow doesn't seem to
produce the best results, meaning optimal values for RQFD/RFFD.
This was discovered by GDA using a high bandwidth scope,
analyzing the DDR2 signals. GDA provided a fixed value for RQFD,
so now on Katmai "only" RFFD is auto-calibrated.
This patch also adds RDCC calibration as mentioned on page 7 of
the AMCC PowerPC440SP/SPe DDR2 application note:
"DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
Signed-off-by: Stefan Roese <sr@denx.de>
Note: this patch changes the configuration of some GPIO registers:
Register Old Value New Value
--------------- ---------- ----------
DCR GPIO0_TCR 0x0000000F 0x0000F0CF
DCR GPIO0_TSRH 0x55005000 0x00000000
DCR GPIO1_TCR 0xC2000000 0xE2000000
DCR GPIO1_TSRL 0x0C000000 0x00200000
DCR GPIO1_ISR2L 0x00050000 0x00110000
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch makes two additions to GPIO support:
First, it adds function gpio_read_in_bit() to read the a bit from the
GPIO Input Register (GPIOx_IR) in the same way that function
gpio_read_out_bit() reads a bit from the GPIO Output Register
(GPIOx_OR).
Second, it modifies function gpio_set_chip_configuration() to provide
an additional option for configuring the GPIO from the
"CFG_4xx_GPIO_TABLE".
According to the 440EPx User's Manual, when an alternate output is used,
the three-state control is configured in one of two ways, depending on
the particular output. The first option is to select the corresponding
alternate three-state control in the GPIOx_TRSH/L registers. The second
option is to select the GPIO Three-State Control Register (GPIOx_TCR) in
the GPIOx_TRSH/L registers, and set the corresponding bit in the
GPIOx_TCR register to enable the output. For example, the Manual
specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use
the alternate three-state control (first option), and specifies
configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output
enabled in the GPIOx_TCR register (second option).
Currently, gpio_set_chip_configuration() configures all alternate signal
outputs to use the first option. This patch allow the second option to
be selected by setting the "out_val" element in the table entry to
"GPIO_OUT_1". The first option is used when the "out_val" element is
set to "GPIO_OUT_0". Because "out_val" is not currently used when an
alternate signal is selected, and because all current GPIO tables set
"out_val" to "GPIO_OUT_0" for all alternate signals, this patch should
not change any existing configurations.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
When CONFIG_NET_DO_NOT_TRY_ANOTHER is defined U-Boot's
networking stack does not automatically switch to
another interface. This patch does not touch the default
behavior.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This patch modifies the return code handling in the eth_init()
function, to be compatible with the handling of the return codes in
the other network stack files. It now returns a 0 on Success and -1 on
error.
Signed-off-by: Upakul Barkakaty <upakul.barkakaty@conexant.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Assigning the output of simple_strtoul(CB:A9:87:65:43:21) to `char', we are
warned as below:
U-Boot 1.2.0 (Aug 30 2007 - 08:27:37)
DRAM: 256 MB
Flash: 32 MB
In: serial
Out: serial
Err: serial
Net: NEC-Candy
Warning: NEC-Candy MAC addresses don't match:
Address in SROM is 00:00:4C:80:92:A2
Address in environment is FFFFFFCB:FFFFFFA9:FFFFFF87:65:43:21
This patch changes env_enetaddr type from `char' to `unsigned char'.
Cc: Masaki Ishikawa <ishikawa-masaki@cnt.mxe.nes.nec.co.jp>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
The purpose of this routine is receiving a single network frame, outside of
U-Boot's NetLoop(). Exporting it to standalone programs that run on top of
U-Boot will let them utilise networking facilities. For sending a raw frame
the already existing eth_send() can be used.
The direct consumer of this routine is the newly introduced API layer for
external applications (enabled with CONFIG_API).
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Include config.h earlier in the set of #includes
so as to avoid a incidental and duplicate definition
of CFG_CACHELINE_SIZE.
Signed-off-by: Jon Loeliger
Assumes the presence of the aliases node in the DTS to
locate the ethernet, pci and serial nodes for fixups.
Use consistent fdtaddr and fdtfile in environment variables.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: Stefan Roese <sr@denx.de>
The bash builtin versions of the "test" (resp. "[") command allow
using "==" for string comparisons, but POSIX compatible implemen-
tations (like /usr/bin/test) insist on using "=" only. On such systems
you will see:
$ /usr/bin/test a == a && echo OK
/usr/bin/test: ==: binary operator expected
This patch fixes Makefiles and scripts to use POSIX style.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This bug was detected on the LWMON5 target which has 2 Intel 16bit wide
flash chips connected to a 32bit wide port.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch brings the PMC440 board configuration file.
Finally it enables the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch adds the first files for the new esd PMC440 boards.
The next two patches will complete the PMC440 board support.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This patch fixes esd's LCD dectection code to work correctly with
newer gcc versions.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
In an attmemt to clean up the 4xx start.S file, I removed the enabling
of the internal 405EP PCI arbiter. This is needed for multiple other
405EP platforms, like most of the esd 405EP. Now the internal PCI
arbiter is enabled again per default as it has been before.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This board never left prototyping state and it
became a millstone round my neck. So remove it.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
These patches add support for the PPC440EPx-based "Korat" board to
U-Boot. They are based primarily on support for the Sequoia board.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch adds SPD DDR2 support for the 440EPx ("Denali") SDRAM
controller. It should also work on the 440GRx. It is based on the DDR2
SPD code for the 440EP/440EPx, but makes no provision for DDR1 support.
This code has been tested on prototype Korat boards with three Kingston
DIMMS: 512 MiB ECC (one rank), 512 MiB non-ECC (one rank) and 1 GiB ECC
(two ranks). The Korat board has a single DIMM socket, but support has
been provided (though not tested) for boards with two DIMM sockets.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch creates a non-board-specific file for performing the SDRAM
data-eye search. It also adds ECC error checking to the test of valid
data on readback when ECC is enabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch adds the Denali SDRAM controller definitions to "ppc440.h".
It also fixes two typos in the definitions, so the board-specific
"sdram.h" files containing these definitions are also fixed to avoid
compiler warnings.
Signed-off-by: Larry Johnson <lrj@acm.org>
This patch adds a new switch: "CONFIG_PHY_DYNAMIC_ANEG". When this symbol
is defined, the PHY will advertise it's capabilities for autonegotiation
based on the capabilities shown in the PHY's status registers, including
1000BASE-X. When "CONFIG_PHY_DYNAMIC_ANEG" is not defined, the PHY will
advertise hard-coded capabilities, as before.
Signed-off-by: Larry Johnson <lrj@acm.org>
This driver is based on the driver for the M41T11. In the intended
application, the RTC will be powered by a large capacitor, rather than a
battery. The driver therefore checks to see whether the RTC has lost
power. The chip's OUT bit is normally reset from its power-up state. If
the OUT bit is read as set, or if the date and time are not valid, then the
RTC is assumed to have lost power, and its date and time are reset to
1900-01-01 00:00:00.
Support for adjusting the speed of the clock to improve accuracy is
provided through an environment variable.
Signed-off-by: Larry Johnson <lrj@acm.org>
On Sequoia & LWMON5 the virtual address of the POST cache test is now
moved to a bigger address. This enables usage of more memory on those
boards.
Signed-off-by: Stefan Roese <sr@denx.de>
As repoted by Larry Johnson, running "diag run cache" caused a crash
in U-Boot. This problem was introduced by a patch that removed the
TLB entry for the cache test after the test has completed. Since this
TLB was only setup once, a 2nd attempt to run this cache test
failed with a crash. Now this TLB entry is created every time the
routine is called.
Signed-off-by: Stefan Roese <sr@denx.de>
Now the cpu node setup ("timebase-frequency" and "clock-frequency") is
without using the absolute path to the cpu node. This makes it possible
to use this U-Boot version with both versions of cpu-node naming
"cpu@0" and the former "PowerPC,440EPx@0".
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx clear_bss() fails if BSS segment size is not
divisible by 4 without remainder. This patch provides
fix for this problem.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
When using dhcp/bootp the "netmask" environment variable is not
set because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is
desireable, so the following patch adds this this option to the board
config.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch allows the ECC POST to be used for different boards with the
PPC440 Denali SDRAM controller. Modifications include skipping the test
if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization
to prevent timing errors.
Signed-off-by: Larry Johnson <lrj@acm.org>
flush + invalidate_dcache_range() expect the start and stop+1 address.
So the stop address is the first address behind (!) the range.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
By using aliases in the dts file, the ethernet node fixup is
much easier with the recently added functions.
Please note that the dts file needs the aliases for this to work.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch update the 4xx fdt support. It enabled fdt booting
on the AMCC Kilauea and Sequoia for now. More can follow later
quite easily.
Signed-off-by: Stefan Roese <sr@denx.de>
The check for an sufficiently erased destination was missing in the
buffered write function of the cfi flash driver (when
CFG_FLASH_USE_BUFFER_WRITE is defined). This patch adds this check to that
writing to such a region will fail with the currect error message.
Signed-off-by: Stefan Roese <sr@denx.de>
CAS-Latency=2, Write Recovery Time tWR=2
The max. supported bus frequency is 66 MHz. Therefore, changed
threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
On the TQM885D the measurement of cpuclk with the PIT reference
timer ist not necessary. Since all module variants use the same
external 10 MHz oscillator, the cpuclk only depends on the PLL
configuration - which is readable by software.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
At 133 MHz the current SDRAM refresh rate is too fast
(measured 4 * 1.17 us).
CFG_MAMR_PTA changes from 39 to 128. This result
in a refresh rate of 4 * 7.8 us at the default clock
66 MHz. At 133 MHz the value will be then 4 * 3.8 us.
This is a compromise until a new method is found to
adjust the refresh rate.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Run fixups based on the JEDEC manufacturer ID independent of the
command set ID.
This changes current behaviour: Previously, geometry reversal for AMD
chips were done based on the command set ID, while they are now done
based on the JEDEC manufacturer and device ID.
Also add fixup for top-boot Atmel chips. A fixup is needed for
AT49BV6416(T) too, but since u-boot currently only reads the low byte
of the device ID, there's no way to tell it apart from AT49BV642D,
which should not have this fixup. Since AT49BV642D support is
necessary to get ATNGW100 board support into mainline, I've commented
out the fixup for now.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Move things like reading JEDEC IDs and fixing up geometry reversal
into separate functions. The geometry reversal fixup is now performed
by altering the qry structure directly, which makes the sector init
code slightly cleaner.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Read out the whole CFI Standard Query structure after successful cfi
identification. This allows subsequent code to access this information
directly without having to go through flash_read_uchar() and friends.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
disable_interrupts() should return nonzero if interrupts were
_enabled_ before, not disabled.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The timer code depends on the timer interrupt to keep track of the
upper 32 bits of the cycle counter. This obviously doesn't work when
interrupts are disabled the whole time.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
As reported by Gerhard Berghofer:
in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18
instead of PB18 and PB19.
which is obviously correct. There's currently no code that uses
USART3, but custom boards may run into problems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add all the ATSTK1000 daughterboards to MAINTAINERS along with their
"mother". Also update the entry for ATSTK1000 to be not only about the
AP7000 CPU; it's intended to handle all CPUs in the AT32AP family.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
ATSTK1004 is a daughterboard for ATSTK1000 with the AT32AP7002 CPU,
which is a derivative of AT32AP7000.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
ATSTK1003 is a daughterboard for ATSTK1000 with the AT32AP7001 CPU,
which is a derivative of AT32AP7000.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add a chip-features file providing definitions of the form
AT32AP700x_CHIP_HAS_<peripheral>
to indicate the availability of the given peripheral on the currently
selected chip.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The SoC-specific code for all the AT32AP700x CPUs is practically
identical; the only difference is that some chips have less features
than others. By doing this rename, we can add support for the AP7000
derivatives simply by making some features conditional.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch update the 4xx fdt support. It enabled fdt booting
on the AMCC Kilauea and Sequoia for now. More can follow later
quite easily.
Signed-off-by: Stefan Roese <sr@denx.de>
Use map_physmem() and unmap_physmem() to convert from physical to
virtual addresses. This gives the arch a chance to provide an uncached
mapping for flash accesses.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
map_physmem() returns a virtual address which can be used to access a
given physical address without involving the cache. unmap_physmem()
should be called when the virtual address returned by map_physmem() is
no longer needed.
This patch adds a stub implementation which simply returns the
physical address cast to a uchar * for all architectures except AVR32,
which converts the physical address to an uncached virtual mapping.
unmap_physmem() is a no-op on all architectures, but if any
architecture needs to do such mappings through the TLB, this is the
hook where those TLB entries can be invalidated.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Introduce flash_read{8,16,32,64) and flash_write{8,16,32,64} and use
them to access the flash memory. This makes it clearer when the flash
is actually being accessed; merely dereferencing a volatile pointer
looks just like any other kind of access.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This adds implementations of __raw_read[bwl] and __raw_write[bwl] to
m68k, ppc, nios and nios2. The m68k and ppc implementations were taken
from Linux.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Reorder the functions in cfi_flash.c so that each function only uses
functions that have been defined before it. This allows the static
prototype declarations near the top to be eliminated and might allow
gcc to do a better job inlining functions.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch tries to keep all lines in the cfi_flash driver below 80
columns. There are a few lines left which don't fit this requirement
because I couldn't find any trivial way to break them (i.e. it would
take some restructuring, which I intend to do in a later patch.)
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
On the MPC85xx boards that have PCIe enable the PCIe errata fix.
(MPC8544DS, MPC8548CDS, MPC8568MDS).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The MPC8572 introduces the concept of an asynchronous DDR clock with
regards to the platform clock.
Introduce get_ddr_freq() to report the DDR freq regardless of sync/async
mode.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones. Also, added some missing defines for
PCIE targets.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8568 MDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC85xx CDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8540 ADS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8560 ADS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers
instead of getting it via &immap->im_cpm.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Removed HAS_ETH2/HAS_ETH3 - MPC8544 only has TSEC1/2
* Removed some misc environment setup
* Moved to using fdtfile & fdtaddr as fdt env var names
* Enabled CONFIG_CMDLINE_EDITING
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Updated the MPC8544DS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch selects the USB data pins in the 405EX GPIO and MFC (multi
function control) registers. This is done for the AMCC Kilauea and
Makalu eval boards.
Signed-off-by: Stefan Roese <sr@denx.de>
The following patch adds support for non-CFI flash ROMS, by hooking into the
CFI flash code and using most of its code, as recently discussed here in the
thread "Mixing CFI and non-CFI flashs".
Signed-off-by: Michael Schwingen <michael@schwingen.org>
Signed-off-by: Stefan Roese <sr@denx.de>
We use a combination of the serialN alias and CONFIG_CONS_INDEX to
determine which serial alias we should set linux,stdout-path to.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The composition of the directory in the drivers/ changed.
I moved SuperH serial driver and marubun PCMCIA driver.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This patch enables the hardware-fix for the PCI/DMA errata's 19+22 by
setting the FIXD bit in the SDR0_MFR register. Here a description of the
symptoms:
Problem Description
------------------------------
If a DMA is performed between memory and PCI with the DMA 1 Controller
using prefetch, and as a result uses a special purpose buffer selected by
the PCIXn Bridge Options 1 Register (PCIXn_BRDGOPT1[RBP7] - bits 31-29),
the first part of the transfer sequence is performed twice. The
PPC440SPe PCI Controller requests more data than was needed such that in
the case of enforce memory protection, a host CPU exception can occur.
No data is corrupted, because data transfer is stopped in the PCI
Controller. Prefetch enable is specified by setting DMA Configuration
Register (I2O0_DMAx_CFG[DXEPD] - bit 31) to 0.
Behavior that may be observed in a running system
---------------------------------------------------------------------------
1. DMA performance is decreased because of the double access on the PCI bus
interface.
2. If an illegal access to some address on the PCI bus is detected at the
system level, a machine check or similar system error may occur.
Workarounds Available
----------------------------------
1. Do not program prefetch. Note that a prefetch command cannot be programmed
without selecting a special purpose buffer.
2. To avoid crossing a physical boundary of the PCI slave device, add 512
bytes of address to the PCI address range.
This patch was originally provided by Pravin M. Bathija <pbathija@amcc.com>
from AMCC and slighly changed.
Signed-off-by: Pravin M. Bathija <pbathija@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This manual PCIe reset triggering solves the problem seen with the
Intel EPRO/1000 card, which was not detected (link not established)
upon power-up reset.
Signed-off-by: Stefan Roese <sr@denx.de>
Marubun pcmcia is a chip for PCMCIA used with SuperH.
Of course, this can be used even by other architectures.
When use this driver, came to be able to use CompactFlash
and Ethernet.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
After an error in the AMCC 405EX users manual now correctly configure
IRQ2 (Kilauea)/IRQ0 (Makalu) as alternate 2 signal for external IRQ
usage.
Signed-off-by: Stefan Roese <sr@denx.de>
Added the following fdt fixup helpers:
* do_fixup_by_prop{_u32} - Find matching nodes by property name/value
* do_fixup_by_compat{_u32} - Find matching nodes by compat
The _u32 variants work the same only the property they are setting
is know to be a 32-bit integer instead of a byte buffer.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
cmd_fdt.c: In function fdt_print:
cmd_fdt.c:586: warning: assignment discards qualifiers from pointer target type
cmd_fdt.c:613: warning: assignment discards qualifiers from pointer target type
cmd_fdt.c:635: warning: assignment discards qualifiers from pointer target type
cmd_fdt.c:636: warning: assignment discards qualifiers from pointer target type
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Update libfdt to commit 8eaf5e358366017aa2e846c5038d1aa19958314e from
the device tree compiler (dtc) project.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved the generic fixup handling code out of cpu/mpc5xxx and cpu/mpc8260
into common/fdt_support.c and renamed:
do_fixup() -> do_fixup_by_path()
do_fixup_u32() -> do_fixup_by_path_u32()
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Removed:
fdt_node_is_compatible
fdt_find_node_by_type
fdt_find_compatible_node
To ease merge of newer libfdt as we aren't using them anywhere at this time.
Also moved fdt_find_and_setprop out of libfdt into fdt_support.c for the same
reason.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Fix library problems caused by conditional compilation. Using
autoconf.mk to decide which files to compile has caused a problem when
changing configuration from one board to another without clearing out
the library (*.a) files.
It used to be that the linker was always passed the same list of .o
files when building the .a files. However, that is not longer true
with conditional compilation. Now, a different board config will have
a different file list passed to the linker. The problem occurs when
a library has already been built and the board config is changed.
Since the linker will update instead of replace a preexisting library,
then if the file list changes to remove some object files the old
objects will still exist in the library.
The solution is to remove all old library files when autoconf.mk is
made.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Use cpp and sed to postprocess config.h and import the defined values
into include/autoconf.mk. autoconf.mk is then included by config.mk to
give 'make' access to the board configuration.
Doing this enables conditional compilation at the Makefile level instead
of by wrapping every .c file with #ifdef/#endif wrappers.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
These two structures are still needed during the
initialization and setup of the DIU hardware.
So move them to the fsl_diu_fb.h file for now.
Official "blah".
Noticed-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
lowlevel_init.S: Assembler messages:
lowlevel_init.S:413: Warning: Pretending global symbol used as branch target is local.
Looking at codes, the `memtest' and `clearmem' are intentional mixed
use of `global symbols' and `label' for debugging purpose. To make it
build, just disable global-symbols-use for now. As a result `memtest'
still remains as unused, but leave it be...
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
gth2.c: In function 'misc_init_r':
gth2.c:434: warning: pointer targets in passing argument 2 of 'setenv' differ in signedness
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
gth2.c: In function 'misc_init_r':
gth2.c:434: warning: pointer targets in passing argument 2 of 'setenv' differ in signedness
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:139: warning: 'return' with no value, in function returning non-void
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
au1x00_eth.c: In function 'au1x00_enet_initialize':
au1x00_eth.c:246: error: 'au1x00_miiphy_read' undeclared (first use in this function)
au1x00_eth.c:246: error: (Each undeclared identifier is reported only once
au1x00_eth.c:246: error: for each function it appears in.)
au1x00_eth.c:246: error: 'au1x00_miiphy_write' undeclared (first use in this function)
au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:298: warning: 'return' with no value, in function returning non-void
make[1]: *** [au1x00_eth.o] Error 1
Fixed by moving these two functions forward.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Ugh. I *hate* to back this change out, but these compiler flags don't
work for relocation on all versions of GCC. I've not been able to
reproduce the environment in my setup (and hence, not been able to
find a combination that *does* work), so I've got no choice but to go
back to the old gcc flags and linker script.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch has been sent on:
- 29 Sep 2007
Although mips_io_port_base is currently a part of IDE command, it is quite
fundamental for MIPS I/O port access such as in[bwl] and out[bwl]. So move
it to MIPS general part, and introduce `set_io_port_base()' from Linux.
This patch is triggered by multiple definition of `mips_io_port_base' build
error on gth2 (and tb0229 also needs this fix.)
board/gth2/libgth2.a(gth2.o): In function `log_serial_char':
/home/skuribay/devel/u-boot.git/board/gth2/gth2.c:47: multiple definition of `mips_io_port_base'
common/libcommon.a(cmd_ide.o):/home/skuribay/devel/u-boot.git/common/cmd_ide.c:712: first defined here
make: *** [u-boot] Error 1
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Spartan2/3 FPGAs. The old code used "< 0" on a "char" type to test if
the most significant bit was set, which did not work on any
architecture where "char" defaulted to be an unsigned type.
Based on a patch by Angelos Manousaridis <amanous@inaccessnetworks.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Basically, refactor the CFG_PIXIS_VBOOT_MASK values
into the separate board config files.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Till now the UTL registers on 405EX were not initialized but left with
their default values. This patch new initializes some of the UTL
registers on 405EX.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds changes needed for Makalu rev 1.1:
- Enable 2nd DDR2 bank resulting in 256MByte of SDRAM
- Enable 2nd ethernet port EMAC1
- Use generic GPIO configuration framework (CFG_4xx_GPIO_TABLE)
- Reset PCIe ports via GPIO upon bootup
Signed-off-by: Stefan Roese <sr@denx.de>
This change is in preparation for condtitionial compile support in the
build system. By spliting them all into seperate lines now, subsequent
patches that change 'COBJS-y += ' into 'COBJS-$(CONFIG_<blah>) += ' will
be less invasive and easier to review
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE
- Cleanup of the 4xx GPIO functions
- Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for three new DDR chips that may be present on a NG
INKA4x0 hardware: HYB25D512160BF-5, K4H511638C-7CB3, T46V32M16BN-6IT.
Cleanup board/inka4x0/mt48lc16m16a2-75.h file.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This patch makes the sequoia board use the generic usb-ohci driver
instead of cpu/ppc4xx/usb_ohci.c.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch disables the 44x d-cache on 'usb start' and
reenables it on 'usb stop'. This should be seen as a
temporary fix until the generic usb-ohci driver can
life with d-cache enabled.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some redundant code and decrements the end
address of cache flush and invalidate by 1.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Most 4xx PPC capable of using an I2C bootrom for bootstrap setting
already print a line with the information which I2C bootrom is
used for bootstrap configuration. So we don't need this extra line
with "I2C boot EEPROM en-/dis-abled".
This patch also has a little code cleanup integrated.
Signed-off-by: Stefan Roese <sr@denx.de>
Add cfb console support to FSL 8610 DIU driver.
Inspect board version from PIXIS to obtain correct pixel format.
Use #define CONFIG_VIDEO in config file to enable fb console.
To switch monitor, set monitor variable to
0 - DVI, 1 - Single link LVDS, 2 - Double link LVDS
followed by "diufb init".
Preserve logo bitmap at the top of the fb console.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
1280x1024 and 1024x768 @ 32 bpp are supported now.
DVI, Single-link LVDS, Double-link LVDS are all supported.
Environmental variable "monitor" is used to specify monitor port.
A new command "diufb" is introduced to reinitialize monitor
and display a BMP file in the memory. So far, 1-bit, 4-bit,
8-bit and 24-bit BMP formats are supported.
diufb init
- initialize the diu driver
Enable the port specified in the environmental variable "monitor"
diufb addr
- display bmp file in memory.
The bmp image should be no bigger than the resolution, 1280x1024
for DVI and double-link LVDS, 1024x768 for single-link LVDS.
Note, this driver allocate memory but doesn't free it after use
It is written on purpose -- to avoid a failure of reallocation
due to memory fragement.
ECC of DDR is disabled for DIU performance. L2 data cache is also disabled.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon loeliger <jdl@freescale.com>
This Freescale logo is a 340 x 128 x 4bpp BMP file
that can be displayed by the DIU Framebuffer driver.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The address in the BAT register is aligned with the BAT size.
The original definition actually did not define BAT for PCIE2 IO.
This patch fix this.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Basically, refactor the CFG_PIXIS_VBOOT_MASK values
into the separate board config files.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch implements general ULi 526x Ethernet driver.
Until now, it is the only native Ethernet port on
MPC8610HPCD board, but it could be used on other boards
with ULi 526x Ethernet port as well.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
This patch adds support for 1000BASE-X to functions "miiphy_speed ()" and
"miiphy_duplex()". It also adds function "miiphy_is_1000base_x ()", which
returns non-zero iff the PHY registers are configured for 1000BASE-X. The
"mii info" command is modified to distinguish between 1000BASE-T and -X.
Signed-off-by: Larry Johnson <lrj@acm.org>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
The scan code of the key 'z' is 0x1d, which should be handled.
The change has be tested on NOVATEK USB keyboard and ULI PCI OHCI
controller.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
The configuration file has already enabled USB, but it
missed definition of CFG_OHCI_SWAP_REG_ACCESS, the USB
on MPC8641HPCN can not work because of the wrong USB
register endian.
And add the USB command to U-Boot commands list.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
usb_cpu_init() configures GPS USB pins, clocks, etc. and
is required for proper operation of kernel USB subsystem.
This setup was previously done in the kernel by the fixup
code which is being removed, thus low level init must be
done by U-boot now.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Since December 2003 the timer_interrupt_cpu() function in
cpu/mpc824x/interrupts.c contains what seems to be a superfluous
parameter. Remove it.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
To get the IDS8247 board working following are done:
- FCC2 is deactivated
- FCC1 is activated
- I2C is activated
- CFI driver is activated
- Adapted for use with LIBFDT
Signed-off-by: Sergej Stepanov <Sergej.Stepanov@ids.de>
--
This patch adds NAND booting support for the AMCC 405EX(r) eval boards.
Again, only one image supports both targets.
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang is right: It's not a good idea to set up default initial
ethernet addresses for a board, even though they belong to the local
range.
This will change the failure mode from "IT manager screams at you for
using duplicate ethernet addresses" to a nice error message explaining
that the ethernet address hasn't been set properly.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This is a multi-part message in MIME format.
commit e6e505eae94ed721e123e177489291fc4544b7b8
Author: Justin Flammia <jflammia@savantav.com>
Date: Mon Oct 29 17:19:03 2007 -0400
Found a bug in the way the DHCP Request packet is built, where the IP address
that is offered by the server is bound to prematurely. This patch is a fix of
that bug where the IP address offered by the DHCP server is not used until
after the DHCP ACK from the server is received.
Signed-off-by: Justin Flammia <jflammia@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Since the cache handling functions were moved from start.S into cache.S
the acadia NAND booting Makfile needs to be adapted accordingly.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the CONFIG_4xx_DCACHE options to some SDRAM init files
and to the Sequoia TLB init code. Now the cache can be enabled on 44x
boards by defining CONFIG_4xx_DCACHE in the board config file. This
option will disappear, when more boards use is successfully and no
more known problems exist.
This is tested successfully on Sequoia and Katmai. The only problem that
needs to be fixed is, that USB is not working on Sequoia right now, since
it will need some cache handling code too, similar to the 4xx EMAC driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Now with caches enabled (i- and d-cache) on 44x, we need a chance to
disable the cache for the CPU POST tests, since these tests consist
of self modifying code. This is done via the new change_tlb() function.
Signed-off-by: Stefan Roese <sr@denx.de>
I lately noticed, that newer 4xx board with GBit support sometimes don't
finish link autonegotiation in 4 seconds. Changing this timeout to 5
seconds seems fine here.
Signed-off-by: Stefan Roese <sr@denx.de>
The POST ethernet test needed to be changed to dynamically determine
the count of ethernet devices. This code is cloned from the 4xx
ethernet driver.
Signed-off-by: Stefan Roese <sr@denx.de>
We now use a value in the gd (global data) structure for the UART input
frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely
in get_sys_info().
Signed-off-by: Stefan Roese <sr@denx.de>
The Haleakala is nearly identical with the Kilauea eval board. The only
difference is that the 405EXr only supports one EMAC and one PCIe
interface. This patch adds support for the Haleakala board by using
the identical image for Kilauea and Haleakala. The distinction is done
by comparing the PVR.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch also adds a note to the fixed DDR setup for Bamboo NAND booting:
Note:
As found out by Eugene O'Brien <eugene.obrien@advantechamt.com>, the fixed
DDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM
modules are still plugged in. So it is recommended to remove the DIMM
modules while using the NAND booting code with the fixed SDRAM setup!
Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Change 4xx_uart.c:
- Use in_8/out_8 macros instead of in8/out8
- No need for UART_BASE marco anymore, now really handled via function
parameter
- serial_init_common() introduced
- Further coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Change all linker scripts to reference the changed driver name 4xx_uart.o.
Note: In most cased all these explicit referencing of these object files
in the linker scripts is not neccessary. Only for manually embedded
environment into the U-Boot image, which is not done is most cases.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch starts the rework of the PPC4xx serial driver. First we split
the file into two seperate files, one 4xx_uart.c with the 405/440 UART
handling code and the other one iop480_uart.c with the UART code for the
PLX-Tech IOP480 PPC (PPC403 based).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the Xicor/Intersil X1205 RTC used on the
AMCC Makalu eval board. This driver is basically cloned from the Linux
driver version (2.6.23).
This patch also introduces the Linux bcd.h header for the BCD2BIN/
BIN2BCD conversions. In the future some of the other U-Boot RTC driver
should be converted to also use this header instead of implementing
their own local copy of these functions/macros.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch moves some common 4xx macros and the PPC405_SYS_INFO/
PPC440_SYS_INFO structure into the common ppc4xx.h header.
Lot's of other macros are good candidates to be consolidated this way
in the future.
Signed-off-by: Stefan Roese <sr@denx.de>
The size was initilized wrong. Instead of 256MB, the DDR2 controller
was setup to 512MB. Now the correct values is used.
This patch also does a little cleanup and adds a comment here.
Signed-off-by: Stefan Roese <sr@denx.de>
CONFIG_BOOKE must be defined for PPC440 processors so that the proper SPR
number is used to access system registers.
Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
On Yucca & Katmai, the inbound memory map pointed to 0x4.0000.0000, which
is the internal SRAM. Since I now ported and tested this endpoint mode
on Kilauea successfully to map to 0 (SDRAM), I also changed this for
Katmai.
Yucca will stay at internal SRAM for now. Not sure if somebody relies on
this setup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds endpoint support for the AMCC Kilauea eval board. It can
be tested by connecting a reworked PCIe cable (only 1x lane singles
connected) to another root-complex.
In this test setup, a 64MB inbound window is configured at BAR0 which maps
to 0 on the PLB side. So accessing this BAR0 from the root-complex will
access the first 64MB of the SDRAM on the PPC side.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for dynamic configuration of PCIe ports for the
AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe
boards Yucca & Katmai and the 405EX board Kilauea.
This dynamic configuration is done via the "pcie_mode" environement
variable. This variable can be set to "EP" or "RP" for endpoint or
rootpoint mode. Multiple values can be joined via the ":" delimiter.
Here an example:
pcie_mode=RP:EP:EP
This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2
as endpoint.
Per default Yucca will be configured as:
pcie_mode=RP:EP:EP
Per default Katmai will be configured as:
pcie_mode=RP:RP:REP
Per default Kilauea will be configured as:
pcie_mode=RP:RP
Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the fdt support on the AMCC Kilauea eval board.
Additionally now EBC ranges fdt fixup is included to support NOR
FLASH mapping via the Linux physmap_of driver.
This Kilauea port now support booting arch/ppc and arch/powerpc
Linux kernels. The default environment "net_nfs" is for arch/ppc
and "net_nfs_fdt" is for arch/powerpc. In the long run, arch/ppc
support will be removed.
Signed-off-by: Stefan Roese <sr@denx.de>
128MB seems to be the smallest possible value for the memory size
for on PCIe port. With this change now the BAR's of the PCIe cards
are accessible under U-Boot.
One big note: This only works for PCIe port 0 & 1. For port 2 this
currently doesn't work, since the base address is now 0xc0000000
(0xb0000000 + 2 * 0x08000000), and this is already occupied by
CFG_PCIE0_CFGBASE. But solving this issue for port 2 would mean
to change the base addresses completely and this change would have
too much impact right now.
This patch adds debug output to the 4xx pcie driver too.
Signed-off-by: Stefan Roese <sr@denx.de>
These files were introduced with the IBM 405GP but are currently used on all
4xx PPC platforms. So the name doesn't match the content anymore. This patch
renames the files to 4xx_pci.c/h.
Signed-off-by: Stefan Roese <sr@denx.de>
(3) This patch introduces macros like SDRN_PESDR_DLPSET(port) to access
the SDR registers of the PCIe ports. This makes the overall design
clearer, since it removed a lot of switch statements which are not
needed anymore.
Also, the functions ppc4xx_init_pcie_rootport() and
ppc4xx_init_pcie_entport() are merged into a single function
ppc4xx_init_pcie_port(), since most of the code was duplicated.
This makes maintainance and porting to other 4xx platforms
easier.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.
(2) This patch renames the functions from 440spe_ to 4xx_ with a
little additional cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.
(1) This patch renames the files from 440spe_pcie to 4xx_pcie
Signed-off-by: Stefan Roese <sr@denx.de>
usb_cpu_init() configures GPS USB pins, clocks, etc. and
is required for proper operation of kernel USB subsystem.
This setup was previously done in the kernel by the fixup
code which is being removed, thus low level init must be
done by U-boot now.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
The scan code of the key 'z' is 0x1d, which should be handled.
The change has be tested on NOVATEK USB keyboard and ULI PCI OHCI
controller.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Some USB keys need to be switched off before loading the kernel
otherwise they can remain in an undefined status which prevents them
to be correctly recognized by the kernel.
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
This is a multi-part message in MIME format.
commit e6e505eae94ed721e123e177489291fc4544b7b8
Author: Justin Flammia <jflammia@savantav.com>
Date: Mon Oct 29 17:19:03 2007 -0400
Found a bug in the way the DHCP Request packet is built, where the IP address
that is offered by the server is bound to prematurely. This patch is a fix of
that bug where the IP address offered by the DHCP server is not used until
after the DHCP ACK from the server is received.
Signed-off-by: Justin Flammia <jflammia@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Some commands for the STK52xx base board try to access the SM501 grafic
controller. But the TQM5200S has no grafic controller (only the TQM5200
and the TQM5200B have). This patch deactivates the commands accessing
the SM501 for the TQM5200S.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Some commands for the STK52xx base board try to access the SM501 grafic
controller. But the TQM5200S has no grafic controller (only the TQM5200
and the TQM5200B have). This patch deactivates the commands accessing
the SM501 for the TQM5200S.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Patch 16e23c3f removed PCSRBAR allocation. But passing zero windows
to pciauto_setup_device has the side effect of not getting
COMMAND_MEMORY set.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
The pxa255_idp being an old unmaintained board showed several issues:
1. CONFIG_INIT_CRITICAL was still defined.
2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined.
3. Symbol flash_addr was undeclared.
4. The boards lowlevel_init function was still called memsetup.
5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000.
6. Using -march=armv5 instead of -march=armv5te resulted in lots of
'target CPU does not support interworking' warnings on recent compilers.
7. The PXA's serial driver redefined FFUART, BTUART and STUART used as
indexes rather than the register definitions from the pxa-regs header
file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to
avoid any ambiguities.
8. There were several redefinition warnings concerning ICMR, OSMR3,
OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file.
9. The board configuration file was rather outdated.
10. The part header file defined the vendor, product and revision arrays
as unsigned chars instead of just chars in the block_dev_desc_t
structure.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
New board has faster oscillator and a different Flash chip. This affects:
- CFG_MPC5XXX_CLKIN
- SDRAM timings
- Flash CS configuration (timings)
- Flash sector size, and thus MTD partition layout
- malloc() arena size (due to bigger Flash sectors)
- smaller memory test range (due to bigger malloc() arena)
This patch also enables more extensive memory testing via "mtest".
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Per AN3221 (MPC5200B SDRAM Initialization and Configuration), the SDelay
register must be written a value of 0x00000004 as the first step of the
SDRAM contorller configuration.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
PHYSADDR is for physical address, KSEG1ADDR is for uncached.
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use.
As a general principle, we should use _gp for $gp.
Thanks to linker script's help we fortunately have _gp which equals to
_GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not
be able to access to GOT entires, global variables and procedure entry
points. The right thing to do is to use _gp.
This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_'
which holds the offset from _gp. When updating GOT entries, we use this
offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_.
This patch is originally submitted by Vlad Lungu <vlad@comsys.ro>, then
I made some change to leave over num_got_entries.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Vlad Lungu <vlad@comsys.ro>
Ensure that __got_start points to top of the `.got', and __got_end points
to bottom as well, so that we never fail to count num_got_entries.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Fixed typo in ne2000.h, thinko re n2k_inb() usage, don't try
to do anything in eth_stop() if eth_init() was not called.
Simplified RX path in order to avoid timeouts on really really
fast NE2000 cards (read: qemu with internal tftp), NetLoop() is
clever enough to cope with 1 packet per eth_rx().
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Hello,
This patch ensures the soft reset of the board for the 85xx boards
by setting the MSR[DE] in the do_reset function.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
On the MPC85xx CDS we have two issues:
1. The device tree fixup code did not check to see if the property we are
trying to update is actually found. Its possible that it would update
random memory starting at 0.
2. Newer Linux kernel's have moved the location of the PCI nodes to be
sibilings of the soc node and not children. The explicit PATH to the PCI
node would not be found for these device trees. Add the ability to handle
both paths. In the future we shouldn't handle such fixups by explicit path.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured
console. Make it so we match that config what we tell Linux as the early
STDOUT console.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The mpc85xx start code uses some magic numbers that we actually
have #defines for in <config.h> so use those instead.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
As a direct correlation exists between DDR DIMM slots
and SPD EEPROM addresses used to configure them, use
the individually defined SPD_EEPROM_ADDRESS* values to
determine if a DDR DIMM slot should have its SPD
configuration read or not.
Effectively, this now allows for 1 or 2 DIMM slots
per memory controller.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Some USB keys need to be switched off before loading the kernel
otherwise they can remain in an undefined status which prevents them
to be correctly recognized by the kernel.
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
The I2C bootstrap values that can be setup via the "bootstrap" command,
were setup incorrect regarding the generation of the internal sync PCI
clock. The values for PLB clock == 133MHz were slighly incorrect and the
values for PLB clock == 166MHz were totally incorrect. This could
lead to a hangup upon booting while PCI configuration scan.
This patch fixes this issue and configures valid PCI divisor values
for the sync PCI clock, with respect to the provided external async
PCI frequency.
Here the values of the formula in the chapter 14.2 "PCI clocking"
from the 440EPx users manual:
AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz
33MHz async PCI frequency:
PLB = 133:
=> 32 <= 44.3 <= 65 (div = 3)
PLB = 166:
=> 32 <= 55.3 <= 65 (div = 3)
66MHz async PCI frequency:
PLB = 133:
=> 65 <= 66.5 <= 132 (div = 2)
PLB = 166:
=> 65 <= 83 <= 132 (div = 2)
Signed-off-by: Stefan Roese <sr@denx.de>
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.
This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.
Signed-off-by: Stefan Roese <sr@denx.de>
At 133 MHz the current SDRAM refresh rate is too fast
(measured 4 * 1.17 us).
CFG_MAMR_PTA changes from 39 to 97. This result
in a refresh rate of 4 * 7.8 us at the default clock
50 MHz. At 133 MHz the value will be then 4 * 2.9 us.
This is a compromise until a new method is found to
adjust the refresh rate.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
The ATSTK1000-specific flash driver intializes bi_flashstart,
bi_flashsize and bi_flashoffset, but other flash drivers, like the CFI
driver, don't.
Initialize these in board_init_r instead so that things will still be
set up correctly when we switch to the CFI driver.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
CFG_MEMTEST_START uses weird magic involving gd, which fails to
compile. Use hardcoded values instead (we actually know how much RAM
we have on board.)
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Original isp116x-hcd code prepared multiple PTDs for longer than 16
byte transfers for one endpoint. That is unnecessary because the
ISP116x is able to split long data from one PTD into multiple
transactions based on the buffer size of the endpoint. It also caused
serious problems if the endpoint NAKed some of the transactions. In
that case ISP116x wouldn't notice that the other PTDs were for the same
endpoint and would try the other PTDs possibly out of order. That would
break the whole transfer.
This patch makes isp116x_submit_job to use one PTD for one transfer.
Signed-off-by: Timo Ketola <timo.ketola@exertus.fi>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
CFG_FPGA_XILINX is a bit value used to test against the value in
CONFIG_FPGA. Testing for a value will always return TRUE. I don't
think that is the intention in this code.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
/bin/bash and /bin/dash (which /bin/sh is linked to on ubuntu) handle embedded
nulls in a string differently. For example, the following statement:
echo "this is a string\0" > afile
Will produce the following with /bin/bash:
"this is a string\0"
But with /bin/dash, will produce:
"this is a string
Bug fixed by moving the embedded null out of the makefile and into the
config header. Also renamed the macro to avoid usage colision with the same
macro used by other board ports.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The MCC200 board config file includes version.h for some customer-
specific setting, which causes warnings with "make depend"; build
version.h before depend.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Updates to atstk1002 U-Boot header file:
- Changed bootargs:
* Set the bootargs for at1002 to point to the SD-card partition instead
* ... of the boot flash.
* Removing the rootfstype since that argument are not needed.
Signed-off-by: Eirik Aanonsen <eaa@wprmedical.com>
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This patch applies some clarifying comments to how the different
clocks are setup according to atstk1002.h Some of the previous
comments where stating wrongful information.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
With recent toolchains, the environment sectors were no longer aligned to
sector boundaries. The reason was a combination of two bugs:
1) common/environment.c assumed that CONFIG_TQM8xxL would be defined
for all TQM8xxL and TQM8xxM boards. But "include/common.h", where
this gets defined, is not included here (and cannot be included
without causing lots of problems).
Added a new #define CFG_USE_PPCENV for all boards which really
want to put the environment is a ".ppcenv" section.
2) The linker scripts just include environment.o, silently assuming
that the objects in that file are really in the order in which
they are coded in the C file, i. e. "environment" first, then
"redundand_environment", and "env_size" last. However, current
toolchains (GCC-4.x) reorder the objects, causing the environment
data not to start on a flash sector boundary:
Instead of: we got:
40008000 T environment 40008000 T env_size
4000c000 T redundand_environment 40008004 T redundand_environment
40010000 T env_size 4000c004 T environment
Note: this patch fixes just the first part, and cures the alignment
problem by making sure that "env_size" gets placed correctly. However,
we still have a potential issue because primary and redundant
environment sectors are actually swapped, i. e. we have now:
40008000 T redundand_environment
4000c000 T environment
40010000 T env_size
This shall be fixed in the next version.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Fix usage of do_div() in nand erase|read|write process output.
The last patch to nand_util.c introduced do_div() instead of libgcc's
implementation. But do_div() returns the quotient in its first
macro parameter and not as result.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
This config option sets the default for the progress information
output behavior that can also be configured through the 'quiet'
environment variable.
The legacy NAND code does not print the current progress info
on the console. So this option is for backward compatibility for
units that are in the field and where setting the quiet variable
is not an option. With CFG_NAND_QUIET set to '1' the console
progress info is turned off. This can still be overwritten
through the environment variable.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
MPC834ITX*_config does not store config.tmp at the correct locatation,
causing MPC8349ITXGP to have the wrong TEXT_BASE.
Signed-off-by: Sam Sparks <SSparks@twacs.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
MPC834ITX*_config does not store config.tmp at the correct locatation,
causing MPC8349ITXGP to have the wrong TEXT_BASE.
Signed-off-by: Sam Sparks <SSparks@twacs.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
- update default definitions of kernel_addr and fdt_addr env. variables
- make arch/powerpc booting the default scenario
- update MTD partition layout to match the above
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Bamboo has a file sdram.c which needs special treatment when building in
separate directory. It has to be linked to build directory otherwise it is
not seen.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
- convert frame size settings to be derived from a single base
- set frame size to the recommended default value
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
- 'pciconfighost' is set by default in order to be able to scan bridges
behind the primary host/PCIe
- 'pciscandelay' env variable is recognized to allow for user-controlled
delay before the PCIe bus enumeration; some peripheral devices require a
significant delay before they can be scanned (e.g. LSI8408E); without the
delay they are not detected
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
- correct configuration space mapping
- correct bus numbering
- better access to config space
Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Convert using fixup mechanism to suppressing MCK for the duration of config
read/write transaction: while fixups work fine with the case of a precise
exception, we identified a major drawback with this approach when there's
an imprecise case. In this scenario there is the following race condition:
the fixup is (by design) set to catch the instruction following the one
actually causing the exception; if an interrupt (e.g. decrementer) happens
between those two instructions, the ISR code is executed before the fixup
handler the machine check is no longer protected by the fixup handler as it
appears as within the ISR code. In consequence the fixup approach is being
phased out and replaced with explicit suppressing of MCK during a PCIe
config read/write cycle.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
When frame larger than local RX buffer is received, it is split and handled
by two buffer descriptors. Prior to this patch the FEC driver discarded
contents of a buffer descriptor without the 'LAST' bit set, so the first
part of the frame was lost in case of larger frames. This fix allows to
safely combine the two pieces into the whole frame.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
This patch adds support for multiple serial ports to the PXA target.
FFUART, BTUART and STUART are supported.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stop using inline string functions on MIPS as other ARCHs do so,
since the optimized inline asm versions are not small.
This change is triggered by a following MIPS build error:
common/libcommon.a(exports.o)(.text+0xdc): In function `jumptable_init':
common/exports.c:32: undefined reference to `strcmp'
make: *** [u-boot] Error 1
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
This patches contains several bugfixes and cleanups in the latest upstream:
- Don't include linux/config.h
- Remove buggy inline version of memscan.
- Merge with Linux 2.6.11-rc3.
- Fix undefined reference to strcpy in binfmt_misc caused by gcc 3.4.
- Goodbye mips64. 31704 lines of code bite the dust.
- Replace extern inline with static inline.
- Fix return value of strncpy.
- Remove a bunch more "$1" clobbers.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Fix incorrect blob address calculation in do_bootm_linux() that prevents
booting the kernel from a multi-file image (kernel + initrd + blob).
Also, make minor updates to the U-Boot's output and to the coding style.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Boards with CONFIG_OF_LIBFDT enabled are not able to boot old-style
kernels using the board info structure (instead of passing a device tree)
This change allows the old style booting to be used if the fdt argument
was not passed to 'bootm'.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200
Tested on: lite5200b
Note: the fixup functions have not been moved to a common place. This
patch is targeted for immediate merging as in solves a build issue, but
the final name/location of the fixups is still subject to debate. I
propose to merge this now, and move the fixups in the next merge window
to be usable by all targets.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC. We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.
The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
set to non-zero, because it doesn't support MRM (memory-read-
multiple) correctly. We now added the possibility to configure
this register in the board config file, so that the default value
of 8 can be overridden.
Here the details of this patch:
o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
board-specific settings. As an example the sequoia board requires 0.
Idea from Stefan Roese <sr@denx.de>.
o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
CFG_PCI_CACHE_LINE_SIZE to 0.
Signed-off-by: Gary Jennejohn <garyj@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The old code had a loop limit overflow bug which caused a semi-
infinite loop for small packets, because in "i<len-8", "i" was signed,
but "len" was unsigned, and "len-8" became a huge number for small
values of "len".
This is a workaround which replaces broken commit 8f1bc284.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The TFTP OACK code trusts that the incoming packet is formated as
ASCII text and can be processed by string functions. It also has a
loop limit overflow bug where if the packet length is less than 8, it
ends up looping over *all* of memory to find the 'blksize' string.
This patch solves the problem by forcing the packet to be null
terminated and using strstr() to search for the sub string.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The Linux PCF8563 RTC driver doesn't do autoprobing, so we need
to supply the RTC I2C address as bootline parameter. This patch
adds support for this rtc probing parameter to the bootargs:
"rtc-pcf8563.probe=0,0x51"
Signed-off-by: Stefan Roese <sr@denx.de>
this had slipped through the cracks, since the sbc board was added
after I wrote the original patch to remove all these symbols, and
before it was merged.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the
correct consoledev needed for linux boot.
Standardize on fdt{file,addr} var to hold dtb file name.
Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
if a board/$(VENDOR)/common/Makefile exists, build it.
also add the first such case, board/freescale/common/Makefile, to
handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
dictated by board configuration.
thusly get rid of alternate build dir errors such as:
FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory
by putting the common/ mkdir command in its proper place (the common
Makefile). Common bits from existing individual board Makefiles have
been removed.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
TFTP does not work anymore after multicast tftp
patch was applied on little endian systems.
This patch fix it.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The logic to check if there is a correct MAC address in the DM9000
EEPROM, added in the last patch, is wrong. Now the MAC address is
always taken from the environment, even if a suitable MAC is present
in the EEPROM.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Fix the following warnings:
- usb.c:xx: warning: function declaration isn't a prototype
- usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer
from pointer wihtout a cast
Signed-off-by: Martin Krause <martin.krase@tqs.de>
CPU physical address space was being wasted by allocating a
PCSRBAR PCI inbound region to it's memory space.
As a rule, PCSRBAR should be left alone since it does not affect
transactions from self and other masters may have changed it.
Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
This patch fixes the "type qualifiers ignored on fuction return tpye"
warning for include/s3c2410.h
Signed-off-by: Martin Krause <martin.krause@tqs.de>
omap2420h4 switched to cfi, so remove old (already disabled) flash.c
and flash_probe() calls in env_flash.c.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
define there own I/O functions.
(Needed for the pcs440ep board).
- The default I/O Functions are again 8 Bit accesses.
- Added CONFIG_CMD_IDE for the pcs440ep Board.
Signed-off-by: Heiko Schocher <hs@denx.de>
As experienced on lwmon5, on some boards the POST memory test can
corrupt the global data buffer (bd). This patch fixes this issue
by checking and limiting this area.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Since this RTC POST test is taking quite a while to complete
it's only initiated upon special keypress same as the complete
memory POST.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5
board. Now the "eeprom" command can be used to read/write from/to this
device. Additionally a new command was added "eepromwp" to en-/disable
the write-protect of this 2nd EEPROM.
The 1st EEPROM is not affected by this write-protect command.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the matrix keyboard on the lwmon5 board.
Since the implementation in the dsPCI is kind of compatible with the
"old" lwmon board, most of the code is copied from the lwmon
board directory.
Signed-off-by: Stefan Roese <sr@denx.de>
platforms wishing to display RAM diagnostics in addition to size,
can do so, on one line, in their own board_add_ram_info()
implementation.
this consequently eliminates CONFIG_ADD_RAM_INFO.
Thanks to Stefan for the hint.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch has been sent on:
- 6 Jun 2007
Many users of PCI config read routines tend to ignore the function
ret value, and are only concerned about the contents of *val. Based
on this, pci_hose_read_config_{byte,word}_via_dword should initialize
the *val on dword read error.
Without this fix, for example, we'll go on scanning bus with vendor or
header_type uninitialized. This brings many unnecessary config trials.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
introduced in the implement board_add_ram_info patch as I was cleaning out the
magic numbers. sorry.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
add board_add_ram_info, to make memory diagnostic output more
consistent. u-boot banner output now looks like:
DRAM: 256 MB (DDR1, 64-bit, ECC on)
and for boards with SDRAM on the local bus, a line such as this is
added:
SDRAM: 64 MB (local bus)
also replaced some magic numbers with their equivalent define names.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The patch split the PIB init code from pci.c to a single file board/freescale/common/pq-mds-pib.c
And add Qoc3 ATM card support for MPC8360EMDS and MPC832XEMDS board.
Signed-off-by Tony Li <tony.li@freescale.com>
The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
to update TSEC1's device-tree node, so we need to add it
to all the boards with TSECs. Do this for 83xx and 86xx, too,
since they will eventually do something similar.
Signed-off-by: Andy Fleming <afleming@freescale.com>
The PCIe bus that the ULI M1575 is connected to has no possible way of
needing more than the fixed amount of IO & Memory space needed by the ULI.
So make it use far less IO & memory space and have it use the shared LAW. This
free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed
by each bus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
It looks like we had a merge issue that duplicated a bit of code
in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get
the MAC address properly set in the device tree on boot for TSEC1
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Minor cleanups to confirm to the u-boot coding style.
Some german expressions -> english.
HCU5 enforces a unique IP adress for a given slot in the rack.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Make ecc initialisation robust, as DDR2-ECC errors may be generated
while zeroing the RAM.
Return 16 bytes (a cacheline) less than the available memory, as the
board and/or PPC440EPx might have problems accessing the last bytes.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
The TSEC driver's PHY code waits a long time for autonegotiation to
complete, even if the link is down. The PHY knows the link is
down or up before autonegotiation completes, so we can short-circuit
the process if the link is down.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Actually, fixed a large bug in the UEC for *all* platforms.
How did this ever work?
uec_init() did not follow the spec for eth_init(), and returned
0 on success. Switch it to return the link like tsec_init()
(and 0 on error)
The immap for the 8568 was defined based on MPC8568, rather than
CONFIG_MPC8568
CONFIG_QE was off
CONFIG_ETHPRIME was set to "Freescale GETH". Now is "FSL UEC0"
Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
enabled
Signed-off-by: Andy Fleming <afleming@freescale.com>
The tsec_info structure and array has a "flags" field for each
ethernet controller. This field is the only reason there are
settings. Switch to defining TSECn_FLAGS for each controller
in the config header, and we can greatly simplify the array, and
also simplify the addition of future boards.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Changes to the TSEC driver affect almost all 83xx, 85xx, and 86xx boards.
Now we can do a MAKEALL test on all of them!
Signed-off-by: Andy Fleming <afleming@freescale.com>
The fix, "Fix where the #ifdef CFG_BOOTMAPSZ is placed"
neglected to *also* put the code inside the similar #ifdef
for CONFIG_OF_FLAT_TREE.
Signed-off-by: Andy Fleming <afleming@freescale.com>
bzip2 requires a significant chunk of malloc space, and there isn't
enough room on mpc885ads (with only 8MB RAM) for both bzip2's malloc area
and a downloaded image at 0x400000.
Signed-off-by: Scott Wood <scottwood@freescale.com>
This small CPCI750 update extends the board specific command
"show_config" to display the Marvell strapping registers and
extends the PCI IDE controller.
Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
this enables libfdt code by default for the
freescale mpc8313erdb, mpc832xemds, mpc8349emds,
mpc8349itx and gp boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
this adds libfdt support code for the freescale
mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
and gp boards.
Boards remain compatible with OF_FLAT_TREE.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
PCI clocks and QE frequencies weren't being updated, and the core clock
was being updated incorrectly. This patch also adds a /memory node if
it doesn't already exist prior to update.
plus some cosmetic trimming to single line comments.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Commit 073e1b5099 "Fix initrd/dtb
interaction" put the new code outside of the #if defined(CONFIG_OF_LIBFDT)
when it should have gone inside of the conditional. As a result, it
broke non-LIBFDT board builds.
Also added a missing "not." to the comment.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
The original code would wrongly relocate the blob to be right before
the initrd if it existed. The blob *must* be within CFG_BOOTMAPSZ,
if it is defined. So we make two changes:
1) flag the blob for relocation whenever its address is above BOOTMAPSZ
2) If the blob is being relocated, relocate it before kbd, not initrd
Signed-off-by: Andy Fleming <afleming@freescale.com>
When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
is not done using an internal loopback connection, but by assuming
that an external loopback connector is plugged into the board.
Signed-off-by: Stefan Roese <sr@denx.de>
Merge to two at45.c files into a common file, split to at45.c and spi.c
Fix spelling error in DM9161 PHY Support.
Initialize at91rm9200 board (and set LED).
Add PIO control for at91rm9200dk LEDs and Mux.
Change dataflash partition boundaries to be compatible with Linux 2.6.
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.
Signed-off-by Randy Vinson <rvinson@mvista.com>
Author: Randy Vinson <rvinson@linuxbox.(none)>
Enable the PCI-to-ISA bridge in the VIA Southbridge located on the
Arcadia main board.
Signed-off-by: Randy Vinson <rvinson@mvista.com>
Signed-off-by: York Sun <yorksun@freescale.com>
This patch is against u-boot-mpc85xx.git of www.denx.com
Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
both MPC8548CDS board and MPC8568MDS board, especially for supporting
533MHz DDR2.
Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
DDR2 on all current board versions especially ver 1.92 or later to bring
up.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
On e500 when we leave the 4k boot page we should use an absolute address since
we don't know where the board code may want us to be really running at.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The current implementation does not set the number of bank address bits
(BA) in the processor. The default assumes 2 logical bank bits. This
works fine for a DIMM that uses devices with 4 internal banks (SPD
byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
devices with 8 internal banks (SPD byte17 = 0x8).
Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
Some patches had inserted warnings into the build:
* mpc8560ads declared data without using it
* cpu_init declared ecm and immap without using it in all CONFIGs
* MPC8548CDS.h had its default filenames changed so that they contained
"\m" in the paths. Made the defaults not Windows-specific (or
anything-specific)
Signed-off-by: Andy Fleming <afleming@freescale.com>
Make the early L1 cache stack region guarded to prevent speculative
fetches outside the locked range.
Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
init.S whitespace cleanup.
Allow TEXT_BASE value to be specified on command line. This allows it
to be set to 0xfffc0000 which cuts the uboot binary in half.
Clear and enable lbc and ecm errors.
Update last_busno in device-tree for pci and pcie.
Remove load of obsolete cpu/mpc85xx/pci.0
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.
Enable LBC and ECM errors and clear error registers.
Add tftpflash env var to get uboot from tftp server and flash it.
Add pci/pcie convenience env vars to display register space:
"run pcie3regs" to see all pcie3 ccsr registers
"run pcie3cfg" to see all cfg registers
Whitespace cleanup and MPC8544DS.h
Enable CONFIG_INTERRUPTS.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
From: Ed Swarthout <Ed.Swarthout@freescale.com>
Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.
Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.
Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl
Move additional code from .text to boot page to make room for
exception vectors at start of image.
Handle Machine Check, External and Critical exceptions.
Fix e500 machine check error determination in traps.c
TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different
from the bootp server
Signed-off-by: Wilson Callan <wcallan@savantav.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Calculate the data timeout based on values from the CSD instead of
just using a hardcoded DTOR value. This is a backport of a similar fix
in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
instead of down.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
include/asm-avr32/div64.h was recently moved to include/div64.h, but
cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
the patch was merged perhaps?)
This patch updates cpu/at32ap/interrupts.c so that the avr32 port
compiles again.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Instead of always using the largest blocksize the card supports, check
if it can support smaller block sizes and use 512 bytes if possible.
Most cards do support this, and other parts of u-boot seem to have
trouble with block sizes different from 512 bytes.
Also enable underrun/overrun protection.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
This patch was originall provided by David Mitchell <dmitchell@amcc.com>
and fixes a bug in the PLL clock calculation.
Signed-off-by: Stefan Roese <sr@denx.de>
The update procedure was modified to turn off the USB subsystem
before exit for MCC200 and TRAB. This is necessary as otherwise the
USB controller continues to write periodically to system memory!
MCC200-specific notes:
- the patch disables the magic key check for MCC200
- the patch contains the configuration changes made
for the new revision of the board.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
The last fdt patch to bootm did board setup based on the address
specified by a prior fdt address command invocation. The bootm
code, as its call to fdt_chosen does, should use the fdt specified
by the user on the bootm command. Note this restores full
functionality for the 8360's existing default boot environment
values, e.g. 'run nfsboot' (i.e. no having to 'fdt addr $fdtaddr'
before booting a kernel).
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
In the patch titled "Create new fdt boardsetup command..." I removed the
call to ft_board_setup() from the routine fdt_chosen(), but I forgot
to add a direct call back into cmd_bootm.c
This fixes the oversight by adding the direct call to the bootm command.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Previously ft_board_setup() was called by fdt_chosen() which was not
really correctly structured. This splits ft_board_setup() out by creating
a new fdt boardsetup command.
Fix a bug when parsing fdt set command values which have the square
bracket form [00 11 22 33] - the length was updated incorrectly in when
parsing that form.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
The fdt_chosen() function was adding/seting some properties ad-hoc
improperly and duplicated (poorly) what was done in ft_board_setup()
Clean up long lines (setting properties, printing errors).
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
The new name matches more closely the kernel's name, which is also
a much better description.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Break lines that were greater than 80 characters in length.
Move the fdt print and property parsing code to separate static functions
to reduce coding clutter in the fdt_cmd handling body.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Do *NOT* return after the "point of no return" has been passed.
If something goes wrong, the board must be reset after that point.
Move the "Transferring control to Linux" debug message back to where it
belongs: just before transferring control to linux.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Make the length parameter optional: if not specified, do the move using
the current size unchanged.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Declare the variable fdt properly as extern.
Call the "set_fn" function pointer the "short way" without the full
dereferencing syntax.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Print more than the raw libfdt error message strings. This is especially
useful for cluing in the user when the bootm command aborts due to
blob problems.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
This is the way u-boot reduces configured-out code. At Wolfgang
Grandegger and Wolfgang Denk's request, make libfdt conform.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Add support for the following DaVinci boards:
- DV_EVM
- SCHMOOGIE
- SONATA
Changes:
- Split into separate board directories
- Removed changes to MTD_DEBUG (or whatever it's called)
- New CONFIG_CMD party line followed
- Some cosmetic fixes, cleanup etc.
- Patches against the latest U-Boot tree as of now.
- Fixed CONFIG_CMD_NET in net files.
- Fixed CONFIG_CMD_EEPROM for schmoogie.
- Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and
DV_EVM. Can't check if it works on SONATA, don't have a board any more,
but it at least compiles.
Here is an excerpt from session log on SCHMOOGIE...
U-Boot 1.2.0-g6c33c785-dirty (Aug 7 2007 - 13:07:17)
DRAM: 128 MB
NAND: 128 MiB
In: serial
Out: serial
Err: serial
ARM Clock : 297MHz
DDR Clock : 162MHz
ETH PHY : DP83848 @ 0x01
U-Boot > iprobe
Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F
U-Boot > ping 192.168.253.10
host 192.168.253.10 is alive
U-Boot >
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Acked-by: Stefan Roese <sr@denx.de>
Do not enable normal errors created during probe (master abort, perr,
and pcie Invalid Configuration access).
Add CONFIG_PCI_NOSCAN board option to prevent bus scan.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
When I rebased Ed's patch and cleaned up a few compilation
problems, I apparently rebased my brain on crack first.
Fix that by doing (char *) sized pointer math as needed.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.
Include MSSSR0 in error message.
Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Use generic 64bit division in nand_util.c. This makes nand_util.c
independent of any toolchain 64bit division.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Move the 64bit division from lib_avr32 to lib_generic. With this, all
boards can do_div/__div64_32 if needed, not only avr one. Code is put
to lib_generic, so no larger memory footprint if not used. No code
modifications. Thanks for proposal by Håvard Skinnemoen.
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
This series of patches adds support for 2 boards from Netstal Maschinen.
The HCU4 has a PPC405Gpr and
the HCU5 has a PPC440EPX.
The HCU4 has a somehow complicated flash setup, as the booteprom is
only 8 bits and the CFI 16 bits wide, which makes it impossible to use a more
elegant solution.
The HCU5 has only a booteprom as the whole code will be downloaded from a
different board which has HD, CD-ROM, etc and where all code is stored.
This is my third try. I incorporated all suggestions made by Wolfgang and Stefan.
Thanks them a lot.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
The patch adds support for UART POST on ppc44x-based boards with no
external serial clocks installed.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
make: *** No rule to make target `/work/wd/tmp/board/mpc8349itx/u-boot.lds', needed by `/work/wd/tmp/u-boot'. Stop.
Both the ITX and ITX-GP fail when you use "make O=<some dir> ..." or
"BUILD_DIR=<some dir> ./MAKEALL ..."
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Remove the duplicated source code of ecc command on the <board>.c,
for reused, move these code to cpu/mpc83xx directory.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC8323E based board with 64MB fixed SDRAM, 16MB flash,
five 10/100 ethernet ports connected via an ICPlus IP175C
switch, one PCI slot, and serial. Features not supported
in this patch are SD card interface, 2 USB ports, and the
two phone ports.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
..and not the global fdt. Rename local fdt vars to blob so as not to
be confused with the global var with the same three-letter name.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Several node strings were not correct (trailing slashes and properties
in the strings)
Added setting of the timebase-frequency.
Improved error messages and use debug() instead of printf().
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The new name matches more closely the kernel's name, which is also
a much better description.
These are the mpc83xx changes made necessary by the function name change.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
83xx processor family has many reset sources, such as
power on reset, software hard reset, software soft reset,
JTAG, bus monitor, software watchdog, check stop reset,
external hard reset, external software reset.
sometimes, to figure out the fault of system, we need to
know the cause of reset early before the prompt of
u-boot present.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
According to the latest user manual, the SDMA temporary
buffer base address must be 4KB aligned.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
When the rev2.x silicon mount on the MPC8360EMDS baord,
and if you are using the u-boot version after the commit
3fc0bd1591.
to make the ethernet interface usable, we have to setup
the jumpers correctly.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The i2c_init() function in fsl_i2c.c programs the two I2C busses differently.
The second I2C bus has its slave address programmed incorrectly and is
missing a 5-us delay.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Update the cpu_init_f() function in cpu/mpc83xx/cpu_init.c to program the
bitfields for all 83xx processors. The code to update some bitfields was
compiled only on some processors. Now, the bitfields are programmed as long
as the corresponding CFG_SCCR option is defined in the board header file.
This means that the board header file should not define any CFG_SCCR macros
for bitfields that don't exist on that processor, otherwise the SCCR will be
programmed incorrectly.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
MPC83xx: Fix the Makefile config sections to generate the include/config.h
file in the build directory instead of the source directory.
Signed-off-by: David Saada <david.saada@ecitele.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The change entitled "Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx"
broke multiple PHY support in tsec.c. This fixes it.
Signed-off-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Allow the address of the Ten Bit Interface (TBI) to be changed in the
event of a conflict with another device.
Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
The bios emulator in the MAI board can not pass compile
and have a lot of crap in it. remove it and will have a
clean and small bios emulator in the drivers directory
which can be uesed for every board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
This patch add definition of the BIOS emulator and the ATI framebuffer
driver for MPC8641HPCN board.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Additionally export the following fuctions (to make trab_config build again):
- simple_strtol()
- strcmp()
Also bump the ABI version to reflect this change
Signed-off-by: Martin Krause <martin.krause@tqs.de>
All of the PCI/PCI-Express driver and initialization code that
was in the MPC8641HPCN port has now been moved into the common
drivers/fsl_pci_init.c. In a subsequent patch, this will be
utilized by the 85xx ports as well.
Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added.
Also enable the second PCI-Express controller on 8641
by getting its BATS and CFG_ setup right.
Fixed a u16 vendor compiler warning in AHCI driver too.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Add the ability for modules from the Schindler cm5200 family to use a
single U-Boot image:
- rename cm1_qp1 to cm5200
- add run-time module detection
- parametrize SDRAM configuration according to the module we are running on
Few minor, board-specific fixes included in this patch:
- better MAC address handling
- updated default environment ('update' command uses +{filesize} now)
- improved error messages in the auto-update code
- allow booting U-Boot from RAM (CFG_RAMBOOT)
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
During config transactions on the PCIe bus an attempt to scan for a
non-existent device can lead to a machine check exception with certain
peripheral devices. In order to avoid crashing in such scenarios the
instrumented versions of the config cycle read routines are introduced, so
the exceptions fixups framework can gracefully recover.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0a
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)
Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)
Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map
Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Change Lime SDRAM initialization to now support 100MHz and
133MHz (if enabled). Also the framebuffer is initialized to
display a blue rectangle with a white border.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
As spotted by Matthias Fuchs, the default output values for all GPIO1
outputs were not setup correctly. This patch fixes this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.
Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
This patch fixes the negative consequences for 8xx of the recent
"ppc4xx: Clean up 440 exceptions handling" commit.
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
The new boardspecific DDR2 controller configuration is used for the Yucca
board. Now the Yucca board with 440SPe Rev. A chips is also supported.
Signed-off-by: Stefan Roese <sr@denx.de>
The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better
support non default, boardspecific DDR(2) controller configuration.
Signed-off-by: Stefan Roese <sr@denx.de>
The new function remove_tlb() can be used to remove the TLB's used to
map a specific memory region. This is especially useful for the DDR(2)
setup routines which configure the SDRAM area temporarily as a cached
area (for speedup on auto-calibration and ECC generation) and later
need this area uncached for normal usage.
Signed-off-by: Stefan Roese <sr@denx.de>
This change fixes a bug in the receive buffer handling, that
could lead to problems upon high network traffic (broadcasts...).
Signed-off-by: Stefan Roese <sr@denx.de>
The Marvel 88E1111S driver for the TSEC was copied from the
88E1101 driver, and included a fix for an erratum which does not
exist on that part. Now it is removed
Signed-off-by: Andy Fleming <afleming@freescale.com>
Made the boot commands use device trees by default.
Also moved the ramdisk to 1000000 (I think the previous address
was getting overridden during boot).
Signed-off-by: Andy Fleming <afleming@freescale.com>
Jarrold Wen noticed that the generic PHY code always matches
under the current implementation. Change it so the first match
wins, and *only* unknown PHYs trigger the generic driver
Signed-off-by: Andy Fleming <afleming@freescale.com>
* Adds code to modify CPM frequencies
* Cleans up the config file to #define TSEC and (for now) #undef FCC
* Adds the MII command for all 8560 ADS configurations
* Updates config file to provide convenience commands for booting
with a device tree
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver
where the reset was being done after the errata code instead of
before.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
FSL PCIe block has extended cfg registers in the 100 and 400 range.
For example, to read the LTSSM register: pci display <busn>.0 404 1
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Ensure hose->current_busno is not less than first_busno. This fixes
broken board code which leaves current_busno=0 when first_busno is
greater than 0 for the cases with multiple controllers.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
- now the Flash ST M29W040B is supported (not tested)
- fix the "led" command
- fix compile error, if BUILD_DIR is used
Signed-off-by: Heiko Schocher <hs@denx.de>
The relocation fixup didn't handle the malloc pointer initialization
correctly. This patch fixes this problem. Tested successfully on 4xx.
The relocation fixup patches for 4xx will follow soon.
Signed-off-by: Stefan Roese <sr@denx.de>
Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
Signed-off-by: TsiChung <tcliew@Goku.(none)>
Include immap.h and timer.h. Moved dtimer interrupt setup to dtimer_intr_setup() from cpu/mcf532x/interrupts.c. Changed (CFG_CLK /1000000) -1 << 8 to CFG_TIMER_PRESCALER
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Since it is already in m68k folder, un-necessary to pad mcf. Replaced immap_5329.h and m5329.h to immap.h
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Renamed mcfserial.c to mcfuart.c. Modified Makefile for mcfuart.o from mcfserial.o. Replace immap_5329.h and m5329.h to immap.h
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
interrupt_init() and dtimer_intr_setup() are placed in interrupts.c. Added interrupts.o to Makefile
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Replace immap_5329.h and m5329.h with immap.h. Removed interrupt_init() and placed it in interrupts.c
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
There is a Common Flash Interface Driver existed. To use the CFI driver, define CFG_FLASH_CFI in configuration file.
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Create new header file to include immap_5xxx.h and m5xxx.h and to share among drivers without update in driver file each processor is added. Moved peripherals base address and defines from configs file to immap.h.
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
Those always evaluated TRUE, and thus were always compiled
even when IDE really wasn't defined/wanted.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
used to be included but CONFIG_BOOTP_MASK was not defined.
Remove lingering references to CFG_CMD_* symbols.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
All of the choices for CONFIG_BOOTP_ are now documented in
the README file. You must now individually select exactly
the set that you want using a series of
#define CONFIG_BOOTP_<x>
statements in the board port config files now.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch prepares the migration from the legacy NAND driver
to U-Boot's new NAND subsystem for esd boards.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
For some reason, CONFIG_POST permeated as CONFIG_CMD_POST_DIAG
when it really means just CONFIG_CMD_DIAG. There is no CMD_POST.
Clear this mess up some.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Since ADS860.h includes "board/fads/fads.h" with ramifications
on the CONFIG_COMMAND treatment, it too has to be adjusted to
exclude already configured commands in this same commit.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The old implementation of command nboot does not support reading the image from
NAND flash with skipping of bad blocks. The patch implements a new version of
the nboot command: by calling nboot.jffs2 from the u-boot command line the
command will load the image from NAND flash with respect to bad blocks (by using
nand_read_opts()). This is similar to e.g. the NAND read command: "nand
read.jffs2 ...".
Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Add optional ECC generation routine to preserve existing
RAM values. This is needed for the Linux log-buffer support
- Add optional DDR2 setup with CL=4
- GPIO50 not used anymore
- Lime register setup added
Signed-off-by: Stefan Roese <sr@denx.de>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Derive three new files from cmd_confdefs.h:
config_bootp.h - Has BOOTP related config options, not commands
config_cmd_all.h - Has a CONFIG_CMD_* definition for every command
config_cmd_default.h - Has a CONFIG_CMD_* definition for default cmds.
For now, include "config_bootp.h" for compatability until all
users of it directly include it properly.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch prints the DDR status registers upon machine check
interrupt on the 440EPx/GRx. This can be useful especially when
ECC support is enabled.
I added some small changes to the original patch from Niklaus to
make it compile clean.
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes the problem to assemble cpu/ppc4xx/start.S
experienced last week where building failed having specified
O=../build.sequoia.
Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for calling a plattform dependant
pci_pre_init() function for 405 boards. This can be used to
move the current pci_405gp_fixup_irq() function into the
board code.
This patch also makes the CFG_PCI_PRE_INIT define obsolete.
A default function with 'weak' attribute is used when
a board specific pci_pre_init() is not implemented.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
A new environment variable, "logversion", selects the log buffer
behaviour. If it is not set or set to a value other than 2, then the
old, Linux 2.4.4, behaviour is selected.
Signed-off-by: Igor Lisitsin <igor@emcraft.com>
--
- Show on the Status LEDs, some States of the board.
- Get the MAC addresses from the EEProm
- use PREBOOT
- use the CF on the board.
- check the U-Boot image in the Flash with a SHA1
checksum.
- use dynamic TLB entries generation for the SDRAM
Signed-off-by: Heiko Schocher <hs@denx.de>
The recently extended program_tlb() function had a problem when
multiple TLB's had to be setup (for example with 512MB of SDRAM). The
virtual address was not incremented. This patch fixes this issue
and is tested on Katmai with 512MB SDRAM.
Signed-off-by: Stefan Roese <sr@denx.de>
since nand_init() is expected to be called by other parts of u-boot, there
should be a prototype for it in nand.h
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a board command to configure the I2C bootstrap EEPROM
values. Right now 533 and 667MHz are supported for booting either via NOR
or NAND FLASH. Here the usage:
=> bootstrap 533 nor ;to configure the board for 533MHz NOR booting
=> bootstrap 667 nand ;to configure the board for 667MHz NNAND booting
Signed-off-by: Stefan Roese <sr@denx.de>
The latest changes showed a problem with the location of the NAND-SPL
image in the OCM and the init-data area (incl. cache). This patch
fixes this problem.
Signed-off-by: Stefan Roese <sr@denx.de>
- Introduced dedicated switches for building 440 and 405 images required
for 440-specific machine instructions like 'rfmci' etc.
- Exception vectors moved to the proper location (_start moved away from
the critical exception handler space, which it occupied)
- CriticalInput now serviced (with default handler)
- MachineCheck properly serviced (added a dedicated handler and return
subroutine)
- Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
unhandled and those not relevant for 4xx were eliminated)
- Eliminated Linux leftovers, removed dead code
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup
is extended with the default GPIO output state (level).
Signed-off-by: Stefan Roese <sr@denx.de>
Now program_tlb() allows to program a TLB (or multiple) with
different virtual and physical addresses. With this change, now one
physical region (e.g. SDRAM) can be mapped 2 times, once with caches
diabled and once with caches enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Set the correct value in GPIOx_TCR when configuring the gpio
with CFG_440_GPIO_TABLE.
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This is a cosmetic only changes submission.
It affects files relevant to bcm570x driver.
the commands used to generate this change was
cd drivers
Lindent -pcs -l80 bcm570x.c bcm570x_lm.h bcm570x_mm.h tigon3.c tigon3.h
The BMW target (the only one using this chip so far) builds cleanly, the
`before and after' generated object files for drivers/bcm570x.c and
drivers/tigon3.o are identical as reported by objdump -d
Signed-off-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
This patch adds NAND booting support for the AMCC Acadia eval board.
Please make sure to configure jumper J7 to position 2-3 when booting
from NOR, and to position 1-2 when booting for NAND.
I also added a board command to configure the I2C bootstrap EEPROM
values. Right now only 267MHz is support for booting either via NOR
or NAND FLASH. Here the usage:
=> bootstrap 267 nor ;to configure the board for 267MHz NOR booting
=> bootstrap 267 nand ;to configure the board for 267MHz NNAND booting
Signed-off-by: Stefan Roese <sr@denx.de>
This patch added USB PCI-OHCI chips support, interrupt pipe support
and usb event poll support. For supporting the USB interrupt pipe, the
globe urb_priv is moved to purb in ed struct. Now, we can process
several urbs at one time. The interrupt pipe support codes are ported
from Linux kernel 2.4.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
This patch adds USB event poll support, which could be used in usbkbd
and other usb devices driver when the asynchronous interrupt
processing is supported.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com
Using some (very) slow USB keys cause the USB host controller buffers
are not ready to be read by the CPU so we need an extra delay before
reading the USB storage data.
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
e600 does not have a bootpg restriction.
Move the version string to beginning of image at fff00000.
Resetvec.S is not needed.
Update flash copy instructions.
Add tftpflash env variable
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The attached patch is mainly cosmetic, allowing u-boot to
display the correct bootstrap option letter according to the
datasheets.
The original patch was extended with 405EZ support by Stefan
Roese.
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Current include/configs/MPC8349ITX.h does contain some support for building
image that will be started from memory (without putting in into flash).
It could be triggered by building with TEXT_BASE set to a low value.
However, this support is incomplete: using of low TEXT_BASE causes
defining configuration macros in inconsistent way, which later leads
to compilation errors. In particular. flash support is being disabled,
but then flash structures get referenced.
This patch fixes this, making it possible to build with low TEXT_BASE.
Signed-Off-By: Nikita Youshchenko <yoush@debian.org>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch undoes the patch by Jeff Mann with commit-id ada4697d. As
suggested by AMCC it is not recommended to dynamically change the EBC
speed after bootup. So we undo this change to be on the safe side.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds NAND booting support for the AMCC Bamboo eval board.
Since the NAND-SPL boot image is limited to 4kbytes, this version
only supports the onboard 64MBytes of DDR. The DIMM modules can't be
supported, since the setup code for I2C DIMM autodetection and
configuration is too big for this NAND bootloader.
Signed-off-by: Stefan Roese <sr@denx.de>
The U-Boot NAND booting support is now extended to support ECC
upon loading of the NAND U-Boot image.
Tested on AMCC Sequoia (440EPx) and Bamboo (440EP).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the "normal" Bamboo NOR booting port, so
that it is compatible with the coming soon NAND booting
Bamboo port.
It also enables the 2nd NAND flash on the Bamboo.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds hardware ECC support to the NDFC driver. It also
changes the register access from using the "simple" in32/out32
functions to the in_be32/out_be32 functions, which make sure
that the access is correctly synced. This is the only recommended
access to SoC registers in the current Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the nand_ecc code to the latest Linux version.
The main reason for this is the more compact code. This makes
it possible to include the ECC code into the NAND bootloader
image (NAND_SPL) for PPC4xx.
Signed-off-by: Stefan Roese <sr@denx.de>
Enable redundant environment, add a MTD partition for it; also add env.
variable command for passing MTD partitions to the kernel command line.
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
Allow passing longer command line to the kernel - useful especially
for passing MTD partition layout.
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
Change EEPROM configuration according to the datasheet: "The 24C01A and 24C02A
have a page write capability of two bytes", and "This device offers fast (1ms)
byte write". Add 3ms of extra delay.
Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which
networking does not function. This commit switches PHY to TX mode by clearing
the FX_SEL bit of Mode Control Register. It also reverses commit
008861a2f3, i.e., a temporary workaround.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
Both CFG_PCISPEED_66 and CFG_IPBSPEED_133 are misnamed, as defining
them does not cause PCI or IPB clocks to run at the specified speed.
Instead, they configure divisors used to calculate said clocks. This
patch renames the defines according to their real function.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
As pointed out by Bruce Adler <bruce.adler@acm.org> this patch
fixes a small bug in the 405EZ OCM initialization. Thanks for
spotting.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the Acadia (405EZ) support for the new 1.1 board
revision. It also adds support for NAND FLASH via the 4xx NDFC.
Please note that the jumper J7 must be in position 2-3 for this
NAND support. Position 1-2 is for NAND booting only. NAND booting
support will follow later.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for 405 PPC's to the 4xx NAND driver
ndfc.c. This is in preparation for the new AMCC 405EZ.
Signed-off-by: Stefan Roese <sr@denx.de>
For all practical u-boot purposes, TSECs don't differ throughout the
mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Because the Sequoia board does not boot with an EBC faster than 66MHz,
the clock divider are changed after the initial boot process.
This allows for maximum clocking speeds to be achieved on newer boards.
Sequoia boards with 666.66 MHz processors require that the EBC divider
be set to 3 in order to start the initial boot process at a slower EBC
speed. After the initial boot process, the divider can be set back to 2,
which will cause the boards to run at 83.333MHz. This is backward
compatible with boards with 533.33 MHz processors, as these boards will
already be set with an EBC divider of 2.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Bridge, ICH-5, ICH-6 and ICH-7.
Implementation:
1. Code is divided in to two files. All functions, which are
controller specific are kept in "drivers/ata_piix.c" file and
functions, which are not controller specific, are kept in
"common/cmd_sata.c" file.
2. Reading and Writing from the S-ATA drive is done using PIO method.
3. Driver can be configured for 48-bit addressing by defining macro
CONFIG_LBA48, if this macro is not defined driver uses the 28-bit
addressing.
4. S-ATA read function is hooked to the File system, commands like
ext2ls and ext2load file can be used. This has been tested.
5. U-Boot command "SATA_init" is added, which initializes the S-ATA
controller and identifies the S-ATA drives connected to it.
6. U-Boot command "sata" is added, which is used to read/write, print
partition table and get info about the drives present. This I have
implemented in same way as "ide" command is implemented in U-Boot.
7. This driver is for S-ATA in native mode.
8. This driver does not support the Native command queuing and
Hot-plugging.
Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
Hi,
There is a bug in the code of clearing the bss section for processor
i386.(File: cpu/i386/start.S)
In the code, bss_start addr (starting addr of bss section) is put into
the register %eax, but the code which clears the bss section refers to
the addr pointed by %edi.
This patch fixes this bug by putting bss_start into %edi register.
Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
Search the exception table with linear algorithm instead of
bisecting algorithm.
Because the exception table might be unsorted.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The attached patch fixes the compile of the JSE board in the
denx git as of 14 may 2007. It is an extremely simple patch,
it just adds the missing define of CFG_SYSTEMACE_WIDTH.
Fix to compile JSE against 20070514 git of u-boot
current PHY initalization code (tftp timeouts all the time). This commit
temporarily disables PHY initalization sequence to make the networking
operational, until a fix is found.
A '3' got cut off in the formatting of the last patch to automatically
change the clock speed of the system clock on sequoia board.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
message. Use PVR to distinguish between the two variants, and print proper CPU
information.
Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Stefan Roese <sr@denx.de>
update setenv() function so that entering a NULL value for the
variable's value will delete the environmental variable
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Acked-by: Stefan Roese <sr@denx.de>
the v_mac variable in the smc91111 driver is declared as a signed char ...
this causes problems when one of the bytes in the MAC is "signed" like 0xE0
because when it gets printed out, you get a display like:
0xFFFFFFE0 and that's no good
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The AMCC Secquoia board has been changed in a new revision from using a
33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD
indicates the difference. This patch reads that bit and uses the correct
clock speed for the board. This code is backward compatable will all
prior boards. All prior boards will be read as 33.000.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
for the 4k NAND boot image so define bus_frequency to 133MHz here
which is save for the refresh counter setup.
Signed-off-by: Stefan Roese <sr@denx.de>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
In case that there is no memory based bad block table available the
function nand_block_checkbad() in drivers/mtd/nand/nand_base.c will call
nand_block_bad() directly. When parameter 'getchip' is set to zero,
nand_block_bad() will not right shift the offset to calculate the
correct page number.
Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
Signed-off-by: Stefan Roese <sr@denx.de>
When using FDT Images, the length of an inital ramdisk was
overwritten (bug introduced by commit 87a449c8, 22 Aug 2006).
Patches by Timur Tabi & Johns Daniel.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Enable hush shell, environment in flash rather in EEPROM,
more user-friendly default environment, etc.
The simple EEPROM environment can be selected easily in the board
config file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
There were a few theoretical possibilities that the compiler might
optimize away DMA descriptor reads and/or writes and thus cause
synchronization problems with the hardware. Insert barriers where
we depend on reads/writes actually hitting memory.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Cleaned up the CDS PCI Config Tables and added NULL entries to
the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address
Signed-off-by: Andy Fleming <afleming@freescale.com>
This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile
Signed-off-by: Andy Fleming <afleming@freescale.com>
When bringing up u-boot on new boards, PHY support sometimes gets
neglected. Most PHYs don't really need any special support,
though. By adding a generic entry that always matches if nothing
else does, we can provide support for "unsupported" PHYs for the
tsec.
The generic PHY driver supports most PHYs, including gigabit.
Signed-off-by: David Updegraff <dave@cray.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP.
This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary
on some ITX boards, notably those with a revision 3.1 CPU.
Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into
ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Michael Benedict <MBenedict@twacs.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Clarified that conversion is to DRAM clocks rather than platform clocks.
Made function static to spd_sdram.c.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
message. Use PVR to distinguish between the two variants, and print proper CPU
information.
Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Changed the code to read the registers and calculate the clock
rates, rather than using a "switch" statement.
Idea from Andrew Klossner <andrew@cesa.opbu.xerox.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
* Add support to the Makefile
* Add 8544 configuration support to the tsec driver
* Add 8544 SVR numbers to processor.h
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The other pagesz constants use one letter to specify order of
magnitude. Also change the one reference to it in mpc8548cds/init.S
Signed-off-by: Andy Fleming <afleming@freescale.com>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Add board port under new board/freescale directory
structure and reuse existing PIXIS FPGA support there.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit
52c7a68b8d which failed to update the #define's
describing the local address window used for the PCI I/O space accesses -- fix
this and carry over the necessary changes into the MPC8560ADS code since the
PCI I/O space mapping was also broken for this board (by the earlier commit
087454609e). Add the comments clarifying how
the PCI I/O space must be mapped to all the MPC85xx board config. headers.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
board/mpc8540ads/init.S | 4 ++--
board/mpc8560ads/init.S | 4 ++--
include/configs/MPC8540ADS.h | 5 ++---
include/configs/MPC8541CDS.h | 2 +-
include/configs/MPC8548CDS.h | 2 +-
include/configs/MPC8560ADS.h | 8 ++++----
6 files changed, 12 insertions(+), 13 deletions(-)
The following patch fixes the e500 v2 core reset bug.
For e500 v2 core, a new reset control register is added to reset the
processor.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW
entry number to control the loop. This can reduce the potential risk
for the 85xx processor increasing its TLB adn LAW entry number.
Signed-off-by: Swarthout Edward <swarthout@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Fix the 85xxcds tsec bug.
When enable PCI, tsec.o should be added to u-boot.lds to make tsec work.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Board code can now request the generic setup code rather than having to
copy-and-paste it for themselves. Boards should be converted to use this
once they're tested with it.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Rather than misleadingly define PVR_83xx as the specific type of 83xx
being built for, the PVR of each core revision is defined. checkcpu() now
prints the core that it detects, rather than aborting if it doesn't find
what it thinks it wants.
Signed-off-by: Scott Wood <scottwood@freescale.com>
If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Stefan Roese <sr@denx.de>
update setenv() function so that entering a NULL value for the
variable's value will delete the environmental variable
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Acked-by: Stefan Roese <sr@denx.de>
the v_mac variable in the smc91111 driver is declared as a signed char ...
this causes problems when one of the bytes in the MAC is "signed" like 0xE0
because when it gets printed out, you get a display like:
0xFFFFFFE0 and that's no good
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, ftp_cpu_setup()
should write the MAC address to mac-address and local-mac-address, if they
exist.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
G2 core reference manual says decrementer and time base
are decreasing/increasing once every 4 bus clock cycles.
Lets fix it, so time in Linux won't run twice as fast
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
What was suppose to be a stack variable was declared as a pointer,
overwriting random memory.
Also moved the libfdt.a requirement into the main Makefile. That is
The U-Boot Way.
Previous versions used full wait states for the chip select #1 which
is connected to the Xilinix SystemACE controller on the AMCC Katmai
evaluation board. This leads to really slow access and therefore low
performance. This patch now sets up the chip select a lot faster
resulting in much better read/write performance of the Linux driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:
U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)
CPU: AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
Bootstrap Option E - Boot ROM Location EBC (32 bits)
16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board
Signed-off-by: Stefan Roese <sr@denx.de>
U-Boot part of Lite5200b low power mode support.
Puts SDRAM out of self-refresh and transfers control to
address saved at physical 0x0.
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Use "setter" functions instead of flags, cleaner and more flexible.
It also fixes the problem noted by Timur Tabi that the ethernet MAC
addresses were all being set incorrectly to the same MAC address.
In bootm, create the "/chosen" node only if it doesn't already exist
(better matches the previous behavior).
Update for proper reserved memory map handling for initrd.
Set up the portmux for the MMC interface and enable the MMC driver
along with support for DOS partitions, ext2 and FAT filesystems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.
The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.
Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement functions for configuring the mmci pins, as well as
functions for getting the clock rate of the mmci controller.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement MACB initialization for AVR32 and ATSTK1000, and turn
everything on, including the MACB driver.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Driver for the Atmel MACB on-chip ethernet controller.
This driver has been tested on the ATSTK1000 board with a AT32AP7000
CPU. It should probably work on AT91SAM926x as well with some minor
modifications.
Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement functions for configuring the macb0 and macb1 pins, as
well as functions for getting the clock rate of the various
busses the macb ethernet controllers are connected to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Instead of creating yet another set of MII register definitions
in the macb driver, here's a complete set of definitions for everyone
to use.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Include the imi, imls and jffs commands sets by default on ATSTK1000.
Also define CONFIG_BOOTARGS to something more useful, define
CONFIG_BOOTCOMMAND and enable autoboot by default.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Conform to the "standard" interface and use initdram() instead of
board_init_memories() on AVR32. This enables us to get rid of the
sdram_size member of the global_data struct as well.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Relocate the u-boot image into SDRAM like everyone else does. This
means that we can handle much larger .data and .bss than we used to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.
As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Convert spaces to tabs (must have missed this one last time around),
sort the entries by address and group them together by bus
connectivity.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add -fPIC -mno-init-got to the avr32-specific CFLAGS to make u-boot
position independent. This will make relocation a lot easier.
-mno-init-got means that gcc shouldn't emit code to load the GOT
address into r6 in every function prologue. We do it once and for
all in the early startup assembly code, so enabling this option
makes u-boot a bit faster and smaller.
The assembly parts have always been position-independent, so no code
changes should be necessary.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
It doesn't really matter which toolchain you use to compile u-boot,
but the avr32-linux one is probably what most people have installed.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Split the avr32 initialization code into a function to run before
relocation, board_init_f and a function to run after relocation,
board_init_r. For now, board_init_f simply calls board_init_r
at the end.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Fix bug introduced by "Fix get_partition_info() parameter error in all
other calls" from 2005-03-04 in cmd_ide.c and cmd_scsi.c, which prevented
to use diskboot or scsiboot form another device than 0.
Signed-off-by: Denis Peter <d.peter@mpl.ch>
There are a few bugs in the cpu/mpc83xx/spd_sdram.c
the first bug is that the picos_to_clk routine introduces a huge
rounding error in 83xx.
the second bug is that the mode register write recovery field is
tWR-1, not tWR >> 1.
This patch fixes changes the i2c_init(...) function to use the function
get_OPB_freq() rather than calculating the OPB speed by
sysInfo.freqPLB/sysInfo.pllOpbDiv. The get_OPB_freq() function is
specific per processor. The prior method was not and so was calculating
the wrong speed for some PPC4xx processors.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Move the 8641HPCN's PIXIS code to the new directory
board/freescale/common/ as it will be shared by
future boards not in the same processor family.
Write a "pixis_reset" command that utilizes the FPGA
reset sequencer to support alternate soft-reset options
such as using the "alternate" flash bank, enabling
the watch dog, or choosing different CPU frequencies.
Add documentation for the pixis_reset to README.mpc8641hpcn.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Changed _fdt_check_header() to fdt_check_header() and made it part of
the interface - it is a useful routine.
Also did some asthetics cleanup to the include files (headers).
Added information about usage of NetConsole on systems where the -l and -p
switches are mutually exclusive.
Signed-off-by: Igor Marnat <marny@rambler.ru>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
With this new base address of the Xilinx SystemACE controller
the Linux driver will be easier to adapt, since it can now be
mapped via the "normal" ioremap() call.
Signed-off-by: Stefan Roese <sr@denx.de>
The fdt command uses David Gibson's libfdt library to manipulate as well
as print the flattened device tree. This patch is the new command,
the second part is the modifications to the existing code.
Enhanced the formerly private function _fdt_next_tag() to allow stepping
through the tree, used to produce a human-readable dump, and made
it part of the published interface.
Also added some comments.
The board specific "bootstrap" command is now fixed and can
be used for the AMCC Katmai board to configure different
CPU/PLB/OPB frequencies.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
Signed-off-by: Stefan Roese <sr@denx.de>
The "old" i2c commands (iprobe, imd...) are now compiled in again,
even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE
config option.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.
Signed-off-by: Stefan Roese <sr@denx.de>
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Without this patch, I am unable to get to the prompt on rev 2 silicon.
Only set ddrioovcr for rev1.
Signed-off-by: Ed Swarthout<ed.swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
This patch adds support for the new AMCC Acadia eval board.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <sr@denx.de>
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Signed-off-by: Stefan Roese <sr@denx.de>
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support
adding support for Xilinx ML401
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).
Signed-off-by: Stefan Roese <sr@denx.de>
The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
Signed-off-by: Stefan Roese <sr@denx.de>
Add ICMP_ECHO_REQUEST packet support by responding with a ICMP_ECHO_REPLY.
This permits the ping command to test the phy interface when the phy
is put in loopback mode (typically by setting register 0 bit 14).
It also allows the port to respond to an external ping when u-boot is
processing some other net command (such as tftp). This is useful when
tftp appears to hang.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
DDR memory are dynamically programmed matching the total size
of the equipped memory (DIMM modules).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
Signed-off-by: Stefan Roese <sr@denx.de>
As provided by the AMCC applications team, this patch optimizes the
DDR2 setup for 166MHz bus speed. The values provided are also save
to use on a "normal" 133MHz PLB bus system. Only the refresh counter
setup has to be adjusted as done in this patch.
For this the NAND booting version had to include the "speed.c" file
from the cpu/ppc4xx directory. With this addition the NAND SPL image
will just fit into the 4kbytes of program space. gcc version 4.x as
provided with ELDK 4.x is needed to generate this optimized code.
Signed-off-by: Stefan Roese <sr@denx.de>
The config value for:
* CFG_ACR_PIPE_DEP
* CFG_ACR_RPTCNT
* CFG_SPCR_TSEC1EP
* CFG_SPCR_TSEC2EP
* CFG_SCCR_TSEC1CM
* CFG_SCCR_TSEC2CM
Were not being used when setting the appropriate register
Added:
* CFG_SCCR_USBMPHCM
* CFG_SCCR_USBDRCM
* CFG_SCCR_PCICM
* CFG_SCCR_ENCCM
To allow full config of the SCCR.
Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
that were just bogus.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some device trees have a mac-address property, some have local-mac-address,
and some have both. To support all of these device trees, this patch
updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
This function already updates local-mac-address.
Signed-off-by: Timur Tabi <timur@freescale.com>
The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
it pass DDR/DDR2 compliance tests.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
MPC8360E rev2.0 have new spridr,and PVR value,
The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
MPC8349E rev3.1 have new spridr,and PVR value,
The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM.
Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0)
which is used to se if an slave will ACK after receiving its address.
Correct i2c probing to use this method as the old method could upset
a slave as it wrote a data byte to it.
Add a small delay in i2c_init() to let the controller
shutdown any ongoing I2C activity.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Add support for the MPC8349E-mITX-GP, a stripped-down version of the
MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in
HRCW is 0) for the ITX and a README for the ITX and the ITX-GP.
Signed-off-by: Timur Tabi <timur@freescale.com>
There is no SDRAM on any of the 8349 ITX variants, so function sdram_init()
never does anything. This patch deletes it.
Signed-off-by: Timur Tabi <timur@freescale.com>
The patch solves the alignment problem of the local bus access windows to
render accessible the memory bank and PHY registers of UPC 1 (starting at
0xf801 0000). What we actually did was to adjust the sizes of the bus
access windows so that the base address alignment requirement would be met.
Signed-off-by: Chereji Marian <marian.chereji@freescale.com>
Signed-off-by: Gridish Shlomi <gridish@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
The problem is not gcc4 but the code itself. The BD_STATUS() macro can't
be used for busy-waiting since it strips the 'volatile' property from
the bd variable. gcc3 was working by pure luck.
This is a follow on patch to "Fix the UEC driver bug of QE"
The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all
MPC834X class processors. Change the protections from CONFIG_MPC8349 to
CONFIG_MPC834X so they are more generic.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
I've redone the SBC8349 support to match git-current, which
incorporates all the MPC834x updates from Freescale since the 1.1.6
release, including the DDR changes.
I've kept all the SBC8349 files as parallel as possible to the
MPC8349EMDS ones for ease of maintenance and to allow for easy
inspection of what was changed to support this board. Hence the SBC8349
U-Boot has FDT support and everything else that the MPC8349EMDS has.
Fortunately the Freescale updates added support for boards using CS0,
but I had to change spd_sdram.c to allow for board specific settings for
the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
default if the board doesn't specify a value.)
Hopefully this should be mergeable as-is and require no whitespace
cleanups or similar, but if something doesn't measure up then let me
know and I'll fix it.
Thanks,
Paul.
Put the version (and magic) after the HRCW. This puts it in a fixed
location in flash, not at the start of flash but as close as we can get.
Signed-off-by: Jerry Van Baren <vanbaren@cideas.com>
For better format and style, I streamlined the 83xx head files,
including immap_83xx.h and mpc83xx.h. In the old head files, 1)
duplicated macro definition appear in the both files; 2) the structure
of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
macro definition put inside the each structure. So, I cleaned up the
structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
moved the macro definition to mpc83xx.h, Just like MPC8260.
CHANGELOG
*streamline the 83xx immr head file
Signed-off-by: Dave Liu <daveliu@freescale.com>
The patch prevents the GCC tool chain from striping useful code for
optimization. It will make UEC ethernet driver workable, Otherwise the
UEC will fail in tx when you are using gcc4.x. but the driver can work
when using gcc3.4.3.
CHANGELOG
*Prevent the GCC from striping code for optimization, Otherwise the UEC
will tx failed when you are using gcc4.x.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.
Please note, that still some problems are left with some memory
configurations. See the driver for more details.
Signed-off-by: Stefan Roese <sr@denx.de>
- fix logic error in image type handling
- make sure file system images (cramfs etc.) get stored in flash
with image header stripped so they can be mounted through MTD
Since the relocation fix is not included yet and we're not sure how
it will be added, this patch removes code that required relocation
to be fixed for now.
Signed-off-by: Stefan Roese <sr@denx.de>
As suggested by Grant Likely this patch enables the Xilinx SystemACE
driver to select 8 or 16bit mode upon startup.
Signed-off-by: Stefan Roese <sr@denx.de>
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
This patch enables the "new" get_dev() function for block devices
introduced by Grant Likely to be used on systems that still suffer
from the relocation problems (manual relocation neede because of
problems with linker script).
Hopefully we can resolve this relocation issue soon for all platform
so we don't need this additional code anymore.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes some problems when the Xilinx SystemACE driver
is used with 16bit access on an big endian platform (like the
AMCC Katmai).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch switches to the desired I2C bus when the date/dtt
commands are called. This can be configured using the
CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:
- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.
This is in preparation for the 440 DDR2 controller support (440SP/e).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for multiple I2C busses on the PPC4xx
platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
to make use of this feature.
It also merges the 405 and 440 i2c header files into one common
file 4xx_i2c.h.
Also the 4xx i2c reset procedure is reworked since I experienced
some problems with the first access on the 440SPe Katmai board.
Signed-off-by: Stefan Roese <sr@denx.de>
Block device read/write is anonymous data; there is no need to use a
typed pointer. void * is fine. Also add a hook for block_read functions
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Register read/write does not need to be wrapped in a full function. The
patch replaces them with macros.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The code in this file is not a command; it is a device driver. Put it in
the correct place. There are zero functional changes in this patch, it
only moves the file.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch is in preparation of additional changes to the sysace driver.
May as well take this opportunity to fixup the inconsistent whitespace since
this file is about to undergo major changes anyway.
There are zero functional changes in this patch. It only cleans up the
the whitespace.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Printing a buffer is a darn useful thing. Move the buffer print code
into print_buffer() in lib_generic/
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Change the xilinx device drivers and board code to include config.h
instead of xparameters.h directly. config.h always includes the
correct xparameters file. This change reduces the posibility of
including the wrong file when adding a new xilinx board port
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Each of the filesystem drivers duplicate the get_dev routine. This change
merges them into a single function in part.c
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Update / extend Software Update Mechanism for MCC200 board:
- Add support for rootfs image added. The environment variables
"rootfs_st" and "rootfs_nd" can be used to override the default
values of the image start and end.
- Remove excessive key check code.
- Code cleanup.
Some boards that can have more than 768MBytes of SDRAM need to
set "initrd_high", so that the initrd can be accessed by the
Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Previously the strapping DCR/SDR was read to determine if the internal PCI
arbiter is enabled or not. This strapping bit can be overridden, so now
the current status is read from the correct DCR/SDR register.
Signed-off-by: Stefan Roese <sr@denx.de>
When PCI PNP is enabled the pci pnp configuration routine is called
which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some
problems with some PCI cards. For now disable the PCI PNP configuration.
Signed-off-by: Stefan Roese <sr@denx.de>
The config file now handles the 2nd target, the Rainier (440GRx)
evaluation board better. Additionally the PPC input clock was
adjusted to match the correct value of 33.0 MHz.
Signed-off-by: Stefan Roese <sr@denx.de>
Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR)
share one config file and all board specific files. This way we
don't have to maintain two different sets of files for nearly
identical boards.
Signed-off-by: Stefan Roese <sr@denx.de>
currently sectors 0-3. Sector 3 does not need to be protected, though
(U-boot occupies sectors 0-1 and the environment sector 2). This commit
fixes this, i.e., only sectors 0-2 are protected.
"mii device" results in "Unexpected exception"). Fixing this properly
requires some clean-up in the FEC drivers infrastructure for ColdFire, so
this commit disables MII commads for now.
The patch by Heiko Schocher <hs@pollux.denx.de> on Jan, 19, 2007
fixes cfi_driver bug for mpc7448hpc2 board. The default cfi_driver can support
mpc7448hpc2 board.
Conflicts:
drivers/cfi_flash.c
The patch by Heiko Schocher <hs@pollux.denx.de> on Jan, 19, 2007
fixes cfi_driver bug for mpc7448hpc2 board. The default cfi_driver can support
mpc7448hpc2 board.
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
The invocation of do_auto_update() is moved to the end of the
misc_init_r() function, after the flash mappings have been
initialized. Please find attached a patch that implements that
change.
Also correct the decoding of the keypad status. With this update, the
key that will trigger the update is Column 2, Row 2.
This patch fixes a problem with an incorrect setup for the refresh
timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c
Signed-off-by: Stefan Roese <sr@denx.de>
This update brings the ALPR board support to the newest version.
It also fixes a problem with the NAND driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Here the description from Brian Brelsford <Brian_Brelsford@dell.com>:
The Hynix part returns a 0x1d in the 4th ID byte. The Samsung part
returns a 0x15. In the code fragment below bits [1:0] determine the
page size, it is ANDed via "(extid & 0x3)" then shifted out. The
next field is also ANDed with 0x3. However this is a one bit field
as defined in the Hynix and Samsung parts in the 4th ID byte that
determins the oobsize, not a two bit field. It works on Samsung as
bits[3:2] are 01. However for the Hynix there is a 11 in these two
bits, so the oob size gets messed up.
I checked the correct linux code and the suggested fix from Brian is
also available in the linux nand mtd driver.
Signed-off-by: Stefan Roese <sr@denx.de>
This code will optimize the DDR2 controller setup on a board specific
basis.
Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.
Signed-off-by: Stefan Roese <sr@denx.de>
- fix a typo in V38B config file
- move watchdog initialisation earlier in the boot process
- add "wdt=off" to default kernel command line (disables kernel watchdog)
multiplier table can not refect the real PLL clock behavior of these
processors. Please refer to the hardware specification for detailed
information of the corresponding processors.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The original search_one_table() function code can only processes the search
for the exception occurring in FLASH/ROM, because the exception and fixup
table usually locate in FLASH. If the exception address is also in
FLASH, it will be OK.
If the exception occurs in RAM, after the u-boot relocation, a
relocation offset should be added.
clean up the code in cpu/74xx_7xx/cpu.c
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The conflicts due to a new mpc7448 p3m7448 board is in the main tree.
Merge branch 'master' into hpc2
Conflicts:
MAKEALL
cpu/74xx_7xx/cpu.c
cpu/74xx_7xx/cpu_init.c
cpu/74xx_7xx/speed.c
(1) remove some C++ comments.
(2) remove trailing white space.
(3) remove trailing empty line.
(4) Indentation by table.
(5) remove {} in one line condition.
(6) add space before '(' in function call.
Remove some weird printf () output.
Add necessary comments.
Modified Makefile to support building in a separate directory.
The soc node of the mpc52xx needs to be loaded with the IPB bus frequency,
not the XLB frequency.
This patch depends on the previous patches for MPC52xx device tree support
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This patch adds support for the Prodrive P3M750 (PPC750 & MV64460)
and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are
quite similar and share the same board directory "prodrive/p3mx"
and the same config file "p3mx.h".
Signed-off-by: Stefan Roese <sr@denx.de>
In the bootvx command the load address was only read from the env
variable "loadaddr" and not optionally passed as paramter as described
in the help. This is fixed with this patch. The behaviour is now the
same as in the bootelf command.
Signed-off-by: Stefan Roese <sr@denx.de>
Fixed include/ppc440.c for UIC address Bug
Corrects bug affecting the addresses for the universal interrupt
controller UIC2 and UIC3 on the PPC440 Epx, GRx, and SPE chips.
Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the code and configuration necessary to boot with an
arch/powerpc Linux kernel.
Signed-off-by: Grant Likely <grant.likely@gmail.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Patch below corrects the setting of the zmiifer register, it was
overwritting the register rather than ORing the settings.
Signed-off-by: Neil Wilson <NWilson@airspan.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The current NAND Bootloader setup forces the environment
variables to be in line with the bootloader. This change
enables the configuration to be made in the board include
file instead so that it can be individually enabled.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Two fixes for the nand_wait() function in
drivers/nand/nand_base.c:
1. Use correct timeouts. The original timeouts in Linux
source are 400ms and 20ms not 40s and 20s
2. Return correct error value in case of timeout. 0 is
interpreted as OK.
Signed-off-by: Rui Sousa <rui.sousa@laposte.net>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch allows an arch/ppc kernel to be booted by just passing 1 or 2
arguments to bootm. It removes the getenv("disable_of") test that used
to be used for this purpose.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Jon Loeliger <jdl@freescale.com>
and adapted board configs TQM5200 and yosemite accordingly. This commit
also makes the maximum number of root hub ports configurable
(CFG_USB_OHCI_MAX_ROOT_PORTS).
Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx
errata 1.12: 440_33 by moving patch up in code.
Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
* Adds support for AMD command set Top Boot flash geometry reversal
* Adds support for reading JEDEC Manufacturer ID and Device ID
* Adds support for displaying command set, manufacturer id and
device ids (flinfo)
* Makes flinfo output to be consistent when CFG_FLASH_EMPTY_INFO defined
* Removes outdated change history (refer to git log instead)
Signed-off-by: Tolunay Orkun <listmember@orkun.us>
Signed-off-by: Stefan Roese <sr@denx.de>
Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.
Signed-off-by: Timur Tabi <timur@freescale.com>
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
tree matches the other 8xxx trees.
Signed-off-by: Timur Tabi <timur@freescale.com>
The 834x rev1.x silicon has one CPU5 errata.
The issue is when the data cache locked with
HID0[DLOCK], the dcbz instruction looks like no-op inst.
The right behavior of the data cache is when the data cache
Locked with HID0[DLOCK], the dcbz instruction allocates
new tags in cache.
The 834x rev3.0 and later and 8360 have not this bug inside.
So, when 834x rev3.0/8360 are working with ECC, the dcbz
instruction will corrupt the stack in cache, the processor will
checkstop reset.
However, the 834x rev1.x can work with ECC with these code,
because the sillicon has this cache bug. The dcbz will not
corrupt the stack in cache.
Really, it is the fault code running on fault sillicon.
This patch fix the incorrect dcbz operation. Instead of
CPU FP writing to initialise the ECC.
CHANGELOG:
* Fix the incorrect dcbz operation instead of CPU FP
writing to initialise the ECC memory. Otherwise, it
will corrupt the stack in cache, The processor will checkstop
reset.
Signed-off-by: Dave Liu <daveliu@freescale.com>
add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and
STDOUT_PATH configuration bits to mpc8349emds,
mpc8349itx, and mpc8360emds board code.
redo environment to use bootm with the fdtaddr
for booting ARCH=powerpc kernels by default,
and provide default fdtaddr values.
PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006092142000015 "Add support for the MPC8349E-mITX 1/2"
2) DNX#2006092142000024 "Add support for the MPC8349E-mITX 2/2"
CHANGELOG:
* For the 8349E-mITX, fix some size values in pci_init_board(), enable
the clock for the 2nd USB board (Linux kernel will hang otherwise),
and fix the CONFIG_BOOTARGS macro.
Signed-off-by: Timur Tabi <timur@freescale.com>
PREREQUISITE PATCHES:
* This patch can only be applied after the following patches have been applied:
1) DNX#2006090742000024 "Add support for multiple I2C buses"
2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
CHANGELOG:
* Add support for the Freescale MPC8349E-mITX reference design platform.
The second TSEC (Vitesse 7385 switch) is not supported at this time.
Signed-off-by: Timur Tabi <timur@freescale.com>
Hello,
Here is a patch for a file that was accidentally left out of a previous
attempt.
It accompanies the patch with ticket DNX#2006090742000024
CHANGELOG:
Change PCI initialization to use new multi-bus I2C API.
regards,
Ben
Hello,
Attached is a patch implementing multiple I2C buses on the MPC834x CPU
family and the MPC8349EMDS board in particular.
This patch requires Patch 1 (Add support for multiple I2C buses).
Testing was performed on a 533MHz board.
/*** Note: This patch replaces ticket DNX#2006083042000027 ***/
Signed-off-by: Ben Warren <bwarren@qstreams.com>
CHANGELOG:
Implemented driver-level code to support two I2C buses on the
MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds
are 50kHz, 100kHz and 400kHz on each bus.
regards,
Ben
Hello,
Attached is a patch providing support for multiple I2C buses at the
command level. The second part of the patch includes an implementation
for the MPC834x CPU and MPC8349EMDS board.
/*** Note: This patch replaces ticket DNX#2006083042000018 ***/
Signed-off-by: Ben Warren <bwarren@qstreams.com>
Overview:
1. Include new 'i2c' command (based on USB implementation) using
CONFIG_I2C_CMD_TREE.
2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS. Note that
the commands to change bus number and speed are only available under the
new 'i2c' command mentioned in the first bullet.
3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus
systems. When CONFIG_I2C_MULTI_BUS is used, this option takes the form
of an array of bus-device pairs. Otherwise, it is an array of uchar.
CHANGELOG:
Added new 'i2c' master command for all I2C interaction. This is
conditionally compiled with CONFIG_I2C_CMD_TREE. New commands added for
setting I2C bus speed as well as changing the active bus if the board
has more than one (conditionally compiled with
CONFIG_I2C_MULTI_BUS). Updated NOPROBE logic to handle multiple buses.
Updated README.
regards,
Ben
CHANGELOG:
* Errata DDR6, which affects all current MPC 834x processors, lists changes
required to maintain compatibility with various types of DDR memory. This
patch implements those changes.
Signed-off-by: Timur Tabi <timur@freescale.com>
CHANGELOG:
* On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access
window registers, instead of using a hard-coded value of 8MB.
Signed-off-by: Timur Tabi <timur@freescale.com>
Unified TQM834x variable names with 83xx and consolidated macro
in preparation for the 8360 and other upcoming 83xx devices.
Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
Incorporated the common unified variable names and the changes in preparation
for releasing mpc8360 patches.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch addresses a problem when CONFIG_MTD_NAND_VERIFY_WRITE is
defined
and the write crosses a block boundary. The pointer to the verification
buffer (bufstart) is not being updated to reflect the starting of the
new
block so the verification of the second block fails.
CHANGELOG:
* Fix NAND FLASH page verification across block boundaries
Added a phy initialization to adjust the RGMII RX and TX timing
Always set the R100 bit in 100 BaseT mode regardless of the TSEC mode
Signed-off-by: Nick Spence <nick.spence@freescale.com>
The i2c Interface provides a master-only, serial interface that can be
used for initializing Tsi108/Tsi109 registers from an EEPROM after a
device reset.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
If there is no pci card, the tsi108/109 pci configure read will
cause a machine check exception to the processor. PCI error should
also be cleared after the read.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The following is a brief description of the Ethernet controller:
The Tsi108/9 Ethernet Controller connects Switch Fabric to two independent
Gigabit Ethernet ports,E0 and E1. It uses a single Management interface
to manage the two physical connection devices (PHYs). Each Ethernet port
has its own statistics monitor that tracks and reports key interface
statistics. Each port supports a 256-entry hash table for address
filtering. In addition, each port is bridged to the Switch Fabric
through a 2-Kbyte transmit FIFO and a 4-Kbyte Receive FIFO.
Each Ethernet port also has a pair of internal Ethernet DMA channels to
support the transmit and receive data flows. The Ethernet DMA channels
use descriptors set up in memory, the memory map of the device, and
access via the Switch Fabric. The Ethernet Controller?s DMA arbiter
handles arbitration for the Switch Fabric. The Controller also
has a register businterface for register accesses and status monitor
control.
The PMD (Physical Media Device) interface operates in MII, GMII, or TBI
modes. The MII mode is used for connecting with 10 or 100 Mbit/s PMDs.
The GMII and TBI modes are used to connect with Gigabit PMDs. Internal
data flows to and from the Ethernet Controller through the Switch Fabric.
Each Ethernet port uses its transmit and receive DMA channels to manage
data flows through buffer descriptors that are predefined by the
system (the descriptors can exist anywhere in the system memory map).
These descriptors are data structures that point to buffers filled
with data ready to transmit over Ethernet, or they point to empty
buffers ready to receive data from Ethernet.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
The Tundra Semiconductor Corporation (Tundra) Tsi108 is a host bridge for
PowerPC processors that offers numerous system interconnect options for
embedded application designers. The Tsi108 can interconnect 60x or
MPX processors to PCI/X peripherals, DDR2-400 memory, Gigabit Ethernet,
and Flash. Provided the macro define for tsi108 chip.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
1. Add 7447A and 7448 processor support.
2. Add the following flags.
CFG_CONFIG_BUS_CLK : If the 74xx bus frequency can be configured dynamically
(such as by switch on board), this flag should be set.
CFG_EXCEPTION_AFTER_RELOCATE: If an exception occurs after the u-boot
relocates to RAM, this flag should be set.
CFG_SERIAL_HANG_IN_EXCEPTION: If the print out function will cause the
system hang in exception, this flag should be set.
There is a design issue for tsi108/109 pci configure read. When pci scan
the slots, if there is no pci card, the tsi108/9 will cause a machine
check exception for mpc7448 processor.
Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* remove warnings when compiling ethaddr.c
* adjust linker script (fixes a crash resulting from incorrect
definition of __u_boot_cmd_start)
- Some MarelV38B code cleanup.
MPC5XXX_WU_GPIO_DATA macro to MPC5XXX_WU_GPIO_DATA_O (per MPC5200 User's
Manual). Replace the uses of MPC5XXX_WU_GPIO_DATA with
MPC5XXX_WU_GPIO_DATA_O for affected boards.
- Add defintions for some MPC5XXX GPIO pins.
Use MACH_TYPE_NETSTAR and MACH_TYPE_VOICEBLUE defines instead of
numbers in code.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>
chpart, nboot and NAND subsystem related commands now accept also partition
name to specify offset.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Make sure the string passed as variable name does not contain a '='
character. This not only prevents the common error or typing
"setenv foo=bar" instead of "setenv foo bar", but (more importantly)
also closes a backdoor which allowed to delete write-protected
environment variables, for example by using "setenv ethaddr=".
When passing the -g option to gcc, gcc automatically selects a
suitable --g<format> option to pass on to the assembler.
Thus, there's no point in forcing a specific debug option on the
assembler using the -Wa mechanism.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add atstk1002_config target to Makefile and move the AVR32 section
down below Blackfin so that it doesn't end up in the middle of
MIPS.
Drop the autogenerated linker script thing for now. Will have to
revisit how to handle chips with different flash and RAM layout
later.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
If a Multi-Image file contains a third image we try to use it as a
device tree. The device tree image is assumed to be uncompressed in the
image file. We automatically allocate space for the device tree in memory
and provide an 8k pad to allow more than a reasonable amount of growth.
Additionally, a device tree that was contained in flash will now automatically
get copied to system memory as part of boot. Previously an error was
reported if one tried to boot a device tree that was in flash.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Patch by Haavard Skinnemoen, 06 Sep 2006
This patch adds support for the ATSTK1000 with the ATSTK1002 CPU
daughterboard.
ATSTK1000 is a full-featured development board for AT32AP CPUs. It
has two ethernet ports, a high quality QVGA LCD panel, a loudspeaker,
and connectors for USART, PS/2, VGA, USB, MMC/SD cards and
CompactFlash cards. For more information, please see this page:
http://www.atmel.com/dyn/products/tools.asp?family_id=682
The ATSTK1002 is a daughterboard for the ATSTK1000 supporting the
AT32AP7000 chip.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Patch by Haavard Skinnemoen, 06 Sep 2006
This is a first attempt at creating a common serial driver for Atmel
chips. For now, it supports the AT32AP7000 AVR32 chip, but it should
be possible to support AT91RM9200 and other ARM-based chips with some
minor modifications.
There's nothing fundamentally AVR32-specific in this driver, but it
does use some features which are currently only defined for the
AT32AP CPU port:
* pm_get_clock_freq: Obtain the clock frequency of a given domain
* gd->console_uart: A "struct device" containing information about
register mappings, gpio resources and clocks associated with the
UART device.
For more information about these features, please see the "AT32AP
CPU" patch.
Patch by Haavard Skinnemoen, 06 Sep 2006
This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.
The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200
This patch adds common infrastructure code for the Atmel AVR32
architecture. See doc/README.AVR32 for details.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Patch by Haavard Skinnemoen, 30 Aug 2006
In config.mk, -Wa,-gstabs is unconditionally appended to AFLAGS no
matter what the target's preferred debugging format is. This patch
simply replaces -gstabs with -g, so that the default debugging format
for the architecture is used.
Replace private IMMAP I2C structures with generic reg block
and allow 86xx to have multiple I2C device busses.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
conditional expressions instead.
Use consistent return code 0/-1 for good/bad indicators.
Include one fewer file if the driver isn't used at all.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
When CONFIG_OF_FLAG_TREE is set, the compiler complains that 'len' in
do_bootm_linux() may be uninitialized. There is no possibility in the
current code that len will get used uninitialized, but this fix follows
the existing convention of setting both len and data to zero at the same
time.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
- JFFS2 related commands implemented in mtd-utils style
- Support for bad blocks
- Bad block testing commands
- NAND lock commands
Please take a look at doc/README.nand for more details
Patch by Guido Classen, 10 Oct 2006
- Map in a additional chip selects CS4 and CS5.
- Modify the port configration, configure six UARTs and no PCI,
ATA and USB.
- Add custom flash driver to handle specific byte swapping
* Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS.
This will only work on rev 1.3 boards (but doesn't break older boards)
* Cleaned up some comments to reflect the expanded role of tsec
in other systems
Both 8641 and 8641D have SVR == 0x8090, and are distinguished
by the byte in bits 16-23 instead.
Thanks to Jason Jin for noticing.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
Modifications are based on the linux kernel approach and
support two use cases:
1) Add O= to the make command line
'make O=/tmp/build all'
2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'
The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'
Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
Improved the memory DIMM detection for the Yucca 440SPe board for
the case where a memory DIMM is falsely detected as present.
This issue is seen on some AMCC Yucca 440SPe validation boards if
only one 512MB memory DIMM is installed, i.e. DIMM slot 0 is
populated and DIMM slot 1 is empty. In this case, U-Boot does
not correctly detect that there is only one DIMM memory module
installed and will falsely detect two DIMM memory modules are
present and therefore U-Boot will not calculate the correct amount
of total memory and u-boot will not booting up.
Patch by Adam Graham, 24 Aug 2006
* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
AMCC suggested to set the PMU bit to 0 for best performace on
the PPC440 DDR controller.
Please see doc/README.440-DDR-performance for details.
Patch by Stefan Roese, 28 Jul 2006
- make highboot configurations use environment at high end, too,
to avoid flash fragmentation
- always use redundand environment
- don't enable video code for modules without graphics controller
- provide useful (though different) mtdparts settings
- get rid of CONFIG_CS_AUTOCONF which was always set anyway
* Extend mkconfig tool to print more useful target name
Hint: the CPLD on the TQM5200 must be programmed with a software
version supporting the high boot option! The new TQM5200S is
already supporting this option. On the TQM5200 this option will be
supported in configurations with MPC5200 rev B processors.
To actually "high boot", set jumper X30 on the STK52xx.
Patch by Martin Krause, 12 Jul 2006
- Support for TQM5200S (short version without graphic controller)
- Support for modules with 'N' type S29GL128N Spansion flashes
(requires changes to flash layout)
- Support for MPC5200B cpu (mostly support for second SDRAM bank)
The PS/2 keyobard driver for the TQM85xx modules only supports the
internal DUART of the MPC85xx CPU. Since the MPC8560 doesn't
include a DUART, the TQM8560 modules can't be used with the PS/2
keyboard controller on the STK85xx board.
The PS/2 keyboard driver should work with the modules TQM8540,
TQM8541 and TQM8555, but it only has been tested on a TQM8540, yet.
Make sure the PS/2 controller on the STK85xx is programmed. Jumper
settings: X66 1-2, 9-10; X61 2-3
Patch by Martin Krause, 21 Jun 2006
During an automatic update via USB stick, U-Boot searches for
images with the name "firmware.img" and "kernel.img". This names
are now changed to "firmw_01.img" and "kernl_01.img". This is done,
to prevent updates of new boards (with the new macronics "c" step
flashes) with old, incompatible firmware or kernel versions.
Patch by Martin Krause, 21 Jun 2006
- increase CFG_FLASH_ERASE_TOUT from 2 to 15 seconds
- use CFG_FLASH_WRITE_TOUT for programming instead of CFG_FLASH_ERASE_TOUT
- remove "Unlock Bypass" mode, because macronix flashes do not support
this mode officially
- fix flash reset command from 0x00FF to 0x00F0. 0x00FF is only specified
for Intel compatible flashes, not for AMD compatible.
Patch by Martin Krause, 15 Feb 2006
The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module
integrated in a little aluminium case.
Patch by Martin Krause, 8 Jun 2006
Some code cleanup
Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.
U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).
If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
All MII configuration is done via FEC1 registers. But MII_SPEED was
configured according to FEC used. So if only FEC2 was used, this caused
the real MII_SPEED register in FEC1 to stay uninitalised, what lead
to "mii_send STUCK!" messages. Fix: always configure MII_SPEED on FEC1
only.
Notes:
- Board-dependend code for RPXLITE and RPXCLASSIC-based boards
placed to the drivers/rpx_pmcia.c file to avoid duplication.
Same for TQM8xx-based boards (drivers/tqm8xx_pmcia.c).
- drivers/i82365.c has been split into two parts located at
board/atc/ti113x.c and board/cpc45/pd67290.c (ATC and CPC45 are
the only boards using CONFIG_82365).
- Changes were tested for clean build and *very* *few* boards.
* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
When tftp a non-exist file from the tftp server, u-boot will check
the link of all eth port. The original file will return wrong link
state on the no link ports.
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
During the pci scan process, Some devices return bar_reponse with the
highest bytes 0, such as the pci bridge in uli1575 return bar_response
with 0xffffff, So the bar_size should be manually set under 64K.
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Patch by Martin Krause, 8 Jun 2006
This patch supports two serial consoles on boards with
a MPC5xxx CPU. The console can be switched at runtime
by setting stdin, stdout and stderr to the desired serial
interface (serial0 or serial1). The PSCs to be used as
console port are definded by CONFIG_PSC_CONSOLE
and CONFIG_PSC_CONSOLE2.
See README.serial_multi for details.
If the bus is blocked because of a previously interrupted
transfer, up to eleven clocks are generated on the I2CSCL
line to complete the transfer and to free the bus.
With this fix pin I2CSCL (PG6) is really configured as GPIO
so the clock pulses are really generated.
Patch by Martin Krause, 04 Apr 2006
Patch by Martin Krause, 07 Nov 2005
Tested on a STK85XX baseboard. Make sure the PS/2 controller
has been programmed. Jumper Settings: X66 1-2, 9-10; X61 2-3
Patch by Martin Krause, 08 Nov 2005
In tsc2000_read_channel() the delay after setting the multiplexer
to a temperature channel is increased from 1,5 ms to 10 ms. This
is to allow the multiplexer inputs to stabilize after huge steps
of the input signal level.
Make the automatic CS configuration the default.
The dedicated configurations CONFIG_TQM5200_AA, CONFIG_TQM5200_AB
and CONFIG_TQM5200_AC are removed.
"TQM5200_config" is now the default for STK52XX.200 base boards.
On a STK52XX.100 base board "TQM5200_STK100_config" must be used.
Patch by Martin Krause, 07 Nov 2005
The environment variable "ver" is now set before
do_auto_update() is called, so that "ver" can be used
in USB update scripts.
Patch by Martin Krause, 27 Oct 2005
- Add support for mpc8xx USB device.
- Add support for Common Device Class - Abstract Control Model USB console.
- Add support for flow control in USB slave devices.
- Add support for switching between gserial and cdc_acm using environment.
- Minor changes to usbdcore_omap1510.c usbdcore_omap1510.h
- Update usbcore slightly to ease host enumeration.
- Fix non-portable endian problems in usbdcore and usbdcore_ep0.
- Add AdderUSB_config as a defconfig to enable usage of the USB console
by default with the Adder87x U-Boot port.
Patches by Bryan O'Donoghue <bodonoghue@codehermit.ie>, 29 May 2006
-When booting from an epcs controller, the epcs bootrom may leave the
slave select in an asserted state causing soft reset hang. This
patch ensures slave select is negated at reset.
Patch by Scott McNutt, 08 Jun 2006
-Fix asm/io.h macros
-Eliminate use of CACHE_BYPASS in cpu code
-Eliminate assembler warnings
-Fix mini-app stubs and force no small data
Patch by Scott McNutt, 08 Jun 2006
Some 80-column cleanups.
Convert printf() to puts() where possible.
Use #include "spd_sdram.h" as needed.
Enhanced reset command usage message a bit.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
First cut at moving the PIXIS platform code out of
the 86xx cpu directory and into board/mpc8641hpcn
where it belongs.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
We use the "automatic" mode that was used for the MPC8266ADS and
MPC8272 boards. Eventually this should be used on all boards?]
Patch by Wolfgang Grandegger, 17 Jan 2006
"reset altbank" will reset another bank WITHOUT watch dog timer enabled
"reset altbank wd" will reset another bank WITH watch dog enabled
"diswd" will disable watch dog after u-boot boots up successfully
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
- Add IXP4xx NPE ethernet MAC support
- Add support for Intel IXDPG425 board
- Add support for Prodrive PDNB3 board
- Add IRQ support
Patch by Stefan Roese, 23 May 2006
[This patch does not include cpu/ixp/npe/IxNpeMicrocode.c which still
sufferes from licensing issues. Blame Intel.]
Problems have been seen in the linux kernel's smc91x network driver
due to improper bus timings. The latest 2.6 OMAP kernels currently
have a workaround, but this fix belongs in u-boot.
Patch by Kevin Hilman, 13 Oct 2005
- Fix OMAP support that omap5912osk compiles in current source tree
- Update with code from "http://omap.spectrumdigital.com/osk5912"
to fix problems with DDR initialization
- Fix timer setup
- Use CFI flash driver and support complete 32MB of onboard flash
- Add "print_cpuinfo()" and "checkboard()" functions to display
CPU (with frequency) and Board infos
Patch by Stefan Roese, 10 May 2006
Enable the CFI driver.
Remove bogus LAWBAR7 cruft.
Use correct TEXT_BASE, Fixup load script.
Enable SPD EEPROM during DDR setup.
Use generic RFC 1918 IP addresses by default.
- Removed MPC8349ADS port
- Added PCI support to MPC8349ADS
- reworked memory map to allow mapping of all regions with BATs
Patch by Kumar Gala 20 Apr 2006
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Patch from Scott McNutt 11, Aug 2005
-When booting from an epcs controller, the epcs bootrom may leave the
slave select in an asserted state causing soft reset hang. This
patch ensures slave select is negated at reset.
Patch by Scott McNutt 11, Aug 2005
-Fix asm/io.h macros
-Eliminate use of CACHE_BYPASS in cpu code
-Eliminate assembler warnings
-Fix mini-app stubs and force no small data
relocate ichache_State to ram
u-boot can run from internal flash
Add EB+MCF-EV123 board support.
Add m68k Boards to MAKEALL
Patch from Jens Scharsig, 08 Aug 2005
- Fix dbau1x00 boards broken by dbau1550 patch
PLL:s were not set for boards other than 1550.
Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST.
Default boot is now bootp for cards other than 1550.
Patch by Thomas Lange Aug 10 2005
- fix some compiler/parser error, if using m68k tool chain
- optical fix for protect on/off all messages, if using more
then one bank
Patch by Jens Scharsig, 28 July 2005
Necessary defines and data structures were copied to DoC specific files
so that legacy NAND code could be entirely removed from u-boot tree
in the near future.
- Add Intel legacy lock/unlock support to common CFI driver
On some Intel flash's (e.g. Intel J3) legacy unlocking is
supported, meaning that unlocking of one sector will unlock
all sectors of this bank. Using this feature, unlocking
of all sectors upon startup (via env var "unlock=yes") will
get much faster.
- Fixed problem with multiple reads of envronment variable
"unlock" as pointed out by Reinhard Arlt & Anders Larsen.
- Removed unwanted linefeeds from "protect" command when
CFG_FLASH_PROTECTION is enabled.
- Changed p3p400 board to use CFG_FLASH_PROTECTION
Patch by Stefan Roese, 01 Apr 2006
* Changes/fixes for drivers/cfi_flash.c:
- Correctly handle the cases where CFG_HZ != 1000 (several
XScale-based boards)
- Fix the timeout calculation of buffered writes (off by a
factor of 1000)
Patch by Anders Larsen, 31 Mar 2006
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
CFG_BOOTM_LEN to adjust this setting.
As mentioned by Robin Getz on 2005-05-24 the size of uncompressed
uImages was restricted to 4MBytes. This default size is now
increased to 8Mbytes and can be overrided by setting CFG_BOOTM_LEN
in the board config file.
Patch by Stefan Roese, 13 Mar 2006
- add support for Analog Devices Blackfin BF533 CPU
- add support for the ADI BF533 Stamp uClinux board
- add support for the ADI BF533 EZKit board
Patches by Richard Klingler, June 11th 2005:
- Use correct flash sector size
- Use correct memory test end address
- Add support for bzip2 compression
- Various small fixes
Patch by Yuli Barcohen, 05 Jun 2005
- Fix SDRAM timing on both local bus and 60x bus
- Add support for second flash bank (SIMM)
- Change boot flash base
Patch by Yuli Barcohen, 05 Jun 2005
* For READ_STATUS and READID commands always 8 bytes need to be read from
NDDB. Otherwise they stay there and get send to flash as the first data
word when writing.
* In nand_base.c the oob variable is not reset so this->oob_buf is
overwritten what eventually screws up the bad block descriptor table.
code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for
NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is
implemented for these boards.
* Debug message can be turned on and off.
* Waiting for events now times out.
* Implemented RESET command.
* Added appropriate nand_bbt_descriptor and nand_oobinfo.
Remaining Problems:
* Read Status still behaves weird an returns invalid stuff sometimes.
* ECC Placement does not respect our scheme in nand_oobinfo.
* Add env-variable "unlock" to handle initial state of sectors
(locked/unlocked).
Only the U-Boot image and it's environment is protected,
all other sectors are unprotected (unlocked) if flash
hardware protection is used (CFG_FLASH_PROTECTION) and
the environment variable "unlock" is set to "yes".
Patch by Stefan Roese, 28 Feb 2006
* Update drivers/cfi_flash.c:
- find_sector() called in both versions of flash_write_cfiword()
Patch by Peter Pearse, 27th Feb 2006
* CFI support for a x8/x16 AMD/Spansion flash configured in x8 mode
Patch by Jose Maria Lopez, 16 Jan 2006
* Add support for AMD/Spansion Flashes in flash_write_cfibuffer
Patch by Alex Bastos and Thomas Schaefer, 2005-08-29
* Changes/fixes for drivers/cfi_flash.c:
We *should* check if there are any error bits if the previous call
returned ERR_OK (Otherwise we will have output an error message in
flash_status_check() already.) The original code would only check for
error bits if flash_status_check() returns ERR_TIMEOUT.
Patch by Marcus Hall, 23 Aug 2005
* Changes/fixes for drivers/cfi_flash.c:
- Add CFG_FLASH_PROTECT_CLEAR on drivers/cfi_flash.c
- Prohibit buffer write when buffer_size is 1 on drivers/cfi_flash.c
Patch by Sangmoon Kim, 19 Aug 2005
* Fixes for drivers/cfi_flash.c:
- Fix wrong timeout value usage in flash_status_check()
- Round write_tout up when converting to msec in flash_get_size()
- Remove clearing flash status at the end of flash_write_cfibuffer()
which sets Intel 28F640J3 flash back to command mode on CSB472
Patch by Tolunay Orkun, 02 July 2005
As done in the linux kernel, the U-Boot version (U_BOOT_VERSION)
of all unreleased (untagged) U-Boot images will be automatically
extended upon compiletime with a part of the GIT commit ID and
possibly with "dirty" if uncommited changes are detected.
Here an example for the resulting version:
"U-Boot 1.1.4-g3457ac18-dirty"
The version is now maintained in the toplevel Makefile and the
version headers are autogenerated.
Patch by Stefan Roese, 9 Feb 2006
* lots of bugfixes in the assembler code
* reverted hardware.h back to original
* enabled hardware DRAM calibration
* GCC-4 fix: modified GLOBAL_DATA_POINTER macro
done so far:
* created zylonite board dir (based on lubbock)
* extended some - but not all pxa sources and headers for Intel
Monahans support (CONFIG_CPU_MONAHANS)
* created Makefile zylonite target + MAKEALL entry
* added some debug nonsense, remove later, grep for mk@tbd
Status: compiles (eldk-4.0), and can be started with BDI, but runs forever
and doesn't halt at breakpoints. Hmmm...
To match the U-Boot user interface on ARM platforms to the U-Boot
standard (as on PPC platforms), some messages with debug character
are removed from the default U-Boot build.
Enable DEBUG for lib_arm/board.c to enable debug messages.
New CONFIG_DISPLAY_CPUINFO and CONFIG_DISPLAY_BOARDINFO options.
Patch by Stefan Roese, 24 Jan 2006
OF_STDOUT_PATH specifies the path to the device the kernel can use
for console output
OF_SOC specifies the proper name of the SOC node if one exists.
Patch by Kumar Gala 11 Jan 2006
CONFIG_OF_HAS_BD_T will put a copy of the bd_t
into the resulting flat device tree.
CONFIG_OF_HAS_UBOOT_ENV will copy the environment
variables from u-boot into the flat device tree
Patch by Kumar Gala 11 Jan 2006
If a host controller sets up a region as prefetchable and
a device's BAR denotes it as prefetchable, allocate the
BAR into the prefetch region.
If a BAR is prefetchable and no prefetchable region has
been setup by the controller we fall back to allocating
the BAR into the normally memory region.
Patch by Kumar Gala 11 Jan 2006
- Changed GPIO setup to enable another address line in order to
address 64M of FLASH.
- Added function sdram_tr1_set to auto calculate the tr1 value for
the DDR.
Patch by Steven Blakeslee, 12 Dec 2005
- Support for TQM8541/8555 boards added.
- Complete rework of TQM8540/8560 support.
- Common TQM85xx code now supports all current TQM85xx platforms
(TQM8540/8541/8555/8560).
- DDR SDRAM size detection added.
- CAS latency default values can be overwritten by setting "serial#"
to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used.
If problems are detected with this non default CAS latency,
the defualt values will be used instead.
- FLASH size detection added.
- Moved FCC ethernet driver initialization behind TSEC driver init
-> TSEC is first device.
Patch by Stefan Roese, 30 Nov 2005
On PPC44x platforms, the startup message generated in "cpu.c" only
comprised the ppc type and revision but not additional informations
like speed etc. Those speed infos where printed in the board specific
code. This new implementation now prints all CPU infos in the common
cpu specific code. No board specific code is needed anymore and
therefore removed from all current 44x implementations.
Patch by Stefan Roese, 27 Nov 2005
- Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c
- CFG_FLASH_QUIET_TEST added to use the common CFI driver
for bank autodetection
Patch by Stefan Roese, 22 Nov 2005
Patch by Anders Larsen, 07 Oct 2005
The Atmel errata #11 states that the transfer buffer descriptor
table must be aligned on a 16-word boundary. As it turned out, this
is insufficient - it seems the table must be aligned on a boundary
at least as large as the table itself (in Linux this is not an
issue - the table is aligned on a PAGE_SIZE (4096) boundary).
Correct addessing errors in platform files.
Split off common core module data from Integrator header files to
include/armcoremodule.h.
Patch by Peter Pearse, 04 Oct 2005
- Resolve the FIXME with respect to saving the u-boot environment.
- Make the default load address land in real memory.
- Fix lan91c96 SMC_{in,out}{b,w,l}() macros
Patch by David Brownell, 10 Mar 2005
- fix for ES2 differences.
- switch to using the cfi_flash driver.
- fix SRAM build address.
- fix for GP device operation.
- unlock SRAM for GP devices.
- display more device information.
- fix potential deadlock in omap24xx_i2c driver.
- fix DLL load values to match dpllout*1 operation.
- fix 2nd chip select init for combo DDR device.
- add support for CFI Intel 28F256L18 on H4 board.
Patch by Richard Woodruff, 03 Mar 2005
Use drivers/cfi_flash.c instead of private flash driver;
Remove hardcoded personalized settings from omap5912osk.h;
Fix spacing with (RO) marks in 'flinfo' output.
Patch by Michael Bendzick, 14 Jan 2005
The virtex2 FPGA download code watches for init going active during
a download of config data as an error condition. init also goes
active after a configuration is finished in concert with the done
signal. So far, the code does not check for done active until all
of the configuration data is sent. If configuration data has a few
extra pad bytes at the end, this would cause an error message even
though the download had suceeded.
NOTE: virtex2 slave serial and spartan2 versions may still have the
same problem.
Patch by Andrew Dyer, 12 Jan 2005
Fix "WARNING: flash_make_cmd: unsuppported LittleEndian mode"
message when probing for nonexistent flash in little endian mode.
As a side effect more efficient and smaller code is generated,
which is always a Good Thing (TM).
Patch by Ladislav Michl, 24 Sep 2005
Use the approved environment variable names. Added "tftpdstp" to
allow ports other than 69 per Tolunay Orkun's recommendation.
Patch by Jerry Van Baren, 12 Jan 2005
Add support for gzip compressed bmp's (CONFIG_VIDEO_BMP_GZIP).
Add support for eeprom write-enable (CFG_EEPROM_WREN).
Patch by Stefan Roese, 22 Sep 2005
The global data pointer, stored in r29 before relocation to RAM, was
not initialized to a correct value. This happened because the pointer
declaration was done locally in the scope of the board_init_f()
function. What follows is a cite from gcc.info, 5.37, "Variables in
Specified Registers":
...
The compiler's data flow analysis is capable of determining where
the specified registers contain live values, and where they are
available for other uses. Stores into local register variables
may be deleted when they appear to be dead according to dataflow
analysis. References to local register variables may be deleted
or moved or simplified.
...
Moving the global data declaration to global scope solved the
problem.
- make watchdog driver work on systems with an IPB clock
frequency of 133 MHz (watchdog expired to fast there).
- now all three watchdog chain entries could be used.
- fix some typos.
Patch by Martin Krause, 23 Jun 2005
so we can use them to, e.g., check the existence of a file with
"if ls foo; then this; else that; fi" in the hush shell
Patch by Andreas Engel, 16 August 2005
Second serial port on 440GX now defined as a system device.
Add 'Short Etch' code for Cicada PHY within 440gx_enet.c
Patch by Travis B. Sawyer, 12 Jul 2005
Check return value of malloc in 440gx_enet.c
Patch by Travis B. Sawyer, 18 Jul 2005
Incorrect gcc options (big endian -BE switch) were used for
dbau1550_el which is a little endian build; also get rid of reference
to non-existant cpu/mips/little/liblittle.a library
Old, obsolete and duplicated code was cleaned up and replace by the
new partitioning method. There are two possible approaches now:
* define a single, static partition
* use mtdparts command line option and dynamic partitioning
Default is static partitioning.
The code is provided for, and was tested on, the Yukon/Alaska
and PM520 boards only.
A bug in flash_real_protect() for the Yukon board was fixed by adding
a function that tells if two banks are on one flash chip.
This fixes a problem of displaying bogus voltages when the voltages
are so low that the I2C devices start failing while the rest of the
system keeps running.
Implemented support for MPC8548CDS board.
Added DDR II support based on SPD values for MPC85xx boards.
This roll-up patch also includes bugfies for the previously
published patches:
DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
- Convert the CPM2 based functionality to use new CONFIG_CPM2
option rather than a myriad of CONFIG_MPC8560-like variants.
Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
Eliminates the CONFIG_MPC8560 option entirely. Distributes the
new CONFIG_CPM2 option to each 8260 board.
A new, Windows compatible init sequence was also backported from Linux 2.6,
but disabled with #undef NEW_INIT_SEQ as it wouldn't change the behaviour
of the memopry sticks we tested. Maybe it's not relevant for mass storage
devices. For recerence, see file common/usb.c, function usb_new_device(),
section #ifdef NEW_INIT_SEQ.
* Add MPC8220 boards to MAKEALL script
* Add EEPROM and RTC support for HMI1001 board
* Patch by Detlev Zundel, 20 Jun 2005:
Fix initialization of low active GPIO pins on inka4x0 board
Initialize allocated dev and private hw structures
after their respective allocation in 440gx_enet.c
* Patch by Steven Scholz, 10 Jun 2005:
Fix byteorder problems with second argument of "bootm" with
standalone images;
Update for P3G4
Fix problems in cmd_universe.c
* Patch by Matthias Fuchs, 03 May 2005:
Added missing variable declaration in cmd_nand.c
Modified CFG_PCI_PTM1MS in configs/PLU405.h to map 128MB ram
Add i2c_reg_write() and i2c_reg_write() for at91rm9200 I2C
* Patch by Steven Scholz, 07 Apr 2005:
Fix compiler warning in altera.c
* Patch by Ladislav Michl, 06 Apr 2005:
Fix voiceblue configuration.
Updates for OCOTEA board:
- Changed U-Boot size from 512kByte to 256kByte
- Fixed flash driver to support boot from soldered user flash
- Added README for switch from PIBS firmware to U-Boot
- update the pxa-regs.h file for PXA27x chips
- add PXA27x based ADSVIX board
- add support for MMC on PXA27x processors
* Patch by Andrew E. Mileski, 28 Nov 2004:
Fix PPC4xx SPD SDRAM detection bug
* Patch by Hiroshi Ito, 26 Nov 2004:
Fix logic of "test -z" and "test -n" commands
- Use i.MX watchdog timer for reset_cpu()
- Move reset_cpu() out of cpu/arm920t/start.S into the SoC specific
subdirectories cpu/arm920t/imx/ and cpu/arm920t/s3c24x0/
(now in interupts.c)
- remove all references to CONFIG_INIT_CRITICAL for ARM based boards
- introduce two new configuration options instead:
CONFIG_SKIP_LOWLEVEL_INIT and CONFIG_SKIP_RELOCATE_UBOOT
- Add low-boot option for MPC8260ADS board (if lowboot is selected,
the jumper for the HRCW source should select flash. If lowboot is
not selected, the jumper for the HRCW source should select the
BCSR.
- change default load base address to 0x00400000
Add support for Analogue & Micro Rattler boards.
Tested on Rattler8248.
* Patch by Andre Renaud, 08 Nov 2004:
Fix watchdog support in common/lcd.c
* Patch by Marc Leeman, 05 Nov 2003:
Enable all 4 PCMBRW buffers for the MPC8245 processor since the CPU
bug only affects the XPC8245 processors
Add call to eth_halt() in net/net.c when called functions fail
after eth_init() has been called.
* Patch by Sam Song, 3 April 2005:
- Update README.Netconsole
- Update README
add SNTP support and expand time server and time offset fields of
DHCP support. See doc/README.SNTP
* Patch by Steven Scholz, 13 Dec 2004:
Fix bug in at91rm920 ethernet driver
- use TQM5200_auto as MAKEALL target for TQM5200 systems
- add support for SM501 graphics controller
- add support for graphic console on TQM5200
- add support for TQM5200 Rev 200
- cleanup, fix typo in include/configs/TQM5200.h
- Change the name of the Ethernet driver: MOTO ENET -> ENET
- Reformat boot messages
- Enable redundant environment
- Replace the -O2 optimization flag with -mno-string
(common/cmd_ide.c, common/cmd_reiser.c, common/cmd_scsi.c).
* Enable USB and IDE support for INKA4x0 board
* Patch by Andrew Dyer, 28 February 2005:
fix ext2load passing an incorrect pointer to get_partition_info()
resulting in load failure for devices other than 0
* Add reset code for Coral-P on INKA4x0 board
* Patch by Martin Krause, 28 Jun 2004:
Update for TRAB board.
* Fix some missing "volatile"s in MPC5xxx FEC driver
- don't insist on leading '/' for filename in ext2load
- set default partition to useful value (1) in ext2load
* Patch by Andrew Dyer, 08 Jan 2005:
fix wrong return codes in ext2 code
makes 'ld' to overlook binary objects compatibility.
* Moved $(PLATFORM_LIBS) from the library group (--start-group ...
--end-group) outside of the group. This will make 'ld' to do
_multiple_ search in the library group when resolving symbol
references and do only a _single_ seach in libgcc.a after the group
search.
* Fix stability problems on CPC45 board again.
* Make image detection for diskboot / usbboot / scsiboot more robust
(also check header checksum)
Add standalone application to change SMC91C111 MAC addresses,
see examples/README.smc91111_eeprom
* Patch by Xiaogeng (Shawn) Jin, 12 Oct 2004:
Fix Flash support for ARM Integrator CP.
* Patch by Richard Woodruff, 10 Jan 2005:
Update support for OMAP2420 (ARM11) and H4 board:
o clean up and add new types to H4 memory probe code.
o fix to work with internal boot.
o added PRCM config III operation.
o fix marginal flash timings.
o add revison ATAG usage.
o enable voltage scaling at power chip.
o fix compile error for i2c.
* Fix network problem (error when receiving multiple ARP packets)
- Add RESET/PREBOOT/AUTOBOOT support for RPXlite_DW board
- Adjust CPU:BUS frequency ratio 1:1 when core frequency
less than 50MHz
* Patch by Sam Song, 10 Oct 2004:
Fix a parameter error in run_command() in main.c
add support for the TI OMAP2420 processor and its H4 reference
board
* Patch by Christian Pellegrin, 24 Sep 2004:
Added support for NE2000 compatible (DP8390, DP83902) NICs.
- add u-boot.hex target in the top level Makefile
- add support for the UNSW/NICTA PLEB 2 board (pleb2)
- use -mtune=xscale and -march=armv5 options for PXA
mpc824x: set PCI latency timer to a sane value
(is 0 after reset).
* Patch by Kurt Stremerch, 03 Sep 2004:
Add bitstream configuration option for fpga command (Xilinx only).
Add Xilinx Spartan2E family FPGA support
* Patch by Jeff Angielski, 02 Sep 2004:
Add Added support for H2 revision of the EP8260 board.
Fixed formatting for some of the EP8260 related source files.
Reset monitor size back to 256 so environment can be written
to flash on MPC85xx ADS and CDS releases.
* Patch by Paolo Broggini, 02 Sep 2004:
Make BSS clearing on ARM systems more robust
* Patch by Yue Hu and Joe, 01 Sep 2004:
- add PCI support for ixp425;
- add EEPRO100 suppor tfor ixdp425 board.
* Fix problem with protected sector detection in driver/cfi_flash.c
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
additional ethernet addresses.
* Cleanup drivers/i82365.c - avoid duplication of code
* Fix bogus "cannot span across banks" flash error message
* Add support for CompactFlash for the CPC45 Board.
* Adjust MIPS compiler options at run-time depending on tools version
("-march=4kc -mtune=4kc -Wa,-mips_allow_branch_to_undefined" for new,
"-mcpu=4kc" for old tools)
- Add support to revA version of PQ27 and PQ27E.
- Reverted MPC8260ADS baudrate back to original 115200
* Patch by Hojin, 17 Sep 2004:
Fix typo in cfi_flash.c
* Patch by Mark Jonas, 09 September 2004:
mtest's data line test (with CFG_ALT_MEMTEST set) returned a wrong
error message
* Patch by Mark Jonas, 31 August 2004:
Added option CFG_XLB_PIPELINING to enable XLB pipelining. This
improves FTP performance for MPC5200 systems. Enabled for IceCube
by default.
- Improve platform.S code for omap1510inn that detects whether code
is running from SDRAM or not. Patch allows SDRAM to be configured
if code is running out of SRAM at 0x20000000.
* Patch by Frederick Klatt, 30 Aug 2004:
Add support for the Wind River SBC8540/SBC8560 boards
* Patches by Michael Bendzick, 30 Aug 2004:
- Configure omap1510inn board to use drivers/cfi_flash.c
- Make drivers/cfi_flash.c protect environment and redundant
environment.
* Patch by Steven Scholz, 23 Jun 2004:
- Add script (tools/img2brec.sh) to programm U-Boot into
(Synch)Flash using the Bootstrap Mode of the MC9328MX1/L
- Fix PCI window on MPC85xx; remove unneeded PCI initialization
from board_early_init_f()
- Provide SW workaround for PCI initialization on 85xx CDS
- Convert MPC85xxADS to use common CFI flash driver
* Cleanup: avoid compiler warnings
* Add CMC PU2 board to MAKEALL script
* Patch by Hinko Kocevar, 21 Aug 2004:
- Group common framebuffer functions in common/lcd.c
- Group common framebuffer macros and #defines in include/lcd.h
- Provide calc_fbsize() for video ATAG
- Fix a typo in README
- Align "(RO)" output for "flinfo" after "protect on"
- Add RESET support for RPXlite_DW board; adjust CPU:BUS frequency
ratio 1:1 when core frequency less than 50MHz
- Introducing the concept of SoCs "./cpu/$(CPU)/$(SOC)"
- creating subdirs for SoCs ./cpu/arm920t/imx and ./cpu/arm920t/s3c24x0
- moving SoC specific code out of cpu/arm920t/ into cpu/arm920t/$(SOC)/
- moving drivers/s3c24x0_i2c.c and drivers/serial_imx.c out of drivers/
into cpu/arm920t/$(SOC)/
- Added support for both 8 and 16 bit mode access to System ACE CF
through MPU.
- Fixed missing System ACE CF device during get FAT partition info
in fat_register_device function.
- Enabled System ACE CF support on ML300.
* Patch by Sean Chang, 09 Aug 2004:
Synch defines for saveenv and do_saveenv functions so they get
compiled under the same statement.
- Added I2C support for ML300.
- Added support for ML300 to read out its environment information
stored on the EEPROM.
- Added support to use board specific parameters as part of
U-Boot's environment information.
- Updated MLD files to support configuration for new features
above.
* Patches by Travis Sawyer, 5 Aug 2004:
- Remove incorrect bridge settings for eth group 6
- Add call to setup bridge in ppc_440x_eth_initialize
- Fix ppc_440x_eth_init to reset the phy only if its the
first time through, otherwise, just check the phy for the
autonegotiated speed/duplex. This allows the use of netconsole
- only print the speed/duplex the first time the phy is reset.
- Fix host tools building in Cygwin environment
- Fix header files search order for host tools
* Patch by Tom Armistead, 19 Jul 2004:
Fix kgdb.S support for 74xx_75x cpu
Set the PCI class code for JSE board as part of PCI interface setup
* Patch by Michael Bendzick, 15 Jul 2004:
Fix problem with writes with odd sizes in drivers/cfi_flash.c when
CFG_FLASH_USE_BUFFER_WRITE is set
Allow clock setting on MPC866/MPC885 series chips according to
environment variable `cpuclk'
* Patch by Yuli Barcohen, 20 Apr 2004:
Remove unnecessary redefine of CPM_DATAONLY_SIZE for MPC826x
Update etags build target
* Improve NetConsole support: add support for broadcast destination
address and buffered input.
* Cleanup compiler warnings for GCC 3.3.x and later
* Fix problem in cmd_jffs2.c introduced by CFG_JFFS_SINGLE_PART patch
change timing for SM501 graphics controller on TQM5200 module
* Patch by Mark Jonas, 13 July 2004:
- Total5200 LCD now run in little endian mode. Endianess conversion
is done in hardware.
- Removed last reference to "console" environment variable.
- move at45.c to board/at91rm9200dk/ since this is at91rm9200dk
board specific
- split out the LXT971A PHY from ns_9750_eth.h
- split the dm9161 phy part out of at91rm9200_ether.c
Replaced hardcoded PL011 clock frequency with config variable.
Fixed wrong CONFIG_CMD_DFL doc.
* Patch by Thomas Viehweger, 09 Jun 2004:
make it possible to remove chpart when there is only one partition
- support larger DDR memories up to 2G on the PC8540/8560ADS and
STXGP3 boards
- Made MPC8540/8560ADS be 33Mhz PCI by default.
- Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16
and CONFIG_L2_INIT_RAM options.
- Refactor Local Bus initialization out of SDRAM setup.
- Re-implement new version of LBC11/DDR11 errata workarounds.
- Moved board specific PCI init parts out of CPU directory.
- Added TLB entry for PCI-1 IO Memory
- Updated README.mpc85xxads
* Patch by Sascha Hauer, 28 Jun:
- add generic support for Motorola i.MX architecture
- add support for mx1ads, mx1fs2 and scb9328 boards
* Patches by Marc Leeman, 23 Jul 2004:
- Add define for the PCI/Memory Buffer Configuration Register
- corrected comments in cpu/mpc824x/cpu_init.c
* Add support for multiple serial interfaces
(for example to allow modem dial-in / dial-out)
- update mach-types.h to latest arm.linux.org.uk master list
- Set correct OMAP1610 bi_arch_number for build target
* Patch by Curt Brune, 06 Jul 2004:
evb4510: add support for timer interrupt; cleanup
* Patch by Mark Jonas, 05 Jul 2004:
add support for the Total5100's and Total5200's LCD screen
* Patches by Dan Eisenhut, 01 Jul 2004:
- README fixes.
- Move doc2000.h include to prevent compiler warning on some boards
Add initialization for Integrator and versatile board files.
* Patch by Hinko Kocevar, 01 Jun 2004:
Fix VFD FB allocation, add LCD FB allocation on ARM
- add empty include/asm-microblaze/processor.h
- add to CREDITS and MAINTAINERS
- add gd initialization
- add MicroBlaze and SUZAKU board to MAKEALL script
- add reset support for SUZAKU
- add flush_cache() for MicroBlaze
- add CFG_FLASH_SIZE to include/configs/suzaku.h since we have fixed
size flash memory on SUZAKU
* Patch by Daniel Poirot, 24 Jun 2004:
Add support for Wind River's sbc8240 board
* Patches by Yasushi Shoji, 26 Jun 2004:
- drivers/serial_xuartlite.c: fix "return 0" in void function
- add microblaze support to mkimage tool
Add support for WindRiver's SBC8560 board
* Patch by Nicolas Lacressonniere, 24 Jun 2004
Small Bugs fixes for "at91rm9200dk" board:
- Timing modifications for SPI DataFlash access
- Fix NAND flash detection bug
* Patch by Nicolas Lacressonniere, 24 Jun 2004:
Add Support for Flash AT49BV6416 for AT91RM9200DK board
Completion of the 8540ADS/8560ADS updates:
Fix some PCI and Rapid I/O memory maps,
Initialize both TSEC 1 and 2,
Initialize SDRAM
Update MAINTAINER for 85xx boards and README.mpc85xxads
Remove obsolete AdderII port which was superseded by unified
AdderII/Adder87x port
* Patch by Ladislav Michl, 16 Jun 2004:
Fix gcc-3.3.3 warnings for smc91111.c
- DDR Ram support for PM520 (MPC5200)
- support for different flash types (PM520)
- USB / IDE / CF-Card / DiskOnChip support for PM520
- 8 bit boot rom support for PM520/CE520
- Add auto SDRAM module detection for MicroSys CPC45 board (MPC8245)
- I2C and RTC support for CPC45
- support of new flash type (28F160C3T) for CPC45
fix support for Logic SDK-LH7A404 board and clean up the
LH7A404 register macros.
* Patch by Matthew McClintock, 10 Jun 2004:
Modify code to select correct serial clock on Sandpoint8245
Add support for Analogue&Micro Adder87x and the older AdderII board.
* Patch by Ming-Len Wu, 09 Jun 2004:
Add suppport for MC9328 (Dargonball) CPU and Motorola MX1ADS board
- Make MPC5200 boards evaluate the SVR to print processor name and
version in checkcpu() (cpu/mpc5xxx/cpu.c).
* Patch by Kai-Uwe Bloem, 06 May 2004:
Fix endianess problem in cramfs code
Add support for MAX6900 RTC
* Patches by Ladislav Michl, 03 Jun 2004:
- fix cfi_flash.c on LE systems
- let 'make mrproper' delete u-boot.img as well
- turn printf into debug in cfi_flash.c
On OMAP1610 platforms check if booting from RAM(CS0) or flash(CS3).
Set flash base accordingly, and decide whether to do or skip board
specific setup steps.
* Patch by Josef Baumgartner, 26 May 2004:
Add missing define in include/asm-m68k/global_data.h
Add missing functions get_ticks() and get_tbclk() in lib_m68k/time.c
* Patch by Paul Ruhland, 24 May 2004:
fix SDRAM initialization for LPD7A400 board.
- Add support for the Logic Zoom LH7A40x based SDK board(s),
specifically the LPD7A400.
* Patches by Robert Schwebel, 15 May 2004:
- call MAC address reading code also for SMSC91C111;
- make SMSC91C111 timeout configurable, remove duplicate code
- fix get_timer() for PXA
- update doc/README.JFFS2
- use "bootfile" env variable also for jffs2
Dynamically handle REV1 and REV2 MPC85xx parts.
(Jon Loeliger, 10-May-2004).
New consistent memory map and Local Access Window across MPC85xx line.
New CCSRBAR at 0xE000_0000 now.
Add RAPID I/O memory map.
New memory map in README.MPC85xxads
(Kumar Gala, 10-May-2004)
Better board and CPU identification on MPC85xx boards at boot.
(Jon Loeliger, 10-May-2004)
SDRAM clock control fixes on MPC8540ADS & MPC8560 boards.
Some configuration options for MPC8540ADS & MPC8560ADS cleaned up.
(Jim Robertson, 10-May-2004)
Rewrite of the MPC85xx Three Speed Ethernet Controller (TSEC) driver.
Supports multiple PHYs.
(Andy Fleming, 10-May-2004)
Some README.MPC85xxads updates.
(Kumar Gala, 10-May-2004)
Copyright updates for "Freescale"
(Andy Fleming, 10-May-2004)
Add support for OMAP730 Perseus2 Development board
* Patch by Alan J. Luse, 29 Apr 2004:
Fix flash chip-select (OR0) option register setting on FADS boards.
* Patch by Alan J. Luse, 29 Apr 2004:
Report MII network speed and duplex setting properly when
auto-negotiate is not enabled.
* Patch by Jarrett Redd, 29 Apr 2004:
Fix hang on reset on Ocotea board due to flash in wrong mode.
- Rename DUET_ADS to MPC885ADS
- Rename CONFIG_DUET to CONFIG_MPC885_FAMILY
- Rename CONFIG_866_et_al to CONFIG_MPC866_FAMILY
- Clean up FADS family port to use the new defines
Using external watchdog for KUP4 boards in mpc8xx/cpu.c;
load_sernum_ethaddr() for KUP4 boards in lib_ppc/board.c;
various changes to KUP4 board specific files
* Fixes for SL811 USB controller:
- implement workaround for broken memory stick
- improve error handling
* Increase packet send timeout to 10 ms in cpu/mpc8xx/scc.c to better
cope with congested networks.
(JFFS2 speed enhancements) because of using non-public
data (PHYS_FLASH_SECT_SIZE)
* Patch by Travis Sawyer, 23 Apr 2004:
Fix VSC/CIS 8201 phy descrambler interoperability timing due to
errata from Vitesse Semiconductor.
JFFS2 speed enhancements:
- repair header CRC calculation in jffs2_1pass.c
- add eraseblock size to the partition information to skip empty
eraseblocks if we find more then 4k of free space.
- The JFFS2 scanner is now fast enough to remove the spinning wheel
so #ifdef-ed out.
- add watchdog calls in long running loops
* Patch by Philippe Robin, 22 Apr 2004:
Fix ethernet configuration for "versatile" board
* Patch by Kshitij Gupta, 21 Apr 2004:
Remove busy loop and use MPU timer fr usleep() on OMAP1510/1610 boards
* Patch by Steven Scholz, 24 Feb 2004:
Fix a bug in AT91RM9200 ethernet driver:
The MII interface is now initialized before accessing the PHY.
* Cleanup PCI ID's
Use U-boot's miiphy.h for PHY register names, rather than
introducing a new header file.
* Update pci_ids.h from linux-2.4.26
* Patch by Masami Komiya, 19 Apr 2004:
Fix problem cause by VLAN function on little endian architecture
without VLAN environment
sticks (including FAT / VFAT filesystem support)
* Add SL811 Host Controller Interface driver for USB
* Add CFG_I2C_EEPROM_ADDR_OVERFLOW desription to README
* Patch by Pantelis Antoniou, 19 Apr 2004:
Allow to use shell style syntax (i. e. ${var} ) with standard parser.
Minor patches for Intracom boards.
* Patch by Christian Pell, 19 Apr 2004:
cleanup support for CF/IDE on PCMCIA for PXA25X
Enable ranges in mii command, e.g. mii read 0-1f 0 or
mii read 4-7 18-1a. Also add mii dump subcommand for
pretty-printing standard regs 0-5.
* Patch by Stephen Williams, 16 April 2004:
fix typo in JSE.h; update MAINTAINERS
fix initdram function for utx8245 board
* Patch by Markus Pietrek, 14 Apr 2004:
use ATAG_INITRD2 instead of deprecated ATAG_INITRD tag
* Patch by Reinhard Meyer, 18 Apr 2004:
provide the IDE Reset Function for EMK 5200 boards
* Patch by Masami Komiya, 12 Apr 2004:
fix pci_hose_write_config_{byte,word}_via_dword problems
- Add support for RPC/STx GP3, Motorola 8560 board
- Update 85xx TSEC driver so it searches MII for first available PHY
and uses that one.
- Add functions to support console MII commands.
* Patch by Tolunay Orkun, 07 Apr 2004:
Move initialization of bi_iic_fast[]
from board_init_f() to board_init_r()
* Patch by Yasushi Shoji, 07 Apr 2004:
Cleanup microblaze port
* Patch by Sangmoon Kim, 07 Apr 2004:
Add auto SDRAM module detection for Debris board
- add support for a new version of an Intracom board and fix
various other things on others.
- add verify support to the crc32 command (define
CONFIG_CRC32_VERIFY to enable it)
- fix FEC driver for MPC8xx systems:
1. fix compilation problems for boards that use dynamic
allocation of DPRAM
2. shut down FEC after network transfers
- HUSH parser fixes:
1. A new test command was added. This is a simplified version of
the one in the bourne shell.
2. A new exit command was added which terminates the current
executing script.
3. Fixed handing of $? (exit code of last executed command)
Improve and fix various things in the MPC8xx FEC driver:
1. The new 87x and 88x series of processors have two FECs,
and the new driver supports them both.
2. Another change in the 87x/88x series is support for
the RMII (Reduced MII) interface. However numerous
changes are needed to make it work since the PHYs
are connected to the same lines. That means that
you have to address them correctly over the MII
interface.
- add support for the Epson 156x series of graphical displays
(These displays are serial and not suitable for using a normal
framebuffer console on them)
- add infrastructure needed in order to POST any DSPs in a board
- add auto-complete support to the U-Boot CLI
- add support for NETTA and NETPHONE boards; fix NETVIA board
* Patch by Yuli Barcohen, 28 Mar 2004:
- Add support for MPC8272 family including MPC8247/8248/8271/8272
- Add support for MPC8272ADS evaluation board (another flavour of MPC8260ADS)
- Change configuration method for MPC8260ADS family
Add Reiserfs support
* Patch by Hinko Kocevar, 20 Mar 2004
- Add auto-release for SMSC LAN91c111 driver
- Add save/restore of PTR and PNR regs as suggested in datasheet
Increase speed of sector reads from SystemACE,
shorten poll timeout and remove a useless reset
* Patch by Tolunay Orkun, 19 Mar 2004:
Make GigE PHY 1000Mbps Speed/Duplex detection conditional
(CONFIG_PHY_GIGE)
* Patch by Brad Kemp, 18 Mar 2004:
prevent machine checks during a PCI scan
* Patch by Pierre Aubert, 18 Mar 2004:
Fix string cleaning in IDE identification
- Unify video mode handling for Chips & Technologies 69000 Video
chip and Silicon Motion SMI 712/710/810 Video chip
- Add selection of the video output (CRT or LCD) via 'videoout'
environment variable for the Silicon Motion
- README update
* Patch by Pierre Aubert, 18 Mar 2004:
include/common.h typo fix
* Patches by Tolunay Orkun, 17 Mar 2004:
- Add support for bd->bi_iic_fast[] initialization via environment
variable "i2cfast" (CONFIG_I2CFAST)
- Add "i2cfast" u-boot environment variable support for csb272
Ignore '\0' characters in console input for use with telnet and
telco pads.
* Patch by Leon Kukovec, 17 Mar 2004:
typo fix for strswab prototype #ifdef
- show PCI clock frequency on MPC8260 systems
- add FCC_PSMR_RMII flag for HiP7 processors
- in do_jffs2_fsload(), take load address from load_addr if not set
explicit, update load_addr otherwise
- replaced printf by putc/puts when no formatting is needed
(smaller code size, faster execution)
avoid dereferencing NULL pointer in lib_arm/armlinux.c
* Patch by Stephen Williams, 15 Mar 2004:
Fix CONFIG_SERIAL_SOFTWARE_FIFO documentation
* Patch by Tolunay Orkun, 15 Mar 2004:
Initialize bi_opbfreq to real OPB frequency via get_OPB_freq()
* Patch by Travis Sawyer, 15 Mar 2004:
Update CREDITS & MAINTAINERS files for PPC440GX & Ocotea port
attempting to switch on USB on SX1 board.
* Patch by Josef Wagner, 18 Mar 2004:
- Add support for MicroSys XM250 board (PXA255)
- Add support for MicroSys PM828 board (MPC8280)
- Add support for 32 MB Flash on PM825/826
- new SDRAM refresh rate for PM825/PM826
- added support for MicroSys PM520 (MPC5200)
- replaced Query by Identify command in CPU86/flash.c
to support 28F160F3B
* Fix wrap around problem with udelay() on ARM920T
* Add support for Macronix flash on TRAB board
- Adding get_ticks() and get_tbclk() for AT91RM9200
- Many white space fixes in cpu/at91rm9200/interrupts.c
* Patches by Steven Scholz, 20 Feb 2004:
some cleanup in AT91RM9200 related code
- Fix Gigabit Ethernet support for 440GX
- Add Gigabit Ethernet Support to MII PHY utilities
* Patch by Brad Kemp, 12 Mar 2004:
Fixes for drivers/cfi_flash.c:
- Better support for x8/x16 implementations
- Added failure for AMD chips attempting to use CFG_FLASH_USE_BUFFER_WRITE
- Added defines for AMD command and address constants
* Patch by Leon Kukovec, 12 Mar 2004:
Fix get_dentfromdir() to correctly handle deleted dentries
* Patch by George G. Davis, 11 Mar 2004:
Remove hard coded network settings in TI OMAP1610 H2
default board config
* Patch by George G. Davis, 11 Mar 2004:
add support for ADS GraphicsClient+ board.
- add bitmap command and splash screen support in cfb console
- add [optional] origin in the bitmap display command
* Patch by Travis Sawyer, 11 Mar 2004:
Fix ocotea board early init interrupt setup.
* Patch by Thomas Viehweger, 11 Mar 2004:
Remove redundand code; add PCI-specific bits to include/mpc8260.h
- Add support for the SSV ADNP/ESC1 (Nios Softcore)
* Patch by George G. Davis, 9 Mar 2004:
fix recent build failure for SA1100 target
* Patch by Travis Sawyer, 09 Mar 2004:
Support native interrupt mode for the IBM440GX.
Previously it was running in 440GP compatibility mode.
Added ARM Integrator AP, CP and Versatile PB926EJ-S Reference
Platform support.
* Patch by Masami Komiya, 08 Mar 2004:
Don't overwrite server IP address or boot file name
when the boot server does not return values
* Patch by listmember@orkun.us, 5 Mar 2004:
Removed compile time restriction on CFG_I2C_SPEED for DS1338 RTC
Fix early board initialization for Cogent CSB272 board
* Patch by Ed Okerson, 3 Mar 2004:
fix CFI flash writes for little endian systems
* Patch by Reinhard Meyer, 01 Mar 2004:
generalize USB and IDE support for MPC5200 with according
changes to IceCube.h and TOP5200.h
add Am29LV256 256 MBit FLASH support for TOP5200 boards
add info about USB and IDE to README
Fix problems with GCC 3.3.x which changed handling of global
variables explicitly initialized to zero (now in .bss instead of
.data as before).
* Patch by Leon Kukovec, 02 Mar 2004:
add strswab() to fix IDE LBA capacity, firmware and model numbers
on little endian machines
* Patch by Masami Komiya, 02 Mar 2004:
- Remove get_ticks() from NFS code
- Add verification of RPC transaction ID
* Patch by Pierre Aubert, 02 Mar 2004:
cleanup for IDE and USB drivers for MPC5200
Ocotea:
- Add IBM PPC440GX Ref Platform support (Ocotea)
Original code by Paul Reynolds <PaulReynolds@lhsolutions.com>
Adapted to U-Boot and 440GX port
440gx_enet.c:
- Add gracious handling of all Ethernet Pin Selections for 440GX
- Add RGMII selection for Cicada CIS8201 Gigabit PHY
ppc440.h:
- Add needed bit definitions
- Fix formatting
* Patch by Carl Riechers, 1 Mar 2004:
Add PPC440GX prbdv0 divider to fix memory clock calculation.
* Patch by Stephan Linz, 27 Feb 2004
- avoid problems for targets without NFS download support
- Added LBA48 support (CONFIG_LBA48 & CFG_64BIT_LBA)
- Added support for 64bit printing in vsprintf (CFG_64BIT_VSPRINTF)
- Added support for 64bit strtoul (CFG_64BIT_STRTOUL)
* Patch by Masami Komiya, 27 Feb 2004:
Fix rarpboot: add autoload by NFS
* Patch by Dan Eisenhut, 26 Feb 2004:
fix flash_write return value in saveenv
* Patch by Stephan Linz, 11 Dec 2003
expand config.mk to avoid trigraph warnings on NIOS
* Rename "BMS2003" board into "HMI10"
Fix broken compile for XPEDITE1K target.
* Patch by Stephan Linz, 26 Feb 2004:
Bug fix for NFS code on NIOS targets
* Patch by Stephen Williams, 26 Feb 2004:
Break up SystemACE reads of large block counts
add IDE support for MPC5200
* Patch by Masami Komiya, 26 Feb 2004:
add autoload via NFS
* Patch by Stephen Williams
Use of CONFIG_SERIAL_SOFTWARE_FIFO in board.c consistent with uses
elsewhere in the source.
- Timeouts in FPGA code should be based on CFG_HZ
- Minor cleanup in code for Altera FPGA ACEX1K
* Patch by Steven Scholz, 25 Feb 2004:
Changed "Directory Hierarchy" section in README
* Patch by Masami Komiya, 25 Feb 2004:
Reduce copy count in nfs_read_reply() of NFS code
NS9750 DevBoard added
* Patch by Pierre AUBERT, 24 Feb 2004
add USB support for MPC5200
* Patch by Steven Scholz, 24 Feb 2004:
- fix MII commands to use values from last command
* Patch by Torsten Demke, 24 Feb 2004:
Add support for the eXalion platform (SPSW-8240, F-30, F-300)
Fixes for for OMAP1610 board:
- shift some IRQ specific code to platform.S file
- remove duplicatewatchdog reset code from start.S
* Make Auto-MDIX Support configurable on INCA-IP board
* Fix license for mkimage tool
Add support for S3C44B0 processor and DAVE B2 board
* Patch by Steven Scholz, 20 Feb 2004:
- Add support for MII commands on AT91RM9200 boards
- some cleanup in AT91RM9200 ethernet code
Add support for the Xilinx ML300 platform
* Patch by Stephan Linz, 17 Feb 2004:
Fix watchdog support for NIOS
* Patch by Josh Fryman, 16 Feb 2004:
Fix byte-swapping for cfi_flash.c for different bus widths
* Patch by Jon Diekema, 14 Jeb 2004:
Remove duplicate "FPGA Support" notes from the README file
- update board/emk tree; use common flash driver
- Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c
[adapted for other PPC CPUs -- wd]
- Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c
* Patch by Jon Diekema, 13 Feb 2004:
Call show_boot_progress() whenever POST "FAILED" is printed.
* Patch by Nishant Kamat, 13 Feb 2004:
Add support for TI OMAP1610 H2 Board
Fixes for cpu/arm926ejs/interrupt.c
(based on Richard Woodruff's patch for arm925, 16 Oct 03)
Fix for a timer bug in OMAP1610 Innovator
Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2
* Patches by Stephan Linz, 12 Feb 2004:
- add support for NIOS timer with variable period preload counter value
- prepare POST framework support for NIOS targets
* Patch by Denis Peter, 11 Feb 2004:
add POST support for the MIP405 board
Add support for NET+50 CPU and ModNET50 board
* Patch by Sam Song, 10 Feb 2004:
Fix typos in cfi_flash.c
* Patch by Leon Kukovec, 10 Feb 2004
Fixed long dir entry slot id calculation in get_vfatname
* Patch by Robin Gilks, 10 Feb 2004:
add "itest" command (operators: -eq, -ne, -lt, -gt, -le, -ge, ==,
!=, <>, <, >, <=, >=)
* Cleanup compiler warnings
* Fix problem with side effects in macros in include/usb.h
* Patch by David Benson, 13 Nov 2003:
bug 841358 - fix TFTP download size limit
* Fixing bug 850768:
improper flush_cache() in load_serial()
* Fixing bug 834943:
MPC8540 - missing volatile declarations
* Patch by Stephen Williams, 09 Feb 2004:
Add support for Xilinx SystemACE chip:
- New files common/cmd_ace.c and include/systemace.h
- Hook systemace support into cmd_fat and the partition manager
* Patch by Travis Sawyer, 09 Feb 2004:
Add bi_opbfreq & bi_iic_fast to 440GX bd_info as needed for Linux
o 440GX:
- Fix PCI Indirect access for type 1 config cycles with ppc440.
- Add phymode for 440 enet
- fix pci pre init
o XPedite1K:
- Change board_pre_init to board_early_init_f
- Add user flash to bus controller setup
- Fix pci pre init
- Fix is_pci_host to check GPIO for monarch bit
- Force xpedite1k to pci conventional mode (via #define option)
* Patch by Brad Kemp, 4 Feb 2004:
- handle the machine check that is generated during the PCI scans
on 82xx processors.
- define the registers used in the IMMR by the PCI subsystem.
* Patch by Pierre Aubert, 03 Feb 2004:
cpu/mpc5xxx/start.S: copy MBAR into SPR311
* Patch by Jeff Angielski, 03 Feb 2004:
Fix copy & paste error in cpu/mpc8260/pci.c
* Patch by Reinhard Meyer, 24 Jan 2004:
Fix typo in cpu/mpc5xxx/pci_mpc5200.c
1: - board/altera/common/flash.c:flash_erase():
o allow interrupts befor get_timer() call
o check-up each erased sector and avoid unexpected timeouts
- board/altera/dk1c20/dk1s10.c:board_early_init_f():
o enclose sevenseg_set() in cpp condition
- remove the ASMI configuration for DK1S10_standard_32 (never present)
- fix some typed in mistakes in the NIOS documentation
2: - split DK1C20 configuration into several header files:
o two new files for each NIOS CPU description
o U-Boot related part is remaining in DK1C20.h
3: - split DK1S10 configuration into several header files:
o two new files for each NIOS CPU description
o U-Boot related part is remaining in DK1S10.h
4: - Add support for the Microtronix Linux Development Kit
NIOS CPU configuration at the Altera Nios Development Kit,
Stratix Edition (DK-1S10)
5: - Add documentation for the Altera Nios Development Kit,
Stratix Edition (DK-1S10)
6: - Add support for the Nios Serial Peripharel Interface (SPI)
(master only)
7: - Add support for the common U-Boot SPI framework at
RTC driver DS1306
Fix flash protection/locking handling for OMAP1610 innovator board.
* Patch by Rolf Peukert, 28 Jan 2004:
fix flash write problems on CSB226 board (write with 32 bit bus width)
* Patches by Mark Jonas, 16 Jan 2004:
- fix rounding error when calculating baudrates for MPC5200 PSCs
- make sure CFG_RAMBOOT and CFG_LOWBOOT are not enabled at the same
time which is not supported
Allow bzip2 compression for small memory footprint boards
* Patch by Brad Kemp, 21 Jan 2004:
Add support for CFI flash driver for both the Intel and the AMD
command sets.
* Patch by Travis Sawyer, 20 Jan 2004:
Fix pci bridge auto enumeration of sibling p2p bridges.
* Patch by Tolunay Orkun, 12 Jan 2004:
Add some delays as needed for Intel LXT971A PHY support
* Patches by Stephan Linz, 09 Jan 2004:
- avoid warning: unused variable `piop' in board/altera/common/sevenseg.c
- make DK1C20 board configuration related to ASMI conform to
documentation
ARM memory layout fixes: the abort-stack is now set up in the
correct RAM area, and the BSS is zeroed out as it should be.
Furthermore, the magic variables 'armboot_end' and 'armboot_end_data'
of the linker scripts are replaced by '__bss_start' and '_end',
resp., which is a further step to eliminate unnecessary differences
between the implementation of the CPU architectures.
Fix Intel 28F128J3 ID in include/flash.h
* Patch by Masami Komiya, 09 Jan 2004:
add support for TB0229 board (NEC VR4131 MIPS processor)
* Patch by Leon Kukovec, 12 Dec 2003:
changed extern __inline__ into static __inline__ in
include/linux/byteorder/swab.h
Add support for IBM PPC440GX. Multiple EMAC Ethernet devices,
select MDI port based on enabled EMAC device.
Add support for XES Inc <http://www.xes-inc.com> XPedite1000 440GX
base PrPMC board.
see doc/README.MPC866 for details;
implement workaround for "SIU4" and "SIU9" silicon bugs on MPC866;
calculate CPU clock frequency from PLL register values.
* Add support for 128 MB RAM on TQM8xxL/M modules
before we can access it; add delay in case we are faster (with no
CF card inserted)
* Cleanup of some init functions
* Make sure SCC Ethernet is always stopped by the time we boot Linux
to avoid Linux crashes by early packets coming in.
* Accelerate flash accesses on LWMON board by using buffered writes
version of the repository???]
* Patch by Reinhard Meyer, 09 Jan 2004:
- add RTC support for MPC5200 based boards (requires RTC_XTAL)
* Add support for IDE LED on BMS2003 board
(exclusive with status LED!)
* Add support for PS/2 keyboard (used with PS/2 multiplexor on
BMS2003 board)
* Patches by Reinhard Meyer, 4 Jan 2004 + 7 Jan 2004:
Add common files for "emk" boards
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