add: Microblaze V5 exception handling

This commit is contained in:
Michal Simek 2007-05-08 14:52:52 +02:00
parent ab874d5047
commit 1a50f164be
3 changed files with 17 additions and 2 deletions

View File

@ -23,15 +23,16 @@
*/
#include <common.h>
#include <asm/asm.h>
void _hw_exception_handler (void)
{
int address = 0;
int state = 0;
/* loading address of exception EAR */
__asm__ __volatile ("mfs %0,rear"::"r" (address):"memory");
MFSEAR(address);
/* loading excetpion state register ESR */
__asm__ __volatile ("mfs %0,resr"::"r" (state):"memory");
MFSESR(state);
printf ("Hardware exception at 0x%x address\n", address);
switch (state & 0x1f) { /* mask on exception cause */
case 0x1:
@ -49,6 +50,11 @@ void _hw_exception_handler (void)
case 0x5:
puts ("Divide by zero exception\n");
break;
#ifdef MICROBLAZE_V5
case 0x1000:
puts ("Exception in delay slot\n");
break;
#endif
default:
puts ("Undefined cause\n");
break;

View File

@ -48,12 +48,20 @@
__asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
/* CPU dependent */
/* machine status register */
#define MFS(val) \
__asm__ __volatile__ ("mfs %0, rmsr":"=r" (val));
#define MTS(val) \
__asm__ __volatile__ ("mts rmsr, %0"::"r" (val));
/* exception status register */
#define MFSEAR(val) \
__asm__ __volatile ("mfs %0,rear":"=r" (val));
#define MFSESR(val) \
__asm__ __volatile ("mfs %0,resr":"=r" (val));
/* get return address from interrupt */
#define R14(val) \
__asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));

View File

@ -28,6 +28,7 @@
#include "../board/xilinx/ml401/xparameters.h"
#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
#define MICROBLAZE_V5 1
#define CONFIG_ML401 1 /* ML401 Board */
/* uart */