NAND: Add ECC support to NAND booting support in nand_spl/nand_boot.c
The U-Boot NAND booting support is now extended to support ECC upon loading of the NAND U-Boot image. Tested on AMCC Sequoia (440EPx) and Bamboo (440EP). Signed-off-by: Stefan Roese <sr@denx.de>
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@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2006
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* (C) Copyright 2006-2007
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* This program is free software; you can redistribute it and/or
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@ -24,27 +24,28 @@
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#define CFG_NAND_READ_DELAY \
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{ volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
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extern void board_nand_init(struct nand_chip *nand);
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extern void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd);
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extern void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte);
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extern u_char ndfc_read_byte(struct mtd_info *mtdinfo);
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extern int ndfc_dev_ready(struct mtd_info *mtdinfo);
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extern int jump_to_ram(ulong delta);
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extern int jump_to_uboot(ulong addr);
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static int nand_ecc_pos[] = CFG_NAND_ECCPOS;
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static int nand_is_bad_block(struct mtd_info *mtd, int block)
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extern void board_nand_init(struct nand_chip *nand);
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static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = block * CFG_NAND_PAGE_COUNT;
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int page_addr = page + block * CFG_NAND_PAGE_COUNT;
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if (this->dev_ready)
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this->dev_ready(mtd);
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else
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CFG_NAND_READ_DELAY;
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/* Begin command latch cycle */
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this->hwcontrol(mtd, NAND_CTL_SETCLE);
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this->write_byte(mtd, NAND_CMD_READOOB);
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this->write_byte(mtd, cmd);
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/* Set ALE and clear CLE to start address cycle */
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this->hwcontrol(mtd, NAND_CTL_CLRCLE);
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this->hwcontrol(mtd, NAND_CTL_SETALE);
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/* Column address */
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this->write_byte(mtd, CFG_NAND_BAD_BLOCK_POS); /* A[7:0] */
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this->write_byte(mtd, offs); /* A[7:0] */
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this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
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this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
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#ifdef CFG_NAND_4_ADDR_CYCLE
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@ -62,6 +63,15 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block)
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else
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CFG_NAND_READ_DELAY;
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return 0;
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}
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static int nand_is_bad_block(struct mtd_info *mtd, int block)
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{
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struct nand_chip *this = mtd->priv;
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nand_command(mtd, block, 0, CFG_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
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/*
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* Read on byte
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*/
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@ -74,39 +84,46 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block)
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static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
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{
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struct nand_chip *this = mtd->priv;
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int page_addr = page + block * CFG_NAND_PAGE_COUNT;
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u_char *ecc_calc;
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u_char *ecc_code;
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u_char *oob_data;
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int i;
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int eccsize = CFG_NAND_ECCSIZE;
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int eccbytes = CFG_NAND_ECCBYTES;
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int eccsteps = CFG_NAND_ECCSTEPS;
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uint8_t *p = dst;
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int stat;
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/* Begin command latch cycle */
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this->hwcontrol(mtd, NAND_CTL_SETCLE);
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this->write_byte(mtd, NAND_CMD_READ0);
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/* Set ALE and clear CLE to start address cycle */
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this->hwcontrol(mtd, NAND_CTL_CLRCLE);
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this->hwcontrol(mtd, NAND_CTL_SETALE);
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/* Column address */
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this->write_byte(mtd, 0); /* A[7:0] */
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this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
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this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
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#ifdef CFG_NAND_4_ADDR_CYCLE
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/* One more address cycle for devices > 32MiB */
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this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x0f)); /* A[xx:25] */
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#endif
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/* Latch in address */
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this->hwcontrol(mtd, NAND_CTL_CLRALE);
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nand_command(mtd, block, page, 0, NAND_CMD_READ0);
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/*
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* Wait a while for the data to be ready
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/* No malloc available for now, just use some temporary locations
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* in SDRAM
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*/
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if (this->dev_ready)
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this->dev_ready(mtd);
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else
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CFG_NAND_READ_DELAY;
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ecc_calc = (u_char *)(CFG_SDRAM_BASE + 0x10000);
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ecc_code = ecc_calc + 0x100;
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oob_data = ecc_calc + 0x200;
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/*
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* Read page into buffer
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*/
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for (i=0; i<CFG_NAND_PAGE_SIZE; i++)
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*dst++ = this->read_byte(mtd);
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for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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this->enable_hwecc(mtd, NAND_ECC_READ);
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this->read_buf(mtd, p, eccsize);
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this->calculate_ecc(mtd, p, &ecc_calc[i]);
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}
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this->read_buf(mtd, oob_data, CFG_NAND_OOBSIZE);
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/* Pick the ECC bytes out of the oob data */
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for (i = 0; i < CFG_NAND_ECCTOTAL; i++)
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ecc_code[i] = oob_data[nand_ecc_pos[i]];
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eccsteps = CFG_NAND_ECCSTEPS;
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p = dst;
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for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
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/* No chance to do something with the possible error message
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* from correct_data(). We just hope that all possible errors
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* are corrected by this routine.
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*/
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stat = this->correct_data(mtd, p, &ecc_code[i], &ecc_calc[i]);
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}
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return 0;
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}
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