USB/OHCI: endianness cleanup in the generic ohci driver
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@ -9,35 +9,52 @@ into cpu/board directories and are called via the hooks below.
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Configuration options
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----------------------
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CONFIG_USB_OHCI_NEW: enable the new OHCI driver
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CONFIG_USB_OHCI_NEW: enable the new OHCI driver
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CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
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CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
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- extern int usb_board_init(void);
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- extern int usb_board_stop(void);
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- extern int usb_cpu_init_fail(void);
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- extern int usb_board_init(void);
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- extern int usb_board_stop(void);
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- extern int usb_cpu_init_fail(void);
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CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
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CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
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- extern int usb_cpu_init(void);
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- extern int usb_cpu_stop(void);
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- extern int usb_cpu_init_fail(void);
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- extern int usb_cpu_init(void);
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- extern int usb_cpu_stop(void);
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- extern int usb_cpu_init_fail(void);
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CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers
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CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI
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registers
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CFG_USB_OHCI_SLOT_NAME: slot name
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CFG_USB_OHCI_SLOT_NAME: slot name
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CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the root hub.
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CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
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root hub.
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Endianness issues
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------------------
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The LITTLEENDIAN #define determines if the 'swap_16' and 'swap_32'
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macros do byte swapping or not. But some cpus OHCI-controllers such as
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ppc4xx and mpc5xxx operate in little endian mode, so some extra ifdefs
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were necessary to make this work.
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The USB bus operates in little endian, but unfortunately there are
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OHCI controllers that operate in big endian such as ppc4xx and
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mpc5xxx. For these the config option
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CFG_OHCI_BE_CONTROLLER
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needs to be defined.
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PCI Controllers
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----------------
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You'll need to define
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CONFIG_PCI_OHCI
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PCI Controllers need to do byte swapping on register accesses, so they
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should to define:
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CFG_OHCI_SWAP_REG_ACCESS
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@ -38,31 +38,20 @@
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*/
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/*
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* IMPORTANT NOTES
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* 1 - you MUST define LITTLEENDIAN in the configuration file for the
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* board or this driver will NOT work!
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* 1 - Read doc/README.generic_usb_ohci
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* 2 - this driver is intended for use with USB Mass Storage Devices
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* (BBB) and USB keyboard. There is NO support for Isochronous pipes!
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* 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
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* 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
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* to activate workaround for bug #41 or this driver will NOT work!
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*/
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#include <common.h>
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/* #include <pci.h> no PCI on the S3C24X0 */
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#ifdef CONFIG_USB_OHCI_NEW
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/* mk: are these really required? */
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#if defined(CONFIG_S3C2400)
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# include <s3c2400.h>
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#elif defined(CONFIG_S3C2410)
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# include <s3c2410.h>
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#elif defined(CONFIG_ARM920T)
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# include <asm/arch/hardware.h>
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#elif defined(CONFIG_CPU_MONAHANS)
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# include <asm/arch/pxa-regs.h>
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#elif defined(CONFIG_MPC5200)
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# include <mpc5xxx.h>
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#elif defined(CONFIG_PCI_OHCI)
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#include <asm/byteorder.h>
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#if defined(CONFIG_PCI_OHCI)
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# include <pci.h>
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#endif
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@ -88,8 +77,16 @@
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#define OHCI_CONTROL_INIT \
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(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
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#define readl(a) m32_swap(*((vu_long *)(a)))
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#define writel(a, b) (*((vu_long *)(b)) = m32_swap((vu_long)a))
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/*
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* e.g. PCI controllers need this
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*/
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#ifdef CFG_OHCI_SWAP_REG_ACCESS
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# define readl(a) __swap_16(*((vu_long *)(a)))
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# define writel(a, b) (*((vu_long *)(b)) = __swap_32((vu_long)a))
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#else
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# define readl(a) (*((vu_long *)(a)))
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# define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
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#endif /* CFG_OHCI_SWAP_REG_ACCESS */
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#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
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@ -114,13 +111,13 @@ static struct pci_device_id ohci_pci_ids[] = {
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#define info(format, arg...) do {} while(0)
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#endif
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#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
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# define m16_swap(x) (x)
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# define m32_swap(x) (x)
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#ifdef CFG_OHCI_BE_CONTROLLER
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# define m16_swap(x) cpu_to_be16(x)
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# define m32_swap(x) cpu_to_be32(x)
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#else
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# define m16_swap(x) swap_16(x)
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# define m32_swap(x) swap_32(x)
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#endif
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# define m16_swap(x) cpu_to_le16(x)
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# define m32_swap(x) cpu_to_le32(x)
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#endif /* CFG_OHCI_BE_CONTROLLER */
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/* global ohci_t */
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static ohci_t gohci;
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@ -1240,15 +1237,9 @@ pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe
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}
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bmRType_bReq = cmd->requesttype | (cmd->request << 8);
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#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
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wValue = __swap_16(cmd->value);
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wIndex = __swap_16(cmd->index);
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wLength = __swap_16(cmd->length);
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#else
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wValue = m16_swap (cmd->value);
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wIndex = m16_swap (cmd->index);
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wLength = m16_swap (cmd->length);
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#endif /* CONFIG_440EP || CONFIG_MPC5200 */
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wValue = cpu_to_le16 (cmd->value);
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wIndex = cpu_to_le16 (cmd->index);
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wLength = cpu_to_le16 (cmd->length);
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info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
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dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
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@ -1262,33 +1253,18 @@ pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe
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RH_OTHER | RH_CLASS almost ever means HUB_PORT here
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*/
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#if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
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case RH_GET_STATUS:
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*(__u16 *) data_buf = __swap_16(1); OK (2);
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*(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
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case RH_GET_STATUS | RH_INTERFACE:
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*(__u16 *) data_buf = __swap_16(0); OK (2);
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*(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
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case RH_GET_STATUS | RH_ENDPOINT:
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*(__u16 *) data_buf = __swap_16(0); OK (2);
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*(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
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case RH_GET_STATUS | RH_CLASS:
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*(__u32 *) data_buf = __swap_32(
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*(__u32 *) data_buf = cpu_to_le32 (
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RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
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OK (4);
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case RH_GET_STATUS | RH_OTHER | RH_CLASS:
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*(__u32 *) data_buf = __swap_32(RD_RH_PORTSTAT); OK (4);
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#else
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case RH_GET_STATUS:
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*(__u16 *) data_buf = m16_swap (1); OK (2);
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case RH_GET_STATUS | RH_INTERFACE:
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*(__u16 *) data_buf = m16_swap (0); OK (2);
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case RH_GET_STATUS | RH_ENDPOINT:
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*(__u16 *) data_buf = m16_swap (0); OK (2);
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case RH_GET_STATUS | RH_CLASS:
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*(__u32 *) data_buf = m32_swap (
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RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
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OK (4);
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case RH_GET_STATUS | RH_OTHER | RH_CLASS:
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*(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
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#endif /* CONFIG_440EP || CONFIG_MPC5200 */
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*(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
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case RH_CLEAR_FEATURE | RH_ENDPOINT:
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switch (wValue) {
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