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fsl_dma: Break out common memory initialization function

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Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Peter Tyser 2009-06-30 17:15:48 -05:00 committed by Kumar Gala
parent 79f4333ceb
commit 0d595f76bc
5 changed files with 38 additions and 87 deletions
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32
board/mpc8540eval/mpc8540eval.c
View File

@ -137,39 +137,9 @@ phys_size_t initdram (int board_type)
{
/* Initialize all of memory for ECC, then
* enable errors */
uint *p = 0;
uint i = 0;
volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
for (*p = 0; p < (uint *)(8 * 1024); p++) {
if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
*p = (unsigned int)0xdeadbeef;
if (((unsigned int)p & 0x1c) == 0x1c) { dcbf(p); }
}
/* 8K */
dmacpy(0x2000, 0, 0x2000);
/* 16K */
dmacpy(0x4000, 0, 0x4000);
/* 32K */
dmacpy(0x8000, 0, 0x8000);
/* 64K */
dmacpy(0x10000, 0, 0x10000);
/* 128k */
dmacpy(0x20000, 0, 0x20000);
/* 256k */
dmacpy(0x40000, 0, 0x40000);
/* 512k */
dmacpy(0x80000, 0, 0x80000);
/* 1M */
dmacpy(0x100000, 0, 0x100000);
/* 2M */
dmacpy(0x200000, 0, 0x200000);
/* 4M */
dmacpy(0x400000, 0, 0x400000);
for (i = 1; i < dram_size / 0x800000; i++)
dmacpy(0x800000 * i, 0, 0x800000);
dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
/* Enable errors for ECC */
ddr->err_disable = 0x00000000;

32
board/sbc8560/sbc8560.c
View File

@ -338,39 +338,9 @@ phys_size_t initdram (int board_type)
{
/* Initialize all of memory for ECC, then
* enable errors */
uint *p = 0;
uint i = 0;
volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
for (*p = 0; p < (uint *)(8 * 1024); p++) {
if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
*p = (unsigned int)0xdeadbeef;
if (((unsigned int)p & 0x1c) == 0x1c) { dcbf(p); }
}
/* 8K */
dmacpy(0x2000, 0, 0x2000);
/* 16K */
dmacpy(0x4000, 0, 0x4000);
/* 32K */
dmacpy(0x8000, 0, 0x8000);
/* 64K */
dmacpy(0x10000, 0, 0x10000);
/* 128k */
dmacpy(0x20000, 0, 0x20000);
/* 256k */
dmacpy(0x40000, 0, 0x40000);
/* 512k */
dmacpy(0x80000, 0, 0x80000);
/* 1M */
dmacpy(0x100000, 0, 0x100000);
/* 2M */
dmacpy(0x200000, 0, 0x200000);
/* 4M */
dmacpy(0x400000, 0, 0x400000);
for (i = 1; i < dram_size / 0x800000; i++)
dmacpy(0x800000 * i, 0, 0x800000);
dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
/* Enable errors for ECC */
ddr->err_disable = 0x00000000;

26
cpu/mpc85xx/ddr-gen1.c
View File

@ -73,33 +73,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
void
ddr_enable_ecc(unsigned int dram_size)
{
uint *p = 0;
uint i = 0;
volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
for (*p = 0; p < (uint *)(8 * 1024); p++) {
if (((unsigned int)p & 0x1f) == 0) {
ppcDcbz((unsigned long) p);
}
*p = (unsigned int)CONFIG_MEM_INIT_VALUE;
if (((unsigned int)p & 0x1c) == 0x1c) {
ppcDcbf((unsigned long) p);
}
}
dmacpy(0x002000, 0, 0x2000); /* 8K */
dmacpy(0x004000, 0, 0x4000); /* 16K */
dmacpy(0x008000, 0, 0x8000); /* 32K */
dmacpy(0x010000, 0, 0x10000); /* 64K */
dmacpy(0x020000, 0, 0x20000); /* 128K */
dmacpy(0x040000, 0, 0x40000); /* 256K */
dmacpy(0x080000, 0, 0x80000); /* 512K */
dmacpy(0x100000, 0, 0x100000); /* 1M */
dmacpy(0x200000, 0, 0x200000); /* 2M */
dmacpy(0x400000, 0, 0x400000); /* 4M */
for (i = 1; i < dram_size / 0x800000; i++)
dmacpy(0x800000 *i, 0, 0x800000);
dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
/*
* Enable errors for ECC.

32
drivers/dma/fsl_dma.c
View File

@ -110,3 +110,35 @@ int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) {
return 0;
}
#if (defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
void dma_meminit(uint val, uint size)
{
uint *p = 0;
uint i = 0;
for (*p = 0; p < (uint *)(8 * 1024); p++) {
if (((uint)p & 0x1f) == 0)
ppcDcbz((ulong)p);
*p = (uint)CONFIG_MEM_INIT_VALUE;
if (((uint)p & 0x1c) == 0x1c)
ppcDcbf((ulong)p);
}
dmacpy(0x002000, 0, 0x002000); /* 8K */
dmacpy(0x004000, 0, 0x004000); /* 16K */
dmacpy(0x008000, 0, 0x008000); /* 32K */
dmacpy(0x010000, 0, 0x010000); /* 64K */
dmacpy(0x020000, 0, 0x020000); /* 128K */
dmacpy(0x040000, 0, 0x040000); /* 256K */
dmacpy(0x080000, 0, 0x080000); /* 512K */
dmacpy(0x100000, 0, 0x100000); /* 1M */
dmacpy(0x200000, 0, 0x200000); /* 2M */
dmacpy(0x400000, 0, 0x400000); /* 4M */
for (i = 1; i < size / 0x800000; i++)
dmacpy((0x800000 * i), 0, 0x800000);
}
#endif

3
include/asm-ppc/fsl_dma.h
View File

@ -97,6 +97,9 @@ typedef struct fsl_dma {
#ifdef CONFIG_FSL_DMA
void dma_init(void);
int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t n);
#if (defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
void dma_meminit(uint val, uint size);
#endif
#endif
#endif /* _ASM_DMA_H_ */