* Patch by Scott McNutt, 21 Oct 2004:
Add support for Nios-II EPCS Controller core. * Patch by Scott McNutt, 20 Oct 2004: Nios-II cleanups: - Add sysid command (Nios-II only). - Locate default exception trampoline at proper offset. - Implement I/O routines (readb, writeb, etc) - Implement do_bootm_linux
This commit is contained in:
wdenk
parent
8f0b7cbe80
commit
0c1c117cf1
10
CHANGELOG
10
CHANGELOG
@ -2,6 +2,16 @@
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Changes for U-Boot 1.1.3:
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======================================================================
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* Patch by Scott McNutt, 21 Oct 2004:
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Add support for Nios-II EPCS Controller core.
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* Patch by Scott McNutt, 20 Oct 2004:
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Nios-II cleanups:
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- Add sysid command (Nios-II only).
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- Locate default exception trampoline at proper offset.
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- Implement I/O routines (readb, writeb, etc)
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- Implement do_bootm_linux
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* Patches by Martin Krause, 22 Mar 2005:
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- use TQM5200_auto as MAKEALL target for TQM5200 systems
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- add support for SM501 graphics controller
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@ -27,7 +27,7 @@ LIB = lib$(CPU).a
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START = start.o
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AOBJS = exceptions.o
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OBJS = cpu.o interrupts.o serial.o traps.o
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OBJS = cpu.o interrupts.o serial.o sysid.o traps.o epcs.o
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all: .depend $(START) $(LIB)
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@ -26,19 +26,7 @@
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#include <nios2-io.h>
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#if defined (CFG_NIOS_SYSID_BASE)
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#include <linux/time.h>
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static void check_sysid (void)
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{
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struct nios_sysid_t *sysid =
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(struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE);
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struct tm t;
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char asc[32];
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localtime_r ((time_t *)&sysid->timestamp, &t);
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asctime_r (&t, asc);
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printf ("SYSID : %08x, %s", sysid->id, asc);
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}
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extern void display_sysid (void);
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#endif /* CFG_NIOS_SYSID_BASE */
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int checkcpu (void)
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@ -47,7 +35,7 @@ int checkcpu (void)
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#if !defined(CFG_NIOS_SYSID_BASE)
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printf ("SYSID : <unknown>\n");
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#else
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check_sysid ();
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display_sysid ();
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#endif
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return (0);
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}
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711
cpu/nios2/epcs.c
Normal file
711
cpu/nios2/epcs.c
Normal file
@ -0,0 +1,711 @@
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/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#if defined(CFG_NIOS_EPCSBASE)
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#include <command.h>
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#include <nios2.h>
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#include <nios2-io.h>
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#include <nios2-epcs.h>
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/*-----------------------------------------------------------------------*/
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#define SHORT_HELP\
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"epcs - read/write Cyclone EPCS configuration device.\n"
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#define LONG_HELP\
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"\n"\
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"epcs erase start [end]\n"\
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" - erase sector start or sectors start through end.\n"\
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"epcs info\n"\
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" - display EPCS device information.\n"\
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"epcs protect on | off\n"\
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" - turn device protection on or off.\n"\
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"epcs read addr offset count\n"\
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" - read count bytes from offset to addr.\n"\
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"epcs write addr offset count\n"\
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" - write count bytes to offset from addr.\n"\
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"epcs verify addr offset count\n"\
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" - verify count bytes at offset from addr.\n"
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/*-----------------------------------------------------------------------*/
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/* Operation codes for serial configuration devices
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*/
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#define EPCS_WRITE_ENA 0x06 /* Write enable */
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#define EPCS_WRITE_DIS 0x04 /* Write disable */
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#define EPCS_READ_STAT 0x05 /* Read status */
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#define EPCS_READ_BYTES 0x03 /* Read bytes */
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#define EPCS_READ_ID 0xab /* Read silicon id */
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#define EPCS_WRITE_STAT 0x01 /* Write status */
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#define EPCS_WRITE_BYTES 0x02 /* Write bytes */
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#define EPCS_ERASE_BULK 0xc7 /* Erase entire device */
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#define EPCS_ERASE_SECT 0xd8 /* Erase sector */
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/* Device status register bits
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*/
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#define EPCS_STATUS_WIP (1<<0) /* Write in progress */
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#define EPCS_STATUS_WEL (1<<1) /* Write enable latch */
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/* Misc
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*/
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#define EPCS_TIMEOUT 100 /* 100 msec timeout */
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static nios_spi_t *epcs =
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(nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE);
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/***********************************************************************
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* Device access
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***********************************************************************/
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static int epcs_cs (int assert)
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{
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ulong start;
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if (assert) {
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epcs->control |= NIOS_SPI_SSO;
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} else {
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/* Let all bits shift out */
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start = get_timer (0);
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while ((epcs->status & NIOS_SPI_TMT) == 0)
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if (get_timer (start) > EPCS_TIMEOUT)
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return (-1);
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epcs->control &= ~NIOS_SPI_SSO;
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}
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return (0);
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}
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static int epcs_tx (unsigned char c)
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{
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ulong start;
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start = get_timer (0);
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while ((epcs->status & NIOS_SPI_TRDY) == 0)
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if (get_timer (start) > EPCS_TIMEOUT)
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return (-1);
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epcs->txdata = c;
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return (0);
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}
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static int epcs_rx (void)
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{
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ulong start;
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start = get_timer (0);
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while ((epcs->status & NIOS_SPI_RRDY) == 0)
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if (get_timer (start) > EPCS_TIMEOUT)
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return (-1);
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return (epcs->rxdata);
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}
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static unsigned char bitrev[] = {
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0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e,
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0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f
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};
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static unsigned char epcs_bitrev (unsigned char c)
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{
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unsigned char val;
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val = bitrev[c>>4];
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val |= bitrev[c & 0x0f]<<4;
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return (val);
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}
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static void epcs_rcv (unsigned char *dst, int len)
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{
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while (len--) {
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epcs_tx (0);
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*dst++ = epcs_rx ();
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}
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}
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static void epcs_rrcv (unsigned char *dst, int len)
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{
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while (len--) {
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epcs_tx (0);
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*dst++ = epcs_bitrev (epcs_rx ());
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}
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}
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static void epcs_snd (unsigned char *src, int len)
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{
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while (len--) {
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epcs_tx (*src++);
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epcs_rx ();
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}
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}
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static void epcs_rsnd (unsigned char *src, int len)
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{
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while (len--) {
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epcs_tx (epcs_bitrev (*src++));
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epcs_rx ();
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}
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}
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static void epcs_wr_enable (void)
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{
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epcs_cs (1);
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epcs_tx (EPCS_WRITE_ENA);
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epcs_rx ();
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epcs_cs (0);
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}
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static unsigned char epcs_status_rd (void)
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{
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unsigned char status;
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epcs_cs (1);
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epcs_tx (EPCS_READ_STAT);
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epcs_rx ();
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epcs_tx (0);
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status = epcs_rx ();
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epcs_cs (0);
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return (status);
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}
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static void epcs_status_wr (unsigned char status)
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{
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epcs_wr_enable ();
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epcs_cs (1);
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epcs_tx (EPCS_WRITE_STAT);
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epcs_rx ();
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epcs_tx (status);
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epcs_rx ();
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epcs_cs (0);
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return;
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}
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/***********************************************************************
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* Device information
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***********************************************************************/
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static struct epcs_devinfo_t devinfo[] = {
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{ "EPCS1 ", 0x10, 17, 4, 15, 8, 0x0c },
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{ "EPCS4 ", 0x12, 19, 8, 16, 8, 0x1c },
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{ 0, 0, 0, 0, 0, 0 }
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};
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epcs_devinfo_t *epcs_dev_find (void)
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{
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unsigned char buf[4];
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unsigned char id;
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int i;
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struct epcs_devinfo_t *dev = NULL;
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/* Read silicon id requires 3 "dummy bytes" before it's put
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* on the wire.
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*/
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buf[0] = EPCS_READ_ID;
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buf[1] = 0;
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buf[2] = 0;
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buf[3] = 0;
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epcs_cs (1);
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epcs_snd (buf,4);
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epcs_rcv (buf,1);
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if (epcs_cs (0) == -1)
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return (NULL);
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id = buf[0];
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/* Find the info struct */
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i = 0;
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while (devinfo[i].name) {
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if (id == devinfo[i].id) {
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dev = &devinfo[i];
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break;
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}
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i++;
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}
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return (dev);
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}
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/***********************************************************************
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* Misc Utilities
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***********************************************************************/
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int epcs_cfgsz (void)
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{
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int sz = 0;
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unsigned char buf[128];
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unsigned char *p;
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struct epcs_devinfo_t *dev = epcs_dev_find ();
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if (!dev)
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return (-1);
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/* Read in the first 128 bytes of the device */
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buf[0] = EPCS_READ_BYTES;
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buf[1] = 0;
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buf[2] = 0;
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buf[3] = 0;
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epcs_cs (1);
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epcs_snd (buf,4);
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epcs_rrcv (buf, sizeof(buf));
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epcs_cs (0);
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/* Search for the starting 0x6a which is followed by the
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* 4-byte 'register' and 4-byte bit-count.
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*/
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p = buf;
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while (p < buf + sizeof(buf)-8) {
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if ( *p == 0x6a ) {
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/* Point to bit count and extract */
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p += 5;
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sz = *p++;
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sz |= *p++ << 8;
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sz |= *p++ << 16;
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sz |= *p++ << 24;
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/* Convert to byte count */
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sz += 7;
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sz >>= 3;
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} else if (*p == 0xff) {
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/* 0xff is ok ... just skip */
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p++;
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continue;
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} else {
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/* Not 0xff or 0x6a ... something's not
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* right ... report 'unknown' (sz=0).
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*/
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break;
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}
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}
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return (sz);
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}
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int epcs_erase (unsigned start, unsigned end)
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{
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unsigned off, sectsz;
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unsigned char buf[4];
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struct epcs_devinfo_t *dev = epcs_dev_find ();
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if (!dev || (start>end))
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return (-1);
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/* Erase the requested sectors. An address is required
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* that lies within the requested sector -- we'll just
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* use the first address in the sector.
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*/
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printf ("epcs erasing sector %d ", start);
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if (start != end)
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printf ("to %d ", end);
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sectsz = (1 << dev->sz_sect);
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while (start <= end) {
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off = start * sectsz;
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start++;
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buf[0] = EPCS_ERASE_SECT;
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buf[1] = off >> 16;
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buf[2] = off >> 8;
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buf[3] = off;
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epcs_wr_enable ();
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epcs_cs (1);
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epcs_snd (buf,4);
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epcs_cs (0);
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printf ("."); /* Some user feedback */
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/* Wait for erase to complete */
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while (epcs_status_rd() & EPCS_STATUS_WIP)
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;
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}
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printf (" done.\n");
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return (0);
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}
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int epcs_read (ulong addr, ulong off, ulong cnt)
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{
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unsigned char buf[4];
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struct epcs_devinfo_t *dev = epcs_dev_find ();
|
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|
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if (!dev)
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return (-1);
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buf[0] = EPCS_READ_BYTES;
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buf[1] = off >> 16;
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buf[2] = off >> 8;
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buf[3] = off;
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epcs_cs (1);
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epcs_snd (buf,4);
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epcs_rrcv ((unsigned char *)addr, cnt);
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epcs_cs (0);
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return (0);
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}
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|
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int epcs_write (ulong addr, ulong off, ulong cnt)
|
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{
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ulong wrcnt;
|
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unsigned pgsz;
|
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unsigned char buf[4];
|
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struct epcs_devinfo_t *dev = epcs_dev_find ();
|
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|
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if (!dev)
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return (-1);
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|
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pgsz = (1<<dev->sz_page);
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while (cnt) {
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if (off % pgsz)
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wrcnt = pgsz - (off % pgsz);
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else
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wrcnt = pgsz;
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wrcnt = (wrcnt > cnt) ? cnt : wrcnt;
|
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|
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buf[0] = EPCS_WRITE_BYTES;
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buf[1] = off >> 16;
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buf[2] = off >> 8;
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buf[3] = off;
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epcs_wr_enable ();
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epcs_cs (1);
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epcs_snd (buf,4);
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epcs_rsnd ((unsigned char *)addr, wrcnt);
|
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epcs_cs (0);
|
||||
|
||||
/* Wait for write to complete */
|
||||
while (epcs_status_rd() & EPCS_STATUS_WIP)
|
||||
;
|
||||
|
||||
cnt -= wrcnt;
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||||
off += wrcnt;
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||||
addr += wrcnt;
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||||
}
|
||||
|
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return (0);
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||||
}
|
||||
|
||||
int epcs_verify (ulong addr, ulong off, ulong cnt, ulong *err)
|
||||
{
|
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ulong rdcnt;
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unsigned char buf[256];
|
||||
unsigned char *start,*end;
|
||||
int i;
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||||
|
||||
start = end = (unsigned char *)addr;
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while (cnt) {
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rdcnt = (cnt>sizeof(buf)) ? sizeof(buf) : cnt;
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epcs_read ((ulong)buf, off, rdcnt);
|
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for (i=0; i<rdcnt; i++) {
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if (*end != buf[i]) {
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*err = end - start;
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return(-1);
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||||
}
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||||
end++;
|
||||
}
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cnt -= rdcnt;
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off += rdcnt;
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}
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return (0);
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||||
}
|
||||
|
||||
static int epcs_sect_erased (int sect, unsigned *offset,
|
||||
struct epcs_devinfo_t *dev)
|
||||
{
|
||||
unsigned char buf[128];
|
||||
unsigned off, end;
|
||||
unsigned sectsz;
|
||||
int i;
|
||||
|
||||
sectsz = (1 << dev->sz_sect);
|
||||
off = sectsz * sect;
|
||||
end = off + sectsz;
|
||||
|
||||
while (off < end) {
|
||||
epcs_read ((ulong)buf, off, sizeof(buf));
|
||||
for (i=0; i < sizeof(buf); i++) {
|
||||
if (buf[i] != 0xff) {
|
||||
*offset = off + i;
|
||||
return (0);
|
||||
}
|
||||
}
|
||||
off += sizeof(buf);
|
||||
}
|
||||
return (1);
|
||||
}
|
||||
|
||||
|
||||
/***********************************************************************
|
||||
* Commands
|
||||
***********************************************************************/
|
||||
static
|
||||
void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char *argv[])
|
||||
{
|
||||
int i;
|
||||
unsigned char stat;
|
||||
unsigned tmp;
|
||||
int erased;
|
||||
|
||||
/* Basic device info */
|
||||
printf ("%s: %d kbytes (%d sectors x %d kbytes,"
|
||||
" %d bytes/page)\n",
|
||||
dev->name, 1 << (dev->size-10),
|
||||
dev->num_sects, 1 << (dev->sz_sect-10),
|
||||
1 << dev->sz_page );
|
||||
|
||||
/* Status -- for now protection is all-or-nothing */
|
||||
stat = epcs_status_rd();
|
||||
printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n",
|
||||
stat,
|
||||
(stat & EPCS_STATUS_WIP) ? 1 : 0,
|
||||
(stat & EPCS_STATUS_WEL) ? 1 : 0,
|
||||
(stat & dev->prot_mask) ? "on" : "off" );
|
||||
|
||||
/* Configuration */
|
||||
tmp = epcs_cfgsz ();
|
||||
if (tmp) {
|
||||
printf ("config: 0x%06x (%d) bytes\n", tmp, tmp );
|
||||
} else {
|
||||
printf ("config: unknown\n" );
|
||||
}
|
||||
|
||||
/* Sector info */
|
||||
for (i=0; i<dev->num_sects; i++) {
|
||||
erased = epcs_sect_erased (i, &tmp, dev);
|
||||
printf (" %d: %06x ",
|
||||
i, i*(1<<dev->sz_sect) );
|
||||
if (erased)
|
||||
printf ("erased\n");
|
||||
else
|
||||
printf ("data @ 0x%06x\n", tmp);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static
|
||||
void do_epcs_erase (struct epcs_devinfo_t *dev, int argc, char *argv[])
|
||||
{
|
||||
unsigned start,end;
|
||||
|
||||
if ((argc < 3) || (argc > 4)) {
|
||||
printf ("USAGE: epcs erase sect [end]\n");
|
||||
return;
|
||||
}
|
||||
if ((epcs_status_rd() & dev->prot_mask) != 0) {
|
||||
printf ( "epcs: device protected.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
start = simple_strtoul (argv[2], NULL, 10);
|
||||
if (argc > 3)
|
||||
end = simple_strtoul (argv[3], NULL, 10);
|
||||
else
|
||||
end = start;
|
||||
if ((start >= dev->num_sects) || (start > end)) {
|
||||
printf ("epcs: invalid sector range: [%d:%d]\n",
|
||||
start, end );
|
||||
return;
|
||||
}
|
||||
|
||||
epcs_erase (start, end);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static
|
||||
void do_epcs_protect (struct epcs_devinfo_t *dev, int argc, char *argv[])
|
||||
{
|
||||
unsigned char stat;
|
||||
|
||||
/* For now protection is all-or-nothing to keep things
|
||||
* simple. The protection bits don't map in a linear
|
||||
* fashion ... and we would rather protect the bottom
|
||||
* of the device since it contains the config data and
|
||||
* leave the top unprotected for app use. But unfortunately
|
||||
* protection works from top-to-bottom so it does
|
||||
* really help very much from a software app point-of-view.
|
||||
*/
|
||||
if (argc < 3) {
|
||||
printf ("USAGE: epcs protect on | off\n");
|
||||
return;
|
||||
}
|
||||
if (!dev)
|
||||
return;
|
||||
|
||||
/* Protection on/off is just a matter of setting/clearing
|
||||
* all protection bits in the status register.
|
||||
*/
|
||||
stat = epcs_status_rd ();
|
||||
if (strcmp ("on", argv[2]) == 0) {
|
||||
stat |= dev->prot_mask;
|
||||
} else if (strcmp ("off", argv[2]) == 0 ) {
|
||||
stat &= ~dev->prot_mask;
|
||||
} else {
|
||||
printf ("epcs: unknown protection: %s\n", argv[2]);
|
||||
return;
|
||||
}
|
||||
epcs_status_wr (stat);
|
||||
return;
|
||||
}
|
||||
|
||||
static
|
||||
void do_epcs_read (struct epcs_devinfo_t *dev, int argc, char *argv[])
|
||||
{
|
||||
ulong addr,off,cnt;
|
||||
ulong sz;
|
||||
|
||||
if (argc < 5) {
|
||||
printf ("USAGE: epcs read addr offset count\n");
|
||||
return;
|
||||
}
|
||||
|
||||
sz = 1 << dev->size;
|
||||
addr = simple_strtoul (argv[2], NULL, 16);
|
||||
off = simple_strtoul (argv[3], NULL, 16);
|
||||
cnt = simple_strtoul (argv[4], NULL, 16);
|
||||
if (off > sz) {
|
||||
printf ("offset is greater than device size"
|
||||
"... aborting.\n");
|
||||
return;
|
||||
}
|
||||
if ((off + cnt) > sz) {
|
||||
printf ("request exceeds device size"
|
||||
"... truncating.\n");
|
||||
cnt = sz - off;
|
||||
}
|
||||
printf ("epcs: read %08lx <- %06lx (0x%lx bytes)\n",
|
||||
addr, off, cnt);
|
||||
epcs_read (addr, off, cnt);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static
|
||||
void do_epcs_write (struct epcs_devinfo_t *dev, int argc, char *argv[])
|
||||
{
|
||||
ulong addr,off,cnt;
|
||||
ulong sz;
|
||||
ulong err;
|
||||
|
||||
if (argc < 5) {
|
||||
printf ("USAGE: epcs write addr offset count\n");
|
||||
return;
|
||||
}
|
||||
if ((epcs_status_rd() & dev->prot_mask) != 0) {
|
||||
printf ( "epcs: device protected.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
sz = 1 << dev->size;
|
||||
addr = simple_strtoul (argv[2], NULL, 16);
|
||||
off = simple_strtoul (argv[3], NULL, 16);
|
||||
cnt = simple_strtoul (argv[4], NULL, 16);
|
||||
if (off > sz) {
|
||||
printf ("offset is greater than device size"
|
||||
"... aborting.\n");
|
||||
return;
|
||||
}
|
||||
if ((off + cnt) > sz) {
|
||||
printf ("request exceeds device size"
|
||||
"... truncating.\n");
|
||||
cnt = sz - off;
|
||||
}
|
||||
printf ("epcs: write %08lx -> %06lx (0x%lx bytes)\n",
|
||||
addr, off, cnt);
|
||||
epcs_write (addr, off, cnt);
|
||||
if (epcs_verify (addr, off, cnt, &err) != 0)
|
||||
printf ("epcs: write error at offset %06lx\n", err);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static
|
||||
void do_epcs_verify (struct epcs_devinfo_t *dev, int argc, char *argv[])
|
||||
{
|
||||
ulong addr,off,cnt;
|
||||
ulong sz;
|
||||
ulong err;
|
||||
|
||||
if (argc < 5) {
|
||||
printf ("USAGE: epcs verify addr offset count\n");
|
||||
return;
|
||||
}
|
||||
|
||||
sz = 1 << dev->size;
|
||||
addr = simple_strtoul (argv[2], NULL, 16);
|
||||
off = simple_strtoul (argv[3], NULL, 16);
|
||||
cnt = simple_strtoul (argv[4], NULL, 16);
|
||||
if (off > sz) {
|
||||
printf ("offset is greater than device size"
|
||||
"... aborting.\n");
|
||||
return;
|
||||
}
|
||||
if ((off + cnt) > sz) {
|
||||
printf ("request exceeds device size"
|
||||
"... truncating.\n");
|
||||
cnt = sz - off;
|
||||
}
|
||||
printf ("epcs: verify %08lx -> %06lx (0x%lx bytes)\n",
|
||||
addr, off, cnt);
|
||||
if (epcs_verify (addr, off, cnt, &err) != 0)
|
||||
printf ("epcs: verify error at offset %06lx\n", err);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
int do_epcs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
||||
{
|
||||
int len;
|
||||
struct epcs_devinfo_t *dev = epcs_dev_find ();
|
||||
|
||||
if (!dev) {
|
||||
printf ("epcs: device not found.\n");
|
||||
return (-1);
|
||||
}
|
||||
|
||||
if (argc < 2) {
|
||||
do_epcs_info (dev, argc, argv);
|
||||
return (0);
|
||||
}
|
||||
|
||||
len = strlen (argv[1]);
|
||||
if (strncmp ("info", argv[1], len) == 0) {
|
||||
do_epcs_info (dev, argc, argv);
|
||||
} else if (strncmp ("erase", argv[1], len) == 0) {
|
||||
do_epcs_erase (dev, argc, argv);
|
||||
} else if (strncmp ("protect", argv[1], len) == 0) {
|
||||
do_epcs_protect (dev, argc, argv);
|
||||
} else if (strncmp ("read", argv[1], len) == 0) {
|
||||
do_epcs_read (dev, argc, argv);
|
||||
} else if (strncmp ("write", argv[1], len) == 0) {
|
||||
do_epcs_write (dev, argc, argv);
|
||||
} else if (strncmp ("verify", argv[1], len) == 0) {
|
||||
do_epcs_verify (dev, argc, argv);
|
||||
} else {
|
||||
printf ("epcs: unknown operation: %s\n", argv[1]);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
|
||||
U_BOOT_CMD( epcs, 5, 0, do_epcs, SHORT_HELP, LONG_HELP );
|
||||
|
||||
#endif /* CONFIG_NIOS_EPCS */
|
||||
@ -39,14 +39,24 @@ _start:
|
||||
* just be invalidating the cache a second time. If cache
|
||||
* is not implemented initi behaves as nop.
|
||||
*/
|
||||
movhi r4, %hi(CFG_ICACHELINE_SIZE)
|
||||
ori r4, r4, %lo(CFG_ICACHELINE_SIZE)
|
||||
ori r4, r0, %lo(CFG_ICACHELINE_SIZE)
|
||||
movhi r5, %hi(CFG_ICACHE_SIZE)
|
||||
ori r5, r5, %lo(CFG_ICACHE_SIZE)
|
||||
mov r6, r0
|
||||
0: initi r6
|
||||
add r6, r6, r4
|
||||
bltu r6, r5, 0b
|
||||
br _except_end /* Skip the tramp */
|
||||
|
||||
/* EXCEPTION TRAMPOLINE -- the following gets copied
|
||||
* to the exception address (below), but is otherwise at the
|
||||
* default exception vector offset (0x0020).
|
||||
*/
|
||||
_except_start:
|
||||
movhi et, %hi(_exception)
|
||||
ori et, et, %lo(_exception)
|
||||
jmp et
|
||||
_except_end:
|
||||
|
||||
/* INTERRUPTS -- for now, all interrupts masked and globally
|
||||
* disabled.
|
||||
@ -117,7 +127,9 @@ _cur: movhi r5, %hi(_cur - _start)
|
||||
_reloc:
|
||||
|
||||
/* COPY EXCEPTION TRAMPOLINE -- copy the tramp to the
|
||||
* exception address.
|
||||
* exception address. Define CONFIG_ROM_STUBS to prevent
|
||||
* the copy (e.g. exception in flash or in other
|
||||
* softare/firmware component).
|
||||
*/
|
||||
#if !defined(CONFIG_ROM_STUBS)
|
||||
movhi r4, %hi(_except_start)
|
||||
@ -126,12 +138,14 @@ _reloc:
|
||||
ori r5, r5, %lo(_except_end)
|
||||
movhi r6, %hi(CFG_EXCEPTION_ADDR)
|
||||
ori r6, r6, %lo(CFG_EXCEPTION_ADDR)
|
||||
beq r4, r6, 7f /* Skip if at proper addr */
|
||||
|
||||
6: ldwio r7, 0(r4)
|
||||
stwio r7, 0(r6)
|
||||
addi r4, r4, 4
|
||||
addi r6, r6, 4
|
||||
bne r4, r5, 6b
|
||||
7:
|
||||
#endif
|
||||
|
||||
/* STACK INIT -- zero top two words for call back chain.
|
||||
@ -155,15 +169,6 @@ _reloc:
|
||||
*/
|
||||
br _start
|
||||
|
||||
/* EXCEPTION TRAMPOLINE -- the following gets copied
|
||||
* to the exception address.
|
||||
*/
|
||||
_except_start:
|
||||
movhi et, %hi(_exception)
|
||||
ori et, et, %lo(_exception)
|
||||
jmp et
|
||||
_except_end:
|
||||
|
||||
|
||||
/*
|
||||
* dly_clks -- Nios2 (like Nios1) doesn't have a timebase in
|
||||
|
||||
57
cpu/nios2/sysid.c
Normal file
57
cpu/nios2/sysid.c
Normal file
@ -0,0 +1,57 @@
|
||||
/*
|
||||
* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
|
||||
* Scott McNutt <smcnutt@psyent.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
|
||||
#if defined (CFG_NIOS_SYSID_BASE)
|
||||
|
||||
#include <command.h>
|
||||
#include <nios2.h>
|
||||
#include <nios2-io.h>
|
||||
#include <linux/time.h>
|
||||
|
||||
void display_sysid (void)
|
||||
{
|
||||
struct nios_sysid_t *sysid =
|
||||
(struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE);
|
||||
struct tm t;
|
||||
char asc[32];
|
||||
|
||||
localtime_r ((time_t *)&sysid->timestamp, &t);
|
||||
asctime_r (&t, asc);
|
||||
printf ("SYSID : %08x, %s", sysid->id, asc);
|
||||
|
||||
}
|
||||
|
||||
int do_sysid (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
||||
{
|
||||
display_sysid ();
|
||||
return (0);
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
sysid, 1, 1, do_sysid,
|
||||
"sysid - display Nios-II system id\n\n",
|
||||
"\n - display Nios-II system id\n"
|
||||
);
|
||||
#endif /* CFG_NIOS_SYSID_BASE */
|
||||
@ -29,8 +29,61 @@
|
||||
extern unsigned char inb (unsigned char *port);
|
||||
extern unsigned short inw (unsigned short *port);
|
||||
extern unsigned inl (unsigned port);
|
||||
extern void outb (unsigned char val, unsigned char *port);
|
||||
extern void outw (unsigned short val, unsigned short *port);
|
||||
extern void outl (unsigned val, unsigned port);
|
||||
|
||||
#define readb(addr)\
|
||||
({unsigned char val;\
|
||||
asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
|
||||
#define readw(addr)\
|
||||
({unsigned short val;\
|
||||
asm volatile( "ldhio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
|
||||
#define readl(addr)\
|
||||
({unsigned long val;\
|
||||
asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
|
||||
#define writeb(addr,val)\
|
||||
asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val))
|
||||
#define writew(addr,val)\
|
||||
asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val))
|
||||
#define writel(addr,val)\
|
||||
asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val))
|
||||
|
||||
#define inb(addr) readb(addr)
|
||||
#define inw(addr) readw(addr)
|
||||
#define inl(addr) readl(addr)
|
||||
#define outb(addr,val) writeb(addr,val)
|
||||
#define outw(addr,val) writew(addr,val)
|
||||
#define outl(addr,val) writel(addr,val)
|
||||
|
||||
static inline void insb (unsigned long port, void *dst, unsigned long count)
|
||||
{
|
||||
unsigned char *p = dst;
|
||||
while (count--) *p++ = inb (port);
|
||||
}
|
||||
static inline void insw (unsigned long port, void *dst, unsigned long count)
|
||||
{
|
||||
unsigned short *p = dst;
|
||||
while (count--) *p++ = inw (port);
|
||||
}
|
||||
static inline void insl (unsigned long port, void *dst, unsigned long count)
|
||||
{
|
||||
unsigned long *p = dst;
|
||||
while (count--) *p++ = inl (port);
|
||||
}
|
||||
|
||||
static inline void outsb (unsigned long port, const void *src, unsigned long count)
|
||||
{
|
||||
const unsigned char *p = src;
|
||||
while (count--) outb (*p++, port);
|
||||
}
|
||||
|
||||
static inline void outsw (unsigned long port, const void *src, unsigned long count)
|
||||
{
|
||||
const unsigned short *p = src;
|
||||
while (count--) outw (*p++, port);
|
||||
}
|
||||
static inline void outsl (unsigned long port, const void *src, unsigned long count)
|
||||
{
|
||||
const unsigned long *p = src;
|
||||
while (count--) outl (*p++, port);
|
||||
}
|
||||
|
||||
#endif /* __ASM_NIOS2_IO_H_ */
|
||||
|
||||
@ -52,7 +52,7 @@
|
||||
#define CFG_SDRAM_BASE 0x01000000 /* SDRAM base addr */
|
||||
#define CFG_SDRAM_SIZE 0x01000000 /* 16 MByte */
|
||||
#define CFG_SRAM_BASE 0x00800000 /* SRAM base addr */
|
||||
#define CFG_SRAM_SIZE 0x00200000 /* 2 MByte */
|
||||
#define CFG_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MEMORY ORGANIZATION
|
||||
@ -106,6 +106,14 @@
|
||||
|
||||
#define CFG_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* EPCS Device -- wne CFG_NIOS_EPCSBASE is defined code/commands for
|
||||
* epcs device access is enabled. The base address is the epcs
|
||||
* _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK.
|
||||
* The register base is currently at offset 0x400 from the memory base.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CFG_NIOS_EPCSBASE 0x00900400 /* EPCS register base */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* DEBUG
|
||||
*----------------------------------------------------------------------*/
|
||||
@ -172,6 +180,36 @@
|
||||
CFG_CMD_SAVES )
|
||||
#include <cmd_confdefs.h>
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* COMPACT FLASH
|
||||
*----------------------------------------------------------------------*/
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_IDE)
|
||||
#define CONFIG_IDE_PREINIT /* Implement id_preinit */
|
||||
#define CFG_IDE_MAXBUS 1 /* 1 IDE bus */
|
||||
#define CFG_IDE_MAXDEVICE 1 /* 1 drive per IDE bus */
|
||||
|
||||
#define CFG_ATA_BASE_ADDR 0x00900800 /* ATA base addr */
|
||||
#define CFG_ATA_IDE0_OFFSET 0x0000 /* IDE0 offset */
|
||||
#define CFG_ATA_DATA_OFFSET 0x0040 /* Data IO offset */
|
||||
#define CFG_ATA_REG_OFFSET 0x0040 /* Register offset */
|
||||
#define CFG_ATA_ALT_OFFSET 0x0100 /* Alternate reg offset */
|
||||
#define CFG_ATA_STRIDE 4 /* Width betwix addrs */
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
/* Board-specific cf regs */
|
||||
#define CFG_CF_PRESENT 0x00900880 /* CF Present PIO base */
|
||||
#define CFG_CF_POWER 0x00900890 /* CF Power FET PIO base*/
|
||||
#define CFG_CF_ATASEL 0x009008a0 /* CF ATASEL PIO base */
|
||||
|
||||
#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* JFFS2
|
||||
*----------------------------------------------------------------------*/
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
|
||||
#define CFG_JFFS_CUSTOM_PART /* board defined part */
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MISC
|
||||
*----------------------------------------------------------------------*/
|
||||
@ -185,4 +223,7 @@
|
||||
#define CFG_MEMTEST_START CFG_SDRAM_BASE /* Start addr for test */
|
||||
#define CFG_MEMTEST_END CFG_INIT_SP - 0x00020000
|
||||
|
||||
#define CFG_HUSH_PARSER
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
71
include/nios2-epcs.h
Normal file
71
include/nios2-epcs.h
Normal file
@ -0,0 +1,71 @@
|
||||
/*
|
||||
* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
|
||||
* Scott McNutt <smcnutt@psyent.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*************************************************************************
|
||||
* Altera Nios-II EPCS Controller Core interfaces
|
||||
************************************************************************/
|
||||
|
||||
#ifndef __NIOS2_EPCS_H__
|
||||
#define __NIOS2_EPCS_H__
|
||||
|
||||
typedef struct epcs_devinfo_t {
|
||||
const char *name; /* Device name */
|
||||
unsigned char id; /* Device silicon id */
|
||||
unsigned char size; /* Total size log2(bytes)*/
|
||||
unsigned char num_sects; /* Number of sectors */
|
||||
unsigned char sz_sect; /* Sector size log2(bytes) */
|
||||
unsigned char sz_page; /* Page size log2(bytes) */
|
||||
unsigned char prot_mask; /* Protection mask */
|
||||
}epcs_devinfo_t;
|
||||
|
||||
/* Returns the devinfo struct if EPCS device is found;
|
||||
* NULL otherwise.
|
||||
*/
|
||||
extern epcs_devinfo_t *epcs_dev_find (void);
|
||||
|
||||
/* Returns the number of bytes used by config data.
|
||||
* Negative on error.
|
||||
*/
|
||||
extern int epcs_cfgsz (void);
|
||||
|
||||
/* Erase sectors 'start' to 'end' - return zero on success
|
||||
*/
|
||||
extern int epcs_erase (unsigned start, unsigned end);
|
||||
|
||||
/* Read 'cnt' bytes from device offset 'off' into buf at 'addr'
|
||||
* Zero return on success
|
||||
*/
|
||||
extern int epcs_read (ulong addr, ulong off, ulong cnt);
|
||||
|
||||
/* Write 'cnt' bytes to device offset 'off' from buf at 'addr'.
|
||||
* Zero return on success
|
||||
*/
|
||||
extern int epcs_write (ulong addr, ulong off, ulong cnt);
|
||||
|
||||
/* Verify 'cnt' bytes at device offset 'off' comparing with buf
|
||||
* at 'addr'. On failure, write first invalid offset to *err.
|
||||
* Zero return on success
|
||||
*/
|
||||
extern int epcs_verify (ulong addr, ulong off, ulong cnt, ulong *err);
|
||||
|
||||
#endif /* __NIOS2_EPCS_H__ */
|
||||
@ -136,37 +136,6 @@ typedef volatile struct nios_spi_t {
|
||||
#define NIOS_SPI_IE (1 << 8) /* exception int ena */
|
||||
#define NIOS_SPI_SSO (1 << 10) /* override SS_n output */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* ASMI
|
||||
*----------------------------------------------------------------------*/
|
||||
typedef volatile struct nios_asmi_t {
|
||||
unsigned rxdata; /* Rx data reg */
|
||||
unsigned txdata; /* Tx data reg */
|
||||
unsigned status; /* Status reg */
|
||||
unsigned control; /* Control reg */
|
||||
unsigned reserved;
|
||||
unsigned slavesel; /* Slave select */
|
||||
unsigned endofpacket; /* End-of-packet reg */
|
||||
}nios_asmi_t;
|
||||
|
||||
/* status register */
|
||||
#define NIOS_ASMI_ROE (1 << 3) /* rx overrun */
|
||||
#define NIOS_ASMI_TOE (1 << 4) /* tx overrun */
|
||||
#define NIOS_ASMI_TMT (1 << 5) /* tx empty */
|
||||
#define NIOS_ASMI_TRDY (1 << 6) /* tx ready */
|
||||
#define NIOS_ASMI_RRDY (1 << 7) /* rx ready */
|
||||
#define NIOS_ASMI_E (1 << 8) /* exception */
|
||||
#define NIOS_ASMI_EOP (1 << 9) /* eop detected */
|
||||
|
||||
/* control register */
|
||||
#define NIOS_ASMI_IROE (1 << 3) /* rx overrun int ena */
|
||||
#define NIOS_ASMI_ITOE (1 << 4) /* tx overrun int ena */
|
||||
#define NIOS_ASMI_ITRDY (1 << 6) /* tx ready int ena */
|
||||
#define NIOS_ASMI_IRRDY (1 << 7) /* rx ready int ena */
|
||||
#define NIOS_ASMI_IE (1 << 8) /* exception int ena */
|
||||
#define NIOS_ASMI_IEOP (1 << 9) /* rx eop int ena */
|
||||
#define NIOS_ASMI_SSO (1 << 10) /* slave select enable */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* JTAG UART
|
||||
*----------------------------------------------------------------------*/
|
||||
|
||||
@ -23,10 +23,18 @@
|
||||
|
||||
#include <common.h>
|
||||
#include <command.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
extern image_header_t header; /* common/cmd_bootm.c */
|
||||
|
||||
/* TODO
|
||||
*/
|
||||
void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
|
||||
ulong addr, ulong *len_ptr, int verify)
|
||||
{
|
||||
image_header_t *hdr = &header;
|
||||
void (*kernel)(void) = (void (*)(void))ntohl (hdr->ih_ep);
|
||||
|
||||
/* For now we assume the Microtronix linux ... which only
|
||||
* needs to be called ;-)
|
||||
*/
|
||||
kernel ();
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user