8xx, icache: enabling ICache not before running from RAM
with the new CONFIG_SYS_DELAYED_ICACHE config option, ICache is not enabled before code runs from RAM. Signed-off-by: Heiko Schocher <hs@denx.de>
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5
README
5
README
@ -318,6 +318,11 @@ The following options need to be configured:
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that this requires a (stable) reference clock (32 kHz
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RTC clock or CONFIG_SYS_8XX_XIN)
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CONFIG_SYS_DELAYED_ICACHE
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Define this option if you want to enable the
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ICache only when Code runs from RAM.
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- Intel Monahans options:
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CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
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@ -142,7 +142,7 @@ boot_warm:
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lis r3, IDC_DISABLE@h /* Disable data cache */
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mtspr DC_CST, r3
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#if !(defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || defined (CONFIG_FLAGADM))
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#if !defined(CONFIG_SYS_DELAYED_ICACHE)
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/* On IP860 and PCU E,
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* we cannot enable IC yet
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*/
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@ -173,6 +173,9 @@
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
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#endif
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#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before
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* running in RAM.
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*/
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/*-----------------------------------------------------------------------
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* SYPCR - System Protection Control 11-9
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@ -209,6 +209,9 @@
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
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#endif
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#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before
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* running in RAM.
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*/
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/*-----------------------------------------------------------------------
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* SYPCR - System Protection Control 11-9
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@ -246,6 +246,9 @@
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*/
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#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
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#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
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#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before
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* running in RAM.
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*/
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/*-----------------------------------------------------------------------
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* SYPCR - System Protection Control 11-9
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@ -736,8 +736,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
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WATCHDOG_RESET();
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#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
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defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
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#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83XX)
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icache_enable (); /* it's time to enable the instruction cache */
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#endif
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