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Fix mpc85xx ddr-gen3 ddr_sdram_cfg.

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Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
This commit is contained in:
Ed Swarthout 2009-02-24 02:37:59 -06:00 committed by Andy Fleming
parent 014c595f12
commit 0ee84b88b7
1 changed files with 2 additions and 2 deletions
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4
cpu/mpc85xx/ddr-gen3.c
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@ -79,8 +79,8 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
out_be32(&ddr->ddr_sdram_rcw_1, regs->ddr_sdram_rcw_1);
out_be32(&ddr->ddr_sdram_rcw_2, regs->ddr_sdram_rcw_2);
/* Do not enable the memory */
temp_sdram_cfg = in_be32(&ddr->sdram_cfg);
/* Set, but do not enable the memory */
temp_sdram_cfg = regs->ddr_sdram_cfg;
temp_sdram_cfg &= ~(SDRAM_CFG_MEM_EN);
out_be32(&ddr->sdram_cfg, temp_sdram_cfg);
/*