85xx: Use common LSDMR defines from asm/fsl_lbc.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
parent
0088c298f0
commit
b0fe93eda6
@ -372,21 +372,21 @@ sdram_init(void)
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cpu_board_rev = get_cpu_board_revision();
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lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
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if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_0) {
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
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lsdmr_common |= LSDMR_BSMA1617;
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} else if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_1) {
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
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lsdmr_common |= LSDMR_BSMA1516;
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} else {
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/*
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* Assume something unable to identify itself is
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* really old, and likely has lines 16/17 mapped.
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*/
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
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lsdmr_common |= LSDMR_BSMA1617;
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}
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/*
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* Issue PRECHARGE ALL command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -396,7 +396,7 @@ sdram_init(void)
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* Issue 8 AUTO REFRESH commands.
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*/
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for (idx = 0; idx < 8; idx++) {
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -406,7 +406,7 @@ sdram_init(void)
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/*
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* Issue 8 MODE-set command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -415,7 +415,7 @@ sdram_init(void)
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/*
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* Issue NORMAL OP command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -185,12 +185,12 @@ sdram_init(void)
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*/
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cpu_board_rev = get_cpu_board_revision();
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lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
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lsdmr_common |= LSDMR_BSMA1516;
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/*
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* Issue PRECHARGE ALL command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -200,7 +200,7 @@ sdram_init(void)
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* Issue 8 AUTO REFRESH commands.
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*/
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for (idx = 0; idx < 8; idx++) {
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -210,7 +210,7 @@ sdram_init(void)
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/*
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* Issue 8 MODE-set command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -219,7 +219,7 @@ sdram_init(void)
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/*
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* Issue NORMAL OP command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -371,21 +371,21 @@ sdram_init(void)
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cpu_board_rev = get_cpu_board_revision();
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lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
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if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_0) {
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
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lsdmr_common |= LSDMR_BSMA1617;
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} else if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_1) {
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
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lsdmr_common |= LSDMR_BSMA1516;
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} else {
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/*
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* Assume something unable to identify itself is
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* really old, and likely has lines 16/17 mapped.
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*/
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
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lsdmr_common |= LSDMR_BSMA1617;
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}
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/*
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* Issue PRECHARGE ALL command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -395,7 +395,7 @@ sdram_init(void)
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* Issue 8 AUTO REFRESH commands.
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*/
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for (idx = 0; idx < 8; idx++) {
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -405,7 +405,7 @@ sdram_init(void)
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/*
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* Issue 8 MODE-set command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -414,7 +414,7 @@ sdram_init(void)
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/*
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* Issue NORMAL OP command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -36,6 +36,7 @@
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#include <miiphy.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <asm/fsl_lbc.h>
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#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
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extern void ddr_enable_ecc(unsigned int dram_size);
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@ -243,12 +243,12 @@ sdram_init(void)
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* MPC8568 uses "new" 15-16 style addressing.
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*/
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lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
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lsdmr_common |= LSDMR_BSMA1516;
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/*
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* Issue PRECHARGE ALL command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -258,7 +258,7 @@ sdram_init(void)
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* Issue 8 AUTO REFRESH commands.
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*/
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for (idx = 0; idx < 8; idx++) {
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -268,7 +268,7 @@ sdram_init(void)
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/*
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* Issue 8 MODE-set command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -277,7 +277,7 @@ sdram_init(void)
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/*
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* Issue NORMAL OP command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -184,12 +184,12 @@ sdram_init(void)
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* MPC8548 uses "new" 15-16 style addressing.
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*/
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lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
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lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
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lsdmr_common |= LSDMR_BSMA1516;
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/*
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* Issue PRECHARGE ALL command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -199,7 +199,7 @@ sdram_init(void)
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* Issue 8 AUTO REFRESH commands.
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*/
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for (idx = 0; idx < 8; idx++) {
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -209,7 +209,7 @@ sdram_init(void)
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/*
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* Issue 8 MODE-set command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -218,7 +218,7 @@ sdram_init(void)
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/*
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* Issue NORMAL OP command.
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*/
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lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
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lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
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asm("sync;msync");
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*sdram_addr = 0xff;
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ppcDcbf((unsigned long) sdram_addr);
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@ -197,57 +197,24 @@
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#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
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#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/
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/*
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* LSDMR masks
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*/
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#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
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#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
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#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
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#define CONFIG_SYS_LBC_LSDMR_RFCR5 (3 << (31 - 16))
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#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
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#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
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#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
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#define CONFIG_SYS_LBC_LSDMR_ACTTORW3 (3 << (31 - 22))
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#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
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#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
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#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
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#define CONFIG_SYS_LBC_LSDMR_WRC2 (2 << (31 - 27))
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#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
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#define CONFIG_SYS_LBC_LSDMR_BUFCMD (1 << (31 - 29))
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#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
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#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_BSMA1516 \
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| CONFIG_SYS_LBC_LSDMR_RFCR5 \
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| CONFIG_SYS_LBC_LSDMR_PRETOACT3 \
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| CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
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| CONFIG_SYS_LBC_LSDMR_BL8 \
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| CONFIG_SYS_LBC_LSDMR_WRC2 \
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| CONFIG_SYS_LBC_LSDMR_CL3 \
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| CONFIG_SYS_LBC_LSDMR_RFEN \
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#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \
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| LSDMR_RFCR5 \
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| LSDMR_PRETOACT3 \
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| LSDMR_ACTTORW3 \
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| LSDMR_BL8 \
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| LSDMR_WRC2 \
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| LSDMR_CL3 \
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| LSDMR_RFEN \
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)
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/*
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* SDRAM Controller configuration sequence.
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*/
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#define CONFIG_SYS_LBC_LSDMR_1 ( CONFIG_SYS_LBC_LSDMR_COMMON \
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| CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
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#define CONFIG_SYS_LBC_LSDMR_2 ( CONFIG_SYS_LBC_LSDMR_COMMON \
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| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
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#define CONFIG_SYS_LBC_LSDMR_3 ( CONFIG_SYS_LBC_LSDMR_COMMON \
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| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
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#define CONFIG_SYS_LBC_LSDMR_4 ( CONFIG_SYS_LBC_LSDMR_COMMON \
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| CONFIG_SYS_LBC_LSDMR_OP_MRW)
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#define CONFIG_SYS_LBC_LSDMR_5 ( CONFIG_SYS_LBC_LSDMR_COMMON \
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| CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
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#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
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#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
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#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
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#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
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#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
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/*
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@ -206,42 +206,19 @@ extern unsigned long get_clock_freq(void);
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#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
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#define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
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/*
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* LSDMR masks
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*/
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#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
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#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
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#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
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#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
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#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
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#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
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#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
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#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
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#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
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#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
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#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
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#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
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/*
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* Common settings for all Local Bus SDRAM commands.
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* At run time, either BSMA1516 (for CPU 1.1)
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* or BSMA1617 (for CPU 1.0) (old)
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* is OR'ed in too.
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*/
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#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFCR16 \
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| CONFIG_SYS_LBC_LSDMR_PRETOACT7 \
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| CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
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| CONFIG_SYS_LBC_LSDMR_BL8 \
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| CONFIG_SYS_LBC_LSDMR_WRC4 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
|
||||
| LSDMR_PRETOACT7 \
|
||||
| LSDMR_ACTTORW7 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC4 \
|
||||
| LSDMR_CL3 \
|
||||
| LSDMR_RFEN \
|
||||
)
|
||||
|
||||
/*
|
||||
|
||||
@ -228,42 +228,19 @@ extern unsigned long get_clock_freq(void);
|
||||
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
/*
|
||||
* Common settings for all Local Bus SDRAM commands.
|
||||
* At run time, either BSMA1516 (for CPU 1.1)
|
||||
* or BSMA1617 (for CPU 1.0) (old)
|
||||
* is OR'ed in too.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFCR16 \
|
||||
| CONFIG_SYS_LBC_LSDMR_PRETOACT7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_BL8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_WRC4 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
|
||||
| LSDMR_PRETOACT7 \
|
||||
| LSDMR_ACTTORW7 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC4 \
|
||||
| LSDMR_CL3 \
|
||||
| LSDMR_RFEN \
|
||||
)
|
||||
|
||||
/*
|
||||
|
||||
@ -204,42 +204,19 @@ extern unsigned long get_clock_freq(void);
|
||||
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
/*
|
||||
* Common settings for all Local Bus SDRAM commands.
|
||||
* At run time, either BSMA1516 (for CPU 1.1)
|
||||
* or BSMA1617 (for CPU 1.0) (old)
|
||||
* is OR'ed in too.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFCR16 \
|
||||
| CONFIG_SYS_LBC_LSDMR_PRETOACT7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_BL8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_WRC4 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
|
||||
| LSDMR_PRETOACT7 \
|
||||
| LSDMR_ACTTORW7 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC4 \
|
||||
| LSDMR_CL3 \
|
||||
| LSDMR_RFEN \
|
||||
)
|
||||
|
||||
/*
|
||||
|
||||
@ -193,57 +193,24 @@
|
||||
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR5 (3 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW3 (3 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC2 (2 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BUFCMD (1 << (31 - 29))
|
||||
#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_BSMA1516 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFCR5 \
|
||||
| CONFIG_SYS_LBC_LSDMR_PRETOACT3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_BL8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_WRC2 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \
|
||||
| LSDMR_RFCR5 \
|
||||
| LSDMR_PRETOACT3 \
|
||||
| LSDMR_ACTTORW3 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC2 \
|
||||
| LSDMR_CL3 \
|
||||
| LSDMR_RFEN \
|
||||
)
|
||||
|
||||
/*
|
||||
* SDRAM Controller configuration sequence.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 ( CONFIG_SYS_LBC_LSDMR_COMMON \
|
||||
| CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
|
||||
#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
|
||||
#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
|
||||
#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
|
||||
|
||||
|
||||
/*
|
||||
|
||||
@ -187,42 +187,19 @@ extern unsigned long get_clock_freq(void);
|
||||
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
/*
|
||||
* Common settings for all Local Bus SDRAM commands.
|
||||
* At run time, either BSMA1516 (for CPU 1.1)
|
||||
* or BSMA1617 (for CPU 1.0) (old)
|
||||
* is OR'ed in too.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFCR16 \
|
||||
| CONFIG_SYS_LBC_LSDMR_PRETOACT7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_BL8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_WRC4 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
|
||||
| LSDMR_PRETOACT7 \
|
||||
| LSDMR_ACTTORW7 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC4 \
|
||||
| LSDMR_CL3 \
|
||||
| LSDMR_RFEN \
|
||||
)
|
||||
|
||||
/*
|
||||
|
||||
@ -241,42 +241,19 @@
|
||||
#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
|
||||
|
||||
/*
|
||||
* LSDMR masks
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFEN (1 << (31 - 1))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1516 (3 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BSMA1617 (4 << (31 - 10))
|
||||
#define CONFIG_SYS_LBC_LSDMR_RFCR16 (7 << (31 - 16))
|
||||
#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW7 (7 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_ACTTORW6 (6 << (31 - 22))
|
||||
#define CONFIG_SYS_LBC_LSDMR_BL8 (1 << (31 - 23))
|
||||
#define CONFIG_SYS_LBC_LSDMR_WRC4 (0 << (31 - 27))
|
||||
#define CONFIG_SYS_LBC_LSDMR_CL3 (3 << (31 - 31))
|
||||
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_MRW (3 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
|
||||
#define CONFIG_SYS_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
|
||||
|
||||
/*
|
||||
* Common settings for all Local Bus SDRAM commands.
|
||||
* At run time, either BSMA1516 (for CPU 1.1)
|
||||
* or BSMA1617 (for CPU 1.0) (old)
|
||||
* is OR'ed in too.
|
||||
*/
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( CONFIG_SYS_LBC_LSDMR_RFCR16 \
|
||||
| CONFIG_SYS_LBC_LSDMR_PRETOACT7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
|
||||
| CONFIG_SYS_LBC_LSDMR_BL8 \
|
||||
| CONFIG_SYS_LBC_LSDMR_WRC4 \
|
||||
| CONFIG_SYS_LBC_LSDMR_CL3 \
|
||||
| CONFIG_SYS_LBC_LSDMR_RFEN \
|
||||
#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
|
||||
| LSDMR_PRETOACT7 \
|
||||
| LSDMR_ACTTORW7 \
|
||||
| LSDMR_BL8 \
|
||||
| LSDMR_WRC4 \
|
||||
| LSDMR_CL3 \
|
||||
| LSDMR_RFEN \
|
||||
)
|
||||
|
||||
#define CONFIG_SYS_INIT_RAM_LOCK 1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user