[PATCH] ppc4xx: Fix CONFIG_SYS_CLK_FREQ definition in Sequoia config file
A '3' got cut off in the formatting of the last patch to automatically change the clock speed of the system clock on sequoia board. Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com> Signed-off-by: Stefan Roese <sr@denx.de>
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@ -40,7 +40,7 @@
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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/* Detect Sequoia PLL input clock automatically via CPLD bit */
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#define CONFIG_SYS_CLK_FREQ ((in8(CFG_BCSR_BASE + 3) & 0x80) ? \
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3333333 : 33000000)
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33333333 : 33000000)
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
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