Code cleanup. Update CHANGELOG.
This commit is contained in:
Wolfgang Denk
Wolfgang Denk
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commit
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165
CHANGELOG
165
CHANGELOG
@ -1,3 +1,85 @@
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commit 726e90aacf0b1ecb0e7055be574622fbe3e450ba
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Author: Grant Likely <grant.likely@secretlab.ca>
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Date: Wed Nov 29 16:23:42 2006 +0100
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[PATCH] [MPC52xx] Use IPB bus frequency for SOC peripherals
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The soc node of the mpc52xx needs to be loaded with the IPB bus frequency,
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not the XLB frequency.
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This patch depends on the previous patches for MPC52xx device tree support
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
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commit 1eac2a71417b6675b11aace72102a2e7fde8f5c6
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Nov 29 15:42:37 2006 +0100
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[PATCH] Add support for Prodrive P3M750 & P3M7448 (P3Mx) boards
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This patch adds support for the Prodrive P3M750 (PPC750 & MV64460)
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and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are
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quite similar and share the same board directory "prodrive/p3mx"
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and the same config file "p3mx.h".
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 1bdd46832aeb569f5e04b1f20f64318525b6525a
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Nov 29 12:53:15 2006 +0100
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[PATCH] common/cmd_elf.c: Enable loadaddr as parameter in bootvx command
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In the bootvx command the load address was only read from the env
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variable "loadaddr" and not optionally passed as paramter as described
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in the help. This is fixed with this patch. The behaviour is now the
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same as in the bootelf command.
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 4e26f1074c3ac1bd8fd094f0dc4a1c4a0b15a592
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Nov 29 12:03:57 2006 +0100
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[PATCH] include/ppc440.h minor error affecting interrupts
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Fixed include/ppc440.c for UIC address Bug
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Corrects bug affecting the addresses for the universal interrupt
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controller UIC2 and UIC3 on the PPC440 Epx, GRx, and SPE chips.
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Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit e59581c56ab5d6e0207ddac3b2c1d55cb36ec706
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Nov 28 17:55:49 2006 +0100
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[PATCH] Enable the IceCube/lite5200 variants to pass a device tree to Linux.
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This patch adds the code and configuration necessary to boot with an
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arch/powerpc Linux kernel.
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Signed-off-by: Grant Likely <grant.likely@gmail.com>
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Acked-by: Jon Loeliger <jdl@freescale.com>
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commit e732faec95a83cb468b4850ae807c8301dde8f6a
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Nov 28 16:09:24 2006 +0100
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[PATCH] PPC4xx: 440SP Rev. C detection added
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit e7f3e9ff01fbd7fa72eb42a9675fbed6bc4736b0
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Nov 28 11:04:45 2006 +0100
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[PATCH] nand: Fix patch merge problem
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 4f4b602ec7524a032bdf3c6d28c7f525a4a67eaa
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Mon Nov 27 22:53:53 2006 +0100
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@ -67,6 +149,46 @@ Date: Mon Nov 27 15:32:42 2006 +0100
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Minor code cleanup. Update CHANGELOG.
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commit 1729b92cde575476684bffe819d0b7791b57bff2
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:52:04 2006 +0100
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[PATCH] 4xx: Fix problem with board specific reset code (now for real)
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit cc5ee8a92a0e3ca6f727af71b8fd206460c7afd7
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:49:51 2006 +0100
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[PATCH] alpr: remove unused board specific flash driver
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 1f94d162e2b5f0edc28d9fb11482502c44d218e1
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:48:41 2006 +0100
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[PATCH] 4xx: Fix problem with board specific reset code
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit ec0c2ec725aec9524a177a77ce75559e644a931a
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:46:06 2006 +0100
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[PATCH] Remove testing 4xx enet PHY setup
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 1c2ce2262069510f31c7d3fd7efd3d58b8c0c148
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:12:17 2006 +0100
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[PATCH] Update Prodrive ALPR board support (440GX)
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 78d620ebb5871d252270dedfad60c6568993b780
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Author: Wolfgang Denk <wd@atlas.denx.de>
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Date: Thu Nov 23 22:58:58 2006 +0100
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@ -641,6 +763,34 @@ Date: Tue Oct 10 17:02:22 2006 -0500
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Fix whitespace and 80-col issues.
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commit 5c912cb1c31266c66ca59b36f9b6f87296421d75
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:36:51 2006 +0200
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CFG_NAND_QUIET_TEST added to not warn upon missing NAND device
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Patch by Stefan Roese, 07 Oct 2006
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commit 5bc528fa4da751d472397b308137238a6465afd2
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:35:25 2006 +0200
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Update ALPR code (NAND support working now)
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Patch by Stefan Roese, 07 Oct 2006
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commit 77d5034847d328753b80c46b83f960a14a26f40e
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:33:03 2006 +0200
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Remove compile warnings in fpga code
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Patch by Stefan Roese, 07 Oct 2006
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commit f3443867e90d2979a7dd1c65b0d537777e1f9850
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:30:52 2006 +0200
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Add CONFIG_BOARD_RESET to configure board specific reset function
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Patch by Stefan Roese, 07 Oct 2006
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commit f55df18187e7a45cb73fec4370d12135e6691ae1
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Author: John Traill <john.traill@freescale.com>
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Date: Fri Sep 29 08:23:12 2006 +0100
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@ -873,6 +1023,21 @@ Date: Wed Aug 16 10:54:09 2006 -0500
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Signed-off-by: Matthew McClintock <msm@freescale.com>
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commit 899620c2d66d4eef3b2a0034d062e71d45d886c9
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Aug 15 14:22:35 2006 +0200
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Add initial support for the ALPR board from Prodrive
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NAND needs some additional testing
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Patch by Heiko Schocher, 15 Aug 2006
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commit f0ff4692ff3372dec55074a8eb444943ab095abb
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Aug 15 14:15:51 2006 +0200
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Add FPGA Altera Cyclone 2 support
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Patch by Heiko Schocher, 15 Aug 2006
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commit fecf1c7e4de1b2779edc18742b91c22bdc32b68b
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Author: Jon Loeliger <jdl@freescale.com>
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Date: Mon Aug 14 15:33:38 2006 -0500
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File diff suppressed because it is too large
Load Diff
@ -12,7 +12,7 @@
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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@ -44,7 +44,7 @@
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DECLARE_GLOBAL_DATA_PTR;
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#undef DEBUG
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#define MAP_PCI
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#define MAP_PCI
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#ifdef DEBUG
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#define DP(x) x
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@ -70,11 +70,12 @@ int memory_map_bank (unsigned int bankNo,
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#endif
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#ifdef DEBUG
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if (bankLength > 0)
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if (bankLength > 0) {
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printf ("mapping bank %d at %08x - %08x\n",
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bankNo, bankBase, bankBase + bankLength - 1);
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else
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} else {
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printf ("unmapping bank %d\n", bankNo);
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}
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#endif
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memoryMapBank (bankNo, bankBase, bankLength);
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@ -176,7 +177,7 @@ long int initdram (int board_type)
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/* calibrate delay lines */
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set_dfcdlInit();
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GT_REG_WRITE(MV64460_SDRAM_OPERATION, SDRAM_NOP); /* 0x1418 */
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GT_REG_WRITE(MV64460_SDRAM_OPERATION, SDRAM_NOP); /* 0x1418 */
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do {
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tmp = GTREGREAD(MV64460_SDRAM_OPERATION);
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} while(tmp != 0x0);
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@ -197,8 +198,8 @@ long int initdram (int board_type)
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/* SDRAM drive strength */
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GT_REG_WRITE(MV64460_SDRAM_ADDR_CTRL_PADS_CALIBRATION, 0x80000000); /* 0x14C0 */
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GT_REG_WRITE(MV64460_SDRAM_ADDR_CTRL_PADS_CALIBRATION, 0x80000008); /* 0x14C0 */
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GT_REG_WRITE(MV64460_SDRAM_DATA_PADS_CALIBRATION, 0x80000000); /* 0x14C4 */
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GT_REG_WRITE(MV64460_SDRAM_DATA_PADS_CALIBRATION, 0x80000008); /* 0x14C4 */
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GT_REG_WRITE(MV64460_SDRAM_DATA_PADS_CALIBRATION, 0x80000000); /* 0x14C4 */
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GT_REG_WRITE(MV64460_SDRAM_DATA_PADS_CALIBRATION, 0x80000008); /* 0x14C4 */
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/* setup SDRAM device registers */
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@ -306,22 +307,22 @@ void board_add_ram_info(int use_default)
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/*
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* mvDmaIsChannelActive - Check if IDMA channel is active
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*
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* channel = IDMA channel number from 0 to 7
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* channel = IDMA channel number from 0 to 7
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*/
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int mvDmaIsChannelActive (int channel)
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{
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ulong data;
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ulong data;
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data = GTREGREAD (MV64460_DMA_CHANNEL0_CONTROL + 4 * channel);
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if (data & BIT14) /* activity status */
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return 1;
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data = GTREGREAD (MV64460_DMA_CHANNEL0_CONTROL + 4 * channel);
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if (data & BIT14) /* activity status */
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return 1;
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return 0;
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return 0;
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}
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/*
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* mvDmaSetMemorySpace - Set a DMA memory window for the DMA's address decoding
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* map.
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* map.
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*
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* memSpace = IDMA memory window number from 0 to 7
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* trg_if = Target interface:
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@ -363,9 +364,9 @@ int mvDmaSetMemorySpace (ulong memSpace,
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/*
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* mvDmaTransfer - Transfer data from src_addr to dst_addr on one of the 4
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* DMA channels.
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* DMA channels.
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*
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* channel = IDMA channel number from 0 to 3
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* channel = IDMA channel number from 0 to 3
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* destAddr = Destination address
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* sourceAddr = Source address
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* size = Size in bytes
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@ -385,7 +386,7 @@ int mvDmaTransfer (int channel, ulong sourceAddr,
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GT_REG_WRITE (MV64460_DMA_CHANNEL0_SOURCE_ADDR + engOffReg, sourceAddr);
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GT_REG_WRITE (MV64460_DMA_CHANNEL0_DESTINATION_ADDR + engOffReg, destAddr);
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command = command |
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BIT12 | /* DMA_CHANNEL_ENABLE */
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BIT12 | /* DMA_CHANNEL_ENABLE */
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BIT9; /* DMA_NON_CHAIN_MODE */
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/* Activate DMA channel By writting to mvDmaControlRegister */
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GT_REG_WRITE (MV64460_DMA_CHANNEL0_CONTROL + engOffReg, command);
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