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ColdFire: Change the SDRAM BRD2WT timing from 3 to 7

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The user manuals recommend 7.

Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
This commit is contained in:
TsiChung Liew 2008-08-15 18:24:25 +00:00 committed by John Rigby
parent 79e0799cf6
commit 454e725b3a
2 changed files with 2 additions and 2 deletions
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2
include/configs/M5475EVB.h
View File

@ -226,7 +226,7 @@
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_CFG1 0x73711630
#define CFG_SDRAM_CFG2 0x46370000
#define CFG_SDRAM_CFG2 0x46770000
#define CFG_SDRAM_CTRL 0xE10B0000
#define CFG_SDRAM_EMOD 0x40010000
#define CFG_SDRAM_MODE 0x018D0000

2
include/configs/M5485EVB.h
View File

@ -212,7 +212,7 @@
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_CFG1 0x73711630
#define CFG_SDRAM_CFG2 0x46370000
#define CFG_SDRAM_CFG2 0x46770000
#define CFG_SDRAM_CTRL 0xE10B0000
#define CFG_SDRAM_EMOD 0x40010000
#define CFG_SDRAM_MODE 0x018D0000