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MPC8568E-MDS: reset UCCs to use them reliably

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In order to use GETH1 and GETH2 on the MPC8568E-MDS, we should reset
UCCs.

p.s Similar code exists in the Linux kernel board file (for capability
reasons with older U-Boots), but should be removed some day.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
This commit is contained in:
Anton Vorontsov 2007-10-22 18:12:46 +04:00 committed by Andrew Fleming-AFLEMING
parent 2146cf5682
commit ad162249cb
3 changed files with 33 additions and 0 deletions
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21
board/freescale/mpc8568mds/bcsr.c
View File

@ -21,6 +21,8 @@
*/
#include <common.h>
#include <asm/io.h>
#include "bcsr.h"
void enable_8568mds_duart()
@ -54,3 +56,22 @@ void enable_8568mds_qe_mdio()
bcsr[7] |= 0x01;
}
#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2)
void reset_8568mds_uccs(void)
{
volatile u8 *bcsr = (u8 *)(CFG_BCSR);
/* Turn off UCC1 & UCC2 */
out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN);
out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN);
/* Mode is RGMII, all bits clear */
out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK |
BCSR_UCC2_MODE_MSK));
/* Turn UCC1 & UCC2 on */
out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN);
out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN);
}
#endif

9
board/freescale/mpc8568mds/bcsr.h
View File

@ -90,6 +90,11 @@
7 Flash write protect
*/
#define BCSR_UCC1_GETH_EN (0x1 << 7)
#define BCSR_UCC2_GETH_EN (0x1 << 7)
#define BCSR_UCC1_MODE_MSK (0x3 << 4)
#define BCSR_UCC2_MODE_MSK (0x3 << 0)
/*BCSR Utils functions*/
void enable_8568mds_duart(void);
@ -97,4 +102,8 @@ void enable_8568mds_flash_write(void);
void disable_8568mds_flash_write(void);
void enable_8568mds_qe_mdio(void);
#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2)
void reset_8568mds_uccs(void);
#endif
#endif /* __BCSR_H_ */

3
board/freescale/mpc8568mds/mpc8568mds.c
View File

@ -109,6 +109,9 @@ int board_early_init_f (void)
enable_8568mds_duart();
enable_8568mds_flash_write();
#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2)
reset_8568mds_uccs();
#endif
#if defined(CONFIG_QE) && !defined(CONFIG_eTSEC_MDIO_BUS)
enable_8568mds_qe_mdio();
#endif