* Fix problems with CMC_PU2 flash driver.
* Adjust INKA 4x0 default settings
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wdenk
parent
bff96b0e6b
commit
08f272787a
@ -2,6 +2,8 @@
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Changes since U-Boot 1.1.1:
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======================================================================
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* Fix problems with CMC_PU2 flash driver.
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* Cleanup:
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- avoid trigraph warning in fs/ext2/ext2fs.c
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- rename UC100 -> uc100
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@ -1 +1,3 @@
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TEXT_BASE = 0x20f00000
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TEXT_BASE = 0x20F00000
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## For testing: load at 0x20100000 and "go" at 0x201000A4
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#TEXT_BASE = 0x20100000
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@ -35,24 +35,15 @@
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/*
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* CPU to flash interface is 32-bit, so make declaration accordingly
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*/
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typedef unsigned short FLASH_PORT_WIDTH;
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typedef volatile unsigned short FLASH_PORT_WIDTHV;
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#define FPW FLASH_PORT_WIDTH
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#define FPWV FLASH_PORT_WIDTHV
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#define FLASH_CYCLE1 0x0555
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#define FLASH_CYCLE2 0x02AA
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size(FPWV *addr, flash_info_t *info);
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static ulong flash_get_size(vu_short *addr, flash_info_t *info);
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static void flash_reset(flash_info_t *info);
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static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
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static int write_word_amd(flash_info_t *info, vu_short *dest, ushort data);
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static flash_info_t *flash_get_info(ulong base);
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/*-----------------------------------------------------------------------
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@ -68,8 +59,7 @@ unsigned long flash_init (void)
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/* Init: no FLASHes known */
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memset(&flash_info[0], 0, sizeof(flash_info_t));
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flash_info[0].size =
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flash_get_size((FPW *)flashbase, &flash_info[0]);
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flash_info[0].size = flash_get_size((vu_short *)flashbase, &flash_info[0]);
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size = flash_info[0].size;
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@ -96,13 +86,13 @@ unsigned long flash_init (void)
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*/
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static void flash_reset(flash_info_t *info)
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{
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FPWV *base = (FPWV *)(info->start[0]);
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vu_short *base = (vu_short *)(info->start[0]);
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/* Put FLASH back in read mode */
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
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*base = (FPW)0x00FF; /* Intel Read Mode */
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*base = 0x00FF; /* Intel Read Mode */
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else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
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*base = (FPW)0x00F0; /* AMD Read Mode */
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*base = 0x00F0; /* AMD Read Mode */
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}
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/*-----------------------------------------------------------------------
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@ -180,49 +170,53 @@ void flash_print_info (flash_info_t *info)
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* The following code cannot be run from FLASH!
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*/
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ulong flash_get_size (FPWV *addr, flash_info_t *info)
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ulong flash_get_size (vu_short *addr, flash_info_t *info)
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{
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int i;
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ushort value;
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ulong base = (ulong)addr;
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/* Write auto select command: read Manufacturer ID */
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/* Write auto select command sequence and test FLASH answer */
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addr[FLASH_CYCLE1] = (FPW)0x00AA; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE2] = (FPW)0x0055; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE1] = (FPW)0x0090; /* selects Intel or AMD */
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/* Write auto select command sequence */
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addr[FLASH_CYCLE1] = 0x00AA; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE2] = 0x0055; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE1] = 0x0090; /* selects Intel or AMD */
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/* The manufacturer codes are only 1 byte, so just use 1 byte.
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* This works for any bus width and any FLASH device width.
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*/
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/* read Manufacturer ID */
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udelay(100);
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switch (addr[0] & 0xff) {
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value = addr[0];
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debug ("Manufacturer ID: %04X\n", value);
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case (uchar)AMD_MANUFACT:
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switch (value) {
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case (AMD_MANUFACT & 0xFFFF):
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debug ("Manufacturer: AMD (Spansion)\n");
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info->flash_id = FLASH_MAN_AMD;
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break;
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case (uchar)INTEL_MANUFACT:
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case (INTEL_MANUFACT & 0xFFFF):
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debug ("Manufacturer: Intel (not supported yet)\n");
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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printf ("Unknown Manufacturer ID: %04X\n", value);
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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break;
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goto out;
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}
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/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
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if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) {
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value = addr[1];
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debug ("Device ID: %04X\n", value);
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case AMD_ID_MIRROR:
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switch (addr[1]) {
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case (AMD_ID_MIRROR & 0xFFFF):
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debug ("Mirror Bit flash: addr[14] = %08X addr[15] = %08X\n",
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addr[14], addr[15]);
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switch(addr[14] & 0xffff) {
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case (AMD_ID_GL064M_2 & 0xffff):
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switch(addr[14]) {
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case (AMD_ID_GL064M_2 & 0xFFFF):
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if (addr[15] != (AMD_ID_GL064M_3 & 0xffff)) {
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printf ("Chip: S29GLxxxM -> unknown\n");
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info->flash_id = FLASH_UNKNOWN;
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@ -249,11 +243,14 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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break;
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default:
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printf ("Unknown Device ID: %04X\n", value);
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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break;
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}
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out:
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/* Put FLASH back in read mode */
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flash_reset(info);
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@ -265,7 +262,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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FPWV *addr = (FPWV *)(info->start[0]);
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vu_short *addr = (vu_short *)(info->start[0]);
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int flag, prot, sect, ssect, l_sect;
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ulong start, now, last;
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@ -324,7 +321,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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if ((sect + ssect) > s_last)
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break;
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if (info->protect[sect + ssect] == 0) { /* not protected */
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addr = (FPWV *)(info->start[sect + ssect]);
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addr = (vu_short *)(info->start[sect + ssect]);
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addr[0] = 0x0030;
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l_sect = sect + ssect;
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}
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@ -340,7 +337,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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start = get_timer (0);
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last = start;
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addr = (FPWV *)(info->start[l_sect]);
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addr = (vu_short *)(info->start[l_sect]);
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while ((addr[0] & 0x0080) != 0x0080) {
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if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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@ -352,7 +349,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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last = now;
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}
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}
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addr = (FPWV *)info->start[0];
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addr = (vu_short *)info->start[0];
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addr[0] = 0x00F0; /* reset bank */
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sect += ssect;
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}
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@ -363,7 +360,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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DONE:
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/* reset to read mode */
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addr = (FPWV *)info->start[0];
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addr = (vu_short *)info->start[0];
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addr[0] = 0x00F0; /* reset bank */
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printf (" done\n");
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@ -395,8 +392,8 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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wp = addr;
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while (cnt >= 2) {
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data = *((FPWV *)src);
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if ((rc = write_word_amd(info, (FPW *)wp, data)) != 0) {
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data = *((vu_short *)src);
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if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
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return (rc);
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}
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src += 2;
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@ -411,7 +408,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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if (cnt == 1) {
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data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1))
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<< 8);
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if ((rc = write_word_amd(info, (FPW *)wp, data)) != 0) {
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if ((rc = write_word_amd(info, (vu_short *)wp, data)) != 0) {
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return (rc);
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}
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src += 1;
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@ -432,25 +429,25 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
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static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data)
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{
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ulong start;
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int flag;
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FPWV *base; /* first address in flash bank */
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vu_short *base; /* first address in flash bank */
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/* Check if Flash is (sufficiently) erased */
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if ((*dest & data) != data) {
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return (2);
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}
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base = (FPWV *)(info->start[0]);
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base = (vu_short *)(info->start[0]);
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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base[FLASH_CYCLE1] = (FPW)0x00AA; /* unlock */
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base[FLASH_CYCLE2] = (FPW)0x0055; /* unlock */
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base[FLASH_CYCLE1] = (FPW)0x00A0; /* selects program mode */
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base[FLASH_CYCLE1] = 0x00AA; /* unlock */
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base[FLASH_CYCLE2] = 0x0055; /* unlock */
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base[FLASH_CYCLE1] = 0x00A0; /* selects program mode */
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*dest = data; /* start programming the data */
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@ -461,9 +458,9 @@ static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
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start = get_timer (0);
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/* data polling for D7 */
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while ((*dest & (FPW)0x0080) != (data & (FPW)0x0080)) {
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while ((*dest & 0x0080) != (data & 0x0080)) {
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if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
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*dest = (FPW)0x00F0; /* reset bank */
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*dest = 0x00F0; /* reset bank */
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return (1);
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}
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}
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@ -162,7 +162,7 @@ long int initdram (int board_type)
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int checkboard (void)
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{
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puts ("Board: INKA 4X0 (Indatec GmbH & Co. KG)\n");
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puts ("Board: INKA 4X0\n");
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return 0;
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}
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@ -83,15 +83,8 @@
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":$(hostname):$(netdev):off panic=1\0" \
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"flash_nfs=run nfsargs addip;" \
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"bootm $(kernel_addr)\0" \
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"flash_self=run ramargs addip;" \
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"bootm $(kernel_addr) $(ramdisk_addr)\0" \
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"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
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"rootpath=/opt/eldk3.0_ppc/ppc_82xx\0" \
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"bootfile=uImage\0" \
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"serverip=192.168.1.1\0" \
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"ipaddr=192.168.160.2\0" \
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"ethaddr=00:00:1A:1B:CE:AF\0" \
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"dk=tftp 100000 inka4x0/u-boot.dk;protect off all;erase ffe00000 ffe2ffff;cp.b 100000 ffe00000 $(filesize)\0" \
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"rootpath=/opt/eldk/ppc_82xx\0" \
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""
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#define CONFIG_BOOTCOMMAND "run net_nfs"
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