[MPC512x] Streamline frame handling in the FEC driver
- convert frame size settings to be derived from a single base - set frame size to the recommended default value Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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@ -32,7 +32,7 @@ int fec512x_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * re
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int fec512x_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
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int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
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static uchar rx_buff[FEC_MAX_PKT_SIZE];
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static uchar rx_buff[FEC_BUFFER_SIZE];
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static int rx_buff_idx = 0;
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/********************************************************************/
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@ -237,8 +237,8 @@ static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis)
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/* Set Opcode/Pause Duration Register */
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fec->eth->op_pause = 0x00010020;
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/* Frame length=1518; MII mode */
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fec->eth->r_cntrl = 0x05ee0024;
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/* Frame length=1522; MII mode */
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fec->eth->r_cntrl = (FEC_MAX_FRAME_LEN << 16) | 0x24;
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/* Half-duplex, heartbeat disabled */
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fec->eth->x_cntrl = 0x00000000;
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@ -248,7 +248,7 @@ static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis)
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/* Setup recv fifo start and buff size */
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fec->eth->r_fstart = 0x500;
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fec->eth->r_buff_size = 0x5e0;
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fec->eth->r_buff_size = FEC_BUFFER_SIZE;
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/* Setup BD base addresses */
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fec->eth->r_des_start = (uint32)fec->bdBase->rbd;
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@ -164,10 +164,13 @@ typedef enum {
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#define FEC_RBD_NUM 32 /* The user can adjust this value */
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/* packet size limit */
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#define FEC_MAX_PKT_SIZE 1536
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#define FEC_MAX_FRAME_LEN 1522 /* recommended default value */
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/* Buffer size must be evenly divisible by 16 */
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#define FEC_BUFFER_SIZE ((FEC_MAX_FRAME_LEN + 0x10) & (~0xf))
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typedef struct {
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uint8 frame[FEC_MAX_PKT_SIZE];
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uint8 frame[FEC_BUFFER_SIZE];
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} mpc512x_frame;
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typedef struct {
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