ADS5121 Add IC Ident Module (IIM) support
IIM (IC Identification Module) is the fusebox for the mpc5121. Use #define CONFIG_IIM to turn on the clock for this module use #define CONFIG_CMD_FUSE to add fusebox commands. Fusebox commands include the ability to read the status, read the register cache, override the register cache, program the fuses and sense them. Signed-off-by: Martha Marx <mmarx@silicontkx.com> Signed-off-by: John Rigby <jrigby@freescale.com>
This commit is contained in:
Martha Marx
John Rigby
parent
14d19cd1bc
commit
abfbd0ae49
@ -101,6 +101,9 @@ int board_early_init_f (void)
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*/
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im->clk.sccr[0] = SCCR1_CLOCKS_EN;
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im->clk.sccr[1] = SCCR2_CLOCKS_EN;
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#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
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im->clk.sccr[1] |= CLOCK_SCCR2_IIM_EN;
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#endif
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return 0;
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}
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@ -26,6 +26,9 @@ LIB = $(obj)lib$(CPU).a
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START = start.o
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COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o i2c.o iopin.o
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ifdef CONFIG_IIM
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COBJS += iim.o
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endif
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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394
cpu/mpc512x/iim.c
Normal file
394
cpu/mpc512x/iim.c
Normal file
@ -0,0 +1,394 @@
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/*
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* Copyright 2008 Silicon Turnkey Express, Inc.
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* Martha Marx <mmarx@silicontkx.com>
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*
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* ADS5121 IIM (Fusebox) Interface
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#ifdef CONFIG_CMD_FUSE
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DECLARE_GLOBAL_DATA_PTR;
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static char cur_bank = '1';
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char *iim_err_msg(u32 err)
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{
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static char *IIM_errs[] = {
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"Parity Error in cache",
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"Explicit Sense Cycle Error",
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"Write to Locked Register Error",
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"Read Protect Error",
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"Override Protect Error",
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"Write Protect Error"};
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int i;
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if (!err)
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return "";
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for (i = 1; i < 8; i++)
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if (err & (1 << i))
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printf("IIM - %s\n", IIM_errs[i-1]);
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return "";
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}
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int in_range(int n, int min, int max, char *err, char *usg)
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{
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if (n > max || n < min) {
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printf(err);
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printf("Usage:\n%s\n", usg);
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return 0;
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}
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return 1;
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}
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int ads5121_fuse_read(int bank, int fstart, int num)
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{
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iim512x_t *iim = &((immap_t *) CONFIG_SYS_IMMR)->iim;
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u32 *iim_fb, dummy;
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int f, ctr;
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out_be32(&iim->err, in_be32(&iim->err));
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if (bank == 0)
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iim_fb = (u32 *)&(iim->fbac0);
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else
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iim_fb = (u32 *)&(iim->fbac1);
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/* try a read to see if Read Protect is set */
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dummy = in_be32(&iim_fb[0]);
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if (in_be32(&iim->err) & IIM_ERR_RPE) {
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printf("\tRead protect fuse is set\n");
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out_be32(&iim->err, IIM_ERR_RPE);
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return 0;
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}
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printf("Reading Bank %d cache\n", bank);
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for (f = fstart, ctr = 0; num > 0; ctr++, num--, f++) {
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if (ctr % 4 == 0)
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printf("F%2d:", f);
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printf("\t%#04x", (u8)(iim_fb[f]));
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if (ctr % 4 == 3)
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printf("\n");
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}
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if (ctr % 4 != 0)
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printf("\n");
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}
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int ads5121_fuse_override(int bank, int f, u8 val)
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{
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iim512x_t *iim = &((immap_t *) CONFIG_SYS_IMMR)->iim;
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u32 *iim_fb;
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u32 iim_stat;
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int i;
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out_be32(&iim->err, in_be32(&iim->err));
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if (bank == 0)
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iim_fb = (u32 *)&(iim->fbac0);
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else
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iim_fb = (u32 *)&(iim->fbac1);
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/* try a read to see if Read Protect is set */
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iim_stat = in_be32(&iim_fb[0]);
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if (in_be32(&iim->err) & IIM_ERR_RPE) {
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printf("Read protect fuse is set on bank %d;"
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"Override protect may also be set\n", bank);
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printf("An attempt will be made to override\n");
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out_be32(&iim->err, IIM_ERR_RPE);
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}
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if (iim_stat & IIM_FBAC_FBOP) {
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printf("Override protect fuse is set on bank %d\n", bank);
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return 1;
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}
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if (f > IIM_FMAX) /* reset the entire bank */
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for (i = 0; i < IIM_FMAX + 1; i++)
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out_be32(&iim_fb[i], 0);
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else
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out_be32(&iim_fb[f], val);
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return 0;
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}
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int ads5121_fuse_prog(cmd_tbl_t *cmdtp, int bank, char *fuseno_bitno)
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{
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iim512x_t *iim = &((immap_t *) CONFIG_SYS_IMMR)->iim;
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int f, i, bitno;
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u32 stat, err;
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f = simple_strtol(fuseno_bitno, NULL, 10);
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if (f == 0 && fuseno_bitno[0] != '0')
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f = -1;
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if (!in_range(f, 0, IIM_FMAX,
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"<frow> must be between 0-31\n\n", cmdtp->usage))
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return 1;
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bitno = -1;
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for (i = 0; i < 6; i++) {
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if (fuseno_bitno[i] == '_') {
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bitno = simple_strtol(&(fuseno_bitno[i+1]), NULL, 10);
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if (bitno == 0 && fuseno_bitno[i+1] != '0')
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bitno = -1;
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break;
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}
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}
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if (!in_range(bitno, 0, 7, "Bit number ranges from 0-7\n"
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"Example of <frow_bitno>: \"18_4\" sets bit 4 of row 18\n",
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cmdtp->usage))
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return 1;
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out_be32(&iim->err, in_be32(&iim->err));
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out_be32(&iim->prg_p, IIM_PRG_P_SET);
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out_be32(&iim->ua, IIM_SET_UA(bank, f));
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out_be32(&iim->la, IIM_SET_LA(f, bitno));
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#ifdef DEBUG
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printf("Programming disabled with DEBUG defined \n");
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printf(""Set up to pro
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printf("iim.ua = %x; iim.la = %x\n", iim->ua, iim->la);
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#else
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out_be32(&iim->fctl, IIM_FCTL_PROG_PULSE | IIM_FCTL_PROG);
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do
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udelay(20);
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while ((stat = in_be32(&iim->stat)) & IIM_STAT_BUSY);
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out_be32(&iim->prg_p, 0);
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err = in_be32(&iim->err);
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if (stat & IIM_STAT_PRGD) {
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if (!(err & (IIM_ERR_WPE | IIM_ERR_WPE))) {
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printf("Fuse is successfully set");
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if (err)
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printf(" - however there are other errors");
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printf("\n");
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}
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iim->stat = 0;
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}
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if (err) {
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iim_err_msg(err);
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out_be32(&iim->err, in_be32(&iim->err));
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}
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#endif
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}
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int ads5121_fuse_sense(int bank, int fstart, int num)
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{
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iim512x_t *iim = &((immap_t *) CONFIG_SYS_IMMR)->iim;
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u32 iim_fbac;
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u32 stat, err, err_hold = 0;
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int f, ctr;
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out_be32(&iim->err, in_be32(&iim->err));
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if (bank == 0)
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iim_fbac = in_be32(&iim->fbac0);
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else
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iim_fbac = in_be32(&iim->fbac1);
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if (iim_fbac & IIM_FBAC_FBESP) {
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printf("\tSense Protect disallows this operation\n");
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out_be32(&iim->err, IIM_FBAC_FBESP);
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return 1;
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}
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err = in_be32(&iim->err);
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if (err) {
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iim_err_msg(err);
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err_hold |= err;
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}
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if (err & IIM_ERR_RPE)
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printf("\tRead protect fuse is set; "
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"Sense Protect may be set but will be attempted\n");
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if (err)
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out_be32(&iim->err, err);
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printf("Sensing fuse(s) on Bank %d\n", bank);
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for (f = fstart, ctr = 0; num > 0; ctr++, f++, num--) {
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out_be32(&iim->ua, IIM_SET_UA(bank, f));
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out_be32(&iim->la, IIM_SET_LA(f, 0));
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out_be32(&iim->fctl, IIM_FCTL_ESNS_N);
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do
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udelay(20);
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while ((stat = in_be32(&iim->stat)) & IIM_STAT_BUSY);
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err = in_be32(&iim->err);
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if (err & IIM_ERR_SNSE) {
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iim_err_msg(err);
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out_be32(&iim->err, IIM_ERR_SNSE);
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return 1;
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}
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if (stat & IIM_STAT_SNSD) {
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out_be32(&iim->stat, 0);
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if (ctr % 4 == 0)
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printf("F%2d:", f);
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printf("\t%#04x", (u8)iim->sdat);
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if (ctr % 4 == 3)
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printf("\n");
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}
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if (err) {
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err_hold |= err;
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out_be32(&iim->err, err);
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}
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}
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if (ctr % 4 != 0)
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printf("\n");
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if (err_hold)
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iim_err_msg(err_hold);
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return 0;
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}
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int ads5121_fuse_stat(int bank)
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{
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iim512x_t *iim = &((immap_t *) CONFIG_SYS_IMMR)->iim;
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u32 iim_fbac;
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u32 err;
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out_be32(&iim->err, in_be32(&iim->err));
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if (bank == 0)
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iim_fbac = in_be32(&iim->fbac0);
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else
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iim_fbac = in_be32(&iim->fbac1);
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err = in_be32(&iim->err);
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if (err)
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iim_err_msg(err);
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if (err & IIM_ERR_RPE || iim_fbac & IIM_FBAC_FBRP) {
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if (iim_fbac == 0)
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printf("Since protection settings can't be read - "
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"try sensing fuse row 0;\n");
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return 0;
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}
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if (iim_fbac & IIM_PROTECTION)
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printf("Protection Fuses Bank %d = %#04x:\n", bank, iim_fbac);
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else if (!(err & IIM_ERR_RPE))
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printf("No Protection fuses are set\n");
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if (iim_fbac & IIM_FBAC_FBWP)
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printf("\tWrite Protect fuse is set\n");
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if (iim_fbac & IIM_FBAC_FBOP)
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printf("\tOverride Protect fuse is set\n");
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if (iim_fbac & IIM_FBAC_FBESP)
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printf("\tSense Protect Fuse is set\n");
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out_be32(&iim->err, in_be32(&iim->err));
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return 0;
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}
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int do_ads5121_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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int frow, n, v, bank;
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if (cur_bank == '0')
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bank = 0;
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else
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bank = 1;
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switch (argc) {
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case 0:
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case 1:
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printf("Usage:\n%s\n", cmdtp->usage);
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return 1;
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case 2:
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if (strncmp(argv[1], "stat", 4) == 0)
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return ads5121_fuse_stat(bank);
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if (strncmp(argv[1], "read", 4) == 0)
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return ads5121_fuse_read(bank, 0, IIM_FMAX + 1);
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if (strncmp(argv[1], "sense", 5) == 0)
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return ads5121_fuse_sense(bank, 0, IIM_FMAX + 1);
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if (strncmp(argv[1], "ovride", 6) == 0)
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return ads5121_fuse_override(bank, IIM_FMAX + 1, 0);
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if (strncmp(argv[1], "bank", 4) == 0) {
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printf("Active Fuse Bank is %c\n", cur_bank);
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return 0;
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}
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printf("Usage:\n%s\n", cmdtp->usage);
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return 1;
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case 3:
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if (strncmp(argv[1], "bank", 4) == 0) {
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if (argv[2][0] == '0')
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cur_bank = '0';
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else if (argv[2][0] == '1')
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cur_bank = '1';
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else {
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printf("Usage:\n%s\n", cmdtp->usage);
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return 1;
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}
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printf("Setting Active Fuse Bank to %c\n", cur_bank);
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return 0;
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}
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if (strncmp(argv[1], "prog", 4) == 0)
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return ads5121_fuse_prog(cmdtp, bank, argv[2]);
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frow = (int)simple_strtol(argv[2], NULL, 10);
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if (frow == 0 && argv[2][0] != '0')
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frow = -1;
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if (!in_range(frow, 0, IIM_FMAX,
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"<frow> must be between 0-31\n\n", cmdtp->usage))
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return 1;
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if (strncmp(argv[1], "read", 4) == 0)
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return ads5121_fuse_read(bank, frow, 1);
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if (strncmp(argv[1], "ovride", 6) == 0)
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return ads5121_fuse_override(bank, frow, 0);
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if (strncmp(argv[1], "sense", 5) == 0)
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return ads5121_fuse_sense(bank, frow, 1);
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printf("Usage:\n%s\n", cmdtp->usage);
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return 1;
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case 4:
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frow = (int)simple_strtol(argv[2], NULL, 10);
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if (frow == 0 && argv[2][0] != '0')
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frow = -1;
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if (!in_range(frow, 0, IIM_FMAX,
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"<frow> must be between 0-31\n\n", cmdtp->usage))
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return 1;
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if (strncmp(argv[1], "read", 4) == 0) {
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n = (int)simple_strtol(argv[3], NULL, 10);
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if (!in_range(frow + n, frow + 1, IIM_FMAX + 1,
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"<frow>+<n> must be between 1-32\n\n",
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cmdtp->usage))
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return 1;
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return ads5121_fuse_read(bank, frow, n);
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}
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if (strncmp(argv[1], "ovride", 6) == 0) {
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v = (int)simple_strtol(argv[3], NULL, 10);
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return ads5121_fuse_override(bank, frow, v);
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}
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if (strncmp(argv[1], "sense", 5) == 0) {
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n = (int)simple_strtol(argv[3], NULL, 10);
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if (!in_range(frow + n, frow + 1, IIM_FMAX + 1,
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"<frow>+<n> must be between 1-32\n\n",
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cmdtp->usage))
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return 1;
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return ads5121_fuse_sense(bank, frow, n);
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}
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printf("Usage:\n%s\n", cmdtp->usage);
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return 1;
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default: /* at least 5 args */
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printf("Usage:\n%s\n", cmdtp->usage);
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return 1;
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}
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}
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U_BOOT_CMD(
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fuse, CONFIG_SYS_MAXARGS, 0, do_ads5121_fuse,
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" - Read, Sense, Override or Program Fuses\n",
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"bank <n> - sets active Fuse Bank to 0 or 1\n"
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" no args shows current active bank\n"
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"fuse stat - print active fuse bank's protection status\n"
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"fuse read [<frow> [<n>]] - print <n> fuse rows starting at <frow>\n"
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" no args to print entire bank's fuses\n"
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"fuse ovride [<frow> [<v>]]- override fuses at <frow> with <v>\n"
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" no <v> defaults to 0 for the row\n"
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" no args resets entire bank to 0\n"
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" NOTE - settings persist until hard reset\n"
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"fuse sense [<frow>] - senses current fuse at <frow>\n"
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" no args for entire bank\n"
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"fuse prog <frow_bit> - program fuse at row <frow>, bit <_bit>\n"
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" <frow> is 0-31, <bit> is 0-7; eg. 13_2 \n"
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" WARNING - this is permanent\n"
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);
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#endif /* CONFIG_CMD_FUSE */
|
||||
@ -415,7 +415,25 @@ typedef struct ioctrl512x {
|
||||
* IIM
|
||||
*/
|
||||
typedef struct iim512x {
|
||||
u8 fixme[0x1000];
|
||||
u32 stat; /* IIM status register */
|
||||
u32 statm; /* IIM status IRQ mask */
|
||||
u32 err; /* IIM errors register */
|
||||
u32 emask; /* IIM error IRQ mask */
|
||||
u32 fctl; /* IIM fuse control register */
|
||||
u32 ua; /* IIM upper address register */
|
||||
u32 la; /* IIM lower address register */
|
||||
u32 sdat; /* IIM explicit sense data */
|
||||
u8 res0[0x08];
|
||||
u32 prg_p; /* IIM program protection register */
|
||||
u8 res1[0x10];
|
||||
u32 divide; /* IIM divide factor register */
|
||||
u8 res2[0x7c0];
|
||||
u32 fbac0; /* IIM fuse bank 0 prot (for Freescale use) */
|
||||
u32 fb0w0[0x1f]; /* IIM fuse bank 0 data (for Freescale use) */
|
||||
u8 res3[0x380];
|
||||
u32 fbac1; /* IIM fuse bank 1 protection */
|
||||
u32 fb1w1[0x01f]; /* IIM fuse bank 1 data */
|
||||
u8 res4[0x380];
|
||||
} iim512x_t;
|
||||
|
||||
/*
|
||||
|
||||
@ -294,6 +294,11 @@
|
||||
#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IIM - IC Identification Module
|
||||
*/
|
||||
#undef CONFIG_IIM
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
*/
|
||||
@ -349,6 +354,7 @@
|
||||
#define CONFIG_CMD_REGINFO
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_CMD_DATE
|
||||
#undef CONFIG_CMD_FUSE
|
||||
|
||||
#if defined(CONFIG_PCI)
|
||||
#define CONFIG_CMD_PCI
|
||||
|
||||
@ -574,6 +574,30 @@ void iopin_initialize(iopin_t *,int);
|
||||
/* Register Offset Base */
|
||||
#define MPC512X_FEC (CONFIG_SYS_IMMR + 0x02800)
|
||||
|
||||
/* IIM control */
|
||||
#define IIM_SET_UA(bk, f) ((bk << 3) | (f >> 5))
|
||||
#define IIM_SET_LA(f, bit) (((f & 0x0000001f) << 3) | bit)
|
||||
#define IIM_STAT_BUSY 0x00000080
|
||||
#define IIM_STAT_PRGD 0x00000002
|
||||
#define IIM_STAT_SNSD 0x00000001
|
||||
#define IIM_ERR_WPE 0x00000040
|
||||
#define IIM_ERR_OPE 0x00000020
|
||||
#define IIM_ERR_RPE 0x00000010
|
||||
#define IIM_ERR_WLRE 0x00000008
|
||||
#define IIM_ERR_SNSE 0x00000004
|
||||
#define IIM_ERR_PARITYE 0x00000002
|
||||
#define IIM_PRG_P_SET 0x000000aa
|
||||
#define IIM_PRG_P_UNSET 0
|
||||
#define IIM_FCTL_PROG_PULSE 0x00000020
|
||||
#define IIM_FCTL_PROG 0x00000001
|
||||
#define IIM_FCTL_ESNS_N 0x00000008
|
||||
#define IIM_FBAC_FBWP 0x00000080
|
||||
#define IIM_FBAC_FBOP 0x00000040
|
||||
#define IIM_FBAC_FBRP 0x00000020
|
||||
#define IIM_FBAC_FBESP 0x00000008
|
||||
#define IIM_PROTECTION 0x000000e8
|
||||
#define IIM_FMAX 31
|
||||
|
||||
/* Number of I2C buses */
|
||||
#define I2C_BUS_CNT 3
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user