ppc4xx: Add a comment for 405EX PCIe endpoint configuration

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-03 14:14:58 +02:00 · 2007-10-03 14:14:58 +02:00 · 94276eb0a7
commit 94276eb0a7
parent 03d344bb6a
1 changed files with 6 additions and 0 deletions
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/cpu/ppc4xx/4xx_pcie.c
@ -431,6 +431,12 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport)
 {
 	u32 val;

+	/*
+	 * test-only:
+	 * This needs some testing and perhaps changes for
+	 * endpoint configuration. Probably no PHY reset at all, etc.
+	 * sr, 2007-10-03
+	 */
 	if (rootport)
 		val = 0x00401000;
 	else