leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Move machine specific code to board at s3c64xx (v2)

Browse Source 
Move machine specific code to smdk6400.
Some board use OneNAND instead of NAND.

Some register MP0_CS_CFG[5:0] are controled by both h/w and s/w.
So it's better to use macro instead of hard-coded value.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This commit is contained in:
Kyungmin Park 2008-11-26 10:18:13 +09:00 committed by Jean-Christophe PLAGNIOL-VILLARD
parent 767f3acd9f
commit ab0689c316
3 changed files with 12 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
board/samsung/smdk6400/lowlevel_init.S
View File

@ -104,6 +104,13 @@ lowlevel_init:
bl nand_asm_init
#endif
/* Memory subsystem address 0x7e00f120 */
ldr r0, =ELFIN_MEM_SYS_CFG
/* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
mov r1, #S3C64XX_MEM_SYS_CFG_NAND
str r1, [r0]
bl mem_ctrl_asm_init
/* Wakeup support. Don't know if it's going to be used, untested. */

7
cpu/arm1176/s3c64xx/cpu_init.S
View File

@ -28,13 +28,6 @@
.globl mem_ctrl_asm_init
mem_ctrl_asm_init:
/* Memory subsystem address 0x7e00f120 */
ldr r0, =ELFIN_MEM_SYS_CFG
/* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
mov r1, #0xd
str r1, [r0]
/* DMC1 base address 0x7e001000 */
ldr r0, =ELFIN_DMC1_BASE

5
include/s3c6400.h
View File

@ -380,6 +380,11 @@
*/
#define ELFIN_MEM_SYS_CFG 0x7e00f120
#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12)
#define S3C64XX_MEM_SYS_CFG_NAND 0x0008
#define S3C64XX_MEM_SYS_CFG_ONENAND S3C64XX_MEM_SYS_CFG_16BIT
#define GPACON (ELFIN_GPIO_BASE + GPACON_OFFSET)
#define GPADAT (ELFIN_GPIO_BASE + GPADAT_OFFSET)
#define GPAPUD (ELFIN_GPIO_BASE + GPAPUD_OFFSET)