leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Revert "85xx: Using proper I2C source clock divider for MPC8544"

Browse Source 
This reverts commit dffd2446fb.

The fix introduced by this patch is not correct.  The problem is
that the documentation is not correct for the MPC8544 with regards
to which bit in PORDEVSR2 is for the SEC_CFG.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2008-10-16 21:58:49 -05:00 committed by Wolfgang Denk
parent c794c670f7
commit 42653b826a
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
cpu/mpc85xx/speed.c
View File

@ -102,9 +102,9 @@ int get_clocks (void)
* PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
*/
if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
gd->i2c1_clk = sys_info.freqSystemBus / 2;
else
gd->i2c1_clk = sys_info.freqSystemBus / 3;
else
gd->i2c1_clk = sys_info.freqSystemBus / 2;
#else
/* Most 85xx SOCs use CCB/2, so this is the default behavior. */
gd->i2c1_clk = sys_info.freqSystemBus / 2;