Add support for the Tundra TSI148 VME-bridge
From: Reinhard Arlt <reinhard.arlt@esd-electronics.com> This patch adds support for the Tundra TSI148 VME-bridge. It's used on the upcoming esd VME8349 board. Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
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52a0e2dee9
@ -135,6 +135,7 @@ COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o
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COBJS-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o
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COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o
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COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o
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COBJS-$(CONFIG_CMD_TSI148) += cmd_tsi148.o
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COBJS-$(CONFIG_CMD_UBI) += cmd_ubi.o
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COBJS-$(CONFIG_CMD_UBIFS) += cmd_ubifs.o
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COBJS-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o
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488
common/cmd_tsi148.c
Normal file
488
common/cmd_tsi148.c
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@ -0,0 +1,488 @@
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/*
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* (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com
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*
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* base on universe.h by
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*
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* (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define DEBUG
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <pci.h>
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#include <tsi148.h>
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#define PCI_VENDOR PCI_VENDOR_ID_TUNDRA
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#define PCI_DEVICE PCI_DEVICE_ID_TUNDRA_TSI148
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typedef struct _TSI148_DEV TSI148_DEV;
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struct _TSI148_DEV {
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int bus;
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pci_dev_t busdevfn;
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TSI148 *uregs;
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unsigned int pci_bs;
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};
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static TSI148_DEV *dev;
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/*
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* Most of the TSI148 register are BIGENDIAN
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* This is the reason for the __raw_writel(htonl(x), x) usage!
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*/
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int tsi148_init(void)
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{
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int j, result, lastError = 0;
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pci_dev_t busdevfn;
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unsigned int val;
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busdevfn = pci_find_device(PCI_VENDOR, PCI_DEVICE, 0);
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if (busdevfn == -1) {
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puts("Tsi148: No Tundra Tsi148 found!\n");
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return -1;
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}
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/* Lets turn Latency off */
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pci_write_config_dword(busdevfn, 0x0c, 0);
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dev = malloc(sizeof(*dev));
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if (NULL == dev) {
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puts("Tsi148: No memory!\n");
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result = -1;
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goto break_20;
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}
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memset(dev, 0, sizeof(*dev));
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dev->busdevfn = busdevfn;
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pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_0, &val);
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val &= ~0xf;
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dev->uregs = (TSI148 *)val;
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debug("Tsi148: Base : %p\n", dev->uregs);
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/* check mapping */
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debug("Tsi148: Read via mapping, PCI_ID = %08X\n", readl(&dev->uregs->pci_id));
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if (((PCI_DEVICE << 16) | PCI_VENDOR) != readl(&dev->uregs->pci_id)) {
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printf("Tsi148: Cannot read PCI-ID via Mapping: %08x\n",
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readl(&dev->uregs->pci_id));
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result = -1;
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goto break_30;
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}
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debug("Tsi148: PCI_BS = %08X\n", readl(&dev->uregs->pci_mbarl));
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dev->pci_bs = readl(&dev->uregs->pci_mbarl);
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/* turn off windows */
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for (j = 0; j < 8; j++) {
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__raw_writel(htonl(0x00000000), &dev->uregs->outbound[j].otat);
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__raw_writel(htonl(0x00000000), &dev->uregs->inbound[j].itat);
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}
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/* Tsi148 VME timeout etc */
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__raw_writel(htonl(0x00000084), &dev->uregs->vctrl);
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if ((__raw_readl(&dev->uregs->vstat) & 0x00000100) != 0)
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debug("Tsi148: System Controller!\n");
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else
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debug("Tsi148: Not System Controller!\n");
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/*
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* Lets turn off interrupts
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*/
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/* Disable interrupts in Tsi148 first */
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__raw_writel(htonl(0x00000000), &dev->uregs->inten);
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/* Disable interrupt out */
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__raw_writel(htonl(0x00000000), &dev->uregs->inteo);
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eieio();
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/* Reset all IRQ's */
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__raw_writel(htonl(0x03ff3f00), &dev->uregs->intc);
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/* Map all ints to 0 */
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__raw_writel(htonl(0x00000000), &dev->uregs->intm1);
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__raw_writel(htonl(0x00000000), &dev->uregs->intm2);
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eieio();
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val = __raw_readl(&dev->uregs->vstat);
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val &= ~(0x00004000);
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__raw_writel(val, &dev->uregs->vstat);
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eieio();
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debug("Tsi148: register struct size %08x\n", sizeof(TSI148));
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return 0;
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break_30:
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free(dev);
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dev = NULL;
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break_20:
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lastError = result;
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return result;
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}
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/*
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* Create pci slave window (access: pci -> vme)
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*/
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int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, int size, int vam, int vdw)
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{
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int result, i;
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unsigned int ctl = 0;
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if (NULL == dev) {
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result = -1;
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goto exit_10;
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}
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for (i = 0; i < 8; i++) {
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if (0x00000000 == readl(&dev->uregs->outbound[i].otat))
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break;
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}
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if (i > 7) {
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printf("Tsi148: No Image available\n");
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result = -1;
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goto exit_10;
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}
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debug("Tsi148: Using image %d\n", i);
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printf("Tsi148: Pci addr %08x\n", pciAddr);
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__raw_writel(htonl(pciAddr) , &dev->uregs->outbound[i].otsal);
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__raw_writel(0x00000000 , &dev->uregs->outbound[i].otsau);
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__raw_writel(htonl(pciAddr + size), &dev->uregs->outbound[i].oteal);
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__raw_writel(0x00000000 , &dev->uregs->outbound[i].oteau);
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__raw_writel(htonl(vmeAddr - pciAddr), &dev->uregs->outbound[i].otofl);
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__raw_writel(0x00000000 , &dev->uregs->outbound[i].otofu);
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switch (vam & VME_AM_Axx) {
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case VME_AM_A16:
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ctl = 0x00000000;
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break;
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case VME_AM_A24:
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ctl = 0x00000001;
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break;
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case VME_AM_A32:
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ctl = 0x00000002;
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break;
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}
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switch (vam & VME_AM_Mxx) {
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case VME_AM_DATA:
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ctl |= 0x00000000;
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break;
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case VME_AM_PROG:
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ctl |= 0x00000010;
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break;
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}
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if (vam & VME_AM_SUP)
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ctl |= 0x00000020;
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switch (vdw & VME_FLAG_Dxx) {
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case VME_FLAG_D16:
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ctl |= 0x00000000;
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break;
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case VME_FLAG_D32:
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ctl |= 0x00000040;
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break;
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}
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ctl |= 0x80040000; /* enable, no prefetch */
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__raw_writel(htonl(ctl), &dev->uregs->outbound[i].otat);
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debug("Tsi148: window-addr =%p\n",
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&dev->uregs->outbound[i].otsau);
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debug("Tsi148: pci slave window[%d] attr =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].otat)));
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debug("Tsi148: pci slave window[%d] start =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].otsal)));
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debug("Tsi148: pci slave window[%d] end =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].oteal)));
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debug("Tsi148: pci slave window[%d] offset=%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].otofl)));
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return 0;
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exit_10:
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return -result;
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}
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unsigned int tsi148_eval_vam(int vam)
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{
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unsigned int ctl = 0;
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switch (vam & VME_AM_Axx) {
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case VME_AM_A16:
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ctl = 0x00000000;
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break;
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case VME_AM_A24:
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ctl = 0x00000010;
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break;
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case VME_AM_A32:
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ctl = 0x00000020;
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break;
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}
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switch (vam & VME_AM_Mxx) {
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case VME_AM_DATA:
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ctl |= 0x00000001;
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break;
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case VME_AM_PROG:
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ctl |= 0x00000002;
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break;
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case (VME_AM_PROG | VME_AM_DATA):
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ctl |= 0x00000003;
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break;
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}
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if (vam & VME_AM_SUP)
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ctl |= 0x00000008;
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if (vam & VME_AM_USR)
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ctl |= 0x00000004;
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return ctl;
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}
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/*
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* Create vme slave window (access: vme -> pci)
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*/
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int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, int size, int vam)
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{
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int result, i;
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unsigned int ctl = 0;
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if (NULL == dev) {
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result = -1;
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goto exit_10;
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}
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for (i = 0; i < 8; i++) {
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if (0x00000000 == readl(&dev->uregs->inbound[i].itat))
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break;
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}
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if (i > 7) {
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printf("Tsi148: No Image available\n");
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result = -1;
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goto exit_10;
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}
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debug("Tsi148: Using image %d\n", i);
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__raw_writel(htonl(vmeAddr), &dev->uregs->inbound[i].itsal);
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__raw_writel(0x00000000, &dev->uregs->inbound[i].itsau);
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__raw_writel(htonl(vmeAddr + size), &dev->uregs->inbound[i].iteal);
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__raw_writel(0x00000000, &dev->uregs->inbound[i].iteau);
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__raw_writel(htonl(pciAddr - vmeAddr), &dev->uregs->inbound[i].itofl);
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if (vmeAddr > pciAddr)
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__raw_writel(0xffffffff, &dev->uregs->inbound[i].itofu);
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else
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__raw_writel(0x00000000, &dev->uregs->inbound[i].itofu);
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ctl = tsi148_eval_vam(vam);
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ctl |= 0x80000000; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->inbound[i].itat);
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debug("Tsi148: window-addr =%p\n",
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&dev->uregs->inbound[i].itsau);
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debug("Tsi148: vme slave window[%d] attr =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].itat))) ;
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debug("Tsi148: vme slave window[%d] start =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].itsal)));
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debug("Tsi148: vme slave window[%d] end =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].iteal)));
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debug("Tsi148: vme slave window[%d] offset=%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].itofl)));
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return 0;
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exit_10:
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return -result;
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}
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/*
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* Create vme slave window (access: vme -> gcsr)
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*/
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int tsi148_vme_gcsr_window(unsigned int vmeAddr, int vam)
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{
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int result;
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unsigned int ctl;
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result = 0;
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if (NULL == dev) {
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result = 1;
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} else {
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__raw_writel(htonl(vmeAddr), &dev->uregs->gbal);
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__raw_writel(0x00000000, &dev->uregs->gbau);
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ctl = tsi148_eval_vam(vam);
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ctl |= 0x00000080; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->gcsrat);
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}
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return result;
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}
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/*
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* Create vme slave window (access: vme -> crcsr)
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*/
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int tsi148_vme_crcsr_window(unsigned int vmeAddr)
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{
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int result;
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unsigned int ctl;
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result = 0;
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if (NULL == dev) {
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result = 1;
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} else {
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__raw_writel(htonl(vmeAddr), &dev->uregs->crol);
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__raw_writel(0x00000000, &dev->uregs->crou);
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ctl = 0x00000080; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->crat);
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}
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return result;
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}
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/*
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* Create vme slave window (access: vme -> crg)
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*/
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int tsi148_vme_crg_window(unsigned int vmeAddr, int vam)
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{
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int result;
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unsigned int ctl;
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result = 0;
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if (NULL == dev) {
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result = 1;
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} else {
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__raw_writel(htonl(vmeAddr), &dev->uregs->cbal);
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__raw_writel(0x00000000, &dev->uregs->cbau);
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ctl = tsi148_eval_vam(vam);
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ctl |= 0x00000080; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->crgat);
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}
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return result;
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}
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/*
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* Tundra Tsi148 configuration
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*/
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int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0;
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char cmd = 'x';
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/* get parameter */
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if (argc > 1)
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cmd = argv[1][0];
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if (argc > 2)
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addr1 = simple_strtoul(argv[2], NULL, 16);
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if (argc > 3)
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addr2 = simple_strtoul(argv[3], NULL, 16);
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if (argc > 4)
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size = simple_strtoul(argv[4], NULL, 16);
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if (argc > 5)
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vam = simple_strtoul(argv[5], NULL, 16);
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if (argc > 6)
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vdw = simple_strtoul(argv[7], NULL, 16);
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switch (cmd) {
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case 'c':
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if (strcmp(argv[1], "crg") == 0) {
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vam = addr2;
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printf("Tsi148: Configuring VME CRG Window (VME->CRG):\n");
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printf(" vme=%08lx vam=%02lx\n", addr1, vam);
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tsi148_vme_crg_window(addr1, vam);
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} else {
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printf("Tsi148: Configuring VME CR/CSR Window (VME->CR/CSR):\n");
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printf(" pci=%08lx\n", addr1);
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tsi148_vme_crcsr_window(addr1);
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}
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break;
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case 'i': /* init */
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tsi148_init();
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break;
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case 'g':
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vam = addr2;
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printf("Tsi148: Configuring VME GCSR Window (VME->GCSR):\n");
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printf(" vme=%08lx vam=%02lx\n", addr1, vam);
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tsi148_vme_gcsr_window(addr1, vam);
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break;
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case 'v': /* vme */
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printf("Tsi148: Configuring VME Slave Window (VME->PCI):\n");
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printf(" vme=%08lx pci=%08lx size=%08lx vam=%02lx\n",
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addr1, addr2, size, vam);
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tsi148_vme_slave_window(addr1, addr2, size, vam);
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break;
|
||||
case 'p': /* pci */
|
||||
printf("Tsi148: Configuring PCI Slave Window (PCI->VME):\n");
|
||||
printf(" pci=%08lx vme=%08lx size=%08lx vam=%02lx vdw=%02lx\n",
|
||||
addr1, addr2, size, vam, vdw);
|
||||
tsi148_pci_slave_window(addr1, addr2, size, vam, vdw);
|
||||
break;
|
||||
default:
|
||||
printf("Tsi148: Command %s not supported!\n", argv[1]);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
tsi148, 8, 1, do_tsi148,
|
||||
"tsi148 - initialize and configure Turndra Tsi148\n",
|
||||
"init\n"
|
||||
" - initialize tsi148\n"
|
||||
"tsi148 vme [vme_addr] [pci_addr] [size] [vam]\n"
|
||||
" - create vme slave window (access: vme->pci)\n"
|
||||
"tsi148 pci [pci_addr] [vme_addr] [size] [vam] [vdw]\n"
|
||||
" - create pci slave window (access: pci->vme)\n"
|
||||
"tsi148 crg [vme_addr] [vam]\n"
|
||||
" - create vme slave window: (access vme->CRG\n"
|
||||
"tsi148 crcsr [pci_addr]\n"
|
||||
" - create vme slave window: (access vme->CR/CSR\n"
|
||||
"tsi148 gcsr [vme_addr] [vam]\n"
|
||||
" - create vme slave window: (access vme->GCSR\n"
|
||||
" [vam] = VMEbus Address-Modifier: 01 -> A16 Address Space\n"
|
||||
" 02 -> A24 Address Space\n"
|
||||
" 03 -> A32 Address Space\n"
|
||||
" 04 -> Usr AM Code\n"
|
||||
" 08 -> Supervisor AM Code\n"
|
||||
" 10 -> Data AM Code\n"
|
||||
" 20 -> Program AM Code\n"
|
||||
" [vdw] = VMEbus Maximum Datawidth: 02 -> D16 Data Width\n"
|
||||
" 03 -> D32 Data Width\n"
|
||||
);
|
218
include/tsi148.h
Normal file
218
include/tsi148.h
Normal file
@ -0,0 +1,218 @@
|
||||
/*
|
||||
* (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com
|
||||
*
|
||||
* base on universe.h by
|
||||
*
|
||||
* (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _tsi148_h
|
||||
#define _tsi148_h
|
||||
|
||||
#ifndef PCI_DEVICE_ID_TUNDRA_TSI148
|
||||
#define PCI_DEVICE_ID_TUNDRA_TSI148 0x0148
|
||||
#endif
|
||||
|
||||
typedef struct _TSI148 TSI148;
|
||||
typedef struct _OUTBOUND OUTBOUND;
|
||||
typedef struct _INBOUND INBOUND;
|
||||
typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;
|
||||
|
||||
struct _OUTBOUND {
|
||||
unsigned int otsau; /* 0x000 Outbound start upper */
|
||||
unsigned int otsal; /* 0x004 Outbouud start lower */
|
||||
unsigned int oteau; /* 0x008 Outbound end upper */
|
||||
unsigned int oteal; /* 0x00c Outbound end lower */
|
||||
unsigned int otofu; /* 0x010 Outbound translation upper */
|
||||
unsigned int otofl; /* 0x014 Outbound translation lower */
|
||||
unsigned int otbs; /* 0x018 Outbound translation 2eSST */
|
||||
unsigned int otat; /* 0x01c Outbound translation attr */
|
||||
};
|
||||
|
||||
struct _INBOUND {
|
||||
unsigned int itsau; /* 0x000 inbound start upper */
|
||||
unsigned int itsal; /* 0x004 inbouud start lower */
|
||||
unsigned int iteau; /* 0x008 inbound end upper */
|
||||
unsigned int iteal; /* 0x00c inbound end lower */
|
||||
unsigned int itofu; /* 0x010 inbound translation upper */
|
||||
unsigned int itofl; /* 0x014 inbound translation lower */
|
||||
unsigned int itat; /* 0x018 inbound translation attr */
|
||||
unsigned int spare; /* 0x01c not used */
|
||||
};
|
||||
|
||||
struct _TSI148 {
|
||||
unsigned int pci_id; /* 0x000 */
|
||||
unsigned int pci_csr; /* 0x004 */
|
||||
unsigned int pci_class; /* 0x008 */
|
||||
unsigned int pci_misc0; /* 0x00c */
|
||||
unsigned int pci_mbarl; /* 0x010 */
|
||||
unsigned int pci_mbarh; /* 0x014 */
|
||||
unsigned int spare0[(0x03c-0x018)/4]; /* 0x018 */
|
||||
unsigned int pci_misc1; /* 0x03c */
|
||||
unsigned int pci_pcixcap; /* 0x040 */
|
||||
unsigned int pci_pcixstat; /* 0x044 */
|
||||
unsigned int spare1[(0x100-0x048)/4]; /* 0x048 */
|
||||
OUTBOUND outbound[8]; /* 0x100 */
|
||||
unsigned int viack[8]; /* 0x204 */
|
||||
unsigned int rmwau; /* 0x220 */
|
||||
unsigned int rmwal; /* 0x224 */
|
||||
unsigned int rmwen; /* 0x228 */
|
||||
unsigned int rmwc; /* 0x22c */
|
||||
unsigned int rmws; /* 0x230 */
|
||||
unsigned int vmctrl; /* 0x234 */
|
||||
unsigned int vctrl; /* 0x238 */
|
||||
unsigned int vstat; /* 0x23c */
|
||||
unsigned int pcsr; /* 0x240 */
|
||||
unsigned int spare2[3]; /* 0x244 - 0x24c */
|
||||
unsigned int vmefl; /* 0x250 */
|
||||
unsigned int spare3[3]; /* 0x254 - 0x25c */
|
||||
unsigned int veau; /* 0x260 */
|
||||
unsigned int veal; /* 0x264 */
|
||||
unsigned int veat; /* 0x268 */
|
||||
unsigned int spare4[1]; /* 0x26c */
|
||||
unsigned int edpau; /* 0x270 */
|
||||
unsigned int edpal; /* 0x274 */
|
||||
unsigned int edpxa; /* 0x278 */
|
||||
unsigned int edpxs; /* 0x27c */
|
||||
unsigned int edpat; /* 0x280 */
|
||||
unsigned int spare5[31]; /* 0x284 - 0x2fc */
|
||||
INBOUND inbound[8]; /* 0x100 */
|
||||
unsigned int gbau; /* 0x400 */
|
||||
unsigned int gbal; /* 0x404 */
|
||||
unsigned int gcsrat; /* 0x408 */
|
||||
unsigned int cbau; /* 0x40c */
|
||||
unsigned int cbal; /* 0x410 */
|
||||
unsigned int crgat; /* 0x414 */
|
||||
unsigned int crou; /* 0x418 */
|
||||
unsigned int crol; /* 0x41c */
|
||||
unsigned int crat; /* 0x420 */
|
||||
unsigned int lmbau; /* 0x424 */
|
||||
unsigned int lmbal; /* 0x428 */
|
||||
unsigned int lmat; /* 0x42c */
|
||||
unsigned int r64bcu; /* 0x430 */
|
||||
unsigned int r64bcl; /* 0x434 */
|
||||
unsigned int bpgtr; /* 0x438 */
|
||||
unsigned int bpctr; /* 0x43c */
|
||||
unsigned int vicr; /* 0x440 */
|
||||
unsigned int spare6[1]; /* 0x444 */
|
||||
unsigned int inten; /* 0x448 */
|
||||
unsigned int inteo; /* 0x44c */
|
||||
unsigned int ints; /* 0x450 */
|
||||
unsigned int intc; /* 0x454 */
|
||||
unsigned int intm1; /* 0x458 */
|
||||
unsigned int intm2; /* 0x45c */
|
||||
unsigned int spare7[40]; /* 0x460 - 0x4fc */
|
||||
unsigned int dctl0; /* 0x500 */
|
||||
unsigned int dsta0; /* 0x504 */
|
||||
unsigned int dcsau0; /* 0x508 */
|
||||
unsigned int dcsal0; /* 0x50c */
|
||||
unsigned int dcdau0; /* 0x510 */
|
||||
unsigned int dcdal0; /* 0x514 */
|
||||
unsigned int dclau0; /* 0x518 */
|
||||
unsigned int dclal0; /* 0x51c */
|
||||
unsigned int dsau0; /* 0x520 */
|
||||
unsigned int dsal0; /* 0x524 */
|
||||
unsigned int ddau0; /* 0x528 */
|
||||
unsigned int ddal0; /* 0x52c */
|
||||
unsigned int dsat0; /* 0x530 */
|
||||
unsigned int ddat0; /* 0x534 */
|
||||
unsigned int dnlau0; /* 0x538 */
|
||||
unsigned int dnlal0; /* 0x53c */
|
||||
unsigned int dcnt0; /* 0x540 */
|
||||
unsigned int ddbs0; /* 0x544 */
|
||||
unsigned int r20[14]; /* 0x548 - 0x57c */
|
||||
unsigned int dctl1; /* 0x580 */
|
||||
unsigned int dsta1; /* 0x584 */
|
||||
unsigned int dcsau1; /* 0x588 */
|
||||
unsigned int dcsal1; /* 0x58c */
|
||||
unsigned int dcdau1; /* 0x590 */
|
||||
unsigned int dcdal1; /* 0x594 */
|
||||
unsigned int dclau1; /* 0x598 */
|
||||
unsigned int dclal1; /* 0x59c */
|
||||
unsigned int dsau1; /* 0x5a0 */
|
||||
unsigned int dsal1; /* 0x5a4 */
|
||||
unsigned int ddau1; /* 0x5a8 */
|
||||
unsigned int ddal1; /* 0x5ac */
|
||||
unsigned int dsat1; /* 0x5b0 */
|
||||
unsigned int ddat1; /* 0x5b4 */
|
||||
unsigned int dnlau1; /* 0x5b8 */
|
||||
unsigned int dnlal1; /* 0x5bc */
|
||||
unsigned int dcnt1; /* 0x5c0 */
|
||||
unsigned int ddbs1; /* 0x5c4 */
|
||||
unsigned int r21[14]; /* 0x5c8 - 0x5fc */
|
||||
unsigned int devi_veni_2; /* 0x600 */
|
||||
unsigned int gctrl_ga_revid; /* 0x604 */
|
||||
unsigned int semaphore0_1_2_3; /* 0x608 */
|
||||
unsigned int semaphore4_5_6_7; /* 0x60c */
|
||||
unsigned int mbox0; /* 0x610 */
|
||||
unsigned int mbox1; /* 0x614 */
|
||||
unsigned int mbox2; /* 0x618 */
|
||||
unsigned int mbox3; /* 0x61c */
|
||||
unsigned int r22[629]; /* 0x620 - 0xff0 */
|
||||
unsigned int csrbcr; /* 0xff4 */
|
||||
unsigned int csrbsr; /* 0xff8 */
|
||||
unsigned int cbar; /* 0xffc */
|
||||
};
|
||||
|
||||
#define IRQ_VOWN 0x0001
|
||||
#define IRQ_VIRQ1 0x0002
|
||||
#define IRQ_VIRQ2 0x0004
|
||||
#define IRQ_VIRQ3 0x0008
|
||||
#define IRQ_VIRQ4 0x0010
|
||||
#define IRQ_VIRQ5 0x0020
|
||||
#define IRQ_VIRQ6 0x0040
|
||||
#define IRQ_VIRQ7 0x0080
|
||||
#define IRQ_DMA 0x0100
|
||||
#define IRQ_LERR 0x0200
|
||||
#define IRQ_VERR 0x0400
|
||||
#define IRQ_res 0x0800
|
||||
#define IRQ_IACK 0x1000
|
||||
#define IRQ_SWINT 0x2000
|
||||
#define IRQ_SYSFAIL 0x4000
|
||||
#define IRQ_ACFAIL 0x8000
|
||||
|
||||
struct _TDMA_CMD_PACKET {
|
||||
unsigned int dctl; /* DMA Control */
|
||||
unsigned int dtbc; /* Transfer Byte Count */
|
||||
unsigned int dlv; /* PCI Address */
|
||||
unsigned int res1; /* Reserved */
|
||||
unsigned int dva; /* Vme Address */
|
||||
unsigned int res2; /* Reserved */
|
||||
unsigned int dcpp; /* Pointer to Numed Cmd Packet with rPN */
|
||||
unsigned int res3; /* Reserved */
|
||||
};
|
||||
|
||||
#define VME_AM_A16 0x01
|
||||
#define VME_AM_A24 0x02
|
||||
#define VME_AM_A32 0x03
|
||||
#define VME_AM_Axx 0x03
|
||||
#define VME_AM_USR 0x04
|
||||
#define VME_AM_SUP 0x08
|
||||
#define VME_AM_DATA 0x10
|
||||
#define VME_AM_PROG 0x20
|
||||
#define VME_AM_Mxx (VME_AM_DATA | VME_AM_PROG)
|
||||
|
||||
#define VME_FLAG_D8 0x01
|
||||
#define VME_FLAG_D16 0x02
|
||||
#define VME_FLAG_D32 0x03
|
||||
#define VME_FLAG_Dxx 0x03
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user