leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Blackfin: bfin_mac: update port muxing

Browse Source 
Adds support more Blackfin parts and fixes broken muxing for older ones.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2008-10-06 03:42:20 -04:00
parent 05b75e4883
commit 1118ea7369
1 changed files with 35 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

47
drivers/net/bfin_mac.c
View File

@ -331,20 +331,43 @@ static int SetupSystemRegs(int *opmode)
*pVR_CTL |= CLKBUFOE;
/* Set all the pins to peripheral mode */
#ifndef CONFIG_BFIN_MAC_RMII
*pPORTH_FER = 0xFFFF;
#ifdef __ADSPBF52x__
*pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2 | PORT_x_MUX_2_FUNC_2;
#endif
#ifdef CONFIG_BFIN_MAC_RMII
/* grab RMII pins */
# if defined(__ADSPBF51x__)
*pPORTF_MUX = (*pPORTF_MUX & \
~(PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK | PORT_x_MUX_5_MASK)) | \
PORT_x_MUX_3_FUNC_1 | PORT_x_MUX_4_FUNC_1 | PORT_x_MUX_5_FUNC_1;
*pPORTF_FER |= PF8 | PF9 | PF10 | PF11 | PF12 | PF13 | PF14 | PF15;
*pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_1;
*pPORTG_FER |= PG0 | PG1 | PG2;
# elif defined(__ADSPBF52x__)
*pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2;
*pPORTG_FER |= PG14 | PG15;
*pPORTH_MUX = (*pPORTH_MUX & ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK)) | \
PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2;
*pPORTH_FER |= PH0 | PH1 | PH2 | PH3 | PH4 | PH5 | PH6 | PH7 | PH8;
# else
*pPORTH_FER |= PH0 | PH1 | PH4 | PH5 | PH6 | PH8 | PH9 | PH14 | PH15;
# endif
#else
#if defined(__ADSPBF536__) || defined(__ADSPBF537__)
*pPORTH_FER = 0xC373;
#endif
#ifdef __ADSPBF52x__
*pPORTH_FER = 0x01FF;
*pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2;
#endif
/* grab MII & RMII pins */
# if defined(__ADSPBF51x__)
*pPORTF_MUX = (*pPORTF_MUX & \
~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK | PORT_x_MUX_5_MASK)) | \
PORT_x_MUX_0_FUNC_1 | PORT_x_MUX_1_FUNC_1 | PORT_x_MUX_3_FUNC_1 | PORT_x_MUX_4_FUNC_1 | PORT_x_MUX_5_FUNC_1;
*pPORTF_FER |= PF0 | PF1 | PF2 | PF3 | PF4 | PF5 | PF6 | PF8 | PF9 | PF10 | PF11 | PF12 | PF13 | PF14 | PF15;
*pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_1;
*pPORTG_FER |= PG0 | PG1 | PG2;
# elif defined(__ADSPBF52x__)
*pPORTG_MUX = (*pPORTG_MUX & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2;
*pPORTG_FER |= PG14 | PG15;
*pPORTH_MUX = PORT_x_MUX_0_FUNC_2 | PORT_x_MUX_1_FUNC_2 | PORT_x_MUX_2_FUNC_2;
*pPORTH_FER = -1; /* all pins */
# else
*pPORTH_FER = -1; /* all pins */
# endif
#endif
/* MDC = 2.5 MHz */
sysctl = SET_MDCDIV(24);
/* Odd word alignment for Receive Frame DMA word */