[INKA4x0] NG hardware: flash support
Disabled and remove inka4x0 custom flash driver, use CFI flash driver instead. Signed-off-by: Marian Balakowicz <m8@semihalf.com>
This commit is contained in:
Marian Balakowicz
parent
5fb6d7191e
commit
5e71c51d74
@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS := $(BOARD).o flash.o
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COBJS := $(BOARD).o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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@ -1,432 +0,0 @@
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/*
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* (C) Copyright 2003-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/*
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* CPU to flash interface is 8-bit, so make declaration accordingly
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*/
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typedef unsigned char FLASH_PORT_WIDTH;
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typedef volatile unsigned char FLASH_PORT_WIDTHV;
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#define FPW FLASH_PORT_WIDTH
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#define FPWV FLASH_PORT_WIDTHV
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#define FLASH_CYCLE1 0x0555
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#define FLASH_CYCLE2 0x02aa
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size(FPWV *addr, flash_info_t *info);
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static void flash_reset(flash_info_t *info);
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static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data);
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static flash_info_t *flash_get_info(ulong base);
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/*-----------------------------------------------------------------------
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* flash_init()
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*
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* sets up flash_info and returns size of FLASH (bytes)
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*/
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unsigned long flash_init (void)
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{
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unsigned long size = 0;
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extern void flash_preinit(void);
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ulong flashbase = CFG_FLASH_BASE;
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flash_preinit();
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/* Init: no FLASHes known */
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memset(&flash_info[0], 0, sizeof(flash_info_t));
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flash_info[0].size =
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flash_get_size((FPW *)flashbase, &flash_info[0]);
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size = flash_info[0].size;
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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/* monitor protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE+monitor_flash_len-1,
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flash_get_info(CFG_MONITOR_BASE));
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#endif
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#ifdef CFG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR+CFG_ENV_SIZE-1,
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flash_get_info(CFG_ENV_ADDR));
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#endif
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return size ? size : 1;
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_reset(flash_info_t *info)
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{
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FPWV *base = (FPWV *)(info->start[0]);
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/* Put FLASH back in read mode */
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
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*base = (FPW)0x00FF00FF; /* Intel Read Mode */
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else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
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*base = (FPW)0x00F000F0; /* AMD Read Mode */
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}
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/*-----------------------------------------------------------------------
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*/
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static flash_info_t *flash_get_info(ulong base)
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{
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int i;
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flash_info_t * info;
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for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
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info = & flash_info[i];
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if (info->size && info->start[0] <= base &&
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base <= info->start[0] + info->size - 1)
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break;
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}
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return i == CFG_MAX_FLASH_BANKS ? 0 : info;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_AMD: printf ("AMD "); break;
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case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break;
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case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
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case FLASH_MAN_SST: printf ("SST "); break;
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case FLASH_MAN_STM: printf ("STM "); break;
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case FLASH_MAN_INTEL: printf ("INTEL "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_AM116DB:
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printf ("AM29LV116DB (16Mbit, bottom boot sect)\n");
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break;
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case FLASH_AMLV128U:
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printf ("AM29LV128ML (128Mbit, uniform sector size)\n");
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break;
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case FLASH_AM160B:
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printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
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break;
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default:
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printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20,
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info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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if ((i % 5) == 0) {
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printf ("\n ");
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}
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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return;
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}
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/*-----------------------------------------------------------------------
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*/
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/*
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* The following code cannot be run from FLASH!
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*/
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ulong flash_get_size (FPWV *addr, flash_info_t *info)
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{
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int i;
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ulong base = (ulong)addr;
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/* Write auto select command: read Manufacturer ID */
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/* Write auto select command sequence and test FLASH answer */
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addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
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/* The manufacturer codes are only 1 byte, so just use 1 byte.
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* This works for any bus width and any FLASH device width.
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*/
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udelay(100);
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switch (addr[0] & 0xff) {
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case (uchar)AMD_MANUFACT:
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debug ("Manufacturer: AMD (Spansion)\n");
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info->flash_id = FLASH_MAN_AMD;
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break;
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case (uchar)INTEL_MANUFACT:
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debug ("Manufacturer: Intel (not supported yet)\n");
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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break;
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}
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/* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
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if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[1]) {
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case (uchar)AMD_ID_LV116DB:
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debug ("Chip: AM29LV116DB\n");
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info->flash_id += FLASH_AM116DB;
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info->sector_count = 35;
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info->size = 0x00200000;
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/*
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* The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
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* the other ones are 64 kB
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*/
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info->start[0] = base + 0x00000000;
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info->start[1] = base + 0x00004000;
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info->start[2] = base + 0x00006000;
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info->start[3] = base + 0x00008000;
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for( i = 4; i < info->sector_count; i++ )
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info->start[i] =
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base + (i * (64 << 10)) - 0x00030000;
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break; /* => 2 MB */
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case (FPW)AMD_ID_LV160B:
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debug ("Chip: AM29LV160MB\n");
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info->flash_id += FLASH_AM160B;
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info->sector_count = 35;
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info->size = 0x00400000;
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/*
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* The first 4 sectors are 16 kB, 8 kB, 8 kB and 32 kB, all
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* the other ones are 64 kB
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*/
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info->start[0] = base + 0x00000000;
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info->start[1] = base + 0x00008000;
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info->start[2] = base + 0x0000C000;
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info->start[3] = base + 0x00010000;
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for( i = 4; i < info->sector_count; i++ )
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info->start[i] =
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base + (i * 2 * (64 << 10)) - 0x00060000;
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break; /* => 4 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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}
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/* Put FLASH back in read mode */
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flash_reset(info);
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return (info->size);
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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FPWV *addr = (FPWV*)(info->start[0]);
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int flag, prot, sect, l_sect;
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ulong start, now, last;
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debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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if ((info->flash_id == FLASH_UNKNOWN) ||
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(info->flash_id > FLASH_AMD_COMP)) {
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printf ("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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prot = 0;
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for (sect=s_first; sect<=s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf ("\n");
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}
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l_sect = -1;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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addr[0x0555] = (FPW)0x00AA00AA;
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addr[0x02AA] = (FPW)0x00550055;
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addr[0x0555] = (FPW)0x00800080;
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addr[0x0555] = (FPW)0x00AA00AA;
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addr[0x02AA] = (FPW)0x00550055;
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect<=s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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addr = (FPWV*)(info->start[sect]);
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addr[0] = (FPW)0x00300030;
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l_sect = sect;
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}
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}
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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/*
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* We wait for the last triggered sector
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*/
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if (l_sect < 0)
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goto DONE;
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start = get_timer (0);
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last = start;
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addr = (FPWV*)(info->start[l_sect]);
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while ((addr[0] & (FPW)0x00800080) != (FPW)0x00800080) {
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if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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return 1;
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}
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/* show that we're waiting */
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if ((now - last) > 1000) { /* every second */
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putc ('.');
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last = now;
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}
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}
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DONE:
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/* reset to read mode */
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addr = (FPWV*)info->start[0];
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addr[0] = (FPW)0x00F000F0; /* reset bank */
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printf (" done\n");
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return 0;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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int i, rc = 0;
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for (i = 0; i < cnt; i++)
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if ((rc = write_word_amd(info, (FPW *)(addr+i), src[i])) != 0) {
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return (rc);
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}
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return rc;
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}
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/*-----------------------------------------------------------------------
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* Write a word to Flash for AMD FLASH
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* A word is 16 or 32 bits, whichever the bus width of the flash bank
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* (not an individual chip) is.
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*
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* returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data)
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{
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ulong start;
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int flag;
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FPWV *base; /* first address in flash bank */
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/* Check if Flash is (sufficiently) erased */
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if ((*dest & data) != data) {
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return (2);
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}
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base = (FPWV *)(info->start[0]);
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
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base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
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base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
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*dest = data; /* start programming the data */
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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start = get_timer (0);
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/* data polling for D7 */
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while ((*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) {
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if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
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*dest = (FPW)0x00F000F0; /* reset bank */
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return (1);
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}
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}
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return (0);
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}
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@ -156,21 +156,20 @@
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/*
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* Flash configuration
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*/
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#define CFG_FLASH_BASE 0xFFE00000
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#define CFG_FLASH_SIZE 0x00200000 /* 2 MByte */
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#define CFG_MAX_FLASH_SECT 35 /* max num of sects on one chip */
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) /* second sector */
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#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
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(= chip selects) */
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#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
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#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
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#define CFG_FLASH_CFI_DRIVER 1
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#define CFG_FLASH_BASE 0xffe00000
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#define CFG_FLASH_SIZE 0x00200000
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#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
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#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
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#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
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#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
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/*
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* Environment settings
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*/
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
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#define CFG_ENV_SIZE 0x2000
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#define CFG_ENV_SECT_SIZE 0x2000
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#define CONFIG_ENV_OVERWRITE 1
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