powerpc: Move duplicated BAT defines to mmu.h
The BAT fields are architected; there's no need for these to be in cpu-specific files. Drop the duplication and move these to include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only used by the alaska board, and switch to using the BATU_BL_xxx defines used by all the other boards. The BL_ defines previously in use had to be shifted into the proper position for use, which was inefficient. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
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@ -33,9 +33,9 @@ void setupBat (ulong size)
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/* Flash 0 */
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#if defined (CONFIG_SYS_AMD_BOOT)
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batu = CONFIG_SYS_FLASH0_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
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batu = CONFIG_SYS_FLASH0_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
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#else
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batu = CONFIG_SYS_FLASH0_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
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batu = CONFIG_SYS_FLASH0_BASE | BATU_BL_16M | BPP_RW | BPP_RX;
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#endif
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batl = CONFIG_SYS_FLASH0_BASE | 0x22;
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write_bat (IBAT0, batu, batl);
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@ -43,22 +43,22 @@ void setupBat (ulong size)
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/* Flash 1 */
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#if defined (CONFIG_SYS_AMD_BOOT)
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batu = CONFIG_SYS_FLASH1_BASE | (BL_16M << 2) | BPP_RW | BPP_RX;
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batu = CONFIG_SYS_FLASH1_BASE | BATU_BL_16M | BPP_RW | BPP_RX;
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#else
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batu = CONFIG_SYS_FLASH1_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
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batu = CONFIG_SYS_FLASH1_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
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#endif
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batl = CONFIG_SYS_FLASH1_BASE | 0x22;
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write_bat (IBAT1, batu, batl);
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write_bat (DBAT1, batu, batl);
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/* CPLD */
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batu = CONFIG_SYS_CPLD_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
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batu = CONFIG_SYS_CPLD_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
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batl = CONFIG_SYS_CPLD_BASE | 0x22;
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write_bat (IBAT2, 0, 0);
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write_bat (DBAT2, batu, batl);
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/* FPGA */
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batu = CONFIG_SYS_FPGA_BASE | (BL_512K << 2) | BPP_RW | BPP_RX;
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batu = CONFIG_SYS_FPGA_BASE | BATU_BL_512K | BPP_RW | BPP_RX;
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batl = CONFIG_SYS_FPGA_BASE | 0x22;
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write_bat (IBAT3, 0, 0);
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write_bat (DBAT3, batu, batl);
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@ -80,17 +80,17 @@ void setupBat (ulong size)
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mtspr (DBAT5U, batu);
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if (size <= 0x800000) /* 8MB */
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blocksize = BL_8M << 2;
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blocksize = BATU_BL_8M;
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else if (size <= 0x1000000) /* 16MB */
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blocksize = BL_16M << 2;
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blocksize = BATU_BL_16M;
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else if (size <= 0x2000000) /* 32MB */
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blocksize = BL_32M << 2;
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blocksize = BATU_BL_32M;
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else if (size <= 0x4000000) /* 64MB */
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blocksize = BL_64M << 2;
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blocksize = BATU_BL_64M;
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else if (size <= 0x8000000) /* 128MB */
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blocksize = BL_128M << 2;
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blocksize = BATU_BL_128M;
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else if (size <= 0x10000000) /* 256MB */
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blocksize = BL_256M << 2;
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blocksize = BATU_BL_256M;
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/* Memory */
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batu = CONFIG_SYS_SDRAM_BASE | blocksize | BPP_RW | BPP_RX;
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@ -108,17 +108,17 @@ void setupBat (ulong size)
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} else {
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size -= 0x10000000;
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if (size <= 0x800000) /* 8MB */
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blocksize = BL_8M << 2;
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blocksize = BATU_BL_8M;
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else if (size <= 0x1000000) /* 16MB */
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blocksize = BL_16M << 2;
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blocksize = BATU_BL_16M;
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else if (size <= 0x2000000) /* 32MB */
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blocksize = BL_32M << 2;
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blocksize = BATU_BL_32M;
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else if (size <= 0x4000000) /* 64MB */
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blocksize = BL_64M << 2;
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blocksize = BATU_BL_64M;
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else if (size <= 0x8000000) /* 128MB */
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blocksize = BL_128M << 2;
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blocksize = BATU_BL_128M;
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else if (size <= 0x10000000) /* 256MB */
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blocksize = BL_256M << 2;
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blocksize = BATU_BL_256M;
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batu = (CONFIG_SYS_SDRAM_BASE +
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0x10000000) | blocksize | BPP_RW | BPP_RX;
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@ -27,6 +27,7 @@
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#include <asm/processor.h>
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#include <asm/pci_io.h>
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#include <mpc824x.h>
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#include <asm/mmu.h>
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int (*do_flash_erase)(flash_info_t*, uint32_t, uint32_t);
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int (*write_dword)(flash_info_t*, ulong, uint64_t);
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@ -27,6 +27,7 @@
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#include <i2c.h>
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#include <netdev.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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int checkboard(void)
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{
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@ -66,43 +66,6 @@
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#define L2CR_L2OH_INV 0x00020000 /* bits 14-15 - output hold time = long */
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#define L2CR_L2IP 0x00000001 /* global invalidate in progress */
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/*----------------------------------------------------------------
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* BAT settings. Look in config_<BOARD>.h for the actual setup
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*/
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#define BATU_BL_128K 0x00000000
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#define BATU_BL_256K 0x00000004
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#define BATU_BL_512K 0x0000000c
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#define BATU_BL_1M 0x0000001c
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#define BATU_BL_2M 0x0000003c
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#define BATU_BL_4M 0x0000007c
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#define BATU_BL_8M 0x000000fc
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#define BATU_BL_16M 0x000001fc
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#define BATU_BL_32M 0x000003fc
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#define BATU_BL_64M 0x000007fc
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#define BATU_BL_128M 0x00000ffc
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#define BATU_BL_256M 0x00001ffc
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#define BATU_VS 0x00000002
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#define BATU_VP 0x00000001
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#define BATU_INVALID 0x00000000
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#define BATL_WRITETHROUGH 0x00000040
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#define BATL_CACHEINHIBIT 0x00000020
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#define BATL_MEMCOHERENCE 0x00000010
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#define BATL_GUARDEDSTORAGE 0x00000008
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#define BATL_NO_ACCESS 0x00000000
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#define BATL_PP_MSK 0x00000003
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#define BATL_PP_00 0x00000000 /* No access */
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#define BATL_PP_01 0x00000001 /* Read-only */
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#define BATL_PP_10 0x00000002 /* Read-write */
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#define BATL_PP_11 0x00000003
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#define BATL_PP_NO_ACCESS BATL_PP_00
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#define BATL_PP_RO BATL_PP_01
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#define BATL_PP_RW BATL_PP_10
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#ifndef __ASSEMBLY__
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/* cpu ids we detect */
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typedef enum __cpu_t {
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@ -88,39 +88,4 @@
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#define HID2_IWLCK_101 0x0000A000 /* way 0 through way 4 locked */
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#define HID2_IWLCK_110 0x0000C000 /* way 0 through way 5 locked */
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/* BAT (block address translation */
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#define BATU_BEPI_MSK 0xfffe0000
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#define BATU_BL_MSK 0x00001ffc
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#define BATU_BL_128K 0x00000000
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#define BATU_BL_256K 0x00000004
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#define BATU_BL_512K 0x0000000c
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#define BATU_BL_1M 0x0000001c
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#define BATU_BL_2M 0x0000003c
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#define BATU_BL_4M 0x0000007c
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#define BATU_BL_8M 0x000000fc
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#define BATU_BL_16M 0x000001fc
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#define BATU_BL_32M 0x000003fc
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#define BATU_BL_64M 0x000007fc
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#define BATU_BL_128M 0x00000ffc
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#define BATU_BL_256M 0x00001ffc
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#define BATU_VS 0x00000002
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#define BATU_VP 0x00000001
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#define BATL_BRPN_MSK 0xfffe0000
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#define BATL_WIMG_MSK 0x00000078
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#define BATL_WRITETHROUGH 0x00000040
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#define BATL_CACHEINHIBIT 0x00000020
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#define BATL_MEMCOHERENCE 0x00000010
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#define BATL_GUARDEDSTORAGE 0x00000008
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#define BATL_PP_MSK 0x00000003
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#define BATL_PP_00 0x00000000 /* No access */
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#define BATL_PP_01 0x00000001 /* Read-only */
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#define BATL_PP_10 0x00000002 /* Read-write */
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#define BATL_PP_11 0x00000003
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#endif /* __E300_H__ */
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@ -153,19 +153,50 @@ extern void print_bats(void);
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#endif /* __ASSEMBLY__ */
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/* Block size masks */
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#define BL_128K 0x000
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#define BL_256K 0x001
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#define BL_512K 0x003
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#define BL_1M 0x007
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#define BL_2M 0x00F
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#define BL_4M 0x01F
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#define BL_8M 0x03F
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#define BL_16M 0x07F
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#define BL_32M 0x0FF
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#define BL_64M 0x1FF
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#define BL_128M 0x3FF
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#define BL_256M 0x7FF
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#define BATU_VS 0x00000002
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#define BATU_VP 0x00000001
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#define BATU_INVALID 0x00000000
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#define BATL_WRITETHROUGH 0x00000040
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#define BATL_CACHEINHIBIT 0x00000020
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#define BATL_MEMCOHERENCE 0x00000010
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#define BATL_GUARDEDSTORAGE 0x00000008
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#define BATL_NO_ACCESS 0x00000000
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#define BATL_PP_MSK 0x00000003
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#define BATL_PP_00 0x00000000 /* No access */
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#define BATL_PP_01 0x00000001 /* Read-only */
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#define BATL_PP_10 0x00000002 /* Read-write */
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#define BATL_PP_11 0x00000003
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#define BATL_PP_NO_ACCESS BATL_PP_00
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#define BATL_PP_RO BATL_PP_01
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#define BATL_PP_RW BATL_PP_10
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/* BAT Block size values */
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#define BATU_BL_128K 0x00000000
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#define BATU_BL_256K 0x00000004
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#define BATU_BL_512K 0x0000000c
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#define BATU_BL_1M 0x0000001c
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#define BATU_BL_2M 0x0000003c
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#define BATU_BL_4M 0x0000007c
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#define BATU_BL_8M 0x000000fc
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#define BATU_BL_16M 0x000001fc
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#define BATU_BL_32M 0x000003fc
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#define BATU_BL_64M 0x000007fc
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#define BATU_BL_128M 0x00000ffc
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#define BATU_BL_256M 0x00001ffc
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/* Block lengths for processors that support extended block length */
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#ifdef HID0_XBSEN
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#define BATU_BL_512M 0x00003ffc
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#define BATU_BL_1G 0x00007ffc
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#define BATU_BL_2G 0x0000fffc
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#define BATU_BL_4G 0x0001fffc
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#define BATU_BL_MAX BATU_BL_4G
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#else
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#define BATU_BL_MAX BATU_BL_256M
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#endif
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/* BAT Access Protection */
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#define BPP_XX 0x00 /* No access */
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@ -451,45 +451,6 @@
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#define MICR_EADDR_MASK 0x30000000
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#define MICR_EADDR_SHIFT 28
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#define BATU_BEPI_MSK 0xfffe0000
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#define BATU_BL_MSK 0x00001ffc
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#define BATU_BL_128K 0x00000000
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#define BATU_BL_256K 0x00000004
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#define BATU_BL_512K 0x0000000c
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#define BATU_BL_1M 0x0000001c
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#define BATU_BL_2M 0x0000003c
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#define BATU_BL_4M 0x0000007c
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#define BATU_BL_8M 0x000000fc
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#define BATU_BL_16M 0x000001fc
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#define BATU_BL_32M 0x000003fc
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#define BATU_BL_64M 0x000007fc
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#define BATU_BL_128M 0x00000ffc
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#define BATU_BL_256M 0x00001ffc
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#define BATU_VS 0x00000002
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#define BATU_VP 0x00000001
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#define BATL_BRPN_MSK 0xfffe0000
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#define BATL_WIMG_MSK 0x00000078
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#define BATL_WRITETHROUGH 0x00000040
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#define BATL_CACHEINHIBIT 0x00000020
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#define BATL_MEMCOHERENCE 0x00000010
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#define BATL_GUARDEDSTORAGE 0x00000008
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#define BATL_PP_MSK 0x00000003
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#define BATL_PP_00 0x00000000 /* No access */
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#define BATL_PP_01 0x00000001 /* Read-only */
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#define BATL_PP_10 0x00000002 /* Read-write */
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#define BATL_PP_11 0x00000003
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/*
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* I'd attempt to do defines for the PP bits, but it's use is a bit
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* too complex, see the PowerPC Operating Environment Architecture
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* section in the PowerPc arch book, chapter 4.
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*/
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/*eumb and epic config*/
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#define EPIC_FPR 0x00041000
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@ -34,47 +34,6 @@
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#define L2CR_HWF 0x00000800 /* bit 20 - hardware flush */
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#define L2CR_L2IP 0x00000001 /* global invalidate in progress */
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/*
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* BAT settings. Look in config_<BOARD>.h for the actual setup
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*/
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#define BATU_BL_128K 0x00000000
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#define BATU_BL_256K 0x00000004
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#define BATU_BL_512K 0x0000000c
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#define BATU_BL_1M 0x0000001c
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#define BATU_BL_2M 0x0000003c
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#define BATU_BL_4M 0x0000007c
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#define BATU_BL_8M 0x000000fc
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#define BATU_BL_16M 0x000001fc
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#define BATU_BL_32M 0x000003fc
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#define BATU_BL_64M 0x000007fc
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#define BATU_BL_128M 0x00000ffc
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#define BATU_BL_256M 0x00001ffc
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#define BATU_BL_512M 0x00003ffc
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#define BATU_BL_1G 0x00007ffc
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#define BATU_BL_2G 0x0000fffc
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#define BATU_BL_4G 0x0001fffc
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#define BATU_VS 0x00000002
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#define BATU_VP 0x00000001
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#define BATU_INVALID 0x00000000
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#define BATL_WRITETHROUGH 0x00000040
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#define BATL_CACHEINHIBIT 0x00000020
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#define BATL_MEMCOHERENCE 0x00000010
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#define BATL_GUARDEDSTORAGE 0x00000008
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#define BATL_NO_ACCESS 0x00000000
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#define BATL_PP_MSK 0x00000003
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#define BATL_PP_00 0x00000000 /* No access */
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#define BATL_PP_01 0x00000001 /* Read-only */
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#define BATL_PP_10 0x00000002 /* Read-write */
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#define BATL_PP_11 0x00000003
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#define BATL_PP_NO_ACCESS BATL_PP_00
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#define BATL_PP_RO BATL_PP_01
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#define BATL_PP_RW BATL_PP_10
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#define HID0_XBSEN 0x00000100
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#define HID0_HIGH_BAT_EN 0x00800000
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#define HID0_XAEN 0x00020000
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