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MPC83XX: Fix GPIO configuration - set gpio level before direction

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Set DAT value before DIR values to avoid creating glitches on the
GPIO signals.

Set gpio level register before direction register to inhibit
glitches on high level output pins.

Dir and data gets cleared at powerup, so high level output lines see
a short low pulse between setting the direction and level registers.

Issue was seen on a new board with the nReset line of the NOR flash
connected to a GPIO. Setting the direction register puts the NOR flash
in reset so the next instruction to set the level cannot get executed.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Nick Spence 2008-08-22 23:52:50 -07:00 committed by Kim Phillips
parent 628ffd73bc
commit d9fe88173c
1 changed files with 2 additions and 2 deletions
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4
cpu/mpc83xx/cpu_init.c
View File

@ -283,12 +283,12 @@ void cpu_init_f (volatile immap_t * im)
im->sysconf.lblaw[7].ar = CFG_LBLAWAR7_PRELIM;
#endif
#ifdef CFG_GPIO1_PRELIM
im->gpio[0].dir = CFG_GPIO1_DIR;
im->gpio[0].dat = CFG_GPIO1_DAT;
im->gpio[0].dir = CFG_GPIO1_DIR;
#endif
#ifdef CFG_GPIO2_PRELIM
im->gpio[1].dir = CFG_GPIO2_DIR;
im->gpio[1].dat = CFG_GPIO2_DAT;
im->gpio[1].dir = CFG_GPIO2_DIR;
#endif
}