* Patch by John Kerl, 16 Apr 2004:
Enable ranges in mii command, e.g. mii read 0-1f 0 or mii read 4-7 18-1a. Also add mii dump subcommand for pretty-printing standard regs 0-5. * Patch by Stephen Williams, 16 April 2004: fix typo in JSE.h; update MAINTAINERS
This commit is contained in:
parent
498b8db7f5
commit
2471111d35
@ -2,6 +2,14 @@
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Changes for U-Boot 1.1.1:
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======================================================================
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* Patch by John Kerl, 16 Apr 2004:
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Enable ranges in mii command, e.g. mii read 0-1f 0 or
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mii read 4-7 18-1a. Also add mii dump subcommand for
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pretty-printing standard regs 0-5.
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* Patch by Stephen Williams, 16 April 2004:
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fix typo in JSE.h; update MAINTAINERS
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* Patch by Matthew S. McClintock, 14 Apr 2004:
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fix initdram function for utx8245 board
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@ -255,6 +255,10 @@ Rune Torgersen <runet@innovsys.com>
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MPC8266ADS MPC8266
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Stephen Williams <steve@icarus.com>
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JSE PPC405GPr
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John Zhan <zhanz@sinovee.com>
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svm_sc8xx MPC8xx
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413
common/cmd_mii.c
413
common/cmd_mii.c
@ -28,9 +28,11 @@
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#include <common.h>
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#include <command.h>
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#include <miiphy.h>
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#include <miivals.h>
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#if (CONFIG_COMMANDS & CFG_CMD_MII)
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#ifdef CONFIG_TERSE_MII
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/*
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* Display values from last command.
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*/
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@ -143,6 +145,417 @@ U_BOOT_CMD(
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"mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
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"mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
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);
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#else /* CONFIG_TERSE_MII */
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typedef struct _MII_reg_desc_t {
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ushort regno;
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char * name;
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} MII_reg_desc_t;
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MII_reg_desc_t reg_0_5_desc_tbl[] = {
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{ 0, "PHY control register" },
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{ 1, "PHY status register" },
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{ 2, "PHY ID 1 register" },
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{ 3, "PHY ID 2 register" },
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{ 4, "Autonegotiation advertisement register" },
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{ 5, "Autonegotiation partner abilities register" },
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};
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typedef struct _MII_field_desc_t {
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ushort hi;
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ushort lo;
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ushort mask;
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char * name;
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} MII_field_desc_t;
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MII_field_desc_t reg_0_desc_tbl[] = {
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{ 15, 15, 0x01, "reset" },
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{ 14, 14, 0x01, "loopback" },
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{ 13, 6, 0x81, "speed selection" }, /* special */
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{ 12, 12, 0x01, "A/N enable" },
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{ 11, 11, 0x01, "power-down" },
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{ 10, 10, 0x01, "isolate" },
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{ 9, 9, 0x01, "restart A/N" },
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{ 8, 8, 0x01, "duplex" }, /* special */
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{ 7, 7, 0x01, "collision test enable" },
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{ 5, 0, 0x3f, "(reserved)" }
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};
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MII_field_desc_t reg_1_desc_tbl[] = {
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{ 15, 15, 0x01, "100BASE-T4 able" },
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{ 14, 14, 0x01, "100BASE-X full duplex able" },
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{ 13, 13, 0x01, "100BASE-X half duplex able" },
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{ 12, 12, 0x01, "10 Mbps full duplex able" },
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{ 11, 11, 0x01, "10 Mbps half duplex able" },
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{ 10, 10, 0x01, "100BASE-T2 full duplex able" },
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{ 9, 9, 0x01, "100BASE-T2 half duplex able" },
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{ 8, 8, 0x01, "extended status" },
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{ 7, 7, 0x01, "(reserved)" },
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{ 6, 6, 0x01, "MF preamble suppression" },
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{ 5, 5, 0x01, "A/N complete" },
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{ 4, 4, 0x01, "remote fault" },
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{ 3, 3, 0x01, "A/N able" },
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{ 2, 2, 0x01, "link status" },
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{ 1, 1, 0x01, "jabber detect" },
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{ 0, 0, 0x01, "extended capabilities" },
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};
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MII_field_desc_t reg_2_desc_tbl[] = {
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{ 15, 0, 0xffff, "OUI portion" },
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};
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MII_field_desc_t reg_3_desc_tbl[] = {
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{ 15, 10, 0x3f, "OUI portion" },
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{ 9, 4, 0x3f, "manufacturer part number" },
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{ 3, 0, 0x0f, "manufacturer rev. number" },
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};
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MII_field_desc_t reg_4_desc_tbl[] = {
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{ 15, 15, 0x01, "next page able" },
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{ 14, 14, 0x01, "reserved" },
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{ 13, 13, 0x01, "remote fault" },
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{ 12, 12, 0x01, "reserved" },
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{ 11, 11, 0x01, "asymmetric pause" },
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{ 10, 10, 0x01, "pause enable" },
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{ 9, 9, 0x01, "100BASE-T4 able" },
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{ 8, 8, 0x01, "100BASE-TX full duplex able" },
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{ 7, 7, 0x01, "100BASE-TX able" },
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{ 6, 6, 0x01, "10BASE-T full duplex able" },
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{ 5, 5, 0x01, "10BASE-T able" },
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{ 4, 0, 0x1f, "xxx to do" },
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};
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MII_field_desc_t reg_5_desc_tbl[] = {
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{ 15, 15, 0x01, "next page able" },
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{ 14, 14, 0x01, "acknowledge" },
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{ 13, 13, 0x01, "remote fault" },
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{ 12, 12, 0x01, "(reserved)" },
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{ 11, 11, 0x01, "asymmetric pause able" },
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{ 10, 10, 0x01, "pause able" },
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{ 9, 9, 0x01, "100BASE-T4 able" },
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{ 8, 8, 0x01, "100BASE-X full duplex able" },
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{ 7, 7, 0x01, "100BASE-TX able" },
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{ 6, 6, 0x01, "10BASE-T full duplex able" },
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{ 5, 5, 0x01, "10BASE-T able" },
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{ 4, 0, 0x1f, "xxx to do" },
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};
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#define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0]))
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#define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0]))
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#define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0]))
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#define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0]))
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#define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0]))
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#define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0]))
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typedef struct _MII_field_desc_and_len_t {
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MII_field_desc_t * pdesc;
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ushort len;
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} MII_field_desc_and_len_t;
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MII_field_desc_and_len_t desc_and_len_tbl[] = {
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{ reg_0_desc_tbl, DESC0LEN },
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{ reg_1_desc_tbl, DESC1LEN },
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{ reg_2_desc_tbl, DESC2LEN },
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{ reg_3_desc_tbl, DESC3LEN },
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{ reg_4_desc_tbl, DESC4LEN },
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{ reg_5_desc_tbl, DESC5LEN },
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};
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static void dump_reg(
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ushort regval,
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MII_reg_desc_t * prd,
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MII_field_desc_and_len_t * pdl);
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static int special_field(
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ushort regno,
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MII_field_desc_t * pdesc,
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ushort regval);
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void MII_dump_0_to_5(
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ushort regvals[6],
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uchar reglo,
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uchar reghi)
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{
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ulong i;
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for (i = 0; i < 6; i++) {
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if ((reglo <= i) && (i <= reghi))
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dump_reg(regvals[i], ®_0_5_desc_tbl[i],
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&desc_and_len_tbl[i]);
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}
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}
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static void dump_reg(
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ushort regval,
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MII_reg_desc_t * prd,
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MII_field_desc_and_len_t * pdl)
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{
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ulong i;
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ushort mask_in_place;
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MII_field_desc_t * pdesc;
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printf("%u. (%04hx) -- %s --\n",
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prd->regno, regval, prd->name);
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for (i = 0; i < pdl->len; i++) {
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pdesc = &pdl->pdesc[i];
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mask_in_place = pdesc->mask << pdesc->lo;
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printf(" (%04hx:%04hx) %u.",
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mask_in_place,
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regval & mask_in_place,
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prd->regno);
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if (special_field(prd->regno, pdesc, regval)) {
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}
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else {
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if (pdesc->hi == pdesc->lo)
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printf("%2u ", pdesc->lo);
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else
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printf("%2u-%2u", pdesc->hi, pdesc->lo);
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printf(" = %5u %s",
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(regval & mask_in_place) >> pdesc->lo,
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pdesc->name);
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}
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printf("\n");
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}
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printf("\n");
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}
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/* Special fields:
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** 0.6,13
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** 0.8
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** 2.15-0
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** 3.15-0
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** 4.4-0
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** 5.4-0
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*/
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static int special_field(
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ushort regno,
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MII_field_desc_t * pdesc,
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ushort regval)
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{
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if ((regno == 0) && (pdesc->lo == 6)) {
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ushort speed_bits = regval & MII_CTL_SPEED_MASK;
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printf("%2u,%2u = b%u%u speed selection = %s Mbps",
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6, 13,
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(regval >> 6) & 1,
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(regval >> 13) & 1,
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speed_bits == MII_CTL_SPEED_1000_MBPS ? "1000" :
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speed_bits == MII_CTL_SPEED_100_MBPS ? "100" :
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speed_bits == MII_CTL_SPEED_10_MBPS ? "10" :
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"???");
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return 1;
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}
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else if ((regno == 0) && (pdesc->lo == 8)) {
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printf("%2u = %5u duplex = %s",
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pdesc->lo,
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(regval >> pdesc->lo) & 1,
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((regval >> pdesc->lo) & 1) ? "full" : "half");
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return 1;
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}
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else if ((regno == 4) && (pdesc->lo == 0)) {
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ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
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printf("%2u-%2u = %5u selector = %s",
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pdesc->hi, pdesc->lo, sel_bits,
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sel_bits == MII_AN_ADV_IEEE_802_3 ?
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"IEEE 802.3" :
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sel_bits == MII_AN_ADV_IEEE_802_9_ISLAN_16T ?
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"IEEE 802.9 ISLAN-16T" :
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"???");
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return 1;
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}
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else if ((regno == 5) && (pdesc->lo == 0)) {
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ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
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printf("%2u-%2u = %u selector = %s",
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pdesc->hi, pdesc->lo, sel_bits,
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sel_bits == MII_AN_PARTNER_IEEE_802_3 ?
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"IEEE 802.3" :
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sel_bits == MII_AN_PARTNER_IEEE_802_9_ISLAN_16T ?
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"IEEE 802.9 ISLAN-16T" :
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"???");
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return 1;
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}
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return 0;
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}
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uint last_op;
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uint last_data;
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uint last_addr_lo;
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uint last_addr_hi;
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uint last_reg_lo;
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uint last_reg_hi;
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static void extract_range(
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char * input,
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unsigned char * plo,
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unsigned char * phi)
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{
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char * end;
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*plo = simple_strtoul(input, &end, 16);
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if (*end == '-') {
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end++;
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*phi = simple_strtoul(end, NULL, 16);
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}
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else {
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*phi = *plo;
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}
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}
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// ----------------------------------------------------------------
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int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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{
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char op;
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unsigned char addrlo, addrhi, reglo, reghi;
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unsigned char addr, reg;
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unsigned short data;
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int rcode = 0;
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#ifdef CONFIG_8xx
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mii_init ();
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#endif
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/*
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* We use the last specified parameters, unless new ones are
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* entered.
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*/
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op = last_op;
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addrlo = last_addr_lo;
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addrhi = last_addr_hi;
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reglo = last_reg_lo;
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reghi = last_reg_hi;
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data = last_data;
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if ((flag & CMD_FLAG_REPEAT) == 0) {
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op = argv[1][0];
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if (argc >= 3)
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extract_range(argv[2], &addrlo, &addrhi);
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if (argc >= 4)
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extract_range(argv[3], ®lo, ®hi);
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if (argc >= 5)
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data = simple_strtoul (argv[4], NULL, 16);
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}
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/*
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* check info/read/write.
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*/
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if (op == 'i') {
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unsigned char j, start, end;
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unsigned int oui;
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unsigned char model;
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unsigned char rev;
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/*
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* Look for any and all PHYs. Valid addresses are 0..31.
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*/
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if (argc >= 3) {
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start = addr; end = addr + 1;
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} else {
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start = 0; end = 32;
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}
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for (j = start; j < end; j++) {
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if (miiphy_info (j, &oui, &model, &rev) == 0) {
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printf("PHY 0x%02X: "
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"OUI = 0x%04X, "
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"Model = 0x%02X, "
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"Rev = 0x%02X, "
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"%3dbaseT, %s\n",
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j, oui, model, rev,
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miiphy_speed (j),
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miiphy_duplex (j) == FULL ? "FDX" : "HDX");
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}
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}
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} else if (op == 'r') {
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for (addr = addrlo; addr <= addrhi; addr++) {
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for (reg = reglo; reg <= reghi; reg++) {
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data = 0xffff;
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if (miiphy_read (addr, reg, &data) != 0) {
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printf(
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"Error reading from the PHY addr=%02x reg=%02x\n",
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addr, reg);
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rcode = 1;
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}
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else {
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if ((addrlo != addrhi) || (reglo != reghi))
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printf("addr=%02x reg=%02x data=",
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(uint)addr, (uint)reg);
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printf("%04X\n", data & 0x0000FFFF);
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}
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}
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if ((addrlo != addrhi) && (reglo != reghi))
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printf("\n");
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}
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} else if (op == 'w') {
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for (addr = addrlo; addr <= addrhi; addr++) {
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for (reg = reglo; reg <= reghi; reg++) {
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if (miiphy_write (addr, reg, data) != 0) {
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printf("Error writing to the PHY addr=%02x reg=%02x\n",
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addr, reg);
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rcode = 1;
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}
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}
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}
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} else if (op == 'd') {
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ushort regs[6];
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int ok = 1;
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if ((reglo > 5) || (reghi > 5)) {
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printf(
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"The MII dump command only formats the "
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"standard MII registers, 0-5.\n");
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return 1;
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}
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for (addr = addrlo; addr <= addrhi; addr++) {
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for (reg = 0; reg < 6; reg++) {
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if (miiphy_read(addr, reg, ®s[reg]) != 0) {
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ok = 0;
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printf(
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"Error reading from the PHY addr=%02x reg=%02x\n",
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addr, reg);
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rcode = 1;
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}
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}
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if (ok)
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MII_dump_0_to_5(regs, reglo, reghi);
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printf("\n");
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}
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} else {
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printf("Usage:\n%s\n", cmdtp->usage);
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return 1;
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}
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||||
/*
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* Save the parameters for repeats.
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*/
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last_op = op;
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last_addr_lo = addrlo;
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last_addr_hi = addrhi;
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last_reg_lo = reglo;
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last_reg_hi = reghi;
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last_data = data;
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return rcode;
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}
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||||
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/***************************************************/
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||||
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U_BOOT_CMD(
|
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mii, 5, 1, do_mii,
|
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"mii - MII utility commands\n",
|
||||
"info <addr> - display MII PHY info\n"
|
||||
"mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
|
||||
"mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
|
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"mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
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"Addr and/or reg may be ranges, e.g. 2-7.\n"
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);
|
||||
|
||||
#endif /* CONFIG_TERSE_MII */
|
||||
|
||||
#endif /* CFG_CMD_MII */
|
||||
|
@ -152,7 +152,7 @@
|
||||
/* watchdog disabled */
|
||||
#undef CONFIG_WATCHDOG
|
||||
/* SPD EEPROM (sdram speed config) disabled */
|
||||
#undef CONFIG_SPD_EEPRO
|
||||
#undef CONFIG_SPD_EEPROM
|
||||
#undef SPD_EEPROM_ADDRESS
|
||||
|
||||
/*
|
||||
|
Loading…
Reference in New Issue
Block a user