Converted all 85xx boards to use a common FSL I2C driver.
Introduced COFIG_FSL_I2C to select the common FSL I2C driver. And removed hard i2c path from a few u-boot.lds scipts too. Minor whitespace cleanups along the way. Signed-off-by: Jon Loeliger <jdl@freescale.com>
This commit is contained in:
parent
4d45f69e36
commit
2047672684
@ -74,7 +74,6 @@ SECTIONS
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cpu/mpc85xx/cpu_init.o (.text)
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cpu/mpc85xx/cpu.o (.text)
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cpu/mpc85xx/speed.o (.text)
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cpu/mpc85xx/i2c.o (.text)
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cpu/mpc85xx/spd_sdram.o (.text)
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common/dlmalloc.o (.text)
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lib_generic/crc32.o (.text)
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@ -77,7 +77,6 @@ SECTIONS
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cpu/mpc85xx/cpu_init.o (.text)
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cpu/mpc85xx/cpu.o (.text)
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cpu/mpc85xx/speed.o (.text)
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cpu/mpc85xx/i2c.o (.text)
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cpu/mpc85xx/spd_sdram.o (.text)
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common/dlmalloc.o (.text)
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lib_generic/crc32.o (.text)
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@ -79,7 +79,6 @@ SECTIONS
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cpu/mpc85xx/cpu_init.o (.text)
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cpu/mpc85xx/cpu.o (.text)
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cpu/mpc85xx/speed.o (.text)
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cpu/mpc85xx/i2c.o (.text)
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cpu/mpc85xx/spd_sdram.o (.text)
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common/dlmalloc.o (.text)
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lib_generic/crc32.o (.text)
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@ -30,7 +30,7 @@ LIB = $(obj)lib$(CPU).a
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START = start.o resetvec.o
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COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \
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pci.o serial_scc.o commproc.o ether_fcc.o i2c.o spd_sdram.o
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pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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@ -1,265 +0,0 @@
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/*
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* (C) Copyright 2003,Motorola Inc.
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* Xianghua Xiao <x.xiao@motorola.com>
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* Adapted for Motorola 85xx chip.
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*
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* (C) Copyright 2003
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* Gleb Natapov <gnatapov@mrv.com>
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* Some bits are taken from linux driver writen by adrian@humboldt.co.uk
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*
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* Hardware I2C driver for MPC107 PCI bridge.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#ifdef CONFIG_HARD_I2C
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#include <i2c.h>
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#define TIMEOUT (CFG_HZ/4)
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#define I2C_Addr ((u8 *)(CFG_CCSRBAR + 0x3000))
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#define I2CADR &I2C_Addr[0]
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#define I2CFDR &I2C_Addr[4]
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#define I2CCCR &I2C_Addr[8]
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#define I2CCSR &I2C_Addr[12]
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#define I2CCDR &I2C_Addr[16]
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#define I2CDFSRR &I2C_Addr[20]
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#define I2C_READ 1
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#define I2C_WRITE 0
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void
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i2c_init(int speed, int slaveadd)
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{
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/* stop I2C controller */
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writeb(0x0, I2CCCR);
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/* set clock */
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writeb(0x3f, I2CFDR);
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/* set default filter */
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writeb(0x10,I2CDFSRR);
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/* write slave address */
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writeb(slaveadd, I2CADR);
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/* clear status register */
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writeb(0x0, I2CCSR);
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/* start I2C controller */
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writeb(MPC85xx_I2CCR_MEN, I2CCCR);
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}
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static __inline__ int
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i2c_wait4bus (void)
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{
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ulong timeval = get_timer (0);
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while (readb(I2CCSR) & MPC85xx_I2CSR_MBB) {
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if (get_timer (timeval) > TIMEOUT) {
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return -1;
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}
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}
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return 0;
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}
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static __inline__ int
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i2c_wait (int write)
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{
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u32 csr;
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ulong timeval = get_timer (0);
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do {
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csr = readb(I2CCSR);
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if (!(csr & MPC85xx_I2CSR_MIF))
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continue;
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writeb(0x0, I2CCSR);
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if (csr & MPC85xx_I2CSR_MAL) {
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debug("i2c_wait: MAL\n");
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return -1;
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}
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if (!(csr & MPC85xx_I2CSR_MCF)) {
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debug("i2c_wait: unfinished\n");
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return -1;
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}
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if (write == I2C_WRITE && (csr & MPC85xx_I2CSR_RXAK)) {
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debug("i2c_wait: No RXACK\n");
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return -1;
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}
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return 0;
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} while (get_timer (timeval) < TIMEOUT);
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debug("i2c_wait: timed out\n");
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return -1;
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}
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static __inline__ int
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i2c_write_addr (u8 dev, u8 dir, int rsta)
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{
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writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA | MPC85xx_I2CCR_MTX |
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(rsta?MPC85xx_I2CCR_RSTA:0),
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I2CCCR);
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writeb((dev << 1) | dir, I2CCDR);
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if (i2c_wait (I2C_WRITE) < 0)
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return 0;
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return 1;
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}
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static __inline__ int
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__i2c_write (u8 *data, int length)
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{
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int i;
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writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA | MPC85xx_I2CCR_MTX,
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I2CCCR);
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for (i=0; i < length; i++) {
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writeb(data[i], I2CCDR);
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if (i2c_wait (I2C_WRITE) < 0)
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break;
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}
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return i;
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}
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static __inline__ int
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__i2c_read (u8 *data, int length)
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{
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int i;
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writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA |
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((length == 1) ? MPC85xx_I2CCR_TXAK : 0),
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I2CCCR);
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/* dummy read */
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readb(I2CCDR);
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for (i=0; i < length; i++) {
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if (i2c_wait (I2C_READ) < 0)
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break;
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/* Generate ack on last next to last byte */
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if (i == length - 2)
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writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_MSTA |
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MPC85xx_I2CCR_TXAK,
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I2CCCR);
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/* Generate stop on last byte */
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if (i == length - 1)
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writeb(MPC85xx_I2CCR_MEN | MPC85xx_I2CCR_TXAK, I2CCCR);
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data[i] = readb(I2CCDR);
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}
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return i;
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}
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int
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i2c_read (u8 dev, uint addr, int alen, u8 *data, int length)
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{
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int i = 0;
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u8 *a = (u8*)&addr;
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if (i2c_wait4bus () < 0)
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goto exit;
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if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
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goto exit;
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if (__i2c_write (&a[4 - alen], alen) != alen)
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goto exit;
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if (i2c_write_addr (dev, I2C_READ, 1) == 0)
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goto exit;
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i = __i2c_read (data, length);
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exit:
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writeb(MPC85xx_I2CCR_MEN, I2CCCR);
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return !(i == length);
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}
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int
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i2c_write (u8 dev, uint addr, int alen, u8 *data, int length)
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{
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int i = 0;
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u8 *a = (u8*)&addr;
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if (i2c_wait4bus () < 0)
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goto exit;
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if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
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goto exit;
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if (__i2c_write (&a[4 - alen], alen) != alen)
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goto exit;
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i = __i2c_write (data, length);
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exit:
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writeb(MPC85xx_I2CCR_MEN, I2CCCR);
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return !(i == length);
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}
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int i2c_probe (uchar chip)
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{
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int tmp;
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/*
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* Try to read the first location of the chip. The underlying
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* driver doesn't appear to support sending just the chip address
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* and looking for an <ACK> back.
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*/
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udelay(10000);
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return i2c_read (chip, 0, 1, (uchar *)&tmp, 1);
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}
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uchar i2c_reg_read (uchar i2c_addr, uchar reg)
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{
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uchar buf[1];
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i2c_read (i2c_addr, reg, 1, buf, 1);
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return (buf[0]);
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}
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void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val)
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{
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i2c_write (i2c_addr, reg, 1, &val, 1);
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}
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#endif /* CONFIG_HARD_I2C */
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#include <common.h>
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#ifdef CONFIG_FSL_I2C
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#ifdef CONFIG_HARD_I2C
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#include <command.h>
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#include <i2c.h> /* Functional interface */
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#include <asm/io.h>
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#include <asm/fsl_i2c.h>
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#include <asm/fsl_i2c.h> /* HW definitions */
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#define I2C_TIMEOUT (CFG_HZ / 4)
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#define I2C ((struct fsl_i2c *)(CFG_IMMR + CFG_I2C_OFFSET))
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@ -32,7 +35,7 @@ void
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i2c_init(int speed, int slaveadd)
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{
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/* stop I2C controller */
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writeb(0x0 , &I2C->cr);
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writeb(0x0, &I2C->cr);
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/* set clock */
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writeb(0x3f, &I2C->fdr);
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@ -53,7 +56,7 @@ i2c_init(int speed, int slaveadd)
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static __inline__ int
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i2c_wait4bus(void)
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{
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ulong timeval = get_timer (0);
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ulong timeval = get_timer(0);
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while (readb(&I2C->sr) & I2C_SR_MBB) {
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if (get_timer(timeval) > I2C_TIMEOUT) {
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@ -235,3 +238,4 @@ i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
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}
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#endif /* CONFIG_HARD_I2C */
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#endif /* CONFIG_FSL_I2C */
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@ -312,12 +312,16 @@
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#define CFG_64BIT_VSPRINTF 1
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#define CFG_64BIT_STRTOUL 1
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/* I2C */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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/*
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* I2C
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*/
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#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CFG_I2C_OFFSET 0x3000
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/* RapidIO MMU */
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#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
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@ -179,12 +179,16 @@
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#define CFG_PROMPT_HUSH_PS2 "> "
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#endif
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/* I2C */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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/*
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* I2C
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*/
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#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CFG_I2C_OFFSET 0x3000
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/* General PCI */
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#define CFG_PCI_MEM_BASE 0x80000000
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|
@ -320,13 +320,17 @@ extern unsigned long get_clock_freq(void);
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8541@e0000000/serial@4600"
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/* I2C */
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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/*
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* I2C
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*/
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#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_EEPROM_ADDR 0x57
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CFG_I2C_OFFSET 0x3000
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/*
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* General PCI
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|
@ -326,13 +326,17 @@ extern unsigned long get_clock_freq(void);
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600"
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/* I2C */
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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/*
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* I2C
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*/
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#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_EEPROM_ADDR 0x57
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CFG_I2C_OFFSET 0x3000
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/*
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* General PCI
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|
@ -320,13 +320,17 @@ extern unsigned long get_clock_freq(void);
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8555@e0000000/serial@4600"
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/* I2C */
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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/*
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* I2C
|
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*/
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#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_EEPROM_ADDR 0x57
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CFG_I2C_OFFSET 0x3000
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/*
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* General PCI
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|
@ -302,12 +302,16 @@
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#define OF_TBCLK (bd->bi_busfreq / 8)
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#define OF_STDOUT_PATH "/soc8560@e0000000/serial@4500"
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|
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/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
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/*
|
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* I2C
|
||||
*/
|
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#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
|
||||
/* RapidIO MMU */
|
||||
#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
|
||||
|
@ -275,12 +275,13 @@
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_OFFSET 0x3100
|
||||
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3100
|
||||
|
||||
/*
|
||||
* RapidIO MMU
|
||||
|
@ -193,12 +193,16 @@
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
|
@ -190,12 +190,16 @@
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
|
||||
/*
|
||||
* EEPROM configuration
|
||||
|
@ -214,12 +214,16 @@
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
|
||||
#define CFG_PCI_MEM_BASE 0xC0000000
|
||||
#define CFG_PCI_MEM_PHYS 0xC0000000
|
||||
|
@ -192,12 +192,17 @@
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_NOPROBES {0x48} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
|
||||
/* I2C RTC */
|
||||
#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */
|
||||
|
@ -197,12 +197,16 @@
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
|
||||
#define CFG_PCI_MEM_BASE 0xC0000000
|
||||
#define CFG_PCI_MEM_PHYS 0xC0000000
|
||||
|
@ -172,8 +172,11 @@
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
@ -183,6 +186,7 @@
|
||||
/* I did the 'if 0' so we could keep the syntax above if ever needed. */
|
||||
#undef CFG_I2C_NOPROBES
|
||||
#endif
|
||||
#define CFG_I2C_OFFSET 0x3000
|
||||
|
||||
/* RapdIO Map configuration, mapped 1:1.
|
||||
*/
|
||||
|
Loading…
Reference in New Issue
Block a user