Move us up to being based on Ubuntu 20.04 "focal" and the latest tag
from Ubuntu for this release. For this, we make sure that "python" is
now python3 but still include python2.7 for the rx51 qemu build as that
is very old and does not support python3.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add more details to test cases by comparing each expected line with the
command's output. Add new test cases:
- sqfsls at an empty directory
- sqfsls at a sub-directory
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
The previous strategy to know if a file was correctly loaded was to
check for how many bytes were read and compare it against the file's
original size. Since this is not a good solution, replace it by
comparing the checksum of the loaded bytes against the original file's
checksum. Add more test cases: files at a sub-directory and non-existent
file.
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
Remove the previous OOP approach, which was confusing and incomplete.
Add more test cases by making SquashFS images with various options,
concerning file fragmentation and its compression. Add comments to
properly document the code.
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
The filesystem test setup needs to prepare disk images for its tests,
with either guestmount or loop mounts. The former requires access to the
host fuse device (added in a previous patch), the latter requires access
to host loop devices. Both mounts also need additional privileges since
docker's default configuration prevents the containers from mounting
filesystems (for host security).
Add any available loop devices to the container and try to add as few
privileges as possible to run these tests, which narrow down to adding
SYS_ADMIN capability and disabling apparmor confinement. However, this
much still seems to be insecure enough to let malicious container
processes escape as root on the host system [1].
[1] https://blog.trailofbits.com/2019/07/19/understanding-docker-container-escapes/
Since the mentioned tests are marked to run only on the sandbox board,
add these additional devices and privileges only when testing with that.
An alternative to using mounts is modifying the filesystem tests to use
virt-make-fs (like some EFI tests do), but it fails to generate a
partitionless FAT filesystem image on Debian systems. Other more
feasible alternatives are using guestfish or directly using libguestfs
Python bindings to create and populate the images, but switching the
test setups to these is nontrivial and is left as future work.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The EFI secure boot and capsule test setups need to prepare disk images
for their tests using virt-make-fs, which requires access to the host
fuse device. This is not exposed to the docker container by default and
has to be added explicitly. Add it.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
The filesystem and EFI (capsule and secure boot) test setups try to use
guestmount and virt-make-fs respectively to prepare disk images to run
tests on. However, these libguestfs tools need a kernel image and fail
with the following message (revealed in debug/trace mode) if it can't
find one:
supermin: failed to find a suitable kernel (host_cpu=x86_64).
I looked for kernels in /boot and modules in /lib/modules.
If this is a Xen guest, and you only have Xen domU kernels
installed, try installing a fullvirt kernel (only for
supermin use, you shouldn't boot the Xen guest with it).
This failure then causes these tests to be skipped in CIs. Install a
kernel package in the Docker containers so the CIs can run these
tests with libguestfs tools again (assuming the container is run with
necessary host devices and privileges). As this kernel would be only
used for virtualization, we can use the kernel package specialized for
that. On Ubuntu systems kernel images are not readable by non-root
users, so explicitly add read permissions with chmod as well.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some filesystem tests are failing when their image is prepared with
guestmount, but succeeding if loop mounts are used instead. The reason
seems to be a race condition the guestmount(1) manual page explains:
When guestunmount(1)/fusermount(1) exits, guestmount may still be
running and cleaning up the mountpoint. The disk image will not be
fully finalized.
This means that scripts like the following have a nasty race condition:
guestmount -a disk.img -i /mnt
# copy things into /mnt
guestunmount /mnt
# immediately try to use 'disk.img' ** UNSAFE **
The solution is to use the --pid-file option to write the guestmount
PID to a file, then after guestunmount spin waiting for this PID to
exit.
The Python standard library has an os.waitpid() function for waiting a
child to terminate, but it cannot wait on non-child processes. Implement
a utility function that can do this by polling the process repeatedly
for a given duration, optionally killing the process if it won't
terminate on its own. Apply the suggested solution with this utility
function, which makes the failing tests succeed again.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If guestmount isn't available on the system, filesystem test setup falls
back to using loop mounts to prepare its disk images. If guestmount is
available but fails to work, the tests are immediately skipped. Instead
of giving up on a guestmount failure, try using loop mounts as an
attempt to keep tests running.
Also stop checking if guestmount is in PATH, as trying to run a missing
guestmount can now follow the same failure codepath and fall back to
loop mounts anyway.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
- Merge build-time sanity checks to ensure the size of gd doesn't
change. This can happen during cleanups due to not all symbols being
implemented in Kconfig.
The layout and contents of struct global_data depends on a lot of
CONFIG_* preprocessor macros, not all of which are entirely converted
to Kconfig - not to mention weird games played here and there. This
can result in one translation unit using one definition of struct
global_data while the actual layout is another.
That can be very hard to debug. But we already have a mechanism that
can help catch such bugs at build time, namely the asm-offsets
machinery which is necessary anyway to provide assembly code with the
necessary constants. So make sure that every C translation unit that
include global_data.h actually sees the same size of struct
global_data as that which was seen by the asm-offsets.c TU.
It is likely that this patch will break the build of some boards. For
example, without the patch from Matt Merhar
(https://lists.denx.de/pipermail/u-boot/2021-May/450135.html) or some
other fix, this breaks P2041RDB_defconfig:
CC arch/powerpc/lib/traps.o
AS arch/powerpc/cpu/mpc85xx/start.o
In file included from include/asm-generic/global_data.h:26,
from ./arch/powerpc/include/asm/global_data.h:109,
from include/init.h:21,
from arch/powerpc/lib/traps.c:7:
include/linux/build_bug.h:99:41: error: static assertion failed: "sizeof(struct global_data) == GD_SIZE"
99 | #define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
| ^~~~~~~~~~~~~~
include/linux/build_bug.h:98:34: note: in expansion of macro ‘__static_assert’
98 | #define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
| ^~~~~~~~~~~~~~~
include/asm-generic/global_data.h:470:1: note: in expansion of macro ‘static_assert’
470 | static_assert(sizeof(struct global_data) == GD_SIZE);
| ^~~~~~~~~~~~~
make[1]: *** [scripts/Makefile.build:266: arch/powerpc/lib/traps.o] Error 1
make: *** [Makefile:1753: arch/powerpc/lib] Error 2
make: *** Waiting for unfinished jobs....
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Linux commit 6bab69c65013bed5fce9f101a64a84d0385b3946]
BUILD_BUG_ON() is a little annoying, since it cannot be used outside
function scope. So one cannot put assertions about the sizeof() a
struct next to the struct definition, but has to hide that in some more
or less arbitrary function.
Since gcc 4.6 (which is now also the required minimum), there is support
for the C11 _Static_assert in all C modes, including gnu89. So add a
simple wrapper for that.
_Static_assert() requires a message argument, which is usually quite
redundant (and I believe that bug got fixed at least in newer C++
standards), but we can easily work around that with a little macro
magic, making it optional.
For example, adding
static_assert(sizeof(struct printf_spec) == 8);
in vsprintf.c and modifying that struct to violate it, one gets
./include/linux/build_bug.h:78:41: error: static assertion failed: "sizeof(struct printf_spec) == 8"
#define __static_assert(expr, msg, ...) _Static_assert(expr, "" msg "")
godbolt.org suggests that _Static_assert() has been support by clang
since at least 3.0.0.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Xilinx changes for v2021.10
clk:
- Add driver for Xilinx Clocking Wizard IP
fdt:
- Also record architecture in /fit-images
net:
- Fix plat/priv data handling in axi emac
- Add support for 10G/25G speeds
pca953x:
- Add missing dependency on i2c
serial:
- Fix dependencies for DEBUG uart for pl010/pl011
- Add setconfig option for cadence serial driver
watchdog:
- Add cadence wdt expire now function
zynq:
- Update DT bindings to reflect the latest state and descriptions
zynqmp:
- Update DT bindings to reflect the latest state and descriptions
- SPL: Add support for ECC DRAM initialization
- Fix R5 core 1 handling logic
- Enable firmware driver for mini configurations
- Enable secure boot, regulators, wdt
- Add support xck devices and 67dr
- Add psu init for sm/smk-k26 SOMs
- Add handling for MMC seq number via mmc_get_env_dev()
- Handle reserved memory locations
- Add support for u-boot.itb generation for secure OS
- Handle BL32 handoffs for secure OS
- Add support for 64bit addresses for u-boot.its generation
- Change eeprom handling via nvmem aliases
It is working in a way that only minimal timeout is setup to reach
expiration just right after it is setup.
Please make sure that PMUFW is compiled with ENABLE_EM flag.
On U-Boot prompt you can test it like:
ZynqMP> wdt dev watchdog@fd4d0000
ZynqMP> wdt list
watchdog@fd4d0000 (cdns_wdt)
ZynqMP> wdt dev
dev: watchdog@fd4d0000
ZynqMP> wdt expire
(And reset should happen here)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.
The nor->quad_enable() sets the volatile QE bit on each die.
The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32 x 4KB sectors overlaid on bottom address.
Other configurations, top and split, are not supported at this point.
Will submit additional patches to support it as needed.
The post_bfpt/sfdp() fixes the params wrongly advertised in SFDP.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cypress chips support SPINOR_OP_EN4B(B7h) to enable 4-byte addressing mode.
Cypress chips support B8h to disable 4-byte addressing mode instead of
SPINOR_OP_EX4B(E9h).
This patch defines new opcode and updates set_4byte() to support
enable/disable 4-byte addressing mode for Cypress chips.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles to support multi-die package parts from Spansion/Cypress.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.
The Read Any Register instruction (65h) is followed by register address
and dummy cycles, then the selected register byte is returned.
The Write Any Register instruction (71h) is followed by register address
and register byte to write.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If both POSITION_INDEPENDENT and SYS_RELOC_GD_ENV_ADDR are enabled,
wherever original env is placed anywhere, it should be relocated to
the right address.
Relocation offset gd->reloc_off is calculated with SYS_TEXT_BASE in
setup_reloc() and env address gd->env_addr is relocated by the offset in
initr_reloc_global_data().
gd->env_addr
= (orig env) + gd->reloc_off
= (orig env) + (gd->relocaddr - SYS_TEXT_BASE)
However, SYS_TEXT_BASE isn't always runtime base address when
POSITION_INDEPENDENT is enabled. So the relocated env_addr might point to
wrong address. For example, if SYS_TEXT_BASE is zero, gd->env_addr is
out of memory location and memory exception will occur.
There is a difference between linked address such as SYS_TEXT_BASE and
runtime base address. In _main, the difference is calculated as
"run-vs-link" offset. The env_addr should also be added to the offset
to fix the address.
gd->env_addr
= (orig env) + ("run-vs-link" offset) + gd->reloc_off
= (orig env) + (SYS_TEXT_BASE - _start) + (gd->relocaddr - SYS_TEXT_BASE)
= (orig env) + (gd->relocaddr - _start)
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
This patch adds psgtr clocks and phy entry for USB0, USB1 and SATA node for
zc1751-xm017-dc3 board.
Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There are lot of accesses to priv data in of_to_plat(), which is incorrect.
Create a platform data structure and use it in of_to_plat(), then copy all
platform data to priv data in probe.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This adds serial parameters that include stop bit mode, parity mode,
and character length. Mark parity and space parity modes are not
supported.
At the moment, the only path to call setconfig directly is DM testing,
however, this affects the size of SPL for DM testing, so it doesn't
apply to SPL.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Both of these drivers are implemented with and without DM that's why more
symbols should be handled.
The most problematic one is enabling DEBUG_UART_PL011 based on
PL01X_SERIAL(DM based) because debug console has type selection based on
it.
enum pl01x_type type = CONFIG_IS_ENABLED(DEBUG_UART_PL011) ?
TYPE_PL011 : TYPE_PL010;
Without it pl01x_generic_setbrg() is configuring different registers.
Fixes: 4cc24aeaf4 ("serial: Add missing Kconfig dependencies for debug consoles")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since this flash doesn't have a Profile 1.0 table, the Octal DTR
capabilities are enabled in the post SFDP fixup, along with the 8D-8D-8D
fast read settings.
Enable Octal DTR mode with 20 dummy cycles to allow running at the
maximum supported frequency of 200Mhz.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The Cypress Semper flash is an xSPI compliant octal DTR flash. Add
support for using it in octal DTR mode.
The flash by default boots in a hybrid sector mode. Switch to uniform
sector mode on boot. Use the default 20 dummy cycles for a read fast
command.
The SFDP programming on some older versions of the flash was incorrect.
Fixes for that are included in the fixup hooks.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Some of Spansion/Cypress chips have overlaid 4KB sectors at top and/or
bottom, depending on the device configuration, while U-Boot supports
uniform sector layout only.
The spansion_erase_non_uniform() erases overlaid 4KB sectors,
non-overlaid portion of normal sector, and remaining normal sectors, by
selecting correct erase command and size based on the address to erase
and size of overlaid portion in parameters. Since different Spansion
flashes can use different opcode for erasing the 4K sectors, the opcode
must be passed in as a parameter based on the flash being used.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
[p.yadav@ti.com: Refactor the function to be compatible with nor->erase,
make 4K opcode customizable, call spi_nor_setup_op() before executing
the op.]
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
On devices with non-uniform sector sizes like Spansion S25 or S28 family
of flashes the sector under erase does not necessarily have to be
mtd->erasesize bytes long. For example, on S28 flashes the first 128 KiB
region is composed of 32 4 KiB sectors, then a 128 KiB sector, and then
256 KiB sectors till the end.
Let the flash-specific erase functions erase less than the requested
length in case of the 4 or 128 KiB sectors and report the number of
bytes erased back to the calling function.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When the flash is handed to us in a stateful mode like 8D-8D-8D, it is
difficult to detect the mode the flash is in. One option is to read SFDP
in all modes and see which one gives the correct "SFDP" signature, but
not all flashes support SFDP in 8D-8D-8D mode.
Further, even if you detect the mode of the flash via SFDP, you still
have the problem of actually reading the ID. The Read ID command is not
standardized across flash vendors. Flashes can have different dummy
cycles needed for reading the ID. Some flashes even expect a 4-byte
dummy address with the Read ID command. All this information cannot be
obtained from the SFDP table.
So, perform a Software Reset sequence before reading the ID and
initializing the flash. A Soft Reset will bring back the flash in its
default protocol mode assuming no non-volatile configuration was set.
This will let us detect the flash even if ROM hands it to us in Octal
DTR mode.
To accommodate cases where there is more than one flash on a board, and
only one of them needs a soft reset, failure to reset is not made fatal,
and we still try to read ID if possible.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
On probe, the SPI NOR core will put a flash in 8D-8D-8D mode if it
supports it. But Linux as of now expects to get the flash in 1S-1S-1S
mode. Handing the flash to Linux in Octal DTR mode means the kernel will
fail to detect the flash.
So, we need to reset to Power-on-Reset (POR) state before handing off
the flash. A Software Reset command can be used to do this.
One limitation of the soft reset is that it will restore state from
non-volatile registers in some flashes. This means that if the flash was
set to 8D mode in a non-volatile configuration, a soft reset won't help.
This commit assumes that we don't set any non-volatile bits anywhere,
and the flash doesn't have any non-volatile Octal DTR mode
configuration.
Since spi-nor-tiny doesn't (and likely shouldn't) have
spi_nor_soft_reset(), add a dummy spi_nor_remove() for it that does
nothing.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
A Soft Reset sequence will return the flash to Power-on-Reset (POR)
state. It consists of two commands: Soft Reset Enable and Soft Reset.
Find out if the sequence is supported from BFPT DWORD 16.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The Micron MT35XU512ABA flash does not support the quad enable bit. But
instead of programming the Quad Enable Require field to 000b ("Device
does not have a QE bit"), it is programmed to 111b ("Reserved").
While this is technically incorrect, it is not reason enough to abort
BFPT parsing. Instead, continue BFPT parsing assuming there is no quad
enable bit present.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The xSPI Profile 1.0 table specifies how many dummy cycles and address
bytes are needed for the Read Status Register command in Octal DTR mode.
Use that information to send the correct Read SR command.
Some controllers might have trouble reading just 1 byte in DTR mode. So,
when we are in DTR mode read 2 bytes and discard the second. This shows
no side effects with the two flashes I tested: Micron mt35xu512aba and
Cypress s28hs512t.
Update Read FSR to mimic Read SR because they share the same
characteristics.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This table is indication that the flash is xSPI compliant and hence
supports octal DTR mode. Extract information like the fast read opcode,
the number of dummy cycles needed for a Read Status Register command,
and the number of address bytes needed for a Read Status Register
command.
The default dummy cycles for a fast octal DTR read are set to 20. Since
there is no simple way of determining the dummy cycles needed for the
fast read command, flashes that use a different value should update it
in their flash-specific hooks.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Some devices in DTR mode expect an extra command byte called the
extension. The extension can either be same as the opcode, bitwise
inverse of the opcode, or another additional byte forming a 16-byte
opcode. Get the extension type from the BFPT. For now, only flashes with
"repeat" and "inverse" extensions are supported.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
JESD216 rev D makes BFPT 20 DWORDs. Update the BFPT size define to
reflect that.
The check for rev A or later compared the BFPT header length with the
maximum BFPT length, BFPT_DWORD_MAX. Since BFPT_DWORD_MAX was 16, and so
was the BFPT length for both rev A and B, this check worked fine. But
now, since BFPT_DWORD_MAX is 20, it means this check will also stop BFPT
parsing for rev A or B, since their length is 16.
So, instead check for BFPT_DWORD_MAX_JESD216 to stop BFPT parsing for
the first JESD216 version, and check for BFPT_DWORD_MAX_JESD216B for the
next two versions.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Double Transfer Rate (DTR) is SPI protocol in which data is transferred
on each clock edge as opposed to on each clock cycle. Make
framework-level changes to allow supporting flashes in DTR mode.
Right now, mixed DTR modes are not supported. So, for example a mode
like 4S-4D-4D will not work. All phases need to be either DTR or STR.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Even when spi_nor_write_reg() has no data to write, like when executing
a write enable operation, it sets the data direction to
SPI_MEM_DATA_OUT. This trips up spi_mem_check_buswidth() because it
expects a data phase when there is none. Make sure the data direction is
set to SPI_MEM_NO_DATA when there is no data to write.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The spi-mem layer provides a spi_mem_supports_op() function to check
whether a specific operation is supported by the controller or not.
This is much more accurate than the hwcaps selection logic based on
SPI_{RX,TX}_ flags.
Rework the hwcaps selection logic to use spi_mem_supports_op().
To make sure the build doesn't break for boards not using CONFIG_DM_SPI,
add a simple SPI_{RX,TX}_ based hwcaps selection logic in spi-mem-nodm
similar to spi_mem_default_supports_op(). This change is only
compile-tested.
To avoid SPL size problems on the x530 board, the old hwcaps selection
is still kept around. Leaving the code in-place was getting difficult to
read and understand, so the code is restructured to have it all in one
isolated function. As a result of this, the parameter hwcaps to
spi_nor_setup() is no longer needed. Remove it.
Based on the Linux commit c76f5089796a (mtd: spi-nor: Rework hwcaps
selection for the spi-mem case, 2019-08-06)
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Sometimes the information in a flash's SFDP tables is wrong. Sometimes
some information just can't be expressed in the SFDP table. So,
introduce the fixup hooks to allow tailoring settings for a specific
flash.
Three hooks are added: default_init, post_sfdp, and post_bfpt. These
allow tweaking the flash settings at different point in the probe
sequence. Since the hooks reside in nor->info, set that value just
before the call to spi_nor_init_params().
The hooks and at what points they are executed mimics Linux's spi-nor
framework. One major difference is that Linux puts the struct
spi_nor_fixups in nor->info. This is not possible in U-Boot because the
spi-nor-ids list is shared between spi-nor-core.c and spi-nor-tiny.c.
Since spi-nor-tiny shouldn't have those fixup hooks populated, add a
separate function that lets flashes populate their fixup hooks.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
These structures will be used in a later commit inside another structure
definition. Also take the declarations out of the ifdef since they won't
affect the final binary anyway and will be used in a later commit.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
nor->setup() can be used by flashes to configure settings in case they
have any peculiarities that can't be easily expressed by the generic
spi-nor framework. This includes things like different opcodes, dummy
cycles, page size, uniform/non-uniform sector sizes, etc.
Move related declarations to avoid forward declarations.
Inspired by the Linux kernel's setup() hook.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
The check in spi_nor_scan() doesn't catch it because addr_width did get
set. This fixes that check.
Ported from Kernel commit 324f78dfb442b82365548b657ec4e6974c677502.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Set up opcode extension and enable/disable DTR mode based on whether the
command is DTR or not.
xSPI flashes can have a 4-byte dummy address associated with some
commands like the Read Status Register command in octal DTR mode. Since
the flash does not support sending the dummy address, we can not use
automatic write completion polling in DTR mode. Further, no write
completion polling makes it impossible to use DAC mode for DTR writes.
In that mode, the controller does not know beforehand how long a write
will be and so it can de-assert Chip Select (CS#) at any time. Once CS#
is de-assert, the flash will go into burning phase. But since the
controller does not do write completion polling, it does not know when
the flash is busy and might send in writes while the flash is not ready.
So, disable write completion polling and make writes go through indirect
mode for DTR writes and let spi-mem take care of polling the SR.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Once the start bit is toggled it takes a small amount of time before it
is internally synchronized. This means we can't start writing during
that part. So add a small delay to allow the bit to be synchronized.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
If the device tree provides a read delay value, use that directly and do
not perform the calibration procedure.
This allows the device tree to over-ride the read delay value in cases
where the read delay value obtained via calibration is incorrect. One
such example is the Cypress Semper flash. It needs a read delay of 4 in
octal DTR mode. But since the calibration procedure is run before the
flash is switched in octal DTR mode, it yields a read delay of 2. A
value of 4 works for both octal DTR and legacy modes.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
spi_mem_default_supports_op() rejects DTR ops by default to ensure that
the controller drivers that haven't been updated with DTR support
continue to reject them. It also makes sure that controllers that don't
support DTR mode at all (which is most of them at the moment) also
reject them.
This means that controller drivers that want to support DTR mode can't
use spi_mem_default_supports_op(). Driver authors have to roll their own
supports_op() function and mimic the buswidth checks. Or even worse,
driver authors might skip it completely or get it wrong.
Add spi_mem_dtr_supports_op(). It provides a basic sanity check for DTR
ops and performs the buswidth requirement check. Move the logic for
checking buswidth in spi_mem_default_supports_op() to a separate
function so the logic is not repeated twice.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Controllers can use this function to perform basic sanity checking on
the spi-mem op.
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
In xSPI mode, flashes expect 2-byte opcodes. The second byte is called
the "command extension". There can be 3 types of extensions in xSPI:
repeat, invert, and hex. When the extension type is "repeat", the same
opcode is sent twice. When it is "invert", the second byte is the
inverse of the opcode. When it is "hex" an additional opcode byte based
is sent with the command whose value can be anything.
So, make opcode a 16-bit value and add a 'nbytes', similar to how
multiple address widths are handled.
All usages of sizeof(op->cmd.opcode) also need to be changed to be
op->cmd.nbytes because that is the actual indicator of opcode size.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add a driver for Macronix SPI controller IP.
This patch referred from linux spi-mxic.c. The difference from the
linux version is described here.
1. To adapt uboot spi framework, modify some functions naming.
2. Remove the incompatible functions of Uboot.
3. Add dummy byte recalculattion function to support dummy buswidth
not align data buswidth operation.(ex: 1-1-4, 1-1-8)
4. Add Octal mode support.
Signed-off-by: Zhengxun <zhengxunli.mxic@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: fixed file permission, comment line, kconfig]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Unlike imx6, on imx7 the USB PHY is described as:
usbphynop1: usbphynop1 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_PHY1_CLK>;
clock-names = "main_clk";
#phy-cells = <0>;
};
which does not have the 'reg' property.
Do not return an error when the 'reg' property is not found
for the USB PHY.
This fixes USB gadget regression on a imx7s-warp board.
Successfully tested the "ums 0 mmc 0" command on two boards:
imx7s-warp and imx6dl-pico-pi.
Signed-off-by: Fabio Estevam <festevam@denx.de>
On a imx7s-warp board the fdtdec_get_alias_seq() function
always fails.
As priv->portnr is only used on i.MX6, move fdtdec_get_alias_seq()
inside the CONFIG_MX6 block.
Signed-off-by: Fabio Estevam <festevam@denx.de>
The board detection is incorrectly stating it's an rcar3 variant
instead of an RZ/G2 variant on all the r8a774*1_beacon boards.
Set the flag to correctly display as RZ/G2[M/N/H]
Signed-off-by: Adam Ford <aford173@gmail.com>
Add board code for the R8A779A0 V3U Falcon board.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
--
Marek: - various small rebase fixes and clean ups
The R-Car V3U does support RPC interface, however the support for it is
missing in upstream Linux DTs as of commit 9f4ad9e425a1 ("Linux 5.12"),
add the node into u-boot.dtsi to let U-Boot access the SPI NOR or HF.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Import R8A779A0 V3U PFC tables from Linux 5.12, commit 9f4ad9e425a1
("Linux 5.12") . Add parts of PFC table integration from
pinctrl: renesas: Add R8A779A0 V3U PFC tables
by Hai Pham <hai.pham.ud@renesas.com>" .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The R8A779A0 V3U GPIO block has additional "General Input Enable" INEN
register. Add new R8A779A0 compatible string with a new quirk and also
a handler for this quirk which toggles the INEN register in the right
place. INEN register handling is based on "gpio: renesas: Add R8A779A0
V3U support" by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Add clock tables for R8A779A0 V3U SoC from Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
--
Marek: - Add .reset_modemr_offset
- Sync tables from Linux 5.12
- Rebase on latest u-boot
On R8A779A0 V3U SoC, PLL1 and PLL5 use a divider value
from cpg_pll_configs table while PLL{20,21,30,31,4} use
different control offset. Introduce new types to handle
this and handle those types in the Gen3 clock code.
Based on "clk: renesas: Add support for R8A779A0 V3U PLLn"
by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The get_mtd_device_nm() function (code imported from Linux) simply
iterates all registered MTD devices and compares the given name with
all MTDs' names.
With SPI_FLASH_MTD enabled U-Boot registers a SPI-NOR as a MTD device
with name identical to the SPI flash chip name (from SPI ID table). Thus
for a board with multiple same SPI-NORs it registers multiple MTDs, but
all with the same name (such as "s25fl164k"). We do not want to change
this behaviour, since such a change could break existing boot scripts,
which can rely on a hardcoded name.
In order to allow somehow to uniqely select a MTD device, change
get_mtd_device_nm() function as such:
- if first character of name is '/', try interpreting it as OF path
- otherwise compare the name with MTDs name and MTDs device name.
In the following example a board has two "s25fl164k" SPI-NORs. They both
have name "s25fl164k", thus cannot be uniquely selected via this name.
With this change, the user can select the second SPI-NOR either with
"spi-nor@1" or "/soc/spi@10600/spi-nor@1".
Example:
=> mtd list
List of MTD devices:
* s25fl164k
- device: spi-nor@0
- parent: spi@10600
- driver: jedec_spi_nor
- path: /soc/spi@10600/spi-nor@0
- type: NOR flash
- block size: 0x1000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000000800000 : "s25fl164k"
* s25fl164k
- device: spi-nor@1
- parent: spi@10600
- driver: jedec_spi_nor
- path: /soc/spi@10600/spi-nor@1
- type: NOR flash
- block size: 0x1000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000000800000 : "s25fl164k"
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Currently when the SPI_FLASH_MTD config option is enabled, only one SPI
can be registered as MTD at any time - it is the last one probed (since
with old non-DM model only one SPI NOR could be probed at any time).
When DM is enabled, allow for registering multiple SPI NORs as MTDs by
utilizing the nor->mtd structure, which is filled in by spi_nor_scan
anyway, instead of filling a separate struct mtd_info.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Add support for parsing partitions defined in device-trees via the
`partitions` node with `fixed-partitions` compatible.
The `mtdparts`/`mtdids` mechanism takes precedence. If some partitions
are defined for a MTD device via this mechanism, the code won't register
partitions for that MTD device from OF, even if they are defined.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Add functions ofnode_get_addr_size_index_notrans(), which is a
non-translating version of ofnode_get_addr_size_index().
Some addresses are not meant to be translated, for example those of MTD
fixed-partitions.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
- x86: Discard .note.gnu.property sections
- nvme: Skip block device creation for inactive namespaces
- nvme: Convert NVMe doc to reST, and various minor fixes
On some distributions the mkfs is under /sbin and /sbin is not set
for mere users. Include /sbin to the PATH when creating file system,
so that users won't get a scary traceback from Python.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Update to me as co-maintainer with Peng.
Additionally, update the mmc alias in git-mailrc.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
All symbols that are defined in Kconfig will always be defined (or not)
prior to preprocessing due to the -include directive while building.
However, symbols which are not yet migrated will only be defined (or
not) once the board config.h is included, via <config.h>. While the end
goal must be to migrate all symbols, today we have cases where the size
of gd will get mismatched within the build, based on include order.
Mitigate this by making sure that any <asm/global_data.h> that uses
symbols not in Kconfig does start with <config.h>. Remove this when not
needed.
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Based on the comment in socfpga_soc64_common.h, the intention is for
CONFIG_SYS_MEM_RESERVE_SECURE to be unused. However, in the code we do:
...
and that will evaluate to true. This leads to unwanted code being
compiled. Further, as CONFIG_SYS_MEM_RESERVE_SECURE has not been
migrated to Kconfig, this leads to a mismatch in the size of gd
depending on if we have or have not also had <configs/BOARD.h> also
included yet.
Remove the define as it's not needed.
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Chee Hong Ang <chee.hong.ang@intel.com>
Cc: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
With the changes in commit 588efcdd72fc ("powerpc: Don't use relative
include for config.h in global_data.h") fixing the root of the problem,
we no longer need this re-inclusion.
This reverts commit f6c0d365d3.
Cc: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As there is an arch/powerpc/include/asm/config.h file using "" to get
config.h here can lead to using that rather than include/config.h. This
in turn can lead to a mismatch in the size of gd.
Cc: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
The original code is in the public domain. Licenses/README states that the
general license for U-Boot is GPL 2.0+. So we can mark the malloc code as
GPL 2.0+ too.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This was missed when NVMe support was initially brought to U-Boot
back in 2017. Add an entry for it and list myself as the maintainer.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
A udevice's priv space is cleared in alloc_priv() in the DM core.
Don't do it again in its probe() routine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present there is an offset of one added during the creation of
block device. This can be very confusing as we wanted to encode the
namespace id in the block device name but namespae id cannot be zero.
This changes to use the namespace id directly in the block device
name, eliminating the offset of one effectively.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present for each namespace there is a block device created for it.
There is no issue if the number of supported namespaces reported from
the NVMe device is only 1.
Since QEMU commit 7f0f1acedf15 ("hw/block/nvme: support multiple namespaces"),
the number of supported namespaces reported has been changed from 1
to 256, but not all of them are active namespaces. The actual active
one depends on the QEMU command line parameters. A common case is
that namespace 1 being active and all other 255 being inactive.
If a namespace is inactive, the namespace identify command returns a
zero filled data structure. We can use field NSZE (namespace size) to
decide whether a block device should be created for it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present the block device creation happens in the NVMe uclass
driver post_probe() phase. In preparation to support multiple
namespaces, we should issue namespace identify before creating
block devices but that touches the underlying hardware hence it
is not appropriate to do such in the uclass driver post_probe().
Let's move it to driver probe() phase instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
AQA (Admin Queue Attributes) register is a dword size with
lower word of ASQS, and higher word of ACQS.
The code set the variable aqa twice, but it is redundant.
Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Each prp is 8 bytes, calculate the number of prps
per page should just divide page size by 8
there is no need to minus 1
Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
writel() and co. already include the endian swap; doing the swap twice
is, er, unhelpful.
Tested on a P4080DS, which boots perfectly fine off NVMe with this.
Signed-off-by: David Lamparter <equinox@diac24.net>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When switching to kernel.org x86_64 gcc 11.1.0 toolchain, u-boot.rom
built from qemu-x86_defconfig no longer boots anymore. Investigation
shows that U-Boot fails at a very early stage during the boot process,
in fdtdec_prepare_fdt() where fdt_check_header() complains that there
is not a valid device tree found at gd->fdt_blob which points to _end.
Now _end points to an allocated section .note.gnu.property which of
course is wrong.
This issue is however not seen when using the default Ubuntu 20.04 gnu
toolchain (gcc 9.3.0 with binutils 2.34). Further investigation shows
that it is caused by a behavior change of binutils v2.36 which is part
of the kernel.org gcc 11.1.0 toolchain, via the following commit:
939b95c77bf2 ("Linux/x86: Configure gas with --enable-x86-used-note by default")
In fact, there was already a regression bug report [1] for binutils two
months ago, but the binutils folks did not think it is a bug :(
To resolve this, there are several options:
* pass -Wa,-mx86-used-note=no to gas
* pass -R .note.gnu.property to objcopy
* discard the section in the linker script
Linux kernel uses the discard way [2], so let's do the same for U-Boot.
[1] https://sourceware.org/bugzilla/show_bug.cgi?id=27753
[2] commit 4caffe6a28d3 ("x86/vdso: Discard .note.gnu.property sections in vDSO")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On ARM64 secure OS can run as 64bit or 32bit that's why it is necessary to
record information about architecture that other code can read it and
properly pass it to TF-A and start in 64bit or 32bit mode.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
DT files have been added this year but forgot to update it that's why do it
in separate patch now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
It is not recommended to have aliases for gpio. In past it was used in
Linux for assigning numbers via sysfs which is deprecated and libgpiod
should be used instead.
In U-Boot this number is used for seq number but gpio offset are not
counted from this number. That's why having these aliases only for seq
number is not needed. As is done in Linux it is the best to use full gpio
name instead of sequence number which depends on sequence in binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Align USB nodes with the latest dt-bindings. It is adding resets, new
interrupt and also some quirks.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dtc supports new sugar syntax which is easier compare to previous one
that's why also covert overlays for SOM to it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
kv260-revB is different compare to revA (usbhub is wired via i2c) that's
why remove revA compatible string.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The Clocking Wizard IP supports clock circuits customized
to your clocking requirements. The wizard support for
dynamically reconfiguring the clocking primitives for
Multiply, Divide, Phase Shift/Offset, or Duty Cycle.
Limited by U-Boot clk uclass without set_phase API, this
patch only provides set_rate to modify the frequency.
Signed-off-by: Zhengxun <zhengxunli.mxic@gmail.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Xilinx ZynqMP supports also addresses above 4GB (32bit) that's why also
generate u-boot.its with 64bit load/entry addresses to also support
different configurations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
psgtr node should be below pinctrl for easier comparion among dts files.
That's why move that nodes to different location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Clock setting is not static anymore that's why it depends on firmware setup
that's why remove this comment.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Networking subsystem is not using aliases that's why remove them for CAN
devices. There is also no any other Xilinx ZynqMP DT file with them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
As per the design specification
"The 16-bit Seconds Calibration Value represents the number of
Oscillator Ticks that are required to measure the largest time
period that is less than or equal to 1 second.
For an oscillator that is 32.768 KHz, this value will be 0x7FFF."
Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
psgtr node should be below pinctrl for easier comparion among dts files.
That's why move that nodes to different location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Historically dpdma and dpsub are placed at the end of files. Move nodes
there for easier comparison among dts files.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dwc3 can be used only for higher speeds than super-speed that's why
explicitly set it up.
This is also aligned with other ZynqMP dts files.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Uarts already have u-boot,dm-pre-reloc via zynqmp.dtsi that's why there is
no need to have them in platform DT files too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is need to pass entry about secure OS when bl32_entry is defined.
Currently only 64bit support is added but /fit-images node have been
extended to also record if this is 32bit or 64bit secure OS. When this is
tested the code will be update to support this configuration too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The first change is to trying to find out TF-A load address based on
reading elf file. Expectation is that bl31.bin is in the same folder as
bl31.elf. It brings new flexibility to place TF-A to any address (DDR
included).
And also enable TEE generation also with TEE configuration.
Expecation is the same as above that tee.bin and tee.elf are in the same
folder.
User has to just define link to BL31/BL32 binary files and the rest should
be handled by the script.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
TF-A and SecureOS can allocate the part of DDR for self but U-Boot is not
handling this configuration that the part of memory is reserved and
shouldn't be used by U-Boot. That's why read all reserved memory locations
and don't use it.
The code was taken from commit 4a1b975dac ("board: stm32mp1: reserve
memory for OP-TEE in device tree") and commit 1419e5b516 ("stm32mp:
update MMU config before the relocation") which is used by stm32 and does
the job properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.
Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
There is no reason to have CCI no enabled by default. Enable it when your
system configuration requires it. In Xilinx configuration flow this is
work for Device Tree Generator which reads information from HW Design
configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
K26 has EMMC and SD and default 0 is not working when system is booting out
of SD which is controller 1. Add controller autodetection via
mmc_get_env_dev(). The same code is used for distro_boot selection done in
board_late_init(). bootseq variable can't be reused because this is called
so late.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."
Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>From schema:
../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml
Similar change has been done for Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com
SVDs are using different name which can't be handled via zynqmp_devices
structure. That's why introduce zynqmp_detect_svd_name() which checks ID
code for these devices and show proper name for them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enabling EFI secure boot which is required for EBBR specification.
Enabling this will fix
"RT.SetVariable - Create one Time Base Auth Variable, the expect return
status should be EFI_SUCCESS"
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
From U-Boot, loading application on RPU core 0 is fine but loading on
core 1 is not handled properly. Lock-step mode needs both the R5 cores
to be initialized and it is working fine. Whereas in SPLIT mode individual
R5 cores needs to be initialized as they need to execute differenet
applications. Handle both these lock-step and split modes by propagating
mode and RPU core number(4 for RPU0 and 5 for RPU1) for various functions
and by adding conditions in those functions.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The Linux commit f69629919942 ("dt-bindings: sram: Convert SRAM bindings to
json-schema") converted binding to yaml and some missing required
properties started to be reported. Align binding based on it.
The patch is fixing these warnings:
.../zynq-zc702.dt.yaml: sram@fffc0000: '#address-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: '#size-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: 'ranges' is a required property
>From schema: .../Documentation/devicetree/bindings/sram/sram.yaml
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87c02786ccd8d7827827a9d95a8737bb300caeb0.1606397101.git.michal.simek@xilinx.com
The Linux commit f8f79fa6bb25 ("dt-bindings: at25: convert the binding
document to yaml") converted binding to yaml and 3 deprecated properties
pop up.
The patch is fixing these warnings:
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'pagesize' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'size' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'address-width' is a required property
>From schema: .../Documentation/devicetree/bindings/eeprom/at25.yaml
by converting them to new binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/be2c1125d98386033e182012eb08986924707a76.1606397101.git.michal.simek@xilinx.com
Use the ZDMA channel 0 to initialize the DRAM banks. This avoid
spurious ECC errors that can occur when accessing unitialized memory.
The feature is enabled by setting the option
CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT and providing the following data:
SPL_ZYNQMP_DRAM_BANK1_BASE: start of memory to initialize
SPL_ZYNQMP_DRAM_BANK1_LEN : len of memory to initialize (hex)
SPL_ZYNQMP_DRAM_BANK2_BASE: start of memory to initialize
SPL_ZYNQMP_DRAM_BANK2_LEN : len of memory to initialize (hex)
Setting SPL_ZYNQMP_DRAM_BANK_LEN to 0 takes no action.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
pca953x also depends on i2c that's why add dependency to Kconfig.
Where GPIO is enabled but I2C compilation error pops up.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Replace typo CONFIG_USE_AUTOBOOT_MENUKEY with
CONFIG_AUTOBOOT_USE_MENUKEY as when they were introduced initially there
was some mismatch in which name was used where.
Fixes: 8fc31e23aa ("autoboot: Rename CONFIG_MENUKEY to CONFIG_AUTOBOOT_MENUKEY")
Signed-off-by: Da Xue <da@libre.computer>
This function is passed *dev not *dev_desc, so pass the right name to
part_init().
Fixes: f14c5ee5ab ("disk: part_dos: update partition table entries after write")
Signed-off-by: Christian Melki <christian.melki@t2data.com>
MSYS2 Windows build started to fail since yesterday (Jun 21):
checking keyring...
checking package integrity...
error: gcc-libs: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
:: File /var/cache/pacman/pkg/gcc-libs-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)).
error: gcc: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
:: File /var/cache/pacman/pkg/gcc-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)).
error: failed to commit transaction (invalid or corrupted package)
Errors occurred, no packages were upgraded.
Switching to the latest installer (version 20210604) seems to fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com>
This reverts commit 63756575b4.
Since this commit a imx6qdl-pico board boots extremely slowly
in both SPL as well as U-Boot proper.
Fix this regression by reverting the offending commit for now.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Pierre-Jean Texier <texier.pj2@gmail.com>
This patch allows uboot scripts make choices about where to boot from based
on the active mmc boot partition. This allows having two copies of kernel,
filesystems etc, and choosing which to boot from based off of the active
bootloader partition.
Signed-off-by: Reuben Dowle <reuben.dowle@4rf.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The data read is not working when using FIFO mode.
From DesignWare databook, when a Data_Transfer_Over (DTO) interrupt is
received, the software should read the remaining data from FIFO.
Add DTO interrupt checking on data read path and clear interrupts before
start reading from FIFO. So, it doesn't clear the next pending
interrupts unintentionally after read from FIFO.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
With a 48MHz input clock, the lowest bus frequency can be as low as
48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
the mmc framework take seconds to finish the initialization.
Limiting the minimum bus frequency to a slightly higher value can solve the
issue without any side effects.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
imx8mm ekv has been switched to use distro boot commands, but had no
correct options enabled to support sysboot.
According to the README.distro, sysboot is consindered to be a
recommended way of using distro boot commands, it required default distro
features to be enabled instead of only those that are relevant to the boot
script.
Replace the boot script specific options in the config to a default distro
option.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Fixes: 2df8930bf9 ("imx8mm: configs: add support for distro boot commands")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
imx8mp ekv has been switched to use distro boot commands, but had no
correct options enabled to support sysboot.
According to the README.distro, sysboot is consindered to be a
recommended way of using distro boot commands, it required default distro
features to be enabled instead of only those that are relevant to the boot
script.
Replace the boot script specific options in the config to a default distro
option.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Fixes: 9b162b1d1f ("imx8mp: configs: add support for distro boot commands")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Remove the LED unit addresses and reg properties to
fix the following dtc build warnings:
arch/arm/dts/o4-imx-nano.dtb: Warning (reg_format): /leds/led@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
...
arch/arm/dts/o4-imx-nano.dtb: Warning (avoid_default_addr_size): /leds/led@0: Relying on default #address-cells value
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Oleh Kravchenko <oleg@kaa.org.ua>
- stm32mp157c-odyssey-som DT fixes
- stm32_qspi: Fix short data write operation
- dfu: set max_buf_size to erasesize also for NOR devices
- Fixes ethernet clock property name for STM32MP1 board
- STM32CubeProgrammer: various fixes
- clk: cosmetic update for clk-uclass
If the environment does not have "soc" or "board" set, and fdtdir
option is specified in extlinux.conf, the bootloader will crash whilst
dereferencing a null pointer. Add a guard against null soc or
board. Fixes a crash of qemu-riscv64_smode configuration, which does
not have CONFIG_SYS_SOC defined.
Signed-off-by: Dimitri John Ledkov <xnox@ubuntu.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is from
the linux tree:
$ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l
0
$ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l
633
In u-boot device trees both prefixes are used. Until recently the only
user of the ethernet alias was the sandbox test device tree. This
changed with commit fc054d563b ("net: Introduce DSA class for Ethernet
switches"). There, the MAC addresses are inherited based on the devices
sequence IDs which is in turn given by the device tree.
Before there are more users in u-boot and both worlds will differ even
more, rename the alias prefix to "ethernet" to match the linux ones.
Also adapt the test cases and rename any old aliases in the u-boot
device trees.
Cc: David Wu <david.wu@rock-chips.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the environment variable "ethact" is not set, the first device in the
uclass is returned. This depends on the probing order of the ethernet
devices. Moreover it is not not configurable at all.
Try to return the ethernet device with sequence id 0 first which then
can be configured by the aliases in a device tree. Fall back to the old
mechanism in case of an error.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Commit 4f0278dac5 ("net: sun8i-emac: Lower MDIO frequency") leads to
network failure on the OrangePi PC.
=> dhcp
sun8i_emac_eth_start: Timeout
According to the commit message the change of the MDIO frequency is only
required for external PHYs.
Fixes: 4f0278dac5 ("net: sun8i-emac: Lower MDIO frequency")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add SynQuacer's NETSEC GbE controller driver.
Since this driver will load the firmware from SPI NOR flash,
this depends on CONFIG_SYNQUACER_SPI=y.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Disabling clk_ck clock leads to link up status loss in phy, which
leads to auto-negotiation restart before each network command
execution.
This issue is especially big for PXE boot protocol because of
auto-negotiation restarts before each configuration filename trial.
To avoid this issue don't disable clk_ck clock after it was enabled.
Signed-off-by: Daniil Stas <daniil.stas@posteo.net>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
commit f1bcad22dd ("net: e1000: add support for writing to EEPROM")
adds support for storing hwaddr in EEPROM however i210 devices do not
support this and thus results in errors such as:
Warning: e1000#0 failed to set MAC address'
Check if a flash device is present and if not return -ENOSYS indicating
this is not supported.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Move the message "Invalid or missing layout file."
to debug level as it is a normal behavior and not an error
and add the missing '\n'.
This patch avoids the strange trace :
Boot over usb0!
Invalid or missing layout file.DFU alt info setting: done
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Use get_cpu_dev() in uart getID command and remove the defines
DEVICE_ID_BYTE1 and 2 defines.
This patch prepare the support for new SOC family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Handle the second USB enumeration only when the flashlayout is received
and when phase is PHASE_FLASHLAYOUT. This patch removes the call of
stm32prog_next_phase as it is already done in stm32prog_dfu_init().
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When CONFIG_FIT_SIGNATURE is activated, CONFIG_LEGACY_IMAGE_FORMAT
is deactivated and the define IMAGE_FORMAT_LEGACY don't exist with
include/image.h:
#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
#define IMAGE_FORMAT_LEGACY 0x01 /* legacy image_header based format */
#endif
This patch adds the needed check on compilation flag
CONFIG_LEGACY_IMAGE_FORMAT to avoid the compilation error
for command stm32prog:
cmd_stm32prog.c:81:8: error: ‘IMAGE_FORMAT_LEGACY’ undeclared
(first use in this function); did you mean ‘IMAGE_FORMAT_FIT’?
81 | if (IMAGE_FORMAT_LEGACY ==
| ^~~~~~~~~~~~~~~~~~~
| IMAGE_FORMAT_FIT
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the support in command stm32prog of kernel load and start
with initrd file, identify by the partition Type "Binary" in
the flashlayout.tsv, for example:
- 0x01 fsbl Binary none 0x0 tfa.stm32
- 0x03 fip Binary none 0x0 fip.bin
P 0x10 kernel System ram0 0xC2000000 uImage.bin
P 0x11 dtb FileSystem ram0 0xC4000000 board.dtb
P 0x12 initrd Binary ram0 0xC4400000 <initrd>
The <initrd> file can be a legacy image "uInitrd", generated
with mkimage, or a RAW initrd image "initrd.gz".
After a DFU detach the bootm command with be executed
with the associated address, for example:
$> bootm 0xC2000000 0xC4400000:<size> 0xC4000000
When the "Binary" partition type is absent, the 'bootm'
command starts the kernel without ramdisk, for example:
$> bootm 0xC2000000 - 0xC4000000
With this paths, it is no more mandatory to generate FIT
including the kernel, DT and initrd:
- 0x01 fsbl Binary none 0x0 tfa.stm32
- 0x03 fip Binary none 0x0 fip.bin
P 0x10 fit System ram0 0xC2000000 fit.bin
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Handle timeout in stm32prog_serial_get_buffer to sent NACK
to STM32CubeProgrammer when the buffer is not fully received.
This patch avoids to reach the STM32CubeProgrammer timeout and
the associated unrecoverable error.
Timeout error occurred while waiting for acknowledgment.
Error: Write Operation fails at packet number 4165 at address 0x1044FF
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch removes the header check for UART download;
the check of checksum is not mandatory with even parity and chuck
checksum for each 256 received bytes and it is only done for
STM32 image (FSBL = TF-A BL2), not for FIT image.
This patch solve issue of duplicated 0x100 byte written with FIP header.
Fixes: 4fb7b3e108 ("stm32mp: stm32prog: add FIP header support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Use the correct name for STMicroelectronics phys config properties,
replace '_' by '-':
"st,eth_clk_sel" => "st,eth-clk-sel"
"st,eth-ref-clk-sel" => st,eth-clk-sel"
These property name are aligned with the upstreamed Linux kernel binding:
linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
See Linux kernel commit "dt-bindings: net: stmmac: add phys config
properties" merged in v5.1-rc1.
This patch allow to reuse the kernel device tree directly in U-Boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
For NOR devices the logical DFU buffer size is the sector_size,
as it is done in dfu_sf.c or in spi/sf_mtd.c
(sf_mtd_info.erasesize = flash->sector_size)
For NAND the DFU size was already limited to erasesize as
has_pages = true.
So the mtd dfu backend can use this erasesize for all the MTD devices,
NOR and NAND with dfu->max_buf_size = mtd->erasesize
This difference was initially copied from MTD command, where
data is fully available in RAM without size limitation.
This patch avoids to have many sector write in dfu_mtd.c at the end
of the DFU transfer and avoids issues with USB timeout or WATCHDOG.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This driver supports Rockchip NFC (NAND Flash Controller) found on
RK3308, RK2928, RKPX30, RV1108 and other SOCs. The driver has been
tested using 8-bit NAND interface on the ARM based RK3308 platform.
Support Rockchip SoCs and NFC versions:
- PX30 and RK3326(NFCv900).
ECC: 16/40/60/70 bits/1KB.
CLOCK: ahb and nfc.
- RK3308 and RV1108(NFCv800).
ECC: 16 bits/1KB.
CLOCK: ahb and nfc.
- RK3036 and RK3128(NFCv622).
ECC: 16/24/40/60 bits/1KB.
CLOCK: ahb and nfc.
- RK3066, RK3188 and RK2928(NFCv600).
ECC: 16/24/40/60 bits/1KB.
CLOCK: ahb.
Supported features:
- Read full page data by DMA.
- Support HW ECC(one step is 1KB).
- Support 2 - 32K page size.
- Support 8 CS(depend on SoCs)
Limitations:
- No support for the ecc step size is 512.
- Untested on some SoCs.
- No support for subpages.
- No support for the builtin randomizer.
- The original bad block mask is not supported. It is recommended to
use the BBT(bad block table).
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use the generic error number instead of specific error number.
Changes fix the below error.
drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_read':
drivers/pci/pcie_dw_rockchip.c:70:10: error: 'PCIBIOS_UNSUPPORTED'
undeclared (first use in this function)
70 | return PCIBIOS_UNSUPPORTED;
| ^~~~~~~~~~~~~~~~~~~
drivers/pci/pcie_dw_rockchip.c: In function 'rk_pcie_write':
drivers/pci/pcie_dw_rockchip.c:90:10: error: 'PCIBIOS_UNSUPPORTED'
undeclared (first use in this function)
90 | return PCIBIOS_UNSUPPORTED;
| ^~~~~~~~~~~~~~~~~~~
Cc: Patrick Wildt <patrick@blueri.se>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3568 is a high-performance and low power quad-core application
processor designed for personal mobile internet device and AIoT
equipments.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
fdtoverlay (pxe_utils) require define fdtoverlay_addr_r env variable
for example sunxi-common.h meson64.h already have it.
Signed-off-by: Artem Lapkin <art@khadas.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The SDMMC2 interface hosts an eMMC. Replace the interface properties
that would only apply to SD cards—“broken-cd” and “disable-wp”—with
relevant ones: “non-removable”, “no-sd” and “no-sdio”.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
First set of u-boot-atmel features for the 2021.10 cycle:
This feature set converts the boards pm9261 and pm9263 Ethernet support
to DM; enables hash command for all SAM boards; fixes the NAND pmecc
bit-flips correction; adds Falcon boot for sama5d3_xplained board; and
other minor adjustments.
Add Priyanka Jain as MAINTAINER for
T2080RDB_revD_defconfig,
T2080RDB_revD_NAND_defconfig,
T2080RDB_revD_SDCARD_defconfig and
T2080RDB_revD_SPIFLASH_defconfig
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Change the USB erratum number A-050106 to A-050204 as A-050106 is
a duplicate and never be published.
Fixes 0cfa00cdb9 (“armv8: Add workaround for USB erratum A-050106”)
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Under DM, we rely on u-boot's device tree to provide the correct PHY
addresses. The board_fix_fdt callback is intended to be used for
device tree fixups before relocation. Unfortunately, this isn't an
option when booting from flash since the device tree isn't writable
before relocation.
This patch introduces the CONFIG_T2080RDB_REV_D option to signal that a
board revision D or up is the target. The config option is used to set
the correct Aquantia PHY address in the board's u-boot device tree.
Defconfig files with the option enable explicitly are added for
convenience.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The T2080RDB boards revisions D and up have updated 10G Aquantia PHYs
connected to MAC1 and MAC2. The second Aquantia PHY is located at a
different address on the MDIO bus compared to rev C (0x8 instead of 0x1).
Fix-up the Linux device tree to update the PHY address for the second
Aquantia PHY on boards revisions D and up. Also rename the PHY node to
reflect the changes.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Detect and print the board revision version based on the CPLD registers.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Both DM_ETH and DM_PCI are enabled for the T2080RDB board. Remove the
board_eth_init() callback and the non-DM_ETH code paths since they are not
needed anymore.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
A system clock of 66MHz was chosen for the pg-wcom-ls102xa.
Compared to the Evalboard, this corresponds to a reduction of 1/3.
The system counter clock should have been reduced accordingly,
but that was not the case, so we had a system time that was
1/3 behind the real time.
This patch corrects the system counter clock to
8.333MHz = 66.667MHz / 8.
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In order to improve power consumption ls102x allows to disable peripherals
that are not in use.
This patch follows SELI8 HW design description and disables peripherals
that are not in use in our designs, the same configuration is applicable
and for EXPU1.
This patch uses available hwconfig option for updating ls102x device
disable configuration.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The default behavior in the latest u-boot revisions is to rotate the
active net device to the next available if the requested link is not
established.
For our ls102x based devices this would mean that if active debug net
device is not available, u-boot will rotate and set the next net device
that is one of the estar adapters.
To return from this situation manual action to set correct ethact
adapter will be needed and this can be annoying when working in
debug mode.
Setting ethrotate=no will disable net adapter rotation and will make sure
that the primary adapter is always used.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This is most probably a typo, and in older u-uboot versions is same as
'saveenv', in the newer uboot versions there is a separate 'save' command
that is different from 'saveenv'.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In our designs we reserve PRAM area at the end of the RAM, and in order
this area to be visible and taken into account by the u-boot memory mgmt
CONFIG_PRAM has to be defined.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
From production view this is standard test executed during production on
all linux based foxmc cards.
On CENT2 HW defined memory region is zero means that some DDR accesses are
done by memory_post_dataline and memory_post_addrline but pattern tests
are skipped that's why mem_regions is fast there.
On ls102x for the complete DDR region of 1GiB memory_regions_post_test
takes approx. 4min and this is too much for production, so this patch
defines only 1MiB region as compromise.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The EXPU1 design is a new 40G capable ethernet service unit card for
Hitachi-Powergrids wired-com product lines.
The base SoC is same as for already added SELI8 card, consequently the
already added u-boot support for SELI8 is reused.
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
[Fixed new line error at EOF]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Address and size cells on SOC are set to 1. But gpio nodes are specified
with 2 cells. This fixes the gpio nodes to correct cells.
Signed-off-by: Lasse Klok Mikkelsen <lkmi@prevas.dk>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Current tsec adapter sets adapter gigabit capabilities by default, and in
reality this must not always be the case.
It is possible that tsec adapter is used for 100Mbps connection, and in
this case setting 1000Mbps capabilities can lead to some side effects such
longer autoneg process.
In our ls102x designs this problem leads to long autoneg times (> 4 sec)
in case board rgmii link is 100Mbps capable only.
Limiting the rgmii link capabilities provides faster and smoother
link establishment.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Commit df86d32 breaks linux kernel and product application boot.
Linux kernel and our product application scripts are expecting 0x prefix
for hexadecimal values, while env_set_hex writes them without a prefix.
This patch partially revert env_set_hex usage for affected env variables.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
During the mainlining of the board this was by mistake set to sector size.
Our user space env scripts are expecting envsize of 0x4000, and setting
this differently will break our cross-platform compatibility.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT
is used instead.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Michael Walle <michael@walle.cc> [for kontron-sl28]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For eSDHC, power supply is through peripheral circuit.
Some eSDHC versions have value 0 of the bit but that
does not reflect the truth. 3.3V is common for SD/MMC,
and is supported for all boards with eSDHC in current
u-boot. So, make 3.3V is supported in default in code.
CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled if
future board does not support 3.3V.
This is also a fix-up for one previous patch, which converted
to use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
that is not a Kconfig option.
Fixes: 52faec3182 ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
These boards, according to the schematic and per the board I own, use an
M24256-BWDW6TP I2C EEPROM which requires two address bytes.
This fixes the 'mac' command which is used to program, among other
things, the MAC addresses for the ethernet interfaces on the board.
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
IFC NOR flash base address of ls2088a is 0x580000000,
and offset of env crc is 0x500000, so fix the macro
CONFIG_ENV_ADDR to fix synchronous exception(access illegal address)
Fixes: 59071804c1 ("configs: ls2080a: Correct ENV_ADDR value")
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Stop to initialize the PCIe controller if it's disabled by RCW.
Fixes: 118e58e26e ("pci: layerscape: Split the EP and RC driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Read Linux PPFE firmware from flash partition and pass it to Linux through
FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs.
(FDT may increase at max by 64KB)
Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For cpu release command, check whether PSCI is supported firstly,
if supported, use PSCI to kick off secondary cores, otherwise still
use spin table.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
[Fixed checkpatch alignment CHECKs]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This adds the unit test for the K210 PLL to the sandbox defconfigs.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that the k210 clock driver does not depend on CCF, we should no longer
imply it (and probably should not have in the first place). We can also
reduce the pre-relocation malloc arena back to something sensible.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Linux has had some stability issues when using AISRAM with a different
frequency from SRAM. Mirror their change here now that we relocate into
AISRAM.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Now that we have only one clock driver, we don't need to have our own
subdirectory. Move the driver back with the rest of the clock drivers.
The MAINTAINERS for kendryte pinctrl is also fixed since it has always been
wrong.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This driver no longer serves a purpose now that we have moved away from
CCF. Drop it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This speeds up boot by preventing multiple reconfigurations of the PLLs.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This adds support for setting clock rates, which was left out of the
initial CCF expunging. There are several tricky bits here, mostly related
to the PLLS:
* The PLL's bypass is broken. If the PLL is reconfigured, any child clocks
will be stopped.
* PLL0 is the parent of ACLK which is the CPU and SRAM's clock. To prevent
stopping the CPU while we configure PLL0's rate, ACLK is reparented
to IN0 while PLL0 is disabled.
* PLL1 is the parent of the AISRAM clock. This clock cannot be reparented,
so we instead just disallow changing PLL1's rate after relocation (when
we are using the AISRAM).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Since we are no longer using CCF we cannot use the default soc_clk_dump.
Instead, implement our own.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Now that there no separate PLL driver, we can no longer make the PLL
functions static. By moving the PLL driver in with the rest of the clock
code, we can make these functions static again. We still keep the pll
header for unit testing, but it is pretty reduced.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This is effectively a complete rewrite to remove all dependency on CCF.
The code is now smaller, and so is the binary. It also takes up less memory
at runtime (since we don't have to create 40 udevices). In general, I am
much happier with this driver as much of the complexity and late binding
has been removed.
The k210_*_params structs which were previously used to initialize CCF
clocks are now used as the complete configuration. Since we can write our
own division logic, we can now do away with several "half" clocks which
only existed to provide constant factors of two.
The clock IDs have been renumbered to remove unused clocks. This may not be
the last time they are renumbered, since we have diverged with Linux. There
are also still a few clocks left out which may need to be added back in.
In general, I have tried to leave out behavioral changes. However, there is
a small bugfix regarding ACLK. According to the technical reference manual,
its mux comes *after* its divider (which is present only for PLL0). This
would have required yet another intermediate clock to fix with CCF, but
with the new driver it is just 2 lines of code :)
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Since 291da96b8e ("clk: Allow clock defaults to be set during re-reloc
state for SPL only") it has been impossible to set clock defaults before
relocation. This is annoying on boards without SPL, since there is no way
to set clock defaults before U-Boot proper. In particular, the aisram rate
must be changed before relocation on the K210, since U-Boot will hang if we
try and change the rate while we are using aisram.
To get around this, extend the stage parameter to allow force setting
defaults, even if they would be otherwise postponed for later. A device
tree property was decided against because of the concerns in the original
commit thread about the overhead of repeatedly parsing the device tree.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Current logic in riscv_get_ipi() for Andes PLICSW does not look
correct. The mask to test IPI pending bits for a hart should be
left shifted by (8 * gd->arch.boot_hart), just the same as what
is done in riscv_send_ipi().
Fixes: 8b3e97badf ("riscv: add functions for reading the IPI status")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
The doc says CONFIG_SKIP_LOWLEVEL_INIT is in ax25-ae350.h, while
actually it is not. Remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
At present the AE350 SPL defconfig is using OF_PRIOR_STAGE. The
intention was to use gdb to load device tree before running U-Boot
SPL/proper from RAM. When we switch to OF_SEPARATE we will have to
use our own DT but without "u-boot,dm-spl" in several essential
nodes, SPL does not boot.
Let's add all the required "u-boot,dm-spl" for SPL config.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
All the device nodes that refer to plic0 as their interrupt parent
have 2 cells encoded in their interrupts property, but plic0 only
provides 1 cell in #interrupt-cells which is incorrect.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
When using bootefi to boot a EFI binary, u-boot is supposed to
provide networking service for EFI application. Currently, 'pfe stop'
command is called from bootcmd before running bootefi. As a result
network stops working for EFI applications and console is flooded with
"Rx pkt not on expected port" messages.
Implement board_quiesce_devices() for ls1012a boards and call
pfe_command_stop() from it instead of calling 'pfe stop' from
*_bootcmd and bootcmd.
Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com>
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
[Fixed checkpatch space error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
It was noticed that the clock isn't continuously enabled when there is
no link. This is because the 125MHz clock is derived from the internal
PLL which seems to go into some kind of power-down mode every once in a
while. The LS1028A expects a contiuous clock. Thus enable the PLL all
the time.
Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is
the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO
regulator.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
One of the points of putting the rescue boot command into default
environment is that user can invoke it without physical access to the
board (without having to press the factory reset button), by running
run bootcmd_rescue
in U-Boot's console.
Therefore we have to ensure that bootcmd_rescue is always set to default
value, regardless of whether the factory reset button was pressed.
Otherwise the variable will be empty for example after upgrade from
previous U-Boot.
Fixes: ec3784d626 ("arm: mvebu: turris_mox: add support for board rescue mode")
Fixes: 176c3e7760 ("arm: mvebu: turris_omnia: support invoking rescue boot from console")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This supports Falcon boot support for Microchip SAMA5D3 Xplained,
tested on raw MMC, and on raw NAND.
spl_start_uboot() is has the simplest possible implementation.
It doesn't test the environment because enabling environment support
currently causes the SPL to exceed its maximum size (64 KiB).
It doesn't check the serial for incoming characters either because
this functionality currently doesn't seem to work from the SPL
on this board.
Settings for Falcon boot from at FAT partition are also added to
avoid compile failures when CONFIG_SPL_OS_BOOT is enabled, but this
particular case is currently not functional as adding FAT and
partition support cause the SPL to be too big again.
Signed-off-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers.
Add support for the same.
Note that we still need to send chan/flow cfg message to TIFS via TISCI
client driver in order to open up firewalls around chan/flow but setting
up of cfg registers is handled locally.
U-Boot specific code is in a separate file included in main driver so
as to maintain similarity with kernel driver in order to ease porting of
code in future.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-8-vigneshr@ti.com
In absence of Device Manager (DM) services such as at R5 SPL stage,
driver will have to natively setup Ring Cfg registers. Add support for
the same.
Note that we still need to send RING_CFG message to TIFS via TISCI
client driver in order to open up firewalls around Rings.
U-Boot specific code is in a separate file included in main driver so
as to maintain similarity with kernel driver in order to ease porting of
code in future.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-7-vigneshr@ti.com
R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
CFG, TCHAN CFG and RCHAN CFG address ranges.
Note that these registers are present within respective IPs but are
not populated in Linux DT nodes (as they are configured via TISCI APIs)
and hence are added to -u-boot.dtsi for now.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-6-vigneshr@ti.com
On J721e and J7200, MCU R5 core (boot master) itself would run Device
Manager (DM) Firmware and interact with TI Foundational Security (TIFS)
firmware to enable DMA and such other Resource Management (RM) services.
So, during R5 SPL stage there is no such RM service available and ti_sci
driver will have to directly interact with TIFS using DM to DMSC
channels to request RM resources.
Therefore add DT binding and driver for the same. This driver will
handle Resource Management services at R5 SPL stage.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-4-vigneshr@ti.com
MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.
Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused an error to the clock by a factor of 8
with j7 devices. This problem surfaced once the omap-timer was fixed.
Signed-off-by: Tero Kristo <kristo@kernel.org>
Update build instructions and image formats based on HSM rearch. A new
DM image is added into the build, which gets executed right after R5
SPL finishes its job.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Sysfw is not going to provide access to power management features in the
new architecture, so SPL must implement these itself. Enable all the raw
register access based clock + power domain drivers.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Sysfw is not going to provide access to power management features in the
new architecture, so SPL must implement these itself. Enable all the raw
register access based clock + power domain drivers.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Force the clk-k3 driver to probe early during R5 SPL boot to ensure the
default system clock configuration is completed. Many other drivers
assume a default state of the clock tree and it is currently possible
for them to probe before clk-k3 depending on the exact system
configuration.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reported-by: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Copy the contents of the board config loaded from sysfw.itb into an
EXTBOOT shared memory buffer that gets passed to sciserver. This only
needs to be done if EXTBOOT area has not been populated by ROM code yet.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Only start-up the non-linux remote cores if we are running in legacy
boot mode. HSM rearch is not yet supporting this.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
If the raw PM support is built in, we are operating in the split
firmware approach mode where PM support is not available. In this
case, skip the board config for this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Add callback routines for parsing the firmware info from FIT image, and
use the data to boot up ATF and the MCU R5 firmware.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Add platform clock and powerdomain data for J721e and J7200. This data
is used by the corresponding drivers to register all the required device
clocks and powerdomains.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Add DM (device manager) firmware image to the fit image that is loaded by
R5 SPL. This is needed with the HSM rearch where the firmware allocation
has been changed slightly.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Add support command for debugging K3 power domains. This is useful with
the HSM rearch setup, where power domains are directly controlled by SPL
instead of going through the TI SCI layer. The debugging support is only
available in the u-boot codebase though, so the raw register access
power domain layer must be enabled on u-boot side for this to work. By
default, u-boot side uses the TI SCI layer, and R5 SPL only uses the
direct access methods.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Normally, power domains are handled via TI-SCI in K3 SoCs. However,
SPL is not going to have access to sysfw resources, so it must control
them directly. Add driver for supporting this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add driver to support TI K3 generation SoC clocks. This driver registers
the clocks provided via platform data, and adds support for controlling
the clocks via DT handles.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Add support for TI K3 SoC PLLs. This clock type supports
enabling/disabling/setting and querying the clock rate for the PLL. The
euclidean library routine is used to calculate divider/multiplier rates
for the PLLs.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Clock rates are cached within the individual clock nodes, and right now
if one changes a clock rate somewhere in the middle of the tree, none
of its child clocks notice the change. To fix this, clear up all the
cached rates for us and our child clocks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
If a clock provider is not ready for assigning default rates/parents
during its probe, it may return -EPROBE_DEFER directly from xlate.
Handle this special case properly by skipping the entry and adjusting the
return value to pass. The defaults will be handled properly in post probe
phase then.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Set rate should return the new clock rate on success, and negative error
value on failure. Fix this, as currently set_rate returns 0 on success.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Add new clk subcommand "clk setfreq", for setting up a clock rate
directly from u-boot cmdline. This is handy for any debugging purposes
towards clocks.
Acked-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Bail out early if device returned for the parent clock is null.
This avoids warning prints like this when doing clk dump:
dev_get_uclass_priv: null device
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Some clocks are not associated to a DM node, so just parsing the DM is not
enough. This is especially true for root clocks, which typically don't have
any parents. Instead, fetch every registered UCLASS_CLK instance, and dump
these out.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Current driver only supports registering fixed rate clocks from DT. Add
new API which makes it possible to register fixed rate clocks directly
from e.g. platform specific clock drivers.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
board_fit_image_post_process() passes only start and size of the image,
but type of the image is not passed. So pass fit and node_offset, to
derive information about image to be processed.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
With the sysfw rearch, sysfw PM calls are no longer available from SPL
level. To properly support this, remove the is_on checks and the reset
assertion from the R5 remoteproc driver as these are not supported.
Attempting to access unavailable services will cause the device to hang.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
On J7 family of SoCs (J721E and J7200), sysfw is being split to be run
under two cores, TIFS portion on DMSC core, and DM firmware under MCU
R5. As MCU R5 is also used to run one phase of the bootloader, we must
prevent access from here towards sysfw services. To support this, add
new config option which can be used to detect presence of RM/PM sysfw
services.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Copy the best rational approximation calculation routines from Linux.
Typical usecase for these routines is to calculate the M/N divider
values for PLLs to reach a specific clock rate.
This is based on linux kernel commit:
"lib/math/rational.c: fix possible incorrect result from rational
fractions helper"
(sha1: 323dd2c3ed0641f49e89b4e420f9eef5d3d5a881)
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Sata/scsi and usb based devices are not started at this stage that's why
disks are not found and early update can't happen.
It is because of deficiency in the UEFI implementation which is not able to
deal with block devices which are added or removed after initialization.
EFI capsule on disk early feature needs to be fixed first to be able to
enable this feature properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable manual start in zynqmp_qspi_fill_gen_fifo().
Also enable GQSPI_IXR_GFNFULL_MASK and check for it instead of
GQSPI_IXR_GFEMTY_MASK.
Add dummy write to genfifo register in chipselect.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
The default register configuration after powerup for PSSYSMON_ANALOG_BUS
register is incorrect. Hence, fix this in SPL by writing correct fixed
value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit
sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c")
in Xilinx:embeddedsw[1].
[1] https://github.com/Xilinx/embeddedsw
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
0x04000000- 0x06000000 is reserved memory. We cannot load to anything here.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable configuration options to support Turris network boot. This
includes FIT support and some crypto commands.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add nodes for SPI NOR partitions to the device tree of Turris MOX, as
are in Linux' device tree.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add default fdtfile environment variable with value
marvell/armada-3720-turris-mox.dtb.
This can be useful for some boot scenarios.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Configure blinking on ethernet PHY LEDs on the MOX A board when entering
rescue mode via reset button.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add necessary config options and board code to support board factory
reset / rescue mode on Turris MOX.
In order to also support invoking rescue mode from U-Boot console,
without having to press the factory reset button, put the rescue command
into `bootcmd_rescue` default environment variable. When factory reset
button is pressed, invoke rescue mode via distroboot by setting
`boot_targets` to `rescue`.
Rescue boot from console can be invoked by running
run bootcmd_rescue
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Add nodes for indicator LED and reset button so that board code can
implement board factory reset mechanism.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The fragmented files were not correctly read because of two issues:
- The squashfs_file_info struct has a field named 'comp', which tells if
the file's fragment is compressed or not. This field was always set to
'true' in sqfs_get_regfile_info and sqfs_get_lregfile_info. It should
actually take sqfs_frag_lookup's return value. This patch addresses
these two assignments.
- In sqfs_read, the fragments (compressed or not) were copied to the
output buffer through a for loop which was reading data at the wrong
offset. Replace these loops by equivalent calls to memcpy, with the
right parameters.
I tested this patch by comparing the MD5 checksum of a few fragmented
files with the respective md5sum output in sandbox, considering both
compressed and uncompressed fragments.
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
Tested-by: Richard Genoud <richard.genoud@posteo.net>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Update the driver to support the device tree and the driver model.
The read / write helpers in rtc_ops allow access to scratch registers
only. The offset parameter is added to the address of the scratch0
register.
Support for non-DM has been removed as there were no users.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-8-dariobin@libero.it
To write correct data to the TC registers, the STATUS register must be
read until the BUSY bit is equal to zero. Once the BUSY flag is zero,
there is a 15 μs access period in which the TC registers can be
programmed.
The rtc_wait_not_busy() has been inspired by the Kernel.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-5-dariobin@libero.it
For USB DFU boot mode there is a limitation on the load address of boot
images that they have to be less than 0x70001000. Therefore, move the
SPL_TEXT_BASE address to 0x70000000.
Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at
0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move
the location of ATF to a latter location in SRAM, past the SPL image. Also
rearrange the EEPROM and BSS data on top of ATF.
Given below is the placement of various data sections in SRAM
┌──────────────────────────────────────┐0x70000000
│ │
│ │
│ │
│ SPL IMAGE (Max size 1.5 MB) │
│ │
│ │
│ │
├──────────────────────────────────────┤0x7017FFFF
│ │
│ SPL STACK │
│ │
├──────────────────────────────────────┤0x70192727
│ GLOBAL DATA(216 B) │
├──────────────────────────────────────┤0x701927FF
│ │
│ INITIAL HEAP (32 KB) │
│ │
├──────────────────────────────────────┤0x7019A7FF
│ │
│ BSS (20 KB) │
├──────────────────────────────────────┤0x7019F7FF
│ EEPROM DATA (2 KB) │
├──────────────────────────────────────┤0x7019FFFF
│ │
│ │
│ ATF (123 KB) │
│ │
│ │
├──────────────────────────────────────┤0x701BEBFB
│ BOOT PARAMETER INDEX TABLE (5124 B)│
├──────────────────────────────────────┤0x701BFFFF
│ │
│SYSFW FIREWALLED DUE TO A BUG (128 KB)│
│ │
├──────────────────────────────────────┤0x701DFFFF
│ │
│ DMSC CODE AREA (128 KB) │
│ │
└──────────────────────────────────────┘0x701FFFFF
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-9-a-govindraju@ti.com
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is
connected with a resistor divider in between. USB0_DRVVBUS pin is muxed
between USB0_DRVVBUS and GPIO1_79 signals.
Add the corresponding properties and set the pinmux mode for USB subsystem
in the evm dts file.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-7-a-govindraju@ti.com
U-Boot either supports USB host or device mode for a node at a time in the
device tree nodes. To support both host and dfu bootmodes, dr_mode is set
to "peripheral" by default and then fixed based on the mode selected by
the boot mode config dip switches on the board.
This needs to happen before the cdns3 generic layer binds the usb device
to a host or a device driver. Therefore, use fdtdec_setup_board()
implementation to fixup the device tree property.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-4-a-govindraju@ti.com
Pull request for efi-2021-07-rc5
Documentation:
* pinmux and ums man-page
Bug fixes:
* Consider that partition numbers as hexadecimal.
* Avoid a possible NULL dereference in efi_capsule_delete_file().
Add support for Storopack's SMEGW01 board, which is an
IoT gateway based on the i.MX7D SoC.
Based on the original U-Boot work done by Phytec.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Supported boot device types in iMX8MN: MMC, DHCP.
Add DISTRO_DEFAULTS config option and include the distro boot command
header file to enable full support of distro boot on i.MX8M Nano EVK (both
DDR and LPDDR derivatives).
Drop previous environment, which was targeting customized boot commands and
boot order.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ()
macro, which expands the value provided to the Hz range without taking into
account the precise Hz setting. This causes the frequency of 266 MHz not ot
be found in the imx8mm_fracpll_tbl, since it is entered there with a
precise Hz value. This in turn causes the boot hang in SPL, as proper DDR
fracpll frequency cannot be determined.
Correct the value in imx8mm_fracpll_tbl to match the one expanded by
MHZ(266) macro, rounding it down to MHz range only.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Fixes: 825ab6b406 ("driver: ddr: Refine the ddr init driver on imx8m")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Enable driver model support for FEC ethernet which allows us to remove
the iomux and board_eth_init function. Replace the toggling of the ethernet
phy reset with dt configuration.
Enable driver model support for PCI which allows us to remove the
eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for
PCI devices on init such as the e1000 that is present on the GW552x.
Convert board_pci_fixup to use dm callback and remove pcidisable env
variable which is not supported for DM_PCI and thus leave PCI always
enabled during init.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Clock initialization functionality has ambitious debug messages, which are
printed out when failures are triggered during execution:
- Separate frequency table lookup functions have the the same output that
makes it impossible to understand which function failed and produced the
output
- PLL decoding routine has a generic debug statement printed, which does
not state the actual value failed to be found
Extend the output for both cases with prefixing table lookup functions
output with function name, and report the failed value in PLL decoding
routine.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
A simple prototyping board with one microSD port, one Ethernet port,
2 USB ports, I2C, SPI, GPIO, and UART interfaces.
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
Board designed for quick prototyping and has one microSD port,
2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO,
UART interfaces, and 2 RGB LEDs.
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to
clock driver.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
We need those macros to instruct drivers on how to behave for SoC specific
quirks, so let's add it as done for other i.MX SoCs.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1020-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1050-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to
lcdif node.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Since we assume pll5 is the default lcdif clock source let's move
assigned-clocks(-parents) properties to .dtsi file.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Lcd peripheral needs 2 different gates to be enable to work, so let's
introduce the missing one(LCDIF_PIX) and rename the existing one
(LCDIF_APB).
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Some SoC needs "disp_axi" clock to be enabled, so let's try to retrieve it
and enabling. If it fails it gives only a debug(), but this clock as well
as "axi" clock is not mandatory.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
On some SoC mxsfb needs more than one clock gate(actual "per" clock). So
let's introduce "axi" clock that can be provided but it's not mandatory.
This is inspired from linux mxsfb driver. Also let's rename "per" clock to
"pix" clock for compatibility with already existing .dts lcdif nodes
implementation.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Now device_type = "memory" is mandatory to allow u-boot to read memory
node, so let's add it to memory node.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
This timer driver uses GPT Timer (General Purpose Timer) available on
a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator
as well as peripheral clock.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
[Giulio: added the driver's stub and handled peripheral clock prescaler
setting making driver to work correctly]
Signed-off-by: Jesse Taube <mr.bossman075@gmail.com>
[Jesse: added init, setting prescaler for 24Mhz support and enabling
timer]
This mpu handling works for every i.MXRT SoC that we have, so let's
generalize imxrt1050_region_config to imxrt_region_config.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Brackets '[' need to be escaped to avoid a build warning
lib/efi_loader/efi_image_loader.c:223:
WARNING: Inline strong start-string without end-string.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Masahisa Kojima <masahisa.kojima@linaro.org>
When `usb start` is called on the terminal, the dwc2 driver will try
to start every USB device as host first, even if it is explicitly
configured as peripheral in the device tree (dr_mode = "peripheral").
So to avoid an unwanted 15 seconds delay when initializing the usb
(one second per channel = 1s x 15), this patch adds a check to the
initialization, and will skip host initialization of the device is
explicitly set as peripheral. The checking is already done similarly
in the `drivers/usb/gadget/dwc2_udc_otg.c` driver.
Signed-off-by: João Loureiro <joaofl@gmail.com>
Currently the config options CONFIG_SYS_DFU_DATA_BUF_SIZE and
CONFIG_SYS_DFU_MAX_FILE_SIZE are being set in include/configs/<board>.h
files and also in <board_name>_defconfig files without a Kconfig option. It
is easier for users to set these configs in defconfig files than in config
header files as they are a part of the source code.
Add Kconfig symbols, and update the defconfigs by using tools/moveconfig.py
script.
Suggested-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
TFTP transfer size can be used to re-size the TFTP progress bar on
single line based on the server reported file size. The support for
this has been around from 2019, but it was never converted to proper
Kconfig.
While adding this new Kconfig, enable it by default for OMAP2+ and K3
devices also.
Signed-off-by: Tero Kristo <kristo@kernel.org>
If we want to address partition 15 of virtio block device 11, we have to
write:
virtio b:f
When calling sprintf() we must use %x for the device and partition numbers.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add the missing dependency for the command ums:
- CONFIG_BLK: call of blk_* functions in usb_mass_storage.c
- CONFIG_USB_GADGET: required to select CONFIG_USB_FUNCTION_MASS_STORAGE
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reorder alphabetically the command in the index of usage
in U-Boot documentation.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
To quote Simon, first for the display changes:
At present we have two ways of showing a hex dump. Once has been in
U-Boot since the dawn of time and the other was recently added from
Linux.
They both have their own unique features.
This series makes a few changes to bring them closer together. It also
adds support for logging a buffer, which is useful since it can put it
through the same log drivers as other logging output.
Also it adds tests, so we can check the behaviour.
And then the logging changes:
At present when logging is not enabled, all log() calls become nops.
This does not seem right, since if the log level is high enough then
there should be some sort of message. So in that case, this series
updates it to print the message if the log level is above LOGL_INFO.
This mimics the behaviour for the log_...() macros like log_debug() and
log_info(), so we can drop the special case for these.
Also the current implementation does not support multiple log calls on
the same line nicely. The tags are repeated so the line is very hard to
read. This series adds that as a new feature.
Kernel device tree got updated to use clock name as "ref" instead of
"usb2_refclk". Fix cdns3-ti.c to use the correct name.
Fixes: 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
At present if logging not enabled, log_info() becomes a nop. But we want
log output at the 'info' level to be akin to printf(). Update the macro to
pass the output straight to printf() in this case.
This mimics the behaviour for the log_...() macros like log_debug() and
log_info(), so we can drop the special case for these.
Add new tests to cover this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
The pr_cont_test.c test requires CONFIG_LOG since it directly accesses
fields in global_data that require it. Move the test into the CONFIG_LOG
condition to avoid build errors.
Enable CONFIG_LOG on sandbox (not sandbox_spl, etc.) so that we still run
this test. This requires resyncing of the configs.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present print_buffer() outputs a hex dump but it is not possible to
place this dump in a string. Refactor it into a top-level function which
does the printing and a utility function that dumps a line into a string.
This makes the code more generally useful.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present print_hex_dump() only supports either 16- or 32-byte lines.
With U-Boot we want to support any line length up to a maximum of 64.
Update the function to support this, with 0 defaulting to 16, as with
print_buffer().
Signed-off-by: Simon Glass <sjg@chromium.org>
The current implementation outputs an address as a pointer. Update the
code to use an address instead, respecting the 32/64 nature of the CPU.
Add some initial tests copied from print_test_display_buffer(), just the
ones that can pass with the current implementation.
Note that for this case print_hex_dump() and print_bufffer() produce the
same result. For now the tests are duplicated sine we have separate
functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the comments to the header file so people can find the function info
without digging in the implementation. Fix up the code style and add an
enum for the first arg.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present with print_buffer() U-Boot shows four spaces between the hex
and ASCII data. Two seems enough and matches print_hex_dump(). Change it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a test for this function, to cover the various features. Expand the
expect_str length to take acount of the ~300-bytes lines generated in one
case.
Signed-off-by: Simon Glass <sjg@chromium.org>
This test predates the test framework in U-Boot. It uses #define DEBUG and
assert() to check the result. Update it to use the framework so it can
report failure constitent with other tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a line of more than 256 bytes is generated, the test will fail but the
reason is not clear. Add a check for this condition and print a helpful
message.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the console output buffer is exhausted, characters are silently dropped
from the end. Detect this condition and report an error when reading back
the characters.
Signed-off-by: Simon Glass <sjg@chromium.org>
To quote the series author, Patrick Delaunay:
On STM32MP15x platform we can use OP-TEE, loaded in DDR in a region
protected by a firewall. This region is reserved in the device with
the "no-map" property as defined in the binding file
doc/device-tree-bindings/reserved-memory/reserved-memory.txt.
Sometime the platform boot failed in U-Boot on a Cortex A7 access to
this region (depending of the binary and the issue can change with compiler
version or with code alignment), then the firewall raise an error,
for example:
E/TC:0 tzc_it_handler:19 TZC permission failure
E/TC:0 dump_fail_filter:420 Permission violation on filter 0
E/TC:0 dump_fail_filter:425 Violation @0xde5c6bf0, non-secure privileged read,
AXI ID 5c0
E/TC:0 Panic
After investigation, the forbidden access is a speculative request performed
by the Cortex A7 because all the DDR is mapped as MEMORY with CACHEABLE
property.
The issue is solved only when the region reserved by OP-TEE is no more
mapped in U-Boot as it is already done in Linux kernel.
Tested on DK2 board with OP-TEE 3.12 / TF-A 2.4:
With hard-coded address for OP-TEE reserved memory,
the error doesn't occur.
void dram_bank_mmu_setup(int bank)
{
....
for (i = start >> MMU_SECTION_SHIFT;
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
i++) {
option = DCACHE_DEFAULT_OPTION;
if (i >= 0xde0)
option = INVALID_ENTRY;
set_section_dcache(i, option);
}
}
Just by modifying the test on 0xde0 to 0xdf0, the OP-TEE memory protected
by firewall is mapped cacheable and the error occurs.
I think that it can be a general issue for ARM architecture: the "no-map" tag
of reserved memory in device should be respected by U-Boot if firewall
is configured before U-Boot execution.
But I don't propose a generic solution in
arm/lib/cache-cp15.c:dram_bank_mmu_setup()
because the device tree parsing done in lmb_init_and_reserve() takes a
long time when it is executed without data cache.
Synchronize R-Car Gen2/Gen3 pinctrl tables with Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") . This is a rather large
commit, since the macros in sh-pfc.h also got updated, so
all the PFC tables must be updated in lockstep.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
No more map the reserved region with "no-map" property by marking
the corresponding TLB entries with invalid entry (=0) to avoid
speculative access.
The device tree parsing done in lmb_init_and_reserve() takes a
long time when it is executed without data cache, so it is called in
enable_caches() before to disable it.
This patch fixes an issue where predictive read access on secure DDR
OP-TEE reserved area are caught by firewall.
Series-cc: marex
Series-cc: pch
Series-cc: marek.bykowski@gmail.com
Series-cc: Ard Biesheuvel <ardb@kernel.org>
Series-cc: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add 8M for the U-Boot reserved memory (display, fdt, gd, ...)
mapped cacheable before relocation.
Without this patch the device tree, located before the MALLOC area
is not tagged cacheable just after relocation, before mmu reconfiguration.
This patch reduces the duration for device tree parsing in
lmb_init_and_reserve.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Save the 'no-map' information present in 'reserved-memory' node to allow
correct handling when the MMU is configured in board to avoid
speculative access.
This binding is defined in
doc/device-tree-bindings/reserved-memory/reserved-memory.txt
Additional properties:
...
no-map (optional) - empty property
- Indicates the operating system must not create a virtual mapping
of the region as part of its standard mapping of system memory,
nor permit speculative access to it under any circumstances other
than under the control of the device driver using the region.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add a new function lmb_is_reserved_flags to check if
an address is reserved with a specific flags.
This function can be used to check if an address was
reserved with no-map flags with:
lmb_is_reserved_flags(lmb, addr, LMB_NOMAP);
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add "flags" in lmb_property to save the "no-map" property of
reserved region and a new function lmb_reserve_flags() to check
this flag.
The default allocation use flags = LMB_NONE.
The adjacent reserved memory region are merged only when they have
the same flags value.
This patch is partially based on flags support done in Linux kernel
mm/memblock .c (previously lmb.c); it is why LMB_NOMAP = 0x4, it is
aligned with MEMBLOCK_NOMAP value.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable NAND on mmc defconfig for greater flexibility and for consistency
reasons. All our other boards that have a NAND flash integrated, enable
NAND regardless of the type of the defconfig.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Not correcting anything in case of empty ECC data area
is not an appropriate strategy, because an uncorrected bit-flip
in an empty sector may cause upper layers (namely UBI) fail to work
properly. Therefore the approach chosen in Linux kernel and other
u-boot mtd drivers has been adopted, where a heuristic implemented
by nand_check_erased_ecc_chunk() is used in order to detect and
correct empty sectors.
Tested with sama5d3_xplained and sam9x60-ek.
Signed-off-by: Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de>
Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
[ta: reorder if conditions, change commit subject, s/uint8_t/u8.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add a test of dev_read_resource with translation or without translation
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Removed call of ofnode_translate_address() after ofnode_read_resource
in luton_switch.c:luton_probe(); it is unnecessary since
the commit feb7ac457c ("dm: core: Add address translation in
fdt_get_resource").
Fixes: feb7ac457c ("dm: core: Add address translation in fdt_get_resource")
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
With commit 41575d8e4c ("dm: treewide: Rename auto_alloc_size members
to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This
driver was sent to the mailing list before that change, merged after it,
and still has the old form. Apply the rename here as well.
Fixes: 1b9ee2882e ("pwm: Add a driver for Chrome OS EC PWM")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
os_find_text_base() assumes that first line of /proc/self/maps holds
information about the text. Hence we must call the function before calling
os_malloc() which calls mmap(0x10000000,).
Failure to do so has led to incorrect values for pc_reloc when an
exception was reported
=> exception undefined
Illegal instruction
pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c
as well as incorrect output of the bdinfo command
=> bdinfo
relocaddr = 0x0000000007858000
reloc off = 0x0000000010000000
Fixes: b308d9fd18 ("sandbox: Avoid using malloc() for system state")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
In of_get_address(), there is:
dev_count_cells(dev, &na, &ns);
followed by:
bus->count_cells(dev, &na, &ns);
but no codes in between use na/ns, hence the first call is useless.
By dropping the first call, dev_count_cells() is now useless too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
'dma-ranges' frequently exists without parent nodes having 'dma-ranges'.
While this is an error for 'ranges', this is fine because DMA capable
devices always have a translatable DMA address. Also, with no
'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with
no restrictions unless perhaps the device itself has implicit
restrictions.
This keeps in sync with Linux kernel commit:
81db12ee15cb: of/address: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These boards were not converted to DM_VIDEO before deadline,
so disable video support for now.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Fabio Estevam <festevam@gmail.com>
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
The board was not converted to DM_VIDEO before deadline, so disable
video support for now.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Make it possible to invoke rescue boot from U-Boot console, without
having to press the factory reset button. This is needed when accessing
the device remotely, for example.
Achieve this by putting rescue command into `bootcmd_rescue` default
environment variable and setting some distroboot environment variables
to their default values when the factory button is pressed.
Rescue boot from console can be invoked by running
run bootcmd_rescue
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Update rescue mode boot command on Turris Omnia. We are compressing the
image with lzma now.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The `ranges` DT property of the PCIe node is currently ignored by
Aardvark driver - all entries are used as transparent PCIe MEM, despite
some of them being defined for IO in DT.
This is because the driver does not setup PCIe outbound windows and thus
a default configuration is used.
This can cause an external abort on CPU when a device driver tries to
access non-MEM space.
Setup the PCIe windows according to the `ranges` property for all
non-MEM resources (currently only IO) and also non-transparent MEM
resources.
Because Linux expects that bootloader does not setup Aardvark PCIe
windows, disable them before booting Linux.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
For some configurations with more PCIe cards and PCIe bridges, 16 MiB of
PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB
CPU window for PCIe, and since IO port space is only 64 KiB in total,
use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for
PCIe MEM.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Current version of this function uses a lot of incorrect assumptions about
the `ranges` DT property:
* parent(#address-cells) == 2
* #size-cells == 2
* number of entries == 2
* address size of first entry == 0x1000000
* second child address entry == base + 0x1000000
Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap
with PCIe IO space, and trying to define additional MEM space (as a third
entry in the `ranges` DT property) causes U-Boot to crash when booting the
kernel.
## Flattened Device Tree blob at 04f00000
Booting using the fdt blob at 0x4f00000
Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK
ERROR: board-specific fdt fixup failed: <unknown error>
- must RESET the board to recover.
Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses
in the `ranges` property according to
https://elinux.org/Device_Tree_Usage#PCI_Address_Translation
Now it is possible to increase PCIe MEM space from 16 MiB to maximal value
of 127 MiB.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Fixes: cb2ddb291e ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions")
Reviewed-by: Stefan Roese <sr@denx.de>
Find PCIe DT node by compatible string instead of retrieving it by using
hardcoded DT path.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie'
to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible
with Linux' DT node.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Disable Root Bridge I/O space, memory space and bus mastering in Aardvark's
remove method, which is called before booting Linux kernel.
This ensures that PCIe device which was initialized and used by U-Boot
cannot do new DMA transfers until Linux initializes PCI subsystem and loads
appropriate drivers for the device.
During initialization of PCI subsystem Linux in fact disables this bus
mastering on Root Bridge (and later enables it when driver is loaded and
configured), but there is a possibility of a small window after U-Boot
boots Linux when bus mastering is enabled, which is not correct.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
During our debugging of the Aardvark driver in Linux we have discovered
that the PCIE_CORE_LINK_CTRL_STAT_REG register in fact controls standard
PCIe Link Control Register for PCIe Root Bridge. This led us to discover
that the name of the PCIE_CORE_LINK_TRAINING macro and the corresponding
comment by this macro's usage is misleading; this bit in fact controls
Retrain Link, which, according to PCIe base spec is defined as:
A write of 1b to this bit initiates Link retraining by directing the
Physical Layer LTSSM to the Recovery state. If the LTSSM is already in
Recovery or Configuration, re-entering Recovery is permitted but not
required.
Entering Recovery state is normally done from LTSSM L0, L0s and L1 states.
But since the pci-aardvark.c driver enables Link Training just a few lines
above, the controller is not in L0 ready state yet. So setting aardvark bit
PCIE_CORE_LINK_TRAINING does not actually enter Recovery state at this
place.
Moreover, trying to enter LTSSM Recovery state without other configuration
is causing issues for some cards (e.g. Atheros AR9xxx and QCA9xxx). Since
Recovery state is not entered, these issues are not triggered.
Remove code which tries to enter LTSSM Recovery state completely.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add default bootarguments with booting from mmc0 for this configuration.
This will allow a default Linux boot for this board.
Suggested-by: Jarvis Chen <jarvis.chen@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
If a chunk was larger than 4GiB, then chunk_data_sz would overflow and
blkcnt would not be calculated correctly. Upgrade it to a u64 and cast
its multiplicands as well. Also fix bytes_written while we're at it.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This contains the fix to bring back the SD card as MMC0. In the long run
we are looking into a more robust solution, but for now we need to fix
this, as this breaks the user experience left, right, and centre.
Also add the one MAINTAINERS path addition from Samuel.
Fix compilation error when Werror is turned on. The warning could
possible break some CI builds.
Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add dts support for fu740. The HiFive Unmatched support is based on
fu740 cpu and drivers in following patch set.
Signed-off-by: Green Wan <green.wan@sifive.com>
[greentime.hu: set fu740 speed to 1.2GHz]
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Add pcie driver for SiFive fu740, the driver depends on
fu740 gpio, clk and reset driver to do init. Force running at Gen1
for better capatible enumeration.
Several devices are tested:
a) M.2 NVMe SSD
b) USB-to-PCI adapter
c) Ethernet adapter (E1000 compatible)
Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
These drivers are sunxi platform-specific, and so are of interest to the
sunxi maintainers.
In fact, as there is no PHY driver maintainer, drivers/phy/allwinner had
no maintainer at all.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Commit 2243d19e56 ("mmc: mmc-uclass: Use dev_seq() to read aliases
node's index") now actually enforces U-Boot's device enumeration policy,
where explicitly named devices come first, then any other non-named
devices follow, without filling gaps.
For quite a while we have had an "mmc1 = &mmc2;" alias in our
sunxi-u-boot.dtsi, which now leads to the problem that the SD card
(which was always mmc device 0) now gets to be number 2.
This breaks quite some boot scripts, including our own distro boot
commands, and some other features looking at $mmc_bootdev, also
fastboot.
Just add an explicit mmc0 alias in the very same file to fix this and
restore the old behaviour.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Samuel Holland <samuel@sholland.org>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
"TCG PC Client Platform Firmware Profile Specification"
requires to measure every attempt to load and execute
a OS Loader(a UEFI application) into PCR[4].
This commit adds the PE/COFF image measurement, extends PCR,
and appends measurement into Event Log.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Replace CONFIG_HASH_CALCULATE by CONFIG_HASH
Fix conversions between pointers and u64.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The hash_calculate() symbol is provided by hash-checksum.c. It depends
on hash_progressive_lookup_algo(), provided when CONFIG_HASH=y.
The issue is that hash_calculate() is used by the efi_loader,
irregardless of CONFIG_FIT_SIGNATURE. As pointed out in
commit 87316da05f ("lib: introduce HASH_CALCULATE option"),
enabling hash_calculate() based on CONFIG_FIT_SIGNATURE is incorrect.
To resolve this, use CONFIG_HASH as the compile switch for
hash-checksum.c. This ensures that all dependencies are compiled, and
is the most natural Kconfig to use.
There is the issue of having to 'select HASH' in a couple of places
that already 'select SHA256'. This is a deeper problem with how hashes
are organized, and fixing it is beyonf the scope of this change.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Masahisa Kojima <masahisa.kojima@linaro.org>
When we think of Kconfig, we usually think of features that we like
to enable or not. Ideally, we wouldn't use Kconfig to fix a build
issue, although sometimes it might make sense. With Kconfig it's hard
to guarantee that the fix is universal. We can only say that it works
for the set of tested configurations. In the majority of cases, it's
preferable to let the linker figure things out for us.
The reverted commit attempted to fix a build issue by adding an
invisible Kconfig option. This is wrong in several ways:
It invents a new Kconfig variable when CONFIG_HASH already
exists for the same purpose.
Second, hash-checksum.c makes use of the hash_progressive_lookup_algo()
symbol, which is only provided with CONFIG_HASH, but this dependency
was not expressed in the reverted patch.
It feels like Kconfig is turning into a listing of all available
source files, and a buffet to 'select' which ones to compile. The
purpose of this revert is to enable the next change to make use of
CONFIG_HASH instead of adding to Kconfig.
This reverts commit 87316da05f.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Coverity reported 3 warnings on the current code.
CID 331856, 331855, 331854 on the latest scan.
Fix the rest of the warnings by initializing the variables before
passing them to tpm2_get_pcr_info().
In order to avoid future warnings and errors initialize them to 0 within
the function as well, since the values are always OR'ed after querying the
hardware.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Enable the true random number generator. It can be used, for example, to
generate partition UUIDs when partitioning with the gpt command. The
generator is already enabled in the device trees of several other
STM32MP1‐based boards, like DKx or DHCOM.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The CMD_UNZIP provides the 'gzwrite' command, which is convenient
for writing e.g. gz-compressed images to eMMC from U-Boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Currently the code sets eth1addr only if /ethernet1 alias exists in DT,
the node pointed to by the alias has "micrel,ks8851-mll" compatible
string, and the KSZ8851 CCR register read indicates programmed EEPROM
is not connected.
This is not sufficient to detect cases where the DT still contains the
KSZ8851 nodes, but the chip itself is not present. Extend the detection
to handle these cases.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
BITS_PER_LONG is used to represent register's size which is 32.
But when compiled on arch64, BITS_PER_LONG is then equal to 64.
Fix bank and offset computation to make it work on arch32 and
arch64 and ensure that register's size is always equal to 32.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fix the result of DFU_OP_WRITE operation in mtd_block_op function
when mtd_lock is not supported (-EOPNOTSUPP) to avoid DFU stack
error on the DFU manifestation of the MTD device, when
dfu_flush_medium_mtd is called.
Without this patch, dfu-util failed on dfuERROR state at the end
of the write operation on the alternate even if MTD write
opeartion is correctly performed.
$> dfu-util -a 3 -D test.bin
....
DFU mode device DFU version 0110
Device returned transfer size 4096
Copying data from PC to DFU device
....
Download [=========================] 100% 225469 bytes
Download done.
state(10) = dfuERROR, status(14) = Something went wrong,
but the device does not know what it was Done!
Fixes: 65f3fc18fc ("dfu_mtd: Add provision to unlock mtd device")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.
Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 SK.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.
Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 EVM.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The ti_sci_msg_req_reboot message payload has been extended to include a
domain field, but for the purposes of u-boot this should be zero to
reset the entire SoC as it did before. Include domain for completeness
and set to zero to ensure proper operation.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The default U-Boot environment variables and design are all set up for
both the MAIN R5FSS clusters to be in Split-mode. This is the setting
in v2021.01 U-Boot and the dt nodes are synched with the kernel binding
property names in commit 468ec2f3ef ("remoteproc: k3_r5: Sync to
upstreamed kernel DT property names") merged in v2021.04-rc2.
The modes for both the clusters got switched back to LockStep mode by
mistake in commit 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6
dts into U-Boot") also in v2021.04-rc2. This throws the following warning
messages when early-booting the cores using default env variables,
k3_r5f_rproc r5f at 5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode
Load Remote Processor 3 with data at addr=0x82000000 98484 bytes: Failed!
k3_r5f_rproc r5f at 5f00000: Invalid op: Trying to start secondary core 9 in lockstep mode
Load Remote Processor 5 with data at addr=0x82000000 98484 bytes: Failed!
Fix this by switching back both the clusters to the expected Split-mode.
Make this mode change in the u-boot specific dtsi file to avoid such
sync overrides in the future until the kernel dts is also switched to
Split-mode by default.
Fixes: 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM64x GP and SK EVM have DP83867 PHY connected to CPSW external port0.
Enable the driver in order to use ethernet at U-Boot prompt.
CONFIG_PHY_TI is selected by CONFIG_PHY_TI_DP83867 and thus can be dropped.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
ut_asserteq_strn is defined twice. Remove one definition.
Fixes: 33d7edfd5f ("test: Add a way to check part of a console line or skip it")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Commit 712cc962b7 ("GitLab: Remove "tags" stanzas") removed the 'all'
tag from all the jobs. The sandbox_noinst_test.py test was added in
between the author date and commit date (commit 6c914e4232
("azure/gitlab: Add tests for sandbox_noinst")) which is probably why it
still contains the tags. This commit fixes that so all jobs now don't
require tags on the GitLab runners.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Commit 1ba21bb06b ("test: Don't unmount not (yet) mounted system")
fixes an issue in the filesystem tests where the test setup may fail
to mount an image and still attempt to unmount it. However, the commit
unintentionally breaks the test setups in two ways.
The newly created unmounted filesystem images are being immediately
deleted due to some cleanup steps being misplaced into finally blocks,
which makes them always run instead of only on failures. The mount calls
always fail since the images never exist, causing the tests to be always
skipped. This patch moves these cleanup calls into the except blocks to
fix this and makes the tests run again.
There are also unmount calls misplaced into finally blocks, making them
run after the tests instead of before the tests. These unmount calls
make the filesystem image file consistent with the changes made to it as
part of the test setup, and this misplacement is making a number of
tests fail unexpectedly.
The unmount calls must be run before the tests use the image, meaning
before the yield call and not in the finally block. They must also be
run as a cleanup step when the filesystem setup fails, so they can't be
placed as the final call in the try blocks since they would be skipped
on such failures. For these reasons, this patch places the unmount calls
both in the except blocks and the else blocks of the final setup step.
This makes the unexpectedly failing tests to succeed again.
Furthermore, this isolates the mount calls to their own try-except
statement to avoid reintroducing the original issue of unmounting a
not-mounted image while fixing the unmount misplacement.
After these fixes, running "make tests" with guestmount available results
in two test failures not related to the mentioned commit. If the
guestmount executables are unavailable, the mounts fallback to using
sudo and result in no failures.
Fixes: 1ba21bb06b ("test: Don't unmount not (yet) mounted system")
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
A lot of entries were using spaces instead of tab for alignment that's why
it is good to fix it to use the same style everywhere.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The superblock buffer must be cache aligned, since it might be used
in DMA context, allocate it using ALLOC_CACHE_ALIGN_BUFFER() just
like it was done in btrfs_read_superblock() and read_tree_node().
This fixes this output on boot and non-working btrfs on iMX53:
CACHE: Misaligned operation at range [ced299d0, ced2a9d0]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
When reading directories the UEFI sub-system must supply file attributes
and timestamps. These fields will have to be added to struct fs_dirent.
SquashFS should not fill these fields with random data. Ensure that they
are zeroed out.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
The assembly output of the arch_initr_trap() function differed by a
single byte after common.h was removed from traps.c:
fff49a18 <arch_initr_trap>:
fff49a18: 94 21 ff f0 stwu r1,-16(r1)
fff49a1c: 7c 08 02 a6 mflr r0
fff49a20: 90 01 00 14 stw r0,20(r1)
-fff49a24: 80 62 00 44 lwz r3,68(r2)
+fff49a24: 80 62 00 38 lwz r3,56(r2)
fff49a28: 4b ff 76 19 bl fff41040 <trap_init>
fff49a2c: 80 01 00 14 lwz r0,20(r1)
fff49a30: 38 60 00 00 li r3,0
fff49a34: 38 21 00 10 addi r1,r1,16
fff49a38: 7c 08 03 a6 mtlr r0
This was causing a consistent hard lockup during the MMC read / loading
of the QoriQ FMan firmware on a P2041RDB board.
Re-adding the header causes identical assembly to be emitted and allows
the firmware loading and subsequent boot to succeed.
Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
Some callers (e.g. cmd/fs.c) of fs_set_blk_dev may use a NULL dev_part_str.
While blk_get_device_part_str handles this fine,
part_get_info_by_dev_and_name does not. This fixes commands crashing when
implicitly using bootdevice.
The unit test has also been updated to set bootdevice to a known value and
to restore it after we are done.
Fixes: 7194527b6a ("cmd: fs: Use part_get_info_by_dev_and_name_or_num to parse partitions")
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If reg property of pinctrl-single node requires address translation then
probe fails with following message:
single-pinctrl pinctrl@4301c000: failed to get base register size
This is because driver uses dev_read_addr_size() to get size which also
tries to fetch untranslated addr and fails.
Fix this by using dev_read_addr_size_index() which takes care of address
translation and also makes following dev_read_addr() call redundant.
This fixes Ethernet failures on TI's AM654 based EVMs due to lack of
pinmux configuration.
Fixes: 9fd8a430f3 ("pinctrl: single: get register area size by device API")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Remove qemu_mips boards because DM migration doesn't make sense.
The board support for qemu_mips is already marked as deprecated
in Qemu in favour of the Malta board. Also qemu_mips support
has been removed from Linux a long time ago.
The official replacement is the Malta board. The same Malta U-Boot
image can be used with Qemu and on physical hardware.
All combinations of Big Endian and Little Endian as well as 32 bit
and 64 bit are supported.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Compiling with -Wextra produces a number of (harmless) warnings for the EFI
TCG2 protocol. Let's fix those in case we ever enable the flag on the EFI
subsystem
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use efi_get_variable_int() instead of EFI_CALL(RT->get_variable()).
Use efi_set_variable_int() instead of EFI_CALL(efi_set_variable()).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Simplify the creation of indexed variable names like 'Boot0000' by using
function efi_create_indexed_name().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
To print a UTF-16 string use %ls instead of converting string to UTF-8.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
To print a UTF-16 string use %ls instead of converting string to UTF-8.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Before this patch efi_dp_from_name() only accommodated a maximum file path
length of 31 characters. This leads to boot failures due to file name
truncation.
Allow arbitrary path lengths.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This is preparation for PE/COFF measurement support.
PE/COFF image hash calculation is same in both
UEFI Secure Boot image verification and measurement in
measured boot. PE/COFF image parsing functions are
gathered into efi_image_loader.c, and exposed even if
UEFI Secure Boot is not enabled.
This commit also adds the EFI_SIGNATURE_SUPPORT option
to decide if efi_signature.c shall be compiled.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Configuring a system with CONFIG_EFI_CAPSULE_AUTHENTICATE=y but without a
method to retrieve the public key data is a misconfiguration. We should get
a build failure for it. Therefore remove the weak efi_get_public_key_data()
implementation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Add LTO (link time optimization) support to the build system and
enable it on a few boards. This is an alternative to using
-ffunction-sections/-fdata-sections and --gc-sections at link time to
remove unused code. This can result in notable savings, but needs
testing on each platform before use as it can expose problems by
optimizing away various functionally necessary calls.
With better compiler optimizations available, a compiler may see we do
nothing with our buffer after calling memset and omit the call, thus
causing us to not smash the stack. Add a comment to explain why we now
also have a printf call, so that the test will pass as the memset will
not be omitted.
Reported-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Tom Rini <trini@konsulko.com>
When using LTO, we can throw away the --gc-sections flag, but only if
using private libgcc.
When using system's libgcc, --gc-sections is still needed, otherwise
linking will fail due to undefined references to libc's symbols.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building with LTO, using -ffunction-sections/-fdata-sections is not
useful anymore.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building highbank_defconfig with LTO, the compiler complains about
type mismatch of function ahci_link_up().
The third parameter of this function is of type u8 in
drivers/ata/ahci.c, but of type int in board/highbank/ahci.c.
There is no reason in using u8, and the code using this function
actually passes an int variable into the function (so it is implicitly
converted to u8).
Change the type of this parameter to int in drivers/ata/ahci.c.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For some reason when building SPL for ARMv8 with LTO, the relocation
information is not discarded.
Discard it explicitly in the linker script.
This fixes LTO build for imx8mm_venice_defconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford says that DM3730 needs board.c compiled without LTO flags.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Adam Ford <aford173@gmail.com>
When building with LTO, the compiler complains about type mismatch of
function usb_gadget_handle_interrupts(). This function is defined
without parameters in files
arch/arm/mach-rockchip/board.c
board/samsung/common/exynos5-dt.c
but it should have one parameter, int index.
Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When seaboard_defconfig is compiled with LTO, the compiler complains
about some instructions not being supported in ARM mode.
This is caused by arch/arm/mach-tegra/tegra20/warmboot_avp.c having
different CFLAGS declared in Makefile. This file needs to be compiled
without LTO.
Fix this by removing -flto for this file.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building imx8mp_evk_defconfig with LTO, the compiler complains
about type mismatch of function imx_eqos_txclk_set_rate() in file
drivers/net/dwc_eth_qos.c:845:12
which contains a weak definition of this function, vs file
arch/arm/mach-imx/imx8m/clock_imx8mm.c
which contains an implementation.
Change the type of this function in the implementation to fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When building with LTO, the compiler complains about type mismatch of
function clk_bsc_enable() in file:
arch/arm/cpu/armv7/kona-common/clk-stubs.c
vs other files that define or use this function:
warning: type of ‘clk_bsc_enable’ does not match original declaration.
Change the type of this function to that of the other usages.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When building keystone with LTO the compiler complains:
Error: selected processor does not support `smc #0' in Thumb mode
Fix this by removing -flto for the file implementing these SMC calls.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
When apf27_defconfig is built with LTO, linking complains about
undefined reference to `nand_boot`. This is because it is referenced
from inline assembly. Make it visible.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
When imx28_xea_defconfig is built with LTO, the compiler complains about
the two different declarations of _start:
include/asm-generic/sections.h as extern void _start(void);
arch/arm/cpu/arm926ejs/mxs/mxs.c as extern uint32_t _start;
Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fix LTO build for some thumb-interwork usecases (such as for
da850evm_defconfig), where inline assmebly such as
mrc p15,0,r2,c1,c0,0
causes the compiler to fail during LTO linking with
Error: selected processor does not support `mrc p15,0,r2,c1,c0,0'
in Thumb mode
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
On ARM, the gd pointer is stored in registers r9 / x18. For this the
-ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global
register variables causes errors when building with LTO, and these
errors are very difficult to overcome.
Richard Biener says [1]:
Note that global register vars shouldn't be used with LTO and if they
are restricted to just a few compilation units the recommended fix is
to build those CUs without -flto.
We cannot do this for U-Boot since all CUs use -ffixed-reg flag.
It seems that with LTO we could in fact store the gd pointer differently
and gain performance or size benefit by allowing the compiler to use
r9 / x18. But this would need more work.
So for now, when building with LTO, go the clang way, and instead of
declaring gd a global register variable, we make it a function call via
macro.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Thumb instruction `ldr` is able to move high registers only from
armv7. For armv5 and armv6 we have to use `mov`.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
In style of linked lists, instead of declaring symbols for boundaries
of getopt options array in the linker script, declare corresponding
sections and retrieve the boundaries via static inline functions.
Without this clang's LTO produces binary without any getopt options,
because for some reason it thinks that array is empty (start and end
symbols are at the same address).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building with LTO, the system libc's `errno` variable used in
arch/sandbox/cpu/os.c conflicts with U-Boot's `errno` (defined in
lib/errno.c) with the following error:
.../ld: errno@@GLIBC_PRIVATE: TLS definition in /lib64/libc.so.6
section .tbss mismatches non-TLS reference in
/tmp/u-boot.EQlEXz.ltrans0.ltrans.o
To avoid this conflict use different asm label for this variable when
CONFIG_SANDBOX is enabled.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some toolchains are compiled so that they pass a --build-id=something
parameter to the linker implicitly.
This causes U-Boot LTO linking to fail with something like:
ld: section .note.gnu.build-id LMA ... overlaps section .text LMA ...
because U-Boot's link scripts do not currently handle .note.gnu.build-id
section.
Fix this by explicitly disabling build-id.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add plumbing for building U-Boot with Link Time Optimizations.
When building with LTO, $(PLATFORM_LIBS) has to be in --whole-archive /
--no-whole-archive group, otherwise some functions declared in assembly
may not be resolved and linking may fail.
Note: clang may throw away linker list symbols it thinks are unused when
compiling with LTO. To force these symbols to be included, we refer to
them via the __ADDRESSABLE macro in a C file generated from compiled
built-in.o files before linking.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently we use incremental linking (ld -r) to link several object
files from one directory into one built-in.o object file containing the
linked code from that directory (and its subdirectories).
Linux has, some time ago, moved to thin archives instead.
Thin archives are archives (.a) that do not really contain the object
files, only references to them.
Using thin archives instead of incremental linking
- saves disk space
- apparently works better with dead code elimination
- makes things easier for LTO
The third point is the important one for us. With incremental linking
there are several options how to do LTO, and that would unnecessarily
complicate things.
We have to use the --whole-archive/--no-whole-archive linking option
instead of --start-group/--end-group, otherwise linking may fail because
of unresolved symbols, or the resulting binary will be unusable.
We also need to use the P flag for ar, otherwise final linking may fail.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Indent the linking commands so that they look cosmetically better.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When compiling with LTO, the compiler fails with an error saying that
`crc_table` causes a section type conflict with `efi_var_buf`.
This is because both are declared to be in the same section (via macro
`__efi_runtime_data`), but one is const while the other is not.
Put this variable into the section .rodata.efi_runtime, instead of
.data.efi_runtime, via macro __efi_runtime_rodata.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heinrich Schuchardt <xypron.gpk@gmx.de>
Add $(CFLAGS_EFI) and remove $(CFLAGS_NON_EFI) for
efi_selftest_miniapp_exception.o.
The removal is needed when compiling with LTO - this object file needs
to be compiled without -flto.
The adding is for consistency with other miniapps.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add macro __efi_runtime_rodata, for const variables with similar purpose
as those using __efi_runtime_data.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Document the macros __efi_runtime and __efi_runtime_data in Sphinx
style.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When linking with LTO, the compiler complains about type mismatch of
variables `__efi_runtime_start`, `__efi_runtime_stop`,
`__efi_runtime_rel_start` and `__efi_runtime_rel_stop`:
include/efi_loader.h:218:21: warning: type of ‘__efi_runtime_start’
does not match original
declaration [-Wlto-type-mismatch]
218 | extern unsigned int __efi_runtime_start, __efi_runtime_stop;
| ^
arch/sandbox/lib/sections.c:7:6: note: ‘__efi_runtime_start’ was
previously declared here
7 | char __efi_runtime_start[0] __attribute__((section(".__efi_run
| ^
Change the type to char[] in include/efi_loader.h.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It seems that sometimes (happening on ARM64, for example with
turris_mox_defconfig) GCC, when linking with LTO, changes the symbol
names of some functions, for example lib/string.c's memcpy() function to
memcpy.isra.0.
This is a problem however when GCC for a code such as this:
struct some_struct *info = get_some_struct();
struct some struct tmpinfo;
tmpinfo = *info;
emits a call to memcpy() by builtin behaviour, to copy *info to tmpinfo.
This then results in the following linking error:
.../lz4.c:93: undefined reference to `memcpy'
.../uuid.c:206: more undefined references to `memcpy' follow
GCC's documentation says this about -nodefaultlibs option:
The compiler may generate calls to "memcmp", "memset", "memcpy" and
"memmove". These entries are usually resolved by entries in libc.
These entry points should be supplied through some other mechanism
when this option is specified.
Make these functions visible by using the __used macro to avoid this
error.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Improve the regular expression that matches unittest symbols in
u-boot.sym.
Currently we do not enforce no prefix in symbol string, but with the
soon to come change in linker lists declaring lists and entries with the
__ADDRESSABLE macro (because of LTO), the symbol file will contain for
every symbol of the form
_u_boot_list_2_ut_X_2_Y
also symbol
__UNIQUE_ID___addressable__u_boot_list_2_ut_X_2_YN,
(where N at the end is some number).
In order to avoid matching these additional symbols, ensure that the
character before "_u_boot_list_2_ut" is not a symbol name character.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit does the same thing as Linux commit 33def8498fdd.
Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.
Remove the quote operator # from compiler_attributes.h __section macro.
Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is how Linux does this now, see Linux commit 339f29d91acf.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is a serious bug in regmap_read() and regmap_write() functions
where an uint pointer is cast to (void *) which is then cast to (u8 *),
(u16 *), (u32 *) or (u64 *), depending on register width of the map.
For example given a regmap with 16-bit register width the code
int val = 0x12340000;
regmap_read(map, 0, &val);
only changes the lower 16 bits of val on little-endian machines.
The upper 16 bits will remain 0x1234.
Nobody noticed this probably because this bug can be triggered with
regmap_write() only on big-endian architectures (which are not used by
many people anymore), and on little endian this bug has consequences
only if register width is 8 or 16 bits and also the memory place to
which regmap_read() should store it's result has non-zero upper bits,
which it seems doesn't happen anywhere in U-Boot normally. CI managed to
trigger this bug in unit test of dm_test_devm_regmap_field when compiled
for sandbox_defconfig using LTO.
Fix this by utilizing an union { u8; u16; u32; u64; } and reading data
into this union / writing data from this union.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
There is no good reason to use a sequence from rand() here. We may as well
invent our own sequence.
This should molify Coverity which does not use rand() being used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 312949)
Clang has -Wself-assign enabled by default under -Wall and so when
building with -Werror we would get an error here. Inspired by Linux
kernel git commit a21151b9d81a ("tools/build: tweak unused value
workaround") make use of the fact that both Clang and GCC support
casting to `void` as the method to note that something is intentionally
unused.
Signed-off-by: Tom Rini <trini@konsulko.com>
Increase the BOOTM_LEN to 32M . This would allow a bigger kernel image to be
booted, for example the multi_v7_defconfig.
Loading Kernel Image
Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
resetting ...
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The V3U SoC has several unlock registers, one per register group. They
reside at offset zero in each 0x200 bytes-sized block.
To avoid adding yet another table to the PFC implementation, this
patch adds the option to specify an address mask instead of the fixed
address in sh_pfc_soc_info::unlock_reg.
This is a direct port of Linux 5.12 commit e127ef2ed0a6
("pinctrl: renesas: Implement unlock register masks") by
Ulrich Hecht <uli+renesas@fpond.eu>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The help text for Gen2 entries had a copy paste error, still containing
the Gen3 string, while the description was correctly listing Gen2. Fix
the help text.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The help text in the Kconfig file was always a copy of the same thing.
Move single copy into the common PFC driver entry instead. Also fix a
copy-paste error in the PFC help text, which identified PFC as clock.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Pass struct udevice to rcar_gpio_set_direction() in preparation of
quirk handling in rcar_gpio_set_direction(). No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Most of the PLLx, MAIN, FIXED clock handlers are calling very similar
code, which determines parent rate and then applies multiplication and
division. The only difference is whether multiplication is fixed factor
or coming from CRx register. Deduplicate the code into a single function.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Base on Linux v5.10-rc2, commit 8b652aa8a1fb by Yoshihiro Shimoda
To support other register layouts in the future, add register pointers
of {control,status,reset,reset_clear}_regs into struct cpg_mssr_info
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
From Linux v5.10-rc2, commit ffbf9cf3f946 by Yoshihiro Shimoda
Introduce enum clk_reg_layout to support multiple register layout variants
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
CPG IP in some specific Renesas SoCs (i.e. new R8A779A0 V3U SoC)
requires a different setting procedure. Make struct cpg_mssr_info
accessible to handle the clock setting in that case.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The MODEMR register offset changed on R8A779A0, make the MODEMR offset
configurable. Fill the offset in on all clock drivers. No functional
change.
Based off "clk: renesas: Make CPG Reset MODEMR offset accessible from
struct cpg_mssr_info" by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This supports RPCD2 clock handling. While at it, add the check point
for RPC-IF clock RPCD2 Frequency Division Ratio, since it must be odd
number
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This patch fixes Realtime Module Stop Control Register (RMSTPCR) offsets
based on R-Car Gen3, H2/M2/M2N/E2/E2X hardware user's manual.
The r8a73a4 only has RMSTPCR0 - RMSTPCR5 so this calculation change
doesn't affect it.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reinstate RPC clock on D3/E3 after Linux 5.12 synchronization.
The D3 and E3 clock drivers do not contain RPC clock entries
mainline Linux yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
With commit 8678776df6 (arm: mvebu: armada-3720-uDPU: fix PHY mode
definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even
when this is functionally incorrect since "2500base-x" was not supported
in U-Boot at that time. As this mode is now supported (at least present
in the headers), this patch moves back to the orinal version.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Cc: Vladimir Vid <vladimir.vid@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Until now the mvpp2 driver used an extra 'phy-speed'
DT property in order to differentiate between the
SGMII and SGMII @2.5GHz. As there is a dedicated
PHY_INTERFACE_MODE_SGMII_2500 flag to mark the latter
start using it and drop the custom flag.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Tested-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Currently, there are 2 valid cases for interface, PHY
and mdio relation:
- If an interface has PHY handler, it'll call
mdio_mii_bus_get_from_phy(), which will register
MDIO bus.
- If we want to use fixed-link for an interface,
PHY handle is not defined in the DTS, and no
MDIO is registered.
There is a third case, for some boards (with switch),
the MDIO is used for switch configuration, but the interface
itself uses fixed link. This patch allows this option by
checking if fixed-link subnode is defined, in this case,
MDIO bus is registers, but the PHY address is set to
PHY_MAX_ADDR for this interface, so this interface will
not try to access the PHY later on.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Because the mvpp2 driver now relies on the PHYLIB and
the external MDIO driver, configuring low level
SMI bus settings is redundant.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
1. Differ between Port1 RGMII and SFI modes in Netcomplex config.
2. Remove XPCS config from SFI mode.
Port1 doesn't XPCS domain, XPCS config should be removed.
Access to Port1 XPCS can cause stall.
3. Add Port1 MPCS configurations.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Xilinx changes for v2021.07-rc3
ZynqMP:
- Syncup DT with Linux kernel
- Fix mmc mini configurations via DT
- Add pinctrl/psgtr description to DTs
- Add DTs for Kria boards
- Enable RTC and Time commands
Versal:
- Fix early BSS section location
It will need larger heap size for u-boot-spl to load u-boot.itb which
be generated from binman than USE_SPL_FIT_GENERATOR.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Now that we have switched to binman to generate u-boot.itb for all
RISC-V boards, USE_SPL_FIT_GENERATOR is no longer needed and can
be dropped.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defconfigs,
so that binman is now used to generate u-boot.itb.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along
with a new dedicated device tree source file for the QEMU virt target
used for binman only, we can now use binman to generate u-boot.itb.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sort the RISC-V DTS build targets by their Kconfig target names in
alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For scenarios like OF_BOARD or OF_PRIOR_STAGE, no device tree blob is
provided in the U-Boot build phase hence the binman node information
is not available. In order to support such use case, a new Kconfig
option BINMAN_STANDALONE_FDT is introduced, to tell the build system
that a device tree blob containing binman node is explicitly required
when using binman to package U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Generally speaking BINMAN_FDT makes sense for OF_SEPARATE or OF_EMBED.
For the other OF_CONTROL methods, it's quite possible binman node is
not available as binman is invoked during the build phase instead of
runtime. Let's only turn it on for OF_SEPARATE or OF_EMBED by default.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present SiFive Unleashed board uses the Makefile to create the FIT,
using USE_SPL_FIT_GENERATOR, which is deprecated as per the Makefile
warning. Update to use binman instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently there are 2 binman test cases using the same 172 number.
It seems that 172_fit_fdt.dts was originally named as 170_, but
commit c0f1ebe9c1 ("binman: Allow selecting default FIT configuration")
changed its name to 172_ for no reason. Let's change it back.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Right now U-Boot is not aware about date/time that's why enable it by
default also with EFI runtime service for setting time.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
U-Boot expects to be linked to a specific hard-coded address and to
be loaded to and run from that address. CONFIG_POSITION_INDEPENDENT
config lifts that restriction & allowing the code to be loaded to
and executed from almost any address.
As we enabled CONFIG_POSITION_INDEPENDENT, CONFIG_INIT_SP_RELATIVE
is enabled by default, where it will set the early stack pointer at
runtime by adding an offset value to &_bss_start. The offset value
is taken from SYS_INIT_SP_BSS_OFFSET.
SYS_INIT_SP_BSS_OFFSET offset should be large enough so that the
early malloc region, global data (gd), and early stack should fit.
With commit d8fabcc424 ("arm64: versal: Increase SYS_MALLOC_F_LEN")
SYS_MALLOC_F_LEN is increased from 32KB to 1MB, so we need to
accommodate this space with SYS_INIT_SP_BSS_OFFSET. Hence increasing
SYS_INIT_SP_BSS_OFFSET to 1.5MB.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch contains several DT files for SOM platform.
Carrier card is sck-kv (KV260) revA/B. SMK-K26 is description for starter
kit which doesn't have EMMC populated. And SM-K26 is full som with EMMC.
Files are divided in this way to make sure that SOM can be plugged to
different carrier card and all peripherals on SOM (or defined by a spec) can
be used by U-Boot. Full DT for SOM+CC can be merged together as overlays.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mainline kernel has psgtr driver that's why it is good to add description
to DT files. Some boards are just missing description for USB3 and sata.
zc1751-dc1 and p-a2197 are also missing clock descriptions for input
clocks.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it
DT files can be extended by pinctrl configurations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Probe zynqmp firmware driver by adding zynqmp firmware, power &
ipi mailbox device tree nodes for mini emmc.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Add missing xlnx,mio-bank property to sdhci node. Also add properties with
0 value to have it listed in case that files are copied to different
projects where default case doesn't need to be handled in the same way.
That's why explicitly list them too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
I2C muxes that have the slave devices with same address are
falling into the below problem.
VCK190 system controller (SC) - zynqmp-e-a2197-00-revA.dts
I2C1 (0xff030000) -> Mux1 (@0x74) -> Channel 3 -> 0x50
I2C1 (0xff030000) -> Mux2 (@0x75) -> Channel 0 -> 0x50
1. SC accesses I2C1 - Mux1 (0x74) - Channel 3 and then
2. SC accesses I2C1 - Mux2 (0x75) - Channel 0.
Now it results in 2 slave devices with same address (0x50)
on the I2C bus, making the communication un-reliable.
When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux
channel output is disconnected, making none of the channels
available to the I2C1. So, there is no question of having the
same addressed slave (0x50) present on the bus when we are doing '2'.
Same pattern is seen in below two boards also.
ZCU208 - zynqmp-zcu208-revA.dts
ZCU216 - zynqmp-zcu216-revA.dts
Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
Add label to GPIO lines so the user-level applications can find any line
without knowing its physical path on System Controller on VCK190/VMK180.
These labels are describing EMIO gpio connection which depends on PL which
we normally don't describe but that's only way to go for now. Lately this
should be done out of this source code.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The 'silabs,skip-recall' property prevents interruption in operation of
the clock while the driver is being probed. Without this property, the
DDR DIMM clk can cause a failure during Versal's boot.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
All si570 which are used for ps reference clock generation should contain
silabs,skip-recall property not to cause break on ps clock.
On Versal boards this will cause hang on Versal cpu when it is booted at
the same time with SC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Pull request for efi-2021-07-rc3
Documentation:
* add a man-page for the size command
* add man-page for extension command to index
Bug fixes:
* avoid build failure due to missing SHA512 hardware acceleration
* correct error handling in TCG2 protocol
* don't let user disable capsule authentication
* correct reading directories via UEFI API
Build error occurs when CONFIG_EFI_SECURE_BOOT or
CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled,
because hash-checksum.c is not compiled.
Since hash_calculate() implemented in hash-checksum.c can be
commonly used aside from FIT image signature verification,
this commit itroduces HASH_CALCULATE option to decide
if hash-checksum.c shall be compiled.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
EFI_TCG2 depends not only on TPMv2 but also on the underlying algorithms.
So select the missing SHA1, SHA256, SHA384 and SHA512 we currently support
Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add 'default y'.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now we are stopping the EFI subsystem if a TPMv2 exists but the
protocol fails to install. Now that we've switched the config to 'default
y' the sandbox TPM fails, since it doesn't support all the required
capabilities of the protocol.
Not installing the protocol is not catastrophic. If the protocol fails
to install the PCRs will never be extended to the expected values, so
some other entity later in the boot flow will eventually figure it out
and take the necessary actions.
While at it fix a corner case were the user can see an invalid error
message when the protocol failed to install. We do have a tcg2_uninit()
which we call when the protocol installation fails. There are cases though
that this might be called before the configuration table is installed (e.g
probing the TPM for capabilities failed). In that case the user will see
"Failed to delete final events config table". So stop printing it since it's
not an actual failure , simply because the config table was never installed
in the first place.
In order to stop printing it make efi_init_event_log() and create_final_event()
cleanup themselves and only call tcg2_uninit() when the protocol installation
fails.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Instead of just failing, clean up the installed config table and
EventLog memory if logging an s-crtm event fails during the protocol
installation
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Eliminate label 'out:' by using return.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_init_event_log() calls tcg2_uninit() in case of failure.
We can skip that since the function is called on efi_tcg2_register()
which also cleans up if an error occurs
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This is same issue as https://bugzilla.redhat.com/show_bug.cgi?id=1733817,
but that fix was wrongly partial reverted.
When reading a directory, EFI_BUFFER_TOO_SMALL should be returned when
the supplied buffer is too small, so a use-case is to call
EFI_FILE_PROTOCOL.Read() with *buffer_size=0 and buffer=NULL to
obtain the needed size before doing the actual read.
So remove the check only for directory reading, file reading already
do the check by itself.
Fixes: db12f518edb0("efi_loader: implement non-blocking file services")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefan Sørensen <stefan.sorensen@spectralink.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current capsule authentication code checks if the environment
variable capsule_authentication_enabled is set, for authenticating the
capsule. This is in addition to the check for the config symbol
CONFIG_EFI_CAPSULE_AUTHENTICATE. Remove the check for the environment
variable. The capsule will now be authenticated if the config symbol
is set.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Commit a479f103dc ("hash: Allow for SHA512 hardware implementations")
defined function definitions for hardware accelerated SHA384 and SHA512.
If CONFIG_SHA_HW_ACCEL=y, these functions are used.
We already have boards using CONFIG_SHA_HW_ACCEL=y but none implements the
new functions hw_sha384() and hw_sha512().
For implementing the EFI TCG2 protocol we need SHA384 and SHA512. The
missing hardware acceleration functions lead to build errors on boards like
peach-pi_defconfig.
Introduce a new Kconfig symbol CONFIG_SHA512_HW_ACCEL to control if the
functions hw_sha384() and hw_sha512() shall be used to implement the SHA384
and SHA512 algorithms.
Fixes: a479f103dc ("hash: Allow for SHA512 hardware implementations")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building 32bit boards with the TCG2 protocol enabled leads to a build
warning due to a missing conversion.
lib/efi_loader/efi_tcg2.c:774:27:
error: cast to pointer from integer of different size
[-Werror=int-to-pointer-cast]
774 | ret = tcg2_create_digest((u8 *)data_to_hash, data_to_hash_len,
| ^
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
'make htmldocs' results in a build warning
checking consistency... doc/usage/extension.rst:
WARNING: document isn't included in any toctree
Add the document to the index.
Fixes: 2f84e9cf06 ("cmd: add support for a new "extension" command")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Versions of U-Boot before 2014.01 created a symlink from include/asm to
the architecture-specific header directory.
If an ARM board is build with that old version, then sandbox is built on
a more recent version (both with in-tree builds), the include/asm symlink
confuses the build system. It picks up the ARM headers when it should be
using the sandbox ones.
Since 2014 U-Boot has only created a symlink inside the include/asm/
directory and only for out-of-tree builds. So for in-tree builds it does
not expect to see an include/asm symlink. It is not removed by
'make mrproper'. It does show up with 'git status' but is easy enough to
miss.
Add include/asm to the files to remove with 'make mkproper'. For recent
U-Boot builds this has no effect, since include/asm is a directory, not a
file. If the include/asm symlink is there, it will be removed.
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
s/psci_features/request_psci_features/g for the case when both
ARCH_SUPPORT_PSCI=y and ARM_PSCI_FW=y, that leads to these
compilation issues:
drivers/firmware/psci.c:69:12: error: conflicting types for 'psci_features'
69 | static int psci_features(u32 psci_func_id)
| ^~~~~~~~~~~~~
In file included from drivers/firmware/psci.c:23:
./arch/arm/include/asm/system.h:548:5: note: previous declaration of 'psci_features' was here
548 | s32 psci_features(u32 function_id, u32 psci_fid);
| ^~~~~~~~~~~~~
Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Fixes: b7135b034f ("psci: add features/reset2 support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Python3 taken from the PATH causes build issues when pylibfdt bindings are
generated with Yocto SDK.
Python3 provided as a part of SDK is not compatible with host Python3,
therefore binding build breaks with following errors:
scripts/dtc/pylibfdt/libfdt_wrap.c:154:11: fatal error: Python.h: No such file or directory
154 | # include <Python.h>
| ^~~~~~~~~~
Do not enforce the python3 from the PATH and make it conditionally-assigned
so it can be overridden from outside of build system. Keep the default
assignment to point to version that is taken from the PATH.
Similar fix has been introduced in b48bfc74ee ("tools: allow to override
python"), where conditional assignment is used for python executable to
address similar build errors.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Simon Glass <sjg@chromium.org>
Fixes: e91610da7c ("kconfig: re-sync with Linux 4.17-rc4")
Reviewed-by: Simon Glass <sjg@chromium.org>
- Add base support for Marvell OcteonTX2 CN9130 DB (mostly done
by Kostya)
- Sync Armada 8k MMU setup with Marvell version (misc Marvell
authors)
- spi: kirkwood: Some fixes especially for baudrate generation
(misc Marvell authors)
- mvebu: x530: Reduce SPL image size (Stefan)
- Rename "rx_training" to "mvebu_comphy_rx_training" (Stefan)
Currently all assembly optimized implementation of memory routines
show up at the top level of the RISC-V architecture Kconfig menu.
Let's group them together into a submenu.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present U-Boot SPL fails to boot on SiFive Unleashed board, due
to a load address misaligned exception happens when loading the FIT
image in spl_load_simple_fit(). The exception happens in memmove()
which is called by fdt_splice_().
Commit 8f0dc4cfd1 introduces an assembly version of memmove but
it does take misalignment into account (it checks if length is a
multiple of machine word size but pointers need also be aligned).
As a result it will generate misaligned load/store for the majority
of cases and causes significant performance regression on hardware
that traps misaligned load/store and emulate them using firmware.
The current behaviour of memcpy is that it checks if both src and
dest pointers are co-aligned (aka congruent modular SZ_REG). If
aligned, it will copy data word-by-word after first aligning
pointers to word boundary. If src and dst are not co-aligned,
however, byte-wise copy will be performed.
This patch was taken from the Linux kernel patch [1], which has not
been applied at the time being. It fixes the memmove and optimises
memcpy for misaligned cases. It will first align destination pointer
to word-boundary regardless whether src and dest are co-aligned or
not. If they indeed are, then wordwise copy is performed. If they
are not co-aligned, then it will load two adjacent words from src
and use shifts to assemble a full machine word. Some additional
assembly level micro-optimisation is also performed to ensure more
instructions can be compressed (e.g. prefer a0 to t6).
With this patch, U-Boot boots again on SiFive Unleashed board.
[1] https://patchwork.kernel.org/project/linux-riscv/patch/20210216225555.4976-1-gary@garyguo.net/
Fixes: 8f0dc4cfd1 ("riscv: assembler versions of memcpy, memmove, memset")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
If /chosen was missing, chosen_offset would never get updated with the new
/chosen node. This would cause fdt_setprop_u32 to fail. This patch fixes
this by setting chosen_offset. In addition, log any errors from setting
boot-hartid as well.
Fixes: 5370478d1c ("riscv: Add boot hartid to device tree")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to
control the enabling of SiFive CLINT support in both SPL (M-mode)
and U-Boot proper (S-mode). So for a typical SPL config that the
SiFive CLINT driver is enabled in both SPL and U-Boot proper, that
means the S-mode U-Boot tries to access the memory-mapped CLINT
registers directly, instead of the normal 'rdtime' instruction.
This was not a problem before, as the hardware does not forbid the
access from S-mode. However this becomes an issue now with OpenSBI
commit 8b569803475e ("lib: utils/sys: Add CLINT memregion in the root domain")
that the SiFive CLINT register space is protected by PMP for M-mode
access only. U-Boot proper does not boot any more with the latest
OpenSBI, that access exceptions are fired forever from U-Boot when
trying to read the timer value via the SiFive CLINT driver in U-Boot.
To solve this, we need to split current SiFive CLINT support between
SPL and U-Boot proper, using 2 separate Kconfig options.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
This fixes two minor format issues of the ax25-ae350 reST file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Even if only USB gadget is defined, dwc3 generic driver enables
a definition and probe/remove functions for host driver.
This enables the definition if USB_HOST is enabled only.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
All newer Allwinner SoCs (since about 2013) miss the CONFIGDATA register
in their MUSB implementation, so they need a quirk to hardcode this.
Currently this quirk depends on listing the SoCs affected in musb_reg.h,
which means that this list needs to grow with every new chip.
Move the quirk feature into Kconfig, next to PIO_ONLY, and change the
default to y (for Allwinner builds), while listing the early
implementations as exceptions.
This fixes USB peripheral operation on some newer SoCs, which were not
explicitly listed before.
Tested on H6, H616, R40 (which were broken before), and also on the H5
and A20, for regressions.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This patch adds the base support for the Marvell Octeon TX2 CN913x DB.
Only one defconfig is added with this patch. Other board variants are
available (NAND, MMC booting) and images for these boards can be
generated by following the documentation added in the included README.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the dtsi/dts files needed to support the Marvell
Octeon TX2 CN913x DB. This is only the base port with not all
interfaces supported fully.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Rename the misleading cmd "rx_training" to "mvebu_comphy_rx_training" to
avoid confusion and mixup with DDR3/4 training. This makes it clear,
that this command is platform specific and handles the COMPHY RX
training.
Also depend this cmd on ARMADA_8K and not TARGET_MVEBU_ARMADA_8K to make
is available for OcteonTX2 CN913x.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pali Rohár <pali@kernel.org>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Acked-by: Marek Behún <marek.behun@nic.cz>
Acked-by: Pali Rohár <pali@kernel.org>
The pcie_dw_mvebu configure ATU regions for memory, configuration
and IO space types. However the latter is not obligatory
and when not specified in the device tree, causes wrong
ATU configuration. Fix that by adding a dependency on the
detected PCIE regions count.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-on: https://sj1git1.cavium.com/18136
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: Kostya Porotchkin <kostap@marvell.com>
Some of the setups including cn9130 opens mmio window starting from
0xc0000000, reflect it in the u-boot code.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
There is region left by ATF, which needs to remain in memory to provide RT
services. To prevent overwriting it by u-boot, do not provide any mapping
for this memory region, so any attempt to access it will trigger
synchronous exception.
Update sr 2021-04-12:
Don't update armada3700/cpu.c mmu table, as this has specific changes
included in mainline.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
After commit 1fe929ed497bcc8975be8d37383ebafd22b99dd2
("spi: kirkwood: prevent configuring speed exceeding max controller freq")
the spi frequency could be set to 0 on platform where spi-max-frequency
is not defined (e.g. on armada-388-gp). Prevent limiting speed in
mentioned cases.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Tested-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Marcin Wojtas <marcin@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a limitation in the kirkwood_spi driver
set_speed hook, which prevents setting too high transfer
speed.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The Armada SoC family implementation of this SPI hardware module has
extended the configuration register to allow for a wider range of SPI
clock rates. Specifically the Serial Baud Rate Pre-selection bits in the
SPI Interface Configuration Register now also use bits 6 and 7 as well.
Modify the baud rate calculation to handle these differences for the
Armada case. Potentially a baud rate can be setup using a number of
different pre-scalar and scalar combinations. This code tries all
possible pre-scalar divisors (8 in total) to try and find the most
accurate set.
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Currently, building U-Boot for x530 fails since the SPL image is too
big. This patch reduces the SPL size by changing the following Kconfig
options:
Enable CONFIG_SPL_TINY_MEMSET
Disable CONFIG_SPI_FLASH_BAR
By disabling CONFIG_SPI_FLASH_BAR, the tiny SPI NOR framework can be
used.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
When the PHY interface is set as TXID & RXID, the delays should be taken from DT,
but first they should not be hardcoded since the PHY driver will set them.
Fixes: 798424e857 ("net: designware: add Amlogic Meson8b & later glue driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If the PHY isn't specified in the DT, -ENODATA means it should be skipped,
handle it like -ENOENT.
With that, devices without USB3 supported can have USB working (Odroid-HC4).
Fixes: adb049abf7 ("usb: dwc3: Add Meson G12A USB Glue")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This lacks the right u-boot specific DT include to make HDMI work.
Reported-by: B1oHazard <ty3uk@mail.ua>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This reverts commit bc8bbb77f7.
This commit breaks U-Boot booting on SiFive Unleashed board, as
there is no such CSR on U54 core.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The pwm_sifive_set_config() and pwm_sifive_set_enable() cannot work
properly due to the wrong implementations. It will cause the u-boot
PWM command to not work as expected. The bugs will be resolved in this
patch.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Testing showed that disabling AI while leaving PLL1 enabled disabled the
aisram. This suggests that AI is a more appropriate clock for that ram
bank.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This is more consistent with the naming of other ram banks, and matches
what Linux is doing.
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
We just need to initialize all the clocks pre-reloc. The clock driver
creates a bunch of devices, so we need to increase the pre-reloc malloc
arena.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
These devices are necessary for the clock driver, which is required by the
sram driver, to run pre-relocation.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Variables which had previously been stored in .bss are moved to .data. In
addition, probed needs to be reset when the clock driver is re-bound
post-relocation.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
No other (real) clocks have the cpu clock as their parent; instead they are
children of aclk. Move the clint clock under aclk to match them.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This simplifies the PLL creation process, since we don't have to pass all
the parameters individually.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This conditional always evaluated as false, regardless of the value of reg.
Fix it so that it properly tests the bits in the PLL register. Also test
PLL_EN, now that we set it.
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
After starting or setting the rate of a PLL, the enable bit must be set.
This fixes a bug where the AI ram would not be accessible, because it
requires PLL1 to be running.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>
If the user/dev explicitly requests a clock be assigned a certain rate,
then we should warn them if we can't do it. This makes it clear if the
clock is running at the default rate.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Update the Kconfig and the board file to make the am335x board compatible
with cape detection.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
The am335x from BeagleBone use i2c EEPROM to detect capes.
The memory is wired to i2c bus 2 therefore it need to be enabled.
Add i2c2 clock, pinmux description and pinmux enable function.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Add the extension_board_scan specific function to scan the information
of the EEPROM on one-wire and fill the extension struct.
Add the Kconfig symbol to enable the needs to detect DIPs.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Andre Przywara <andre.przywara@arm.com>
This patch changes the functioning of the detection of w1 devices.
The old way was a comparison between detected w1 and the ones described in
the device tree. Now it will just look for the driver matching the family
id of the w1 detected.
The patch is inspired from Maxime Ripard code.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
The BeagleBone platforms all use a common mechanism to discover and
identify extension boards (called "capes"): each extension board has an
I2C-connected EEPROM describing itself.
This patch implements a generic extension_scan_board() feature that can
be used by all BeagleBone platforms to read those I2C EEPROMs and fill
in the list of "extension" structures.
Following commits will enable this common logic on two BeagleBone
platforms.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
This commit extends the sandbox to implement a dummy
extension_board_scan() function and enables the extension command in
the sandbox configuration. It then adds a test that checks the proper
functionality of the extension command by applying two Device Tree
overlays to the sandbox Device Tree.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
[trini: Limit to running on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch adds a new "extension" command, which aims at detecting
extension boards connected to the hardware platform, and apply the
Device Tree overlays that describe the hardware present on those
extension boards.
In order to enable this mechanism, board-specific code must implement
the extension_board_scan() function that fills in a linked list of
"struct extension", each describing one extension board. In addition,
the board-specific code must select the SUPPORT_EXTENSION_SCAN Kconfig
boolean.
Based on this:
- "extension scan" makes the generic code call the board-specific
extension_board_scan() function to retrieve the list of detected
extension boards.
- "extension list" allows to list the detected extension boards.
- "extension apply <number>|all" allows to apply the Device Tree
overlay(s) corresponding to one, or all, extension boards
The latter requires two environment variables to exist and set one variable
to run:
- extension_overlay_addr: the RAM address where to load the Device
Tree overlays
- extension_overlay_cmd: the U-Boot command to load one overlay.
Indeed, the location and mechanism to load DT overlays is very setup
specific.
- extension_overlay_name: set by the command: the name of the DT which
will be load during the execution.
When calling the command described in the extension_overlay_cmd
variable, the variable extension_overlay_name will be defined. So a
typical extension_overlay_cmd will look like this:
extension_overlay_cmd=load mmc 0:1 $extension_overlay_addr /boot/$extension_overlay_name
Here is an example on how to use it:
=> run loadfdt
=> fdt addr $fdtaddr
=> setenv extension_overlay_addr 0x1000
=> setenv extension_overlay_cmd 'load mmc 0:1 ${extension_overlay_addr} /boot/${extension_overlay_name}'
=> extension scan
Found 1 extension board(s).
=> extension apply 0
519 bytes read in 3 ms (168.9 KiB/s)
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
Move the fdt_valid function to fdt_support.
This changes allow to be able to test the validity of a devicetree in
other c files.
Update code syntax.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Maxime Ripard <maxime@cerno.tech>
Enable CONFIG_DM_ETH in configs/pm9263_defconfig
Drop legacy initialization in board/ronetix/pm9263.c
Remove network related setting from include/configs/pm9263.h
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Scrub duplicate /memory@* node entries here. Some R-Car DTs might
contain multiple /memory@* nodes, however fdt_fixup_memory_banks()
either generates single /memory node or updates the first /memory
node. Any remaining memory nodes are thus potential duplicates.
However, it is not possible to delete all the memory nodes right
away, since some of those might not be DRAM memory nodes, but some
sort of other memory. Thus, delete only the memory nodes which are
in the R-Car3 DBSC ranges.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The rcar-common/common.c contains various common board functions shared
by all R-Car and RZG boards. This board is not compiling the file in, so
add it. This way, part of the board code can be de-duplicated too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Adam Ford <aford173@gmail.com>
Add CPSW related nodes for AM642 SK. There are two CPSW ports on the
board but U-Boot supports only the first port.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
AM64 as CPSW3G IP with 2 external ports. Add DT entries for the same
(based on kernel DT).
Disable second port as its by default set to ICSS usage on EVM.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Currently driver may end up caching disabled port ID as active
interface. Fix this by bailing out earlier in case port is marked
disabled in the DT.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
CPSW NUSS IP on K3 SoCs can have more than one external port (upto 8)
Therefore increase AM65_CPSW_CPSWNU_MAX_PORTS to 9 (8 ext + 1 Root port)
as preparation to allow any one of the 8 ports to be used as ethernet
interface in U-Boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
ICSSG Ethernet driver uses two src threads per port (one per slice).
Similarly CPSW uses one src thread.
Drop PSIL EP static data for other src threads in order to reduce
R5 SPL footprint. This makes AM65x board bootable again.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
With AM64x supporting only K3_NAV_RINGACC_RING_MODE_RING or the exposed
ring mode, all other K3 SoCs have also been moved to this common
baseline. Therefore drop other modes such as
K3_NAV_RINGACC_RING_MODE_MESSAGE (and proxy) to save on SPL footprint.
There is a saving of ~800 bytes with this change for am65x_evm_r5_defconfig.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
AM64 dual mode rings are modeled as pair of Rings objects which has common
configuration and memory buffer, but separate real-time control register
sets for each direction mem2dev (forward) and dev2mem (reverse).
AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Update struct ti_sci_msg_rm_udmap_tx_ch_cfg_req to latest ABI to support
AM64x BCDMA Block copy channels.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Parse MAC addresses from EEPROM and set them in the env. This is needed
to get MAC address for additional ethernet ports on the EVM.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Enable all relevant configs for building multiple dtbs into a single fit
image and load the right dtb for next stage.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Enable relevant configs that checks for the size of image and stack:
BSS: 4KB
Initial MALLOC: 512KB
Initial Stack: 8K
SPL Image size can be: ~960KB
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM642 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM642 SoC. It supports the following interfaces:
* 2 GB LPDDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in switch and MAC mode
* x1 USB 3.0 Type-A port
* x1 UHS-1 capable µSD card slot
* 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837
* 512 Mbit OSPI flash
* x2 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin Raspberry Pi compatible GPIO header
* 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO)
* 54-pin header for Programmable Realtime Unit (PRU) IO pins
* Interface for remote automation. Includes:
* power measurement and reset control
* boot mode change
Add basic support for AM642 SK.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Now that single defconfig can be used for booting AM64 EVM and SK,
default device tree will not work for selecting dtb for kernel.
Update the env to select right dtb based on eeprom.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Current BSS allocation of SPL is as below:
size spl/u-boot-spl
text data bss dec hex filename
144572 5484 1752 151808 25100 spl/u-boot-spl
But 20KB is allocated currently for BSS. Reduce it to 4KB and
save some space for stack.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Enable support for selecting DTB within SPL based on EEPROM.
This will help to use single defconfig for both EVM and SK
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
I2C EEPROM data contains the board name and its revision.
Add support for:
- Reading EEPROM data and store a copy at end of SRAM
- Updating env variable with relevant board info
- Printing board info during boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Introduce ddr node for am642 needed for all ddr configurations.
Also, introduce the 1600MTs DDR4 configuration that is supported on the
am642-evm.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Attempt to get and enable a vtt regulator if one is provided from the
dts. If we do not find one, continue as not all platforms have this.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Introduce support for the AM64 DDRSS controller which uses the 16bit
variation of the controller. This controller shares much functionality
with the existing J721e support, so this patch introduces only the new
code needed for am64 specific support from "_16bit_" files with headers
under "16bit/" include path/.
Also add a CONFIG_K3_AM64_DDRSS option to the choice required for use
with CONFIG_K3_DDRSS to allow selecting AM64 support.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Introduce a new version of the ddr driver which has the ability to
support different variations of the controller. Also introduce support
for the 32bit variation of the controller which is what was already
supported by the previous version used for J721e and J7200.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Create a new CONFIG_K3_DDRSS option to select the common parts of the
k3-ddrss driver. Also introduce a choice that depends on the top level
option to select CONFIG_K3_J721E_DDRSS for j721e support, and update
corresponding Kconfig as required.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Rename the k3-j721e folder under drivers/ram to k3-ddrss in preparation
of introducing additional support for other platforms to the same
driver.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The AM642 EValuation Module (EVM) is a board that provides access to
various peripherals available on the AM642 SoC, such as PCIe, USB 2.0,
CPSW Ethernet, ADC, and more.
Add basic support.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
peripherals.
* Centralized System Controller for Security, Power, and Resource
Management (DMSC).
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Introduce basic support for the AM642 SoC to enable SD/MMC boot.
Introduce a limited set of MAIN domain peripherals under cbass_main and
a set of MCU domain peripherals under cbass_mcu.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add pinctrl macros for AM64 SoC. These macro definitions are similar to
that of previous platforms, but adding new definitions to avoid any
naming confusions in the soc dts files.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
AM64x uses a different thread mapping that existing K3 SoCs, so update
the valid thread ID list to include those used for AM64x.
Also remove the comment identifying the purpose of each thread ID. The
purpose of the thread ID is specified when describing the threads in the
device tree and the same ID can mean different things on different SoCs,
so the comment is not useful.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add support for the controller present on the AM642 SoC.
There are instances:
sdhci0: 8bit bus width, max 400 MBps
sdhci1: 4bit bus width, max 100 MBps
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Change the memory attributes for the DDR regions used by the remote
processors on AM65x so that the cores can see and execute the proper code.
A separate table based on the previous K3 SoCs is introduced since the
number of remote processors and their DDR usage is different between the
SoC families.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The AM642 SoCs use the Main R5FSS0 as a boot processor, and runs
the R5 SPL that performs the initialization of the System Controller
processor and starting the Arm Trusted Firmware (ATF) on the Arm
Cortex A53 cluster. The Core0 serves as this boot processor and is
parked in WFE after all the initialization. Core1 does not directly
participate in the boot flow, and is simply parked in a WFI.
Power down these R5 cores (and the associated RTI timer resources
that were indirectly powered up) after starting up ATF on A53 by
using the appropriate SYSFW API in release_resources_for_core_shutdown().
This allows these Main R5F cores to be further controlled from the
A53 to run regular applications.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the AM642 early initialization sequence. Also
make use of existing logic to detect if ROM has already loaded sysfw
and avoided attempting to reload and instead just prepare to use already
running firmware.
While at it also initialize the MAIN_UART1 pinmux as it is used by SYSFW
to print diagnostic messages.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
For AM642, ROM supports loading system firmware directly
from boot image. ROM passes information about the number of
images that are loaded to bootloader at a specific address
that is temporary. Add support for storing this information
somewhere permanent before it gets corrupted.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MAIN domain.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
AM642 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
peripherals.
* Centralized System Controller for Security, Power, and Resource
Management (DMSC).
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Using the custom TI functions required not only replacing common memory
access functions but also rewriting the routines used to set bypass and
lock states. As for readl() and writel(), they also required the address
of the register to be accessed, a parameter that is hidden by the TI clk
module.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Replaces the common memory access functions used by the driver with the
ones exported from the TI clk module.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The clock access functions exported by the clk header use the
struct clk_ti_reg parameter to get the address of the register. This
must also apply to clk_ti_latch(). Changes to TI's clk-mux and
clk-divider drivers prevented the patch from generating compile errors.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
As it has been now two years past the migration deadline, it is required
to have migrated. Remove the check from the Makefile and rework some of
the Kconfig logic slightly to get the functional dependencies of DM_MMC
/ BLK right in both the SPL and non-SPL case.
Signed-off-by: Tom Rini <trini@konsulko.com>
The migration deadline for having LIBATA mean that AHCI is also enabled
was v2019.07. As that has long since passed, adjust the Kconfig
dependencies.
Signed-off-by: Tom Rini <trini@konsulko.com>
There are a number of platforms that depend on a SATA driver that has
been converted to require AHCI but the platforms themselves are behind
on other migrations that would make it trivial to enable AHCI. Disable
SATA in these cases.
Signed-off-by: Tom Rini <trini@konsulko.com>
These specific configs are missing a number of migrations. In addition,
they are blocking completion of the now-expired DM_MMC migration as it
requires enabling BLK.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This was missed when VirtIO support was initially brought to U-Boot
back in 2018. Add an entry for it and list myself as the maintainer.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit updates the default config with the values that are actually
used "in the wild" and which are close to what is used on the MediaTek
MT7688 based, 2nd generation of the GARDENA smart gateway:
- Reduce startup time by setting bootdelay to 0 (still allows accessing
the shell, one just has to send a key press quicker)
- Adjusting U-Boot environment volume names and MTD partitions to
the actual layout
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- Allow for boards to update bootargs before booting the OS (helpful in
some forms of secure boot).
- Enhance GPT write support.
- gpio-sysinfo updates
- Allow env to be appended from dtb
Adding timeout mechanism to avoid spi driver from stucking
in the while loop in __atcspi200_spi_xfer().
Signed-off-by: Dylan Jhong <dylan@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Add a callback harts_early_init() to start.S to allow different riscv
hart perform setup code for each hart as early as possible. Since all
the harts enter the callback, they must be able to run the same
setup.
Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
By declaring board-specific board_fdt_chosen_bootargs() the kernel
command line arguments can be adjusted before injecting to flat dt
chosen node.
Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
This change would enhance the existing 'gpt read' command to allow
(optionally) writing of the read GPT partitions to an environment
variable in the UBOOT partitions layout format. This would allow users
to easily change the overall partition settings by editing said variable
and then using the variable in the 'gpt write' and 'gpt verify' commands.
Signed-off-by: Farhan Ali <farhan.ali@broadcom.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Corneliu Doban <cdoban@broadcom.com>
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Check that a variable defined in /config/environment is found in the
run-time environment, and that clearing fdt_env_path from within that
node works.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Conditionalize the test being linked in]
Signed-off-by: Tom Rini <trini@konsulko.com>
It can be useful to use the same U-Boot binary for multiple purposes,
say the normal one, one for developers that allow breaking into the
U-Boot shell, and one for use during bootstrapping which runs a
special-purpose bootcmd. Or one can have several board variants that
can share almost all boot logic, but just needs a few tweaks in the
variables used by the boot script.
To that end, allow the control dtb to contain a /config/enviroment
node (or whatever one puts in fdt_env_path variable), whose
property/value pairs are used to update the run-time environment after
it has been loaded from its persistent location.
The indirection via fdt_env_path is for maximum flexibility - for
example, should the user wish (or board logic dictate) that the values
in the DTB should no longer be applied, one simply needs to delete the
fdt_env_path variable; that can even be done automatically by
including a
fdt_env_path = "";
property in the DTB node.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This uses the newly-added dm_gpio_get_values_as_int_base3 function to
implement a sysinfo device. The revision map is stored in the device tree.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This has the uclass enforce calling detect() before other methods. This
allows drivers to cache information in detect() and perform (cheaper)
retrieval in the other accessors. This also modifies the only instance
where this sequencing was not followed.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since 07c9e683a4 ("smbios: Allow a few values to come from sysinfo")
there are common global sysinfo IDs. This patch moved existing IDs above
SYSINFO_ID_USER.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
of_parse_phandle_with_args (called by dev_read_phandle_with_args) does not
support getting the length of a phandle list by using the index -1.
Instead, use dev_count_phandle_with_args which supports exactly this
use-case.
Fixes: 8558217153 ("gpio: Convert to use APIs which support live DT")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Supported peripherals: Ethernet, eMMC, Serial.
U-Boot SPL 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14
+0200)
Normal Boot
Trying to boot from MMC2
U-Boot 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200)
CPU: Freescale i.MX8MQ rev2.1 at 1000 MHz
Reset cause: POR
Model: Ronetix iMX8M-CM SoM
DRAM: 1 GiB
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Net:
Warning: ethernet@30be0000 (eth0) using random MAC address -
42:0d:e7:78:da:53
eth0: ethernet@30be0000
Hit any key to stop autoboot: 0
u-boot=>
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
commit 6ecbe13756 ("drivers: pci: imx: add imx_pcie_remove function")
attempted to resolve an issue caused by MX6QDL not having a proper
intneral PCIe core reset and thus hanging during kernel init if the
bootloader had enabled PCI.
The issue exists for IMX6Q, IMX6D, IXM6S, and IMX6DL. Fix the case for
IMX6S and IMX6DL getting missed.
This fixes IMX6S and IMX6DL with PCI enabled in U-Boot booting for
Linux v4.11+.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
instead using ls and awk to determine file size use stat instead.
This fixes an invalid size reporting for user or group names that have
spaces in them.
This adds a dependency on the stat application which is part of
the coreutils package which also includes ls.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Current setup instructions for i.MX8QM MEK board include somewhat
conflicting instructions, so here's an attempt to fix it.
After trying both sets of firmwares, I can conclude that both of
them fail to work:
- no boot at all with imx-sc-firmware-0.7 / firmware-imx-7.6
- partial success with imx-sc-firmware-1.1 / firmware-imx-8.0:
U-Boot 2021.04-rc3-00135-ge0669a43c8 (Mar 08 2021 - 16:49:08 +0200)
CPU: NXP i.MX8QM RevB A53 at 1200 MHz
Model: Freescale i.MX8QM MEK
Board: iMX8QM MEK
mu_hal_receivemsg timeout
Build: SCFW 65afe5f6, SECO-FW 65afe5f6, ATF a-20190
mu_hal_receivemsg timeout
sc_misc_get_boot_dev: res:16
Boot: SD0
DRAM: mu_hal_sendmsg timeout
sc_rm_is_memreg_owned: mr:0 res:21
...
Signed-off-by: Priit Laes <priit.laes@paf.com>
If we fail to probe for whatever reason, we cannot unregister/free the
MII bus unless we registered it with fec_get_miibus. This fixes FECs
sharing an MDIO bus from destroying it, preventing the other FEC from
using it.
Fixes: 6a895d039b ("net: Update eQos driver and FEC driver to use eth phy interfaces")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
If a phy is disabled, don't use it. This matches Linux's behavior.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Update the highest subordinate bus number after probing the devices
under the bus for setting up the bridge correctly.
The commit 42f3663a3f ("pci: Update to use new sequence numbers")
removed this but it is required if a PCIe bridge is under the bus.
Fixes: 42f3663a3f ("pci: Update to use new sequence numbers")
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Remove the invalid 'regulator-always-on' property to resolve:
starting USB...
Bus usb@2184000: Error enabling VBUS supply (ret=-13)
probe failed, error -13
Bus usb@2184200: USB EHCI 1.00
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.
Linux dts commit details:
commit <a142252061ff> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini
C.TOUCH 2.0")
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.
i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.
Linux dts commit details:
commit <051c08eea682> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini
EDIMM2.2 Starter Kit")
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
from Engicam.
General features:
- NXP i.MX8M Mini
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8M Mini features
i.Core MX8M Mini needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Linux dts commit details:
commit <470d6dad5ddd> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini
SoM")
Add support for it.
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Minor cosmetic changes to unify `CONFIG_EXTRA_ENV_SETTINGS'
indentation between Bx50v3 and PPD to make comparison and
review easier and simplify the default boot command.
Signed-off-by: Ian Ray Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Increase watchdog period, in order to accomodate recent kernel size
and configuration changes.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Add PHY's reset GPIO, so that U-Boot does a PHY hard reset.
This is needed, since the PHY might become unresponsive if
watchdog reboots the system while a transaction is ongoing.
The reset GPIO is added to the U-Boot specific DT files, since
the kernel does not setup the reserved registers correctly after
resetting the PHY and thus must not reset it.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
The DA9063 enables the CRYSTAL bit by default, but there is no
crystal populated on the BA16 system on module. Without explicitly
clearing the CRYSTAL bit the system runs unstable and sometimes
reboots unexpectedly.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
In case binman is enabled, the u-boot.itb is generated using this tool
and there is no direct u-boot.itb target, but instead the binman tool
must be invoked. Add support for this case.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
- Add base support for Marvell OcteonTX2 CN9130 CRB (mostly done
by Kostya)
- Sync Armada 3k/7k/8k SERDES code with Marvell version (misc Marvell
authors)
- pci-aardvark: Fix processing PIO transfers (Pali)
Add a reference for the TPM event types and provide missing constants.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add test item for getting address and size functions
Test the following function:
- ofnode_get_addr()
- ofnode_get_size()
Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add functions to add size of addresses in the device tree using ofnode
references.
If the size is not set, return FDT_SIZE_T_NONE.
Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present we sometimes see problems in gitlab where the environment has
0x80 characters or sequences which are not valid UTF-8.
Avoid this by using bytes for the environment, both internal to buildman
and when writing out the 'env' file. Add a test to make sure this works
as expected.
Reported-by: Marek Vasut <marex@denx.de>
Fixes: e5fc79ea71 ("buildman: Write the environment out to an 'env' file")
Signed-off-by: Simon Glass <sjg@chromium.org>
There have been at least a few cases where an exception has occurred in a
thread and resulted in buildman hanging: running out of disk space and
getting a unicode error.
Handle these by collecting a list of exceptions, printing them out and
reporting failure if any are found. Add a test for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
If there are no nodes or if all nodes are disabled, this function would
return err without setting it first. Fix this by initializing err to
zero.
Fixes: 94f7afdf7e ("dm: core: Ignore disabled devices when binding")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Today of_address_to_resource() is called only in
ofnode_read_resource() for livetree support and
fdt_get_resource() is called when livetree is not supported.
The fdt_get_resource() doesn't do the address translation
so when it is required, but the address translation is done
by ofnode_read_resource() caller, for example in
drivers/firmware/scmi/smt.c::scmi_dt_get_smt_buffer() {
...
ret = ofnode_read_resource(args.node, 0, &resource);
if (ret)
return ret;
faddr = cpu_to_fdt32(resource.start);
paddr = ofnode_translate_address(args.node, &faddr);
...
The both behavior should be aligned and the address translation
must be called in fdt_get_resource() and removed for each caller.
Fixes: a44810123f ("dm: core: Add dev_read_resource() to read device resources")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
When used with hierarchical images, use the Chromium OS convention of
adding a section before all the subentries it contains.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use an interator in two of the fmap tests so it is easier to add new
items. Also check the name first since that is the first indication
that something is wrong. Use a variable for the expected size of the
fmap to avoid repeating the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Parse each empty-line-delimited message separately. This saves having to
deal with all the different line content styles, we only care about the
header ERROR | WARNING | NOTE...
Also make checkpatch print line information for a uboot specific
warning.
Signed-off-by: Evan Benn <evanbenn@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Given that we have tests that require pygit2 and it can be installed
like any other python module, fail much more loudly if it is missing.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Given that test/py/requirements.txt has all required test modules, make
use of that rather than a manual pip install list before running our
assorted tool testsuites.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is easier to read the positive conditional.
While at it, convert hard coded length of "_test_" to strlen("_test_")
which will be converted to a constant bu optimizing compiler.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When run `ut dm [test name]` allow to use simple pattern to run all tests
started with given prefix. For example, to run all ACPI test cases:
ut dm acpi*
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present each invocation of run_steps() updates OUTPUT_FILES_COMMON,
since it does not make a copy of the dict. This is fine for a single
invocation, but for tests, run_steps() is invoked many times.
As a result it may include unwanted items from the previous run, if it
happens that a test runs twice on the same CPU. The problem has not been
noticied previously, as there are few enough tests and enough CPUs that
is is rare for the 'wrong' combination of tests to run together.
Fix this by making a copy of the dict, before updating it. Update the
tests to suit, taking account of the files that are no-longer generated.
With this fix, we no-longer generate files which are not needed for a
particular state of OF_PLATDATA_INST, so the check_instantiate() function
is not needed anymore. It has become dead code and so fails the
code-coverage test (dtoc -T). Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
These two tests require an ELF image so that symbol information can be
written into the SPL/TPL binary. At present they rely on other tests
having set it up first, but every test must run independently. This can
cause occasional errors in CI.
Fix this by setting up the required files, as other tests do.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The commit 6c993815bb ("net: phy: xilinx: Be compatible with live OF
tree") change driver behavior to while loop which wasn't correct because
the driver was looping over again and again. The reason was that
ofnode_valid() is taking 0 as correct value.
Fix it by changing while loop to ofnode_for_each_subnode() which is only
loop over available nodes.
Fixes: 6c993815bb ("net: phy: xilinx: Be compatible with live OF tree")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Trying to clear PIO_START register when it is non-zero (which indicates
that previous PIO transfer has not finished yet) causes an External
Abort with SError 0xbf000002.
This bug is currently worked around in TF-A by handling External Aborts
in EL3 and ignoring this particular SError.
This workaround was also discussed at:
https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=3c7dcdac5c50https://lore.kernel.org/linux-pci/20190316161243.29517-1-repk@triplefau.lt/https://lore.kernel.org/linux-pci/971be151d24312cc533989a64bd454b4@www.loen.fr/https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/1541
Implement a proper fix to prevent this External Abort. As it is not
possible to cancel a pending PIO transfer, simply do not start a new one
if previous has not finished yet. In this case return an error to the
caller.
In most cases this SError happens when there is no PCIe card connected
or when PCIe link is down. The reason is that in these cases a PIO
transfer takes about 1.44 seconds. For this reason we also increase the
wait timeout in pcie_advk_wait_pio() to 1.5 seconds.
If PIO read transfer for PCI_VENDOR_ID register times out, or if it
isn't possible to read it yet because previous transfer is not finished,
return Completion Retry Status value instead of failing, to give the
caller a chance to send a new read request.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
- Add additional step which enables the Impedance and PLL calibration.
- Enable old squelch detector instead of the new analog squelch detector
circuit and update host disconnect threshold value.
- Update LS TX driver strength coarse and fine adjustment values.
Change-Id: Ifa0a585bfb5ecab0bfa033eed6874ff98b16a7df
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
In CP115, comphy4 can be configured into SFI port1
(in addition to SFI0). This patch adds the option
described above.
In addition, rename all existing SFI/XFI references:
COMPHY_TYPE_SFI --> COMPHY_TYPE_SFI0
No functional change for exsiting configuration.
Change-Id: If9176222e0080424ba67347fe4d320215b1ba0c0
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
According to Design Reference Specification the PHY PLL and Calibration
register from PHY0 are shared for multi-port PHY. PLL control registers
inside other PHY channels are not used.
This commit reworks utmi device tree nodes in a way that common PHY PLL
registers are moved to main utmi node. Accordingly both child nodes
utmi-unit range is reduced and register offsets in utmi_phy.h are updated
to this change.
This fixes issues in scenarios when only utmi port1 was in use, which
resulted with lack of correct pll initialization.
Change-Id: Icc520dfa719f43a09493ab31f671efbe88872097
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
New products can contain up to 6 usb ports, therefore allow to initialize
all relevant UTMI PHYs.
Change-Id: I28c36e59fa0e3e338bb3ee0cee2240b923f39785
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Kostya Porotchkin <Kostya.Porotchkin@cavium.com>
It helps ATF to determine who called power off
function (U-boot/Linux) and act accordingly
Change-Id: Icfc5cbfdba64754496812154272b28c0ff639f0f
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
- the default value of comphy pipe selector is set to PCIe (x4)
in case of unconnected comphy the default value remains 0x4
which may lead to several issues with comphy initialization.
- this patch adds SMC call that powers off the comphy lane in case of
unconnected comphy.
Change-Id: I196b2916518dd8df3b159ffa85e2989b8e483087
Signed-off-by: Christine Gharzuzi <chrisg@marvell.com>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Currently, we don't pass id for SGMII 0/1.
A bug in comphy selector configuration was found (in comphy
firmware), after fixing it, SGMII0/1 have different configuration,
so we need to pass the ID the firmware.
Change-Id: Idcff4029cc9cf018278e493221b64b33574e0d38
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Change-Id: I358792a96c13b54e700c05227cc7a8f6bd584694
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Now the comphy configuration is handled in atf, therefore there is no
need to configure phy or pipe selector in u-boot, it is configured by
atf for each particular pair: lane and mode.
Change-Id: I0bebf8d5ff66dbeb6bf9ef90876195938a8eb705
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Replace the XFI training with appropriate SMC call, so the firmware will
perform exact initialization.
Update Stefan 2021-03-23:
Move comphy_smc() function to an earlier place - necessary for the
mainline merge.
Change-Id: I789b130b05529dc80dadcf66aef407d93595b762
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Igal Liberman <igall@marvell.com>
Replace the comphy initialization for USB with appropriate SMC call,
so the firmware will execute required serdes configuration.
Change-Id: I7f773c0dfac70db9dd2653de2cdcfac577e78c4e
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Replace the comphy initialization for RXAUI with appropriate SMC call,
so the firmware will execute required serdes configuration.
Change-Id: Iedae0285fb283e05bb263a8b4ce46e8e7451a309
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of
1.5G/3G/6.25G were referenced in the driver non configuration (dts)
was using it.
This patch removes unused definitions.
Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
This patch adds support for running RX training using new command called
"rx_training"
Usage:
rx_training - rx_training <cp id> <comphy id>
RX training allows to improve link quality (for SFI mode)
by running training sequence between us and the link partner,
this allows to reach better link quality then using static configuration.
Change-Id: I818fe67ccaf19a87af50d4c34a9db7d6802049a5
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
This allows the lower level driver access to comphy map data
(required for RX training support, which is introduced
in the following patches).
Change-Id: Ib7ffdc4b32076c01c3a5d33f59552c9dfc6b12fa
Signed-off-by: Igal Liberman <igall@marvell.com>
If fdtdec_get_int can't find speed, set COMPHY_SPEED_INVALID
If fdtdec_get_int can't find type, set COMPHY_TYPE_INVALID
Move the error print if phy-type is invalid
Add continue to the probe loop (in a case of invalid phy)
Cosmetic changes
Change-Id: I0c61b40bfe685437426fe907942ed338b7845378
Signed-off-by: Igal Liberman <igall@marvell.com>
Add UTMI analog parameters initialization values according to
latest ETP.
Change-Id: I5bcca205a3995202a18ff126f371a81f69e205c8
Signed-off-by: Igal Liberman <igall@marvell.com>
UTMI should be initialized only for enabled device tree nodes.
This fix overrides current internal configuration array
entry with the next DT entry data if error is detected
during the current DT entry parsing or the current port
is disabled.
This way the internal configuration structure will only
contain valid ports information obtained from the DT.
Change-Id: I9c43c6a5d234e15ae9005d1c9bc983fc1f3544b8
Signed-off-by: Omri Itach <omrii@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
In get_speed_string() we have an array (speed_strings[])
which includes all possible speed strings.
This array size and content must be aligned to the speed
defines in comphy_data.h.
This patch adds missing 5.125G speed, aligns speed_strings[]
and fixes incorrect printing when speed > 5.0G.
Change-Id: I9900d23595094be321be0c62fcaa88036324568e
Signed-off-by: Igal Liberman <igall@marvell.com>
Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX.
Those definition might be confused with MDIO PHY definitions.
This patch does the following changes:
- PHY_TYPE_XX --> COMPHY_TYPE_XX
- PHY_SPEED_XX --> COMPHY_SPEED_XX
This improves readability, no functional change.
Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
- For some Marvell SoCs, like armada-3700, there are both
USB host and device controller, but on PHY level the
configuration is the same.
- The new type supports both USB device and USB host
- This patch is cherry-picked from u-boot-2015 as-is.
Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Because of the incorrectly supported SGMII_2500 mode, this patch
disables eth2 for now until this issue will be fixed in mainline.
Also fix an incorrect comment.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Marek Behun <marek.behun@nic.cz>
This patch adds the base support for the Marvell Octeon TX2 CN9130 CRB.
Not all interfaces are supported fully yet.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the dtsi/dts files needed to support the Marvell
Octeon TX2 CN9130 CRB. This is only the base port with not all
interfaces supported fully.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Move the default environment location to the end of 4MB flash
region. This change allows to accomodate larger flash boot
images making space for forthcoming code changes.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for SoCs based on AP807 die.
Remove unused include file for Armada-8020 SoC.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Use a single dtsi file for CP110 die instead of master/slave.
Moving to single file will allow miltiple DTSI inclusions with
re-defined CP index and name.
This change will also allow support for SoCs containing more than
two CP110 dies on board.
Move pin control definitions from CP110 DTS to board DTS files
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- fix the dependency for MMC boot (add XENON to MVEBU_MMC)
- fix the bubt destination assignment (missing # in "else" case)
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for regulator-force-boot-off DT property.
This property can be used by the board/device drivers for
turning off regulators on early init stages as pre-requisite
for the other components initialization.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The dw_eth_pdata is not accessible from the mdio device, it gets the mdio bus plat
leading to random sleeps (-10174464 on Odroid-HC4).
This moves the dw_mdio_reset function to a common one taking the ethernet
device as parameter and use it from the dw_mdio_reset and dm_mdio variant functions.
Fixes: 5160b4567c ("net: designware: add DM_MDIO support")
Reported-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
According to S26KL512S datasheet [1] and S29GL01GS datasheet [2],
the procedure to read out PPB lock bits is to send the PPB Entry,
PPB Read, Reset/ASO Exit. Currently, the code does send incorrect
PPB Entry, PPB Read and Reset/ASO Exit is completely missing.
The PPB Entry sent is implemented by sending flash_unlock_seq()
and flash_write_cmd(..., FLASH_CMD_READ_ID). This translates to
sequence 0x555:0xaa, 0x2aa:0x55, 0x555:0x90=FLASH_CMD_READ_ID.
However, both [1] and [2] specify the last byte of PPB Entry as
0xc0=AMD_CMD_SET_PPB_ENTRY instead of 0x90=FLASH_CMD_READ_ID,
that is 0x555:0xaa, 0x2aa:0x55, 0x555:0xc0=AMD_CMD_SET_PPB_ENTRY.
Since this does make sense, this patch fixes it and thus also
aligns the code in flash_get_size() with flash_real_protect().
The PPB Read returns 00h in case of Protected state and 01h in case
of Unprotected state, according to [1] Note 83 and [2] Note 17, so
invert the result. Moreover, align the arguments with similar code
in flash_real_protect().
Finally, Reset/ASO Exit command should be executed to exit the PPB
mode, so add the missing reset.
[1] https://www.cypress.com/file/213346/download
Document Number: 001-99198 Rev. *M
Table 40. Command Definitions, Nonvolatile Sector Protection
Command Set Definitions
[2] https://www.cypress.com/file/177976/download
Document Number: 001-98285 Rev. *R
Table 7.1 Command Definitions, Nonvolatile Sector Protection
Command Set Definitions
Fixes: 03deff433e ("cfi_flash: Read PPB sector protection from device for AMD/Spansion chips")
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.
The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension
catches it and this fixes the regression.
This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable
even when Linux was booting.
Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard <ty3uk@mail.ua>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
With this extended test, we get the following failure :
=> ut dm reset_base
Test: dm_test_reset_base: reset.c
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Test: dm_test_reset_base: reset.c (flat tree)
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Failures: 2
A fix is needed in reset_get_by_index_nodev() when introduced in [1].
[1] ea9dc35aab ("reset: Get the RESET by index without device")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
comparison of an unsigned value is never true.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
When CONFIG_USE_DEFAULT_ENV_FILE=y and the file
CONFIG_DEFAULT_ENV_FILE is empty (or at least doesn't contain any
non-comment, non-empty lines), we end up feeding nothing into xxd,
which in turn then outputs nothing. Then blindly appending ", 0x00"
means that we end up trying to compile (roughly)
const char defaultenv[] = { , 0x00 }
which is of course broken.
To fix that, change the frobbing of the text file so that we always
end up printing an extra empty line (which gets turned into that extra
nul byte we need) - that corresponds better to the binary format
consisting of a series of key=val nul terminated strings, terminated
by an empty string.
Reported-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
There are some cases where decompressed sectors can have padding zeros.
In kernel code, we have lines to address such situation:
/*
* btrfs_getblock is doing a zero on the tail of the page too,
* but this will cover anything missing from the decompressed
* data.
*/
if (bytes < destlen)
memset(kaddr+bytes, 0, destlen-bytes);
kunmap_local(kaddr);
But not in U-boot code, thus we have some reports of U-boot failed to
read compressed files in btrfs.
Fix it by doing the same thing of the kernel, for both inline and
regular compressed extents.
Reported-by: Matwey Kornilov <matwey.kornilov@gmail.com>
Link: https://bugzilla.suse.com/show_bug.cgi?id=1183717
Fixes: a26a6bedaf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()")
Signed-off-by: Qu Wenruo <wqu@suse.com>
When zImage support was added to SPL, the messages were hidden to reduce
code size. However, the wrong config symbol was used. Since this file is
only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden.
Use the correct symbol so the messages are printed in U-Boot proper.
Also use IS_ENABLED to drop the #ifdef.
Fixes: 431889d6ad ("spl: zImage support in Falcon mode")
Signed-off-by: Samuel Holland <samuel@sholland.org>
When flush_cache() is called during boot on our ~7M kernel image, the
hundreds of thousands of WATCHDOG_RESET calls end up adding
significantly to boottime. Flushing a single cache line doesn't take
many microseconds, so doing these calls for every cache line is
complete overkill.
The generic watchdog_reset() provided by wdt-uclass.c actually
contains some rate-limiting logic that should in theory mitigate this,
but alas, that rate-limiting must be disabled on powerpc because of
its get_timer() implementation - get_timer() works just fine until
interrupts are disabled, but it just so happens that the "big"
flush_cache() call happens in the part of bootm where interrupts are
indeed disabled. [1] [2] [3]
I have checked with objdump that the generated code doesn't change
when this option is left at its default value of 0: gcc is smart
enough to see that the ">=" comparison is tautologically true, hence
all assignments to "flushed" are eliminated as dead stores.
On our board, setting the option to something like 65536 ends up
reducing total boottime by about 0.8 seconds.
[1] https://patchwork.ozlabs.org/project/uboot/patch/20200605111657.28773-1-rasmus.villemoes@prevas.dk/
[2] https://lists.denx.de/pipermail/u-boot/2021-April/446906.html
[3] https://lists.denx.de/pipermail/u-boot/2021-April/447280.html
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
CONFIG_5xx hasn't existed since commit 5025897774 (powerpc, 5xx:
remove support for 5xx). Remove this last mention of it.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Having WATCHDOG_RESET() called automatically from the timer interrupt
runs counter to the idea of a watchdog device - if the board runs into
an infinite loops with interrupts still enabled, the watchdog will
never fire.
When using CONFIG_(SPL_)WDT, the watchdog_reset function is a lot more
complicated than just poking a few SOC-specific registers - it
involves accessing all kinds of global data, and if the interrupt
happens at the wrong time (say, in the middle of an WATCHDOG_RESET()
call from ordinary code), that can end up corrupting said global data.
Allow the board to opt out of calling WATCHDOG_RESET() from the timer
interrupt handler by setting CONFIG_SYS_WATCHDOG_FREQ to 0 - as that
setting is currently nonsensical (it would be compile-time
divide-by-zero), it cannot affect any existing boards.
Add documentation for both the existing and extended meaning of
CONFIG_SYS_WATCHDOG_FREQ.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The code, which is likely copied from arch/powerpc/lib/interrupts.c,
lacks a fallback definition of CONFIG_SYS_WATCHDOG_FREQ and refers to
a non-existing timestamp variable - obviously priv->timestamp is
meant.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Some boards don't work with the rate-limiting done in the generic
watchdog_reset() provided by wdt-uclass.
For example, on powerpc, get_timer() ceases working during bootm since
interrupts are disabled before the kernel image gets decompressed, and
when the decompression takes longer than the watchdog device
allows (or enough of the budget that the kernel doesn't get far enough
to assume responsibility for petting the watchdog), the result is a
non-booting board.
As a somewhat hacky workaround (because DT is supposed to describe
hardware), allow specifying hw_margin_ms=0 in device tree to
effectively disable the ratelimiting and actually ping the watchdog
every time watchdog_reset() is called. For that to work, the "has
enough time passed" check just needs to be tweaked a little to allow
the now==next_reset case as well.
Suggested-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable CONFIG_SYS_FLASH_PROTECTION on Salvator-X(S), ULCB, Ebisu,
which means the Spansion HF PPB protection bits can be operated
using the 'protect' U-Boot command.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The clock driver used a heavy-handed approach where it turned off
all available clocks, while also possibly setting bits which are not
documented in the R-Car datasheet. Update the tables so that only
the bits which are documented are set or cleared when tearing down
the clock driver.
Note that the only clock left running before booting Linux are now
MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Import updated devicetree files from the Linux v5.12 release.
Besides some node and audio port renames this changes the PHY modes to
either rgmii-id or rgmii-txid. From the board files the Pinephone sees
a lot of updates.
This also adds the long missing USB PHY property for controller 0, which
allows the U-Boot PHY driver to eventually use port 0 in host mode
(pending another U-Boot patch).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Update R40 .dts{,i} and dt-binding headers to current version from kernel.
Files taken from Linux 5.12-rc1 release
(commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8)
Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Commit eb5a2b6710 ("net: sun8i-emac: Determine pinmux based on SoC,
not EMAC type") switched the pinmux setup over to look at
CONFIG_MACH_SUN* symbols, to find the appropriate mux value.
Unfortunately this patch missed to check for the H5, which is
pin-compatible to the H3, but uses a different Kconfig symbol (because
it has ARMv8 vs. ARMv7 cores).
Replace the pure SUN8I_H3 symbol with the joint SUNXI_H3_H5 one, which is
there to cover the peripherals common to both SoCs.
Also explicitly list each supported SoC, and have an error message in the
fallback case, to avoid those problems in the future.
This fixes Ethernet support on all H5 boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi PC2
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This patch adds support for the following I2C devices connected to
I2C bus 0 on the Octeon EBB7304:
- Dallas DS1337 RTC
- TLV EEPROM
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
We already have a clock driver for MIPS Octeon. This patch changes the
Octeon DT nodes to supply the clock property via the clock driver
instead of using an hard-coded value, which is not correct in all cases.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Otherwise the output will look like this on MIPS Octeon NIC23:
Device 0: (0:0) Vendor: ATA Prod.: aSDnsi klUrt aII Rev: 4X11
Type: Hard Disk
Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
instead of this version:
Device 0: (0:0) Vendor: TA Prod.: SanDisk Ultra II Rev: X411
Type: Hard Disk
Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds a few missing virt_to_phys() to use the correct physical
address for DMA operations in the common AHCI code. This is done to
support the big-endian MIPS Octeon platform.
Additionally the code a cleaned up a bit (remove some empty lines) and
made a bit better readable.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch enables the usage of the MVEBU AHCI/SATA driver. The only
changes necessary to support MIPS Octeon via DT based probing are, to
add the compatible DT property and the use of dev_remap_addr() so that
the correct mapped address is used in the Octeon case (phys != virt).
Please note that this driver supports the usage of the "scsi" command
and not the "sata" command, since it does not provide an own "scan"
function, which is needed for the "sata" cmd support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
For easy AHCI/ SATA integration, this patch adds board_ahci_enable()
for the MVEBU AHCI driver, which will be used by this platform. This
platform specific "enable" function will setup the proper endian
swapping in the AHCI controller so that it can be used by the common
AHCI code.
Additionally the endian swizzle entry for AHCI in
octeon_should_swizzle_table[] is removed, as this enabled the original
lowlevel code function, e.g. octeon_configure_qlm(), for the QLM setup
to work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the necessary platform infrastructure code, so that the
MIPS Octeon drivers "serial_octeon_pcie_console" & "serial_bootcmd" can
be used. This is e.g. the bootmem initialization in a compatible way to
the Marvell 2013 U-Boot, so that the exisiting PC remote tools like
"oct-remote-console" & "oct-remote-load" can be used. This is be done in
the newly introduced arch_misc_init(), which calls the necessary init
functions when enabled.
These patches are in preparation for the MIPS Octeon NIC23 board
support, which is a desktop PCIe target board enabling these features.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the PCI bootcmd feature for MIPS Octeon, which will be
used by the upcoming Octeon III NIC23 board support. It enables the use
of the "oct-remote-load" and "oct-remote-bootcmd" on host PC's to
communicate with the PCIe target and load images into the onboard
memory and issue commands.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the PCI remote console feature for MIPS Octeon, which
will be used by the upcoming Octeon III NIC23 board support. It enables
the use of the "oct-remote-console" tool on host PC's to communicate
with the PCIe target.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
As DEBUG is no Kconfig symbol, we can't use the IS_ENABLED() macros.
This patch switches to the unfortunately necessary #ifdef usage again
to make it work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
While porting from the Marvell source, I introduced a bug by misplacing
the parenthesis. This patch fixes this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the MIPS Octeon defconfig to enable some features
for PCIe enablement. This includes CONFIG_BOARD_LATE_INIT to call the
board specific serdes init code.
With these features enabled, the serdes and PCIe driver including the
Intel E1000 driver can be tested on the Octeon EBB7304.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the PCIe host controller driver for MIPS Octeon II/III.
The driver mainly consist of the PCI config functions, as all of the
complex serdes related port / lane setup, is done in the serdes / pcie
code available in the "arch/mips/mach-octeon" directory.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the board specific QLM/DLM init code to the Octeon 3
EBB7304 board. The configuration of each port is read from the
environment exactly as done in the 2013 U-Boot version to keep the
board and it's configuration compatible.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.
Signed-off-by: Stefan Roese <sr@denx.de>
Import octeon_qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import octeon_fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcie.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
To match all other cvmx-* header, this patch moves the already existing
cvmx-lmcx-defs.h header one directory up.
Signed-off-by: Stefan Roese <sr@denx.de>
With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.
Signed-off-by: Stefan Roese <sr@denx.de>
Import misc remaining header files from 2013 U-Boot. These will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pemx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcsx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pciercx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcieepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-gmxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-dtx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This will be used by the upcoming Serdes and driver code ported from
the original 2013 U-Boot code to mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.
The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension
catches it and this fixes the regression.
This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable
even when Linux was booting.
Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard <ty3uk@mail.ua>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
With this extended test, we get the following failure :
=> ut dm reset_base
Test: dm_test_reset_base: reset.c
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Test: dm_test_reset_base: reset.c (flat tree)
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Failures: 2
A fix is needed in reset_get_by_index_nodev() when introduced in [1].
[1] ea9dc35aab ("reset: Get the RESET by index without device")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
comparison of an unsigned value is never true.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
When CONFIG_USE_DEFAULT_ENV_FILE=y and the file
CONFIG_DEFAULT_ENV_FILE is empty (or at least doesn't contain any
non-comment, non-empty lines), we end up feeding nothing into xxd,
which in turn then outputs nothing. Then blindly appending ", 0x00"
means that we end up trying to compile (roughly)
const char defaultenv[] = { , 0x00 }
which is of course broken.
To fix that, change the frobbing of the text file so that we always
end up printing an extra empty line (which gets turned into that extra
nul byte we need) - that corresponds better to the binary format
consisting of a series of key=val nul terminated strings, terminated
by an empty string.
Reported-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
There are some cases where decompressed sectors can have padding zeros.
In kernel code, we have lines to address such situation:
/*
* btrfs_getblock is doing a zero on the tail of the page too,
* but this will cover anything missing from the decompressed
* data.
*/
if (bytes < destlen)
memset(kaddr+bytes, 0, destlen-bytes);
kunmap_local(kaddr);
But not in U-boot code, thus we have some reports of U-boot failed to
read compressed files in btrfs.
Fix it by doing the same thing of the kernel, for both inline and
regular compressed extents.
Reported-by: Matwey Kornilov <matwey.kornilov@gmail.com>
Link: https://bugzilla.suse.com/show_bug.cgi?id=1183717
Fixes: a26a6bedaf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()")
Signed-off-by: Qu Wenruo <wqu@suse.com>
When zImage support was added to SPL, the messages were hidden to reduce
code size. However, the wrong config symbol was used. Since this file is
only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden.
Use the correct symbol so the messages are printed in U-Boot proper.
Also use IS_ENABLED to drop the #ifdef.
Fixes: 431889d6ad ("spl: zImage support in Falcon mode")
Signed-off-by: Samuel Holland <samuel@sholland.org>
When flush_cache() is called during boot on our ~7M kernel image, the
hundreds of thousands of WATCHDOG_RESET calls end up adding
significantly to boottime. Flushing a single cache line doesn't take
many microseconds, so doing these calls for every cache line is
complete overkill.
The generic watchdog_reset() provided by wdt-uclass.c actually
contains some rate-limiting logic that should in theory mitigate this,
but alas, that rate-limiting must be disabled on powerpc because of
its get_timer() implementation - get_timer() works just fine until
interrupts are disabled, but it just so happens that the "big"
flush_cache() call happens in the part of bootm where interrupts are
indeed disabled. [1] [2] [3]
I have checked with objdump that the generated code doesn't change
when this option is left at its default value of 0: gcc is smart
enough to see that the ">=" comparison is tautologically true, hence
all assignments to "flushed" are eliminated as dead stores.
On our board, setting the option to something like 65536 ends up
reducing total boottime by about 0.8 seconds.
[1] https://patchwork.ozlabs.org/project/uboot/patch/20200605111657.28773-1-rasmus.villemoes@prevas.dk/
[2] https://lists.denx.de/pipermail/u-boot/2021-April/446906.html
[3] https://lists.denx.de/pipermail/u-boot/2021-April/447280.html
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
CONFIG_5xx hasn't existed since commit 5025897774 (powerpc, 5xx:
remove support for 5xx). Remove this last mention of it.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Having WATCHDOG_RESET() called automatically from the timer interrupt
runs counter to the idea of a watchdog device - if the board runs into
an infinite loops with interrupts still enabled, the watchdog will
never fire.
When using CONFIG_(SPL_)WDT, the watchdog_reset function is a lot more
complicated than just poking a few SOC-specific registers - it
involves accessing all kinds of global data, and if the interrupt
happens at the wrong time (say, in the middle of an WATCHDOG_RESET()
call from ordinary code), that can end up corrupting said global data.
Allow the board to opt out of calling WATCHDOG_RESET() from the timer
interrupt handler by setting CONFIG_SYS_WATCHDOG_FREQ to 0 - as that
setting is currently nonsensical (it would be compile-time
divide-by-zero), it cannot affect any existing boards.
Add documentation for both the existing and extended meaning of
CONFIG_SYS_WATCHDOG_FREQ.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The code, which is likely copied from arch/powerpc/lib/interrupts.c,
lacks a fallback definition of CONFIG_SYS_WATCHDOG_FREQ and refers to
a non-existing timestamp variable - obviously priv->timestamp is
meant.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Some boards don't work with the rate-limiting done in the generic
watchdog_reset() provided by wdt-uclass.
For example, on powerpc, get_timer() ceases working during bootm since
interrupts are disabled before the kernel image gets decompressed, and
when the decompression takes longer than the watchdog device
allows (or enough of the budget that the kernel doesn't get far enough
to assume responsibility for petting the watchdog), the result is a
non-booting board.
As a somewhat hacky workaround (because DT is supposed to describe
hardware), allow specifying hw_margin_ms=0 in device tree to
effectively disable the ratelimiting and actually ping the watchdog
every time watchdog_reset() is called. For that to work, the "has
enough time passed" check just needs to be tweaked a little to allow
the now==next_reset case as well.
Suggested-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable EFI capsule update features to be enabled by default also with all
dfu valid options for ZynqMP.
This feature was tested on Xilinx ZynqMP zcu104 board with defining
dfu_alt_info="mmc 0:1=boot.bin fat 0 1;u-boot.itb fat 0 1"
and
dfu_alt_info="sf 0:0=boot.bin raw 0 0x50000;u-boot.itb raw 0x80000
0x500000".
There is a need to increase malloc size for getting dfu mmc to work.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
CC: Sughosh Ganu <sughosh.ganu@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Import updated devicetree files from the Linux v5.12 release.
Besides some node and audio port renames this changes the PHY modes to
either rgmii-id or rgmii-txid. From the board files the Pinephone sees
a lot of updates.
This also adds the long missing USB PHY property for controller 0, which
allows the U-Boot PHY driver to eventually use port 0 in host mode
(pending another U-Boot patch).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Update R40 .dts{,i} and dt-binding headers to current version from kernel.
Files taken from Linux 5.12-rc1 release
(commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8)
Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Commit eb5a2b6710 ("net: sun8i-emac: Determine pinmux based on SoC,
not EMAC type") switched the pinmux setup over to look at
CONFIG_MACH_SUN* symbols, to find the appropriate mux value.
Unfortunately this patch missed to check for the H5, which is
pin-compatible to the H3, but uses a different Kconfig symbol (because
it has ARMv8 vs. ARMv7 cores).
Replace the pure SUN8I_H3 symbol with the joint SUNXI_H3_H5 one, which is
there to cover the peripherals common to both SoCs.
Also explicitly list each supported SoC, and have an error message in the
fallback case, to avoid those problems in the future.
This fixes Ethernet support on all H5 boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi PC2
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Enable CONFIG_SYS_FLASH_PROTECTION on Salvator-X(S), ULCB, Ebisu,
which means the Spansion HF PPB protection bits can be operated
using the 'protect' U-Boot command.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The clock driver used a heavy-handed approach where it turned off
all available clocks, while also possibly setting bits which are not
documented in the R-Car datasheet. Update the tables so that only
the bits which are documented are set or cleared when tearing down
the clock driver.
Note that the only clock left running before booting Linux are now
MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
- MIPS: octeon: fix minor bugs of initial merge
- MIPS: octeon: add support for QLM and PCI-E controller
- MIPS: octeon: add support for AHCI and SATA
- MIPS: octeon: add E1000 ethernet support
- MIPS: octeon: add Octeon III NIC23 board
- ata/scsi: add support for Big Endian platforms
Bump our py version to 1.10.0 to address CVE-2020-29651.
Reported-by: GitHub dependabot
Reported-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
- search for additional detailed timings in the EDID extension block
- rework sunxi DE2 driver and accompanying DW-HDMI platform driver
to drop redundant device specific code, and later use the DT as a
source of information
Currently DE2 driver uses functions which are defined in internal
headers. They are not meant to be used outside of uclass framework.
Switch DE2 driver to public ones. This has additional benefit that
device_probe doesn't need to be called manually.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
There is no real need to read source_id at probe time. It also doesn't
make sense to store it in driver private data since it's already stored
in class platform data. While this looks like cleanup (and it is), it's
also important for DE2 driver rework because this info will be filled
later (after probe is already executed).
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that there are two ways how hot plug detection can be done.
One is standard way for DW HDMI controller - checking bit 2 in 0x3004
register. Another way is applicable only to Allwinner custom PHY - by
checking bit 19 in register 0x10038. Both methods are equally good as
far as we know.
Use standard method in order to reduce amount of custom code.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
One of my monitors have only 4k@60 timing in base EDID block which is
out of range for devices with HDMI 1.4. It turns out that it has
additional detailed timings in CTA-861 Extension Block and two of them
are appropriate for HDMI 1.4.
Add additional search for valid detailed timing in extension block.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Code which searches for valid detailed timing entry will be used in more
places. Extract it.
No functional change is made. However, descriptors are casted to
edid_detailed_timing instead of edid_monitor_descriptor. Descriptor can
be of either type, but since we're interested only in DTD, it is more
fitting to cast to edid_detailed_timing.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When searching for detailed timing in EDID, check for digital display
earlier. There is no point parsing other parameters if this flag is not
present.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently driver accepts all resolution which won't work on 4k screens.
Add validation callback which limits acceptable resolutions to 297 MHz.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
commit cbea241e935e("efidebug: add multiple device path instances on Boot####")
slightly tweaked the efidebug syntax adding -b, -i and -s for the boot
image, initrd and optional data.
The pytests using this command were adapted as well. However I completely
missed the last "" argument, which at the time indicated the optional data
and needed conversion as well. This patch is adding the missing -s flag
and the tests are back to normal.
Fixes: cbea241e935e("efidebug: add multiple device path instances on Boot####")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In case of failure at efi_get_variable_int("BootOrder"), we should
skip examining boot option variables and return an appropriate error
code which is the one the function returned.
Fixes: CID 331153 Code maintainability issues (UNUSED_VALUE)
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Indicated by Coverity Scan CID 331147
The ESRT was being refreshed in situations where the UpdateCapsule
procedure failed. In that scenario:
1) the ESRT refresh was superfluous.
2) a failed ESRT refresh return code overwrites the UpdateCapsule error
return code.
This commit ensures that the ESRT is only refreshed when the
UpdateCapsule performs successfully.
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Sughosh Ganu <sughosh.ganu@linaro.org>
CC: AKASHI Takahiro <takahiro.akashi@linaro.org>
CC: Tom Rini <trini@konsulko.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: nd@arm.com
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Bumping the digest list count, for all supported algorithms, can be
calculated outside of the individual switch statements. So let's do that
for every loop iteration instead and simplify the code a bit.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
To avoid diverging function definitions we need to include efi_loader.h.
Fixes: fe179d7fb5 ("efi_loader: Add size checks to efi_create_indexed_name()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a man-page for the fatinfo command.
The .rst file was lost in patch 15d9694600 ("doc: fatinfo man-page").
Fixes: 15d9694600 ("doc: fatinfo man-page")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This patch adds support for the following I2C devices connected to
I2C bus 0 on the Octeon EBB7304:
- Dallas DS1337 RTC
- TLV EEPROM
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
We already have a clock driver for MIPS Octeon. This patch changes the
Octeon DT nodes to supply the clock property via the clock driver
instead of using an hard-coded value, which is not correct in all cases.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Otherwise the output will look like this on MIPS Octeon NIC23:
Device 0: (0:0) Vendor: ATA Prod.: aSDnsi klUrt aII Rev: 4X11
Type: Hard Disk
Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
instead of this version:
Device 0: (0:0) Vendor: TA Prod.: SanDisk Ultra II Rev: X411
Type: Hard Disk
Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds a few missing virt_to_phys() to use the correct physical
address for DMA operations in the common AHCI code. This is done to
support the big-endian MIPS Octeon platform.
Additionally the code a cleaned up a bit (remove some empty lines) and
made a bit better readable.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch enables the usage of the MVEBU AHCI/SATA driver. The only
changes necessary to support MIPS Octeon via DT based probing are, to
add the compatible DT property and the use of dev_remap_addr() so that
the correct mapped address is used in the Octeon case (phys != virt).
Please note that this driver supports the usage of the "scsi" command
and not the "sata" command, since it does not provide an own "scan"
function, which is needed for the "sata" cmd support.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
For easy AHCI/ SATA integration, this patch adds board_ahci_enable()
for the MVEBU AHCI driver, which will be used by this platform. This
platform specific "enable" function will setup the proper endian
swapping in the AHCI controller so that it can be used by the common
AHCI code.
Additionally the endian swizzle entry for AHCI in
octeon_should_swizzle_table[] is removed, as this enabled the original
lowlevel code function, e.g. octeon_configure_qlm(), for the QLM setup
to work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the necessary platform infrastructure code, so that the
MIPS Octeon drivers "serial_octeon_pcie_console" & "serial_bootcmd" can
be used. This is e.g. the bootmem initialization in a compatible way to
the Marvell 2013 U-Boot, so that the exisiting PC remote tools like
"oct-remote-console" & "oct-remote-load" can be used. This is be done in
the newly introduced arch_misc_init(), which calls the necessary init
functions when enabled.
These patches are in preparation for the MIPS Octeon NIC23 board
support, which is a desktop PCIe target board enabling these features.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the PCI bootcmd feature for MIPS Octeon, which will be
used by the upcoming Octeon III NIC23 board support. It enables the use
of the "oct-remote-load" and "oct-remote-bootcmd" on host PC's to
communicate with the PCIe target and load images into the onboard
memory and issue commands.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the PCI remote console feature for MIPS Octeon, which
will be used by the upcoming Octeon III NIC23 board support. It enables
the use of the "oct-remote-console" tool on host PC's to communicate
with the PCIe target.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
As DEBUG is no Kconfig symbol, we can't use the IS_ENABLED() macros.
This patch switches to the unfortunately necessary #ifdef usage again
to make it work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
While porting from the Marvell source, I introduced a bug by misplacing
the parenthesis. This patch fixes this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the MIPS Octeon defconfig to enable some features
for PCIe enablement. This includes CONFIG_BOARD_LATE_INIT to call the
board specific serdes init code.
With these features enabled, the serdes and PCIe driver including the
Intel E1000 driver can be tested on the Octeon EBB7304.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the PCIe host controller driver for MIPS Octeon II/III.
The driver mainly consist of the PCI config functions, as all of the
complex serdes related port / lane setup, is done in the serdes / pcie
code available in the "arch/mips/mach-octeon" directory.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the board specific QLM/DLM init code to the Octeon 3
EBB7304 board. The configuration of each port is read from the
environment exactly as done in the 2013 U-Boot version to keep the
board and it's configuration compatible.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.
Signed-off-by: Stefan Roese <sr@denx.de>
Import octeon_qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import octeon_fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcie.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
To match all other cvmx-* header, this patch moves the already existing
cvmx-lmcx-defs.h header one directory up.
Signed-off-by: Stefan Roese <sr@denx.de>
With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.
Signed-off-by: Stefan Roese <sr@denx.de>
Import misc remaining header files from 2013 U-Boot. These will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pemx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcsx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pciercx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-pcieepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-gmxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-dtx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This will be used by the upcoming Serdes and driver code ported from
the original 2013 U-Boot code to mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
For work with EFI it is good to have GUID partitions enabled and also
option to work with UEFI variables. That's why enable both.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Currently u-boot supports addresses upto 39-bits only. If anybody
wants to use addresses of more than 39-bits in Linux they will have
a separate memory node in DT. In such cases they will have multiple
memory nodes.
Currently u-boot selects and runs on lower memory bank region.
But bootscript is being loaded on dram bank 0, where dram bank 0 will
point to 1st memory node in DT. If first memory node is mentioned as
higher ddr(>39-bits address) then u-boot cannot load the bootscript.
So fix this issue by setting bootscript address within the lower memory
bank region.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for usb dfu & thor to distro boot on zynq platform.
Add 60s timeout of dfu-utils to start transaction. Remove
DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram.
Remove DFU_ALT_INFO_MMC as part of distro boot cleanup.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change "dfu_usb" to "usb_dfu" for better representation and change
required macros. Add 60s timeout of dfu-utils to start transaction.
Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM
as we use bootcmd_usb_dfu instead of dfu_ram.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The dfu ram info is wired in connection to Linux kernel and certain setup.
We should change this to be more generic as others command. That's why
using boot via script is the way to go.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In usb boot mode distro boot should select usb device as primary boot
device instead of usb host. So make usb dfu as primary boot device. But do
not list it in boot_targets as fallback option because it is not classic
mode for booting. Using 60s timeout by default should be enough time for
dfu-utils to start transaction. In case none needs this please change
timeout value in the command or disable CONFIG_DFU_TIMEOUT.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On systems without usb gadget dfu core fails which was reported by error
but command itself returns pass which breaks any usage in a script.
That's why propagate error from run_usb_dnl_gadget().
Fixes: 16297cfb2a ("usb: new board-specific USB init interface")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable this feature by default to be able to work with env import/export
commands which are done in this slightly changed variable format (There is
addtional flag fields in variable file which is changing CRC calculation).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable saving variables to MMC(FAT) and SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).
Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal platforms as well.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable saving variables to MMC(FAT), NAND, SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).
Since most of the flashes on zynq evaluation boards are 16MB in size,
set default ENV_OFFSET to 15MB(0xE00000).
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This variable is used for pointing to location where redundant variables
are located. There is no default value. And it doesn't need to be specified
which is showing as warning when savedefconfig is called.
make xilinx_zynqmp_virt_defconfig
#
# configuration written to .config
#
make savedefconfig
scripts/kconfig/conf --savedefconfig=defconfig Kconfig
.config:199:warning: symbol value '' invalid for ENV_OFFSET_REDUND
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
According to EHCI spec, software needs to do handshake with HC for
safely removing QH from async list. This handshake is implemented by
setting IAAD (Interrupt on Async Advance Doorbell) bit in USB_USBCMD
register and poll the IAA (Interrupt on Async Advance bit) in the
USB_USBSTS to ensure the HC has released all on-chip state that may
potentially reference one of the data structures just removed.
Current codes only check active status of the last QTD, but this can't
ensure the QH is released from HC. We can meet unrecoverable
"EHCI timed out on TD" errors when running UEFI SCT tests on USB disk.
The USB_ASYNCLISTADDR register is changed to a invalid address when the
issue happens. It is fixed after adding the IAA handshake.
Steps to reproduce the issue:
1. Build the UEFI SCT from https://github.com/tianocore/edk2-test
2. Build the EDK2 UEFI Shell from https://github.com/tianocore/edk2
3. Copy SCT files and Shell.efi to USB disk FAT partition
4. Load the Shell.efi from USB FAT, and run bootefi to execute it
5. After booting into Shell, enter the SCT directory and run "sct -a"
to execute all tests.
6. Tests run about 1 hour and stop with many EHCI timeout errors like
EHCI timed out on TD - token=0x801f8c80
Signed-off-by: Ye Li <ye.li@nxp.com>
For the latest kernel device tree the max number of reserved regions
in lmb library is reached: 8 with 5 reserved regions in device tree.
When a new region is added, the lmb allocation for the device tree
relocation failed and boot with ramdisk failed.
This patch avoids this issue by increasing the max number of
supported reserved memory in lmb library to 16.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add 2 configs CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS
to change independently the max number of the regions in lmb
library.
When CONFIG_LMB_USE_MAX_REGIONS=y, move the lmb property arrays to
struct lmb and manage the array size with the element 'max' of struct
lmb_region; their are still allocated in stack.
When CONFIG_LMB_USE_MAX_REGIONS=n, keep the current location in
struct lmb_region to allow compiler optimization.
Increase CONFIG_LMB_RESERVED_REGIONS is useful to avoid lmb errors in
bootm when the number of reserved regions (not adjacent) is reached:
+ 1 region for relocated U-Boot
+ 1 region for initrd
+ 1 region for relocated linux device tree
+ reserved memory regions present in Linux device tree.
The current limit of 8 regions is reached with only 5 reserved regions
in DT.
see Linux kernel commit bf23c51f1f49 ("memblock: Move memblock arrays
to static storage in memblock.c and make their size a variable")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
As in lmb_region, cnt < max and in the lmb library
use region[i] only with i in 0...cnt, this region array size
can be reduced by 1 element without overflow.
This patch allows to reduce the struct lmb size.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add a max parameter in lmb_region struct to handle test
in lmb_add_region without using the MAX_LMB_REGIONS
define.
This patch allows to modify these size independently for
memory of reserved regions in the next patches.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove the unused field size of struct lmb_region as it is initialized to 0
and never used after in lmb library.
See Linux kernel commit 4734b594c6ca ("memblock: Remove memblock_type.size
and add memblock.memory_size instead")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
There are no system calls in U-Boot, but ENOSYS is still allowed (and
preferred since 42a2668743 ("dm: core: Document the common error codes")).
Silence this warning.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is technically a library function, but we use MMCs for testing, so
it is easier to do it with DM. At the moment, the only block devices in
sandbox are MMCs (AFAIK) so we just test with those.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
blk_get_device_by_str returns the device number on success. So we must
check if the return was negative to determine an error.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Recently, tests have been added primarily to the end of the dm Makefile.
This results in merge conflicts when two people add new tests at the
same time. To reduce these conflicts, alphabetize the makefile.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This patch enables USB storage support with the necessary partition
support on the MIPS Octeon EBB7304.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Until now, the Octeontx MMC driver did only support the ARM Octeon
TX/Tx2 platforms. This patch adds support for the MIPS Octeon platform
to this driver. Here a short summary of the changes:
- Enable driver compilation for MIPS Octeon, including the MMC related
header file
- Reorder header inclusion
- Switch to using the clk framework to get the input clock
- Remove some functions for MIPS Octeon, as some registers don't
exist here
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.
This patch fixes the displayed DDR type of mt7628.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.
This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed
with a wrong ddr_type in MT7688KN.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Sometimes no traffic was getting out on the ports, the root cause was
a wrong configuration of the Serdes6G, which is used on jr2 pcb111.
This patch fixes this issue by applying the correct configuration.
Fixes: 5e1d417bec ("net: Add MSCC Jaguar2 network driver.")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for stack protector for UBOOT, SPL, and TPL
as well as new pytest for stackprotector
Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Adjust UEFI build flags.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current usage of the variable CFLAGS_NON_EFI on the x86 architecture
deviates from other architectures.
Variable CFLAGS_NON_EFI is the list of compiler flags to be removed when
building UEFI applications. It is not a list of flags to be added anywhere.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
regmap_read() only fills the first two bytes of val. The last two bytes are
random data from the stack. This means the test will fail randomly.
For low endian systems we could simply initialize val to 0 and get correct
results. But tests should not depend on endianness. So let's use a pointer
conversion instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
U-boot might display wrong module revision information
for modules with an assembly version 'K'. "cfgblock create"
does not takes into account all revision digits from PID8.
This fix takes into account all digits of PID8
to store module revision.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Use psci driver exported functions for reset/poweroff, instead of
invoking directly invoke_psci_fn.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Adds support for:
* PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API
that allows discovering whether a specific PSCI function is implemented
and its features.
* SYSTEM_RESET2, which was introduced in PSCI 1.1, which extends existing
SYSTEM_RESET. It provides support for vendor-specific resets, providing
reset_type as an additional param.
For additional details visit [1].
Implementations of some functions were borrowed from Linux PSCI driver
code [2].
[1] https://developer.arm.com/documentation/den0022/latest/
[2] drivers/firmware/psci/psci.c
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Rob does not have access to any Calxeda systems anymore, also has
expressed a lack of interest in those systems in the past.
I have multiple working Midway nodes under my desk in the office, so
am happy to take over maintainership.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far U-Boot was hard coding a (surely sufficient) memory size of 512
MB, even though all machines out there have at least 4GB of DRAM.
Since U-Boot uses its memory knowledge to populate the EFI memory map,
we are missing out here, at best losing everything beyond 4GB on Midway
boxes (which typically come with 8GB of DRAM).
Since the management processor populated the DT memory node already with
the detected DRAM size and configuration, we use that to populate
U-Boot's memory bank information, which is the base for the UEFI memory
map.
This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we
had in place to avoid U-Boot messing up the DT memory node before
loading the kernel.
Also, to cover the whole of memory, we need to enable PHYS_64BIT.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far we were defining a somewhat confusing PHYS_SDRAM_1_SIZE variable,
which originally was only used for setting the memtest boundaries. This
definition in highbank.h has been removed about a year ago (moved to
Kconfig), so we also don't need the hard-coded size definition any longer.
Get rid of the misleading memory size definition, which was actually wrong
anyway (it's 4088 MB for those machines with just 4GB of DRAM).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
To squash that nasty warning message and make better use of the newly
gained OF_CONTROL feature, let's convert the calxedagmac driver to the
"new" driver model.
The conversion is pretty straight forward, mostly just adjusting the
use of the involved data structures.
The only actual change is the required split of the receive routine into
a receive and free_pkt part.
Also this allows us to get rid of the hardcoded platform information and
explicit init calls.
This also uses the opportunity to wrap the code decoding the MMIO
register base address, to make it safe for using PHYS_64BIT later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:
Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far on Highbank/Midway machines U-Boot only ever uses 512MB of DRAM,
even though the machines have typically 4GB and 8GB, respectively.
That means that so far we didn't need an extra limit for placing the DTB
and initrd, as the 512MB are lower than the kernel's limit ("lowmem",
typically 768MB).
With U-Boot now needing to learn about the actual memory size (to
correctly populate the EFI memory map), it might relocate fdt and initrd
to the end of DRAM, which is out of reach of the kernel.
So add limiting values to the fdt_high and initrd_high environment
variables, to prevent U-Boot from using too high addresses.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Anatop is an integrated regulator inside i.MX6 SoC.
There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
This patch adds the Anatop regulator driver.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Trying to compile with CONFIG_CMD_MMC=y and CONFIG_MMC=n leads to errors:
riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmcops':
cmd/mmc.c:984: undefined reference to `get_mmc_num'
riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmc_setdsr':
cmd/mmc.c:873: undefined reference to `find_mmc_device'
Add missing dependency.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The fdt node offset is apparently not set properly when probed
causing no MDIO busses to be found. Fix this by obtaining the
offset.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
After check for maximum between max id and available ports, also check
if available port count is less than max id and update.
In the case of the CN8030 OcteonTX SoC max_id needs to be reduced to
the number of ports found otherwise the following occurs on a scan:
GW6404-B> scsi scan
scanning bus for devices...
Target spinup took 0 ms.
AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: 64bit ncq ilck stag pm led clo only pmp fbss pio slum part ccc
apst
Device 0: (0:0) Vendor: ATA Prod.: SanDisk SD8SFAT0 Rev: Z233
Type: Hard Disk
Capacity: 61057.3 MB = 59.6 GB (125045424 x 512)
"Synchronous Abort" handler, esr 0x96000006
elr: 000000000052f824 lr : 000000000052fa10 (reloc)
elr: 000000007fee9824 lr : 000000007fee9a10
x0 : 0000000000000001 x1 : 0000000000000001
x2 : 000000007bea3528 x3 : 000000007bea3580
x4 : 0000000000000200 x5 : 0000000000000000
x6 : 0000000000000002 x7 : 000000007bea3540
x8 : 00000000fffffff8 x9 : 0000000000000008
x10: 00000000000186a0 x11: 000000000000000d
x12: 0000000000000006 x13: 000000000001869f
x14: 0000000000000007 x15: 00000000ffffffff
x16: 000000007ff439a5 x17: 000000007ff5730c
x18: 000000007bea9de0 x19: 000000007ff7a580
x20: 000000007bec79f8 x21: 0000000000000000
x22: 000000007bea3580 x23: 0000000000000000
x24: 0000000000000000 x25: 000000007bec7a00
x26: 00000000ffffffc0 x27: 000000007bec79d0
x28: 000000007beb51c0 x29: 000000007bea3480
Code: 91246800 940130c2 12800000 1400004f (b9402ae0)
Resetting CPU ...
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Revert a change that occured between the Marvell SDK-10.1.1.0
and SDK-10.3.1.1 which broke QSMII phy support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Move CONFIG_SUPPORT_RAW_INITRD out of the octeontx_common header
and into the defconfig files.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Fixes IDE issues found on the Malta board under Qemu:
1) DMA implied commands were sent to the controller in stead of the PIO
variants. The rest of the code is DMA free and written for PIO operation.
2) direct pointer access was used to read and write the registers instead
of the inb/inw/outb/outw functions/macros. Registers don't have to be
memory mapped and ATA_CURR_BASE() does not have to return an offset from
address zero.
3) Endian isues in ide_ident() and reading/writing data in general. Names
were corrupted and sizes misreported.
Tested malta_defconfig and maltael_defconfig to work again in Qemu.
Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ
selectable for all platforms.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables
must contain only zeros on initial allocation, and this must be visible
to the Redistributors, or else the effect is UNPREDICTABLE".
And as the following statement, we here clear the whole Pending tables
instead of the first 1KB.
"An LPI Pending table that contains only zeros, including in the first 1KB,
indicates that there are no pending LPIs.
The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However,
if the first 1KB of the LPI Pending table and the rest of the table contain
only zeros, this must indicate that there are no pending LPIs."
And there isn't any pending LPI under U-Boot, so it's unnecessary to
load the contents of the Pending table during the enablement, then set
the GICR_PENDBASER.PTZ flag.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # NXP LS1028A
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Now we have PCIe, let's also enable NVMe to access an eventual NVMe SSDs
connected on the M.2 slot.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Enable PCIe by default in u-boot, this should eventually be made dynamic
in the runtime board config depending on the MCU configuration.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The sync of the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on some
ODROID-C2. The PHY seems to need proper reset timing to be functional
in U-Boot and Linux afterwards. Readd the old PHY reset bindings for
dwmac until we support the new bindings in the PHY node.
Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Second set of u-boot-atmel features for 2021.07 cycle:
This small feature set include support for 5th PIO bank on pio4 pinctrl
driver and a fix for the SPL on sama5d3.
This reverts commit 38d6b7ebda.
struct global_data contains a pointer to the bd_info structure. This
pointer was populated spl_set_bd() to a pre-allocated bd_info in the
".data" section. The referenced commit replaced this mechanism to one
that uses malloc(). That new mechanism is only used if SPL_ALLOC_BD=y.
which very few boards do.
The result is that (struct global_data)->bd is NULL in SPL on most
platforms. This breaks falcon mode, since arch_fixup_fdt() tries to
access (struct global_data)->bd and set the "/memory" node in the
devicetree. The result is that the "/memory" node contains garbage
values, causing linux to panic() as it sets up the page table.
Instead of trying to fix the mess, potentially causing other issues,
revert to the code that worked, while this change is reworked.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Now we have PCIe, let's also enable NVMe to access an eventual NVMe SSDs
connected on the M.2 slot.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Enable PCIe by default in u-boot, this should eventually be made dynamic
in the runtime board config depending on the MCU configuration.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The sync of the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on some
ODROID-C2. The PHY seems to need proper reset timing to be functional
in U-Boot and Linux afterwards. Readd the old PHY reset bindings for
dwmac until we support the new bindings in the PHY node.
Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for sama7g5 pinctrl variant, with 5 banks with a degraded
8 line only 5th bank.
Based on Linux Kernel implementation.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This is a patchset which makes away with the .bind() controller indexing
workaround which was broken since before v2021.04, and then adds PHY
support and MX8M support on top of that. Better add it into the release
early to get as much testing as possible done, because this really does
a lot of changes to the ehci-mx6 driver.
Fix cast from pointer to integer of different size by casting the
pointer to uintptr_t instead of uint32_t, the former has correct
size on both 32bit and 64bit architectures.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
There is now multiple copies of CONFIG_MXC_USB_PORTSC in configs set to
PORT_PTS_UTMI | PORT_PTS_PTW, which is in fact the default register value
for MX6, MX7 and MX7ULP. Define the default value of CONFIG_MXC_USB_PORTSC
in the driver and use it in case CONFIG_MXC_USB_PORTSC is not defined in
config, to reduce the duplication.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
In case the platform uses DM, determine port number, which is
used as offset in USBMISC registers, from PHY node DT aliases,
just like Linux does.
Fixes: 4de51cc25b ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Instead of passing ad-hoc sequence number to usb_oc_config(), pass in
the USB MISC address itself. The USB MISC address comes from DT in DM
case, and from the old method using controller index in non-DM case.
Fixes: 4de51cc25b ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Split usb_power_config() per SoC and pass in USB PHY, USBNC and ANATOP
addresses instead of ad-hoc sequence numbers. This is only applicable
on legacy systems which do not implement proper PHY support. Once PHY
support is available, parts of this can be removed altogether and moved
to the PHY driver, similar to Linux phy-mxs-usb.c .
Fixes: 4de51cc25b ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Instead of passing ad-hoc index to USB PHY handling functions and then
try and figure out the PHY address, pass in the PHY address itself. For
DM case, this address comes easily from DT. For non-DM case, the previous
method is still present, however the non-DM case will soon be removed.
Fixes: 4de51cc25b ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
In order to pass component addresses around easily instead of passing
ad-hoc sequence numbers, it is necessary to split ehci_mx6_common_init().
Make it so and call the separate functions instead.
Since board_ehci_hcd_init() makes no sense in DM case, do not call it
in DM case.
Fixes: 4de51cc25b ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
In case DM and OF controler is enabled, but PHY support is disabled,
parse USB PHY and MISC component addresses from DT manually. Those
component addresses will be used in subsequent patches to access the
ANATOP, PHY and MISC registers matching the controller and thus get
rid of the ad-hoc controller sequence number mapping.
Fixes: 4de51cc25b ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
If realloc() fails, we should free the old buffer.
Fixes: c74cd8bd08: ("efi_loader: capsule: add capsule_on_disk support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Remove function invocations using the EFI_CALL macro for those
functions that do not have an EFI_ENTRY call in their definition. Such
functions can use u-boot api's which rely on u-boot global data(gd)
pointer. The Arm and RiscV architectures maintain a separate gd
pointer, one for u-boot, and a separate gd for the efi application.
Calling a function through the EFI_CALL macro changes the gd pointer
to that used for the efi application, with u-boot gd being
unavailable. Any function then trying to dereference u-boot's gd will
result in an abort.
Fix this issue by removing the EFI_CALL macro for all of such
functions which do not begin by an EFI_ENTRY function call.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Two external references cannot have the same name:
doc/chromium/overview.rst:5:
WARNING: Duplicate explicit target name: "youtube"
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
In reStructured text footnotes are referenced like [1]_.
Add missing underscores.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Vasut <marex@denx.de>
As the the SPI flash is probed and is released in each ENV sf function
the env_flash no more need to be static.
This patch move this device handle as local variable of each function and
simplify the associated code (env_flash is never == NULL when
setup_flash_device is called).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Free the SPI resources by calling spi_flash_free() in each env sf
function to avoid issue for other SPI users.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support of opts erase for env in SPI flash;
this opts is used by command 'env erase'.
This command only fills the env offset by 0x0 (bit flip to 0) and
the saved environment becomes invalid (with bad CRC).
It doesn't erase the sector here to avoid issue when the sector
is larger than the env (i.e. embedded when
CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE).
The needed sector erase will be managed in the next "env save" command,
using the opt ".save", before to update the environment in SPI flash.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add ENV_ERASE_PTR macro to handle erase opts and remove the associated
ifdef.
This patch is a extension of previous commit 82b2f41357 ("env_internal.h:
add alternative ENV_SAVE_PTR macro").
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This fixes the case where there are multiple environment drivers, one of
them is the default environment one, and it is followed by an environment
driver which does not implement .init() callback. The default environment
driver sets gd->env_valid to ENV_INVALID and returns 0 from its .init()
callback implementation, which is valid behavior for default environment.
Since the subsequent environment driver does not implement .init(), it
also does not modify the $ret variable in the loop. Therefore, the loop
is exited with gd->env_valid=ENV_INVALID and ret=0, which means that the
code further down in env_init() will not reset the environment to the
default one, which is incorrect.
This patch sets the $ret variable back to -ENOENT in case the env_valid
is set to ENV_INVALID by an environment driver, so that the environment
would be correctly reset back to default one, unless a subsequent driver
loads a valid environment.
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Since commit 0f036bf4b8 ("env: Warn on force access if ENV_ACCESS_IGNORE_FORCE set")
a warning message is displayed when setenv -f is used WITHOUT
CONFIG_ENV_ACCESS_IGNORE_FORCE, but the variable is set anyway, resulting
in lots of log pollution.
env_flags_validate() returns 0 if the access is accepted, or non zero
if it is refused.
So the original code
#ifndef CONFIG_ENV_ACCESS_IGNORE_FORCE
if (flag & H_FORCE)
return 0;
#endif
was correct, it returns 0 (accepts the modification) if forced UNLESS
IGNORE_FORCE is set (in which case access checks in the following code
are applied). The broken patch just added a printf to the force accepted
case.
To obtain the intent of the patch we need this:
if (flag & H_FORCE) {
#ifdef CONFIG_ENV_ACCESS_IGNORE_FORCE
printf("## Error: Can't force access to \"%s\"\n", name);
#else
return 0;
#endif
}
Fixes: 0f036bf4b8 ("env: Warn on force access if ENV_ACCESS_IGNORE_FORCE set")
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
If one of the reads fails when importing redundant environments (a
single read failure), the env_flags wouldn't get initialized in
env_import_redund(). If a user then calls saveenv, the new environment
will have the wrong flags value. So on the next load the new environment
will be ignored.
While debugging this, I also noticed that env/sf.c was not correctly
handling a single read failure, as it would not check the crc before
assigning it to gd->env_addr.
Having a special error path for when there is a single read failure
seems unnecessary and may lead to future bugs. Instead collapse the
'single read failure' error to be the same as a 'single crc failure'.
That way env_check_redund() either passes or fails, and if it passes we
are guaranteed to have checked the CRC.
Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is roughly the U-Boot side equivalent to commit
e282c422e0 (tools: fw_env: use erasesize from MEMGETINFO ioctl). The
motivation is the case where one has a board with several revisions,
where the SPI flashes have different erase sizes.
In our case, we have an 8K environment, and the flashes have erase
sizes of 4K (newer boards) and 64K (older boards). Currently, we must
set CONFIG_ENV_SECT_SIZE to 64K to make the code work on the older
boards, but for the newer ones, that ends up wasting quite a bit of
time reading/erasing/restoring the last 56K.
At first, I wanted to allow setting CONFIG_ENV_SECT_SIZE to 0 to mean
"use the erase size the chip reports", but that config
option is used in a number of preprocessor conditionals, and shared
between ENV_IS_IN_FLASH and ENV_IS_IN_SPI_FLASH.
So instead, introduce a new boolean config option, which for now can
only be used with ENV_IS_IN_SPI_FLASH. If left off, there's no change
in behaviour.
The only slightly annoying detail is that, when selected, the compiler
is apparently not smart enough to see that the the saved_size and
saved_offset variables are only used under the same "if (sect_size >
CONFIG_ENV_SIZE)" condition as where they are computed, so we need to
initialize them to 0 to avoid "may be used uninitialized" warnings.
On our newer boards with the 4K erase size, saving the environment now
takes 0.080 seconds instead of 0.53 seconds, which directly translates
to that much faster boot time since our logic always causes the
environment to be written during boot.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
As preparation for the next patch, use a local variable to represent
the sector size. No functional change.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.
Also, update the itap delay values for all the MMCSD subsystems according
the latest J721e data sheet[2]
[1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf
[2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf
Fixes: 70e167495a ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This adds support for devices with R40 dual rank DRAM, and asymmetric
A64 DRAM devices like the Pinephone/3GB.
Also we enable automatic gzipped kernel support, and allow scripted
DT overlay support. The rest of the patches are cleanups, but also
some sunxi-specific preparatory patches for USB3.0 and improved HDMI
support. The bulk of those changes will go through other trees, though.
Build-tested for all 156 sunxi boards, and boot tested on a A64, A20, R40,
H5, H6 and H616 board. USB, SD card, eMMC, HDMI and Ethernet all work
there (where applicable), with the exception of Ethernet on the H5. Since
this is already broken in v2021.04, I will send a separate fix.
Currently sunxi Makefile manually specifies full path to dw-hdmi common
code. However, that is not needed because it can be selected in Kconfig
instead.
Select proper symbol in Kconfig and drop path from Makefile.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The "booti" command to load arm64 Linux kernels supports automatic
decompression of zipped kernel images, but relies on some environment
variables to point to usable buffer RAM.
Add those variables and let them point to some default values, that
should cover most use-cases.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The FIT description has access to the configuration variables. Use the
appropriate variable instead of hardcoding the address.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
binman can fill in the default FIT configuration index as selected by
the "default-dt" argument, which is set to CONFIG_DEFAULT_DEVICE_TREE.
Let's respect the user's configuration by taking advantage of this
feature, instead of always defaulting to the first device tree in
CONFIG_OF_LIST.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The 32kHz clock ("LOSC") on sunxi SoCs is provided by the RTC. It is
used, among other things, by the XHCI controller in the H6. To be able
to call clk_get_bulk() on the XHCI controller, some device needs to
provide all referenced clocks.
Since LOSC is a fixed-rate always-on clock, implementation is trivial.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Previously we do not have proper dual rank memory detection on R40
(because we omitted PIR_QSGATE, which does not work on R40 with our
configuration), and dual rank memory is just simply disabled as early
R40 boards available (Banana Pi M2 Ultra and Berry) have single rank
memory.
As a board with dual rank memory (Forlinx OKA40i-C) is now known to us,
we need to have a way to do memory rank detection to support that board.
Add some routine to detect memory rank by trying to access the memory
in rank 1 and check for error status of the memory controller, and then
enable dual rank memory on R40.
Similar routine can be used to detect half DQ width (which is also
detected by PIR_QSGATE on other SoCs), but it's left unimplemented
because there's no known R40 board with half DQ width now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
[Andre: Move R40 detect code call into sunxi_dram_init()]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Previously we have known that R40 has a configuration register for its
rank 1, which allows different configuration than rank 0. Reverse
engineering of newest libdram of A64 from Allwinner shows that A64 has
this register too. It's bit 0 (which enables dual rank in rank 0
configuration register) means a dedicated rank size setup is used for
rank 1.
Now, Pine64 scheduled to use a 3GiB LPDDR3 DRAM chip (which has 2GiB
rank 0 and 1GiB rank 1) on PinePhone, that makes asymmetric dual rank
DRAM support necessary.
Add this support. The code could support both A64 and R40, but because
dual rank detection is broken on R40 now, we cannot really use it on R40
currently.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Commit 69076dff22 ("cmd: pxe: add support for FDT overlays") added
support for loading DT overlay files to PXE boot. However, it needs
additional environment variable which points to memory location which
can be used to temporary store overlay data.
Add it and in the process unify alignment using spaces and fix comment.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
update ls1028aqds networking protocol, config in ls1021atwr, env in ls1012a
Add seli3 board support, booke watchdog, update eTSEC support in ppc-qemu
Add DM_SERIAL and lpuart in sl28, add DM_ETH support for some of powerpc platforms
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
- Minor fix to Apollo Lake devicetree bindings for FSP
- Refactor Designware PCIe drivers to core and SoC parts
- Add Amlogic Meson Designware PCIe controller driver
Add the FMan v3 nodes for the T1042D4RDB. The nodes are copied over with
little modification from the Linux kernel source code.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T1042 SoC.
The device tree nodes are copied over with little modification
from the Linux kernel source code.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When two FMan's are present on a board, the MDIO nodes are found at the
same offsets inside each FMan. This causes "non unique device name"
errors when registering the MDIO nodes under the second FMan. Fix this
by updating the offsets of the MDIO nodes to include the parent FMan's
offset.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the FMan v3 nodes for the T4240RDB. The nodes are copied over with
little modification from the Linux kernel source code.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T4240 SoC.
The device tree nodes are copied over with little modification
from the Linux kernel source code.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Disable the FMan mEMAC 5 and 6 nodes from the fdt since they are not
available under the supported RCW. Also disable the associated
"fsl,dpa-ethernet" nodes that reference them.
This is a simplified version of the fdt_fixup_fman_ethernet call for
use under DM_ETH.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the FMan v3 nodes for the T2080RDB. The nodes are copied over with
little modification from the Linux kernel source code.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the QorIQ DPAA 1 FMan v3 device tree nodes for the T2080 SoC.
The device tree nodes are copied over with little modification from
the Linux kernel source code.
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
scan_dev_for_efi is supposed to be called from scan_dev_for_boot.
However, this call is missing for ls1012a boards. As a result EFI
boot doesn’t work. Fix this issue by removing custom definition of
scan_dev_for_boot and use the default definition instead.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Sometimes it is desireable to have the console output on the first
serial line. Introduce a configuration option for it (in the board
scope).
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
With all preparations in place, switch over to DM_SERIAL.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Move the CONFIG_DM_* from the defconfig to the TARGET_SL28 config.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
DM_SERIAL needs both the device tree as well as an early heap. Thus, we
have to call spl_early_init() to initialize the memory allocator and the
setup the device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
To use the debug UART we have to call debug_uart_init() in the SPL. Do
so as soon as possible.
As an example, here is how you can use it on a LS1028A SoC:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0x21c0500
CONFIG_DEBUG_UART_CLOCK=200000000
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is not recommended to use CONFIG_xxx defines for things which are not
Kconfig options. Rename this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
QEMU ppce500 target can dynamically instantiate an eTSEC device
if "-device eTSEC" is given to QEMU. This commit enables eTSEC
driver and the required fixed PHY driver to create a usable
network configuration using eTSEC.
Unlike a real world 85xx board that usually stores the eTSEC MAC
address in an EEPROM, CONFIG_NET_RANDOM_ETHADDR is required for
QEMU otherwise U-Boot ethernet initialization complains no valid
ethernet address is set.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
QEMU ppce500 target can dynamically instantiate an eTSEC device on
a platform bus if "-device eTSEC" is given to QEMU. It is presented
as a "simple-bus" in the device tree, with an additional compatible
string "qemu,platform".
Let's create a virtual memory mapping for it in misc_init_r(), in
preparation to adding eTSEC support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This adds a test case to verify reading <ranges> of a simple-bus is
working as expected.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present we decode simple bus <ranges> using the following assumption:
- parent #address-cells 1
- child #address-cells 1
- child #size-cells 1
However this might not always be the case.
Update to use fdt_addr_t and fdt_size_t in 'struct simple_bus_plat', and
use fdt_read_ranges() to correctly decode it according to the actual
parent and child #address-cells / #size-cells under a Kconfig option
CONFIG_SIMPLE_BUS_CORRECT_RANGE which can be turned on for any board
that needs it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present the tsec driver uses a non-standard DT bindings to get
its <reg> base / size. The upstream Linux kernel seems to require
the <reg> base / size to be put under a subnode of the eTSEC node
with a name prefix "queue-group". This is not documented in the
kernel DT bindings, but it looks every dtsi file that contains the
eTSEC node was written like this.
This commit updates the tsec driver to handle this case.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present the Freescale TSEC node DT bindings doc requires a <reg>
property in the TSEC node. But this might not always be the case.
In the upstream Linux kernel, there is no DT bindings doc for it
but the kernel driver tests a subnode of a name prefixed with
"queue-group", as we can see from gfar_of_init():
for_each_available_child_of_node(np, child) {
if (!of_node_name_eq(child, "queue-group"))
...
in drivers/net/ethernet/freescale/gianfar.c
Update our DT bindings to describe this alternate description.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
dev_remap_addr() eventually calls dev_read_addr_index(), while
pdata->iobase holds the return value of dev_read_addr() that calls
dev_read_addr_index() too. Such duplication can be avoided by using
map_physmem() directly.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The DSA sandbox driver is used for unit testing the DSA class code.
It implements a simple 2 port switch plus 1 CPU port, and uses a
very simple tag to identify the ports.
The DSA sandbox device is connected via CPU port to a regular Ethernet
sandbox device, called 'dsa-test-eth, managed by the existing eth
sandbox driver. The 'dsa-test-eth' is not intended for testing the
eth class code however, but it is used to emulate traffic through the
'lan0' and 'lan1' front pannel switch ports. To achieve this the dsa
sandbox driver registers a tx handler for the 'dsa-test-eth' device.
The switch ports, labeled as 'lan0' and 'lan1', are also registered
as eth devices by the dsa class code this time. So pinging through
these switch ports is as easy as:
=> setenv ethact lan0
=> ping 1.2.3.5
Unit tests for the dsa class code were also added. The 'dsa_probe'
test exercises most API functions from dsa.h. The 'dsa' unit test
simply exercises ARP/ICMP traffic through the two switch ports,
including tag injection and extraction, with the help of the dsa
sandbox driver.
I took care to minimize the impact on the existing eth unit tests,
though some adjustments needed to be made with the addition of
extra eth interfaces used by the dsa unit tests. The additional eth
interfaces also require MAC addresses, these have been added to the
sandbox default environment.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Message-Id: <20210216224804.3355044-5-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Simplify the logic of phy_connect_fixed() by using the new API
ofnode_phy_is_fixed_link(), which brings additional bonus of
supporting the old DT bindings.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present phy_connect_gmii2rgmii() is implemented using a DM API
dev_of_offset() hence it cannot support a non-DM configuration.
Remove the non-DM version prototype of phy_connect_gmii2rgmii()
and make the driver depend on CONFIG_DM_ETH.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Following the same updates that were done to the fixed phy driver,
use ofnode_ APIs instead of fdt_ APIs so that the Xilinx PHY driver
can support live DT.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In drivers/net/phy/Kconfig, CONFIG_PHY_FIXED already depends on
CONFIG_DM_ETH, so the function prototype definition when
CONFIG_DM_ETH=n does nothing, so it can be dropped. It is also
never reachable, since the whole function is already under #ifdef
CONFIG_PHY_FIXED (which again, as I said, depends on CONFIG_DM_ETH=y).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20210216224804.3355044-3-olteanv@gmail.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On systems that use CONFIG_OF_LIVE, the "ofnode" type is defined
as const struct device_node *np, while on the flat DT systems it
is defined as a long of_offset into gd->fdt_blob.
It is desirable that the fixed PHY driver uses the higher-level
ofnode abstraction instead of parsing gd->fdt_blob directly,
because that enables it to work on live OF systems.
The fixed PHY driver has used a nasty hack since its introduction in
commit db40c1aa1c ("drivers/net/phy: add fixed-phy /
fixed-link support"),
which is to pass the long gd->fdt_blob offset inside int phydev->addr
(a value that normally holds the MDIO bus address at which the PHY
responds). Even ignoring the fact that the types were already
mismatched leading to a potential truncation (flat OF offset was
supposed to be a long and not an int), we really cannot extend this
hack any longer, because there's no way an int will hold the other
representation of ofnode, the struct device_node *np.
So we unfortunately need to do the right thing, which is to use the
framework introduced by Grygorii Strashko in
commit eef0b8a930 ("net: phy: add ofnode node to struct phy_device").
This will populate phydev->node for the fixed PHY.
Note that phydev->node will not be valid in the probe function, since
that is called synchronously from phy_device_create and we really have
no way of passing the ofnode directly through the phy_device_create API.
So we do what other drivers do too: we move the OF parsing logic from
the .probe to the .config method of the PHY driver. The new function
will be called at phy_config() time.
I do believe I've converted all the possible call paths for creating
a PHY with PHY_FIXED_ID, so there is really no reason to maintain
compatibility with the old logic of retrieving a flat OF tree offset
from phydev->addr. We just pass 0 to phydev->addr now.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20210216224804.3355044-2-olteanv@gmail.com>
[bmeng: keep fixedphy_probe(); update mdio-uclass.c to handle fixed phy]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Introduce a helper API ofnode_phy_is_fixed_link() to detect whether
the ethernet controller connects to a fixed-link pseudo-PHY device.
Note there are two ways to describe a fixed PHY attached to an
Ethernet device:
- the new DT binding, where 'fixed-link' is a sub-node of the
Ethernet device
- the old DT binding, where 'fixed-link' is a property with 5
cells encoding various information about the fixed PHY
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Per the upstream Linux kernel doc:
Documentation/devicetree/bindings/net/ethernet-controller.yaml
There are two ways to describe a fixed PHY attached to an Ethernet
device. This updates our dt-bindings doc to add the old DT bindings.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add a driver for the PowerPC Book E watchdog driver that is present on a
number of Freescale/NXP SoCs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The SELI8 design is a new tdm service unit card for Hitachi-Powergrids
XMC and FOX product lines.
It is based on NXP LS1021 SoC and it provides following interfaces:
- IFC interface for NOR, NAND and external FPGA's
- 1 x RGMII ETH for debug purposes
- 2 x SGMII ETH for management communication via back-plane
- 1 x uQE HDLC for management communication via back-plane
- 1 x I2C for peripheral devices
- 1 x SPI for peripheral devices
- 1 x UART for debug logging
It is foreseen that the design will be later re-used for another XMC and
FOX service cards with similar SoC requirements.
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Matteo Ghidoni <matteo.ghidoni@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Includes DT definition for the following serdes protocols using various
PHY cards: 85xx, 13xx, 65xx, 9999, 7777.
Note that the default device tree for QDS now uses 85xx.
Enabling any of the others requires patching the fsl-ls1028a-qds.dtsi
file (the includes at the bottom of the file).
The phy-handle is specified as a path rather than a label because it is
possible to use the #include multiple times (meaning that more than one
PHY riser card of one type is inserted), and therefore, there would be
duplicate labels with the same name.
LBRW means that the board needs lane B rework before using this dtsi.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support for the DW PCIe controller found in the Amlogic Meson AXG and
G12 (G12A, G12B, SM1) SoCs.
This uses the common DW PCIe helpers introducted previously.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
With the introduction of pcie_dw_rockchip, and need to support the DW PCIe in the
Amlogic AXG & G12 SoCs, most of the DW PCIe helpers would be duplicated.
This introduce a "common" DW PCIe helpers file with common code merged from the
dw_ti and dw_rockchip drivers and adapted to fit with the upcoming dw_meson.
The following changes will switch the dw_ti and dw_rockchip to use these helpers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Green Wan <green.wan@sifive.com>
[bmeng: remove the blank line at EOF of drivers/pci/pcie_dw_common.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
An entry is missing in the FSP-S devicetree bindings, and as a result
the description for the next few following entries is off by one line.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Most modern OpenSSL engines have methods overridden at the EVP level rather
than at RSA level, to make these engines work properly with mkimage, the RSA
signing code needs to switch to using EVP_* APIs as much as possible.
Signed-off-by: Donald Chan <hoiho@lab126.com>
[trini: Rebase on top of keyfile changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
OP-TEE images are normally packaged with
type = "tee;
os = "tee";
However, fit_image_load() thinks that is somehow invalid. However if
they were declared as type = "kernel", os = "linux", fit_image_load()
would happily accept them and allow the boot to continue. There is no
technical limitation to excluding "tee".
Allowing "tee" images is useful in a boot flow where OP-TEE is
executed before linux.
In fact, I think it's unintuitive for a "load"ing function to also do
parsing and contain a bunch ad-hoc heuristics that only its caller
might know. But I don't make the rules, I just write fixes. In more
polite terms: refactoring the fit_image API is beyond the scope of
this change.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Consider the following FIT:
images {
whipple {};
};
configurations {
conf-1 {
firmware = "whipple";
};
};
Getting the 'firmware' image with fit_image_load() is not possible, as
it doesn't understand 'firmware =' properties. Although one could pass
IH_TYPE_FIRMWARE for 'image_type', this needs to be converted to a
"firmware" string for FDT lookup -- exactly what this change does.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'firmware' property of a config node takes precedence over the
'kernel' property. 'standalone' is deprecated. However, give users a
couple of releases where 'standalone' still works, but warns loudly.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
U-Boot expects the FDT to be located right after the _end
linker symbol (see fdtdec.c: board_fdt_blob_setup())
The "basic" LOAD_FIT path is aware of this limitation, and relocates
the FDT at the expected location. Guessing the expected location
probably only works reliably on 32-bit arm, and it feels like a hack.
One proposal would be to pass the FDT address to u-boot
(e.g. using 'r2' on arm platforms).
The variable is named "fdt_hack" to remind future contributors that,
"hey! we should fix the underlying problem". However, that is beyond
the scope of this patch.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The information on the OS should be contained in the FIT, as the
self-explanatory "os" property of a node under /images. Hard-coding
this to U_BOOT might send us down the wrong path later in the boot
process.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The correct FDT to use is described by the "fdt" property of the
configuration node. When the fit_unamep argument to fit_image_load()
is "fdt", we get the "/images/fdt" node. This is incorrect, as it
ignores the "fdt" property of the config node, and in most cases,
the "/images/fdt" node doesn't exist.
Use NULL for the 'fit_unamep' argument. With NULL, fit_image_load()
uses the IH_TYPE_FLATDT value to read the config property "fdt",
which points to the correct FDT node(s).
fit_image_load() should probably be split into a function that reads
an image by name, and one that reads an image by config reference. I
don't make those decisions, I just point out the craziness.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Several architectures had a default board_fit_config_name_match already;
this provides a generic weak version. We default to rejecting all configs.
This will use the FIT's default config, instead of the first config. This
may result in boot failures if there are multiple configurations and the
first config is *not* the default.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
The new correct way to load an FPGA image is to declare it in the list
of "loadables". multi-with-fpga.its used the now deprecated "fpga"
property. Since this example most likely intended to use u-boot's
generic FPGA loading code, compatible = "u-boot,fpga-legacy" is also
appropriate here.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The "simple" SPL_LOAD_FIT path is the most compliant with the format
documented in doc/uImage.FIT/source_file_format.txt. The other two
paths to load a FIT are SPL_LOAD_FIT_FULL and the "bootm" command.
Since the Kconfig menu is the most likely place for a new user to see
these options, it seems like the most logical candidate to document
the limitations. This documents the _known_ issues, and is not
intended to be a complete list of all follies.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 4afc4f37c7 ("doc: FIT image: Clarify format and simplify
syntax") and delegated FPGA images to be added via the list of
"loadables" in lieu of the "fpga" property. Now actually implement
this in code.
Note that the "compatible" property is ignored for the time being, as
implementing "compatible" loading is beyond the scope of this change.
However, "u-boot,fpga-legacy" is accepted without warning.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Commit 4afc4f37c7 ("doc: FIT image: Clarify format and simplify
syntax") requires that FPGA images be referenced through the
"loadables" in the config node. This means that "fpga" properties in
config nodes are deprecated.
Given that there are likely FIT images which use "fpga", let's not
break those right away. Print a warning message that such use is
deprecated, and give users a couple of releases to update their
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The FPGA loading code in spl_simple_fit_read() can easily be separated
from the rest of the logic. It is split into two functions instead of
one because spl_fit_upload_fpga() is used in a subsequent patch.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 4afc4f37c7 ("doc: FIT image: Clarify format and simplify
syntax") introduced a "compatible" property for loadable images.
It did not define its contents. Use "u-boot,fpga-legacy" compatible
string to specify that fpga_load() should be used to load the image.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
spl_load_fit_image() will try to load an image at the address given
in the "load" property. Absent such property, it uses
image_info->load_addr
Correct use of this is demonstrated in spl_fit_append_fdt(), which
resets the 'load_addr' before each spl_load_fit_image() call.
On the other hand loading "loadables" loop in spl_load_simple_fit()
completely ignores this. It re-uses the same structure, but doesn't
reset load_addr. If loadable [i] does not have a "load" property, its
load address defaults to load_addr, which still contains the address
of loadable [i - 1].
A simple solution is to treat NULL as an invalid load address. The
caller can set load_addr = 0 to request an abort if the "load"
property is absent.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Originally, the ECDSA code path used 'keydir' as the key filename.
mkimage has since been updated to include a new 'keyfile' argument.
Use the new argument for passing in the key.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Keys can be derived from keydir, and the "key-name-hint" property of
the FIT. They can also be specified ad-literam via 'keyfile'. Update
the ECDSA signing path to use the appropriate one.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Keys can be derived from keydir, and the "key-name-hint" property of
the FIT. They can also be specified ad-literam via 'keyfile'. Update
the RSA signing path to use the appropriate one.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's not always desirable to use 'keydir' and some ad-hoc heuristics
to get the filename of the signing key. More often, just passing the
filename is the simpler, easier, and logical thing to do.
Since mkimage doesn't use long options, we're slowly running out of
letters. I've chosen '-G' because it was available.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After lots of debating, this documents how we'd like mkimage to treat
'keydir' and 'keyfile' arguments. The rest is in the docs.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a test to make sure that the ECDSA signatures generated by
mkimage can be verified successfully. pyCryptodomex was chosen as the
crypto library because it integrates much better with python code.
Using openssl would have been unnecessarily painful.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We wish to use pycryptodomex to verify code paths involving ECDSA
signatures. Add it to requirements.txt so that they get picked up
automatically .gitlab and .azure tasks
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
mkimage supports rsa2048, and rsa4096 signatures. With newer silicon
now supporting hardware-accelerated ECDSA, it makes sense to expand
signing support to elliptic curves.
Implement host-side ECDSA signing and verification with libcrypto.
Device-side implementation of signature verification is beyond the
scope of this patch.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
fdt_add_bignum() is useful for algorithms other than just RSA. To
allow its use for ECDSA, move it to a common file under lib/.
The new file is suffixed with '-libcrypto' because it has a direct
dependency on openssl. This is due to the use of the "BIGNUM *" type.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
rsa-checksum.c sontains the hash_calculate() implementations. Despite
the "rsa-" file prefix, this function is useful for other algorithms.
To prevent confusion, move this file to lib/, and rename it to
hash-checksum.c, to give it a more "generic" feel.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In case exit is called in a script without parameter, the command
returns -2 ; in case exit is called with a numerical parameter,
the command returns -2 and lower. This leads to the following problem:
=> setenv foo 'echo bar ; exit 1' ; run foo ; echo $?
bar
0
=> setenv foo 'echo bar ; exit 0' ; run foo ; echo $?
bar
0
=> setenv foo 'echo bar ; exit -2' ; run foo ; echo $?
bar
0
That is, no matter what the 'exit' command argument is, the return
value is always 0 and so it is not possible to use script return
value in subsequent tests.
Fix this and simplify the exit command such that if exit is called with
no argument, the command returns 0, just like 'true' in cmd/test.c. In
case the command is called with any argument that is positive integer,
the argument is set as return value.
=> setenv foo 'echo bar ; exit 1' ; run foo ; echo $?
bar
1
=> setenv foo 'echo bar ; exit 0' ; run foo ; echo $?
bar
0
=> setenv foo 'echo bar ; exit -2' ; run foo ; echo $?
bar
0
Note that this does change ABI established in 2004 , although it is
unclear whether that ABI was originally OK or not.
Fixes: c26e454dfc
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Tom Rini <trini@konsulko.com>
Call the translation function on the ofnode_read_resource result only
when the livetree is not activated.
Today of_address_to_resource() calls ofnode_read_resource() for livetree
support and fdt_get_resource() when livetree is not supported.
The fdt_get_resource() doesn't do the address translation
so when it is required when livetree is activated but this address
translation is already done by ofnode_read_resource().
Fixes: 240720e905 ("firmware: scmi: mailbox/smt agent device")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This is the only driver that uses this function. Update it to use the
alternative which is dm_gpio_clrset_flags().
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Harm Berntsen <harm.berntsen@nedap.com>
Select CMD_QFW and QFW_MMIO in the qemu-arm board (covers arm and
arm64).
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add MMIO driver for QFW.
Note that there is no consumer as of this patch.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A sandbox driver and test are added for the qfw uclass, and a test in
QEMU added for qfw functionality to confirm it doesn't break in real
world use.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We move qfw into its own uclass and split the PIO functions into a
specific driver for that uclass. The PIO driver is selected in the
qemu-x86 board config (this covers x86 and x86_64).
include/qfw.h is cleaned up and documentation added.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Align the MMU area for SCMI shared buffer on section size;
use the ALIGN macro in mmu_set_region_dcache_behaviour call.
Since commit d877f8fd0f ("arm: provide a function for boards init
code to modify MMU virtual-physical map") the parameter of
mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE
aligned.
Fixes: 240720e905 ("firmware: scmi: mailbox/smt agent device")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Skip the processing of *.aml and *.dat files while iterating through the
source in order to process header files.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
strn(cat|cpy) has a bad habit of not nul-terminating the destination,
resulting in constructions like
strncpy(foo, bar, sizeof(foo) - 1);
foo[sizeof(foo) - 1] = '\0';
However, it is very easy to forget about this behavior and accidentally
leave a string unterminated. This has shown up in some recent coverity
scans [1, 2] (including code recently touched by yours truly).
Fortunately, the guys at OpenBSD came up with strl(cat|cpy), which always
nul-terminate strings. These functions are already in U-Boot, so we should
encourage new code to use them instead of strn(cat|cpy).
[1] https://lists.denx.de/pipermail/u-boot/2021-March/442888.html
[2] https://lists.denx.de/pipermail/u-boot/2021-January/438073.html
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This fixes several uses of strn(cpy|cat) which did not terminate their
destinations properly.
Fixes de1728ce4c ("fastboot: Allow u-boot-style partitions")
Reported-by: Coverity Scan
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This test is adapted from glibc, which is very concerned about alignment.
It also tests strlcpy by dependency.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This introduces strlcat, which provides a safer interface than strncat. It
never copies more than its size bytes, including the terminating nul. In
addition, it never reads past dest[size - 1], even if dest is not
nul-terminated.
This also removes the stub for dwc3 now that we have a proper
implementation.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
strlcpy should always return the number of bytes copied. We were
accidentally missing the nul-terminator. We also always used to return a
non-zero value, even if we did not actually copy anything.
Fixes: 23cd138503 ("Integrate USB gadget layer and USB CDC driver layer")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Right now the error messages when optee has a version mismatch or shared
memory is not configured are done with a debug().
That's not very convenient since you have to enable debugging to figure
out what's going on, although this is an actual error.
So let's switch the debug() -> dev_err() and report those explicitly.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
serial_reinit_all() is only available if CONFIG_SERIAL is defined (i.e.
!CONFIG_DM_SERIAL).
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
stdio_dev methods have taken a pointer to themselves since 709ea543
(nearly 7 years ago).
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for rtc3028 rtc from microcrystal.
based on linux dirver:
commit a38fd8748464: ("Linux 5.12-rc2")
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Add local variables agent0/agent1 to refer to SCMI sandbox context
agent and ease readability of the test.
For consistency, rename regul_dev to regul0_dev and remove sandbox_voltd
in dm_test_scmi_voltage_domains().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix inline comments and empty line in scmi driver and test files.
Remove test on IS_ENABLED(CONFIG_*_SCMI) in test/dm/scmi.c since these
configuration are expected enabled when CONFIG_FIRMWARE_SCMI is enabled
in sandbox configuration.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Implement voltage regulators interfaced by the SCMI voltage domain
protocol. The DT bindings are defined in the Linux kernel since
SCMI voltage domain and regulators patches [1] and [2] integration
in v5.11-rc7.
Link: [1] 0f80fcec08
Link: [2] 2add5cacff
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The gpt command require the GPT backup header at the standard location
at the end of the device. Check the alternate LBA value before reading
the GPT backup header from the last usable LBA of the device.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If there were no variable substitutions in a command, then initial
assignments would be misinterpreted as commands, instead of being skipped
over. This is demonstrated by the following example:
=> foo=bar echo baz
Unknown command 'foo=bar' - try 'help'
Signed-off-by: Sean Anderson <seanga2@gmail.com>
For all other erase failures, the fail_addr is updated with the
failing address. Only in the case of erase failure due to bad block
detection, the fail_addr is not updated. This change simply updates
the fail_addr for this specific scenario so that it is consistent with
the rest of the code.
Signed-off-by: Farhan Ali <farhan.ali@broadcom.com>
On ARMv8 systems
load mmc 0:1 $loadaddr vmlinuz-5.10.0-3-arm64
booti
leads to a hanging system requiring to physically reset the system:
FDT and ATAGS support not compiled in - hanging
### ERROR ### Please RESET the board ###
For systems where physical access is difficult hanging is a poor choice.
It is preferable to reset the system when U-Boot reaches a state that is
not recoverable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Similar to support for SHA1 and SHA256, allow the use of hardware hashing
engine by enabling the algorithm and setting CONFIG_SHA_HW_ACCEL /
CONFIG_SHA_PROG_HW_ACCEL.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Checkpatch complains about:
ERROR: "foo * bar" should be "foo *bar"
and
CHECK: Alignment should match open parenthesis
Signed-off-by: Joel Stanley <joel@jms.id.au>
The optee_copy_fdt_nodes is only used to copy op-tee nodes
of U-Boot device tree (from gd->fdt_blob when OF_LIVE is not activated)
to external device tree but it is not compatible with OF_LIVE.
This patch migrates all used function fdt_ functions to read node on
old_blob to ofnode functions, compatible with OF_LIVE and remove this
parameter "old_blob".
The generated "device tree" is checked on stm32mp platform with OF_LIVE
activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add power_max77696_init() function.
Since warp doesn't support DM, the keeping its code in board file is
better than maintainig the file of driver.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
The test adds two pinmux nodes to the device tree, one to test when a
register changes only one pin's mux (pinctrl-single,pins), and the other
to test when more than one pin's mux is changed (pinctrl-single,bits).
This required replacing the controller's register access functions when
the driver is used on sandbox.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
It allows to display the muxing of a given pin. Inspired by more recent
versions of the Linux driver, in addition to the address and the value
of the configuration register I added the pin function retrieved from
the DT. In doing so, the information displayed does not depend on the
platform, being a generic type driver, and it can be useful for debug
purposes.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The configuration of pinmux registers was implemented with duplicate
code which can be removed by adding two functions for read/write access.
Access to 8-bit registers has also been added.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch is inspired by more recent versions of the Linux driver.
Replacing the default value 0xffffffff of the function mask with 0 is
certainly more conservative in case the "pinctrl-single,function-mask"
DT property is missing.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
In more recent versions of the Linux kernel the driver's probe function
returns an error if the "pinctrl-single,register-width" DT property is
missing. The lack of this information, in fact, does not allow to know
whether to access the registers of the controller at 8, 16, ... bits.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use dev_read_addr_size to get size of the controller's register area.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
The dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", ®, val); prints the 'reg'
address preceded by the prefix 0x0x instead of 0x. This because the
printf '%pa' format specifier already prepends the prefix '0x' to the
address displayed.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
The pinmux configuration DT node of a peripheral does not define a
physical address but an offset. Only by adding it to the base address of
the controller it is possible to calculate the physical address of the
register to be configured. Printing an offset also requires a different
formatting option than a physical address.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
The 'n' variable is used as a loop counter, not as a physical address,
and is used in a comparison with an int. So it makes sense to change
its type from phys_addr_t to int.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
A previous patch had removed the GPIO nodes from being built
into the SPL Device tree, but CONFIG_SPL_GPIO_SUPPORT remained
which makes the MMC card detect fail and the board does not boot.
Fix this by disabling CONFIG_SPL_GPIO_SUPPORT.
Fixes: 6f1efe81aa ("configs: omap3/35_logic and omap3/35_logic_somlv: Reduce SPL size")
Signed-off-by: Adam Ford <aford173@gmail.com>
- rk3399 eDP support
- pwm backlight without a known period_ns
- add Chrome OS EC PWM driver
- Kconfig SIMPLE_PANEL DM_GPIO dependency
- remove mb862xx driver remnants
- fix KiB format in reserve_video() debug trace
- fix tegra124 sor CSTM LVDS_EN_ENABLE/DISABLE config
- fix line padding calculation for 16 and 24 BPP bitmaps
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Each row in the pixel array in the bitmap file is padded
if necessary so the row size is always a multiple of 4 bytes.
In current code the complement of row size to a multiple of
4 bytes is further unnecessarily multiplied by the pixel size.
This results in incorrect displaying of bitmaps having row size
that is not a multiple of 4 bytes. Fix this by removing
the unnecessary multiplication.
Tested with 24BPP bitmap and XRGB32 display.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Bitwise OR has a higher operator precedence than the ternary conditional.
Add the missing parentheses.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Update the debug trace for the reserved video memory to KB as indicated
in the message with "%luk"; before the patch the computed size
gd->relocaddr - addr is in bytes.
This patch aligns the debug trace in reserve_video() with others
functions, for example on stm32mp157c-dk2:
- Reserving 3080192k for video at: dfd00000
+ Reserving 3008k for video at: dfd00000
Reserving 873k for U-Boot at: dfc25000
Reserving 32776k for malloc() at: ddc23000
Reserving 72 Bytes for Board Info at: ddc22fb0
Reserving 280 Bytes for Global Data at: ddc22e90
Reserving 119072 Bytes for FDT at: ddc05d70
Reserving 0x278 Bytes for bootstage at: ddc05af0
Fixes: 5630d2fbc5 ("board: Show memory for frame buffers")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
drivers/video/mb862xx.c was removed in commit
9c1e098fb9 from December 2020, however, this
last little remnant in drivers/video/cfb_console.c remained.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
SIMPLE_PANEL currently only depends on PANEL && BACKLIGHT, but the code
makes references to dm_gpio_set_value and gpio_request_by_name. These
are defined in drivers/gpio/gpio-uclass.c, so a dependency on DM_GPIO
corrects these link errors:
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight':
/home/kameliya/u-boot/drivers/video/simple_panel.c:42: undefined reference to `dm_gpio_set_value'
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight':
/home/kameliya/u-boot/drivers/video/simple_panel.c:27: undefined reference to `dm_gpio_set_value'
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_of_to_plat':
/home/kameliya/u-boot/drivers/video/simple_panel.c:72: undefined reference to `gpio_request_by_name'
This issue is only exposed if you have a board which enables
CONFIG_DM_VIDEO without CONFIG_DM_GPIO; so far, none do, but soon a QEMU
board may.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
This PWM is used in rk3399-gru-bob and rk3399-gru-kevin to control
the display brightness. We can only change the duty cycle, so on
set_config() we just try to match the duty cycle that dividing duty_ns
by period_ns gives us. To disable, we set the duty cycle to zero while
keeping the old value for when we want to re-enable it.
The cros_ec_set_pwm_duty() function is taken from Depthcharge's
cros_ec_set_bl_pwm_duty() but modified to use the generic pwm type.
The driver itself is very loosely based on rk_pwm.c for the general pwm
driver structure.
The devicetree binding file is from Linux, before it was converted to
YAML at 5df5a577a6b4 ("dt-bindings: pwm: Convert google,cros-ec-pwm.txt
to YAML format") in their repo.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The PWM device provided by Chrome OS EC doesn't really support anything
other than setting a relative duty cycle. To support it as a backlight,
this patch makes the PWM period optional in the device tree and pretends
the valid brightness range is its period_ns.
Also adds a sandbox test for a PWM channel that has a fixed period,
checking that the resulting duty_cycle matches on a set_config() even if
the requested period_ns can't be set.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them. As the P5020 is the last ARCH_P5020 platform, remove that
support as well.
Cc: Andy Fleming <afleming@gmail.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
These boards have not been converted to CONFIG_DM_MMC, along with other
DM conversions, by the deadline. Remove them.
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
These boards have not been converted to CONFIG_DM_MMC, along with other
DM conversions, by the deadline. Remove them.
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it. It is also the only ARCH_T2081 board so remove that support
as well.
Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Thomas Weber <weber@corscience.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
These boards have not been converted to CONFIG_DM by the deadline.
Remove them.
Cc: Steve Rae <steve.rae@raedomain.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Erik van Luijk <evanluijk@interact.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Eddy Petrișor <eddy.petrisor@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The mvsata_ide driver was due for DM conversion by v2019.07. As that
has long passed, remove the driver and disable it in the boards which
had enabled it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. In order to
convert to using the DWC SATA driver under DM further migrations are
required.
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Signed-off-by: Tom Rini <trini@konsulko.com>
The dwc ahsata driver is written such that CONFIG_BLK must be enabled,
add this as a dependency in Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable the AHCI and BLK features to complete migration of various
drivers.
Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Although ptr arithmetics are allowed with extensions in gcc, they
are not allowed by the C spec. So switch to (void *)(uintptr_t) instead
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Show short arguments along with long arguments in online help:
$ tools/mkeficapsule -h
Usage: mkeficapsule [options] <output file>
Options:
-f, --fit <fit image> new FIT image file
-r, --raw <raw image> new raw image file
-i, --index <index> update image index
-I, --instance <instance> update hardware instance
-K, --public-key <key file> public key esl file
-D, --dtb <dtb file> dtb file
-O, --overlay the dtb file is an overlay
-h, --help print a help message
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fix the build warning when building for 32 bit systems by using the
length modifier for size_t.
lib/efi_loader/efi_esrt.c: In function ‘efi_esrt_populate’:
include/efi_loader.h:126:8: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 8 has type ‘size_t’ {aka ‘unsigned int’} [-Wformat=]
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable building of the crypto helper functions used during capsule
authentication by selecting IMAGE_SIGN_INFO.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* UEFI spec 2.9 introduced a new memory type EFI_UNACCEPTED_MEMORY_TYPE.
Add it to enum EFI_MEMORY_TYPE.
* Add missing EFI_MEMORY_CPU_CRYPTO constant
* Improve description of EFI_PERSISTENT_MEMORY_TYPE
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Replace static function efi_get_device_handle_info() by a simplified
function efi_get_device_path_text() avoiding EFI_CALL().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since that invlolves external projects and not only U-Boot, add guidance
for supported platforms
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Avoid 'make htmldocs' build warnings:
./include/linker_lists.h:224: warning:
Function parameter or member '_type' not described in 'll_entry_ref'
./include/linker_lists.h:224: warning:
Function parameter or member '_name' not described in 'll_entry_ref'
./include/linker_lists.h:224: warning:
Function parameter or member '_list' not described in 'll_entry_ref'
Fixes: 851144350b ("linker_lists: Allow use in data structures")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
* Avoid a warning: "Incorrect use of kernel-doc format".
* Remove duplicate text.
* Clarify usage of EFI_SETTING_VIRTUAL_ADDRESS_MAP.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now file_fat_detectfs() did not detect some interface types like
EFI, HOST, VIRTIO.
Avoid duplicate code by calling blk_get_if_type_name().
The interface type now will be shown in lower case to match all other use
cases.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
get_var() is defined statically in efi_bootmgr.c and doesn't properly
check a buffer allocation. Remove it completely and use the exported
function from efi_var_common.c that does the same thing
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Document the command line options for efidebug and initrd loading
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Rewiewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In order to ensure that the VOP registers are in correct state,
add missing support for the VOP reset lines found in the device-tree
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
In order to ensure that the eDP registers are in correct state,
add missing support for the eDP reset lines found in the device-tree.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
The debug string printing the device name, framebuffer address and of node
is using %lu as format for the framebuffer address, which is not so nice.
Change it to %lx.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
In the code, the default polarity is set to positive/positive,
which is neither normal polarity or inverted polarity. It's
only the hardware default. This leads to booting linux with
wrong polarity setting.
Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE
by default instead.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
- uboot rockchip edp code is looking for a rockchip,panel property
for the edp dts node, so add it.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
When booting with EFI and graphics, the memory used for framebuffer
has to be reserved, otherwise it may leads to kernel memory
overwrite.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
The linux code is setting polarity configuration to 3 but
uboot code is setting it to 1. Change the configuration to match the
linux configuration
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP
support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399
eDP IPs are nearly the same, the difference is in the grf register
(SOC_CON6 versus SOC_CON20). So, change the code to use the right
register on each IP.
The clocks don't seem to be the same, the eDP clock is not at index 1
on rk3399, so don't try changing the clock at index 1 to rate 0 on
rk3399.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
The current code is using an hard coded enum and the of node reg value of
endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order
is different between rk3288, rk3399 vop little, rk3399 vop big.
A possible solution would be to make sure that the rk3288.dtsi and
rk3399.dtsi files have "expected" reg value or an other solution is
to find the kind of endpoint by comparing the endpoint compatible value.
This patch is implementing the more flexible second solution.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
Add FIP header support for STM32programmer
Update uart number when no serial device found for STM32MP1
Remove board_check_usb_power function when ADC flag is not set
Update SPL size limitation for STM32MP1
Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
Split up get_soc_name(), clean the decoding up a bit, and set up
environment variables which contain the SoC type, package, revision.
This is useful on SoMs, where multiple SoC options are populated.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
A now removed comment promises to "limit SYSRAM usage to first 128 KB".
This would imply that only SYSRAM from 0x2ffc0000 - 0x2ffe0000 would be
used. This is not what happens at all.
First, SPL_MAX_SIZE is referenced from SPL_TEXT_BASE, which on all
existing configs is set to 0x2ffc2500, not SYSRAM_BASE (0x2ffc0000).
Some of it is in the first 128 KiB and some of it is in the second
128 KiB chunk of SYSRAM.
Second, SPL_MAX_SIZE, does not restrict the BSS size. While a valiant
attempt is made via SPL_BSS_MAX_SIZE, the value of 0x00100000 is much
larger than SYSRAM, and doesn't account for the non-BSS sections.
Because we're putting the .text and .bss in the same boat, the correct
way to limit them together is via SPL_MAX_FOOTPRINT. With the current
SPL_TEXT_BASE, we couldn't limit even a very basic SPL to the first
128 KiB, and there is no technical reason to do so. Because of this,
simply allow the SPL to use all SYSRAM.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
CONFIG_SPL_BSS_START_ADDR is only used on a few mach- linker scripts.
stm32mp1 uses the generic script under arch/arm/cpu/u-boot-spl.lds,
which does not make use of this definition.
The SPL BSS starts in SRAM, right after .text, .rodata, .data, and
.u_boot_list. A very short version of the STM32MP1 memory map is:
* SYSRAM: 2ffc0000 - 30000000 <- all of SPL is here
* DRAM: c0000000+
0xC0200000 is a DRAM address, and has nothing to do with SPL. It is
just very misleading to have it next to CONFIG_SPL_BSS_MAX_SIZE, or to
have it at all.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Since commit 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer for
loading images"), FIT images must be malloc()'d before being loaded.
The old size of 1 MiB is suitable for FIT images with u-boot and an
FDT, but something containing a linux kernel is almost sure to fail.
It's safe to extend malloc all the way to 0xc2000000, but no further.
Linux likes to be loaded at 0xc2000000, so we use that as our cutoff
point. This gives us 29 MiB of malloc() space, which suited for more
complex FIT images including several DTBs, kernel, and OP-TEE images.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Simplify the code of the function board_check_usb_power
based in CONFIG_ADC and adc_measurement; the function is removed by the
linker when the CONFIG_ADC is not activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Replace the remaining printf in setup_boot_mode() by log macro
to handle filtering for log features.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Align the uart number in the trace of setup_boot_mode() with the name of
the uart/usart device (start at 1) and not with the instance value
(start at 0), i.e. the serial device sequence number and the index in
serial_addr[].
Fixes: f49eb16c17 ("stm32mp: stm32prog: replace alias by serial
device sequence number")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support of TF-A FIP header in command stm32prog for all the boot
partition and not only the STM32IMAGE.
This patch is a preliminary patch to support FIP as second boot stage
after TF-A BL2 when CONFIG_TFABOOT is activated for trusted boot chain.
The FIP is archive binary loaded by TF-A BL2, which contains the secure OS
= OP-TEE and the non secure firmware and device tree = U-Boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
7" OF is a capacitive touch 7" Open Frame panel solutions with
- 7" AUO B101AW03 LVDS panel
- EDT, FT5526 Touch
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0
7" Open Frame Solution board.
Linux dts commit details:
commit <1d278204cbaa> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 7" OF")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
Genaral features:
- Ethernet 10/100
- USB Type A
- Audio Out
- microSD
- LVDS panel connector
- Wifi/BT (option)
- UMTS LTE with sim connector (option)
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
Linux dts commit details:
commit <f838dae7afd0> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 board")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S
MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.
Linux dts commit details:
commit <0be81dfaeaf8> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
SoM")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
Linux dts commit details:
commit <6ca2898df59f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
C.TOUCH 2.0")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
Linux dts commit details:
commit <adc0496104b6> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
EDIMM2.2 Starter Kit")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157A
- Up to 1GB DDR3L
- 4GB eMMC
- 10/100 Ethernet
- USB 2.0 Host/OTG
- I2S
- MIPI DSI to LVDS
- rest of STM32MP157A features
i.Core STM32MP1 needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Linux commit details:
commit <30f9a9da4ee1> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
SoM")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
strsep will change data from original memory address,
in case the memory is in non-sdram/sram place, will
run into a bug(hang at SDRAM: )
just add a temporary array to store bank_name[] to fix this
bug.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patchset has following changes:
- introduce stm32h750.dtsi to support stm32h750 value line
- add pin groups for usart3/uart4/spi1/sdmmc2
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750i-art-pi.dts to support art-pi board
- add stm32h750i-art-pi-u-boot.dtsi to support art-pi board (u-boot)
art-pi board component:
- 8MiB qspi flash
- 16MiB spi flash
- 32MiB sdram
- ap6212 wifi&bt&fm
the detail board information can be found at:
https://art-pi.gitee.io/website/
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch is intend to add support stm32h750 value line,
just add stm32h7-pinctrl.dtsi for extending, with following changes:
- rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi
- move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi
- update stm32h743i-{disco, eval}.dts to include stm32h7-pinctrl.dtsi
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
As different boards has their own sdram hw connection, mount different
sdram modules, so move sdram timing parameter and pin configuration
to their board device tree.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This reverts the arch/arm/mach-imx/imx_bootaux.c changes of commit
805b3cac1e. The loader function name was changed so that it does
not clash with the generically available function in lib/elf.c.
imx-bootaux loads an elf file linked for an auxilary core. Thus the
loader function requires address translation from the auxilary core's
address space to where those are mapped into U-Boot's address space.
So the elf loader is specific and must not be replaced with a generic
loader which doesn't provide the address translation functionality.
Fixes commit 805b3cac1e ("lib: elf: Move the generic elf
loading/validating functions to lib")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Pass "pfuze3000@8" in pmic_get() so that the PMIC node can
be found in the devicetree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need
around 18ms, common code only delay 10ms, so need to delay extra 8ms.
Otherwise voltage switch will timeout when wait for data0 line.
This IO voltage switch time depends on board design, depend on the
PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF
capacitance.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Common code already handle the voltage switch sequence based on spec,
so remove the redundant voltage switch code.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
sel_input value for the following uart5 pins is
different between i.MX6UL and i.MX6ULL:
MX6_PAD_UART5_TX_DATA__UART5_DTE_RX
MX6_PAD_UART5_RX_DATA__UART5_DCE_RX
MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS
MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS
MX6_PAD_CSI_DATA02__UART5_DCE_RTS
As sel_input value for the second one is fixed by
the previous commit, fix the rest.
Signed-off-by: Yuichiro Goto <goto@k-tech.co.jp>
Document SRC_GPR10 PERSIST_SECONDARY_BOOT functionality. This is useful for
reliable bootloader A/B updates, as it permits switching between two copies
of bootloader at different offsets of the same storage. The switch happens
in case one copy is corrupted OR can be enforced by user. This functionality
is present at least since i.MX53, however is poorly documented in all known
SoC datasheets, hence this document aims to clarify the usage, currently on
i.MX7D and i.MX8MM.
Signed-off-by: Marek Vasut <marex@denx.de> # Original MX7D work, this document
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> # All the MX8M work
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@foundries.io>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Enabled "fsl,legacy-bch-geometry" in U-Boot device tree overlay
to match the legacy BCH geometry layout, which mainline Linux
applies when "fsl,use-minimum-ecc" is not specified in the device
tree.
Reinstated SYS_NAND_ONFI_DETECTION, which when disabled, masked
the mismatch on SOMs with Winbond NAND flash chips.
Signed-off-by: Niel Fourie <lusus@denx.de>
Convert the Olimex Olinuxino board's support for MMC to driver model following
Fabio Estevam's excellent example from:
commit: 23013aa961:
mx23evk: Convert to driver model
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Add the dts file for the Olimex Olinuxino from the linux kernel, and enable
its use in this machine's defconfig.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these
are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the
card clock output.
After commit b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0() support"),
we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because
the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during
voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON,
after CMD11, hardware will gate off the card clock automatically, so card do
not detect the clock off/on behavior, so will draw the data0 line low until
next command.
Fixes: b5874b552f ("mmc: fsl_esdhc_imx: add wait_dat0() support")
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Enable DM block, DM MMC and DM SATA support on iMX6 Udoo
convert board code to match the DM support.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
It doesn't make much sense to have two separate configs for
the riotboard so let's merge the SPL config into the main one
for less duplication.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
While initializing dram in spl_dram_init(), mdelay() is called that in
order calls get_ticks() that verifies if timer exists, if doesn't, it
throws a panic(), but since preloader_console_init() has still not been
called those panic()s will fail. This doesn't help debugging, so let's
setup console before calling spl_dram_init() by moving it after
spl_dram_init().
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
While initializing dram in spl_dram_init(), mdelay() is called that in
order calls get_ticks() that verifies if timer exists, if doesn't, it
throws a panic(), but since preloader_console_init() has still not been
called those panic()s will fail. This doesn't help debugging, so let's
setup console before calling spl_dram_init() by moving it after
spl_dram_init().
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
While initializing dram in spl_dram_init(), mdelay() is called that in
order calls get_ticks() that verifies if timer exists, if doesn't, it
throws a panic(), but since preloader_console_init() has still not been
called those panic()s will fail. This doesn't help debugging, so let's
setup console before calling spl_dram_init() by moving it after
spl_dram_init().
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Fix an URL for downloading the SCFW binary for an Apalis iMX8X
and improve u-boot image build instructions.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Since Toradex provides the full set of overlays for Linux kernel
for display interfaces for both Apalis iMX6Q and Colibri iMX6DL
modules, the video= settings are obsolete. Remove them.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
All the other boards have tdxargs specified for setting manual kernel
command-line arguments. Add them also to NAND-based boards.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
commit 03f1f78a9b ("spl: fit: Prefer a malloc()'d buffer for loading images")'
changed the way buffer allocation worked for SPL to a more flexible
method.
For venice this caused breakage that is resolved by increasing the size
of CONFIG_SYS_SPL_MALLOC_SIZE as the current FIT slighly exceeds 512KiB.
Additionally remove the unnecessary comment on CONFIG_SPL_BSS_MAX_SIZE
and CONFIG_SYS_SPL_MALLOC_SIZE as the size is obvious from the define.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
use dm_i2c_probe instead of i2c_get_chip which appears to be more
reliable.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Enable driver model for MTD and NAND support allowing us to remove
the iomux, init, and most of the static configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Enable driver model support for MMC and SATA.
Note that DM_MMC requires aliases for your mmc devices so
they are added to the dts. Linux does not support enumerating mmc
devices by alias so these are not present in the Linux dts.
Note that we still need board_mmc_init() and board_mmc_getcd() for
not DM SPL to support MMC.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Enable dm support for USB (which also requires dm support for fixed
regulators used for vbus enable) and remove usb iomux which is no
longer needed.
We can remove the handling of otgpwr_en gpio as this is defined in
dt as usbotg vbus-supply but we need to keep the handling of
USB_HUB_RST# for boards that have a USB HUB as that isn't defined in
the dt's currently.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Once the IMX6 pinctrl driver is added UART is fully using driver mode
so we no longer need to config and initialize it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
In preparation for dm conversion convert to OF_CONTROL by adding FIT image
support and multi dtb.
Add a board_fit_config_name_match to match the dtb based off of EEPROM
model.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The fsl-usb dt bindings in Linux default dr_mode to 'host' for
backward compatibility however U-Boot prints an error if
this property does not exist. Declare it in the Gateworks
Ventana device-trees to avoid the error.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add a weak nand_get_mtd function for nand drivers to provide mtd info
and use this to set pagesize such that reading of non page-aligned
elements can succeed.
The spl_load_simple_fit already handles block block access so all we
need to do is provide the nand writesize as the block length.
Further cleanup of the drivers which use nand_spl_loaders.c such as
am335x_spl_bch.c, atmel_nand.c, and nand_spl_simple.c could be done
using info from mtd_info instead of statically defined details.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
commit 9f6a14c47f ("spl: fit: nand: fix fit loading in case of bad blocks")
added support for adjusting the image offset to account for bad blocks.
However this requires nand_spl_adjust_offset() which requires fully defined
specifics of the NAND chip being used may not be avialable.
Allow skipping this support for drivers or configs which don't specify
the NAND chip details statically with defines.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The OCRAM_S is regular memory, just like the OCRAM, add it to the MMU
tables so it can be used and cached.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Previous patch "MLK-18044-4: crypto: caam: Fix pointer size to 32bit
for i.MX8M" breaks the 64 bits CAAM.
Since i.MX CAAM are all 32 bits no matter the ARM arch (32 or 64),
to adapt and not break 64 bits CAAM support, add a new config
CONFIG_CAAM_64BIT and new relevant type "caam_dma_addr_t".
This config is default enabled when CONFIG_PHYS_64BIT is set except
for iMX8M.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The signature is generated using manufacturing protection private key.
Fix typo in fsl_mfgprot.c.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add DEK encapsulation support for imx8. The DEK blob is generated by the
SECO through the SCFW API.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add DEK blob encapsulation support for IMX8M through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application call.
U-boot sends and receives the DEK and the DEK blob binaries through OP-TEE
dynamic shared memory.
To enable the DEK blob encapsulation, add to the defconfig:
CONFIG_SECURE_BOOT=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_DEKBLOB=y
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
It is highly recommended to set the PRIBLOB bitfield to 0x3 once your
encrypted boot image has booted up, this prevents the generation of new
blobs that can be used to decrypt an encrypted boot image. The PRIBLOB is
a sticky type bit and cannot be changed until the next power on reset.
Add the set_priblob_bitfield U-Boot command to prevent the generation of
new blobs.
Signed-off-by: Clement Le Marquis <clement.lemarquis@nxp.com>
Acked-by: Ye Li <Ye.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
- Add Armada 38x RTC driver (Marek)
- turris_omnia: Misc updates (enable RTC and other cmds) (Marek)
- ds414: Misc updates (enable XHCI_PCI USB support etc) (Phil)
- Convert MVEBU MMC driver to DM (Harm)
- kirkwood: Misc updates and cleanups to some boards (Harm)
Add signature with crc32 value for all images in binman node for FIT
image in device tree. And, enable FIT signature checking for Stratix10
and Agilex ATF and VAB sdmmc boot.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Changed to store QSPI reference clock in kHz instead of Hz in
boot scratch cold0 register for Stratix10 and Agilex.
This patch is in preparation for Intel N5X SDRAM driver
support. Reserved 4 bits for Intel N5X SDRAM driver,
and there will be 28 bits to store QSPI reference clock.
Due to limited bits, QSPI reference clock frequency is
converted to kHz from Hz.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Restructure Stratix10 and Agilex handoff code to used by
all SOC64 devices, in preparation to support handoff for
Diamond Mesa.
Remove wrap_pinmux_config_s10.c. Add wrap_handoff_soc64.c
which contains the generic function to parse the handoff
data.
Update system_manager_soc64.c to use generic handoff
function in wrap_handoff_soc64.c.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Rearrange sequence of macros in handoff_soc64.h without any functionality
change. In preparation for Stratix10 and Agilex handoff function
restructuring.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Move Stratix10 and Agilex SPL common code to spl_soc64.c.
We are in preparation for new n5x device support.
No functional change in this patch.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
The uart nodes already provide <clocks> property for the driver to
dynamically calculate the correct clock frequency. There is no need
to keep the hard-coded <clock-frequency> property.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
The RISC-V architecture default value of CONFIG_SYS_MALLOC_F_LEN
(0x1000) would not provide enough memory for devices like mpfs
clock and ns16550 serial to bind well before relocation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings")
adds the official DT bindings for CLINT, which uses "sifive,clint0"
as the compatible string. "riscv,clint0" is now legacy and has to
be kept for backward compatibility of legacy systems.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Provide optimized versions of memcpy(), memmove(), memset() copied from
the Linux kernel.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Provide a unit test for the longjmp() library function
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Sean Anderson <seanga2@gmail.com>
The value returned by setjmp must be nonzero. If zero is passed as
parameter it must be replaced by 1.
This patch reduces the code size a bit.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
In preparation to add SiFive Unmatched board support, let's rename
the existing fu540 board to unleashed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
* enable storing the environment in the SPI flash
* enable EXT4 and FAT file system
* enable hush shell
* run k210_bootcmd as default boot command
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
This adds the necessary bindings. Most of them are already there.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Rick Chen <rick@andestech.com>
The clock subsystem requires that clk_free be called on clocks obtained via
clk_get_*.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is preferred over #if because the compiler can check syntax even if
the feature is disabled. This cannot be used for CONFIG_CLK because
CONFIG_DW_WDT_CLOCK_KHZ is not defined on all platforms.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
log_2_n_round_up is only found in arm. fls performs the same job and is
generic.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In i.MX8M platforms the secure memory block has a newer version
than those used in i.MX6/7 platforms, this patch update the driver
to use the correct registers offsets.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The CAAM block used in i.MX8M is 32 bits address size but when the flag
PHYS_64BIT is enabled for armv8, the CAAM driver will try to use a
wrong pointer size.
This patch fixes this issue.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enabling CAAM driver for i.MX8M platforms, a 64 bits architecture,
lead to casting warnings: from/to pointer to/from integer with
different size. This patch fix these warnings
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
U-Boot can instantiate CAAM RNG if needed by crypto operations.
Call sec_init() prior running a blob operation to ensure
RNG is correctly instantiated.
Make sure CAAM clock is enabled and check if a job ring is
available for that operation.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In order to build CMD_BLOB on i.MX CAAM supported devices it's
necessary to select IMX_HAB. Add IMX_HAB and CAAM supported
SoCs as dependency.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since commit 8891410c729b ("MLK-19848 mx6dq: Fix chip version issue for
rev1.3") it's not possible to call the HAB API functions on i.MX6DQ
SoC Rev 1.3:
Authenticate image from DDR location 0x12000000...
undefined instruction
pc : [<412c00dc>] lr : [<8ff560bc>]
reloc pc : [<c8b6d0dc>] lr : [<178030bc>]
sp : 8ef444a8 ip : 126e8068 fp : 8ff59aa8
r10: 8ffd51e4 r9 : 8ef50eb0 r8 : 006e8000
r7 : 00000000 r6 : 126ea01f r5 : 0000002b r4 : 126e8000
r3 : 412c00dd r2 : 00000001 r1 : 00000001 r0 : 00000063
Flags: nzCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
The hab.h code is defining the HAB API base address according to the
old SoC revision number, thus failing when calling the HAB API
authenticate_image() function.
Fix this issue by using mx6dq rev 1.3 instead of mx6dq rev 1.5.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since cmd_dek is using CAAM JR, so enable the CMD_DEK only when
HAS_CAAM is set
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add some SOC level codes and build configurations to use HAB lib for
CONFIG_IMX_HAB (secure boot), like adding the SEC_CONFIG fuse, enable
fuse driver, CAAM clock function, and add CAAM secure RAM to MMU table.
The FSL_CAAM is temporally not enabled for iMX8M when CONFIG_IMX_HAB is set,
because we don't need the CAAM driver for SPL.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The blob command is not working on i.MX7D, i.MX8MQ and i.MX8MM
devices.
Due to different cache management it's necessary to flush dcache
range for destination address so data can be available in memory.
Add necessary operations in blob_encap() and blob_decap() functions.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The imx8mm has changed the address of rvt_hab, use new address for imx8mm.
The authentication procedure is same as imx8mq. In u-boot, the authentication
uses SIP call to trap ATF to run HAB authenticate.
Users need to add CONFIG_SECURE_BOOT=y to defconfig to enable the feature.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled
the following warnings are displayed:
arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \
of type 'long unsigned int', but argument 3 has type 'uint32_t \
{aka unsigned int}' [-Wformat=]
printf("HAB check target 0x%08x-0x%08lx fail\n",
~~~~^
%08x
ddr_start, ddr_start + bytes);
arch/arm/mach-imx/hab.c:845:45: warning: format '%x' expects argument \
of type 'unsigned int', but argument 3 has type 'ulong \
{aka long unsigned int}' [-Wformat=]
printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
~^
%lx
Fix warnings by providing the correct data type.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.
Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.
=> hab_status m4
Secure boot disabled
HAB Configuration: 0xf0, HAB State: 0x66
No HAB Events Found!
Add command documentation in mx6_mx7_secure_boot.txt guide.
As HAB M4 API cannot be called from A7 core the code is parsing
the M4 HAB persistent memory region. The HAB persistent memory
stores HAB events, public keys and others HAB related information.
The HAB persistent memory region addresses and sizes can be found
in AN12263 "HABv4 RVT Guidelines and Recommendations".
Reviewed-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The HABv4 implementation in ROM checks if HAB major version
in IVT header is 4.x.
The current implementation in hab.c code is only validating
HAB v4.0 and HAB v4.1 and may be incompatible with newer
HABv4 versions.
Modify verify_ivt_header() function to align with HABv4
implementation in ROM code.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add ability for hab_status command to show All HAB events and not just
HAB failure events
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Currently it's not possible to authenticate additional boot images in HAB
open configuration.
The hab.c code is checking if the SEC_CONFIG[1] fuse is programmed prior
to calling the hab_authenticate_image() API function. Users cannot check
if their additional boot images has been correctly signed prior to closing
their device.
Enable hab.c to authenticate additional boot images in open mode so HAB
events can be retrieved through get_hab_status() function.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Modify to use hab_rvt_failsafe function for failsafe ROM API, not
directly call its ROM address. This function will wrap the sip call for iMX8M
platforms.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Calling csf_is_valid() with an un-signed image may lead to data abort
as the CSF pointer could be pointing to a garbage address when accessed
in HAB_HDR_LEN(*(const struct hab_hdr *)(ulong)ivt_initial->csf).
Authenticate image from DDR location 0x80800000...
Check CSF for Write Data command before authenticating image
data abort
pc : [<fff5494c>] lr : [<fff54910>]
reloc pc : [<8780294c>] lr : [<87802910>]
sp : fdf45dc8 ip : 00000214 fp : 00000000
r10: fffb6170 r9 : fdf4fec0 r8 : 00722020
r7 : 80f20000 r6 : 80800000 r5 : 80800000 r4 : 00720000
r3 : 17a5aca3 r2 : 00000000 r1 : 80f2201f r0 : 00000019
Flags: NzcV IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
To avoid such errors during authentication process, validate IVT structure
by calling validate_ivt function which checks the following values in an IVT:
IVT_HEADER = 0x4X2000D1
ENTRY != 0x0
RES1 = 0x0
DCD = 0x0 /* Recommended */
SELF != 0x0 /* Absoulute address of IVT */
CSF != 0x0
RES2 = 0x0
This commit also checks if Image's start address is 4 byte aligned.
commit "0088d127 MLK-14945 HAB: Check if IVT valid before authenticating image"
removed as this patch addresses the issue.
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There are some changes to support ARM64 i.MX8M platform in this patches:
1. The hab_rvt base and function vectors are different as i.MX6/7
2. Need to bypass an workaround for i.MX6 to fix problem in MMU.
3. The x18 register needed save & restore before calling any HAB API. According
to ARM procedure call spec, the x18 is caller saved when it is used as
temporary register. So calling HAB API may scratch this register, and
cause crash once accessing the gd pointer.
On ARMv7, the r9 is callee saved when it is used as variable register. So
no need to save & restore it.
4. Add SEC_CONFIG fuse for iMX8M
When current EL is not EL3, the direct calling to HAB will fail because
CAAM/SNVS can't initialize at non-secure mode. In this case, we use
SIP call to run the HAB in ATF.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When loading kernel image, the image size is parsed from header, so it
does not include the CSF and IVT.
Add back the authenticate_image function to wrap the imx_hab_authenticate_image
with calculating IVT offset and full image size.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Prior instantiating RNG we have to ensure if the CAAM job rings are
available. Avoid hardcoded job ring max size and use the definition at
fsl_sec.h
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Prior calling sec_in32() we have to ensure CAAM clock is enabled, the
function sec_in32() is reading CAAM registers and if CAAM clock is disabled
the system will hang.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The CAAM output ring size register offset is currently defined in fsl_sec.h
as FSL_CAAM_ORSR_JRa_OFFSET, use this definition to avoid hardcoded value in
i.MX common code.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This code was originally developed by Raul Cardenas <raul.casas@nxp.com>
and modified to be applied in U-Boot imx_v2017.03.
More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.html
i.MX7D has an a protection feature for Manufacturing process.
This feature uses asymmetric encryption to sign and verify
authenticated software handled between parties. This command
enables the use of such feature.
The private key is unique and generated once per device.
And it is stored in secure memory and only accessible by CAAM.
Therefore, the public key generation and signature functions
are the only functions available for the user.
The manufacturing-protection authentication process can be used to
authenticate the chip to the OEM's server.
Command usage:
Print the public key for the device.
- mfgprot pubk
Generates Signature over given data.
- mfgprot sign <data_address> <data_size>
Signed-off-by: Raul Ulises Cardenas <raul.casas@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Both i.MX8MQ B1 and B2 should use default LPDDR4 script, while B0
has another dedicated script.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register,
so it does not support "fuse sense" command like B1.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.
As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The value of Unique ID in uboot and kernel is different for iMX8MP:
serial#=02e1444a0002aaff
root@imx8mpevk:/sys/devices/soc0# cat soc_uid
D699300002E1444A
The reason is that Fuse Addresses of Unique ID of iMX8MP are 0x420 and
0x430.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Users reported LPDDR4 MR12 value is set to 0 during PHY training,
not the value from FSP timing structure, which cause compliance test failed.
The root cause is the CATrainOpt[0] is set to 1 in 2D FSP timing
but not set in 1D. According to PHY training application node,
to enable the feature both 1D and 2D need set this field to 1,
otherwise the training result will be incorrect.
The PHY training doc also recommends to set CATrainOpt[0] to 0 to use
MR12 value from message block (FSP structure). So update the LPDDR4
scripts of all mscale to clear CATrainOpt[0].
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For dual core and single core iMX8M parts, the thermal node and PMU node
in kernel DTB also needs update to remove the refers to deleted core nodes.
Otherwise both driver will fail to work.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/Solo
Comparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC
and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and
PCA9450B PMIC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Currently PCA9450 might have address 0x25 or 0x35, so let user
choose the address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
On i.MX8MN, we can only support DLL-ON mode only, so update the timing
to support 2400mts & 1066mts setpoint.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There is a frequency/timing limitation for SOC and ARM, if SOC is OD
voltage/OD freq, then ARM can't run at ND voltage/1.2Ghz, it may have
timing risk from SOC to ARM.
Current VDD_SOC is set to 0.95v OD voltage in SPL, and kernel will
increase bus clocks to OD frequency before it increases ARM voltage.
So to conform to the limitation, we'd better increases VDD_ARM to OD
voltage in SPL.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
VDD SOC normal run changed to 0.85V
LPDDR4 freq0 change from 4000MTS to 2400MTS
Signed-off-by: haidong.zheng <haidong.zheng@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Use more safer refresh time value for 6GB LPDDR4 on this EVK board.
Update the parameters for every frequency point.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
After switching to new LPDDR4 firmware 202006 version, have to
update the LPDDR4 timing accordingly from RPA tool.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Sherry Sun <sherry.sun@nxp.com>
Tested-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add inline ECC support for lpddr4 on imx8mp-evk. And add a config which
can enable/disable inline ECC feature for lpddr4 on imx8mp-evk board.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix the warning by set the variable zero to uint64_t
"warning: ‘write’ reading 5 bytes from a region of size 4"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The non-dm MMC driver has been converted to the driver model. The
sheevaplug was using the non-dm driver and this commit enables the new
driver.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CC: Prafulla Wadaskar <prafulla@marvell.com>
CC: Stefan Roese <sr@denx.de>
CC: Tom Rini <trini@konsulko.com>
Unfortunately this board has no DM support at all. We are also way past
the deadline for driver model support for various devices on this board.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CC: Stefan Roese <sr@denx.de>
Call 'run update_uboot' to fetch u-boot-spl.kwb via TFTP and write it
into the correct SPI flash location. The latter's size is defined in
DS414's DTB file, so hard-coding it should be acceptable here.
Take care to not append garbage from RAM to the written image and to
stay within assigned flash boundaries even if an oversized image was
fetched.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Define a misc_init_r() which calls "syno populate_env" if the
environment seems incomplete (or default), indicated by missing
"ethaddr" variable. With this in place, no random MAC address fallback
is needed anymore.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Move the relevant bits from ds109.{c,h} into common/ and adjust the code
to fit both DS109 and DS414. Moreover:
* Introduce syno_board_id() which translates CONFIG_MACH_TYPE into the
expected board ID tag value.
* Properly initialize isusbhost, mac and mtu fields from env variables.
* Set the right bootargs/bootcmd to correctly boot legacy kernel out of
the (DS414) box. Getting the ramdisk location right is a bit tedious.
Cc: Walter Schweizer <swwa@users.sourceforge.net>
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
With the recent fixes in pci_mvebu and xhci-pci drivers, the two rear
USB3 ports are finally usable and accessing them no longer hangs the
system.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Version 0.9 of OpenSBI provides the system reset extension which allows us
to reset and power off boards without board specific code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The latest versions of pygit2 are not available in practically any
distribution at this time. Furthermore, we don't need the latest in
order to run all of our testsuites. Reduce this version requirement to
something older that meets our needs while still supporting running our
tests on older hosts (and so, test labs).
Reported-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Given the structure of our current GitLab tests, we don't make real use
of the tags. Furthermore, these tags prevent the automatic usage of the
default GitLab runners. Remove these tags.
Reported-by: Roger Meier <r.meier@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that there is a single SuperH platform, rework the Azure job
slightly. Azure build time limits mean that we need to split the world
build up still. Make a single build job for the single Renesas SuperH
platform as well as all of the ARM platforms from Renesas.
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The function jffs2_1pass_read_inode() was discarding the summary
inodes and dirent because the value in datacrc flag wasn't
initialized in function jffs2_sum_process_sum_data().
This fix initializes the status of all summary records to indicate
that the CRC needs to be verified when they are loaded.
Before this fix, the behaviors produced by the undefined value of
datacrc was:
- Summary's registries were discarded when 'b->datacrc' is equal
as 'CRC_BAD'.
- Summary's registries were not checked when b->datacrc differs of
'CRC_BAD' and 'CRC_UNKNOWN'
So, almost all of the time the crc just isn't checked, and in some
cases the registries are discarded.
Signed-off-by: Wagner Popov dos Santos <wpopov@gmail.com>
Fixes address violation in functions read_nand_cached() and
read_onenand_cached(). This happens because these functions
try to read a fixed amount
of data even when the offset+length
is above the nand's limit.
Signed-off-by: Wagner Popov dos Santos <wpopov@gmail.com>
Update hwpartition usage
Check bootbus's arguments
workaround for erratum A-011334 for fsl_esdhc driver
add pulse width detection workaround for fsl_esdhc driver
Use alias num before checking mmc index when creating device
This change makes debugging a bit easier as the output is better
readable with the added space. The explicit le16_to_cpu() is not
needed in the output. Also this patch moves the strings into one line
to make the patch checkpatch clean.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Accessing the xHCI controller registers should be done via the
xhci_readl/writel functions. This patch adds this to a few missing
places.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Add missing endianness conversions to usb_get_port_status(). This
(amongst others) is necessary to enable the use of USB 3 hubs on
big-endian platforms like MIPS Octeon.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Use dev_seq() to read aliases node's index and pass it as device number
for creating bulk device.
Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
First check if there is an alias for the device tree node defined with the
given num before checking against device index.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
HS400 mode on the LS1028A SoC isn't reliable. The linux driver has a
workaroung for the pulse width detection. Apply this workaround in
u-boot, too.
This will make HS400 mode work reliably on the LS1028A SoC.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
LS1028A SoCs are restricted in what divider values are allowed for HS400
mode. This is basically a port from the corresponding linux driver.
Signed-off-by: Michael Walle <michael@walle.cc>
According to Specification, each bit have valid value.
But it doesn't check whether arguments is valid or not.
It has potential bug with arguments passed by wrong value.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Modified more readable about hwpartition usage.
Because it's difficult to understand how to use its command.
The arguments didn't optional.
mmc hwpartition needs to pass <USER> <GP> <MODE> as arguments.
Description about each arguments what is required is the below:
USER - <user> <enh> <start> <cnt> <wrrel> <{on|off}>
GP - <{gp1|gp2|gp3|gp4}> <cnt> <enh> <wrrel> <{on|off}>
MODE - <{check|set|complete}>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
The static ethernet link type config code is no more needed because now handled by
the meson8b glue driver, delete it.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The ethernet memory power domain is handled by the meson-ee-pwrc driver,
delete the static code.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds a proper glue driver for the Designware DWMAC ethernet MAC IP
found in the Amlogic Meson8, GXBB, GXL, GXM, G12A, G12B & SM1 SoCs.
This is aimed to replace the static ethernet link setup found on the board
init code for the Amlogic SoC based boards.
Tested on a libretech-cc (S905x Internal RMII 10/100 PHY) and Khadas VIM3 (A113d
with external 10/100/1000 RGMII PHY) to cover the most extreme setups.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic G12A & compatible SoCs embeds a mux to either communicate with
the external PHY or the internal 10/100 PHY.
This adds support for this mux as a MDIO MUX device.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for DM_MDIO to connect to PHY and expose a MDIO device for the
internal MDIO bus in order to dynamically connect to MDIO PHYs with DT
with eventual MDIO muxes in between.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for MMIO register MDIO muxes based on the Linux mdio-mux-mmioreg driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Espressobin had disabled watchdog support (CONFIG_WDT) because older stable
Linux kernel versions (which are used by current stable OpenWRT and Debian
versions) do not have support for Armada 3700 watchdog driver. Therefore
they are not able to periodically kick watchdog so Espressobin enter into
boot loop.
This change enable CONFIG_WDT, CONFIG_WDT_ARMADA_37XX and CONFIG_CMD_WDT
options which add support for U-Boot 'wdt' command. And unset new
CONFIG_WATCHDOG_AUTOSTART option which cause that watchdog is not
automatically started by U-Boot during init phase, like when CONFIG_WDT
option is not set at all.
So with this change, U-Boot on Espressobin would have working 'wdt' command
which can be used from boot scripts (e.g. for enabling watchdog prior new
Linux booting kernel). But default behavior of watchdog status stays
unchanged, U-Boot does not start watchdog on Espressobin during its init
phase.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
In some cases it is useful to compile support for U-Boot command 'wdt'
without starting HW watchdog in early U-Boot phase. For example when the
user want to start the watchdog only on demand by some boot script.
This change adds a new compile option WATCHDOG_AUTOSTART to control whether
U-Boot should automatically start the watchdog during init phase or not.
This option is enabled by default as it was the default behavior prior
introducing this new change. When compiling U-Boot users can decide to turn
this option off.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Function wdt_start() may fail. So in initr_watchdog() function check return
value of wdt_start() call and print error message when watchdog starting
failed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Watchdog is ready after successful call of ops->start() callback in
wdt_start() function. And is stopped after successful call of ops->stop()
callback in wdt_stop function.
So move setting of GD_FLG_WDT_READY flag from initr_watchdog() function to
wdt_start() and ensure that GD_FLG_WDT_READY flag is unset in wdt_stop()
function.
This change ensures that GD_FLG_WDT_READY flag is set only when watchdog is
running. And ensures that flag is also also when watchdog was started not
only by initr_watchdog() call (e.g. by U-Boot 'wdt' command).
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
We had a problem detecting 8/16bit flash devices connected only via
8bits to the SoC for quite a while. Commit 239cb9d9
[mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support] finally
fixed this 8-bit bus support. But also broke some other boards using
this cfi driver. So this patch had to be reverted.
I spotted a different, simpler approach for this 8-bit bus support
on the barebox mailing list posted by
Oleksij Rempel <bug-track@fisher-privat.net>:
http://www.spinics.net/lists/u-boot-v2/msg14687.html
Here the commit text:
"
Many cfi chips support 16 and 8 bit modes. Most important
difference is use of so called "Q15/A-1" pin. In 16bit mode this
pin is used for data IO. In 8bit mode, it is an address input
which add one more least significant bit (LSB). In this case
we should shift all adresses by one:
For example 0xaa << 1 = 0x154
"
This patch now is a port of this barebox patch to U-Boot.
Along with the change w.r.t from barebox,
Some flash chips can support multiple bus widths, override the
interface width and limit it to the port width.
Tested on 16-bit Spansion flash on sequoia.
Tested 8-bit flashes like 256M29EW, 512M29EW.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: York Sun <york.sun@nxp.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Due to a recent change, tests are limited to running on sandbox only.
Correct this so that any architecture can run them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Sean Anderson <seanga2@gmail.com>
Fixes: c79705ea93 ("test: Move dm_test_init() into test-main.c")
Tested-by: Sean Anderson <seanga2@gmail.com>
Avoid 'make htmldocs' build warnings:
./include/os.h:139: warning:
Function parameter or member 'ptr' not described in 'os_realloc'
./include/os.h:139: warning:
Function parameter or member 'length' not described in 'os_realloc'
Fixes: 14e46dfb17 ("sandbox: Add os_realloc()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present debug() statements can cause debuf output to appear when LOG is
enabled but DEBUG is not. This is not intended and it seems that the
condition is wrong.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
This existing code assumes that a reg property is larger than one cell,
but this is not always the case. Fix this assumption.
Also if a node's parent is missing the #address-cells and #size-cells
properties we use 2 as a default for each. But this should not happen in
practice. More likely the properties were removed for SPL due to there
being no 'u-boot,dm-pre-reloc' property, or similar. Add a warning for
this as the failure can be very confusing.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present an empty size is considered to be a 64-bit value. This does not
seem useful and wastes space. Limit the 64-bit detection to where one or
both of the addr/size is two cells or more.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present warnings are shown as soon as they are discovered in the
source scannner. But the function that detects them may be called multiple
times.
Collect all the warnings and show them at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
The environment may contain some unicode characters. At least that is what
seemed to happen on one commit:
Building current source for 1 boards (0 threads, 64 jobs per thread)
0 0 0 /1 -1 (starting)
Traceback (most recent call last):
File ".../tools/buildman/buildman", line 64, in <module>
ret_code = control.DoBuildman(options, args)
File "tools/buildman/control.py", line 372, in DoBuildman
options.keep_outputs, options.verbose)
File ".../tools/buildman/builder.py", line 1704, in BuildBoards
results = self._single_builder.RunJob(job)
File ".../tools/buildman/builderthread.py", line 526, in RunJob
self._WriteResult(result, job.keep_outputs, job.work_in_output)
File ".../tools//buildman/builderthread.py", line 349, in _WriteResult
print('%s="%s"' % (var, env[var]), file=fd)
UnicodeEncodeError: 'ascii' codec can't encode characters in position
311-312: ordinal not in range(128)
The problem defies repetition with any change at all to buildman. But
let's set an encoding in any case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the code to use -ENOSYS, which is the correct error code for an
unimplemented system call in U-Boot.
Also we should not check for a missing operations array as this is not
permitted. For now this can be covered by an assert().
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't need to check -ENOTSUPP since this is not used for this purpose
in U-Boot. Update the code accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Update clk_composite_set_parent() to use -ENOSYS, which is the correct
error code for U-Boot. Also rearrange the code so that the error condition
is clearly indicated and the function runs to the end in the normal case,
since this is the common style in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
At present some drivers use -ENOSUPP to indicate that an unknown or
unsupported clock is used. Most use -EINVAL, indicating an invalid value,
so convert everything to that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Driver model uses quite strong conventions on error codes, but these are
currently not clearly documented. Add a description of the commonly used
errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
While we cannot know which commit the warning relates to, this should not
be fatal. Print the warning and carry on.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some versions of make complain about using a grouped target without a
recipe:
.../pylibfdt/Makefile:36: *** grouped targets must provide a recipe. Stop.
Fix this by adding a dummy recipe.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently it is not possible to boot Linux from the SD card
by default.
Make the necessary adjustments to allow it.
Reported-by: Peter Bergin <peter@berginkonsult.se>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrey Zhizhikin <andrey.z@gmail.com> # imx8mn_ddr4_evk
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In newer docutils writers/latex2e/docutils.sty has a unicode character
in the comments which can in turn cause Python 3.6 at least to fail.
Pin to the previous docutils release for now.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
The usb command cannot be compiled with CONFIG_USB=n:
ld.bfd: cmd/usb.c:660: undefined reference to `usb_stop'
ld.bfd: cmd/usb.c:663: undefined reference to `usb_started'
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This bash code is currently showing up in the build unless 'make -s' is
used. We don't normally show these sorts of things as they are confusing.
Also this code was not shown before the recent refactoring of how these
messages are displayed.
Add an '@' to silence it.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Fixes: 1373252851 ("Makefile: Add common code to report deprecation")
When test suite tries to create a file for a new filesystem test case and fails,
the clean up of the exception tries to unmount the image, that has not yet been
mounted. When it happens, the fuse_mounted global variable is set to False and
inconveniently the test case tries to use sudo, so without this change the
admin of the machine gets an (annoying) email:
Subject: *** SECURITY information for example.com ***
example.com : Feb 5 19:43:47 : ... COMMAND=/bin/umount .../build-sandbox/persistent-data/mnt
and second run of the test cases on uncleaned build folder will ask for sudo
which is not what expected.
Besides that there is a double unmount calls during successfully run test case.
All of these due to over engineered Python try-except clause and people didn't
get it properly at all. The rule of thumb is that don't use more keywords than
try-except in the exception handling code. Nevertheless, here we adjust code
to be less intrusive to the initial logic behind that complex and unclear
constructions in the test case, although it adds a lot of lines of the code,
i.e. splits one exception handler to three, so on each step we know what
cleanup shall perform.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Loading Trusted-Firmware's BL31 at 16KB into DRAM was originally a hack
to allow sharing more code with the other SoCs (which use this offset
in SRAM). However there is no longer a reason for that, as the
problematic macros have been properly separated there.
The latest (and hopefully final) TF-A code drop now changes the load
address to the beginning of DRAM, which is also more easily protected
by the Trustzone memory controller (code to be done).
Adjust the load address of BL31 now, to avoid any issues with
incompatible versions later on (the TF-A patches are about to be merged).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
In the devicepath node to text conversion for Uart nodes a break statement
is missing.
Indicated by Coverity Scan CID 330038
Fixes: 62df6e9c99 ("efi_loader: Uart device path")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
First set of u-boot-atmel features for 2021.07 cycle:
This small feature set includes the implementation of the slew rate for
the PIO4 pin controller device, and a fix for arm926ejs-based
microprocessors that avoids a crash.
There are several changes which happen in mainline kernel which should get
also to U-Boot. Here is the list of patches from the kernel:
- ARM: zynq: Fix leds subnode name for zc702/zybo-z7
- arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
- arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
- arm64: dts: zynqmp: Wire up the DisplayPort subsystem
- arm64: dts: zynqmp: Add DisplayPort subsystem
- arm64: dts: zynqmp: Add DPDMA node
- arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
- arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
- arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106
- arm64: dts: zynqmp-zcu100-revC: correct interrupt flags
- arm64: dts: xilinx: align GPIO hog names with dtschema
- arm64: zynqmp: Add Xilinx AES node
- dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA
but also some other changes have been done.
- Using only one compatible string for adxl345 on zturn
- Remove Xilinx internal DP bindings
- Remove USB3.0 serdes configurations
- Remove SATA serdes configuration for zc1232
- Resort nvmem_firmware
- Update nand compatible string
- Aling power-domains property for sd0/1
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
With "clk dump" command, few clocks are showing up incorrect values
and some clocks are displayed as "unknown".
Add missing clocks to zynqmp clock driver to display proper
clocks rates.
Implement a simple way to get clock source, instead of calling
functions. Change existing functions to this simple mechanism.
Fix gem clock name "gem_rx" to "gem_tx" which was incorrect.
Change dbf_fpd & dbf_lpd clk names to dbg_fpd & dbg_lpd.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
In zynqmp.dtsi file renamed "clk_sys" clock to "controller" and
"clk_flash" clock to "bus" as per upstreamed Arasan NAND driver.
This fixes NAND driver probe failure.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Update the following device tree properties for nand flash
- Set software ecc mode.
- Set bch as ecc algo.
- Set read block to 0.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
EMMC will have bus-width 8 and it is non-removable in general. These
are missing from dt node. Add bus-width and non-removable parameters
to emmc node.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
size of malloc() pool for use before relocation is not sufficient
for ZynqMP mini u-boot with emmc configuration. Increase it to 4K.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add initial support for NanoPi M4B, a minor revision of
the original NanoPi M4.
Commit details of rk3399-nanopi-m4b.dts sync from Linux 5.12-rc4:
"arm64: dts: rockchip: Add NanoPi M4B board"
(sha1: c7b03115003f7f337ab165542cee37148cf30a8a)
Signed-off-by: Alexandre Vicenzi <alexandre.vicenzi@suse.com>
Reviewed-by: Kever Yang <kever.yang@rock-cihps.com>
NanoPi R4s is SBC base on Rockchip RK3399 hexa-core processor with
dual-Core Cortex-A72 and Mali-T864 GPU with 4GiB(LPDDR4) of RAM, SD card support,
including 2 gigabit ethernet(RTL8211E 1Gbps - RTL8111H 1Gbps) and 2 USB 3.0 port.
port.It also has two GPIO headers which allows further peripherals to be used.
The devicetree file is taken of the rk3399 nanopi4 Linux kernel [1].
[1] e7a0959082
Signed-off-by: xiaobo <peterwillcn@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The path in the Linux kernel dts directory is
rockchip/rk3326-odroid-go2.dtb.
That also seems to match the FDT path set on other boards (ie:
rock64-rk3328 for example).
Signed-off-by: Roger Pau Monne <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove the unset of the EFI loader, it's possible for U-Boot to
provide a EFI environment on this board, and it's also required by
the FreeBSD loader which mandated EFI on Aarch64.
Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
On Puma we have the environment at an offset of 16 kiB.
On the eMMC this gives us 16 kiB for the environment before the SPL starts.
On the SPI NOR we also have 16 kiB until end of flash.
So let's increase the environment size from 8 kiB to its maximum
of 16 kiB for both MMC and SPI NOR.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A commit from last year re-imported the DTS files form the upstream kernel.
By doing so the VDD_LOG regulator in the board's DTS was dropped.
Let's restore this, but move it into the u-boot overlay to prevent this
issue in the future.
Fixes: 167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rock960 doesn't have SPI flash on-board, but the bits
get enabled by default which means when booting we get
some errors. Explicitly disable it to stop the errors.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Drop a irrelevent comment now the related configs have moved
to the various config files.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is the state as of v5.10 + the recently added timer0 phandle
targetted at the 5.12 merge window.
With this the non-mainline nodes like the dmc move to a separate
rk3368-u-boot.dtsi that is included from the board-specific
-u-boot.dtsi files, similar to how rk3399 does this.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With the STACK_R_ADDR at 0x600000 (6MB) we're competing with
with the loading address of either u-boot or atf parts, so move
that away to 0x4000000 (64MB) similar to rk3399.
Only lion currently sets that at all but not sheep the second
rk3368 board, so just move that to the Kconfig for rk3368 similar
to rk3399 as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so
that regular kernel images can get loaded without problems.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB
behind the area where we load u-boot to, which depending on u-boot size
may overlap at some point.
So for safety just pick the same value rk3399 has and set
CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Using a non-default SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR setting makes the
resulting u-boot-rockchip.bin unbootable, as it gets stuck after SPL.
Removing the setting from the defconfig allows U-Boot to load
successfully.
Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The code was trying to disable PCS auto-negotiation when a fixed-link node
is present and enable it otherwise. However, the PCS registers were being
written before the PCSSEL bit was set in the network configuration
register, and it appears that in this state, PCS register writes are
ignored. The result is that the intended change only took effect on the
second network operation that was performed, since at that time PCSSEL is
already enabled.
Fix the order of register writes so that PCS registers are only written to
after the PCS is enabled.
Fixes: 26e62cc971 ("net: gem: Disable PCS autonegotiation in case of fixed-link")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On Arm-based Macs, -no_pie is ignored and gives a linker warning.
Moreover, the build falls over with:
ld: Absolute addressing not allowed in arm64 code but used in '_image_type_ptr_aisimage' referencing '_image_type_aisimage'
for dumpimage and mkimage, since we put data structs in text sections
not data sections and so cannot have dynamic relocations. Instead, move
the sections to __DATA and drop disabling PIE.
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
We need this header for U_BOOT_CMD, which is always present even without
EFI.
Fixes: 82c468a049 ("dm: test: Update Makefile conditions")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When including this file on a board other than sandbox (e.g by enabling
UNIT_TEST and CMD_SETEXPR) an results. Fix it by declaring struct udevice
first.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Rework the deprecation warnings to be consistently phrased.
- Add in a warning for DM_I2C, for a year from next release.
- Fix Azure builds of Windows host tools.
We now see an error such as:
warning: database file for 'ucrt64' does not exist (use '-Sy' to download)
error: failed to prepare transaction (could not find database)
So use -Sy as suggested.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This probably should have been done a while back since it is a core
system. Add a migration deadline of later this year, to catch the
stragglers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CONFIG_DM_ETH check to use the 'deprecated' function.
Tested with snow
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CONFIG_WDT check to use the 'deprecated' function.
Tested with kmcent2
Old message:
===================== WARNING ======================
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_WDT (Driver Model
for DM watchdog). Please update the board to use
CONFIG_WDT before the v2019.10 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CONFIG_DM_SPI_FLASH check to use the 'deprecated' function.
Tested with vinco
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH (Driver Model
for SPI flash). Please update the board to use
CONFIG_DM_SPI_FLASH before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CONFIG_DM_VIDEO check to use the 'deprecated' function.
Tested with pxm2
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO (Driver Model
for video). Please update the board to use
CONFIG_DM_VIDEO before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
==================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CONFIG_DM_PCI check to use the 'deprecated' function.
Tested with MPC8349ITX
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_PCI Please update
the board to use CONFIG_DM_PCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_PCI (Driver Model
for PCI). Please update the board to use
CONFIG_DM_PCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CONFIG_LIBATA check to use the 'deprecated' function.
Tested with MPC8349ITX
Old message:
===================== WARNING ======================
This board does use CONFIG_LIBATA but has CONFIG_AHCI not
enabled. Please update the storage controller driver to use
CONFIG_AHCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_AHCI (Driver Model
for AHCI). Please update the board to use
CONFIG_AHCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the CONFIG_MVSATA_IDE check to use the 'deprecated' function.
Tested with nas220
Old message:
===================== WARNING ======================
This board does use CONFIG_MVSATA_IDE which is not
ported to driver-model (DM) yet. Please update the storage
controller driver to use CONFIG_AHCI before the v2019.07
release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_AHCI (Driver Model
for AHCI instead of CONFIG_MVSATA_IDE). Please update the board to use
CONFIG_AHCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the USB check to use the 'deprecated' function.
Tested with xpress
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_USB (Driver Model
for USB). Please update the board to use
CONFIG_DM_USB before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the MMC check to use the 'deprecated' function.
Tested with zc5202
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC (Driver Model
for MMC). Please update the board to use
CONFIG_DM_MMC before the v2019.04 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which can be called to report a migration problem. This
will make it easier to add new migration checks, since the logic and
strings are not spread out over 8 lines of code.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the driver model migration messages are mixed with the others.
Collect them together before starting to refactor them.
Signed-off-by: Simon Glass <sjg@chromium.org>
On RISC-V the symbols __dyn_sym_start, dyn_sym_end are referenced in
efi_runtime_relocate().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a few more internal checks to make sure offsets are correct, before
updating the dtb.
To make this easier, update the functions which add a property to return
that property,.
Signed-off-by: Simon Glass <sjg@chromium.org>
So far we have only needed to add subnodes to empty notds, so have not
had to deal with ordering. However this feature is needed for binman's
expanded nodes, since there may be another node in the same section.
While libfdt adds new properties after existing properties, it adds new
subnodes before existing subnodes. This means that we must reorder the
nodes in the cached version, so that the ordering remains consistent.
Update the sync implementation to sync existing subnodes first, then
add new ones, then tidy up the ordering in the cached version. Update the
test to cover this behaviour.
Also improve the comment about property syncing while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new test that adds a subnode alongside an existing one, as well as
adding properties to a subnode. This will expand to adding multiple
subnodes in future patches. Put a node after the one we are adding to so
we can check that things sync correctly.
The testAddNode() test should be in the TestNode class since it is a node
test, so move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Once the tree has been synced, thus potentially moving things around in the
fdt, we set _cached_offsets to False so that a refresh will happen next
time a property is accessed.
This 'lazy' refresh doesn't really save much time, since refresh is a very
fast operation, just a single walk of the tree. Also, having the refresh
happen in the bowels of property access it makes it harder to figure out
what is going on.
Simplify the code by always doing a refresh before and after a sync. Set
_cached_offsets to True immediately after this, in the Refresh() function,
since this makes more sense than doing it in the caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a property does not yet have an offset, then that means it exists in
the cache'd fdt but has not yet been synced back to the flat tree. Use
the dirty flag for this so we don't need to check the offset too. Improve
the comments for Prop and Node to make it clear what an offset of None
means.
Also clear the dirty flag after the property is synced.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes it is useful to specify the default alignment for all entries
in a section, such as when word-alignment is necessary, for example. It
is tedious and error-prone to specify this individually for each section.
Add a property to control this for a section.
Signed-off-by: Simon Glass <sjg@chromium.org>
Generally the content of sections is not built until the final assembly
of the image. This is partly to avoid wasting time, since the entries
within sections may change multiple times as binman works through its
various stages. This works quite well since sections exist in a strict
hierarchy, so they can be processed in a depth-first manner.
However the 'collection' entry type does not have this luxury. If it
contains a section within its 'content' list, then it must produce the
section contents, if available. That section is typically a sibling
node, i.e. not part oc the collection's hierarchy.
Add a new 'required' argument to section.GetData() to support this. When
required is True, any referenced sections are immediately built. If this
is not possible (because one of the subentries does not have its data yet)
then an error is produced.
The test for this uses a 'collection' entry type, referencing a section as
its first member. This forces a call to _BuildSectionData() with required
set to False, at first, then True later, when the image is assembled.
Signed-off-by: Simon Glass <sjg@chromium.org>
The vblock entry type includes code to collect the data from a number of
other entries (not necessarily subentries) and concatenating it. This is
a useful feature for other entry types.
Make it a base class, so that vblock can use it, along with other entry
types.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is a command-line flag to disable substitution of expanded
entries. Add an option to the entry node as well, so it can be controlled
at the node level.
Add a test to cover this. Fix up the comment to the checkSymbols() function
it uses, while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide the model information through sysinfo so that it shows up on
boot. For memconfig 4 pins are provided, for 16 combinations. For SKU
ID there are two options:
- two pins provided in a ternary arrangement, for 9 combinations.
- reading from the EC
Add a binding doc and drop the unused #defines as well.
Example:
U-Boot 2021.01-rc5
CPU: Intel(R) Celeron(R) CPU N3450 @ 1.10GHz
DRAM: 3.9 GiB
MMC: sdmmc@1b,0: 1, emmc@1c,0: 2
Video: 1024x768x32 @ b0000000
Model: Google Coral (memconfig 5, SKU 3)
This depends on the GPIO series:
http://patchwork.ozlabs.org/project/uboot/list/?series=228126
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Some boards may want to show the SKU ID or other information obtained at
runtime. Allow this to come from sysinfo. The board can then provide a
sysinfo driver to provide it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is not possible to remove the state before driver model is uninited,
since the devices are allocated in the memory buffer. Also it is not
possible to uninit driver model afterwards, since the RAM has been
freed.
Drop the uninit altogether, since it is not actually necessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an extra condition here since we cannot put x86 tables in a bloblist
when bloblists are not supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
The U_BOOT_CMDREP_COMPLETE() macro produces a build error if CONFIG_CMDLINE
is not enabled. Fix this by updating the macro to provide the 'repeatable'
arugment in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this documentation over to reST. Move the example files into a files/
directory so they are still separate.
Do a few minor updates while we are here:
- Tidy up sandbox build instructions
- Update my github account name
- Add some talks and links
Signed-off-by: Simon Glass <sjg@chromium.org>
The _SUPPORT suffix is from an earlier time and interferes with use of
the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix.
Tidy up the TODO that prompted this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This feature was dropped from U-Boot some time ago:
f12f96cfaf (sf: Drop spl_flash_get_sw_write_prot")
However, we do need a way to see if a flash device is write-protected,
since if it is, it may not be possible to write to do (i.e. failing to
write is expected).
I am not sure of the correct layer to implement this, so this patch is a
stab at it. If spi-flash makes sense then I will add to the 'sf' also.
Re the points mentioned in the removal commit:
1) This kind of requirement can be achieved using existing
flash operations and flash locking API calls instead of
making a separate flash API.
Which uclass is this?
2) Technically there is no real hardware user for this API to
use in the source tree.
I do want coral (at least) to support this.
3) Having a flash operations API for simple register read bits
also make difficult to extend the flash operations.
This new patch only mentions write-protect being on or off, rather than
the actual mechanism.
4) Instead of touching generic code, it is possible to have
this functionality inside spinor operations in the form of
flash hooks or fixups for associated flash chips.
That sounds to me like what drivers are for. But we still need some sort
of API for it to be accessible.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present bootstage silently ignores new records if it runs out of
space. It is sometimes obvious by looking at the report, but the IDs are
not contiguous, so it is easy to miss.
Aad a message so that action can be taken.
Signed-off-by: Simon Glass <sjg@chromium.org>
We have two separate places that need to figure out the bootstage ID to
use. Put this code in a function so that the logic is in one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
These tests current produce unwanted output on sandbox. Use the correct
functions to controller console output, to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sandbox is special in that it is used for testing and it does not match
any particular target architecture. Allow it to load an image from any
architecture, so that 'bootm' can be used as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when a file is bound to a host device it is always marked as
removeable. Arguably the device is removeable, since it can be unbound at
will. However while it is bound, it is not considered removable by the
user. Also it is useful to be able to model both fixed and removeable
devices for code that distinguishes them.
Add a -r flag to the 'host bind' command and plumb it through to provide
this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove the 'bind' subcommand before processing the arguments. This will
make it easier to add an optional flag.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function has a strange mix of declarations and argument parsing
which is a bit hard to follow and harder to modify. Separate out the
declarations at the start of the function and adjust the ordering of
the code slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox removes its executable after failing to run it,
since there is no other way that it would get cleaned up.
However, this is actually only wanted if the image was created within
sandbox. For the case where the image was generated by the build system,
such as u-boot-spl, we don't want to delete it.
Handle the two code paths accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function only exists if CPU is enabled. Update the code to take
account of this, so that it does not have to be enabled on all sandbox
builds.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
When booting from coreboot there is no need to notify the FSP of anything,
since coreboot has already done it. Nor it is possible, since the FSP
details are not provided by coreboot.
Skip it in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
When booting from coreboot the FSP video information is no-longer
available. Enable the coreboot driver so that we can get some sort of
display in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the debug UART is only set up in SPL, on the assumption that
the boot flow will always pass through there. When booting from coreboot,
SPL is not used, so the debug UART is not available.
Move the code into a common place so that it can be used in U-Boot proper
also. Add the required init to start_from_spl.S as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow referencing a CBFS file in the flashmap, so that it is possible to
boot from coreboot, where files are not available from binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver cannot work when booted from coreboot, since the FSP
information is not available. Disable it in that case, so that the
coreboot video driver can be used instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
When booting from coreboot we need this driver for the video to work.
Update the driver to be usable on any board.
The driver disables itself if it sees that is not booted from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
The copy buffer, if enabled, prevents booting from coreboot correctly,
since no memory is allocated for it. Allow it to fall back to disabled
in this situation. This ensures that a console is displayed, even if
it is slow.
Signed-off-by: Simon Glass <sjg@chromium.org>
This information is interesting to look at and can be important for
debugging and inspection. Add a command to display it in a helpful
format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this code into a generic location so that it can be used by other x86
boards which want to boot from coreboot. Also ensure that this is called
if booting from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Quite a few new tag types have been added over the years. Bring these into
U-Boot so that all required tags can be parsed.
Add a proper comment to struct sysinfo_t while we are here, since many of
the meanings are not obvious.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to parse coreboot tables on any x86 build which is
booted from coreboot. Add a new Kconfig option to enable this feature and
move the code so it can be used on any board, if enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add new timestamp codes that are present in coreboot, so that we can decode
these in U-Boot.
At present TS_U_BOOT_START_KERNEL is used twice. It should only be used
just before jumping to Linux, so update the other call site to use
TS_START_KERNEL.
Signed-off-by: Simon Glass <sjg@chromium.org>
This all relates to the sysinfo structure provided by coreboot. Put the
timestamp definitions into the same file as the others. Tidy up a few
comments at the same time.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or
from coreboot. In the latter case we want to provide access to the coreboot
sysinfo tables. Move the definitions into a file available to any x86
board.
Signed-off-by: Simon Glass <sjg@chromium.org>
CBFS now supports compressed filed. Add support for reading this
information so that the correct decompression can be applied. The
decompression itself is not implemented in CBFS.
Signed-off-by: Simon Glass <sjg@chromium.org>
In file_cbfs_next_file() there is a lot of complicated code to move to
the next file. Use the ALIGN() macros to simplify this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The file_cbfs_next_file() function is already fairly long. Before
expanding it further, move the core part into a separate function.
Signed-off-by: Simon Glass <sjg@chromium.org>
The file traversal functions currently use a single global CBFS. In some
cases we need to access multiple CBFSs to obtain different files. Add new
functions to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases CBFS does not start with a header but is just a collection
of files. It is possible to support this so long as the size of the CBFS
is provided.
Update the cbfs_init_mem() function to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When U-Boot is booted from coreboot the SMBIOS tables are written by
coreboot, not U-Boot. The existing method of updating the BIOS version
string does not work in that case, since gd->smbios_version is only set
when U-Boot writes the tables.
Add a new function which allows the version to be updated by parsing the
tables and writing the string in the correct place. Since coreboot
provides a pointer to the SMBIOS tables in its sysinfo structure, this
makes it easy to do the update.
Signed-off-by: Simon Glass <sjg@chromium.org>
CBFS now supports attributes for things that cannot fit in the header as
originally conceived. Add the structures for these.
Also rename attributes_offset to something shorter, to ease code
readability.
Signed-off-by: Simon Glass <sjg@chromium.org>
The driver currently reads the card-detect but does not register it with
the MMC stack. Update this so that card-detect works as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since the recent bug fix, it doesn't matter which GPIO phandle is used so
long as the GPIO number is right. Still, we may as well use the correct
one to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
At present the eMMC device does not have an alias so it appears after
the SD card which is device 1. There is no device 0 which is odd.
Make the eMMC device be the first one. Update the boot script to use the
new device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The Intel GPIO binding allows GPIOs to be globally numbered, so that it
does not matter which GPIO bank is specified in the device tree. This is
convenient and avoid confusion since the banks do not have the same number
of GPIOs and the numbering is not sequential.
The GPIO uclass ensures that the device mentioned in the devicetree
binding is probed. It is fine for the driver to update gpio_desc to point
to a different driver, but this may not have been probed. If it has not
been, then it cannot be claimed since there is no uclass data.
We could handle this in the GPIO uclass but so far it is an unusual
situation so it is probably not worth the extra code. Handle this case in
the GPIO driver by probing the selected device if necessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add detailed information on how to build the coral image, since it needs
binary blobs. Provide a way to avoid the memory-training delay. Also show
the console output from a sample run.
Signed-off-by: Simon Glass <sjg@chromium.org>
dfu_free_entities() invoking dfu_free_entity_sf() has let to segementation
faults due to double freeing the same device.
spi_flash_free() is not relevant for the driver model but exists only for
compatibility with old drivers.
We must not remove any device here:
* The device may still be referenced.
* We don't want to have to probe again.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Having an rng in the sandbox is useful not only for tests but also for e.g.
UEFI. Therefore, copy the rng node from test.dts to sandbox.dtsi.
In the case of UEFI, it can then be verified with `efidebug dh' that a
"Random Number Generator" protocol is indeed present.
This also fixes the following `bootefi' error:
Missing RNG device for EFI_RNG_PROTOCOL
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Simon Glass <sjg@chromium.org>
dtoc support for of-platdata-inst
driver model support for of-platdata-inst
support of-platdata-inst on x86 / coral
binman support for exapanded entries
binman convert docs to reST
ti-sysc fix for duplicate uclass driver
patman minor improvements
pylibfdt build only if needed
correct obscure CI error with OF_PLATDATA_INST
Many entries start 'Entry containing a'. This looks fine in the source
code but is annoying when viewed in the htmldocs table of contents. Drop
these unnecessary words.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a link to binman's documentation and adjust the files so that it is
accessible. Use the name README.rst so it is easy to discover when binman
is installed without U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
These docs are useful for developers, not users. Move them under that
section.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Much of the content here is useful only for development. Move it under
that section.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We don't need to spell out the separate pieces of U-Boot phase binaries
anymore. Revert to using the simple entry and let binman do the expansion
itself as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
To support the use of 'expanded' entries, binman needs to be told whether
SPL and TPL have a devicetree and whether they need BSS padding. Add these
to the Makefile.
Signed-off-by: Simon Glass <sjg@chromium.org>
When creating an entry, check for an expanded version of that entry, then
use it instead. This allows, for example use of:
u-boot {
};
instead of having to write out in full:
u-boot {
type = "section";
u-boot-nodtb {
};
u-boot-dtb {
};
};
Add an implementaion of this and associated documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for this feature in the control, image and section modules, so
that expanded entries will be selected by default. So far there are no
expanded entry types, so this is a nop.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new command-line option to disable expanded entries. This is needed
for most tests, since it is much easier to 'factor out' this function into
a separate test and keep the existing packing tests simple.
Add the option and select it by default from tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
As the first step in supporting expanded entries, add a way for binman to
automatically select an 'expanded' version of an entry type, if requested.
This is controlled by a class method.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present, before any entry expansion is done (such as a 'files' entry
expanding out to individual entries for each file it contains), we check
the binman definition (i.e. '/binman' node) to find out what devicetree
files are used in the images.
This is a pain, since the definition may change during expansion. For
example if there is no u-boot-spl-dtb entry in the definition at the start,
we assume that the SPL devicetree is not used. But if an entry later
expands to include this, then we don't notice.
In fact the flexibility provided by the current approach of checking the
definition is not really useful. We know that we can have SPL and TPL
devicetrees. We know the pathname to each, so we can simply check if the
files are present. If they are present, we can prepare them and update
them regardless of whether they are actually used. If they are not present,
we cannot prepare/update them anyway, i.e. an error will be generated.
Simplify state.Prepare() so it uses a hard-coded list of devicetree files.
Note that state.PrepareFromLoadedData() is left untouched, since in that
case we have a complete definition from the loaded file, but cannot of
course rely on the devicetree files that created it still being present.
So in that case we still check the image defitions.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we store an entry as the third field in output_fdt_info[].
This is only used to get the type of the entry. Of course multiple entries
may have this same type. Also the entry type is the key to this dict, so
we can use that instead.
Drop the field and update GetUpdateNodes() to suit. Improve the comment for
output_fdt_info a little while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we always use the main devicetree for SPL/TPL as well when
setting up the state. But this it not needed if there is a real devicetree
for SPL or TPL. In fact it confuses things since we cannot distinguish
between one being provided and using the fake one.
Update the code to create the fakes only when requested. Put the mapping
in a constant so we can use it elsewhere.
Rename 'other_fname' to 'fname' while we are here since there is nothing
'other' about it.
Signed-off-by: Simon Glass <sjg@chromium.org>
A few tests declare a type when this can be inferred from the node name.
Drop these lines, since it might cause confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
This entry holds the padding between the end of of TPL binary and the
end of BSS. This region must be left empty so that the devicetree can be
appended correctly and remain accessible without interfering with BSS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since this is an execuable we should be able insert symbol values into it.
Add support for this.
Use common code for this test and the original testSymbols. Use hex
consistently for the values and add some more comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
The documentation for this entry indicates that the SPL binary is included
along with the padding. It is not, so update it to correct the error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Several entries currently use an underscore in the entry-type name, but in
fact a hyphen is used. Update the docs to fix this as it might be
confusing.
Also simplify the 'filename' comment and fix the 'operation' typo.
Signed-off-by: Simon Glass <sjg@chromium.org>
Regenerate the entry documentation, which step was missed when the
files-align feature was added.
Fixes: 6eb9932668 ("binman: Support alignment of files")
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the documentation to the base method as it is with other methods.
Also update it a little while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Extracting files to the current directory is not normally a very friendly
thing to do, but it can be warranted, e.g. in a new temporary dir. At
present binman reports an error when such an attempt is made. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
With Apollo Lake, SPL is placed in read-only memory. Set this new option
so that OF_PLATDATA_INST can be used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
These devices are not actually built in TPL but are currently active in
the TPL devicetree. For of-platdata-inst this means that we will try to
generate devices for them, which fails.
Update them to be active only in U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't normally need this driver in TPL/SPL, so drop it for now. It can
be enabled by individual boards if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
With TPL we don't need full PCI support and it adds to code size. Instead,
a simple_bus driver is good enough to be able to read and write the PCI
config and do a little basic setup.
So at present there are two drivers in U-Boot called pci_x86. One is in
UCLASS_PCI, used in SPL and U-Boot proper. The other is in
UCLASS_SIMPLE_BUS and used only in TPL.
Add a tag to tell dtoc about this, so it knows which one to use when
generating the devices and uclasses.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
With the standard of-platdata we must fix up driver_data manually. With
of-platadata-inst this is not necessary, since it is added to the device
by dtoc.
Update the code to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This enum is needed to generate build-time devices. Tell dtoc where to
find the header, to avoid compile errors in the generated code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
The dm.h header should come first. In fact it needs to, since otherwise
the driver model definitions are not available to dt-structs.h
Fix this, since it causes problems with OF_PLATDATA_INST.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Collect this together in one place, so driver model can access set it up
in a new place if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a description of the new features, along with internal technical
documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This doc has a few pieces that are out-of-date. Fix these. Also we have
started to use 'devicetree' instead of 'device tree' or 'device-tree'
since it is easier to see as a single term, so replace all ocurrences
accordingly.
Also move the caveats to the end, since this is a fairly solid part of
U-Boot now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a warning to each of these functions so that people do not attempt to
use them outside driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Make use of the new priv/plat data region if enabled. This is implemented
as a simple offset from the position set up by dtoc to the new position.
So long as all access goes through dm_priv_to_rw() this is safe.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Collect this together in one place, so driver model can access set it up
in a new place if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the device priv/data data allocated by dtoc is stored in the
data section along with other variables. On some platforms it is better
to allocate space for it separately, e.g. if SPL is running from read-only
memory.
Create a new space with the same size as that allocated by dtoc, ready for
use.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
When of-platdata-inst is active, use the flags in the new udevice_rt
table, dropping them from the main struct udevice. This ensures that the
latter is not updated at runtime.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when driver model needs to change a device it simply updates
the struct udevice structure. But with of-platdata-inst most of the fields
are not modified at runtime. In fact, typically only the flags need to
change.
For systems running SPL from read-only memory it is convenient to separate
out the runtime information, so that the devices don't need to be copied
before being used.
Create a new udevice_rt table, similar to the existing driver_rt. For now
it just holds the flags, although they are not used in this patch.
Add a new Kconfig for the driver_rt data, since this is not needed when
of-platdata-inst is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Some systems (e.g. x86 APL) run SPL from read-only memory. The device
instances created by dtoc are therefore not writeable. To make things work
we would need to copy the devices to read/write memory.
To avoid this, add an option to use a separate runtime struct for devices,
just as is done for drivers. This can be used to hold information that
changes at runtime, avoiding the need for a copy.
Also add a Kconfig option for read-only SPL, which selects this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add this new board to the test plans. Travis-CI is left out, since it is
being removed soon due to lack of capacity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Move sandbox_spl over to use OF_PLATDATA_INST. Create a new board to
test the case when this is not enabled, since we will be keeping that
code around for several months and want to avoid regressions.
Skip the dm_test_of_plat_dev() test since driver info is not available
for OF_PLATDATA_INST.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
With recent changes this can be supported again. Add it back.
This reverts commit d85f2c4f29.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the i2c emulators require access to the devicetree, which is
not possible (by design) with of-platdata.
Add a way for drivers to record the of-platdata index of their emulator,
so that we can still find the emulator.
This allows i2c emulation to work with of-platdata.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
The test framework reinits driver model tests before running each test.
Since malloc_simple does not support free(), this eventually runs out of
memory.
Fix it for now by increasing the space to 32KB.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This function finds a device by its driver_info index. With
of-platdata-inst we do not use driver_info, but instead instantiate
udevice records at build-time.
However the semantics of using the function are the same in each case:
the caller provides an index and gets back a device.
So rename the function to device_get_by_ofplat_idx(), so that it can be
used for both situations. The caller does not really need to worry about
the details.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the structs used by these drivers are declared in the C files
and so are not accessible to dtoc. Move them to header files, as required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function is included in the build but with of-platdata it
only services to produce a confusing link error complaining about a call
to dev_read_u32_default().
Drop it so that any call to uclass_find_device_by_phandle() is flagged as
an error, making it easier to see what is going on.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is now only used in a test. Drop it. Also drop
DM_DRVINFO_GET() which was the only purpose for having the function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a version of this driver for sandbox so that it can use the
of-platdata struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
We need to allow SoCs to create their own drivers for this so that they
can use their own of-platdata structs. To minimise code duplication,
export the driver operations and the ofdata_to_plat() setup function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the structs used by this driver are not accessible outside it,
so cannot be used with OF_PLATDATA_INST. Move them to a header file to
fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
It is not possible to destroy the uclasses when they are created at
build time. Skip this step so that SPL test can complete successfully.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
When dt-structs.h is used, include the dt-decl.h header as well, so that
these declarations are available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Which files we generate depends on the setting of OF_PLATDATA_INST in the
build. This might change between builds, but the build directory may be
reused.
Leaving old files around is confusing and switching the OF_PLATDATA_INST
setting does not necessarily regenerate the files, e.g. if the devicetree
has not changed.
Remove all the files before regenerating new ones.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are actually two generated files but only one is currently mentioned
in the Makefile as a dependency. Put them both in a Makefile variable and
use that instead, to avoid inconsistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present all possible files are generated, even if some of them just
have a header and an empty body. It is better to generate only the files
that are needed, so that the two types of build (based on the setting of
OF_PLATDATA_INST) can be mutually exclusive.
This is intended to fix a strange problem sometimes found with CI:
Building current source for 1 boards (1 thread, 40 jobs per thread)
sandbox: + sandbox_spl
+drivers/built-in.o: In function `dm_setup_inst':
+drivers/core/root.c:135: undefined reference to
`_u_boot_list_2_udevice_2_root'
+dts/dt-uclass.o:(.u_boot_list_2_uclass_2_serial+0x10): undefined
reference to `_u_boot_list_2_udevice_2_serial'
...
This likely happens when switching from !OF_PLATDATA_INST to
OF_PLATDATA_INST since running 'make xxx_defconfig" does not currently
cause any change in which files are generated. With !OF_PLATDATA_INST
the dt-device.c file has no declarations and this is assumed to be the
starting state. The error above seems to indicate that, after changing
to OF_PLATDATA_INST, the dt-uclass.c file is regenerated but the
dt-device.c files is not. This does not seem possible from the relevant
Makefile.spl rule:
u-boot-spl-platdata := $(obj)/dts/dt-plat.o $(obj)/dts/dt-uclass.o
$(obj)/dts/dt-device.o
cmd_dtoc = $(DTOC_ARGS) -c $(obj)/dts -C include/generated all
include/generated/dt-structs-gen.h $(u-boot-spl-platdata_c) &: \
$(obj)/$(SPL_BIN).dtb
@[ -d $(obj)/dts ] || mkdir -p $(obj)/dts
$(call if_changed,dtoc)
It seems that this cannot regenerate dt-uclass.c without dt-device.c since
'dtoc all' is used. So here the trail ends for now.
In any case it seems better to generate files that are uses and not bother
with those that serve no purpose. So update dtoc to do this automatically.
Signed-off-by: Simon Glass <sjg@chromium.org>
When OF_PLATDATA_INST is enabled, we need dt-uclass.c and dt-device.c for
the build to work. When OF_PLATDATA_INST is not enabled, we only need
dt-plat.c
Update the Makefile rules to indicate this.
At present all files are generated and compiled regardless of which are
actually needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since the dst_dir rule always runs, it causes a rebuild of the of-platdata
files even if not needed.
Create the directory inside the rule instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the build rule for pylibfdt depends on _libfdt.so but modern
Python versions add a different suffix to the output file, resulting in
something like _libfdt.cpython-38-x86_64-linux-gnu.so
The result is that pylibfdt is rebuilt every time.
Rename the file the standard name so that the rule works correctly. Also
add libfdt.py to the dependencies, so that file is always created if
missing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request for efi-next
New:
provide EFI ESRT table
initrd via Load_File2_Protocol uses boot options
create an S-CRTM event for measured boot
Bug fixes:
avoid double free of SPI device in dfu_free_entity()
avoid memory leak in TCG2 protocol
We recently added a common function for calculating file size,
instead of copy pasting the code around. Switch one of the
occurences over to the common function
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Setup will always occur before ExitBootServices(). So eliminate
EFI_SETUP_AFTER_BOOTTIME_EXIT. Put the SetVirtualAddressMap() test into a
separate class so that we can execute it last.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
TCG PC Client Platform Firmware Profile Spec mandates that an S-CRTM
event for the version identifier using the event type EV_S_CRTM_VERSION
must be measured.
So since we are trying to add more conformance into U-Boot, let's add
the event using U_BOOT_VERSION_STRING, extend PCR[0] accordingly and log
it in the EventLog
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Current code doesn't free the efi allocated memory in case the protocol
failed to install
Fixes: c8d0fd5825 ("efi_loader: Introduce eventlog support for TCG2_PROTOCOL")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This commit slightly extends test_efi_capsule_fw3.
In order to run the test the following must be added to
sandbox_defconfig:
+CONFIG_CMD_SF=y
+CONFIG_CMD_MEMORY=y
+CONFIG_CMD_FAT=y
+CONFIG_DFU=y
The ESRT is printed in the u-boot shell by calling efidebug esrt.
The test ensures that, after the capsule is installed, the ESRT
contains entries with the GUIDs:
- EFI_FIRMWARE_IMAGE_TYPE_UBOOT_FIT_GUID;
- EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID;
test invocation:
sudo ./test/py/test.py --bd sandbox -k capsule_fw3 -l --build
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Sughosh Ganu <sughosh.ganu@linaro.org>
CC: AKASHI Takahiro <takahiro.akashi@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Andre Przywara <andre.przywara@arm.com>
CC: Alexander Graf <agraf@csgraf.de>
CC: nd@arm.com
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This commmit exercises the ESRT creation in a EFI selftest.
A fake FMP, with TEST_ESRT_NUM_ENTRIES FW images, is installed in the
system leading to the corresponding ESRT entries being populated.
The ESRT entries are checked against the datastructure used to
initialize the FMP.
Invocation from the sandbox platform:
add to sandbox_defconfig:
+CONFIG_CMD_BOOTEFI_SELFTEST=y
make sandbox_capsule_defconfig all
./u-boot -d arch/sandbox/dts/test.dtb
bootefi selftest
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Sughosh Ganu <sughosh.ganu@linaro.org>
CC: AKASHI Takahiro <takahiro.akashi@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Andre Przywara <andre.przywara@arm.com>
CC: Alexander Graf <agraf@csgraf.de>
CC: nd@arm.com
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The ESRT is initialised during efi_init_objlist after
efi_initialize_system_table().
The ESRT is recreated from scratch at the following events:
- successful UpdateCapsule;
- FMP instance install.
The code ensures that every ESRT entry has a unique fw_class value.
Limitations:
- The ESRT is not updated if an FMP instance is uninstalled;
- the fields image_type and flags are in the current implementation left
undefined. Setting these values will require a per-platform function
that returns the image_type/flags as a function of the image fw_class.
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Sughosh Ganu <sughosh.ganu@linaro.org>
CC: AKASHI Takahiro <takahiro.akashi@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Andre Przywara <andre.przywara@arm.com>
CC: Alexander Graf <agraf@csgraf.de>
CC: nd@arm.com
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Remove two EFI_CALL() indirections.
Move ESRT GUID in efidebug's list of GUIDs.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Multiple DFU entities may share the same SPI device. We must make sure that
the SPI device is only freed once.
When using the driver model it is not necessary to free the SPI device.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
The UEFI spec allows a packed array of UEFI device paths in the
FilePathList[] of an EFI_LOAD_OPTION. The first file path must
describe the loaded image but the rest are OS specific.
Previous patches parse the device path and try to use the second
member of the array as an initrd. So let's modify efidebug slightly
and install the second file described in the command line as the
initrd device path.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Up to now we install EFI_LOAD_FILE2_PROTOCOL to load an initrd
unconditionally. Although we correctly return various EFI exit codes
depending on the file status (i.e EFI_NO_MEDIA, EFI_NOT_FOUND etc), the
kernel loader, only falls back to the cmdline interpreted initrd if the
protocol is not installed.
This creates a problem for EFI installers, since they won't be able to
load their own initrd and continue the installation. It also makes the
feature hard to use, since we can either have a single initrd or we have
to recompile u-boot if the filename changes.
So let's introduce a different logic that will decouple the initrd
path from the config option we currently have.
When defining a UEFI BootXXXX we can use the filepathlist and store
a file path pointing to our initrd. Specifically the EFI spec describes:
"The first element of the array is a device path that describes the device
and location of the Image for this load option. Other device paths may
optionally exist in the FilePathList, but their usage is OSV specific"
When the EFI application is launched through the bootmgr, we'll try to
interpret the extra device path. If that points to a file that exists on
our disk, we'll now install the load_file2 and the efi-stub will be able
to use it.
This opens up another path using U-Boot and defines a new boot flow.
A user will be able to control the kernel/initrd pairs without explicit
cmdline args or GRUB.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A following patch introduces a different logic for loading initrd's
based on the EFI_LOAD_FILE2_PROTOCOL.
Since similar logic can be applied in the future for other system files
(i.e DTBs), let's add some helper functions which will retrieve and
parse file paths stored in EFI variables.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
On the following patches we allow for an initrd path to be stored in
Boot#### variables. Specifically we encode in the FIlePathList[] of
the EFI_LOAD_OPTIONS for each Boot#### variable.
The FilePathList[] array looks like this:
kernel - 0xff - VenMedia(initrd GUID) - initrd1 - 0x01 initrd2 - 0xff
So let's add the relevant functions to concatenate and retrieve a device
path based on a Vendor GUID.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reformat function descriptions.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When uploading an EFI binary via the UART we have to call
efi_set_bootdev() or we won't be able to execute it.
Put the includes into alphabetic order.
Fixes: 5f59518a7b ("efi_loader: setting boot device")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When uploading an EFI binary via the UART we need to assign a device path.
* Provide devicepath node to text conversion for Uart() node.
* Provide function to create Uart() device path.
* Add UART support to efi_dp_from_name().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Even if CONFIG_DM_VIDEO=y and stdout="vidconsole", a video device may not
be available. Check the return values of the relevant functions.
If no video output device is available, assume that the serial console is
in use.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This occur when building on Raspberry Pi 400 (32-bit ARM). Fix them.
Examples:
cmd/efidebug.c: In function ‘do_efi_capsule_update’:
cmd/efidebug.c:75:49: warning: cast from pointer to integer of different
size [-Wpointer-to-int-cast]
ret = EFI_CALL(RT->update_capsule(&capsule, 1, (u64)NULL));
^
include/efi_loader.h:104:9: note: in definition of macro ‘EFI_CALL’
typeof(exp) _r = exp; \
^~~
cmd/efidebug.c:75:49: warning: cast from pointer to integer of different
size [-Wpointer-to-int-cast]
ret = EFI_CALL(RT->update_capsule(&capsule, 1, (u64)NULL));
^
include/efi_loader.h:104:19: note: in definition of macro ‘EFI_CALL’
typeof(exp) _r = exp; \
^~~
In file included from include/common.h:20,
from lib/efi_loader/efi_capsule.c:9:
lib/efi_loader/efi_capsule.c: In function ‘efi_update_capsule’:
include/efi_loader.h:83:8: warning: format ‘%lu’ expects argument of type
‘long unsigned int’, but argument 10 has type ‘size_t’
{aka ‘unsigned int’} [-Wformat=]
debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
^~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
#define pr_fmt(fmt) fmt
^~~
include/log.h:229:2: note: in expansion of macro ‘log’
log(LOG_CATEGORY, LOGL_DEBUG, fmt, ##args); \
^~~
include/log.h:249:2: note: in expansion of macro ‘debug_cond’
debug_cond(_DEBUG, fmt, ##args)
^~~~~~~~~~
include/efi_loader.h:83:2: note: in expansion of macro ‘debug’
debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
^~~~~
lib/efi_loader/efi_capsule.c:444:2: note: in expansion of macro ‘EFI_ENTRY’
EFI_ENTRY("%p, %lu, %llu\n", capsule_header_array, capsule_count,
^~~~~~~~~
lib/efi_loader/efi_capsule.c:444:19: note: format string is defined here
EFI_ENTRY("%p, %lu, %llu\n", capsule_header_array, capsule_count,
~~^
%u
Signed-off-by: Simon Glass <sjg@chromium.org>
Replace (uintptr_t)NULL by 0.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We are redefining how u-boot locates the initrd to load via the kernel
LoadFile2 protocol. This selftest is not relevant any more, so remove
it. A new one will be added later
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The (yet unreleased version of the) devicetree specification clearly
states that:
As with the /reserved-memory node, when booting via UEFI
entries in the Memory Reservation Block must also be listed
in the system memory map obtained via the GetMemoryMap() toi
protect against allocations by UEFI applications. The memory
reservation block entries should be listed with type
EfiReservedMemoryType.
This restores the behaviour that was changed by commit 4cbb2930bd
("efi_loader: consider no-map property of reserved memory").
Fixes: 4cbb2930bd ("efi_loader: consider no-map property of reserved memory")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
GRUB_ARM32_WORKAROUND can be disabled on ARCH_SUNXI as the Allwinner SoCs
only have a level 2 cache controlled via CP15 and not an architecturally
defined cache. Having the cache available speeds up booting Linux.
On ARCH_BCM283X it is already disabled via rpi_2_defconfig. But let's move
this setting to Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Linux commit a75bbe71a27 ("mtd: rawnand: fsl_ifc: fix FSL NAND driver to
read all ONFI parameter pages")
Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page
read is not valid, the host should read redundant parameter page copies.
Fix FSL NAND driver to read the two redundant copies which are mandatory
in the specification.
Signed-off-by: Jane Wan <Jane.Wan@nokia.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As on some incipient Layerscape platforms (LS1043A series) there isn't
separate PF control register block, these registers reside in the LUT
register block, so when the driver detected there isn't 'ctrl', it will
assign the 'lut' address to the ls_pcie->ctrl.
The current code allocate memory for the struct ls_pcie with random
contents, this can result in skipping to assign the ls_pcie->ctrl with
the 'lut' address, then further crash with the incorrect address.
Fixes: 118e58e26e ("pci: layerscape: Split the EP and RC driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LS1028A-RDB/QDS has Micron "mt35xu02g" nor flash of size 256M with 128K
sector size. Correct CONFIG_ENV_SECT_SIZE value to 128K.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LS1028A-QDS has CONFIG_SPI_FLASH_SST and CONFIG_SPI_FLASH_EON defines
present in header. Move these entries from header to defconfigs.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There is no Spansion flash on LS1028A-RDB/QDS boards.
Unset CONFIG_SPI_FLASH_SPANSION option for both the boards.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is now safe to remove Flexspi configs NXP_FSPI_FLASH_SIZE and
NXP_FSPI_FLASH_NUM options from headers as they are no longer used by
driver anymore.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There is no Spansion flash on LX2160A-RDB/QDS boards.
Unset CONFIG_SPI_FLASH_SPANSION option for both the boards.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The User Guide contains handy things like block diagrams and DIP switch
settings and it's even available on the public web. Add a link to it in
the README.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The T2080RDB has a ds1339 on i2c0. Add this to the devicetree and enable
the relevant support in the configs.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As far as u-boot is concerned the ds1339 is compatible with the other
devices supported by the ds1307 driver. The Linux driver does expose
some additional functionality but as far as u-boot is concerned just
adding the compatible string is enough.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The name of the define must indicate 'Asynchronous', so 'ASYNC' is more
appropriate. AYSNC is probably a typo, and checkpatch script is throwing
a warning if this is set in the board include files.
It is save to change this now as none of the existing designs is using it
so far, but we will use it in our design it help to make IFC settings
more transparent.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Check CONFIG_SOCFPGA_SECURE_VAB_AUTH before perform 'is OS booted from FIT'
checking in board_prep_linux function. And, fix typo of
CONFIG_SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE.
CONFIG_FIT will be enabled in both ATF and VAB boot flow, thus,
board_prep_linux function will always be called by both ATF and
VAB boot flow.
board_pre_linux function will do 'is OS booted from FIT' checking,
and it will be called before board_fit_image_post_process function.
VAB boot flow expects the OS is always booted from FIT and with VAB
signed cerfiticate because the VAB authentication is implemented in
board_fit_image_post_process function. So, VAB needs the 'is OS booted
from FIT' checking in board_pre_linux function.
However, for ATF boot flow, it is not a requirement that the OS must
always booted from FIT. The OS can be booted from individual Image and
kernel dtb file. Thus, we should not do 'if OS is booted from FIT'
checking in board_prep_linux function.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
The startup code in arm/cpu/arm926ejs preserves the link register across
the call to lowlevel_init by using r4:
mov r4, lr /* perserve link reg across call */
bl lowlevel_init /* go setup pll,mux,memory */
mov lr, r4 /* restore link */
The lowlevel_init function for at91 machines based on the same CPU uses r4
and hence corrupts it causing a data abort when it returns to the startup
code. This patch fixes this by using r6 instead of r4 in the lowlevel_init
function.
Discovered and the fix was tested on a AT91SAM9261 based board.
Signed-off-by: Martin Townsend <martin@rufilla.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Now that dtoc generates some new C files, add these to the build so that
the instantiated devices and uclasses can be used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no need to ever add new uclasses since these are set up at build
time. Update the code to return an error if this is attempted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
With this we don't need to scan and bind drivers, not even the root
device. We just need to locate the root device that was set up at build
time, then set our root in global_data to point to it.
Update the code to handle this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
When OF_PLATDATA_INST is enabled we don't need to create the uclass list.
Instead we just need to point to the existing list. Update the code
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
With OF_PLATDATA_INST devices are bound at build time. We should not need
binding of devices at runtime in most cases. However it is inflexible to
absolutely prohibit it, so add an option to control this.
Update the driver model core so that it does not bind devices. Update
device_bind() to return an error if called.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add macros which work with instantiated devices and uclasses, as created
at build time by dtoc. Include variants that can be used in data
structures.
These are mostly used by dtoc but it is worth documenting them fully for
the occasional case where they might come up in user code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present linker lists are designed for use in code. They make use of
statements within expressions ({...}), for example.
It is possible to generate a reference to a linker_list entry that can
be used in data structures, where such features are not permitted. It
requires that the reference first be declared as extern. In other
words the existing macro needs to be split into two parts.
Add new macros to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
We can use extern instead, so let's drop these macros. It adds one more
thing to learn about and doesn't make the code any clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
The module defines a duplicate uclass driver for UCLASS_SIMPLE_BUS, but
it is not allowed. This breaks of-platdata and makes the result
non-deterministic.
The driver does not need to be an uclass driver, so lets remove it. I
had turned it into an uclass driver because I thought wrongly it had to
call the dm_scan_fdt_dev routine to work properly, but some tests on the
board have shown otherwise.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for generating a file containing udevice instances. This
avoids the need to create these at run time.
Update a test uclass to include a 'per_device_plat_auto' member, to
increase test coverage.
Add another tab to the driver_info output so it lines up nicely like the
device-instance output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for generating a file containing uclass instances. This avoids
the need to create these at run time.
Update a test uclass to include a 'priv_auto' member, to increase test
coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a summary to the top of the generated code, to make it easier to see
what the file contains.
Also add a tab to .plat so that its value lines up with the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
For now dtoc only supports a hard-coded list of phandle properties, to
avoid any situation where it makes a mistake in its determination.
Make this into a constant dict, recording both the phandle property name
and the associated #cells property in the target node. This makes it
easier to find and modify.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some of these do not follow the rules. Make sure the driver name matches
the compatible string in all cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this property is a phandle but does not have a #xxx-cells
property to match it. Add one so that is works the same as gpio and clock
phandles.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file is not used when instantiating devices. Update dtoc to skip
generating its contents and just add a comment instead.
Also it is useful to see the driver name and parent for each device.
Update the file to show that information, to avoid updating the same
tests twice.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an option to generate the declaration file, which declares all
drivers and uclasses, so references can be used in the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add Kconfig options to support build-time device instantiation. When
fully implemented, this will allow dtoc to create U-Boot devices (i.e.
struct udevice records) at build time, thus reducing code space in
SPL.
For now this defaults to off, but will be enabled when the rest of
the implementation is in place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an option to instantiate devices at build time. For now this just
parses the option and sets up a few parameters.
Signed-off-by: Simon Glass <sjg@chromium.org>
The device for the root node is normally bound by driver model on init.
With devices being instantiated at build time, we must handle the root
device also.
Add support for processing the root node, which may not have a compatible
string.
Signed-off-by: Simon Glass <sjg@chromium.org>
We only care about uclasses that are actually used. This is determined by
the drivers that use them. Check all the used drivers and build a list of
'valid' uclasses.
Also add references to the uclasses so we can generate C code that uses
them. Attach a uclass to each valid driver.
For the tests, now that we have uclasses we must create an explicit test
for the case where a node does not have one. This should only happen if
the source code does not build, or the source-code scanning fails to find
it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we have the alias information we can assign a sequence number
to each device in the uclass. Store this in the node associated with each
device.
This requires renaming the sandbox test drivers to have the right name.
Note that test coverage is broken with this patch, but fixed in the next
one.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a driver declaration is included in a comment, dtoc currently gets
confused. Update the parser to only consider declarations that begin at
the start of a line. Since multi-line comments begin with an asterisk,
this avoids the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Scan the aliases in the device tree to establish the number of devices
within each uclass, and the sequence number of each.
Signed-off-by: Simon Glass <sjg@chromium.org>
If drivers have the same name then we cannot distinguish them. This only
matters if the driver is actually used by dtoc, but in that case, issue
a warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of using a separate step for this processing, handle it while
scanning its associated driver. This allows us to drop the code coverage
exception in this case.
Note that only files containing drivers are scanned by dtoc, so aliases
declared in a file that doesn't hold a driver will not be noticed. It
would be confusing to put them anywhere other than in the driver that they
relate to, but update the documentation to say this explicitly, just in
case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Typically dtoc can detect the header file needed for a driver by looking
for the structs that it uses. For example, if a driver as a .priv_auto
that uses 'struct serial_priv', then dtoc can search header files for the
definition of that struct and use the file.
In some cases, enums are used in drivers, typically with the .data field
of struct udevice_id. Since dtoc does not support searching for these,
add a way to tell dtoc which header to use. This works as a macro included
in the driver definition.
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot operates in several phases, typically TPL, SPL and U-Boot proper.
The latter does not use dtoc.
In some rare cases different drivers are used for two phases. For example,
in TPL it may not be necessary to use the full PCI subsystem, so a simple
driver can be used instead.
This works in the build system simply by compiling in one driver or the
other (e.g. PCI driver + uclass for SPL; simple_bus for TPL). But dtoc has
no way of knowing which code is compiled in for which phase, since it does
not inspect Makefiles or dependency graphs.
So to make this work for dtoc, we need to be able to explicitly mark
drivers with their phase. This is done by adding an empty macro to the
driver. Add support for this in dtoc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add logic to assign property values to nodes as required by dtoc. The
references allow nodes to refer to each other in C code. The macros used
by dtoc are not yet defined in driver model. They will be added along
with the actual driver model implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is convenient to attach drivers, etc. to nodes so that we can use the
Node object as the main data structure in this module.
Add a function which adds the new properties, along with documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
These have '_test' suffixes which are not present on the drivers in the
source code. Drop the suffixes to avoid a mismatch when scanning.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is confusing to have the test files in the same places as the
implementation. Move them into a separate directory.
Add a helper function for test_dtoc, to avoid repeating the same
path.
Signed-off-by: Simon Glass <sjg@chromium.org>
Drivers can have private / platform data contained in structs and these
struct definitions are generally kept in header files. In order to
generate build-time devices, dtoc needs to generate code that declares
the data contained in those structs. This generated code must include the
relevant header file, to avoid a build error.
We need a way for dtoc to scan header files for struct definitions. Then,
when it wants to generate code that uses a struct, it can make sure it
includes the correct header file, first.
Add a parser for struct information, similar to drivers. Keep a dict of
the structs that were found.
Signed-off-by: Simon Glass <sjg@chromium.org>
Uclasses can have per-device private / platform data so dtoc needs to
scan these drivers. This allows it to find out the size of this data so
it can be allocated a build time.
Add a parser for uclass information, similar to drivers. Keep a dict of
the uclasses that were found.
Signed-off-by: Simon Glass <sjg@chromium.org>
In order to output variables to hold the priv/plat information used by
each device, dtoc needs to know the struct for each. With this, it can
declare this at build time:
u8 xxx_priv [sizeof(struct <name>)];
Collect the various struct names from the drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should ignore anything in the .git directory or any of the
build-sandbox, etc. directories created by 'make check'. These can confuse
dtoc. Update the code to ignore these.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present most of the tests scan the U-Boot source tree as part of their
run. This information does not change across tests, so we can save time
by remembering it.
Add a way to set up this information and use it for each test, taking a
copy first, so as not to mess up the original.
This reduces the run time from about 1.6 seconds to 1.5 seconds on my
machine. For code coverage (which cannot run in parallel), it reduces from
33 seconds to 5.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we simply record the name of a driver parsed from its
implementation file. We also need to get the uclass and a few other
things so we can instantiate devices at build time. Add support for
collecting this information. This requires parsing each driver file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the FAT environment driver to the priority list.
When testing the UEFI sub-system the EFI system partition is formatted with
FAT so it is reasonable to store the environment there.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
goto after return has not effect. Calling of_node_put() in case of some
errors and not for others is inconsistent.
Fixes: 51bdb50904 ("dm: Introduce xxx_get_dma_range()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently keyboard input fails in the GUI window opened by
./u-boot -T -l
Add the missing include to test.dts.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's convenient to be able to scroll up in `patman -H`.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This files uses the macro U_BOOT_CMD which is defined in command.h,
but command.h is conditionally included. Fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The PCI MMC driver depends on the generic MMC SDHCI driver,
otherwise it does not compile.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
UEFI test files like helloworld.efi require an architecture specific
PE-COFF header.
Currently this does not work for cross compiling. If $CROSS_COMPILE is set,
use the first part of the architecture triplet from the variable to
choose the PE-COFF header.
Now we can cross-compile the sandbox, e.g.
make sandbox_defconfig NO_SDL=1
CROSS_COMPILE=/opt/bin/aarch64-linux-gnu- NO_SDL=1 MK_ARCH=aarch64 make
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When a tag is used in a patch subject (e.g. "tag: rest of message") and
it cannot be found as an alias, patman currently reports a fatal error,
unless -t is provided, in which case it reports a warning.
Experience suggest that the fatal error is not very useful. Instead,
default to reporting a warning, with -t tell patman to ignore it
altogether.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the subcommands some of the documentation examples are no-longer
correct. Fix all of them, so it is consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is only one board which uses sandbox SPL. But with
sandbox_noinst being added, this is no longer true. Add a --board flag
so that we just build one board on azure, as is done in gitlab.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch adds an option which allows setting the device header offset.
This is useful if this tool is used to generate ATF BL2 image of mt7622 for
SD cards.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch makes use of the decompression mechanism implemented for mt7628
previously to reduce the total image size. Binman will be also removed.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Currently the setbrg logic of serial-mtk is messy, and should be rewritten.
Also an option is added to make it possible to use highspeed-3 mode for all
bauds.
The new logic is:
1. If baud clock > 12MHz
a) If baud <= 115200, highspeed-0 mode will be used (ns16550 compatible)
b) If baud <= 576000, highspeed-2 mode will be used
c) any bauds > 576000, highspeed-3 mode will be used
2. If baud clock <= 12MHz
Forced highspeed-3 mode
a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST
b) any bauds > 115200, the same as 1. c)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The EPHY LEDs belongs to the built-in FE switch of MT7629, which is barely
used. These LED pins on reference boards are used as JTAG socket. So it's
a good idea to change the default state to JTAG, and this will make it
convenience for debugging.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
It's better to use the generic timer which is correctly initialized by
the ATF. The generic timer has higher resolution than the mtk_timer.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin
group to the pinctrl driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The mtk pinctrl driver is a combination driver with support for both
pinctrl and gpio. When this driver is used in SPL, gpio support may not be
enabled, and this will result in a compilation error.
To fix this, macros are added to make sure gpio related code will only be
compiled when gpio support is enabled.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This is a bug fix for mtk pinctrl common part. Appearently pins should be
used instead of grps in mtk_get_pin_name().
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
More than one pumpkin board has been made with different MediaTek SoCs.
Rename the pumpkin board to follow the naming convention of all
other MediaTek boards and also to not be confusing when other pumpkin
boards will be added in follow-up commits.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
When uploading an EFI binary via the UART we have to call
efi_set_bootdev() or we won't be able to execute it.
Put the includes into alphabetic order.
Fixes: 5f59518a7b ("efi_loader: setting boot device")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When uploading an EFI binary via the UART we need to assign a device path.
* Provide devicepath node to text conversion for Uart() node.
* Provide function to create Uart() device path.
* Add UART support to efi_dp_from_name().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Even if CONFIG_DM_VIDEO=y and stdout="vidconsole", a video device may not
be available. Check the return values of the relevant functions.
If no video output device is available, assume that the serial console is
in use.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At the moment the nvme_get_features() and nvme_set_features() functions
carry a (somewhat misleading) comment about missing cache maintenance.
As it turns out, nvme_get_features() has no caller at all in the tree,
and nvme_set_features' only user doesn't use a DMA buffer.
Mention that in the comment, and leave some breadcrumbs for the future,
should those functions attract more users.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At the moment nvme_read_completion_status() tries to invalidate a single
member of the cqes[] array, which is shady as just a single entry is
not cache line aligned.
The structure is dictated by hardware, and with 16 bytes is smaller than
any cache line we usually deal with. Also multiple entries need to be
consecutive in memory, so we can't pad them to cover a whole cache line.
As a consequence we can only always invalidate all of them - U-Boot just
uses two of them anyway. This is fine, as they are only ever read by the
CPU (apart from the initial zeroing), so they can't become dirty.
Make this obvious by always invalidating the whole array, regardless of
the entry number we are about to read.
Also blow up the allocation size to cover whole cache lines, to avoid
other heap allocations to sneak in.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
The api_public.h header file undefined macro CONFIG_SYS_64BIT_LBA.
But api/api_storage.c includes this header before including part.h,
causing the type of lbaint_t and subsequently the type signature of
blk_dread() and blk_dwrite() functions to change from the rest of U-Boot
(if CONFIG_SYS_64BIT_LBA is defined for the board).
This is of course wrong, because the call to blk_dread() / blk_dwrite()
will receive mangled arguments.
Fix this by removing the undef of macro CONFIG_SYS_64BIT_LBA and instead
make the immediate code do what it would do as if the macro was not
defined.
Add a FIXME to whoever is maintaining this code.
CI managed to trigger this bug when compiling for lsxhl_defconfig, which
has CONFIG_API selected. The compiler complained about blk_dwrite() and
blk_dread() not matching original declarations:
include/blk.h:280:15: warning: type of ‘blk_dwrite’ does not match
original declaration
[-Wlto-type-mismatch]
280 | unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t st
| ^
drivers/block/blk-uclass.c:456:15: note: type mismatch in parameter 2
456 | unsigned long blk_dwrite(struct blk_desc *block_dev, lbaint_t st
| ^
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
The module defines a duplicate uclass driver for UCLASS_SIMPLE_BUS, but
it is not allowed. This breaks of-platdata and makes the result
non-deterministic.
The driver does not need to be an uclass driver, so lets remove it. I
had turned it into an uclass driver because I thought wrongly it had to
call the dm_scan_fdt_dev routine to work properly, but some tests on the
board have shown otherwise.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 8ee802f899 ("mmc: fsl_esdhc: make sure delay chain locked
for HS400") HS400 mode is unreliable on LS1028A SoCs. Some workarounds are
missing for this SoC.
Disable HS400 mode for now.
Signed-off-by: Michael Walle <michael@walle.cc>
building with MTK_AHCI enabled results in implicit declaration and
undefined reference of dev_err followed by a segfault of gcc
drivers/ata/mtk_ahci.c: In function 'mtk_ahci_parse_property':
drivers/ata/mtk_ahci.c:65:4: warning:
implicit declaration of function 'dev_err'
drivers/ata/mtk_ahci.c:65: undefined reference to `dev_err'
in function `mtk_ahci_probe':
drivers/ata/mtk_ahci.c:92: undefined reference to `dev_err'
Segmentation fault
fix this by adding the dm/device_compat.h to includes
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
- Make tests search /sbin for tools, don't use ENODATA in host tools to
be more portable, avb fix when partition isn't found and a bugfix for
mediatek mmc.
On some distributions the mkfs.ext4 is under /sbin and /sbin is not set
for mere users. Include /sbin to the PATH when creating ext4 disk image,
so that users won't get a scary traceback from Python.
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Unfortunately -ENODATA is not available in OpenBSD. Use -EBADMSG
instead, to indicate a missing timestamp.
Fixes: c5819701a3 image: Adjust the workings of fit_check_format()
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
commit e58e68d9 ("mmc: mtk-sd: assign plat->cfg.f_max with a correct value")
wrongly assumed that plat->cfg.f_max is always unset at the time
mscd_drv_probe() is run. This is not true in case max-frequency being
defined in device tree, as it is then already set by mmc_of_parse()
in msdc_of_to_plat().
Only set plat->cfg.f_max to the default maximum value in case it is
not already set to a sane value.
Fixes: e58e68d93e ("mmc: mtk-sd: assign plat->cfg.f_max with a correct value")
Cc: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).
This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.
DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car
E3 (a.k.a. r8a77990), however it doesn't have several automotive
specific peripherals.
This patch hooks R8A774C0 SoC with the pfc driver.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
The HiHope RZ/G2H board from HopeRun consists of main board
(HopeRun HiHope RZ/G2H main board) and sub board(HopeRun
HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits
below the HiHope RZ/G2H main board.
This patch adds the required board support to boot HopeRun HiHope
RZ/G2H board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
The HiHope RZ/G2N board from HopeRun consists of main board
(HopeRun HiHope RZ/G2N main board) and sub board(HopeRun
HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits
below the HiHope RZ/G2N main board.
This patch adds the required board support to boot HopeRun HiHope
RZ/G2N board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
The HiHope RZ/G2M board from HopeRun consists of main board
(HopeRun HiHope RZ/G2M main board) and sub board(HopeRun
HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits
below the HiHope RZ/G2M main board.
This patch adds the required board support to boot HopeRun HiHope
RZ/G2M board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Pull request for efi-2021-04-rc5
Bug fixes:
* fix memory type for memory reservation block
* illegal cast to pointer in initrddump
* fix compiler warnings
Documentation:
* move README.dfu to HTML documentation
Move README.dfu to doc/usage/dfu.rst and convert to reStructured text.
In the long run this page should be split into two. One for the overview
and one for the dfu command. UEFI capsule updates and dfutftp should be
integrated into the overview page.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This occur when building on Raspberry Pi 400 (32-bit ARM). Fix them.
Examples:
cmd/efidebug.c: In function ‘do_efi_capsule_update’:
cmd/efidebug.c:75:49: warning: cast from pointer to integer of different
size [-Wpointer-to-int-cast]
ret = EFI_CALL(RT->update_capsule(&capsule, 1, (u64)NULL));
^
include/efi_loader.h:104:9: note: in definition of macro ‘EFI_CALL’
typeof(exp) _r = exp; \
^~~
cmd/efidebug.c:75:49: warning: cast from pointer to integer of different
size [-Wpointer-to-int-cast]
ret = EFI_CALL(RT->update_capsule(&capsule, 1, (u64)NULL));
^
include/efi_loader.h:104:19: note: in definition of macro ‘EFI_CALL’
typeof(exp) _r = exp; \
^~~
In file included from include/common.h:20,
from lib/efi_loader/efi_capsule.c:9:
lib/efi_loader/efi_capsule.c: In function ‘efi_update_capsule’:
include/efi_loader.h:83:8: warning: format ‘%lu’ expects argument of type
‘long unsigned int’, but argument 10 has type ‘size_t’
{aka ‘unsigned int’} [-Wformat=]
debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
^~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
#define pr_fmt(fmt) fmt
^~~
include/log.h:229:2: note: in expansion of macro ‘log’
log(LOG_CATEGORY, LOGL_DEBUG, fmt, ##args); \
^~~
include/log.h:249:2: note: in expansion of macro ‘debug_cond’
debug_cond(_DEBUG, fmt, ##args)
^~~~~~~~~~
include/efi_loader.h:83:2: note: in expansion of macro ‘debug’
debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
^~~~~
lib/efi_loader/efi_capsule.c:444:2: note: in expansion of macro ‘EFI_ENTRY’
EFI_ENTRY("%p, %lu, %llu\n", capsule_header_array, capsule_count,
^~~~~~~~~
lib/efi_loader/efi_capsule.c:444:19: note: format string is defined here
EFI_ENTRY("%p, %lu, %llu\n", capsule_header_array, capsule_count,
~~^
%u
Signed-off-by: Simon Glass <sjg@chromium.org>
Replace (uintptr_t)NULL by 0.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We are redefining how u-boot locates the initrd to load via the kernel
LoadFile2 protocol. This selftest is not relevant any more, so remove
it. A new one will be added later
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use %z when printing size_t values. This avoids errors on 32-bit
machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use a conversion to size_t for printing stat.st_size.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The (yet unreleased version of the) devicetree specification clearly
states that:
As with the /reserved-memory node, when booting via UEFI
entries in the Memory Reservation Block must also be listed
in the system memory map obtained via the GetMemoryMap() toi
protect against allocations by UEFI applications. The memory
reservation block entries should be listed with type
EfiReservedMemoryType.
This restores the behaviour that was changed by commit 4cbb2930bd
("efi_loader: consider no-map property of reserved memory").
Fixes: 4cbb2930bd ("efi_loader: consider no-map property of reserved memory")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
GRUB_ARM32_WORKAROUND can be disabled on ARCH_SUNXI as the Allwinner SoCs
only have a level 2 cache controlled via CP15 and not an architecturally
defined cache. Having the cache available speeds up booting Linux.
On ARCH_BCM283X it is already disabled via rpi_2_defconfig. But let's move
this setting to Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
Enable relevant configs that checks for the size of image and stack:
BSS: 3KB
Initial MALLOC: ~22KB
Initial Stack: 8K
SPL Image size can be: ~215KB
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Current BSS allocation of SPL is as below:
$ size spl/u-boot-spl
text data bss dec hex filename
132369 7852 1496 141717 22995 spl/u-boot-spl
But 20KB is allocated currently for BSS. Reduce it to 3KB and save some
space for stack.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
In a previous attempt to unify config options and remove items
from the whitelist file, SPL items were moved into a section
enabled with CONFIG_SPL_BUILD. Unfortunately, SPL_PAD_TO
is referenced at the head Makefile and uses this define
to create padding of the output file. When it was moved
to CONFIG_SPL_BUILD, it caused boot errors with devices
that are not booting from NOR. Fix the boot issues by moving
SPL_PAD_TO out so it's always.
Fixes: 7bb33e4684 ("ARM: da850-evm: Unify config options with Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
With bd_info dropped from the data section, the Logic PD OMAP3 boards
and AM3517 fail to boot. Enabling CONFIG_SPL_ALLOC_BD restores
them.
Fixes: 38d6b7ebda ("spl: Drop bd_info in the data section")
Signed-off-by: Adam Ford <aford173@gmail.com>
The Secure Channel Protocol 03 command sends control requests
(enable/provision) to the TEE implementing the protocol between the
processor and the secure element.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds support for a working SCP03 emulation. Input parameters are
validated however the commands (enable, provision) executed by the TEE
are assumed to always succeed.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable and provision the SCP03 keys on a TEE controlled secured elemt
from the U-Boot shell.
Executing this command will generate and program new SCP03 encryption
keys on the secure element NVM.
Depending on the TEE implementation, the keys would then be stored in
some persistent storage or better derived from some platform secret
(so they can't be lost).
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
This Trusted Application allows enabling SCP03 as well as provisioning
the keys on TEE controlled secure element (ie, NXP SE050).
All the information flowing on buses (ie I2C) between the processor
and the secure element must be encrypted. Secure elements are
pre-provisioned with a set of keys known to the user so that the
secure channel protocol (encryption) can be enforced on the first
boot. This situation is however unsafe since the keys are publically
available.
For example, in the case of the NXP SE050, these keys would be
available in the OP-TEE source tree [2] and of course in the
documentation corresponding to the part.
To address that, users are required to rotate/provision those keys
(ie, generate new keys and write them in the secure element's
persistent memory).
For information on SCP03, check the Global Platform HomePage and
google for that term [1]
[1] globalplatform.org
[2] https://github.com/OP-TEE/optee_os/
check:
core/drivers/crypto/se050/adaptors/utils/scp_config.c
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'reset' command now resets sandbox but does not quit it. Fix the
instructions.
Fixes: 329dccc067 ("sandbox: implement reset")
Signed-off-by: Simon Glass <sjg@chromium.org>
Some format strings use the wrong type. Fix them.
Example warnings:
In file included from test/dm/acpi.c:22:
test/dm/acpi.c: In function ‘dm_test_acpi_cmd_list’:
test/dm/acpi.c:362:21: warning: format ‘%lx’ expects argument of type
‘long unsigned int’, but argument 4 has type ‘unsigned int’ [-Wformat=]
ut_assert_nextline("RSDP %08lx %06lx (v02 U-BOOT)", addr,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sizeof(struct acpi_rsdp));
~~~~~~~~~~~~~~~~~~~~~~~~
include/test/ut.h:282:33: note: in definition of macro ‘ut_assert_nextline’
if (ut_check_console_line(uts, fmt, ##args)) { \
^~~
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix the warning:
drivers/tpm/tpm2_tis_sandbox.c: In function ‘sandbox_tpm2_xfer’:
drivers/tpm/tpm2_tis_sandbox.c:288:48: warning: format ‘%ld’ expects
argument of type ‘long int’, but argument 2 has type ‘size_t’
{aka ‘unsigned int’} [-Wformat=]
printf("TPM2: Unmatching length, received: %ld, expected: %d\n",
~~^
%d
send_size, length);
~~~~~~~~~
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We don't need to enable logging to run this command since the output will
still appear. Drop the 'select'.
Signed-off-by: Simon Glass <sjg@chromium.org>
The existing log_ret() and log_msg_ret() macros consider an error to be
less than zero. But some function may return a positive number to indicate
a different kind of failure. Add macros to check for that also.
Signed-off-by: Simon Glass <sjg@chromium.org>
When multiple log() calls are used which don't end in newline, the
log prefix is prepended multiple times in the same line. This makes the
output look strange.
Fix this by detecting when the previous log record did not end in newline.
In that case, setting a flag.
Drop the unused BUFFSIZE in the test while we are here.
As an example implementation, update log_console to check the flag and
produce the expected output.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only a single flag (force_debug) is used in log records. Before
adding more, convert this into a bitfield, so more can be added without
using more space.
To avoid expanding the log_record struct itself (which some drivers may
wish to store in memory) reduce the line-number field to 16 bits. This
provides for up to 64K lines which should be enough for anyone.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a second on writing tests, covering when to use Python and C, where
to put the tests, etc. Add a link to the existing Python test
documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present some of the documentation about running sandbox tests is in the
sandbox docs. It makes more sense to put it in with the other testing
docs, with a link there from sandbox. Update the documentation
accordingly.
Also add a paragraph explaining why sandbox exists and the test philosophy
that it uses.
Signed-off-by: Simon Glass <sjg@chromium.org>
As an example of an SPL test, add a new test for loading a FIT within
SPL. This runs on sandbox_spl. For this to work, the text base is adjusted
so that there is plenty of space available.
While we are here, document struct spl_load_info properly, since this is
currently ambiguous.
This test only verifies the logic path. It does not actually check that
the image is loaded correctly. It is not possible for sandbox's SPL to
actually run u-boot.img since it currently includes u-boot.bin rather than
u-boot. Further work could expand the test in that direction.
The need for this was noted at:
http://patchwork.ozlabs.org/project/uboot/patch/20201216000944.2832585-3-mr.nuke.me@gmail.com/
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this casts addresses to pointers so cannot work with sandbox.
Update the code to use map_sysmem() instead.
As part of this change, the existing load_ptr is renamed to src_ptr since
it is not a pointer to load_addr. It is confusing to use a similar name
for something that is not actually related. For the alignment code,
ALIGN() is used instead of open-coded alignment. Add a comment to the line
that casts away a const.
Use a (new) load_ptr variable to access memory at address load_addr.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function can only locate the u-boot ELF file. For SPL it
is handy to be able to locate u-boot.img since this is what would normally
be loaded by SPL.
Add another argument to allow this to be selected.
While we are here, update the function to load SPL when running in TPL,
since that is the next stage.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present SPL only runs driver model tests. Update it to run all
available tests, i.e. in any test suite.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present each test suite has its own portion of the linker_list section
of the image, but other lists are interspersed. This makes it hard to
enumerate all the available tests without knowing the suites that each one
is in.
Place all tests together in a single contiguous list by giving them
common prefix not used elsewhere in U-Boot. This makes it possible to find
the start and end of all tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use the linker list directly. This is not very friendly, so
add a helpful macro instead. This will also allow us to change the naming
later without updating this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current name is the same as the main test runner file. Rename it to
avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add this functionality to ut_run_list() so it can be removed from
dm_test_run().
At this point all tests are run through ut_run_list().
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a check to ut_run_list() as to whether a list has driver model tests.
Move the logic for the test devicetree into that function, in an effort
to eventually remove all logic from dm_test_run().
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this function to use the return value of ut_run_list() to check for
success/failure, so that they are in sync. Also return a command success
code so that the caller gets what it expects.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use this function instead of implementing it separately for driver model.
Make ut_run_tests() private since it is only used in test-main.c
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use a global test state for all driver-model tests. Make use
of a local struct like we do with the other tests.
To make this work, add functions to get and set this state. When a test
starts, the state is set (so it can be used in the test). When a test
finishes, the state is unset, so it cannot be used by mistake.
Signed-off-by: Simon Glass <sjg@chromium.org>
Driver model tests are generally run twice, once with livetree enable and
again with it disabled. Add a function to handle this and call it from the
driver model test runner.
Make ut_run_test() private since it is not used outside test-main.c now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of having a separate function for running driver model tests, use
the common one. Make the pre/post-run functions private since we don't
need these outside of test-main.c
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this function into the common test runner and rename it to
dm_test_post_run() so that its purpose is clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this function into test-main so that all the init is in one place.
Rename it so that its purpose is clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Driver model is a core part of U-Boot. We don't really need to have a
separate test structure for the driver model tests and it makes it harder
to write a test if you have to think about which type of test it is.
Subsume the fields from struct dm_test_state into struct unit_test_state
and delete the former.
Signed-off-by: Simon Glass <sjg@chromium.org>
For driver model tests we want to reinit the data structures so that
everything is in a known state before the test runs. This avoids one test
changing something that breaks a subsequent tests.
Move the call for this into test_pre_run().
Signed-off-by: Simon Glass <sjg@chromium.org>
We already have a function for silencing the console during tests. Use
this from test_pre_run() and drop this code from the driver model tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Ultimately we want to get rid of the special driver model test init and
use test_pre_run() and test_post_run() for all tests. As a first step,
use those function to handle console recording.
For now we need a special case for setting uts->start, but that wil go
away once all init is in one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Split out the test preparation into a separation function before
expanding it. Add a post-run function as well, currently empty.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new test runner that will eventually be able to run any test. For
now, have it run the 'command' unit tests, so that the functionality in
cmd_ut_category() moves into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is the main test function for driver model but not for other tests.
Rename the file and the function so this is clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
This prefix should be for setexpr, not mem. This means that trying to
select just these tests to run does not work. Fix it.
For some reason this provokes an assertion failure due to memory not
being freed. Move the env_set() in setexpr_test_str() to before the
malloc() heap size size is recorded and disable the rest in
setexpr_test_str_oper().
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a few notes about the sandbox_spl tests, since they are special.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Add details about how to run a sandbox test directly, without using
pytest. This is more convenient for rapid development, since it is faster
and allows easier use of a debugger. Also mention sandbox_flattree as an
example of the different sandbox builds available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a comment about this option in the documentation. Also mention the
script that runs these combinations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With of-platdata we always have a dtv struct that holds the platform data
provided by the driver_info record. However, this struct can be empty if
there are no actual devicetree properties provided.
The upshot of empty platform data is that it will end up as a zero-size
member in the BSS section, which is fine. But if the driver specifies
plat_auto then it expects the correct amount of space to be allocated.
At present this does not happen, since device_bind() assumes that the
platform-data size will always be >0. As a result we end up not
allocating the space and just use the BSS region, overwriting whatever
other contents are present.
Fix this by removing the condition that platform data be non-empty, always
allocating space if requested.
This fixes a strange bug that has been lurking since of-platdata was
implemented. It has likely never been noticed since devices normally have
at least some devicetree properties, BSS is seldom used on SPL, the dtv
structs are normally at the end of bss and the overwriting only happens
if a driver changes its platform data.
It was discovered using sandbox_spl, which exercises more features than
a normal board might, and the critical global_data variable 'gd' happened
to be at the end of BSS.
Fixes: 9fa2819009 ("dm: core: Expand platdata for of-platdata devices")
Signed-off-by: Simon Glass <sjg@chromium.org>
- Some more updates/sync's to A38x DDR3 code (Marek & Pali)
- marvell/ddr/AXP: Some type fixes found in the LTO work (Marek)
- Espressobin: Enable more options (Pali)
- pci-aardvark: Implement workaround for the readback value of
VEND_ID (Paili)
Fix following compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS
are enabled :
arch/arm/mach-stm32mp/cpu.c: In function ‘early_enable_caches’:
arch/arm/mach-stm32mp/cpu.c:223:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’
223 | gd->arch.tlb_size = PGTABLE_SIZE;
| ^
arch/arm/mach-stm32mp/cpu.c:224:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
224 | gd->arch.tlb_addr = (unsigned long)&early_tlb;
| ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove board_early_init_f() and board_late_init() callbacks for stm32
boards as the corresponding flags (CONFIG_BOARD_LATE_INIT and
CONFIG_BOARD_EARLY_INIT_R) are now disabled.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
These flags was defined and callbacks linked to these flags are empty
and only returning 0.
Remove BOARD_EARLY_INIT_F and BOARD_LATE_INIT flags for these stm32 boards.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.
Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Marvell Armada 3720 Functional Errata, Guidelines, and Restrictions
document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243):
The readback value of VEND_ID (RD0070000h [15:0]) is 1B4Bh, while it
should read 11ABh.
The firmware can write the correct value, 11ABh, through VEND_ID
(RD0076044h [15:0]).
Implement this workaround in U-Boot PCIe controller driver aardvark for
both PCI vendor id and PCI subsystem vendor id.
This change affects PCI vendor id of PCIe root bridge emulated by Linux
kernel. With this change Linux kernel reports correct vendor id 11AB.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable support for NVMe disks which can be connected to mPCIe slot via M.2
reduction. Enable btrfs and squashfs filesystems which are used by more
Linux distributions. And enable fsuuid and setexpr commands which can be
useful in scripting.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have
different bounds declared in header files where these variables are also
defined from the ones declared in source files.
This causes the compiler to complain (when building with LTO):
ddr3_sdram.c:24:12: warning: type of ‘pbs_dq_mapping’ does not match
original declaration
[-Wlto-type-mismatch]
ddr3_patterns_64bit.h:911:5: note: array types have different bounds
ddr3_patterns_64bit.h:911:5: note: ‘pbs_dq_mapping’ was previously
declared here
ddr3_dfs.c:45:11: warning: type of ‘div_ratio1to1’ does not match
original declaration [-Wlto-type-mismatch]
ddr3_axp_vars.h:167:4: note: array types have different bounds
ddr3_axp_vars.h:167:4: note: ‘div_ratio1to1’ was previously declared
here
ddr3_dfs.c:46:11: warning: type of ‘div_ratio2to1’ does not match
original declaration [-Wlto-type-mismatch]
ddr3_axp_vars.h:196:4: note: array types have different bounds
ddr3_axp_vars.h:196:4: note: ‘div_ratio2to1’ was previously declared
here
CI managed to trigger this as an error when compiling with LTO for AXP.
Fix this by using values from the header files, which seem to be the
correct ones.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
In arch/arm/mach-mvebu/dram.c we always include axp's xor.h for common
XOR definitions, regardless whether we compile for axp or a38x.
But the declaration of this function has a different signature in axp's
xor.h from the one used in a38x' implementation - one parameter is u64
instead of u32. This can result in wrong argument's being passed to that
function on a38x with no one the wiser.
I discovered this when building U-Boot for Turris Omnia with LTO. The
compiler complains about the different signatures being thrown into the
same linking process:
axp/xor.h:67:5: warning: type of ‘mv_xor_mem_init’ does not match
original declaration [-Wlto-type-mismatch]
67 | int mv_xor_mem_init(u32 chan, u32 start_ptr, u32 block_size,
| ^
a38x/xor.c:165:5: note: type mismatch in parameter 3
165 | int mv_xor_mem_init(u32 chan, u32 start_ptr, unsigned long long
| ^
a38x/xor.c:165:5: note: type ‘long long unsigned int’ should match
type ‘u32’
Fix this by changing the type of the block_size argument in the axp's
implementation and header file to the one used in a38x (and upstream
mv-ddr-marvell).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git up to the
commit 7c351731d196 ("Merge pull request #29 from pali/sync-a38x-uboot").
This patch was created by following steps:
1. Replace all a38x files in U-Boot tree by files from upstream github
Marvell mv-ddr-marvell repository.
2. Run following command to omit portions not relevant for a38x and ddr3:
files=drivers/ddr/marvell/a38x/*
sed 's/#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X)/#ifdef TRUE/' -i $files
unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 -UCONFIG_APN806 \
-UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \
-UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DTRUE $files
3. Manually omit SPDX-License-Identifier changes from this patch as
upstream license in upstream github repository contains long license
texts and U-Boot is using just SPDX-License-Identifier.
After applying this patch, a38x ddr3 code in upstream Marvell github
repository and in U-Boot would be fully identical. So in future applying
above steps could be used to sync code again.
The only change in this patch is removal of dead code and some fixes with
include files.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
commit 258be123226f8f5cd516b7813fe201fb7d7416e9 upstream.
At this moment, only page 0 of SPD is being read but to support
smbios, we need to read page 1 also which has more info. In order
to do that, we need to allocate more space.
Signed-off-by: Sujeet Baranwal <sujeet.baranwal@cavium.com>
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Sujeet Kumar Baranwal <Sujeet.Baranwal@cavium.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Check whether user has explicitly defined the mmc device to use
in mmc_get_env_dev() with CONFIG_SYS_MMC_ENV_DEV.
On STMicroelectronics boards the used mmc device for environment is
the instance of boot device provided by the ROM code; the mmc instance
is configured by alias in device tree. The used partition is defined in
device tree with u-boot,mmc-env-partition = "ssbl".
This patch allows to override this selection for the support of customer
boards without alias; for example when SDMMC1 is not used and ENV in
mmc0=SDMMC2, user can force the value: CONFIG_SYS_MMC_ENV_DEV = 0.
On STMicroelectronics boards, the current behavior is kept with
CONFIG_SYS_MMC_ENV_DEV = -1.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The DSI phy can be turned on from the DSI digital interface in
the dphy_enable() function or from a dedicated DSI phy "wrapper"
in phy_ops->init() function. If the STM32MP1 case, the wrapper
is used then the dphy_enable() "warning" traces are not relevant.
This patch moves these "warning" traces to "debug" traces so
they are still available for DSI phy based on the digital
interface in debug logging mode, but not there in normal mode
for both cases.
Note: The related Linux kernel driver uses a "debug"
message too.
Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Remove the child device of the STM32 DSI bridge when the driver probe
failed to stop futher probe request on panels used with STMicroelectronics
board (orisetech_otm8009a.c or raydium-rm68200.c driver).
This patch avoid the trace "cannot get reset GPIO" when
STM32MP157 device tree is used on stm32MP151 SOC without DSI support.
In this hw_version value is 0, as DSI bridge is absent and the panel
ofdata_to_platdata is called for each try of panel probe,
the gpio reset pin is requested but after dsi father probe failed).
For the next request, the PANEL ofdata_to_platdata failed as the gpio
is already used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The STM32MP15 boards have no reason to configure bootdelay in stm32mp1.h
as it is already done with CONFIG_BOOTDELAY (default = 2) and in
include/env_default.h.
This patch allows configuration for customers which reuse stm32mp1.h
and reduce the size of the default environment.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The command "stm32prog serial <dev>" can directly use the device sequence
number of serial uclass as this sequence number is egual to alias when it
exist; this assumption simplify the code and avoid access to gd->fdt_blob
and the device tree parsing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When serial instance is not found in device tree, the console
should be enabled and the error should be indicated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add CONFIG_CMD_STM32PROG_SERIAL and CONFIG_CMD_STM32PROG_USB to
independently select the support of UART or USB communication for
STM32CubeProgrammer.
For serial boot over UART, user can deactivate CONFIG_CMD_STM32PROG_SERIAL
to use U-Boot console of binary loaded by UART (for board bring-up for
example).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Since commit d5d726d3cc ("configs: stm32mp1: only support SD card after
NOR in bootcmd_stm32mp"), the stm32mp1 boards only support SD card after
NOR boot device, so the MTD partitions for nand0 or spi-nand0 are useless
(no need of "UBI" partition in nand0 or spi-nand0).
This patch removes these nand MTD update for nor boot and simplify nand0
and spi-nand0 support (remove the mtd_boot variable).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Enable SCMI clock and reset domain support for stm32mp1 platform
and ARM SMC mailbox driver used as communication channel for
SCMI messages between non-secure world and secure SCMI server.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This change makes stm32mp1 clock driver to get the root clocks
reference from the device node in the FDT rather than fetching
straight these clocks by their name. Driver now stores the
clock reference and use it to know if a root clock is present,
get its rate or gets its related udevice reference.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Define in the RCC clock provider node which root clocks the driver
depends on. These are root oscillators, which may be present or
not, upon FDT content.
This update binding is introduced in Linux kernel device tree by patch
"ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15"
This patch is a preliminary step for SCMI support of stm32mp15
boards with trusted boot chain, based on TF-A or OP-TEE.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In case of big area read/write on spi nand, watchdog timeout may occurs.
To fix that, add WATCHDOG_RESET() in spinand_mtd_read() and
spinand_mtd_write() to ensure that watchdog is reset.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In case of big area erased on nand, watchdog timeout may occurs.
To fix that, add WATCHDOG_RESET() in nanddev_mtd_erase() to ensure that
watchdog is reset.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In case of reading large area and memory-map mode is misconfigured
(memory-map size declared lower than the real size of the memory chip)
watchdog can be triggered.
Add WATCHDOG_RESET() in _stm32_qspi_read_fifo to fix it.
Issue reproduced with stm32mp157c-ev1 board and memory map size set to
1, with following command:
sf read 0xC0000000 0 0x4000000
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In case of big area write/erase on spi nor, watchdog timeout may occurs.
Issue reproduced on stm32mp157c-ev1 with following commands:
sf write 0xC0000000 0 0x3000000
or
sf erase 0 0x1000000
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
When flush cache of the current GPD and resume QMU, the controller
will try to access the next GPD after processing the current one,
if not flush the next GPD, the controller may get wrong GPD status.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
At present most of the Intel-specific code is built on all devices, even
those which don't have software support for the features provided there.
This means that any board can enable CONFIG_INTEL_ACPIGEN even if it does
not have the required features.
Add a new INTEL_SOC option to control this access. This must be selected
by SoCs that can support the required features.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This option is better placed in the x86 code since it is not generic
enough to be in the core code. Move it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in arch/x86/Kconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Building qemu-x86_64_defconfig with GCC 11.0 fails with:
arch/x86/cpu/intel_common/lpc.c:
In function ‘lpc_common_early_init’:
arch/x86/cpu/intel_common/lpc.c:56:40:
error: expression does not compute the number of elements in this array;
element type is ‘struct reg_info’, not ‘u32’ {aka ‘unsigned int’}
[-Werror=sizeof-array-div]
56 | sizeof(values) / sizeof(u32));
| ^
arch/x86/cpu/intel_common/lpc.c:56:40: note: add parentheses around the
second ‘sizeof’ to silence this warning
arch/x86/cpu/intel_common/lpc.c:50:11: note: array ‘values’ declared here
50 | } values[4], *ptr;
| ^~~~~~
Add parentheses to silence warning.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel
SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex"
is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It
combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to
generate the final configuration bitstream for Intel SOCFPGA SOC64
devices.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch
move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to
*_defconfig file for both Stratix 10 and Agilex.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Support 'vab' command to perform vendor authentication.
Command format: vab addr len
Authorize 'len' bytes starting at 'addr' via vendor public key
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Vendor Authorized Boot is a security feature for authenticating
the images such as U-Boot, ARM trusted Firmware, Linux kernel,
device tree blob and etc loaded from FIT. After those images are
loaded from FIT, the VAB certificate and signature block appended
at the end of each image are sent to Secure Device Manager (SDM)
for authentication. U-Boot will validate the SHA384 of the image
against the SHA384 hash stored in the VAB certificate before
sending the image to SDM for authentication.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Pull request for efi-2021-04-rc3-3
New:
* Provide library functions for converting UTF-8 streams either to code
page 437 or Unicode code points.
Bug fixes:
* Fix the capsule update unit tests.
* Use the terminal size of the video console if it is the primary output.
Up to now the EFI capsule Python tests were always skipped. The reason is
that mkimage fails with:
uboot_bin_env.its:13.21-23.5: Warning (unit_address_vs_reg):
/images/u-boot-bin@100000: node has a unit name, but no reg property
uboot_bin_env.its:24.21-34.5: Warning (unit_address_vs_reg):
/images/u-boot-env@150000: node has a unit name, but no reg property
If a unit in a device-tree has an address, a reg property must be provided.
But adding a reg property is not the solution here.
Since 2017 unit addresses are disallowed for FIT,
cf. common/image-fit.c:1624.
So remove the unit addresses in uboot_bin_env.its.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
utf8_get() should return an error if hitting an illegal UTF-8 sequence and
not silently convert the input to a question mark.
Correct utf_8() and the its unit test.
console_read_unicode() now will ignore illegal UTF-8 sequences.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Carve out a function to translate a Unicode code point to an 8bit codepage.
Provide a unit test for the new function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If stdout is 'vidconsole', we correctly set the console size.
If stdout is 'vidconsole,serial', the video console is ignored.
We should always evaluate the size of vidconsole if it is the primary
console.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Convert qemu-ppce500 to driver model and enable additional driver
support
- bug fixes/updates in net-dsa driver, vid driver, move configs to kconfig
- Update Maintainers of some powerpc, layerscape platforms
Add a reST document to describe how to build and run U-Boot for
the QEMU ppce500 machine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
board/emulation is the place for other QEMU targets like x86, arm,
riscv. Let's move the qemu-ppce500 board codes there.
List me as a co-maintainer for this board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This function is not called anywhere. Only fsl_ddr_sdram_size() is
necessary [1] for QEMU. Drop it.
[1] arch/powerpc/cpu/mpc85xx/cpu.c::dram_init()
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Now that we have switched to CONFIG_OF_CONTROL, and we can use the
env variable 'fdtcontroladdr' directly instead of creating one that
is duplicated.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
After U-Boot is relocated to RAM already, the previous temporary FDT
virtual-physical mapping that was used in the pre-relocation phase
is no longer needed. Let's delete the mapping.
get_fdt_virt() might be used before and after relocation, update it
to return different virtual address of FDT.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The QEMU ppce500 target integrates a Freescale I2C controller and
has a Pericom pt7c4338 RTC connected to it. Enable corresponding
DM drivers so that 'date' command is actually useful.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The QEMU ppce500 target provides the power off functionality via
the GPIO pin#0, and we can support this using the sysreset gpio
poweroff driver. Let's enable it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
sysreset uclass driver provides an implementation of 'reset'
command using the sysreset_ APIs unconditionally. It also
supports the 'poweroff' command using the sysreset_ APIs,
but under a Kconfig option CONFIG_SYSRESET_CMD_POWEROFF.
Let's do the same for the 'reset' command, by introducing a
new Kconfig option CONFIG_SYSRESET_CMD_RESET, and set it to
on by default, to allow a board that don't have a sysreset
reset driver yet, but have a sysreset poweroff driver to
compile without any issue.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
QEMU ppce500 target integrates a GPIO controller that is compatible
with the QorIQ GPIO controller. Enable the DM GPIO driver for it
and the 'gpio' command.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
dev_read_addr_size_index() returns fdt_addr_t which might be a
64-bit physical address. This might be true for some 85xx SoCs
whose CCSBAR is mapped beyond 4 GiB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Without this, the DM GPIO driver for MPC8xxx does not compile for
MPC85xx SoCs.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable VirtIO BLK driver so that we can store a kernel image to
a disk image and boot from there.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The VirtIO BLK driver depends on the blk uclass driver.
Add the dependency in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
By default the QEMU ppce500 machine connects a VirtIO NET to the
PCI controller, although it can be replaced to an e1000 NIC via
additional command line options.
Now that we have switched over to DM PCI, VirtIO support becomes
possible. This commit enables the support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The 'virtio' command calls blk_common_cmd() which is only available
when CONFIG_HAVE_BLOCK_DEVICE is on. Fix the Kconfig dependency.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present the board supports non-DM version PCI and E1000 drivers.
Switch over to use DM ETH and PCI by:
- Rewrite the PCI address map functions using DM APIs
- Enable CONFIG_MISC_INIT_R to do the PCI initialization and
address map
- Drop unnecessary ad-hoc config macros
- Remove board_eth_init() in the board codes
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present the driver only supports 32-bit bus and cpu address.
The controller's outbound registers/fields for extended address
are not programmed. Let's program them to support 64-bit bus and
cpu address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
devfdt_get_addr_index() returns fdt_addr_t which might be a 64-bit
physical address. Use map_physmem() to return the virtual address
that can be used by a 32-bit machine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
For the QEMU ppce500 machine, LAW registers are not implemented
hence CONFIG_FSL_LAW is not turned on and all LAW APIs are not
available. We should wrap all LAW registers programming in the
mpc85xx PCI driver with CONFIG_FSL_LAW.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch
over to use the DM version of the driver by:
- drop unnecessary ad-hoc config macros
- add get_serial_clock() in the board codes
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present initr_addr_map() is put at a late stage in the
init_sequence_r[] calls. This won't work because lot of
device driver initialization (e.g.: serial port) happens
before it but is lack of the address translation support.
This moves the call to a bit earlier, right after the DM
initialization.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In phys_to_virt() and virt_to_phys(), if CONFIG_ADDR_MAP is defined,
they use addrmap_ translation APIs to do the address translation.
However these APIs only work in post-relocation phase.
Update the code logic to fall back to use the default one when in
pre-relocation phase.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This adds a new command 'addrmap' to display the address map for
non-identity virtual-physical memory mappings.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present address_map[] is static and its type is unknown to external
modules. In preparation to create a command to list its contents, this
patch moves its type definition and declaration to the header file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present QEMU ppce500 target has not been migrated to driver model
yet. As a start, let's enable driver model and the 'dm' command.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The QEMU ppce500 machine generates a device tree blob and passes
it to U-Boot during boot. Let's enable OF_CONTROL with OF_BOARD
and provide board_fdt_blob_setup() in the board codes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_SYS_PCI_MAP_END currently points to 0xe8000000, which means
the upper end of the virtual address mapped to PCI bus address ends
at 0xe8000000. But this is wrong as the CCSBAR was already mapped
at 0xe0000000 with a 1 MiB size.
Fixes: fa08d39517 ("PPC 85xx: Add qemu-ppce500 machine")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When QEMU originally supported the ppce500 machine back in Jan 2014,
it was created with a 1:1 mapping of PCI bus address. Things seemed
to change rapidly that in Nov 2014 with the following QEMU commits:
commit e6b4e5f4795b ("PPC: e500: Move CCSR and MMIO space to upper end of address space")
and
commit cb3778a0455a ("PPC: e500 pci host: Add support for ATMUs")
the PCI memory and IO physical address were moved to beyond 4 GiB,
but PCI bus address remained below 4 GiB, hence a non-identity
mapping was created. Unfortunately corresponding U-Boot updates
were missed along with the QEMU changes and the U-Boot QEMU ppce500
PCI support has been broken since then.
This commit makes the PCI (non-DM version) work again.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
At present fdt_read_prop() can only handle 1 or 2 cells. It is
called by fdt_read_range() which may be used to read PCI address
from <ranges> for a PCI bus node where the number of PCI address
cell is 3. The <ranges> property is an array of:
{ <child address> <parent address> <size in child address space> }
When trying to read <child address> from a PCI bus node using
fdt_read_prop(), as the codes below:
/* Read <child address> */
if (child_addr) {
r = fdt_read_prop(ranges, ranges_len, cell, child_addr,
acells);
if (r)
return r;
}
it will fail, because the PCI child address is made up of 3 cells
but fdt_read_prop() cannot handle it. We advance the cell offset
by 1 so that the <child address> can be correctly read.
This adds the special handling of such case.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Commit e002474158 ("pci: pci-uclass: Dynamically allocate the PCI regions")
changes 'struct pci_controller'.regions from pre-allocated array of
regions to dynamically allocated, which unfortunately broken lots of
boards that still use the non-DM PCI driver.
This patch changes the non-DM fsl_pci_init driver to dynamically
allocate the regions, just like what's done in the pci uclass driver.
Fixes: e002474158 ("pci: pci-uclass: Dynamically allocate the PCI regions")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Because we probe the master ourselves (and fail if there is no master),
it is not possible that we don't have a master device.
There is one catch though: device removal. We don't support that. It
wasn't supported neither before this patch. Because the master device
was only set in .pre_probe(), if a device was removed master_dev was a
dangling pointer and transmitting a frame cause a panic. I don't see a
good solution without having some sort of notify machanism when a
udevice is removed.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc> [DSA unit tests]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Because the uclass has the "*_auto" properties set, the driver model
will take care of allocating the private structures for us and they
can't be NULL. Drop the checks.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
DSA needs to have the master device probed first for MAC inheritance.
Until now, it only works by chance because the only user (LS1028A SoC)
will probe the master device first. The probe order is given by the PCI
device ordering, thus it works because the master device has a "smaller"
BDF then the switch device.
Explicitly probe the master device in dsa_port_probe().
Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It doesn't make sense to have DSA without a master port. Error out early
if there is no master port.
Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Remove MAINTAINERS entries for
P3041DS_NAND_SECURE_BOOT_defconfig
and P5040DS_NAND_SECURE_BOOT_defconfig
as these configs support have been removed.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch adds support for more PMBus compatible devices to the NXP
drivers for its QorIQ family devices. At runtime, the voltage regulator is
queried over I2C, and the required voltage multiplier determined. This
change supports the DIRECT and LINEAR PMBus voltage reporting modes.
Previously, the driver only supported a few specific devices such as the
IR36021 and LTC3882, so this change allows the QorIQ series to be used
with a much larger variety of core voltage regulator devices.
checkpatch warning "Use if (IS_DEFINED (...))" was ignored to maintain
consistency with the existing code.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
There are times where buildman seems to get stuck in this job when in
CI. Forcing single-threaded here allows us to complete and move on.
Signed-off-by: Tom Rini <trini@konsulko.com>
At present even if only a single thread is in use, buildman still uses
threading.
For some debugging it is helpful to do everything in the main process.
Allow -T0 to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Commit 401d1c4f5d ("common: Drop
asm/global_data.h from common header") broke compilation of squashfs
filesystem when CONFIG_CMD_SQUASHFS=y is enabled.
Compilation is failing on error:
aarch64-linux-gnu-ld.bfd: u-boot/fs/squashfs/sqfs_inode.c:121: undefined reference to `le32_to_cpu'
Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
A working device tree node of ns16550 should never be populated
with value zero for the <clock-frequency> property. Unfortunately
this is the case for the QEMU ppce500 target.
Let's try to assign plat->clock to CONFIG_SYS_NS16550_CLK as the
last resort to handle such case.
This commit should be reverted when:
- The following QEMU patch [1] is merged, and
- U-Boot CI has upgraded its QEMU version that contains the fix
[1] http://patchwork.ozlabs.org/project/qemu-devel/patch/1612362288-22216-2-git-send-email-bmeng.cn@gmail.com/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently ns16550_serial_assign_base() treats the argument 'base'
with type `ulong`. This is incorrect because the base address was
obtained from device tree with type `fdt_addr_t` that can represent
a physical address larger than 32-bit in a 32-bit system.
Fixes: 9e6ce62190 ("serial: ns16550: Fix ordering of getting base address")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
lib/of_live.c references the following 2 ofnode APIs:
of_alias_scan() and of_get_property().
These APIs get built only when DM is on. Fix the dependency then.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
lib/binman.c references the following 3 ofnode APIs:
ofnode_first_subnode(), ofnode_path() and ofnode_read_bool().
These APIs get built only when DM is on. Fix the dependency then.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Each invocation of the 'host bind' command with a file name argument opens
a file descriptor. The next invocation of the 'host bind' command destroys
the block device but the file descriptor remains open. The same holds true
for the 'unbind blk' command.
Close the file descriptor when unbinding the host block device.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
patman's --limit-cc option parses its argument to an integer and uses
that to trim the list of CC recipients to a particular maximum. but that
only works if the cc variable is a list, which it is not.
Signed-off-by: Bernhard Kirchen <bernhard.kirchen@mbconnectline.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present these three Kconfigs exist even when bootstage is not enabled.
This is not necessary since bootstage.c is only built if BOOTSTAGE is
enabled.
Make them conditional. Also fix up the overflow message to mention TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present device_bind() does some unnecessary work if a device fails to
bind in SPL. Add the missing conditions.
Also fix a style nit in the same function while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
With of-platdata we always have a dtv struct that holds the platform data
provided by the driver_info record. However, this struct can be empty if
there are no actual devicetree properties provided.
The upshot of empty platform data is that it will end up as a zero-size
member in the BSS section, which is fine. But if the driver specifies
plat_auto then it expects the correct amount of space to be allocated.
At present this does not happen, since device_bind() assumes that the
platform-data size will always be >0. As a result we end up not
allocating the space and just use the BSS region, overwriting whatever
other contents are present.
Fix this by removing the condition that platform data be non-empty, always
allocating space if requested.
This fixes a strange bug that has been lurking since of-platdata was
implemented. It has likely never been noticed since devices normally have
at least some devicetree properties, BSS is seldom used on SPL, the dtv
structs are normally at the end of bss and the overwriting only happens
if a driver changes its platform data.
It was discovered using sandbox_spl, which exercises more features than
a normal board might, and the critical global_data variable 'gd' happened
to be at the end of BSS.
Fixes: 9fa2819009 ("dm: core: Expand platdata for of-platdata devices")
Signed-off-by: Simon Glass <sjg@chromium.org>
Using the internal vs. external pull resistors it is possible to get
27 different combinations from 3 strapping pins. Add an implementation
of this.
This involves updating the sandbox GPIO driver to model external and
(weaker) internal pull resistors. The get_value() method now takes account
of what is driving a pin:
sandbox: GPIOD_EXT_DRIVEN - in which case GPIO_EXT_HIGH provides the
value
outside source - in which case GPIO_EXT_PULL_UP/DOWN indicates the
external state and we work the final state using those flags and
the internal GPIOD_PULL_UP/DOWN flags
Of course the outside source does not really exist in sandbox. We are just
modelling it for test purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new flag to keep track of whether sandbox is driving the pin, or
whether it is expecting an input signal. If it is driving, then the value
of the pin is the value being driven (0 or 1). If not driving, then we
consider the value 0, since we don't currently handle things like pull-ups
yet.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
We don't need to implement direction_input() and direction_output()
anymore. Drop them and use update_flags() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this driver to use the common method of putting the driver
operations in an 'ops' variable install of calling gpio_get_ops()
repeatedly. Make it const since operations do not change.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The new update_flags() method is more flexible since it allows the
driver to see the full flags all at once. Use that in preference to these
two functions. Add comments to that effect.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
It is convenient to be able to adjust some of the flags for a GPIO while
leaving others alone. Add a function for this.
Update dm_gpio_set_dir_flags() to make use of this.
Also update dm_gpio_set_value() to use this also, since this allows the
open-drain / open-source features to be implemented directly in the
driver, rather than using the uclass workaround.
Update the sandbox tests accordingly. This involves a lot of changes to
dm_test_gpio_opendrain_opensource() since we no-longer have the direciion
being reported differently depending on the open drain/open source flags.
Also update the STM32 drivers to let the uclass handle the active low/high
logic.
Drop the GPIOD_FLAGS_OUTPUT() macro which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Allow this function to see all flags, including the internal sandbox ones.
This allows the tests to fully control the behaviour of the driver.
To make this work, move the setting of GPIOD_EXT_HIGH -to where the flags
are updated via driver model, rather than the sandbox 'back door'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
At present we have the concept of a pin's external value. This is what
is used when getting the value of a pin. But we still set the
GPIOD_IS_OUT_ACTIVE flag when changing the value. This is not actually
correct, since if the pin changes from output to input, the external
value need not change. Adjust the logic for this difference.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
At present with the sandbox GPIO driver it is not possible to change the
value of GPIOD_IS_OUT_ACTIVE unless the GPIO is an output. This makes it
hard to test changing the flags since we need to be aware of the internal
workings of the driver.
The feature is designed to aid testing.
Split this feature out into a separate sandbox-specific flag, so that the
flags can change unimpeded. This will make it easier to allow updating the
flags in a future patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Adjust the terminology in this driver to reflect that fact that all flags
are handled, not just direction flags.
Create a new access function to get the full GPIO state, not just the
direction flags. Drop the static invalid_dir_flags since we can rely on a
segfault if something is wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This function can be used to get any flags, not just direction flags.
Rename it to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
It is more useful to be able to read all the flags, not just the direction
ones. In fact this is what the STM32 driver does. Update the method name
to reflect this.
Tweak the docs a little and use 'flagsp' as the return argument, as is
common in driver model, to indicate it returns a value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
The current method is a misnomer since it is also used (e.g. by stm32) to
update pull settings and open source/open drain.
Rename it and expand the documentation to cover a few more details.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
These functions use devicetree and cannot work with of-platdata, which has
no runtime devicetree.
If they are used, the current linker error is confusing, since it talks
about missing functions in the bowels of driver model.
Avoid compiling these functions at all with of-platdata, so that a
straightforward link error points to the problem.
Series-changes; 3
- Fix 'wprl' typo
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
DM_VIDEO migration deadline is already expired, but around
80 Allwinner boards are still using video in a legacy way:
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Convert the legacy video driver over to the DM_VIDEO framework. This is
a minimal conversion: it doesn't use the DT for finding its resources,
nor does it use DM clocks or DM devices for the outputs (LCD, HDMI, CVBS).
Tested in Bananapi M1+ Plus 1920x1200 HDMI out. (Jagan)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: rebase and smaller fixes]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now when usbtty serial console is fixed in U-Boot enable CONFIG_USB_TTY for
Nokia RX-51 board by default.
Fix also USB product id as U-Boot ignores CONFIG_USBD_PRODUCTID macro and
include U-Boot string into USB product name to indicate usage of U-Boot.
CONFIG_CONSOLE_MUX is already used and U-Boot console is available for
all in/out devices. Therefore there is no need to have separate commands
'run sercon', 'run usbcon' and 'run vgacon', so remove them.
As space for U-Boot is limited to 256kB, enable CONFIG_OPTIMIZE_INLINING
and disable some other unused options so CONFIG_USB_TTY can be enabled.
Nokia RX-51 does not have easily accessible UART serial console so the only
option for easy debugging is to use device's keyboard+screen or this usbtty
serial console over USB.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
After removal of MUX configuration there is no need to have extra rx51.h.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
This function is not used and was never called.
This board contains '#define CONFIG_SKIP_LOWLEVEL_INIT' because X-Loader
set everything up, including MUX configuration.
Also this MUX configuration is incorrect and does not match hardware.
So remove this dead, unused and broken code.
This change will decrease size of U-Boot binary.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
Function s_init() is called only from lowlevel_init(). So compile it only
when function lowlevel_init() is compiled.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
Function lowlevel_init() is called only from cpu_init_crit() and this
function is wrapped into #if .. #endif section. So compile also
lowlevel_init() function under same #if condition.
Function cpy_clk_code() uses lowlevel_init symbol to get address where
go_to_speed code ends. As this symbol is not available anymore when
compiling with CONFIG_SKIP_LOWLEVEL_INIT, defines a new label
go_to_speed_end at the place where go_to_speed code ends.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
All debug messages from ep0.c except a few are printed by dbg_ep0() macro.
So for remaining few exceptions use also dbg_ep0() instead of serial_printf().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
If we do not set FIFO buffer address and size for some endpoint which is in
use then default programmed address 0x0 would be used which is in conflict
with address of FIFO buffer for endpoint 0. Moreover address of FIFO buffer
for endpoint 0 cannot be programmed, it is fixed to 0x0. Sharing address
space between more endpoints cause data loss and unexpected errors.
This patch is fixing transmission of characters over usbtty serial console
and allows using of usbtty for debugging purposes on Nokia N900.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
Interrupt for EP0 is indicated in intrtx register via first bit. This bit
is set for both RX and TX despite register has only TX in its name. First
bit in intrrx register is reserved, not used and never set.
So remove calling musb_peri_ep0() function at every iteration of udc_irq()
and musb_peri_rx() and call it only from musb_peri_tx() when correct
interrupt bit in initrtx it set.
Address from SET ADDRESS command must be set to faddr register only after
acknowledging SERV_RXPKTRDY followed by received EP0 interrupt. So prior
calling musb_peri_ep0_set_address() check for EP0 interrupt instead of
(incorrect) MUSB_INTR_SOF interrupt.
This patch fixes issue that host (computer) cannot register U-Boot USB
device and is failing with errors:
usb 1-1: new full-speed USB device number 86 using xhci_hcd
usb 1-1: Device not responding to setup address.
usb 1-1: Device not responding to setup address.
usb 1-1: device not accepting address 86, error -71
U-Boot was writing address to faddr register too early and did not wait for
correct interrupt after which should update address.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
If musb_peri_rx_ep() was called to process received HW buffer but U-Boot
cannot read it yet (e.g. because U-Boot SW buffer is full) then interrupt
was marked as processed also when HW buffer stayed unprocessed.
U-Boot tried to process this buffer again when it received interrupt again,
but it can receive it only when sender (host) sends a new data. As sender
(host) is not going to send a new data until U-Boot process current data
this issue caused a deadlock in case sender (host) is emitting data faster
than U-Boot can process it.
Reading musb intrrx register automatically clears this register and marks
interrupt as processed. So to prevent marking interrupt in U-Boot as
processed, adds a new variable pending_intrrx which would contain
unprocessed bits of intrrx register.
For a second step, every time when musb_peri_rx_ep() is called and there
are waiting data to be processed (signaled by MUSB_RXCSR_RXPKTRDY) either
acknowledge sender (via musb_peri_rx_ack()) that whole HW buffer was
processed or set corresponding bit in pending_intrrx that HW buffer was not
fully processed yet and next iteration is required after U-Boot allocates
space for reading HW buffer.
This patch fixes receiving large usb buffers, e.g. file transfer via Kermit
protocol implemented by 'loadb' U-Boot command over usbtty serial console.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
If udc_endpoint_write() was called with bigger payload which does not fit
into one USB packet it is needed to transmit payload in more USB packets.
First packet is transmitted by udc_endpoint_write() call itself and other
packets are put into waiting queue.
Implement function musb_peri_tx() which checks if endpoints are ready for
transmit and continue transmission of waiting queue.
This patch fixes sending big output from printenv command over usbtty
serial console.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>>
PERI_RXCSR is 16bit register so store its value into 16bit local variable.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
This patch fixes configuring FIFOs for one-directional endpoints which have
only one queue (either RX or TX, but noth both).
Size of FIFO buffer is 2^(idx+3) bytes and starting address is 2^(addr+3).
Moreover first 64 bytes are reserved for EP0.
Without this patch if FIFO size specified by caller was zero then idx was
incorrectly calculated (expr. ffs(0)-1) and size overflowed in fifosz
register. This register uses has only 4 bits for FIFO size. Moreover
specifying zero buffer size is not possible (with idx=0 is minimal buffer
size 8 bytes).
So even for one-directional endpoints we need to correctly specify both
(RX and TX) FIFO buffer sizes and its addresses.
This patch is fixing calculation of start address and buffer size to
minimal value and ensures that it would not overlap with buffer reserved
for EP0.
This issue caused loose of packets on USB bus in both directions and
basically usbtty was unusable.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
Without this patch clearing was done only when U-Boot was compiled with
MUSB Host Controller. But clearing of data toggle bit is needed also for
MUSB Device Controller otherwise Device Controller does not work correctly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
musb udc code depends on usb gadget code provided by CONFIG_USB_DEVICE as
defined in drivers/usb/gadget/Makefile. But this Makefile is not included
into U-Boot build when CONFIG_USB_GADGET is not set. As CONFIG_USB_DEVICE
cannot be enabled together with CONFIG_USB_GADGET it means that dependency
for musb udc code is not compiled during build. Fix it by including
drivers/usb/gadget dependency also when CONFIG_USB_DEVICE is set.
This patch fixes compile errors:
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `musb_peri_ep0_rx':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `ep0_recv_setup'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `musb_peri_ep0_idle':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `ep0_recv_setup'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `musb_peri_ep0_zero_data_request':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `musb_peri_ep0_idle':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `ep0_recv_setup'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `musb_peri_ep0_rx':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_rcv_complete'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `musb_peri_rx_ep':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_rcv_complete'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `udc_endpoint_write':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_tx_complete'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `udc_irq':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o:u-boot/drivers/usb/musb/musb_udc.c: more undefined references to `usbd_device_event_irq' follow
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `udc_setup_ep':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_alloc_urb'
arm-linux-gnueabi-ld.bfd: drivers/usb/musb/built-in.o: in function `udc_startup_events':
u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
arm-linux-gnueabi-ld.bfd: u-boot/drivers/usb/musb/musb_udc.c: undefined reference to `usbd_device_event_irq'
make: *** [Makefile:1762: u-boot] Error 1
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
Function next_urb() selects the last urb data buffer from linked list to
which next data from usbtty's puts function should be appended.
But to check if TX data still exists it is needed to look at the first urb
data buffer from linked list. So check for endpoint->tx_urb (first from the
linked list) instead of current_urb (the last from the linked list).
Successful call to udc_endpoint_write() may invalidate active urb and
allocate new urb in queue which invalidates pointer returned by next_urb()
function.
So call next_urb() prior putting data into urb buffer and call it every
time after using udc_endpoint_write() function to prevent sending data from
usbtty's puts function in incorrect order.
This patch fixes issue that usbtty code does not transmit data when they
are waiting in the tx queue.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
This function has incorrect implementation of prepending CR prior LF.
Without this patch it prepended CR prior whole string which is going to be
written and let LF without leading CR. Fix this issue by inserting CR at
correct place to make output on usbtty serial console more readable.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
With TPM2 we don't actually lock the TPM once verified boot is finished.
Instead we disable the platform hierarchy which serves the same purpose.
Add an implementation of this so we can safely boot into the kernel.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add support for this so that the TPM can be set up for use with
Chromium OS verified boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Update tpm2_clear() and tpm2_pcr_extend() so that the command size
is not repeated twice. Add a small comment to the latter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add support for TPMv2 versions of API functions. So far this is not
complete as the standard is quite large, but it implements everything
currently available for TPMv2 in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Take over the plain 'tpm_...' functions for use by the new TPM API. Rename
all the TPMv1 functions so they are called from the API.
Update the TPMv1 functions so that they are called from the API. Change
existing users to use the tpm1_ prefix so they don't need to go through
the API, which might introduce uncertainty.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
There are two different TPM standards. U-Boot supports both but each has
its own set of functions. We really need a single TPM API that can call
one or the other. This is not always possible as there are some
differences between the two standards, but it is mostly possible.
Add an API to handle this. So far it is not plumbed into the build and
only supports TPMv1.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The response is shown but not the request. Update the code to show both
if debugging is enabled.
Use a 'uint' type for size so it matches the register-word size on both
32- and 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the security chip is not used in these U-Boot phases. Update
the Makefile to exclude it.
Fix a few logging statements while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Sandbox provides a way to write out its emulated memory on exit. This
makes it possible to pass a bloblist from one phase (e.g. SPL) to the
next.
However the bloblist is not closed off, so the checksum is generally
invalid. Fix this by finishing up the bloblist before writing the memory
file.
Signed-off-by: Simon Glass <sjg@chromium.org>
This state is not accessible to the running U-Boot but at present it is
allocated in the emulated SDRAM. This doesn't seem very useful. Adjust
it to allocate from the OS instead.
The RAM buffer is currently not freed, but should be, so add that into
state_uninit(). Update the comment for os_free() to indicate that NULL is
a valid parameter value.
Note that the strdup() in spl_board_load_image() is changed as well, since
strdup() allocates memory in the RAM buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
We provide os_malloc() and os_free() but not os_realloc(). Add this,
following the usual semantics. Also update os_malloc() to behave correctly
when passed a zero size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This code is still using the old command typedef. It was not noticed since
this file is not currently built. It is using a non-existent option in the
Makefile.
Drop this file since it is not needed for correct operation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Comparing a hex dump on the U-Boot command line with the contents of a
file on the host system is fairly easy and convenient to do manually if
it is small. But the format used hexdump by default differs from that
shown by U-Boot. Add a note about how to make them the same.
(For large dumps, writing the data to the network with tftpput, or to a
USB stick with ext4save is easiest.)
Signed-off-by: Simon Glass <sjg@chromium.org>
Add notes about how to make binman produce verbose logging when building.
Add a comment on how to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is printed twice but we only need one message, since there is very
little processing in between them. Drop the second one, since all branches
of the switch() already have output. Update the U-Boot message to include
the phase being jumped to.
Signed-off-by: Simon Glass <sjg@chromium.org>
The normal memory (other that DCACHE_OFF) should be executable by default,
only the device memory (DCACHE_OFF) used for peripheral access should have
the bit execute never (TTB_SECT_XN_MASK).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Overidde the weak function dram_bank_mmu_setup() to set the DDR
(preloc case) or the SYSRAM (in SPL case) executable before to enable
the MMU and configure DACR.
This weak function is called in dcache_enable/mmu_setup.
This patchs avoids a permission access issue when the DDR is marked
executable (by calling mmu_set_region_dcache_behaviour with
DCACHE_DEFAULT_OPTION) after MMU setup and domain access permission
activation with DACR in dcache_enable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Mark the top of ram, used for relocated U-Boot as a normal memory
(cacheable and executable) to avoid permission access issue when
U-Boot jumps to this relocated code.
When MMU is activated in pre-reloc stage; only the beginning of
DDR is marked executable.
This patch avoids access issue when DACR is correctly managed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This reverts commit 576007aec9.
The parameter passed to reset_cpu() no longer holds a meaning as all
call-sites now pass the value 0. Thus, branching on it is essentially
dead code and will just confuse future readers.
Revert soft-reset support and just always perform a hard-reset for now.
This is a preparation for removal of the reset_cpu() parameter across
the entire tree in a later patch.
Fixes: 576007aec9 ("lpc32xx: cpu: add support for soft reset")
Cc: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Harald Seiler <hws@denx.de>
The current implementation of reset_cpu() in the ns3 board code does not
archieve what it is supposed to (according to the comments), due to
a number of reasons:
1. The argument to reset_cpu() is _not_ actually passed from the
`reset` command, but is set to 0 in all call-sites (in this
specific case, see arch/arm/lib/reset.c). Thus, performing
different kinds of resets based on its value will not work as
expected.
2. Contrary to its documentation, the passed argument is not
interpreted, but a static `L3_RESET` define is used. The other
comment properly notes that this will always perform a L3 reset,
though.
3. The "parsing" of the static `L3_RESET` value is not even using the
upper and lower nibble as stated in the comment, but uses the last
two decimal digits of the value.
This is currently one of the only implementations left in U-Boot, which
make "use" of the value passed to reset_cpu(). As this is done under
false assumption (the value does not have any meaning anymore), it makes
sense to bring it into line with the rest and start ignoring the
parameter.
This is a preparation for removal of the reset_cpu() parameter across
the entire tree in a later patch.
Fixes: b5a152e7ca ("board: ns3: default reset type to L3")
Cc: Bharat Gooty <bharat.gooty@broadcom.com>
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
nds32 is one of the only architectures which still have a reset_cpu()
implementation that makes use of the `addr` parameter. The rest of
U-Boot now ignores it and passes 0 everywhere. It turns out that even
here, reset_cpu() is no longer referenced anywhere; reset is either not
implemented (e.g. ae3xx) or realized using a WDT (e.g. ag101).
Remove this left-over implementation in preparation for the removal of
the `addr` parameter in the entire tree.
Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
On the RPi4 armv7 build we have the situationt that we use physical
addresses of 64 bit, while the virtual addresses are 32 bit.
Remap the base address in this scenario via map_physmem().
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The EFI Grub workaround isn't needed with Grub version 2.04 or higher.
This version was published over a year ago, so disable the workaround
to reduce boot time.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
SAMA7G5 supports slew rate configuration. Adapt the driver for this.
For switching frequencies lower than 50MHz the slew rate needs to
be enabled. Since most of the pins on SAMA7G5 fall into this category
enabled the slew rate by default.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
The u-boot-with-spl.imx is a concatenation of SPL and u-boot.uim.
The u-boot.uim is u-boot.bin wrapped in uImage. In case OF_SEPARATE
is enabled, the u-boot.bin does not contain control DT for U-Boot,
and so u-boot.uim does not contain the DT, and so u-boot-with-spl.imx
does not contain the DT, and a system where u-boot-with-spl.imx is
written to offset 1024B to the start of storage no longer boots, as
it is missing DT.
In case OF_SEPARATE is enabled, u-boot.img contains both u-boot.bin
and the necessary DTs. Therefore, use u-boot.img instead of u-boot.uim
to generate u-boot-with-spl.imx when OF_SEPARATE is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
In drivers we use a family of printing functions including pr_err() and
pr_cont(). CONFIG_LOGLEVEL is used to control which of these lead to output
via printf().
Our logging functions allow finer grained control of output. So replace
printf() by the matching logging functions. The usage of CONFIG_LOGLEVEL
remains unchanged.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When the btrfs_read_fs_root() function is searching a ROOT_ITEM with
location key offset other than -1, it currently fails via BUG_ON.
The offset can have other value than -1, though. This can happen for
example if a subvolume is renamed:
$ btrfs subvolume create X && sync
Create subvolume './X'
$ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: X$
location key (270 ROOT_ITEM 18446744073709551615) type DIR
transid 283 data_len 0 name_len 1
name: X
$ mv X Y && sync
$ btrfs inspect-internal dump-tree /dev/root | grep -B 2 'name: Y$
location key (270 ROOT_ITEM 0) type DIR
transid 285 data_len 0 name_len 1
name: Y
As can be seen the offset changed from -1ULL to 0.
Do not fail in this case.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: David Sterba <dsterba@suse.com>
Cc: Qu Wenruo <wqu@suse.com>
Cc: Tom Rini <trini@konsulko.com>
Instead of hard-coding the offset of DRAM entries in MMU table all over
the code, auto-detect the offset. This removes error-prone code which
would break e.g. in case the MMU table is modified.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Commit 247bbeb74c ("ARM: dts: imx8m: increase off-on delay on the SD Vcc
regulator") caused the imx8mq-evk board to not be able to store the
environment variables in the SD card.
Remove the u-boot,off-on-delay-us property to fix the regression.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Since commit c738adb8db ("tool: Move ALIGN_MASK to header as common MACRO")
the i.MX8MQ EVK board no longer boots.
The reason is that imx8mimage.c used a custom __ALIGN_MASK() macro, so
restore the original macro to fix the boot and rename it accordingly.
Reported-by: Lukas Rusak <lorusak@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Ye Li <ye.li@nxp.com>
Add phy-reset-duration and phy-reset-post-delay to FEC node for PHY
reset, otherwise the PHY does not work correctly.
Signed-off-by: Ye Li <ye.li@nxp.com>
There is a second lpddr configuration with 2GB of RAM, but this requires
different RAM timings, so in addition to adding the timing file, a
separate defconfig is necessary.
Signed-off-by: Adam Ford <aford173@gmail.com>
Update imx-atf and firmware-imx to latest released versions.
Update address of ATF_LOAD_ADDR that has changed to 0x970000 in imx-atf
commit 48733cb4e773a7584ced601de9d717efa3d73815.
Add 'O=' to make and build in separate directory as one issue has been noticed
where it was trouble building directly inside u-boot source dir. Restructure the workflow
and copy binaries after defconfig to ensure that build directory is created.
Signed-off-by: Peter Bergin <peter@berginkonsult.se>
Cc: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
CONFIG_SPL_LEGACY_IMAGE_SUPPORT is necessary for mx6sabresd and
mx6sabreauto, because u-boot is packed as legacy image not FIT.
However, this config is not set when CONFIG_SPL_LOAD_FIT is enabled.
Must enable it explicitly, otherwise will fail to boot like below.
U-Boot SPL 2021.04-rc2 (Feb 20 2021 - 16:43:04 -0800)
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
Signed-off-by: Ye Li <ye.li@nxp.com>
On imx6Q/imx6DL, we find if config the DTOCV to 0~3, it will impact
cmd6 behavior, after cmd6 get transfer complete interrupt, the data0
line will keep low over 5 seconds. This should be a IC bug on imx6Q/DL.
For other platforms, do not has this issue.
To fix this issue, fix the DTOCV to 0xE, the max setting, this also align
with Linux configuration.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
I would like to help supporting this board, so add myself
as a maintainer.
Now that the board has been converted to DM, also add
its devicetree in the MAINTAINERS files entry.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Make the conversion to driver model as it is mandatory.
Successfully tested booting Linux from the SD card.
Dropped splash screen support as this needs to be properly
converted to DM and tested.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Import the imx23-evk devicetree files from Linux kernel
version 5.11.
This is in preparation for converting the mx23evk_defconfig
target to driver model.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Make the conversion to driver model as it is mandatory.
Tested booting the Linux kernel from the SD card.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Import the imx51-babbage devicetree files from Linux kernel
version 5.11-rc7.
This is in preparation for converting the mx51evk_defconfig
target to driver model.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Add a compatible for i.MX51 so that i.MX51 can use this driver
via driver model.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The micro SD card slot uses GPIO3_13 as card detect pin, so describe
it in the devicetree.
This was noticed when converting imx53-qsb board to driver model
in U-Boot as the micro SD card was not getting detected.
After this change it is possible to load the dtb and zImage
from the SD card and boot Linux.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Make the conversion to driver model as it is mandatory.
Remove the SATA support for now as the i.MX53 support has not
been added yet.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Import the imx53-qsb devicetree files from Linux kernel
version 5.11-rc7.
This is in preparation for converting the mx53loco_defconfig
target to driver model.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The RGMII link delays can be set on either MAC or PHY side. Set the
rgmii-id PHY mode for FEC and remove FEC_ENET_ENABLE_.XC_DELAY
setting, so that these definitions aren't used anymore throughout
the U-Boot.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Some compression algorithms currently can be enabled for SPL and
U-Boot proper separately. Therefore take into account USE_HOSTCC
is well as CONFIG_IS_ENABLED() in these cases to prevent compiling these
functions in case of a host tool build.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Set default critical/alert temperature and enabling monoitoring.
Without calling imx_tmu_enable_msite() monitoring will not be enabled
and read_temperature will return 0. Additionally without setting alert
temperature will cause imx_tmu_get_temp() to spin indefiniately thinking
the system needs to cool.
This resolves the board spinning endlessly when enabling IMX_TMU in the
SPL.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The serial number OTP is similar to the imx7 version, except that the
register names are different. This also sets serial# directly, instead of
providing board_get_serial.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some root filesystem configurations do not have separate /boot partition,
but rather place kernel, DT, scripts into /boot directory. Search the /boot
directory for these boot components in case they are not found in /, which
is the old behavior.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
As Stephen is no longer actively maintaining the uboot-test-hooks
repository, switch to using the instance on our GitLab.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
There is now CONFIG_SPL_DM_SPI{,_FLASH}, however keeping
CONFIG_DM_SPI{,_FLASH} enabled in SPL seems to grow the SPL
by a couple of bytes:
text data bss dec hex filename
- 34069 1568 96 35733 8b95 spl/u-boot-spl
+ 34075 1568 96 35739 8b9b spl/u-boot-spl
In either case, the binary is bootable, so remove the part
in board config.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Enable DTO support to make it possible to boot fitImage with DTOs
embedded in them.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Pull request for efi-2021-04-rc3-2
Bug fixes:
* debug build for mkeficapsule
* limit output length for VenHw, VenMedia
* ACPI tables must be in EfiACPIReclaimMemory
- Add USB host boot support in stm32mp1 config
- Enable uefi related commands for STMicroelectronics STM32MP15 boards
- Remove duplicate uart nodes in stm32mp15 device tree
VenHw and VenMedia device path nodes may carry vendor defined data of
arbitrary length. When converting a device path node to text ensure that we
do not overrun our internal buffer.
In our implementation of
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() we could first
determine the output length and then allocate buffers but that would nearly
double the code size. Therefore keep the preallocated buffers and truncate
excessive device paths instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fix a missing comma sign (,) from a printf(), that is only
reachable if DEBUG is defined, in which case the build fails with:
tools/mkeficapsule.c:266:36: error: expected ‘)’ before ‘bin’
266 | printf("\tbin: %s\n\ttype: %pUl\n" bin, guid);
| ^~~~
| )
Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UEFI spec does not allow ACPI tables to be in runtime services memory.
It recommends EfiACPIReclaimMemory.
Remove a superfluous check that the allocated pages are 16 byte aligned.
EFI pages are 4 KiB aligned.
Fixes: 86df34d42b ("efi_loader: Install ACPI configuration tables")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The board can boot with UEFI. With the latest changes in U-Boot's
EFI subsystem we also have support for EFI runtime variables, without
SetVariable support. We can also store the EFI variables in a file on the
ESP partition and preserve them across reboots.
The env and efidebug commands are missing in order to configure
EFI variables and the efibootmgr though. Since U-Boot's default config
enables other EFI related commands (e.g bootefi), let's add the env related
and efidebug commands and allow users to do that
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove duplicated uart nodes introduced with commit 62f95af92a
("ARM: dts: stm32mp1: DT alignment with Linux kernel v5.9-rc4"),
because the uart nodes wasn't correctly ordered in alphabetic order.
Only cosmetic: the generated device tree don't change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Since commit 8745b9ebcc ("usb: gadget: add super speed support")
ums was no more functional on platform which use dwc2_udc_otg driver.
This was due to a too restrictive test which checked that the gadget
driver speed was either FS or HS.
So all gadget driver with max speed set to speed higher than
HS (SS in case of composite gadget driver in our case) are not
allowed, which is wrong.
Update the speed test in usb_gadget_register_driver() and in
dwc2_gadget_start() to allow all gadget driver speed equal or higher
than FS.
Tested on stm32mp157c-ev1 board.
Fixes: c791c8431c ("usb: dwc2: convert driver to DM_USB_GADGET")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The OUT endpoint can just be ignored as it is not used, just as the
corresponding Set_Report request for IN-only interfaces. E.g. the
Linux gadget hid keyboard also provides an interrupt endpoint.
Also cleanup confusing debug messages like "found set protocol", which
is printed when a keyboard device is found, while the Set_Protocol request
is issued quite some time later.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
add support for the UUU commands ACmd and UCmd.
Enable them through the Kconfig option
CONFIG_FASTBOOT_UUU_SUPPORT
base was commit in NXP kernel
9b149c2a2882: ("MLK-18591-3 android: Add FSL android fastboot support")
and ported it to current mainline. Tested this patch
on imx6ul based board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
This documents the way U-Boot understands partitions specifications.
This also updates the fastboot documentation for the changes in the
previous commit.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This anchor is only for the k210 partition layout, so rename it
appropriately. This keeps it from conflicting with the (to be added)
anchor for U-Boot partitions in general.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds support for partitions of the form "dev.hwpart:part" and
"dev#partname". This allows one to flash to eMMC boot partitions without
having to use CONFIG_FASTBOOT_MMC_BOOT1_SUPPORT. It also allows one to
flash to an entire device without needing CONFIG_FASTBOOT_MMC_USER_NAME.
Lastly, one can also flash MMC devices other than
CONFIG_FASTBOOT_FLASH_MMC_DEV.
Because devices can be specified explicitly, CONFIG_FASTBOOT_FLASH_MMC_DEV
is used only when necessary for existing functionality. For those cases,
fastboot_mmc_get_dev has been added as a helper function. This allows
There should be no conflicts with the existing system, but just in case, I
have ordered detection of these names after all existing names.
The fastboot_mmc_part test has been updated for these new names.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This makes the next commit more readable by doing the move now.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The only thing mmcpart was used for was to pass to blk_dselect_hwpart.
This calls blk_dselect_hwpart directly from raw_part_get_info_by_name. The
error handling is dropped, but it is reintroduced in the next commit
(albeit less specificly).
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds support for things like "#partname" and "0.1#partname". The block
device parsing is done like in blk_get_device_part_str.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds an option to part_get_info_by_dev_and_name_or_num to allow
callers to specify whether whole-disk partitions are fine.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Several functions in disk/part.c just return -1 on error. This makes them
return different errnos for different failures. This helps callers
differentiate between failures, even if they cannot read stdout.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This test verifies the mapping between fastboot partitions and partitions
as understood by U-Boot. It also tests the creation of GPT partitions,
though that is not the primary goal.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds support writing to the sandbox mmc backed by an in-memory
buffer. The unit test has been updated to test reading, writing, and
erasing. I'm not sure what MMCs erase to; I picked 0, but if it's 0xFF
then that can be easily changed.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- turris_mox: Enhancements, mostlly defconfig changes (Pali)
- pci-aardvark: Set Max Payload Size and Max Read Request Size
to 512 bytes (Pali)
- pci_mvebu: Minor cleanup and refactoring (Marek)
- Upgrade A38x DDR3 training to version 14.0.0 (Marek)
The relevant changes to the already existing GD5F1GQ4UExxG support has
been determined by consulting the GigaDevice product change notice
AN-0392-10, version 1.0 from November 30, 2020.
As the overlaps are huge, variable names have been generalized
accordingly.
Apart form the lowered ECC strength (4 instead of 8 bits per 512 bytes),
the new device ID, and the extra quad IO dummy byte, no changes had to
be taken into account.
New hardware features are not supported, namely:
- Power on reset
- Unique ID
- Double transfer rate (DTR)
- Parameter page
- Random data quad IO
The inverted semantic of the "driver strength" register bits, defaulting
to 100% instead of 50% for the Q5 devices, got ignored as the driver has
never touched them anyway.
The no longer supported "read from cache during block erase"
functionality is not reflected as the current SPI NAND core does not
support it anyway.
Implementation has been tested on MediaTek MT7688 based GARDENA smart
Gateways using both, GigaDevice GD5F1GQ5UEYIG and GD5F1GQ4UBYIG.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
The datasheet only lists one dummy byte in the 0xEB operation for the
following chips:
* GD5F1GQ4xExxG
* GD5F1GQ4xFxxG
* GD5F1GQ4UAYIG
* GD5F4GQ4UAYIG
Reto Schneider:
- Linux patch ported to U-Boot
- Checked for compatibility with GD5F1GQ4xBxxG
- Fixed operation code in original commit message (0xEH -> 0xEB)
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
The sf test command is used to test spi flashes (and spi masters). Printing
the exact error code is very helpful to those debugging the spi stack.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If there is an error while erasing SPI flash, no errno is displayed. This
makes it difficult to determine the cause of the error. This change mirrors
the logic for write errors above.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
On the i.MX8M Mini, ret = clk_set_rate() sets ret to the value of the
rate the clock was able to set. When checking for errors, it only
checks that it is not NULL. Since positive numbers are not errors,
only check for negative numbers when handling errors.
Fixes: 383fded70c ("spi: nxp_fspi: new driver for the FlexSPI controller")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The code was processed with unifdef utility to omit portions not
relevant to A38x and DDR3. This removes usage of many macros, including
A70X0, A80X0 and A3900. It seems that the unifdef utility did not remove
the macros from #else comment.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 56db5d1464b44df10a02b99e615ebd6f6a35c428 upstream.
@pali suggested this change
In commit 6285efb ("mv_ddr: add support for twin-die combined memory
device") was added support for twin-die combined memory device and
default value for explicitly uninitialized structure members is zero, s
also twin_die_combined is initialized to zero. Which means COMBINED
value.
As prior this commit there was no support for twin-die combined memory
device, default value for twin_die_combined should be NOT_COMBINED. This
change change order of enum mv_ddr_twin_die to ensure that NOT_COMBINED
has value zero.
Signed-off-by: heaterC <airyguy@gmx.de>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 2bdd12dd68b1f8e27a03a3443ae49a09a14c18e4 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes code in ddr3_training.c.
Import this change to remain consistent with upstream.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit c8b301463d508c807a33f7b7eaea98bbda4aa35e upstream.
The funtion returnd cs size in byte instead of MB, that cause
calculation error since the caller was expected to get u32 and when he
got above 4G it refers it as 0.
The fix was to get the cs memory size from function as in MB and then
multiply it by 1MB.
Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit d653b305d0b3da9727c49124683f1a6d95d5c9a5 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header ddr_topology_def.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream.
WL phase correcion stage is failing while using bus_width of 16bit, not
to be fix this stage is un-necessary when working with bus_width of 16
bit.
Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 6285efb8a118940877522c4c07bd7c64569b4f5f upstream.
the twin-die combined memory device should be treatened as X8
device and not as X16 one
Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
[ - the default value for twin_die_combined is set to NOT_COMBINED for
all boards, as this was default behaviour prior this change ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 2d3b9437cf38c06c4330e0de07f29476197f5e04 upstream.
The ODT enable heuristic based on active chip-selects is not always
correct. Some board might use two chip-selects, but have only one ODT
line connected. Allow board specific mv_ddr_topology_map to directly set
the ODT configuration register value.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Nadav Haklai <Nadav.Haklai@cavium.com>
Reviewed-by: Kostya Porotchkin <Kostya.Porotchkin@cavium.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 3908e20c6c520339e9bddb566823ae5e065d5218 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header ddr_topology_def.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit ab9240402a70cc02496683971779e75eff410ab4 upstream.
- function mv_ddr_spd_die_capacity_user_get() has a bug,
since it insert a user memory enum to it,
instead of SPD memory enum (which are different)
- fix: remove mv_ddr_spd_die_capacity_user_get() function.
- memory size with 64 and 32 bit already calculated correctly
at mv_ddr_mem_sz_per_cs_get() function
Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Stefan Chulski <Stefan.Chulski@cavium.com>
Reviewed-by: Alex Leibovich <alexl@marvell.com>
Reviewed-by: Kostya Porotchkin <Kostya.Porotchkin@cavium.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 6c705ebc0d70f67ed7cae83ad1978c3305ef25be upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header mv_ddr_topology.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit 61a8910998d7b553e80f600ebe8147a8b98f0945 upstream.
Required changes made for 32bit ddr support.
An update is made to the topology map, according to
bus_act_mask, set in the dram_port.c
Signed-off-by: Alex Leibovich <alexl@marvell.com>
Reviewed-by: Kostya Porotchkin <Kostya.Porotchkin@cavium.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit a165037ec26f301be75e1fabc263643683e85255 upstream.
The commit mentioned above changes non-DDR3 stuff in upstream, but it
also changes header ddr_topology_def.h.
Import this header change to remain consistent with upstream.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
commit ce62bef8fac559e27245259882e45f19cdc293ad upstream.
- fix JIRA A7K8K-5056
- remove TEST_PATTERN write at the load patern stage earlier to WL SUP stage
- the WL SUP stage already writes this pattern to the memory, if the pattern exist at the memory
then the algorithm will fail, since it think that there are no phase to correct
Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
The SPI NOR flash node name in main device tree for Turris Omnia is
called `spi-nor@0`.
Rename node spi-flash@0 in Turris Omnia's -u-boot.dtsi file to spi-nor@0
so that U-Boot does not try to probe the same SPI NOR device multiple
times.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Linux displays the real PCIe card connected to a mvebu PCIe slot as
device 0, not 1. This is done by setting local dev number to 1, so that
the local "Marvell Memory controller" device is on address 1.
Let's do it also in U-Boot.
With this commit the pci command in U-Boot prints something like:
=> pci
Scanning PCI devices on bus 0
BusDevFun VendorId DeviceId Device Class Sub-Class
_____________________________________________________________
00.00.00 0x168c 0x003c Network controller 0x80
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Refactor validation of bdf parameter in mvebu_pcie_read/write_config
functions.
We can simplify the code by putting the validation into separate
function.
Also there are always only two devices visible on local bus:
* on slot configured by function mvebu_pcie_set_local_dev_nr()
(by default this register is set to 0) there is a
"Marvell Memory controller", which isn't useful in root complex
mode,
* on all other slots the real PCIe card connected to the PCIe slot.
We can simplify the code even more by simply allowing access only to
the real PCIe card.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Other drivers (aardvark, intel_fpga) print "(addr,size,val)" when
debugging is enabled. Print size for pci_mvebu as well.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
PCI uclass maps PCI bus numbers to the seq member of struct udevice.
Use dev_seq(dev) as the bus number in mvebu_pcie_probe instead of an
incrementing a static variable.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
NVMe drives can be connected to Turris MOX via MOX B and MOX G
extensions.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
USB devices can be connected to Turris MOX also via MOX F extension which
contains VL805 PCIe based USB 3.0 controller.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
PCIe devices do not work in U-Boot without proper initialization and
configuration of PCI config space like the PCI_BASE_ADDRESS_0 register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Fix usage of VL805 XHCI PCIe controller when it is connected via PCIe to
Armada 3720 SOC. Without this U-Boot crashes when trying to access
enumerated USB devices connected to this XHCI PCIe controller.
This should be done according to the PCIe Link Initialization sequence, as
defined in Marvell Armada 3720 Functional Specification.
Linux has this code too.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
The NOR flash w25q128 denoted by JEDEC ID 0xef4018 actually represents
various models. From Winbond's website, I could only find 3 types of
them:
W25Q128JV-IQ/JQ
datasheet:https://www.winbond.com/resource-files/
w25q128jv%20revg%2004082019%20plus.pdf
W25Q128FV (SPI Mode)
datasheet: https://www.winbond.com/resource-files/
w25q128fv%20rev.m%2005132016%20kms.pdf
W25Q128BV
datesheet: https://www.winbond.com/resource-files/
w25q128bv_revh_100313_wo_automotive.pdf
According to the datasheets, all of these 3 types support BP(0,1,2) and
TB bits in the status register (SR), so it could reuse the flash
protection logic for ST Micro.
So it should be safe to add the SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB
flags to the w25q128 entry of spi_nor_ids table.
Signed-off-by: Su Baocheng <baocheng.su@siemens.com>
[jagan: remove comments in spi-nor-ids.c]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it. As this is the last ARCH_MPC8569 board, remove that support
as well.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In the cases of T2080RDB_SECURE_BOOT, T2080RDB_SRIO_PCIE_BOOT,
P2041RDB_SECURE_BOOT, P2041RDB_SRIO_PCIE_BOOT, P3041DS_SRIO_PCIE_BOOT
and P4080DS_SRIO_PCIE_BOOT while some forms of the board have been
migrated more fully to current build standards, these have not. Remove
them.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Commit "common: Drop asm/global_data.h from common header" added
asm/global_data.h into secure.h. However, secure.h will be included
by psci.S. Adding asm/global_data.h has caused compilation failure in
pcsi.S. Add "ifndef __ASSEMBLY__" in asm/global_data.h.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When copying to a u32 field we should use sizeof(u32) and not
sizeof(*u32) in memcpy.
On 64bit systems like cortina_presidio-asic-emmc_defconfig using
sizeof(*u32) leads to a buffer overrun.
Fixes: febe13b438 ("net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
ca_do_bch_correction() takes a random value from the stack and starts
counting bitflips from this value. Initialize the counter.
This passed unnoticed as the value is finally ignored in the call
hierarchy.
Fixes: 161df94b3c ("mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The values of left_edge[0] and right_edge[0] are overwritten before they
are used. Remove the superfluous assignments.
Fixes: 285b3cb939 ("dm: ddr: socfpga: fix gen5 ddr driver to not use bss")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Include "compiler.h" in sha512.c. This is needed by 'cpu_to_be64' macro
that used in 'sha512_base_do_finalize' function.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In 8a8d24bd Simon dropped data from all the various _platdata calls
but it seems this wasn't caught for the RNG200 driver from when it
was posted to merged. This fixes that issue.
Fixes: 537f0018 (rng: Add iProc RNG200 driver)
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
test/cmd/setexpr.c cannot be linked with CONFIG_CMD_SETEXPR=n:
ld.bfd: test/built-in.o: in function `setexpr_test_sub':
test/cmd/setexpr.c:227: undefined reference to `setexpr_regex_sub'
ld.bfd: test/built-in.o: in function `setexpr_test_backref':
test/cmd/setexpr.c:267: undefined reference to `setexpr_regex_sub'
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Avoid build warnings observed with gcc 10.2
In file included from lib/rsa/rsa-keyprop.c:16:
include/u-boot/rsa-mod-exp.h:65:24: warning:
‘struct udevice’ declared inside parameter list will not be visible
outside of this definition or declaration
65 | int rsa_mod_exp(struct udevice *dev, const uint8_t *sig,
| uint32_t sig_len,
| ^~~~~~~
include/u-boot/rsa-mod-exp.h:96:24: warning:
‘struct udevice’ declared inside parameter list will not be visible
outside of this definition or declaration
96 | int (*mod_exp)(struct udevice *dev, const uint8_t *sig,
|
by defining struct udevice.
Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The EFI Grub workaround on BananaPi R2 slows down the boot process to
the point, that the watchdog will trigger a reboot before the kernel can
reset it. Fix this by disabeling the workaround.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Currently we fail silently if there is an algorithm mismatch. To help
distinguish this failure condition.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
VIRTIO_ID_MAX_NUM is the largest device ID plus 1. Therefore a device id
cannot be greater or equal to VIRTIO_ID_MAX_NUM. Fix the comparison
accordingly.
Fixes: 8fb49b4c7a ("dm: Add a new uclass driver for VirtIO transport devices")
Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Current sed usage in the DTC command relies on GNU sed specific -i
option which has a slightly different syntax for BSD sed and always
expects an extension to be provided in order to create a backup file.
Instead drop the cat concatenation done before the sed call and use
sed itself to edit and concatenate the files.
No functional change intended.
Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Fist use extended regexp in order to drop the '\' around the
parentheses which is not supported by BSD sed in regular mode.
Secondly use [[:blank:]] instead of \s, as the later is a GNU
extension.
No functional change intended.
Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Compiling the sandbox fails on armv7 due to conflicting definitions of
memcpy() and memset() in include/malloc.h and include/linux/string.h.
Use linux/string.h here.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the hikey to use DM_USB and DM_ETH.
Conversion based on rpi as it has a similar DWC config.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
U-boot allows the default device tree to be overridden from
the build environment using the DEVICE_TREE variable.
Make sure that we include it in the SPL FIT mkimage build step.
This also fixes a broken image in case CONFIG_OF_LIST and
CONFIG_OF_OVERLAY_LIST are unset (i.e., expected to be supplied
by the DEVICE_TREE env var).
Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Having the ability to support firmware FIT signatures on the SPL sounds
not so useful if the SPL is not supporting to load a (U-boot) firmware
as a FIT image.
Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Selecting SPL_FIT_SIGNATURE (without selecting U-boot proper
verified boot first) breaks the build due to
CONFIG_FIT_SIGNATURE_MAX_SIZE being undefined, in addition to Kconfig
warnings on RSA and IMAGE_SIGN_INFO unmet dependencies.
Signed-off-by: Klaus Heinrich Kiwi <klaus@linux.vnet.ibm.com>
Since commit 325dd1f642 ("fs: btrfs: Use btrfs_iter_dir() to ...")
when btrfs is listing a directory, the output is not aligned:
<SYMLINK> 15 Wed Sep 09 13:20:03 2020 boot.scr -> @/boot/boot.scr
<DIR> 0 Tue Feb 02 12:42:09 2021 @
<FILE> 108 Tue Feb 02 12:54:04 2021 1.info
Return back to how it was displayed previously, i.e.:
<SYM> 15 Wed Sep 09 13:20:03 2020 boot.scr -> @/boot/boot.scr
<DIR> 0 Tue Feb 02 12:42:09 2021 @
< > 108 Tue Feb 02 12:54:04 2021 1.info
Instead of '<FILE>', print '< >', as ext4 driver.
If an unknown directory item type is encountered, we will print the type
number left padded with spaces, enclosed by '?', instead of '<' and '>',
i.e.:
? 30? ............................. name
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Fixes: 325dd1f642 ("fs: btrfs: Use btrfs_iter_dir() to replace ...")
Cc: David Sterba <dsterba@suse.com>
Cc: Qu Wenruo <wqu@suse.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Sometimes it is useful to boot OS with already fixed-up
device tree. Check for env variable 'skip_board_fixup'
before calling ft_board_setup().
Current behaviour is unchanged, additionally user can
set skip_board_fixup to 1 to skip the fixup.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
sqfs_opendir() called in sqfs_size(), sqfs_read(), sqfs_exists() may fail
leading to sqfs_closedir(NULL) being called. Do not dereference NULL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently, we check argc in a number of places to make sure that we have
all of the required arguments for each of the pwm sub-commands.
However, there's at least one place where we've got dead code as we'll
never have argc == 0, due to checking that argc was at least 4 earlier
and having only subtracted 3. Rework things so that when we have
determined our subcommand make sure we have the right number of
arguments for it, or error out. This means we can stop checking against
argc again later.
Reported-by: Coverity (CID: 316601)
Cc: Pragnesh Patel <pragnesh.patel@sifive.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Xilinx changes for v2021.04-rc3
qspi:
- Support for dual/quad mode
- Fix speed handling
clk:
- Add clock enable function for zynq/zynqmp/versal
gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path
fpga:
- Fix buffer alignment for ZynqMP
xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
If zynqmp_qspi_set_speed() is called multiple times with the same speed,
then on the second call it will skip recalculating the baud_rate_val as
it assumes the speed is already configured correctly. But it will still
write the baud_rate_val to the configuration register and call
zynqmp_gqspi_set_tapdelay(). Because it skipped recalculating the
baud_rate_val, it will use the initial value of 0 . This causes the
driver to run at maximum speed which for many spi flashes is too fast and
causes data corruption.
Instead only write out a new baud_rate_val if we have calculated the
correct baud_rate_val.
This opens up another issue with the "if (speed == 0)", we don't save
off the new plat->speed_hz value when setting the baud rate on the
speed=0 path. Instead mimic what the Linux zynqmp gqspi driver does, and
have speed==0 just use the same calculation as a normal speed. That will
cause the baud_rate_val to use the slowest speed possible, which is the
safest option.
Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
CC: jagan@amarulasolutions.com
CC: michal.simek@xilinx.com
CC: Ashok Reddy Soma <ashokred@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Folder names corresponds to DT name. These boards have been renamed from
zc1275 to zcu1275 by commit shown below and this should be the part of that
commit.
Fixes: 420d446781 ("arm64: zynqmp: Rename zc1275 to zcu1275")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable rx clock along with tx clock for versal platform. Use compatible
data to enable/disable clocks in the driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add clock enable functionality in versal clock driver to enable
clocks from peripheral drivers using clk_ops.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add clock enable functionality in zynqmp clock driver to enable
clocks from peripheral drivers using clk_ops.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c11 ("clk: fixed_rate: add dummy enable() function").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to clear reset reason register because it is protected by
PMUFW already which is reported when verbose log is enabled as:
pm_core.c@733 APU> No write permission to 0xFF5E0220
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Due to pointer arithmetic, "sizeof(u32) * ARCH_DMA_MINALIGN" is
subtracted. It seems that the original intention was to just subtract
ARCH_DMA_MINALIGN. Fix it.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Currently support for the Samsung serial port driver is part
of CONFIG_S5P which controls selection of several drivers for
the S5P family. Give it its own config option such that we
can use it on other SoCs as well.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Remove pmic_max8997/8 files about no-DM.
There are already existed max8997/8 as driver-model.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This file contains characters which are not valid in utf-8. This confuses
dtoc which wants to parse it. They don't really serve any purpose anyway,
so drop them.
To: U-Boot Mailing List <u-boot@lists.denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
- splash_source warning fix when building with 64-bit toolchains
- lq123p1jx31 and nv101wxmn51 compatible in simple panel driver
- remove not used mb862xx driver
- add Himax HX8238D panel driver
- s/video_uc_platdata/video_uc_plat/
After 401d1c4f5d ("common: Drop asm/global_data.h from common header")
build fails with :
drivers/button/button-uclass.c:13:5: error: conflicting types for 'button_get_by_label'
int button_get_by_label(const char *label, struct udevice **devp)
^~~~~~~~~~~~~~~~~~~
Adding struct udevice forward declaration in button.h solves the build error.
Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header")
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix the 'devivce' typo in arch/sandbox/include/asm/clk.h.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The commit 6337d53fdf ("arm: dts: sync am33xx with Linux 5.9-rc7")
synchronized the am33xx-clocks.dtsi file with Linux 5.9-rc7 with the
exception of two nodes. I think I was wrong and it is better to keep
the two files similar and possibly make changes to the *-u-boot.dtsi
files.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The previous version printed the same debug message for both the enable
and disable routines without highlighting whether you were enabling or
disabling the module. It is now clear whether you are enabling or
disabling the module.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
When trying to port our mpc8309-based board to DM_ETH, on top of
Heiko's patches, I found that nothing in mdio-uclass.c seems to
support the use of a fixed-link subnode of the ethernet DT node. That
is, the ethernet node looks like
enet0: ethernet@2000 {
device_type = "network";
compatible = "ucc_geth";
...
fixed-link {
reg = <0xffffffff>;
speed = <100>;
full-duplex;
};
but the current code expects there to be phy-handle property. Adding
that, i.e.
phy-handle = <&enet0phy>;
enet0phy: fixed-link {
just makes the code break a few lines later since a fixed-link node
doesn't have a reg property. Ignoring the dtc complaint and adding a
dummy reg property, we of course hit "can't find MDIO bus for node
ethernet@2000" since indeed, the parent node of the phy node does not
represent an MDIO bus. So that's obviously the wrong path.
Now, in linux, it seems that the fixed link case is treated specially;
in the of_phy_get_and_connect() which roughly corresponds to
dm_eth_connect_phy_handle() we have
if (of_phy_is_fixed_link(np)) {
ret = of_phy_register_fixed_link(np);
...
} else {
phy_np = of_parse_phandle(np, "phy-handle", 0);
...
}
phy = of_phy_connect(dev, phy_np, hndlr, 0, iface);
And U-Boot's phy_connect() does have support for fixed-link
subnodes. Calling phy_connect() directly with NULL bus and a dummy
address does seem to make the ethernet work.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
Pull request for efi-2021-04-rc3
Bug fixes:
* Let EFI simple file protocol access last block of partition
* Correct conversion of multi-part device paths in
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText()
Documentation:
* booti and qfw man-pages
i2c changes for v2021.04
new feature:
- Allow disabling driver model for I2C in SPL
fixes:
- i2c-gpio: Fix GPIO output
- at91: fix crash when using 'i2c probe'
Our current implementation of
EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() truncates multi
part device paths after the first part. We should convert all parts.
Render device path instance ends as commas. This is not explicitly
described in the UEFI spec but mimics what EDK II does.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Test EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() for a multi
part device path.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
With the last update of conf.py the references to U-Boot where replaced by
references to Linux.
Fix the project references in the generated documentation.
Reported-by: Simon Glass <sjg@chromium.org>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Fixes: 98f01cf7a2 ("doc: update Kernel documentation build system")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The last block is of size media->block_size
Signed-off-by: Jesper Schmitz Mouridsen <jesper@schmitz.computer>
Simplify expression.
Apply same change to efi_disk_write_blocks().
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.
CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.
All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Drop CONFIG_DM_I2C undefs from board header files, and make them
disabled on these boards in defconfigs instead.
Disabling on Kconfig symbol was done automatically with this script:
cd configs
files=(*ls1046a*)
files2=(*T104*RDB*)
files3=(ls1021atwr_*)
files4=("imx8mp_evk_defconfig phycore-imx8mp_defconfig")
combine=("${files[@]}" "${files2[@]}" "${files3[@]}" "${files4[@]}")
cd ..
for item in ${combine[*]}
do
echo "Adjusting $item"
echo "# CONFIG_SPL_DM_I2C is not set" >> configs/$item
make $item && make savedefconfig && cp defconfig configs/$item
done
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present if U-Boot proper uses driver model for I2C, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.
This patch introduces a separate Kconfig symbols for enabling DM_I2C and
DM_I2C_GPIO support in SPL.
This will also help to get away from dirty workarounds to
achieve non-DM I2C support for SPL, which is currently used in some
board header files like:
ifdef CONFIG_SPL_BUILD
undef CONFIG_DM_I2C
endif
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
When issuing 'i2c probe', the driver was crashing, because at probe
there is a request with zero length buffer to write to i2c bus.
The xfer_msg function assumes the buffer is always there, and never
checks for the buffer length.
=> i2c dev 0
Setting bus to 0
=> i2c probe
Valid chip addresses:
data abort
pc : [<7ffa97dc>] lr : [<7ffa96f8>]
reloc pc : [<66f277dc>] lr : [<66f276f8>]
sp : 7fb7c110 ip : 7ff87a28 fp : 7ff99938
r10: 00000002 r9 : 7fb7dec0 r8 : 00000000
r7 : e181c600 r6 : 7fb88c20 r5 : 00000000 r4 : 7fb7c128
r3 : 00000000 r2 : 00000001 r1 : 00000000 r0 : 00000009
Flags: nZCv IRQs off FIQs off Mode SVC_32
Code: eb0092f4 e1a00005 e8bd81f0 e594300c (e5d33000)
Resetting CPU ...
Fixes: 8800e0fa20 ("i2c: atmel: add i2c driver")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The dm_gpio_set_dir_flags function cannot be used to update the
configuration of a GPIO pin because it does a bitwise OR with the
existing flags. Looks like commit 788ea83412 ("gpio: add function
_dm_gpio_set_dir_flags") has introduced this behaviour and the i2c-gpio
driver has been broken since.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Heiko Schocher <hs@denx.de>
CC: Patrick Delaunay <patrick.delaunay@st.com>
R-Car3 can have multiple regions of type memory in DT, enable
CONFIG_PCI_REGION_MULTI_ENTRY to handle those instead of using
just one of the memory regions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Because the first PCIExAR(n) register is configured with the mapping,
It is the second PCIExAR(n) register that must be written with 0, not
the last one. Update the n from 4 to 1 to select the correct register.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
OF_STDOUT_PATH was meant to hold the devicetree path to the serial
console, to be put into the linux,stdout-path property of the chosen node.
The only user of that was sunxi, and it was actually wrong for years
there: the paths hardcoded in sunxi_common.h were not matching the DTs,
evident by the leading 0's in nodenames, which have been removed years
ago.
On top of that, "linux,stdout-path" is now deprecated for a while (Linux
commit 2a9d832cc9aae from November 2014), and also all modern DTs
(including those included in U-Boot) carry a "stdout-path" property
already.
So remove the stanza from sunxi_common.h, and, since this was the last
user, also remove the associated bits from the rest of U-Boot.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The A23, A33, H3, H5, A83T, V3 and Sochip S3 sun8i SoCs can mux uart1 on
GPIOs PG6 and PG7. This patch adds support for using uart1 on those pins
as boot console.
Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As variables were moved to Kconfig, some of the surrounding ifdefs were
left around, even though they were empty. Clean them up.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that there is a magic bit in PRCM region which seemingly
makes PLLs work if it's enabled. Sadly, there is no documentation what
it does exactly, so we'll just mimick BSP boot0 behaviour and enable it
before any clock is set up.
Fixes: b18bd53d6c ("sunxi: introduce support for H616 clocks")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
CONFIG_VIDEO_MB862xx cannot be selected by any configuration.
So we can eliminate include/mb862xx.h.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The mb862xx driver does not conform to the driver model and is unused.
Eliminate it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add "boe,nv101wxmn51" to the compatible node. This is the panel for
chromebook_bob.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add "sharp,lq123p1jx31" to the compatible node. This is the panel for
chromebook_kevin.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix -Wint-to-pointer-cast warning
common/splash_source.c: In function 'splash_load_raw':
common/splash_source.c:100:12: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
100 | bmp_hdr = (struct bmp_header *)bmp_load_addr;
| ^
common/splash_source.c: In function 'splash_sf_read_raw':
common/splash_source.c:39:47: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
39 | return spi_flash_read(sf, offset, read_size, (void *)bmp_load_addr);
| ^
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- mmc_spi improvement
- added mmc-pwrseq to remove duplicated code
- fix response timeout after switch command
- sdhci: skip cache invalidation if DMA is not used
Before time, PWRSEQ is selected since below commit.
commit 262d343633 ("board: amlogic: select PWRSEQ for all amlogic platform")
Select MMC_PWRSEQ config because of introducing CONFIG_MMC_PWRSEQ for
only eMMC module.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
mmc_spi_sendcmd(), mmc_spi_readdata() and mmc_spi_writedata() are
currently undocumented. Add comment blocks to explain the arguments
and the return value.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
After command is sent and before card response shows up on the line,
there is a variable number of clock cycles in between called Ncr.
The spec [1] says the minimum is 1 byte and the maximum is 8 bytes.
Current logic in mmc_spi_sendcmd() has a flaw that it could only work
with certain SD cards with their Ncr being just 1 byte.
When resp_match is false, the codes try to receive only 1 byte from
the SD card. On the other hand when resp_match is true, the logic
happens to be no problem as it loops until timeout to receive as many
bytes as possible to see a match of the expected resp_match_value.
However not every call to mmc_spi_sendcmd() is made with resp_match
being true hence this exposes a potential issue with SD cards that
have a larger Ncr value.
Given no issue was reported as of today, we can reasonably conclude
that all cards being used on the supported boards happen to have a 1
byte Ncr timing requirement. But a broken case can be triggered by
utilizing QEMU to emulate a larger value of Ncr (by default 1 byte
Ncr is used on QEMU). This commit fixes such potential spec violation
to improve the card compatibility.
[1] "Physical Layer Specification Version 8.00"
chapter 7.5.1: Command / Response
chapter 7.5.4: Timing Values
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
After issuing the switch command: Wait until 'current state' of the card
status becomes 'tran'. This prevents from response timeout at the next
command because of 'current state' = 'data'.
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
If DMA(SDMA or ADMA) is not used, the cache invalidation
after reading is no need, should be skipped. Otherwise
U-Boot may hang at the cache invalidation.
Found this issue and tested this fix on DragonBoard 410c.
Fixes: commit 4155ad9aac ("mmc: sdhci: fix missing cache invalidation after reading by DMA")
Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com>
Reviewed-by: Andy Wu <Andy.Wu@sony.com>
It's confusing whether arguments are optional or mandatory.
Update the command's usage to clarify how to use.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The 'brcm,bcm2711-hdmi0' compatible string is used on RPi4 instead of
'brcm,bcm2835-hdmi' since the IP core was upgraded (now called VC6
instead of VC4). This has no functional change as far as u-boot driver
is concerned. So simply add the compatible string.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The DM_DMA option is needed in order to translate physical address into
bus addresses on a per-device basis.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
So far we've been content with passing physical addresses when
configuring memory addresses into XHCI controllers, but not all
platforms have buses with transparent mappings. Specifically the
Raspberry Pi 4 might introduce an offset to memory accesses incoming
from its PCIe port.
Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these
limitations, and make sure we don't break non DM users.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: fix compilation for 32 bit]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
fix from nicolas
By reusing DT nodes already available in sandbox's test DT introduce a
test to validate dev_phys_to_bus()/dev_bus_to_phys().
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
These functions, instead of relying on hard-coded platform-specific
address translations, make use of the DMA constraints provided by the DM
core. This allows for per-device translations.
We can't yet get rid of the legacy phys_to_bus()/bus_to_phys()
implementations as some of its users are not integrated into the
device model.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Calculating the DMA offset between a bus address space and CPU's every
time we call phys_to_bus() and bus_to_phys() isn't ideal performance
wise, as it implies traversing the device tree from the device's node up
to the root. Since this information is static and available before the
device's initialization, parse it before the probe call an provide the
DMA offset in 'struct udevice' for the address translation code to use
it.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Introduce some new nodes in sandbox's test device-tree and dm tests in
order to validate dev_get_dma_range().
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add the following functions to get a specific device's DMA ranges:
- dev_get_dma_range()
- ofnode_get_dma_range()
- of_get_dma_range()
- fdt_get_dma_range()
They are specially useful in oder to be able validate a physical address
space range into a bus's and to convert addresses from and to address
spaces.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
So far we've assumed a fixed configuration for inbound windows as we had
a single user for this controller. But the controller's DMA constraints
were improved starting with BCM2711's B1 revision of the SoC, notably
available in CM4 and Pi400. They allow for wider inbound windows. We can
now cover the whole address space, whereas before we where limited to
the lower 3GB.
This information is passed to us through DT's 'dma-ranges' property and
it's specially important for us to honor it since some interactions with
the board's co-processor assume we're doing so (specifically the XHCI
firmware load operation, which is handled by the co-processor after
u-boot has correctly configured the PCIe controller).
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspberry Pi Foundation released the new Compute Module 4 which we
want to detect, so we can enable Ethernet on it and know the correct
device tree file name.
Note that this sets the Ethernet option to true since the official CM4
IO board has an Ethernet port. But that might not be the case when using
custom ones.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspberry Pi Foundation released the new RPi400 which we want to
detect, so we can enable Ethernet on it and know the correct device tree
file name.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
When RPi4 is booted from USB Mass Storage, the firmware reports 947MiB of
the ARM memory (948 in case of the standard SD-card boot). This value is
not MMU_SECTION_SIZE aligned, so the dram_bank_mmu_setup() skips mapping
of the last 1MiB. This later causes u-boot in ARM 32bit mode to freeze,
because it relocated itself into that unmapped memory and fails to
execute.
Fix this by limiting the size of the first bank to the multiple of
MMU_SECTION_SIZE.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Make sure we handover the PCIe controller in a clean state. Some of the
devices hanging from the PCIe bus might need to be properly reset
through #PERST in order for Linux to be able to initialize them.
This is specially important in order to properly initialize Raspberry Pi
4 B and 400's USB chip.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The PCIe bus the controller is connected to might need to be removed
prior the handover. Make sure xhci-pci is also removed so as to avoid
unexpected timeouts or hangs.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's
config so that it can be used.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: drop rpi_4_32b_defconfig]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add adc-keys device to the sandbox/test.dts and connect it to the channel
#3 of the sandbox_adc driver. The default values sampled by sandbox_adc
driver determines that button3 and button4 are released and button5 is
pressed.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for getting the 'vref-supply' regulator and register it as
ADC's reference voltage regulator, so clients can translate sampled ADC
values to the voltage.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a simple Analog to Digital Converter device based button driver. This
driver binds to the 'adc-keys' device tree node.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Dump adc-keys bindings documentation from Linux kernel source tree from
commit 698dc0cf9447 ("dt-bindings: input: adc-keys: clarify
description").
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
When a FIT config specifies a devicetree, we should load it, no
questions asked. In the case of the "simple" FIT loading path, a
difficulty arises in selecting the load address of the FDT.
The default FDT location is right after the "kernel" or "firmware"
image. However, if that is an OP-TEE image, then the FDT may end up in
secure DRAM, and not be accessible to normal world kernels.
Although the best solution is to be more careful about the FDT
address, a viable workaround is to only append the FDT after a u-boot
or Linux image. This is identical to the previous logic, except that
FDT loading is extended to IH_OS_LINUX images.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Use the IS_ENABLED() macro to control code flow, instead of the
caveman approach of sprinkling #ifdefs. Code size is not affected, as
the linker garbage-collects unused functions. However, readability is
improved significantly.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There's no point in guarding function prototypes with #ifdefs. If a
function is not defined, the linker will notice. Having the prototype
does not affect code size.
What the #if guard takes away is the ability to use IS_ENABLED:
if (CONFIG_IS ENABLED(FIT_IMAGE_POST_PROCESS))
board_fit_image_post_process(...)
When the prototype is guarded, the above form cannot be used. This
leads to the proliferation of #ifdefs, and unreadable code. The
opportunity cost of the #if guard outweighs any benefits. Remove it.
Since the original version of this patch, an empty definition was
added by commit f14e6eec6c ("image: cleanup pre-processor usage").
The empty definition can cause silent failures, when an implementation
of board_fit_image_post_process() is expected because the linker will
not catch the missing function. Thus this patch removes this empty
inline declaration.
Fixes: f14e6eec6c ("image: cleanup pre-processor usage")
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The configuration node a sub node under "/configurations", which
describes the components to load from "/images". We only need to
locate this node once.
However, for each component, spl_fit_get_image_name() would parse the
FIT image, looking for the correct node. Such work duplication is not
necessary. Instead, once the node is found, cache it, and re-use it.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When a desired configuration is not found, conf_node will have a
negative value. Thus the for loop will start at the root "/" node of
the image, print the "/description" property, and stop.
It appears the intent of the loop was to print the names of the
subnodes under "/configurations". We would need the offset to the
"/configurations" node, which is abstracted by fit_find_config_node().
This change agrees that abstracting the node offset is the correct
design, and we shouldn't be parsing the configurations manually. Thus
the loop in spl_fit_get_image_name() is useless. Remove it.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Several loose arguments describe the FIT image. They are thus related,
and it makes sense to pass them together, in a structure. Examples
include the FIT blob pointer, offset to FDT nodes, and the offset to
external data.
Use a spl_fit_info structure to group these parameters.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The logical steps in spl_load_simple_fit() are difficult to follow.
I think the long comments, ifdefs, and ungodly number of variables
seriously affect the readability. In particular, it violates section 6
of the coding style, paragraphs (3), and (4).
The purpose of this patch is to improve the situation by
- Factoring out initialization and parsing to separate functions
- Reduce the number of variables by using a context structure
This change introduces no functional changes.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The size is derived from the FIT image itself. Any alignment
requirements are machine-specific and known by the board code. Thus
the total length can be derived from the FIT image and knowledge of
the platform. The 'length' argument is redundant. Remove it.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Matt Porter <mporter@konsulko.com>
Add support for random number generator RNG200.
This is for example found on RPi4.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
[mb: adapt to new struct driver memebers]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The switch driver for LS1028A Ethernet switch is now compiled in for
the NXP LS1028A reference design boards and for the Kontron SMARC-sAL28.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Michael Walle <michael@walle.cc>
The definition follows the DSA binding in kernel and describes the switch,
its ports and PHYs. The switch node has the same structure as in Linux
and this patch enables it (and relevant ports) for the LS1028A RDB board.
ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is
not used in U-Boot and was disabled. Ethernet port aliases were also
added to better manage the multitude of ports available now.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Michael Walle <michael@walle.cc>
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
The DSA (Distributed Switch Architecture) implementation has made a
design decision when it got introduced to the Linux kernel in 2008.
That was to hide away from the user the CPU-facing Ethernet MAC, since
it does not make sense to register it as a struct net_device (UCLASS_ETH
udevice for U-Boot), because that would never be beneficial for a user:
they would not be able to use it for traffic, since conceptually, a
packet delivered to the CPU port should loop back into the system.
Nonetheless, DSA has had numerous growing pains due to the lack of a
struct net_device for the CPU port, but so far it has overcome them.
It is unlikely at this stage of maturity that this aspect of it will
change.
We would like U-Boot to present the same information as Linux, to be at
parity in terms of number of interfaces, so that ethNaddr environment
variables could directly be associated between U-Boot and Linux.
Therefore, we would implicitly like U-Boot to hide the CPU port from the
user as well.
But the paradox is that DSA still needs a struct phy_device to inform
the driver of the parameters of the link that it should configure the
CPU port to. The problem is that the phy_device is typically returned
via a call to phy_connect, which needs an udevice to attach the PHY to,
and to search its ofnode for the 'fixed-link' property. But we don't
have an udevice to present for the CPU port.
Since 99% of DSA setups are MAC-to-MAC connections between the switch
and the host Ethernet controller, the struct phy_device is going to be a
fixed PHY. This simplifies things quite a bit. In U-Boot, a fixed PHY
does not need an MDIO bus, and does not need an attached dev either.
Basically, the phy_connect call doesn't do any connection, it just
creates the fixed PHY.
The proposal of this patch is to introduce a new fixed_phy_create
function which will take a single argument: the ofnode that holds this:
port@4 {
reg = <4>;
phy-mode = "internal";
fixed-link {
speed = <2500>;
full-duplex;
};
};
and probe a fixed PHY driver using the information from this ofnode.
DSA will probably be the only user of this function.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Unlike the Linux fixed PHY driver, the one in U-Boot does not attempt to
emulate the clause 22 register set of a gigabit copper PHY driver
through the swphy framework. Therefore, the limitation of being unable
to support speeds higher than gigabit in fixed-link does not apply to
the U-Boot fixed PHY driver. This makes the fixed-link U-Boot
implementation more similar to the one from phylink, which can work with
any valid link speed.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Extend existing DM tee tests adding test coverage for reverse RPC calls.
Currently this commit only adds tests for I2C requests from TEE driver
to TEE supplicant, for instance reading/writing data to emulated i2c
eeprom defines in standard sandbox test device tree
(arch/sandbox/dts/test.dtb):
=> i2c bus
Bus 0: i2c@0 (active 0)
2c: eeprom@2c, offset len 1, flags 0
...
Running TEE tests:
=> ut dm tee
Test: dm_test_tee: tee.c
Test: dm_test_tee: tee.c (flat tree)
Failures: 0
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
This adds support for RPC test trusted application emulation, which
permits to test reverse RPC calls to TEE supplicant. Currently it covers
requests to the I2C bus from TEE.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Add pygit2 and pyelftools to the list of packages for virtualenv
needed to run all sets of pytests.This fixes warnings like:
binman.elf_test.TestElf.testDecodeElf (subunit.RemotedTestCase):
Python elftools not available
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit gives the secure world access to the I2C bus so it can
communicate with I2C slaves (typically those would be secure elements
like the NXP SE050).
A similar service implementation has been merged in linux:
c05210ab ("drivers: optee: allow op-tee to access devices on the i2c
bus")
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
In case of IOMUX enabled it assumes that console devices in the list
are available to get them stopped properly via ->stop() callback.
However, the USB keyboard driver violates this assumption and tries
to play tricks so the device get destroyed while being listed as
an active console.
Swap the order of device deregistration and IOMUX update along with
converting to use iomux_replace_device() jelper to avoid the use-after-free.
Fixes: 3cbcb28928 ("usb: Fix usb_kbd_deregister when console-muxing is used")
Fixes: 8a83487030 ("dm: usb: Add a remove() method for USB keyboards")
Reported-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Some console devices may appear or disappear at run time. In order to
support such a hotplug mechanism introduce a new iomux_replace_device()
helper to update the list of devices without altering environment.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
It is not only less lines of code, but also better readability
when new macro is being in use. Introduce for_each_console_dev()
helper macro and convert current users to it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Logical continuation of the change that brought console_devices_set() is
to unify console_setfile() with it and replace in the callers.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
It's possible that NULLDEV can be disabled while it makes leftovers,
move entire device under #if.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Nobody is using stdio_deregister(), remove for good.
Note, even its parameters are not consistent with stdio_register().
So, if anyone want to introduce this again, better with some consistency.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Move gpio controller nodes from am33xx.dtsi to am33xx-l4.dtsi. Now both
files are more similar to those found in Linux 5.9-rc7. To be fully
operational as before it was also necessary to fix the am33xx-clock.dtsi
file. It too is now almost the same as the Linux kernel.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Since commit 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts
into U-Boot") ranges have been added to CPSW node which results in
U-Boot CPSW driver failing to acquire phy_gmii_sel register range and
thus failing to configure GMII mode correctly.
Fix this by deleting ranges in -u-boot-dtsi just like its done for other
K3 platforms.
Fixes: 6239cc8c4e ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
It is possible to construct a devicetree blob with multiple root nodes.
Update fdt_check_full() to check for this, along with a root node with an
invalid name.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
Some strange modifications of the FIT can introduce security risks. Add an
option to check it thoroughly, using libfdt's fdt_check_full() function.
Enable this by default if signature verification is enabled.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
At present this function does not accept a size for the FIT. This means
that it must be read from the FIT itself, introducing potential security
risk. Update the function to include a size parameter, which can be
invalid, in which case fit_check_format() calculates it.
For now no callers pass the size, but this can be updated later.
Also adjust the return value to an error code so that all the different
types of problems can be distinguished by the user.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
When searching for a node called 'fred', any unit address appended to the
name is ignored by libfdt, meaning that 'fred' can match 'fred@1'. This
means that we cannot be sure that the node originally intended is the one
that is used.
Disallow use of nodes with unit addresses.
Update the forge test also, since it uses @ addresses.
CVE-2021-27138
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
At present fdt_find_regions() assumes that the FIT is a valid devicetree.
If the FIT has two root nodes this is currently not detected in this
function, nor does libfdt's fdt_check_full() notice. Also it is possible
for the root node to have a name even though it should not.
Add checks for these and return -FDT_ERR_BADSTRUCTURE if a problem is
detected.
CVE-2021-27097
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Bruce Monroe <bruce.monroe@intel.com>
Reported-by: Arie Haenel <arie.haenel@intel.com>
Reported-by: Julien Lenoir <julien.lenoir@intel.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
As this is the last SH4A board, remove that support as well.
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Patch-cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Patch-cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM by the deadline of v2020.01
and is missing other conversions which depend on this as well. Remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago. In addition there are other DM
migrations it is also missing. Remove it.
Cc: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Chris Packham <judge.packham@gmail.com>
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago. In addition there are other DM
migrations it is also missing. Remove it.
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago. In addition there are other DM
migrations it is also missing. Remove it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Pull request for UEFI sub-system for efi-2021-04-rc2-2
Bug fixes:
* fix stack smashing in UEFI capsule updates
* correct loading of UEFI binaries where Virtual size is not a
multiple of FileAlignment
* simplify detection of capsule files.
* buildman: use threading.is_alive() instead of removed method IsAlive()
The isAlive() method was deprecated in Python 3.8 and has been removed in
Python 3.9. See https://bugs.python.org/issue37804. Use is_alive() instead.
Since Python 2.6 is_alive() has been a synonym for isAlive(). So there
should be no problems for users using elder Python 3 versions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
fix get_last_capsule() leads to writes beyond the stack allocated buffer.
This was indicated when enabling the stack protector.
utf16_utf8_strcpy() only stops copying when reaching '\0'. The current
invocation always writes beyond the end of value[].
The output length of utf16_utf8_strcpy() may be longer than the number of
UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15 UTF-8
tokens. Hence, using utf16_utf8_strcpy() without checking the input may
lead to further writes beyond value[].
The current invocation of strict_strtoul() reads beyond the end of value[].
A non-hexadecimal value after "Capsule" (e.g. "CapsuleZZZZ") must result in
an error. We cat catch this by checking the return value of strict_strtoul().
A value that is too short after "Capsule" (e.g. "Capsule0") must result in
an error. We must check the string length of value[].
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
'.' and '..' are directories. So when looking for capsule files it is
sufficient to check that the attribute EFI_FILE_DIRECTORY is not set. We
don't have to check for these special names.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
PE section table entries' SizeOfRawData must be a multiple of
FileAlignment, and thus may be rounded up and larger than their
VirtualSize.
We should not load beyond the VirtualSize, which is "the total size of
the section when loaded into memory" -- we may clobber real data at the
target in some other section, since we load sections in reverse order
and sections are usually laid out sequentially.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
First set of u-boot-atmel fixes for 2021.04 cycle:
This small PR includes just two fixes but very important: one revert in
the clk subsystem which fixes the boot on many old boards
(sama5d2_xplained, sama5d4_xplained), which currently crash at boot; and
one small fix related to debug serial on sama7g5ek board.
Revert changes in at91 compat.c that cause u-boot to fail booting on
sama5d4_xplained and sama5d2_xplained
Log below:
<debug_uart>
No serial driver found
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Fixes: a2703ce10c ("dm: Remove uses of device_bind_offset()")
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If the serial tx/rx are floating, it can happen that bogus characters
are detected on the line at boot time. This leads to U-boot accidentally
thinking someone pressed a key to stop autoboot, thus stopping booting process.
This can happen if the serial cable is not connected. There are hardware
pull-ups on the board connected to serial cable VBUS.
To solve this when the cable is not plugged, enable internal pull-ups as well
for the tx/rx lines.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The Linux kernel v5.7-rc1 introduced the compatible "st,stm32mp15-hsotg".
See Linux kernel commit d49850110434 ("dt-bindings: usb: dwc2: add
support for STM32MP15 SoCs USB OTG HS and FS")
This patch updates the supported compatible in DWC2 driver,
removes the add-on done in U-Boot dtsi and keeps the compatible
defined in SOC dtsi arch/arm/dts/stm32mp151.dtsi:
usbotg_hs: usb-otg@49000000 {
compatible = "st,stm32mp15-hsotg", "snps,dwc2";
reg = <0x49000000 0x10000>;
...
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Testing with v2021.01 on MIPS Octeon has shown, that the latest patch
for the "short packet event trb handling" did introduce a bug on
platforms with virtual address != physical address. This patch fixes
this issue by using the correct address types in the compare (both
physical in this case).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Ran Wang <ran.wang_1@nxp.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Function dm_pci_map_bar() may fail and returns NULL. Check this to prevent
dereferencing a NULL pointer.
In xhci-pci this may happen when board does not enable CONFIG_PCI_PNP and
PCI_BASE_ADDRESS_0 contains unconfigured zero address.
Signed-off-by: Pali Rohár <pali@kernel.org>
Add optional properies to disable usb2 or usb3 ports, they are used
when provided ports are not used on some special platforms.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Add support to disable specific ports, it's useful for some
scenarios:
1. usb3 PHY is shared whith PCIe or SATA, the corresponding
usb3 port can be disabled;
2. some usb2 or usb3 ports are not used on special platforms,
they should be disabled to save power.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is
useful to be aware.
The patch is also fixing possition of these bits on ZynqMP.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fix bug introduced by commit listed below. It is for cases where Versal or
ZynqMP don't have DDR mapped. Later SPL was also excluded by
commit a672b9871b ("xilinx: common: Do not touch
CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL").
Fixes: 506009fc10 ("xilinx: common: Change macro handling in board_fdt_blob_setup()")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use the ADC channel 1 to check the hardware revision of the board and
detect the N2 vs. N2+ and the C4 vs. HC4 variants. Each of them use
different dtb file, so adjust fdtfile environment variable to the
detected variant.
The ADC min/max values for each variant are taken from the vendor code,
adjusted to the 12-bit ADC driver operation mode (vendor code use 10-bit
mode).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission
and Analog part of the PCIe lines.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI
panels.
This D-PHY depends on a separate analog PHY.
Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add the PHY configure op callback to the generic PHY uclass to permit
configuring the PHY.
It's useful for MIPI DSI PHYs to setup the link timings.
Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on their current parameters, and validate the boundaries of
these parameters if needed.
These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
- Enable the fastboot oem commands in stm32mp15 defconfig
- Fixes pinctrol for stmfx and stm32
- Add support of I2C6_K in stm32mp15 clock driver
- Alignment with Linux kernel device tree v5.11-rc2 for ST boards
Device tree alignment with Linux kernel v5.11-rc2
- fix DCMI DMA features on stm32mp15 family
- Add alternate pinmux for FMC EBI bus
- Harmonize EHCI/OHCI DT nodes name on stm32mp15
- update sdmmc IP version for STM32MP15
- Add LP timer irqs on stm32mp151
- Add LP timer wakeup-source on stm32mp151
- enable HASH by default on stm32mp15
- enable CRC1 by default on stm32mp15
- enable CRYP by default on stm32mp15
- set bus-type in DCMI endpoint for stm32mp157c-ev1 board
- reorder spi4 within stm32mp15-pinctrl
- add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
- fix mdma1 clients channel priority level on stm32mp151
- fix dmamux reg property on stm32mp151
- adjust USB OTG gadget fifo sizes in stm32mp151
- update stm32mp151 for remote proc synchronization support
- support child mfd cells for the stm32mp1 TAMP syscon
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The kilohertz unit abbreviation should read 'kHz'.
Note to STM32 team: modified files were generated, it may be worth
to fix STM32CubeMX tool.
Signed-off-by: Fabrice GIRARDOT <fabrice.girardot@flowbird.group>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR =
I2C6EN: I2C6 peripheral clocks enable.
This patch allows customer to use I2C6 in SPL or in U-Boot
as other I2C instance, already support in clk driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Bind only the enabled GPIO subnode, to avoid to probe the node
"gpio-controller" present in SOC dtsi (disabled by default) but
not enabled in the included pincontrol dtsi file.
For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent:
gpioj: gpio@5000b000
gpiok: gpio@5000c000
Then these GPIO are absent in output of command "dm tree" and
"gpio status -a"
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
OTYPE can be used for output or for alternate function to select
PP = push-pull or OP = open-drain mode, according reference manual
(Table 81. Port bit configuration table).
This patch removes this indication for input pins and adds it
for AF and output pins for pinmux command output.
Fixes: b305dbc08b ("pinctrl: stm32: display bias information for all pins")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
pin-controller pin's name must be equal to pin's name used in device
tree with "pins" DT property.
Issue detected on stm32mp157c-ev1 board with goodix touchscreen.
In DT, the goodix's pin is declared in DT with the node:
goodix_pins: goodix {
pins = "gpio14";
bias-pull-down;
};
Whereas in stmfx pin-controller driver, pin's name are equal to
"stmfx_gpioxx" where xx is the pin number.
This lead to not configure stmfx's pins at probe because pins is
identified by its name (see pinctrl_pin_name_to_selector() in
pinctrl-generic.c) and stmfx pin "gpio14" can't be found.
To fix this issue, come back to the original stmfx pin's name.
Revert "pinctrl: stmfx: update pin name"
This reverts commit 38d30cdcd65c73eeefac5efa328ad444a53b77dd.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Enable the fastboot oem command bootbus, used to configure the eMMC
boot behavior, with same format than 'mmc bootbus'
and with parameter: boot_bus_width reset_boot_bus_width boot_mode
On stm32mp1 boards the expected command is
$> fastboot oem partconf:0 0 0
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Enable the fastboot oem command partconf, used to select the correct
eMMC boot partition, with same format than 'mmc partconf'
with parameter: boot_ack boot_partition
On stm32mp1 family:
- boot_ack = 1 (Boot Acknowledge is needed by ROM code)
- boot_partition = 1 or 2 (Boot partition 1 / 2 enabled for boot)
So on EV1 board the expected commands to select boot partition 1 or 2
$> fastboot oem partconf:1 1
$> fastboot oem partconf:1 2
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
- Espressobin: Set default env values at runtime (Pali)
- Espressobin: Set the maximum slave SPI speed to 40MHz (Pali)
- theadorable: PCIe test code enhancement and early deemphasis
enabling (Stefan)
- pci_mvebu: Disable config access to PCI host bridge ports (Stefan)
- mv_sdhci: parse device-tree entry (Baruch)
Update gpio driver to use same logic for big-endian and little-endian
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Drop the CONFIG_VIDEO to fix the following build warning.
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
UPD include/generated/dt.h
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
UPD include/generated/timestamp_autogenerated.h
====================================================
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Update data type of '1' to '1ull' in below assignment
size = 1ull << sizebit;
to fix incorrect assignment issue.
e.g: when sizebit was 31, 0x80000000 got sign extended to
0xffffffff_80000000
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Dean Saridakis <dean.saridakis@baesystems.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the I-Cache to speed up the boot time, especailly for the NOR
boot, currently it takes about 15 seconds from power up to the U-Boot
prompt, and with the I-Cache enabled it only takes around 2.5 seconds.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LX2162A is not like LX2160A which has different PCIe controller
in rev1 and rev2 silicon. It supports only one configuration of
PCIe controller, which is same as LS2088A. So update PCIe
compatible string same as LS2088A.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch moves the SVR definitions to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The LS1088 requires the same QUADSPI_QURIK_BASE_INTERNAL
workaround as the LS208x and also has a 64 byte TX buffer.
With the previous settings SPI-NAND reads over AHB were
corrupted.
Fixes: 91afd36f38 ("spi: Transform the FSL QuadSPI driver to use the SPI MEM API")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Adapted from kernel commit b0177aca7aea
From: Michael Walle <michael@walle.cc>
Make use of a core helper to ensure the desired width is respected
when calling spi-mem operators.
Otherwise only the SPI controller will be matched with the flash chip,
which might lead to wrong widths. Also consider the width specified by
the user in the device tree.
Fixes: 91afd36f38 ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
spi_mem_default_supports_op is used internally by controller
drivers to verify operation semantics are correct.
It is used internally inside spi-mem but has not (in U-Boot)
been declared in spi-mem.h for external use.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Replace instances of sprintf()/set_env() for setting hexadecimal
values with set_env_hex().
In set_km_env() the "pram" variable was set to an hexadecimal
value, while initr_mem() expects an unsigned decimal, so use
set_env_ulong() instead.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit 2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Take into account SDRAM_BASE address when calculating pnvramaddr and
varaddr offsets.
Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets
where calculated correctly, this fix is for the upcoming designs that
have SDRAM_BASE different then zero.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch is fixing qrio driver compilation for ARM architecture:
- It includes asm/io.h for in_/out_ access
- It use correct names for set/clear_bits as defined in linux/bitops.h
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.
Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable SATA support. Although not supported by the usual SATA pins on
the SMARC baseboard connector, SATA mode is supported on a PCIe lane.
This way one can use a mSATA card in a Mini PCI slot.
We need to invert the received data because in this mode the polarity of
the SerDes lane is swapped. Provide a fixup in board_early_init_f() for
the SPL. board_early_init_f() is then not common between SPL and u-boot
proper anymore, thus common.c is removed, as it just contained said
function.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Although this variant has two external network ports, they are not (yet)
supported by the bootloader because they are connected via an internal
network switch. Otherwise its the same as the other variants.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This variant has one network port connected via RGMII and doesn't have
any TSN capabilities out-of-the-box. Instead it has all four SerDes
lanes available for customer use.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The variants differ in their network configuration. Move the first two
network aliases to the proper variant device tree includes. This is in
prepartion for variant 1 and 2 support which has a different network
port mapping. The network aliases for the two internal ports will stay
in the common dtsi because they are present on all board variants.
This might leave a hole if there is no ethernet1 alias. This is
intended.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r,
kernel_addr_r, fdt_addr_r, load_addr)
to fix a bug that failed to boot to ubuntu
Failed log as follows,
## Executing script at 80000000
load - load binary file from a filesystemUsage:
load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
- Load binary file filename from partition part on device
type interface instance dev to address addr in memory.
bytes gives the size to load in bytes.
If bytes is 0 or omitted, the file is read until the end.
pos gives the file byte position to start reading from.
If pos is 0 or omitted, the file is read from the start.
...
Bad Linux ARM64 Image magic!
SCRIPT FAILED: continuing...
Signed-off-by: Biwen Li <biwen.li@nxp.com>
[Updated description]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.
Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.
Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Although the status register is protected by the hardware write
protection, there is a hardware jumper to disable that hardware write
protection. Thus if a user would set this jumper any u-boot start would
disable the write protection altogether.
Circumvent that by not disabling the write protection in the first
place.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.
Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.
For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/20201203162959.29589-8-michael@walle.cc/
Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Call mmc_of_parse() so that generic DT properties like 'non-removable'
are taken into account.
This fixes boot on Clearfog with eMMC on SOM that requires the
non-removable property.
Reported-by: Thorsten Spille <thorsten_spille@netcor.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
While the SPI controller speed is defined by DTS, the maximum
slave speed (connected devices) is limited by the pre-defined
configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz
This patch increases this maximum SPI slave device speed to 40MHz
Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59516
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
[pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Testing has shown, that the quality of the PCIe signals and also the
stability of correct link establishment on the 2 PCIe ports is better,
when the deemphasis bit is set in the PCIe config register.
This needs to be done very early, even before the SERDES setup code is
run. This way, the first link will already be established with this
setup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the board specific "pcie" U-Boot command to not only
check for PCIe device existance but also for the correct link speed
and width that has been established. This cmd can be used by U-Boot
scripts for automated testing, if the PCIe setup is correct. Meaning,
that all PCIe devices are correctly detected and the link speed and
width is corrent.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the PCI config routines in the Armada XP / 38x driver
to not allow access to the PCIe root ports.
While updating the Armada XP based theadorable to the latest mainline
and testing it with the DM PCI driver I noticed, that the PCI root
bridge was being configured incorrectly. Resulting in the PCIe Intel
WiFi was not working correctly in Linux. With this patch applied, all
PCIe devices work without any issues in Linux again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
On Espressobin board are MAC addresses stored in U-Boot env area. Therefore
they are not present in default_environment[] array constructed at compile
time.
This change puts permanent MAC addresses into default_environment[] array
at board runtime. Espressobin board has enabled DEFAULT_ENV_IS_RW option
and therefore can modify this array.
This change ensure that 'env default -a' does not delete permanent MAC
addresses from Espressobin env storage area.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
On Espressobin board value for $fdtfile cannot be determined at compile
time and is calculated at board runtime code. This change uses a new option
DEFAULT_ENV_IS_RW to allow modifying default_environment[] array at runtime
and set into it correct value.
This change also ensure that 'env default -a' set correct value to $fdtfile.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
This change allows board code to modify default_environment[] array when
compile option DEFAULT_ENV_IS_RW is specified in board config file.
Some board default variables depend on runtime configuration which is not
known at compile time. Therefore allow to set default_environment[] array
as non-const and allow board code to modify it when it is needed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
The Beacon EmbeddedWorks kit is based on the R8A774E1 SoC also
known as the RZ/G2H.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi. It shares much of the same design as
the RZ/G2M and RZ/G2N dev kits.
Signed-off-by: Adam Ford <aford173@gmail.com>
The Beacon EmbeddedWorks kit is based on the R8A774B1 SoC also
known as the RZ/G2N.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi. It shares much of the same design as
the RZ/G2M dev kit.
Signed-off-by: Adam Ford <aford173@gmail.com>
The versaclock doesn't have a driver yet, but there are a bunch
of device tree updates for the Beacon RZ/G2 boards that won't
compile without these. A driver is coming, so sync the bindings
for now
Signed-off-by: Adam Ford <aford173@gmail.com>
In case MMC has MBR system and fastboot writes GPT,
MMC is still recognized as MBR.
Invoke part_init() to purge cached data and update
information about partition table type.
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Add command oem bootbus which executes the command
``mmc bootbus <id> <arg>`` on the current fastboot mmc device
(<i> = CONFIG_FASTBOOT_FLASH_MMC_DEV) to set the eMMC boot
configuration on first update, with
<arg> = boot_bus_width reset_boot_bus_width boot_mode
$> fastboot oem bootbus:<boot_bus_width> <reset_boot_bus_width> <boot_mode>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add fastboot command oem partconf which executes the command
``mmc partconf <id> <arg> 0`` on the current <id> mmc device
to configure the eMMC boot partition with
<arg>: boot_ack boot_partition, so the command is:
$> fastboot oem partconf:<boot_ack> <boot_partition>
The partition_access argument is forced to 0 (userdata)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[lukma - Kconfig adjustments after merging this patch]
Update the code and the configs for eMMC boot and userdata
partitions acces
- FASTBOOT_MMC_BOOT_SUPPORT: boot partition 1 and 2 (erase/write)
- FASTBOOT_MMC_BOOT1_NAME: boot partition 1, default name="mmc0boot0"
- FASTBOOT_MMC_BOOT2_NAME: boot partition 2, default name="mmc0boot1"
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Split userdata and boot partition support for eMMC update
and correct the description (update is supported).
The new configuration CONFIG_FASTBOOT_MMC_USER_SUPPORT
allows to activate support of userdata partition update,
based on target name=CONFIG_FASTBOOT_MMC_USER_NAME
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
It is possible to implement fastboot_set_reboot_flag in a generic way
if BCB commands are turned on for a target. Using
bcb_set_reboot_reason allows to do this by simply passing string with
correct reboot reason that should be handled during next boot process.
If BCB are turned off, then bcb_set_reboot_reason would simply return
error, so it won't introduce any new behaviour for such targets.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
This reverts commit 0ebf9842e5.
Current generic implementation of fastboot_set_reboot_flag is somewhat
messy and requires some additional configuration option to be enabled
besides CMD_BCB, so it reverts that implementtion in order to bring a
new cleaner one.
Next commit introduces new generic implementation of
fastboot_set_reboot_flag.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
- introduces some standard sysinfo options as a source, e.g. to read
strapping pins to determine the board revision
- allows the U-Boot version number to be included
- allows the version number to be provided programmatically, e.g. to
support the build system adding information after U-Boot is built
While static configuration is useful it cannot cover every case. Sometimes
board revisions are encoded in resistor straps and must be read at
runtime.
The easiest way to provide this information is via sysinfo, since the
board can then provide a driver to read whatever is needed.
Add some standard sysinfo options for this, and use them to obtain the
required information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These ops are missing at present which is not permitted. Add an empty
operation struct.
Note: If the uclass requires operations then the drivers should provide
them. Otherwise, checking for missing operations must be done in every
uclass operation, so it adds to code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the struct is not available unless SYSINFO is enabled. This is
annoying since code it is not possible to use compile-time checks like
CONFIG_IS_ENABLED(SYSINFO) with this header.
Fix it by moving the #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the version string is obtained from PLAIN_VERSION. Some boards
may want to configure this using the device tree, since the build system
can more easily insert things there after U-Boot itself is built. Add this
option to the code.
Also in some cases the version needs to be generated programmatically,
such as when it is stored elsewhere in the ROM and must be read first.
To handle this, keep a pointer around so that it can be updated later.
This works by storing the last string in the context, since it is easier
than passing out a little-used extra parameter.
Provide a function to update the version string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new member to the context struct which tracks the end of the string
table. This allows us to avoid recalculating this at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We can store this in the context and avoid passing it to each function.
This makes it easier to follow and will also allow keeping track of the
end of the string table (in future patches).
Add an 'eos' field to the context and create a function to set it up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we pass the ofnode to each function. We also pass the 'eos'
pointer for adding new strings. We don't track the current end of the
string table, so have smbios_string_table_len() to find that.
The code can be made more efficient if it keeps information in a
context struct. This also makes it easier to add more features.
As a first step, switch the ofnode parameter to be a context pointer.
Update smbios_add_prop() at the same time to avoid changing the same
lines of code in consecutive patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We may as well include the U-Boot release information in the type-0 table
since it is designed for that purpose.
U-Boot uses release versions based on the year and month. The year cannot
fit in a byte, so drop the century.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present a few of the structs use u8 instead of char. This is a string,
so char is better. Update them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This type is not used outside the smbios.c file so there is no need for it
to be in the header file. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For SMBIOS we want to store the numeric version numbers in the tables. It
does not make sense to parse the strings. Instead, add new #defines with
the version and patchlevel.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There are quite a few available version options in U-Boot. Add a list of
the available Makefile variables and #defines, along with examples.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Sync DTS from Linux kernel for all K3 platforms
- Add MMC higher speed nodes for AM65x, J721e, J7200
- Convert Nokia RX-51 to use CONFIG_DM_MMC
- Minor fixes for LEGO MINDSTORMS
Pull request for UEFI sub-system for efi-2021-04-rc2
Bug fixes:
* do not allow creating of files with filenames on FAT file system
* install UEFI System Partition GUID on ESP handle
* in dtbdump.efi test tool use GUID to find ESP handle
Documentation:
* man-page for load command
* describe end of life of plat_auto
If the exception cannot be raised, the command returns.
Currently the return values are not all the same.
Remove the sub-chapter 'Return value'
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The Load File2 protocol exposes a device path with a VenMedia() node. Hence
our implementation of the device path to text protocol should support this
node.
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If dtbdump.efi is loaded from memory when calling LoadImage the loaded
image protocol will not indicate the partition from where it was loaded.
In this case use the EFI system partition for the 'load' and 'save'
commands.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On the handle for the UEFI System Partition we must install the System
Partition GUID (with a NULL interface).
Let the efidebug command display the GUID.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In the implementation of the EFI_DT_FIXUP_PROTOCOL:
* Only check the buffer size when EFI_DT_APPLY_FIXUPS is set.
* In this case the field totalsize of the device-tree may not exceed the
buffer size.
* Install device-tree only if EFI_DT_INSTALL_TABLE is set.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sync all J7200 related v5.11-rc6 Linux kernel dts into U-Boot.
MCU R5F nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid regressions, r5f nodes are kept intact.
These will be added in kernel in future.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sync all J721e related v5.11-rc6 Linux kernel dts into U-Boot.
HBMC nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid any regressions, hbmc nodes are kept
intact. These will be added in kernel in future.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add configs for voltage switching and UHS modes for the SD card
and HS200 for the eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
There's an issue with the base board in which the power cycle
circuit takes way longer to power down than expected by mmc core.
code. This prevents the card from enumerating in UHS modes.
Disable UHS modes for this board until a new board revision fixes
the issue.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add the appropriate itapdly and clkbuf-sel values required for
some lower speed modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add configs to support UHS modes for the SD card and HS200 for the eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add configs to support UHS modes for the SD card and HS200 for the eMMC.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add support for UHS modes by adding the regulators to power cycle
and voltage switch the card. Also add pinmuxes required for each
node
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add support for regulators to power cycle and switch IO voltage to the
SD card. This enables support for UHS modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Because of fundamental interface issues in am65x pg1, only the
initial sdhci1 node at 25 MHz was added in the u-boot.dtsi
from which both the base-board.dts and r5-base-board.dts
inherit the node. Move the node out to k3-am65-main.dtsi
where it belongs and add the board specific properties
in base-board.dts and r5-base-board.dts
This ensures dts compatibility with the kernel dts in the
base-board.dts and enables the SD card interface at 50 MHz
and High Speed mode
While we are here, also fix the main_mmc0_pins_default
property to be included and inherit from the base-board.dts
instead of the u-boot.dtsi
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Use the generic sdhci_set_control_reg() instead of duplicating
in platform driver.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
According to the AM654x Data Manual[1], the setup timing in lower speed
modes can only be met if the controller uses a falling edge data launch.
To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be
cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25
speed modes.
Use the sdhci writeb callback to implement this condition.
[1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
With the new SW tuning App note[1], a custom tuning algorithm is
required for eMMC HS200, HS400 and SD card UHS modes. The algorithm
involves running through the 32 possible input tap delay values and
sending the appropriate tuning command (CMD19/21) for each of them
to get a fail or pass result for each of the values. Typically, the
range will have a small contiguous failing window. Considering the
tuning range as a circular buffer, the algorithm then sets a final
tuned value directly opposite to the failing window.
[1] https://www.ti.com/lit/pdf/spract9
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add support for writing new clock buffer select property for both
the am654x and j721e 4 bit IPs
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
DLL need only be enabled for speed modes and clock frequencies at or
above 50 MHz. For speed modes that don't enable the DLL, we need to
configure a static input delay value. This involves reading an optional
itap-del-sel-* value from the device tree and configuring it for the
appropriate speed mode.
Therefore, move all dll configurations to their own functions and gate it
with 50 MHz speed and a minimum mode. If both these conditions are not
satisfied then configure delay chain modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add Support for AM65x PG2.0. Use the SoC bus framework to fixup
the platform data and do DLL calibration if the revision is 1.0
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Not all controllers need calibration for the PHY DLL. Add a DLL_CALIB
flag to indicate the same.
Also move the write of trm_icp and driver strength to the set_clock()
function to match the kernel configuration flow.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
There are some speed modes that work without switching the dll on.
Unconditionally switch off the DLL before setting clock frequency to
support this case. The software will automatically enable DLL for speed
modes that require it. This also means the dll_on priv data member is no
longer required.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
With commit 38d6b7ebda ("spl: Drop bd_info in the data section") you
need to enable this option to boot from mmc.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The K3 R5F remoteproc driver in U-Boot was upstreamed prior to the
equivalent remoteproc driver in the Linux kernel. Some of the DT
properties used in U-Boot got upstreamed using different names
in Linux kernel.
The modified property names include the R5F cluster mode configuration
property "lockstep-mode"; and three different individual R5F core config
properties - "atcm-enable", "btcm-enable" and "loczrama". The property
names were updated as follows:
lockstep-mode => ti,cluster-mode
atcm-enable => ti,atcm-enable
btcm-enable => ti,btcm-enable
loczrama => ti,loczrama
Update the K3 R5F remoteproc driver, the corresponding binding, and
all the existing usage in AM65x, J721E and J7200 dts files all at
once to use the new properties and to not break any bisectability.
Signed-off-by: Suman Anna <s-anna@ti.com>
AM65x SoC has two USB subsystems and their corresponding device tree nodes
have the same name but different path. While allocating sequence numbers
for these device tree nodes using alias, phandles can be used to
distinguish them.
Enable config for phandle check while getting sequence number to
distinguish the USB device tree nodes.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
This disables booting to non-Linux OSes.
This board is uncomfortably close to its 256K size limit, so every
few KB saved helps.
Signed-off-by: David Lechner <david@lechnology.com>
This disables the CONFIG_NET setting for LEGO MINDSTORMS EV3. This board
does not have any built-in networking, so it does not make sense to
enable this feature.
This also fixes the warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: David Lechner <david@lechnology.com>
This drops assigning bi_arch_number on LEGO MINDSTORMS EV3. This board
never had its own unique number and since we are using device tree,
we no longer need to pass an arch number to Linux.
Signed-off-by: David Lechner <david@lechnology.com>
This sets the serial# environmet variable instead of using ATAGs on
LEGO MINDSTORMS EV3.
Also fix some nomenclature while we are touching this code (Bluetooth
address is not the same as MAC address, EEPROM version is not the same
as board version).
Signed-off-by: David Lechner <david@lechnology.com>
Move twl4030_power_mmc_init() from board_mmc_power_init() to misc_init_r()
and disable CONFIG_SYS_MALLOC_F. Otherwise U-Boot cannot initialize MMC.
Also disable CONFIG_CMD_SLEEP CONFIG_DM_DEVICE_REMOVE CONFIG_MMC_VERBOSE to
free some space.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add "zboot" command to the list of supported boot in the
label_boot function.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add component tags in the summary]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Replace all the macro ifdef by IS_ENABLED.
All of these configs are set in the defconfig files and not in the
include board headers files.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: keep the preprocessor case unchanged]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Unfortunately the multi-core boot for QEMU x86 has been broken since
commit 77a5e2d3bc ("x86: mp_init: Set up the CPU numbers at the start").
In order to support QEMU x86 multi-core boot, the /cpus node must be
bound before any actual fix up in qemu_cpu_fixup(). This adds the
uclass_get() call to ensure this, just like what was done before.
Fixes: 77a5e2d3bc ("x86: mp_init: Set up the CPU numbers at the start")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The dm_spi_ops.xfer() API does not support dual and quad SPI modes. It
also doesn't allow the zynqmp_gqspi driver to calculate the correct
number of dummy cycles for some NOR ops (as doing so also requires the
buswidth).
Port the zynqmp_gqspi driver to spi_controller_mem_ops, which gives us
the buswidth values to correctly support all SNOR_PROTO_X_X_X commands
and to properly calculate dummy cycles.
Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
CC: jagan@amarulasolutions.com
CC: michal.simek@xilinx.com
CC: Ashok Reddy Soma <ashokred@xilinx.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The FAT32 File System Specification [1] requires leading and trailing
spaces as well as trailing periods of long names to be ignored.
[1]
Microsoft Extensible Firmware Initiative
FAT32 File System Specification
Version 1.03, December 6, 2000
Microsoft Corporation
https://www.win.tue.nl/~aeb/linux/fs/fat/fatgen103.pdf
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
sandbox_scmi_devices_ctx() may return NULL. We should not dereference this
value in sandbox_scmi_devices_remove().
The problem was indicated by 'gcc-11 -fanalyzer'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
gcc -fanalyzer needs the information that a function does not return to
provide accurate information.
os_abort() does not return. Mark it accordingly.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are some calls to bdinfo_print_num_l() with parameters that
could be a 64-bit value on a 32-bit system. Change those calls to
use bdinfo_print_num_ll() instead.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present we have bdinfo_print_num() to print unsigned long numbers.
We also have print_phys_addr() which accept numbers that might be
64-bit on a 32-bit platform.
Rename these 2 functions to be clearer:
bdinfo_print_num() => bdinfo_print_num_l()
print_phys_addr() => bdinfo_print_num_ll()
While we are here, make bdinfo_print_num_ll() public so that it can
be used outside cmd/bdinfo.c in the future.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
phys_addr_t and phys_size_t are currently defined as `unsigned long`,
but RV32 supports 34-bit physical address, hence both phys_addr_t and
phys_size_t should be defined to 64-bit using `unsigned long long`.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
At present prior_stage_fdt_address is declared as phys_addr_t. On
a 32-bit platform where phys_addr_t can be 64-bit, assigning its
value to gd->fdt_blob which is a pointer, can cause warnings.
Cast it to uintptr_t before the assignment.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
priv->iobase was declared as phys_addr_t which is now a 64-bit
address. In a 32-bit build, this causes the following warning
seen when building ftmac100.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast priv->iobase with uintptr_t.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
addr was delcared as fdt_addr_t which is now a 64-bit address.
In a 32-bit build, this causes the following warning seen when
building ax25-ae350.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast addr with uintptr_t.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
dev_read_addr() returns fdt_addr_t which is now a 64-bit address.
In a 32-bit build, this causes the following warning seen when
building serial_sifive.c:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast the return value with uintptr_t.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
It's possible to have ram_top above 4 GiB in a 32-bit system, hence
we need to declare ram_top as `phys_addr_t`.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The min() macro used in dram_init_banksize() requires two elements
to compare have the same type. Let's explicitly cast gd->ram_top.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
When testing QEMU RISC-V 'virt' machine with a 2 GiB memory
configuration, it was discovered gd->ram_top is assigned to
value zero in setup_dest_addr().
While gd->ram_top should not be declared as type `unsigned long`,
which will be updated in a future patch, the current logic in
board_get_usable_ram_top() can be updated to cover both 64-bit
and 32-bit RISC-V.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Make mention of this feature in the core documentation so people can
discover it without looking at a header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add another flag to the DM core which could be assigned to drivers and
which makes those drivers call their remove callbacks last, just before
booting OS and after all the other drivers finished with their remove
callbacks. This is necessary for things like clock drivers, where the
other drivers might depend on the clock driver in their remove callbacks.
Prime example is the mmc subsystem, which can reconfigure a card from HS
mode to slower modes in the remove callback and for that it needs to
reconfigure the controller clock.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if device_remove() decides that the device should not actually
be removed, it still calls the uclass pre_remove() method and powers the
device down.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the uclass pre-remove method is called before the children are
removed. But the children may refused to be removed, in whch case the
uclass is in a tricky situation. At present we handle this by calling
the uclass' post_probe() method. But it seems better to avoid doing
anything with the uclass in this case.
Switch the ordering so that we make sure the children can be removed
before advising the uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
This flag has the word 'REMOVE' in it which means it conflicts with
the DM_REMOVE flags. Rename it to DM_FLAG_LEAVE_PD_ON which seems to
indicate its purpose well enough.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has no useful meaning in U-Boot and will never be returned. We want
to reserve this flag for internal driver model use.
Drop the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has no useful meaning in U-Boot. Use -ENOMEM since that appears to
be what has gone wrong in this case. We want to reserve this flag for
internal driver model use.
Signed-off-by: Simon Glass <sjg@chromium.org>
Directories or files called '.' or '..' cannot be created or written to
in any directory. Move the test to normalize_longname() to check this
early.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This patch involves no functional change. It is just about code
readability.
Both in file_fat_write_at() and fat_mkdir() the incoming file or directory
path are split into two parts: the parent directory and the base name.
In file_fat_write_at() the value of the variable basename is assigned to
the filename parameter and afterwards the variable filename is used instead
of basename. It is more readable to use the variable basename and leave
filename unchanged.
In fat_mkdir() the base name variable is called directory. This is
confusing. Call it basename like in file_fat_write_at(). This allows to
rename parameter new_directory to directory in the implementation of
fat_mkdir() to match the function declaration.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move this out of the common header and include it only where needed. In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly. Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit dd5c954e91 ("travis/gitlab/azure: Use -W to avoid warnings check")
added -W to avoid warnings check, but it mistakenly dropped -E for
the world build script in the azure pipelines.
This caused builds on the azure pipelines fail to report warnings. Let's
add it back.
Fixes: dd5c954e91 ("travis/gitlab/azure: Use -W to avoid warnings check")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The implementation of pytest_runtest_protocol() must call
pytest_runtest_logstart() and pytest_runtest_logfinish(). This appears to
be necessary even in pytest 5.2.1 judging by the default version of
pytest_runtest_protocol(), but evidently some form of code reorganization
in pytest only made this have a practical effect in the newer version. I'd
previously been under the impression that 100% of the required work of
pytest_runtest_protocol() was handled by the fact it called
runtestprotocol() as its implementation. However, it appears that custom
implementations do need to do a little more than this.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Config allows to disable printing contents of fitImage to optimize boottime.
Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The load command should not silently return to the console prompt if an
invalid block device is specified and no file is loaded.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
No version information is used in armv8/fwcall.c therefore do not include
version.h header file. This change prevents recompiling fwcall.o when
SOURCE_DATE_EPOCH changes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fix CMD_ACPI dependency in Kconfig
- Correct overflow in __udelay() in TSC timer driver
- Add a devicetree node for eMMC for Coral
- Minor improvements on image loading
- Reduce size of Samus image
With the recent addition of ACPI generation, the image size has got beyond
its current limit.
Samus does not actually use this, nor x86 emulation for PCI ROMs, so
disable both features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enhance the debugging to show the next stage being booted as well as a
dump of the start of the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This should be done even if not using TPL, since BSS may be in use or
boards that only use SPL. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present if the command line is very long it is truncated by the
printf() statement, which works within a limited buffer. Use puts()
instead. Also show better debugging with the command-line setup
fails.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present it is possible to dump an image within the zimage command, but
it is also useful to be able to dump it from elsewhere, for example in a
loader that has special handling for the different zimage stages.
Export this feature as a new function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Global Non-Volatile Storage struct has some fields with particular
meanings. Rename these to make things easier to follow. Also add a few
more boot flags.
GNVS should not be confused with GNVQ (Going Nowhere Very Quickly).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present BSS is always placed in SDRAM. If a separate BSS is not in use
this means that BSS doesn't work as expected. Make the setting conditional
on the SEPARATE_BSS option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The part of U-Boot that actually ends up in u-boot-nodtb.bin is not built
with any particular alignment. It ends at the start of the BSS section.
The BSS section selects its own alignment, which may larger.
This means that there can be a gap of a few bytes between the image
ending and BSS starting.
Since u-boot.bin is build by joining u-boot-nodtb.bin and u-boot.dtb (with
perhaps some padding for BSS), the expected result is not obtained. U-Boot
uses the end of BSS to find the devicetree, so this means that it cannot
be found.
Add 32-byte alignment of BSS so that the image size is correct and
appending the devicetree will place it at the end of BSS.
Example SPL output without this patch:
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 000142a1 fef40000 fef40000 00001000 2**4
CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
1 .u_boot_list 000014a4 fef542a8 fef542a8 000152a8 2**3
CONTENTS, ALLOC, LOAD, RELOC, DATA
2 .rodata 0000599c fef55760 fef55760 00016760 2**5
CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
3 .data 00000970 fef5b100 fef5b100 0001c100 2**5
CONTENTS, ALLOC, LOAD, RELOC, DATA
4 .binman_sym_table 00000020 fef5ba70 fef5ba70 0001ca70 2**2
CONTENTS, ALLOC, LOAD, DATA
5 .bss 00000060 fef5baa0 fef5baa0 00000000 2**5
ALLOC
You can see that .bss is aligned to 2**5 (32 bytes). This is because of
the mallinfo struct in dlmalloc.c:
17 .bss.current_mallinfo 00000028 00000000 00000000 000004c0 2**5
ALLOC
In this case the size of u-boot-spl-nodtb.bin is 0x1ba90. This matches up
with the _image_binary_end symbol:
fef5ba90 g .binman_sym_table 00000000 _image_binary_end
But BSS starts 16 bytes later, at 0xfef5baa0, due to the 32-byte
alignment. So we must align _image_binary_end to a 32-byte boundary. This
forces the binary size to be 0x1baa0, i.e. ending at the start of bss, as
expected.
Note that gcc reports __BIGGEST_ALIGNMENT__ of 16 on this build, even
though it generates an object file with a member that requests 32-byte
alignment.
The current_mallinfo struct is 40 bytes in size. Increasing the struct to
68 bytes (i.e. just above a 64-byte boundary) does not cause the alignment
to go above 32 bytes. So it seems that 32 bytes is the maximum alignment
at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add more details in the commit message to help people understand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Move to log_debug() and make use of the new SPL function to find the
text base.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful to know the TEXT_BASE value for the image being loaded in
TPL/SPL. Add a new spl_get_image_text_base() function to handle this.
Make use of this in the x86 SPL handler, instead of having the logic
there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use a driver name in line with the compatible string so that of-platdata
can use this driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some comments were provided after this patch was applied. Address them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present long delays such as msleep(2000) can cause an overflow in this
function. There is no need for this, since it already uses a 64-bit int.
Add a cast to correct this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Trying to compile qemu-x86_64_defconfig with CONFIG_CMD_ACPI=y and
CONFIG_ACPIGEN=n fails with
ld.bfd: cmd/built-in.o: in function `do_acpi_items':
cmd/acpi.c:162: undefined reference to `acpi_dump_items'
Add the missing configuration dependency.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useless and misleading to print the ret variable that is not set
by the dev_read_addr routine. Also, move the '\n' character after the
round bracket that contains the error code.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The pinmux choice for the RMII/RGMII pins the EMAC is connected to is
not dependent on the EMAC IP, but on the SoC it is integrated in.
Deriving the pinmux from the DT compatible string (as we do at the
moment) will thus cause problems with certain EMAC IP / SoC combinations.
To avoid this exact issue with the H616, let's use our Kconfig MACH
symbols to choose the correct pinmux setup.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
At the moment we only consider the EPHY register for those SoCs were
we actually have an internal PHY to configure. However even other SoCs
have this register, an expect the EPHY select bit to be cleared for
proper operation with an external PHY.
Rework sun8i_emac_set_syscon_ephy() to be called regardless of the EMAC
model, and clear the H3_EPHY_SELECT bit if no internal PHY is used.
We get away without it so far because SoCs like the A64 clear this bit
on reset, but we need to explicitly clear it on the H616, for instance.
The Linux driver does so as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Change to use wMaxPacketSize of current speed EP desc for request
length wrap up.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If one of functions is not super speed capable, we need force the udc
to be high speed, this is an equivalent implementation of
usb_gadget_udc_set_speed() in kernel but simple, which set the gadget
max_speed to be high speed, so afterwards when start gadget duc can
set the HW to be USB 2.0 mode.
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This patch is to add usb gadget super speed support in common
driver, including BOS descriptor and select the super speed
descriptor from function driver.
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Always use the new added config for os_desc_config to fix cdev->
os_desc_config may miss set in case we restart usb gadget driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The current way to set cdev->os_desc_config is wrong if user restart
fastboot, as the old config is not used anymore and new allocated
usb_configuration will be used, so set the os_desc_config while
usb_add_config.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add device interface GUID for Microsoft Extended Properties Feature
Descriptor.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is a proting patch from linux kernel: 37a3a533429e
("usb: gadget: OS Feature Descriptors support"), the original commit
log see below:
There is a custom (non-USB IF) extension to the USB standard:
http://msdn.microsoft.com/library/windows/hardware/gg463182
They grant permission to use the specification - there is
"Microsoft OS Descriptor Specification License Agreement"
under the link mentioned above, and its Section 2 "Grant
of License", letter (b) reads:
"Patent license. Microsoft hereby grants to You a nonexclusive,
royalty-free, nontransferable, worldwide license under Microsoft鈥檚
patents embodied solely within the Specification and that are owned
or licensable by Microsoft to make, use, import, offer to sell,
sell and distribute directly or indirectly to Your Licensees Your
Implementation. You may sublicense this patent license to Your
Licensees under the same terms and conditions."
The said extension is maintained by Microsoft for Microsoft.
Yet it is fairly common for various devices to use it, and a
popular proprietary operating system expects devices to provide
"OS descriptors", so Linux-based USB gadgets whishing to be able
to talk to a variety of operating systems should be able to provide
the "OS descriptors".
This patch adds optional support for gadgets whishing to expose
the so called "OS Feature Descriptors", that is "Extended Compatibility ID"
and "Extended Properties".
Hosts which do request "OS descriptors" from gadgets do so during
the enumeration phase and before the configuration is set with
SET_CONFIGURATION. What is more, those hosts never ask for configurations
at indices other than 0. Therefore, gadgets whishing to provide
"OS descriptors" must designate one configuration to be used with
this kind of hosts - this is what os_desc_config is added for in
struct usb_composite_dev. There is an additional advantage to it:
if a gadget provides "OS descriptors" and designates one configuration
to be used with such non-USB-compliant hosts it can invoke
"usb_add_config" in any order because the designated configuration
will be reported to be at index 0 anyway.
This patch also adds handling vendor-specific requests addressed
at device or interface and related to handling "OS descriptors"."
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As other users may use utf8_to_utf16le() to convert the utf8
to utf16 for usb, so move it to head file.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This is a porting patch from linux kernel: 19824d5eeece
("usb: gadget: OS String support"), original commit log
see below:
"There is a custom (non-USB IF) extension to the USB standard:
http://msdn.microsoft.com/library/windows/hardware/gg463182
They grant permission to use the specification - there is
"Microsoft OS Descriptor Specification License Agreement"
under the link mentioned above, and its Section 2 "Grant
of License", letter (b) reads:
"Patent license. Microsoft hereby grants to You a nonexclusive,
royalty-free, nontransferable, worldwide license under Microsoft鈥檚
patents embodied solely within the Specification and that are owned
or licensable by Microsoft to make, use, import, offer to sell,
sell and distribute directly or indirectly to Your Licensees Your
Implementation. You may sublicense this patent license to Your
Licensees under the same terms and conditions."
The said extension is maintained by Microsoft for Microsoft.
Yet it is fairly common for various devices to use it, and a
popular proprietary operating system expects devices to provide
"OS descriptors", so Linux-based USB gadgets whishing to be able
to talk to a variety of operating systems should be able to provide
the "OS descriptors".
This patch adds optional support for gadgets whishing to expose
the so called "OS String" under index 0xEE of language 0.
The contents of the string is generated based on the qw_sign
array and b_vendor_code.
Interested gadgets need to set the cdev->use_os_string flag,
fill cdev->qw_sign with appropriate values and fill cdev->b_vendor_code
with a value of their choice.
This patch does not however implement responding to any vendor-specific
USB requests."
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As the SDP protocol use the predefined ep num for communication, we can't
change its name hence reset its ep num while do ep autoconfig, this is
only apply for SPL.
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since some new fields in usb_ep structure been moved to usb_ss_ep.
The CDNS3 gadget driver should replies on this operation to bind the
usb_ss_ep with the endpoint descriptor when function layer uses
usb_ep_autoconfig to add endpoint descriptors to gadget. So that
CDNS3 driver can know the EP information and configure the EP once
the set configuration request is received.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Each array is used only in one file (core.c or ep0.c). Move their content
to correct file, mark them as static and do not export out of current file.
This change allows to decrease size of u-boot.bin as more of those strings
are not used.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reinitialize dfu_env_entities after flashing the 'SCRIPT' entity to
ensure that the potential changes to the 'dfu_alt_info' environment
variable are applied.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reinitialize DFU USB gadget after flashing the 'SCRIPT' entity to ensure
that the potential changes to the 'dfu_alt_info' environment variable are
applied.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[lukma - I've moved the bool retry to avoid build (CI) errors]
Define a new 'SCRIPT' type for DFU entities. The downloaded data are
treated as simple u-boot's scripts and executed with run_command_list()
function.
Flashing the 'SCRIPT' entity might result in changing the 'dfu_alt_info'
environment variable from the flashed script, so add a global variable
for tracking the potential need to reinitialize the dfu_alt_info related
structures.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Define a new 'SKIP' type for the DFU entities. The flashed data for that
entity is simply ignored without returning any error values.
This allows to have one flashing procedure and images for the different
board types or variants, where each board uses only the images relevant
to it and skips the rest. This is especially usefull for the THOR
protocol, which usually transfers more than one file in a single session.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
[mszyprow: rephrased commit message and docs for easier reading, changed
subject to "dfu: add 'SKIP' entity"]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Use the default MMC device set in the command line if entity specifies it
as -1. This allows to use the same dfu_alt_info string for different MMC
devices (like embedded eMMC and external SD card if data layout is the
same on both devices).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Show the interface name (i.e. 'mmc') in the information string to ease
user checking which device is exported via USB Mass Storage protocol.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
In case of usb_add_function() failure the error path has an issue,
i.e the global pointer variable is assigned to garbage
Fix the above mentioned issue by assigning pointer to NULL.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
In case of usb_add_function() failure the error path has two issues:
- the potentially allocated structure isn't getting freed
- the global pointer variable is assigned to garbage
Fix the above mentioned issues by freeing memory and assigning NULL.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
On request/suggestion from Simon Glass back in May 22 2019 [1], the
'strsep' mechanism implemented in bcb_set() was set to work directly
with user-provided argv strings, to avoid duplicating memory and for
the sake of simpler implementation.
However, since we recently exposed bcb_write_reboot_reason() API to be
called by U-Boot fastboot, the idea is to be able to pass const string
literals to this new BCB API, carrying the reboot reason.
Since 'strsep' (just like its older/superseded sibling 'strtok')
modifies the input string passed as parameter, BCB command in its
current state would attempt to perform in-place modifications in a
readonly string, which might lead to unexpected results.
Fix the above with the cost of one dynamic memory allocation ('strdup').
This will also ensure no compiler warnings when passing string literals
to bcb_write_reboot_reason().
[1] http://u-boot.10912.n7.nabble.com/PATCH-v2-0-2-Add-bcb-command-to-read-modify-write-Android-BCB-td369934i20.html#a370456
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.
A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).
This third patch makes '__bcb_store' available for internal needs.
No functional change intended.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.
A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).
This second patch makes '__bcb_set' available for internal needs.
No functional change intended.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Enriching the functionality of U-Boot 'bcb' may assume using the
existing sub-commands as building blocks for the next ones.
A clean way to achive the above is to expose a number of static
routines, each mapped to an existing user command (e.g. load/set/store),
with a user/caller-friendly prototype (i.e. do not force the caller
to wrap an integer into a string).
This first patch makes '__bcb_load' available for internal needs.
No functional change, except for a tiny update in error handling.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Casting 32bit int value directly into 64bit unsigned type causes
wrong value for file size equal or larger than 2GB. Fix the wrong
file size by casting uint32_t first.
Fixes: commit 1fe9ae76b1 ("gadget: f_thor: update to support more than 4GB file as thor 5.0")
Reported-by: Junghoon Kim <jhoon20.kim@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
For UBI partitions ("partubi" in dfu_alt_info), dfu_fill_entity_mtd sets
the mtd.ubi flag; however other functions incorrectly check for nand.ubi
instead. Fix this by checking for the correct flag.
Signed-off-by: Guillermo Rodriguez <guille.rodriguez@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
The R-Car3 SDHI should set these two bits in DMA_MODE register according
to the specification, to indicate 64bit bus width. No other bus width
options are permitted and the default value is 0, which is incorrect.
Set the bits accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and
r8a774a1-u-boot.dtsi have been imported from linux 5.10
commit 2c85ebc57b3e1817 ("Linux 5.10").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Commands like 'fatinfo' call dev_print() to print device information. If
the block device is created via 'host bind', we should print accurate
information.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide information about host backed block device.
Mark the device created by 'host bind' as removable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The auto_alloc_size members of struct driver has been renamed auto.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Re-send because of line-wraps.
Without this patch, u-boot just hangs if the fdt pointer is
not initialized. The diagnostic subsystems are not yet initialized,
so all you get is a blind hang.
Signed-off-by: Stanislav.Pinchuk@kaspersky.com
The UEFI Self Certification Test (SCT) checks the SetTime() service with
the following steps:
* set date
* reset
* check date matches
To be compliant the sandbox should keep the offset to the host RTC during
resets. The implementation uses the environment variable
UBOOT_SB_TIME_OFFSET to persist the offset.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Libraries that link with U-Boot typically may expect to be able to include
ctype.h but this file is in a different place in U-Boot. Add a symlink to
make this work.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function uses the old format for reading hashes. Add
support for the current format.
Add a test while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The use of pinctrl in the core of driver model is useful but can provoke
some strange behaviour. Add a comment to aid debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current driver name does not match its compatible string, so
of-platdata does not work correctly. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if these calls are used with of-platdata, a confusing error is
produced, referring to a function not actually called by the code causing
the problem.
Fix this by not inlining, so that the error mentions the dev_read_...()
function and it is more obvious what is going on.
Signed-off-by: Simon Glass <sjg@chromium.org>
These cannot work with of-platdata since they currently need the
devicetree at runtime. Disable the emulators and the sandbox I2C driver
that needs them. We can enable these later, if needed for testing.
Switch the of_plat_parent test over to use a simple bus instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Update the devicetree so that the TPM and RTC can be used in SPL. Also
enable the pins used for getting the memory configuration settings while
we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current help talks about relocation which doesn't apply to SPL and
TPL. Update it to avoid confusion.
Also make the TPL size default to the same as the SPL size, since this is
more likely to be a useful value than the one used by U-Boot proper, which
may be quite a bit larger.
Signed-off-by: Simon Glass <sjg@chromium.org>
The EC can store small amounts of data for the benefit of the
verified boot process. Since the EC is seldom reset, this can allow the
AP to store data that survives a reboot or a suspend/resume cycle.
Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
On x86 platforms the EC provides a way to read 'switches', which are
on/off values determined by the EC.
Add a new driver method for this and implement it for LPC.
Signed-off-by: Simon Glass <sjg@chromium.org>
This should not happen in normal operation, but the EC might have a bug,
so add a run-time check just in case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow a longer time for the EC to reboot. Also use a constant for the
hash delay time, so it is clear what it is for.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is used several times in this file. Put it in a function to avoid
code duplication.
Also add a test for this function. There are no cros_ec tests at present,
so it is time to update the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
The offset of an entry needs to be adjusted by its skip-at-start value.
This is currently missing when reading entry data. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When packing files it is sometimes useful to align the start of each file,
e.g. if the flash driver can only access 32-bit-aligned data. Provides a
new property to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if a devicetree blob is included in a vblock it does not deal
with updates. This is because the vblock is created once at the start and
does not have a method to update itself later, after all the entry
contents are finalised.
Fix this by adjusting how the vblock is created.
Also simplify Image.ProcessEntryContents() since it effectively duplicates
the code in Section.ProcessContents().
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally when an entry is created, any entry arguments it has are required
to be provided, so it can actually generate its contents correctly.
However when an existing image is read, Entry objects are created for each
of the entries in the image. This happens as part of the process of
reading the image into binman.
In this case we don't need the entry arguments, since we do not intend to
regenerate the entries, or at least not unless requested. So there is no
sense in reporting an error for missing entry arguments.
Add a new property for the Image to handle this case. Update the error
reporting to be conditional on this property.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman only supports resolving symbols in the same section as
the binary that uses it. This is quite limited because we often need to
group entries into different sections.
Enhance the algorithm to search the entire image for symbols.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present on large files, lz4 uses a larger block size (e.g. 256KB) than
the 64KB supported by the U-Boot decompression implementation. Also it is
optimised for maximum compression speed, producing larger output than we
would like.
Update the parameters to correct these problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable this option so that the boot-script substitutions of %U works as
expected. With this, it can boot into Chrome OS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the TPM description to include the interrupt mechanicm since this
is useful to know. Also add a warning if the TPM cannot be found and a
debug line if it succeeds.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the Cr50 starts up it doesn't have a valid locality. The driver sets
it to -1 to indicate that. Tracking this allows cr50_i2c_cleanup() to
avoid releasing a locality that was not claimed.
However the helper functions that generate the flags use a u8 type which
cannot support -1, so they return a locality of 0xff.
Fix this by updating the type. With this, 'tpm startup TPM2_SU_CLEAR'
works as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-04-rc1-4
Bug fixes:
* re-read the partition table after writing GPT
* fix a problem booting ARMv7 boards with PSCI without UEFI
* make aarch64 UEFI test programs compatible with GRUB linux command
* correct the alignment check in the EFI_BLOCK_IO_PROTOCOL
* check EFI_BLOCK_IO_PROTOCOL.Media->LastBlock in unit test
Add the Linux magic to the EFI file header to allow running our test
programs with GRUB's linux command. Now we can dump the fixed-up device
tree with our dtbdump.efi tool.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some ARMv7 boards using PSCI require to be in secure-mode when booted via
'bootz' or 'bootm'. During distro-boot 'bootefi bootmgr' is called to check
if booting via UEFI is possible.
With the change we change the switch from secure mode to non-secure mode is
moved from the UEFI subsystem setup to just before calling StartImage().
Cc: Jernej Škrabec <jernej.skrabec@gmail.com>
Reported by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If the field Media->IoAlign of the EFI block IO protocol is zero, no
alignment is required. Our code required 4 GiB alignment in this case.
Don't check buffer alignment if Media->IoAlign == 0.
Fixes: f59f0825e8 ("efi_loader: parameter checks BLOCK_IO_PROTOCOL")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The field Media->LastBlock of the EFI_BLOCK_IO_PROTOCOL must be filled
with the index of the last logical block (LBA) for the block device that
our test driver provides.
After calling ConnectController() U-Boot exposes the block IO protocol for
the partition check that the value of Media->LastBlock equals the partition
size minus one.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Excluding ut str in test/cmd_ut.c but compiling test/str_ut.c results in
failure of the Python test invoking the C unit tests as observed on
sipeed_riscv_smode_defconfig:
FAILED test/py/tests/test_ut.py::test_ut[ut_str_upper]
Allow to compile test/str_ut.c on all boards.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Excluding ut bootm in test/cmd_ut.c but compiling test/bootm.c results in
failure of the Python test invoking the C unit tests as observed on
sipeed_riscv_smode_defconfig:
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_nop]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_nospace]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_silent]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_silent_var]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst_both]
FAILED test/py/tests/test_ut.py::test_ut[ut_bootm_subst_var]
Only compile test/bootm.c on the sandbox.
Fixes: f158ba15ee ("bootm: Add tests for fixup_silent_linux()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
As noted in comments, yield_fixture has been deprecated for longer than
our minimum required version of pytest. Newer versions of pytest cause
this to be a louder warning, and as the migration is trivial, perform it
now.
Signed-off-by: Tom Rini <trini@konsulko.com>
With Pytest 6.0.2 'make tests' fails:
sandbox: Traceback (most recent call last):
File "./test/py/test.py", line 20, in <module>
sys.exit(load_entry_point('pytest', 'console_scripts', 'pytest')(args))
TypeError: console_main() takes 0 positional arguments but 1 was given
The definition of console_scripts has changed as follows:
Pytest 4.6.1:
[options.entry_points]
console_scripts =
pytest=pytest:main
py.test=pytest:main
Pytest 6.0.2:
[options.entry_points]
console_scripts =
pytest=pytest:console_main
py.test=pytest:console_main
The new function console_main() has a comment:
"This function is not meant for programmable use; use `main()`"
Hence let's call pytest.main() directly.
Move args processing into the __main__ paragraph.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
Compiling wandboard_defconfig with CONFIG_UT_LOG=y leads to a build error:
test/log/pr_cont_test.c: In function ‘log_test_pr_cont’:
test/log/pr_cont_test.c:28:14: error:
‘gd_t’ {aka ‘volatile struct global_data’} has no member named ‘log_fmt’
log_fmt = gd->log_fmt;
We do not want to let CONFIG_UT_LOG depend on CONFIG_LOG=y because we have
tests for logging functions called with CONFIG_LOG=n.
Fix the build dependency.
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since commit 565a4147d1 ("fs: btrfs: Add more checksum algorithms")
btrfs uses the sha256 checksum algorithm. But Kconfig lacks to select
it. This leads to compilation errors:
fs/built-in.o: In function `hash_sha256':
fs/btrfs/crypto/hash.c:25: undefined reference to `sha256_starts'
fs/btrfs/crypto/hash.c:26: undefined reference to `sha256_update'
fs/btrfs/crypto/hash.c:27: undefined reference to `sha256_finish'
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
When copying short name plus extension refer to the encapsulating structure
and not to the short name element.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Re-send because of line-wraps.
This patch fixes the behaviour of the menuconfig's BOOTCOMMAND
setting. Which is just ignored without that patch on
vexpress_aemv8a platform.
Signed-off-by: Stanislav.Pinchuk@kaspersky.com
1. Enable MTK SPI NOR controller driver on mt7622 & mt7629.
2. Enable quad mode for read and single mode for write.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
This patch adds support for MTK SPI NOR controller, which you
can see on mt7622 & mt7629.
1. This controller is designed only for SPI NOR. We can't adjust
its bus clock dynamically. Set clock in dts instead.
2. This controller only supports 1-1-1 write mode.
3. Remove mtk_snor_match_read() since upper SPI-MEM layer already
handles command.
4. sf read/write/update commands are tested with this driver.
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
This is a basic driver for the ultra-low-power Abracon AB x80x series
of RTC chips. It supports in particular, the supersets AB0805 and AB1805.
It allows reading and writing the time, and enables the supercapacitor or
battery charger.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
If both stop key and delay key are empty, the length of these
keys is 0. The subtraction operation will cause the u_int type
variable to overflow, will cause illegal memory access in key
input loop.
This commit fixes this bug by using int type instead of u_init.
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some images may have multiple copies of the same thing, e.g. two versions
of the read/write U-Boots. It is necessary to read data from one or other
of these under selection of the verified-boot logic. Add a function to
select the subnode to use.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this logic out of the main init function so it is available for
other purpose.
Use a different error when multiple-images is in use but no subnode is
available. This makes it easier to determine what is wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Unfortunately the toolchain often brings in the crc32 table even if the
function is not actually used. For now, exclude it from the TPL build,
which is very sensitive to size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Set this flag so that it is available to those looking at the device. For
non-removable devices there is no need to check for insertion/removable
since the media can never change.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
At present if an eMMC part is in the system, the ACPI table generated
will include information about that, as well as the SD card. We only need
to include the SD card, since it has a card-detect GPIO. Use a different
compatible string for each option, and add code only for the SD card.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
This macro is the length of the string but excludes the terminator. Users
must add 1 when declaring a large-enough string. Add a comment to make
this clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this code uses a simple printf() format if running in SPL. But
SPL can use the full printf. Use USE_TINY_PRINTF instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This includes information about sandbox which is not relevant for most
boards. Drop it.
Also add the address to help figure out the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function may be used in SPL where devicetree is not available.
Use the correct macro so that the function does not try to read it.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases so much of the framebuffer is updated that it is not worth
copying the changes piece by piece to the copy framebuffer. Add a function
to copy the whole thing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tag names for recently added types.
Fixes: d2cb7a22da (x86: Allow putting some tables in the bloblist)
Signed-off-by: Simon Glass <sjg@chromium.org>
Typically in TPL/SPL the bloblist is quite small. But U-Boot proper may
want to add a lot more to it, such as ACPI tables.
Add a way to expand the bloblist by relocating it in U-Boot proper, along
with the other relocation activities.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to figure out which phase we are loading next and
which phase we came from. Add some functions to handle this as well as
returning the name of a phase. This allows messages like "Booting to x"
where x is the next phase.
At present, TPL says 'Jumping to U-Boot' at the end, when in fact it is
jumping to SPL. This is confusing, so use the new functions to correct
this.
Tests for this will come with an upcoming minor SPL test refactor.
Signed-off-by: Simon Glass <sjg@chromium.org>
In the function rsa_verify_hash, if the "main" key doesn't
work, u-boot try others keys. But it searches those keys
in the FIT image instead of the u-boot device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch completely removes CONFIG_PCI_ENUM_ONLY from the PCI code as
it is not configured for any board (any more). With this removal, some
PCI related files get cleaned up a bit.
Additional, dm_pciauto_setup_device() is now static, as it's not
referenced from any code outside of this C file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In fit_config_verify_sig(), when no 'signature*' subnode exists in
the configuration node, the fdt_for_each_subnode() loop is a no-op.
Therefore, no error flags are set, and 'err_,sg' is not populated
with an error string. This is incorrect behavior.
Populate err_msg to indicate that no 'signature' is found, before
entering the loop. The first call to fit_image_verify_sig() will
override clear err_msg, or set it to a more specific message.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed ARM_SMCCC_FAST_CALL value is shifted to 31'st bit. Then, it is expanded
to 64 bit value, which results in 1s in higher 32 bits.
This causes corrupted values in 64-bit SMC IDs and issues in buggy handlers of
32-bit calls.
We need to make ARM_SMCCC_FAST_CALL unsigned long, so it would work properly
on 32 bit architectures.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Macro 'cmd_objcopy_uboot' currently does not work with passed empty command
expanded from 'cmd_static_rela' and therefore dummy command 'true' is set
in 'cmd_static_rela' to workaround this issue.
Eliminate it now by fixing 'cmd_objcopy_uboot' macro to work also with
empty 'cmd_static_rela' macro and remove useless invocation of command
'true'.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Espressobin: Disable slot when emmc is not present (Pali)
- DS414; config header cleanup (Phil)
- PCI: auto-config enhancement (Phil)
- pci_mvebu: Also map IO region (Phil)
- serial: a3720: Implement pending method for output direction (Pali)
- turris_mox: Enable a few commands (Marek)
- helios4 & ClearFog changes (Dennis)
- Plus some minor misc changes
Pull request for documentation tag doc-2021-04-rc1-3
Update the build system for the HTML documentation to allow using
Sphinx 3.
Man-page for exception command.
This adds support for specifying FDT overlays in an extlinux/pxelinux
configuration file.
Without this, there is no simple way to apply overlays when the kernel
and fdt is loaded by the pxe command.
This change adds the 'fdtoverlays' keyword for a label, supporting multiple
overlay files to be applied on top of the fdt specified in the 'fdt' or
'devicetree' keyword.
Example:
label linux
kernel /Image
fdt /soc-board.dtb
fdtoverlays /soc-board-function.dtbo
append console=ttyS0,115200 root=/dev/mmcblk0p2 rootwait
This code makes usage of a new variable called fdtoverlay_addr_r used to load
the overlay files without overwritting anything important.
Cc: Tom Rini <trini@konsulko.com>
Cc: Andre Heider <a.heider@gmail.com>
Cc: Jernej Škrabec <jernej.skrabec@siol.net>
Cc: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Jernej Škrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Škrabec <jernej.skrabec@siol.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The phydev structure has a PHY OF node pointer in it, use that OF node
first when looking up PHY OF node properties, since that is likely the
correct PHY OF node pointer. If the pointer is not valid, which is the
case e.g. on legacy DTs, fall back to parsing MAC ethernet-phy subnode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Add some missing address translations from virtual address in local DRAM
to physical address, which is needed for the DMA transactions to work
correctly.
This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Using (dm_)pci_virt_to_mem() is incorrect to translate the virtual
address in local DRAM to a physical address. The correct macro here
is virt_to_phys() so switch to using this macro.
As virt_to_bus() is now not used any more, this patch also removes
both definitions (DM and non-DM).
This issue was detected while testing the e1000 driver on the MIPS
Octeon III platform, which needs address translation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Enable setexpr command in defconfig for Turris MOX. We have found that
this is sometimes useful in U-Boot scripts and there is enough space in
NOR memory on MOX.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Enable wdt command in defconfig for Turris MOX. This is useful when
doing debugging.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Value pcie->dev in function pcie_advk_probe() is not initialized yet
so use dev as argument for dev_dbg()/dev_warn().
Function pcie_advk_wait_pio() itself prints error message on failure
so do not print duplicate error message in caller.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
To check if some output characters are waiting either in Transmitter
Holding Register or Transmitter Shift Register we need to look at
TX_EMPTY bit of UART Status Register.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Update the documentation build system according to Linux v5.11-rc1.
Deactive the automarkup.py extension module which on Gitlab CI is
incompatible with Unicode.
With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Install all requirements according to doc/sphinx/requirements.txt in the
virtual environment used for testing 'make htmldocs'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sphinx 3 builds fail due to doc/develop/logging.rst producing duplicate
labels.
Include logging.h only once in the API section and use cross-references for
the enums log_level_t and log_category_t.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Configure an IO region and window for PNP identical to how MEM region is
set up. Linux does this only if the DT defines a pcie-io-aperture
property for the SOC, but since all supported boards do this should not
be needed.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
On my DS414, some PCI devices return odd values when probing BAR sizes.
An obvious case is all-ones response, the Linux driver
(drivers/pci/probe.c) catches those explicitly and a comment explains
that either bit 0 or bit 1 must be clear (depending on MEM or IO type).
Other BARs return e.g. 0xfff0000f or 0xfff00004 and thus manage to break
size calculation due to the "middle" zeroes. Mitigate that copying more
or less what Linux does and do a "find least bit set".
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
A few minor changes:
* Get rid of leftover comments, other commits removed the defines they
referred to.
* CONFIG_SYS_NETA_INTERFACE_TYPE is not used anymore since commit
e3b9c98a23 ("net: mvneta: Convert to driver model").
* Drop CONFIG_USB_MAX_CONTROLLER_COUNT: it is per-HCI type, so XHCI and
EHCI could still both work be used.
* Unconditionally define CONFIG_EHCI_IS_TDI: it has no effect on XHCI so
that conditional doesn't make any sense.
* Define a larger PHY_ANEG_TIMEOUT: In my test bed, the NIC is directly
connected to some RTL8111 and the default 8s timeout was often too
short.
Signed-off-by: Phil Sutter <phil@nwl.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
This change extends previous commit 061c6d1b23 ("arm: mvebu: Espressobin:
Detect presence of emmc at runtime") and when emmc is not present then emmc
is removed from U-Boot DM and corresponding slot is disabled. Therefore on
Espressobin board without soldered emmc, state of emmc hw should be same as
if emmc was disabled in DTS.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
SATA and UART ClearFog imaages are not buildable as ENV_SECT_SIZE is not defined
set values for both possible targets
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Move all aliases defintions into the main dts file
Add u-boot definiton to i2c0 based on clearfog
set spi1 status to okay
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
The Armada driver also works on Nedap's custom Kirkwood board with a
Marvell 88F6180 CPU. The original commit of that driver,
commit 704d9a645e ("gpio: Add DM GPIO driver for Marvell MVEBU"),
also mentions that this driver would be suitable for Kirkwood. This
does not completely replace the Kirkwood specific driver as there
are still boards depending on that driver.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Stefan Roese <sr@denx.de>,
Reviewed-by: Stefan Roese <sr@denx.de>
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid becoming trapped with some compatible fallback strings, let's
remove the whole struct sunxi_mmc_variant, and replace this with a SoC
based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols.
This will later simplify H616 support.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Allwinner H616 supports many types of DRAM. Most notably it supports
LPDDR4. However, all commercially available boards at this time use
only DDR3, so this commit adds only DDR3 support.
Controller and MBUS are very similar to H6 but PHY is completely
unknown.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
H616 has mostly the same clocks as H6 with some small differences. Just
reuse H6 clocks for H616 and handle differences with macros.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
driver and need for PMIC configuration, which pulls several drivers which
are not needed otherwise.
spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with
that, reported in SPL header. If size in header is bigger, it will use
that value instead.
In the process of function rework, also add missing function argument.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
There was no need to have prcm definitions for H6 and similar SoCs till
now. However, support R_I2C will be needed soon in SPL.
Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h.
One of those files will be selected in common prcm.h based on defined
macros.
This commit doesn't do any functional change.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
While currently none of the newer Allwinner SoCs currently has I2C
support implemented in U-Boot, this will change soon. mvtwsi driver is
good as it is for them except one macro. Update it to be ready once I2C
support lands for those SoCs.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that several SoCs share same mmc configuration as H6. In
order to lower ifdef clutter replace H6 specific macro with common one.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that there are at least 2 other SoCs which have basically
the same memory map, similar clocks and other features as H6. It's very
likely that we'll see more such SoCs in the future. In order to ease
porting to new SoCs and lower ifdef clutter, introduce common symbol for
them.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The #ifdef CONFIG_xxxPWR conditionals were not working as expected, as
string Kconfig symbols are always "defined" from the preprocessor's
perspective. This lead to unnecessary calls to the GPIO routines, but
also always added a half a second delay to wait for a SATA disk to power
up. Many thanks to Peter for pointing this out!
Fix this by properly comparing the Kconfig symbols against the empty
string. strcmp() would be nicer for this, but GCC does not optimise this
away, probably due to our standalone compiler switches.
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi WinPlus
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
dts file is taken from Linux 5.11-rc1 tag.
The Bluetooth controller of this device ships with a default address,
use the new CONFIG_FIXUP_BDADDR option to fix it up.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
[Updated OrangePi 3 DT, rebase and config update]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit adds support for Tanix TX6 TV box, based on H6. It's low end
H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
peripherals.
DT file is taken from Linux 5.11-rc1 release.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far all GBit users of the sun8i-emac driver were using the "rgmii"
PHY mode, even though this turns out to be wrong. It just worked because
the PHY driver doesn't do the proper setup (yet).
In fact for most boards the "rgmii-id" or "rgmii-txid" PHY modes are the
correct ones.
To allow the DTs to describe the phy-mode correctly, and to stay
compatible with Linux, at least allow those other RGMII modes in the
driver.
This avoids breakage if mainline DTs will be synced with U-Boot.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Pull request for documentation tag doc-2021-04-rc1 (2)
* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
* Adjust suppression of newline in echo command.
* Provide unit test for echo command.
Second set of u-boot-atmel features for 2021.04 cycle
This feature set includes macb updates for all interfaces and new
sama7g5 variant support; micrel ksz9031 DLL support; a new board from
Giant based on Adafruit feather form factor which contains a SAMA5D27
SoC; several fixes regarding the NAND flash PMECC block; and pincontrol
drive strength support for pio4 controller.
'make htmldocs' creates a warning:
./include/asm-generic/global_data.h:443:
warning: Function parameter or member 'uclass_root_s'
not described in 'global_data'
Correct the member descriptions.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The first argument is the load address and not an offset.
The second argument cannot be entered without the first one.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default the echo command emits its arguments followed by a line feed.
If any of the arguments contains the sub-string "\c", the line feed is
suppressed.
This does not match shells used in Linux and BSD where the first argument
has to be -n to suppress the line feed.
The hush shell interferes with the parsing of backslashes. E.g. in the
following command line quadruple backslashes are required for suppressing
the line feed:
for i in 1 2 3; do for j in 4 5; do echo \\\\c ${i}${j}; done; echo; done;
To avoid unexpected behavior the patch changes echo to use -n as first
argument to suppress the line feed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add DM_FLAG_PRE_RELOC flag for reset-mtmips to make sure this driver can
be probed before relocation even if u-boot,dm-pre-reloc is not present
in the dts.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Currently this driver does not set the value of plat->cfg.f_max, which
results in that MMC framework will always run at the lowest frequency.
This patch sets plat->cfg.f_max to the maximum allowed frequency, which
equals to the source clock frequency.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The driver is missing pad control settings (pad delay and pad conf) for
the mt7620 and mt76x8. Although mt76x8 still works well, mt7620 will
encounter CRC error on data transfers.
This patch adds default pad control settings for mt7620_compat.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
It turns out that the sclk cycles used by mt7620/mt7628 is the same as
other chips (20 bits, 1048576), not 65536.
This patch removes sclk_cycle_shift from dev_comp, and uses a macro with
a value 20 instead.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds ethernet driver for MediaTek MT7620 SoC.
The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in
7-port switch and two xMII interfaces (can be MII/RMII/RGMII).
The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be
configured to connect to either the intergrited FE PHY, or the xMII.
Port 5 always connects to the xMII. Port 6 is the CPU port.
This driver supports MT7530 giga switch connects to port 5.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds spi controller support for MediaTek MT7620 SoC.
The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds pinctrl support for MediaTek MT7620 SoC.
The MT7620 SoC supports only pinmux.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds a clock driver for MediaTek MT7620 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds uart support for MediaTek MT7620 and earlier SoCs.
The UART used by MT7620 is incompatible with the ns16550a driver.
All registers of this UART have different addresses. A special 16-bit
register for Divisor Latch is used to set the baudrate instead of the
original two 8-bit registers (DLL and DLM).
The driver supports of-platdata which is useful for tiny SPL.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Since mt7620 is added into Kconfig, the CONFIG_SOC_MT7628=y which is
omitted by default must be added back, otherwise make xxx_defconfig for
these boards will be configured for mt7620 platform.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The mt7620_rfb board supports integrated 10/100M PHYs plus two external
giga PHYs. It also has 8MB SPI-NOR, mini PCI-e x1 slot, SDHC and USB.
The mt7620_mt7530_rfb boards supports an external MT7530 giga switch and a
16MB SPI-NOR flash.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for MediaTek MT7620 SoC.
All files are dedicated for u-boot.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds support for mtmips SoCs to initialize the SDRAM.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The sysreset driver has a config CONFIG_SPL_SYSRESET for the spl stage.
Change CONFIG_SYSRESET to CONFIG_IS_ENABLED(SYSRESET) will give spl a
chance to use _machine_restart instead of the sysreset driver.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
CONFIG_SYS_SDRAM_BASE points to cached memory, i.e. KSEG0, which is not
suitable for detecting memory size.
Replace CONFIG_SYS_SDRAM_BASE with KSEG1, and make dram_init() always do
memory size detection in any stage.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Currently only mt7628 needs the sysreset driver, do not select it for
mt7620.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch is a preparation for add a new soc fot mtmips.
Move all mt7628 related Kconfig (boards and UART selection) into mt7628
subdirectory and make sure the top directory of mtmips contains only
selection for SoCs.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Previous the dts files for gardena-smart-gateway-mt7688 and
linkit-smart-7688 are set to be built when mtmips is selected.
This can lead to a compilation error if another soc is added to this arch
with different dtsi files.
So it's better to build the dtb only if their board is selected.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Pull request for UEFI sub-system for efi-2021-04-rc1-3
Bug fixes for UEFI sub-system:
* correct value of EFI_BLOCK_IO_PROTOCOL.Media.LastBlock
* correct GUID when closing of EFI_LOAD_FILE_PROTOCOL
* error handling in mkeficapsule tool
Bug fixes for FAT file system:
* consistent error handling for flush dir()
Unfortunately we now see a number of now-fatal warnings about duplicate
labels. It is often unclear how best to re-write the document in
question to not duplicate these otherwise logical headings.
This reverts commit 10a1df3cd4.
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert test/py/README.md to restructured text and add it to the generated
HTML documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move test/README to the 'Develop U-Boot' chapter of the HTML documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the help message used for 'make help':
Documentation targets:
Linux kernel internal documentation in different formats from ReST:
=>
U-Boot documentation in different formats from ReST:
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the docomentation build system according to Linux v5.11-rc1.
With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Fix warning in b4860qds.rst about "Switch Settings"]
Signed-off-by: Tom Rini <trini@konsulko.com>
Beacon EmbeddedWorks is releasing a devkit based on the i.MX8M
Nano SoC consisting of baseboard + SOM.
The kit is based on the same design as the Beacon dev kit with
the i.MX8M Mini.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The previous macro was off by one bit and so we were getting a ddr
size which was twice the real size. This commit refactors the macro so
it returns the right size in _bytes_ and modifies the printf call so the
size is still printed in MiB.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
In case the clock framework is enabled, enable the SPI controller clock
and obtain max frequency from the clock framework.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
The CSPI/ECSPI register bits do not differ between newer SoCs, instead
of having multiple copies of the same thing for each iMX SoC, define
the bits in the driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Add ECSPI clock entries to iMX8MN clock driver. Only make those entries
available in case SPI support in U-Boot is enabled at all to conserve
space, esp. in SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to support the QSPI chip on the SOM, the Flexspi bus
needs to be configured to talk with the SPI chip.
Resync the som device tree with 5.11-rc4
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
There is a QSPI chip connected to the FSPI. Enable the defconfig
to support it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Supported boot device types in iMX8MQ: MMC, DHCP.
CONFIG_DISTRO_DEFAULTS is added for enabling the DISTRO_DEFAULTS option.
CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mq_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.
kernel_addr_r is the location in RAM where the kernel will be loaded to.
Delete unnecessary environment variables because "run distro_bootcmd" is
set to be the default boot mode.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Move the bootcounter to SVNS_LPGDR to free up OCRAM for usage by the VPU.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Now that header files no longer include common.h it must be included
first.
Otherwise the build fails with errors like
include/asm/arch/clock.h:43:1: error: unknown type name 'u32'
u32 imx_get_uartclk(void);
Fixes: c3dc39a2f8 ("arm: Don't include common.h in header files")
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch converts the dart6ul ethernet support to DM_ETH and cleans
up the legacy ethernet code. The clean up, more specifically:
* moves the fec2 node and pin definition to the carrier board DTS
since the phy associated with it is on the carrier board and not on
the SoM;
* add the reset pin associated to each phy;
* separate the ethernet, mdio and reset pins of each fec so that they
are easier to reference;
* add clock properties to the phy nodes since they are connected to the
50Mhz ENET[12]_TX_CLK clock of the SoC;
* remove CONFIG_BOARD_EARLY_INIT_F since the function is now empty.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Because SPL can support SD UHS, the fixed regulator needs to be
enabled in SPL to reset the SD card.
Fixes: 1a5d9c84b4 ("imx8mm_beacon: Enable HS400 on MMC controller")
Signed-off-by: Adam Ford <aford173@gmail.com>
This fixes eth0 not initializing properly. Both eth0 and eth1 use the
MDIO interface on eth1 to access their PHYs. However, without
DM_ETH_PHY, eth0 still tries to use its own MDIO interface to access its
phy. Before this patch, a boot log might contain lines like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Could not get PHY for FEC0: addr 2
After this patch they now look like
Net:
Warning: ethernet@20b4000 using MAC address from ROM
eth1: ethernet@20b4000 [PRIME]Get shared mii bus on ethernet@2188000
Warning: ethernet@2188000 using MAC address from ROM
, eth0: ethernet@2188000
As an alternative to DM_ETH_PHY, FEC_MXC_SHARE_MDIO could also have been
used to achieve the same effect.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value
"/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Supported boot device types in iMX8MP: MMC.
CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution. kernel_addr_r is the location in RAM where
the kernel will be loaded to. Delete unnecessary environment variables
because "run distro_bootcmd" is set to be the default boot mode.
On the iMX8MP platform I used, "mmc1" represents SD card and "mmc2"
represents eMMC.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Distro Boot requires a U-Boot-specific script named boot.scr or
boot.scr.uimg which contains boot commands to boot the system. The
boot.cmd is such a file. Use mkimage to generate boot.scr or
boot.scr.uimg from boot.cmd, and the command is:
mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "Distro Boot Script" -d boot.cmd boot.scr.uimg
The boot.cmd file is an example script and can be modified based on
needs. bootargs is set in this script and root uses the default value "
/dev/mmcblk1p2 rootwait rw" which can be changed by overriding mmcroot.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Supported boot device types in iMX8MM: MMC, DHCP.
CONFIG_CMD_PART is added for command part and CONFIG_CMD_FS_GENERIC is
for command fstype.
CONFIG_BOOTCOMMAND which is defined in include/configs/imx8mm_evk.h is
deleted because "run distro_bootcmd" is required to be the default boot
mode.
scriptaddr is the location in RAM where boot.scr.uimg/boot.scr will be
loaded to prior to execution.
kernel_addr_r is the location in RAM where the kernel will be loaded to.
Delete unnecessary environment variables.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.
Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When boot type could not be detected from rom sw info,
read sbmr1 to detect, here we only use it to detect FLEXSPI
boot, because ROM not update it in rom sw info.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since we remove SATA device before boot OS, when AHCI is enabled, update
the codes to remove AHCI device.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
iMX8MP has shifted market segment fuse one bit from 0x440 [7:6] to [6:5],
correct it in imx common codes.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add NAND boot support for i.MX8MP by adding i.MX8MP in nandbcb support
list, reading boot_search_count from fuse.
i.MX8MN NAND boot is same as i.MX8MP, fix some issues as well.
Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006656. In nandbcb_set_boot_config, an integer overflow
occurs, with the result converted to a wider integer type.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006658. In fill_dbbt_data, an integer overflow occurs,
with the result converted to a wider integer type
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006657. In read_fcb, leak of memory to system
resource "fcb_raw_page". Adjust the sequence to check the mtd bad
block prior than allocation of "fcb_raw_page", also check the NULL
return of allocation.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006655. In write_fcb, leak of memory to resource
"fcb_raw_page". Since we have initialized the "ret" to 0, should return
the value of ret.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix Coverity Issue 9006654. In write_fcb, use of an uninitialized
variable "ret".
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When doing DDR scrub, the DDR may enter into self refresh if the
selfref_en is enabled before DDR scrub. This will cause scrub
can't complete that SBRSTAT.scrub_done won't be set.
Since the selfref_en can be programmed during the course of
normal operation, move it after DDR scrub
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board, we will use
CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The field Media.LastBlock of the EFI_BLOCK_IO_PROTOCOL.Media was filled
incorrectly both for block devices as well as for partitions.
The field must be filled with the index of the last logical block (LBA):
* block devices: device size minus 1
* partitions: partition size minus 1
Reported-by: Alexander von Gluck IV <kallisti5@unixzen.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UEFI specification requires event notification levels to be
> TPL_APPLICATION and <= TPL_HIGH_LEVEL.
With the patch the CreateEvent() and CreatedEventEx() services are changed
to check that the notification level is not TPL_APPLICATION.
Reference:
UEFI Specification 2.8 Errata B, table 27 "TPL Restrictions",
"Event Notification Levels"
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Miscellaneous fixes in the mkeficapsule utility -- these include a few
resource leak issues flagged by Coverity along with some additional
code improvements suggested by Heinrich during code review.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Fill reserved members of efi_firmware_management_capsule_image_header
structure with zero's for safety.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: CID 316354
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CID 316361 says:
> Passing argument "count * 8UL /* sizeof (*files) */" to
> function "dlmalloc" and then casting the return value to "u16 **" is
> suspicious. In this particular case "sizeof (u16 **)" happens to be equal
> to "sizeof (u16 *)", but this is not a portable assumption.
> > 767 tmp_files = malloc(count * sizeof(*files));
The change in this patch fixes the ambiguity.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: CID 316361
For readability use *tmp_files instead of tmp_files[0]
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CID 316364 says:
> Null pointer dereferences (FORWARD_NULL)
> printf("Result total size: 0x%x\n", result->variable_total_size);
at do_efi_capsule_res().
The code is basically safe because a buffer for "result" is allocated
by malloc() and filled up by the second get_variable(), which fails any way
if the allocation has failed.
But the first (and second) get_variable() possibly returns an error other
than EFI_SUCCESS. We always need to check the return code from
get_variable() before accessing the data in "result".
While this change won't suppress CID 316364, the resulting code is much
safer.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use the correct GUID when closing the file load protocol.
Remove an unnecessary check (Coverity CID 316363).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The short name and extension of FAT files are stored in adjacent fields of
the directory entry. For some operations like calculating a checksum or
copying both fields it is preferable to treat both as one structure.
Change the definition of the directory entry structure to include a
structure comprising the name and the extension field.
This resolves Coverity CID 316357, CID 316350, CID 316348.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide function description for flush_dir().
Move all error messages for flush_dir() from the callers to the function.
Move mapping of errors to -EIO to the function.
Always check return value of flush_dir() (Coverity CID 316362).
In fat_unlink() return -EIO if flush_dirty_fat_buffer() fails.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UBI_IOCVOLUP ioctl can fail if exclusive access to the volume isn't
obtained. If this happens, the flush operation doesn't return error,
leaving the caller without knowledge of missing flush.
Fix this by forwarding the error (-1) from ubi_update_start().
Fixes: 34255b92e6 ("tools: env: Add support for direct read/write UBI volumes")
Signed-off-by: Martin Hundebøll <martin@geanix.com>
These commands were disabled when CONFIG_FIT_SIGNATURE is disabled, but
they do not depend on crypto support so they can be unconditionally
enabled.
Signed-off-by: Joel Stanley <joel@jms.id.au>
When CONFIG_FIT_CIPHER=y and CONFIG_FIT_SIGNATURE=n is there is no
implementation of image_get_host_blob for mkimage/dumpimage:
/usr/bin/ld: tools/common/image-cipher.o: in function `fit_image_decrypt_data':
image-cipher.c:(.text+0x9a): undefined reference to `image_get_host_blob'
Move the implementation to a common file so it can be shaed between
image-cipher.c and image-fit-sig.c.
Signed-off-by: Joel Stanley <joel@jms.id.au>
If CONFIG_FIT_CIPHER is enabled without CONFIG_FIT_SIGNATURE then
mkimage/dumpimage will fail to link:
/usr/bin/ld: tools/common/image-cipher.o: in function `fit_image_decrypt_data':
image-cipher.c:(.text+0x9a): undefined reference to `image_get_host_blob'
/usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x10): undefined reference to `EVP_aes_128_cbc'
/usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x40): undefined reference to `EVP_aes_192_cbc'
/usr/bin/ld: tools/common/image-cipher.o:(.data.rel+0x70): undefined reference to `EVP_aes_256_cbc'
/usr/bin/ld: tools/lib/aes/aes-encrypt.o: in function `image_aes_encrypt':
aes-encrypt.c:(.text+0x22): undefined reference to `EVP_CIPHER_CTX_new'
/usr/bin/ld: aes-encrypt.c:(.text+0x6f): undefined reference to `EVP_EncryptInit_ex'
/usr/bin/ld: aes-encrypt.c:(.text+0x8d): undefined reference to `EVP_EncryptUpdate'
/usr/bin/ld: aes-encrypt.c:(.text+0xac): undefined reference to `EVP_CIPHER_CTX_free'
/usr/bin/ld: aes-encrypt.c:(.text+0xf2): undefined reference to `EVP_EncryptFinal_ex'
collect2: error: ld returned 1 exit status
Signed-off-by: Joel Stanley <joel@jms.id.au>
The propoerty sign-images points to images in the configuration
node. But thoses images may references severals "sub-images" (for
example for images loadable). This commit adds the support of
severals sub-images.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This commit creates a function fit_config_add_hash that will be
used in the next commit to support several 'sub-images'.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
** Introduction
There are currently four ways to load an OS image with u-boot
1. SPL -> u-boot -> bootm
2. SPL blue falcon mode
3. "Basic" FIT image (CONFIG_LOAD_FIT)
4. "Full-featured" FIT image (CONFIG_LOAD_FIT_FULL)
These four code paths were developed independently, and share very
little code. (3) and (4), behave very differently, are littered with
special cases. They even have different DTS syntax and properties.
The cause of this divergence is that the FIT format specification
leaves a number of things open to interpretation. The purpose of this
change is to enable the reduction of code size, duplication, and
complexity by updating and streamlining the FIT format.
We are only marginally concerned with backwards compatibility, because
we don't have inter-compatibility. For example, CONFIG_LOAD_FIT is
able to load images that CONFIG_LOAD_FIT_FULL won't. This is a direct
result of the incompatible syntax between the two implementations.
Ideally, these changes would enable "simple" FIT to be a subset of the
"full" fit implementation, and share most code. These changes should
also eliminate the need for falcon mode (although we are not
advocating for the removal of falcon mode at this time).
** Description of changes
* The "configurations" node is now mandatory
Guessing how to load components based on their "os" and "type" invites
confusion and superfluous heuristics. Instead, require each FIT image
to be explicit on how components should be loaded.
* Eliminate "ramdisk", "setup", "standalone", and "fpga" properties
Having too many special purpose properties requires special-casing
FIT loading code. When a special property can be handled by another
property, it is redundant.
- A "ramdisk" is identical to a loadable. Thus ramdisk images should
be placed under "loadables".
- A "setup" node can be achieved by using a "kernel" or "firmware"
property instead.
- "standalone" is used for u-boot nodes. The correct property to use
in this case is "firmware".
- "fpga" is a loadable
* Prioritize control between "firmware" and "kernel"
"firmware" and "kernel" are special nodes in that control is passed
to the "entry-point" of the image. Both can be present, for example,
an OP-TEE firmware with a linux kernel. When both are present,
control is passed to the "firmware" image.
** Further generalizations (not included herein)
The "firmware" and "kernel" properties could be generalized as a
"next-boot-stage", or similar name. This "next" stage would be special
in that it is both executable, and is the stage that is passed
control. For example, "next-stage" could be an op-tee image, with
linux as a loadable, or a u-boot image.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
The dm root node is needed early in the spl to allow the timer to be
used. This change calls spl_early_init to initialize the dm root node.
Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
Giant board is a tiny SBC based on the Adafruit Feather form factor,
created by groboards it contains a SAMA5D2 processor (SAMA5D27),
128 MB of RAM and a microSD card for storage.
Signed-off-by: Greg Gallagher <greg@embeddedgreg.com>
Take into account all RGMII interface types. Depending on it
the RGMII PHY's timings are setup.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk_set_rate() returns the set rate in case of success and a
negative number in case of failure. Consider failure only the
negative numbers.
Fixes: 3ef64444de ("dm: net: macb: Implement link speed change callback")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Different implementation of USER IO register needs different
mapping for bit fields of this register. Add implementation
for this and, since clken is part of USER IO and it needs to
be activated based on per SoC capabilities, add caps in
macb_config where clken specific information needs to be filled.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Because ATMEL_BASE_ROM is defined to 0x100000, it already points
to the begin of the index table for 512 byte sectors correction.
Thus its offset must be zero and the index of the table for 1024
byte sectors must start at offset 0x8000.
Signed-off-by: Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de>
[ta: update commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Offsets are described in the datasheet at section:
"11.4.4.2 NAND Flash Boot: PMECC Error Detection and Correction".
For testing I "injected" bit flips into u-boot NAND memory area,
and then read back. PMECC could not correct the errors. With the
offsets updated everything is fine.
Fixes: 3225f34e5c ("ARM: atmel: add sama5d3xek support")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
When CONFIG_ATMEL_NAND_HW_PMECC is set, CONFIG_PMECC_CAP defaults
to the value of 2. At the conversion to Kconfig for the PMECC config
values, some boards/defconfigs were wrongly configured.
Update CONFIG_PMECC_CAP to the PMECC_CAP value before the conversion.
Fixes: 49ad40298c ("ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
SPL_GENERATE_ATMEL_PMECC_HEADER selects:
ATMEL_NAND_HWECC [=y] && ATMEL_NAND_HW_PMECC [=y].
With the removal of SPL_GENERATE_ATMEL_PMECC_HEADER,
ATMEL_NAND_HW_PMECC and ATMEL_NAND_HWECC were no longer
selected. Also, when the SPL_GENERATE_ATMEL_PMECC_HEADER was removed,
the configs were not updated using savedefconfig, thus the
'commit d168bcb6fe ("configs: Resync with savedefconfig")'
further removes the CONFIG_PMECC_CAP value.
Update defconfigs and add CONFIG_ATMEL_NAND_HW_PMECC,
which selects ATMEL_NAND_HWECC, in order to restore NAND PMECC
support. Restore CONFIG_PMECC_CAP value.
Fixes: 57f76c2a47 ("configs: at91: remove SPL_GENERATE_ATMEL_PMECC_HEADER from non-nand configs")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Use dev_read_prop instead of using the fdt_read_property which
reads from the GD struct's fdt.
This way the node is accessed via the device config instead of the
global struct, which makes code more portable and GD independent.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
- New board: rk3328 NanoPi R2S board;
- Fix init voltage for some rk3399 boards;
- enable rng for rk3399 by default;
- set default to SPI bus 1 for SPI-flash for some board;
- add dwc PCIe controller driver on rockchip platform;
Add Rockchip dwc based PCIe controller driver for rk356x platform.
Driver support Gen3 by operating as a Root complex.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This adds support for the NanoPi R2S from FriendlyArm.
Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED
Signed-off-by: David Bauer <mail@david-bauer.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
The rng is embedded in the SoC so enable it in the device tree
universally, the use of it can be controlled by enabling/disabling
at the device config level.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1
pointed to &spi5, use an alias spi5 for this instead.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Before 'if (err)' we have to initialize the variable otherwise we use a
random value from the stack.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At the beginning of close_ctree_fs_info() the value 0 is assigned to err
and never changed before testing it.
Let's get rid of the superfluous variable.
Fixes: f06bfcf54d ("fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
SquashFS supports sprase blocks in files - that is, if a given block is
composed only of zeros, it's not written to the output file to save
space and it's on-disk length field is set to zero to indicate that.
Previously the squashfs driver did not recognise that, and would attempt
to read and decompress a zero-sized block, which obviously failed.
The following command may be used to create a file for testing:
cat <(dd if=/dev/urandom of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/zero of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/urandom of=/dev/stdout bs=1k count=200) >test_file
Signed-off-by: Campbell Suter <campbell@snapit.group>
In __btrfs_map_block() we do a int * int and assign it to u64.
This is not safe as the result (int * int) is still evaluated as (int)
thus it can overflow.
Convert one of the multiplier to u64 to prevent such problem.
In real world, this should not cause problem as we have device number
limit thus it won't go beyond 4G for a single stripe.
But it's harder to teach coverity about all these hidden limits, so just
fix the possible overflow.
Reported-by: Coverity CID 312957
Reported-by: Coverity CID 312948
Signed-off-by: Qu Wenruo <wqu@suse.com>
Pull request for UEFI sub-system for efi-2021-04-rc1-2
* Provide a test tool for initial RAM disk provided via load file2 protocol.
* Make more items configurable to reduce code size:
* Boot manager
* EFI_DT_FIXUP_PROTOCOL
* EFI_DEVICE_PATH_UTILITIES_PROTOCOL
* Bug fixes
* avoid EFI runtime symbols in global symbol table
CONFIG_SYS_REDUNDAND_ENVIRONMENT is changing in env_internal.h how u-boot
works with variables. struct environment_s has one byte flags property
which also affects ENV_SIZE macro.
I have reached the case where CONFIG_ENV_IS_NOWHERE is default setup
but custom scripts can be designed in a way that u-boot is asked to
import/export variables from/to file which can be in certain format.
That's why also for this configuration make sense to enable
CONFIG_SYS_REDUNDAND_ENVIRONMENT because it depends on environment file
format.
The patch is removing dependency on this configuration to support selecting
environment file format without any specific dependency where variables are
stored.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to define the same macros in drivers.
All macros have been added by commit 17a42abb40 ("mmc: Define timing
macro's").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
EFI applications must use CR LF as line endings.
Provide a print() function to reduce code size.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide an UEFI application to save the initial RAM disk provided by U-Boot
via the Load File2 protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. It was however required to run the UEFI Self Certification Test
(SCT) II, version 2.6, 2017. So we implemented it for the sole purpose of
running the SCT.
As the SCT does not need the protocol anymore it is time for removal.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Allow the EFI_DEVICE_PATH_UTILITIES_PROTOCOL to be disabled via
configuration.
On systems that are very tight on U-Boot image size we may want to disable
the protocol. As it is required to run the UEFI Shell enable it by default.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some boards are very tight on the binary size. Booting via UEFI is possible
without using the boot manager.
Provide a configuration option to make the boot manager available.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This reverts commit 1231184caa.
While the change is fine in theory, a number of tests need to be updated
to match.
Signed-off-by: Tom Rini <trini@konsulko.com>
Move all load options related functions to a new module. So that they can
be compiled independently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
dev_read_alias_seq() used uc_drv->name compared to alias
stem string, Ethernet's alias stem uses "ethernet", which
does not match the eth-uclass driver name "eth", can not
get the correct index of ethernet alias namer. So it seems
change uclass driver name to match the alias stem is a more
reasonable way.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A sporadic condition occurs when the "bad packet" error is triggered
repeatedly, which results in "bad packet" messages scrolling on the
console during transfer. To avoid triggering this, reset the internal
RXFC count on the first occurance of the "bad packet", which forces
the code to re-read the RX packet count from the MAC, and prevents
any additional "bad packet" messages if there are no more packets in
the MAC. Also print better debug information if this condition occurs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
When calling srand_mac we use a weak seed dependent on the
mac address. If present, use a RNG device instead to incerase entropy.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
When calculating a random UUID we use a weak seed.
Use a RNG device if present to increase entropy.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Fix typo which would cause a build error.
Fixes: 3eaac6307d ("net: introduce packet capture support")
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
When the tftp server did not send any OACK, the tftp_next_ack variable
was not set to the correct value . As the server was transmitting
blocks we generated a lot of 'Received unexpected block: $n, expected
$n+1' error messages. Depending on the timeout setting the transfer
could still complete though.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Ramon Fried <rfried.dev@gmail.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
While doing DHCP the interface IP is set to 0.0.0.0. This causes the
check in net.c on dst_ip to be effectively skipped, and all IP datagrams
are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the
matching MAC address (regardless of destination IP), the result is that
an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is
0.0.0.0, which is an illegal source address.
This can happen in common practice with the following sequence:
DHCP (U-Boot or OS) acquires IP address 10.0.0.1
System reboots
U-Boot starts DHCP and send DHCP DISCOVER
DHCP server decides to OFFER 10.0.0.1 again
(perhaps because of existing lease or manual configuration)
DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it
DHCP server still has our MAC address in its ARP table for 10.0.0.1
U-Boot receives PING, and responds with an illegal source address
This may further result in a the DHCP server seeing the response as
confirmation that someone is squatting on 10.0.0.1, and picking a
new IP address from the pool to try again
Signed-off-by: David Rivshin <drivshin@allworx.com>
Implement programming MAC address to the hardware also for device model
configuration.
Fixes: b565b18a29 ("board: ge: bx50v3: Enable DM for PCI and ethernet")
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Running the start() handler twice without a stop() inbetween completely
breaks communication for some ethernet drivers like fec_mxc.
eth_halt() is called before each eth_init(). Due to the switch to
eth_is_active() in commit 68acb51f44 ("net: Only call halt on a driver
that has been init'ed"), this is not sufficient anymore when netconsole
is active: eth_init_state_only()/eth_halt_state_only() manipulate the
state check that is performed by eth_is_active() without actually
calling into the driver.
The issue can be triggered by starting a network operation (e.g. ping or
tftp) while netconsole is active.
Add an additional "running" flag that reflects the actual state of the
driver and use it to ensure that eth_halt() actually stops the device as
it is supposed to.
Fixes: 68acb51f44 ("net: Only call halt on a driver that has been init'ed")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
The timer being used by this driver may have already been used by first
stage bootloader (e.g. ATF/preloader), and it's settings may differ from
what this driver is going to use.
This may cause issues, such as inaccurate timer frequency due to
incorrect clock divider.
This patch adds the initialization code to avoid them.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write()
and mw_eeprom_read() have incorrect loop conditions:
while (len <= 2) {
CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Avoid calling free(addr) twice if the device for ucode is not found.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Freeing a buffer before calling hang() is superfluous. Removing the call
reduces the SPL size.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Update branch and version information of ATF and DDR firmware files to
point to latest releases provided by NXP.
This is especially critical for imx8mp evk, as the ATF support for that
SoC is only available in latest releases.
Align all SoCs from imx8m family to use identical revisions of ATF and
DDR firmware.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Calling calloc() for 0 members does not make any sense.
Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally
unreasonable.
The current code will lead to a NULL dereference in bcm6348_iudma_enable().
The assignments for ch_priv->busy_desc are obviously swapped.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds basic register access and child regulator binding
for the Monolithic MP5416 Power Management IC which integrates
four DC/DC switching converters and five LDO regulators.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Add low level platform initialization for the AST2600 SoC.
The 2-stage booting with U-Boot SPL are leveraged to support
different booting mode.
However, currently the patch supports only the booting from
memory-mapped SPI flash.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
AST2600 is the 7th generation of Aspeed SoC designated for
Interated Remote Management Processor.
AST2600 has significant performance improvement by integrating
1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the
controllers are also improved with more features and better
performance than preceding AST24xx/AST25xx.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
AST2600 has 8 watchdog timers including 8 sets of
32-bit decrement counters, based on 1MHz clock.
A 64-bit reset mask is also supported to specify
which controllers should be reset by the WDT reset.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600.
The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb),
512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Set environment for Nand flash (U-boot 2020.04):
- add nand flash in the device tree
- add new default configuration file for G3 using parallel Nand
- set nand parameters in presidio_asic.h
Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Our kirkwood device embeds a USB host controller that is now used
on some boards. This enables the support of USB and the corresponding
driver.
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
The driver only needs to retrieve the pin for the ACPI info. The driver
itself works without depending on GPIO.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h by proxy. This file does not exist for the ARM
architecture and thus code compilation failed when using this
driver on ARM.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
QEMU.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
mkimage is only able to package aarch32 binaries. Add support for
AArch64 images.
One can create a ARM64 image using the following command line:
mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1"
-d bl2.bin bl2.img
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Enable USB gadget on pumpkin. This requires to also enable
BOARD_LATE_INIT since the init is done in board_late_init function.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
- Update qemu-riscv.rst build instructions.
- Add support for SPI on Kendryte K210.
- Add Microchip PolarFire SoC Icicle Kit support.
- Add support for an early timer.
- Select TIMER_EARLY to avoid infinite recursion for Trace.
Pull request for documentation tag doc-2021-04-rc1
* document man-page base command
* move README.fdt-overlays to HTML documentation
* add synopsis for pstore command
Remove the leading "0x" from rpc node to fix the below dtc warning:
Warning (simple_bus_reg): Node /soc/rpc@0xee200000 simple-bus unit
address format error, expected "ee200000"
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
By default on startup all the pin types are configured to
PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the
pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated
when the pin is set as a function in sh_pfc_pinctrl_pin_set() or
sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if
the pin type is PINMUX_TYPE_NONE ie unused).
So with the current implementation pin functionality could be overwritten
silently, for example if the same pin is added for SPI and serial.
This patch makes sure of updating pin type after every successful call to
sh_pfc_config_mux() and thus fixing from pin functionality to be
overwritten. Also a warning message is printed if the current pin is being
overwritten before abort.
This also avoids pin re-muxing to same type that is for example from
command line device is asked to re-probe/select (mmc dev x) we return
early with success in this case as the pin is already muxed.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
This patch adds Microchip MPFS Icicle Kit support. For now, only
NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers are
enabled. The Microchip MPFS Icicle defconfig by default builds
U-Boot for S-Mode because U-Boot on Microchip PolarFire SoC will run
in S-Mode as payload of HSS + OpenSBI.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Enable 32-bit or 64-bit DMA in the macb driver based on the macb
hardware compatibility and it is configured with structure macb_config
in the driver.
The Microchip PolarFire SoC Memory Protection Unit(MPU) gives the 64-bit
DMA access with the GEM, the MPU transactions on the AXI bus is 64-bit
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Added support for timer_early_get_count() and timer_early_get_rate()
This is mostly useful in tracing.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
When tracing functions is enabled this adds calls to
__cyg_profile_func_enter() and __cyg_profile_func_exit() to the traced
functions.
__cyg_profile_func_enter() and __cyg_profile_func_exit() invoke
timer_get_us() to record the entry and exit time.
initr_dm() will make gd->dm_root = NULL and gd->timer = NULL, so
timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an
indefinite recursion.
So select TIMER_EARLY when tracing got enabled.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This enables configs necessary for using SPI. The environment is saved to
the very end of SPI flash. This is unlikely to be overwritten unless the
entire flash is reprogrammed.
This also supplies a default bootcommand. It loads an image and device tree
from the first partition of the MMC. This is a minimal/least effort
bootcmd, so suggestions (especially in the form of patches) are welcome. I
didn't set up distro boot because I think it is unlikely that any
general-purpose linux distros will ever be ported to this board.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Chrstopher Obbard <obbardc@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
fit_print_contents prints similar fit information as printed in bootm stages.
Removing this API reduces redundancy & provides improvement in boottime.
Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change 2 typo error in CONFIG_LIB_ELF description:
- Supoort => Support
- fir => for
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide a unit test for printing via pr_err() and pr_cont().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
With commit d094a0734c ("log: allow for message continuation") we have
defined a special log level and category for message continuation. Let's
have a macro for using these.
If logging is enabled log_cont() will create a continuation log output with
the same logging level and category as the previous message.
If logging is not enabled, log_cont() will print like printf().
Provide macros for logging levels LOG_EMERG, LOG_ALERT, LOG_CRIT.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change debug_cond() such that it can be used instead of a function like
debug().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The macro BIT_MASK is already defined in include/linux/bitops.h. To avoid
name collisions rename BIT_MASK() in drivers/ram/k3-j721e/lpddr4_private.h
to LPDDR4_BIT_MASK().
Remove superfluous parantheses.
Remove superfluous comparison to 0.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
log.h and dm/devres.h are U-Boot includes. So placing them
behind #ifndef __UBOOT__ does not make any sense.
Fixes: f7ae49fc4f ("common: Drop log.h from common header")
Fixes: 61b29b8268 ("dm: core: Require users of devres to include the header")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building fails with DEBUG=1:
lib/aes.c: In function ‘debug_print_vector’:
lib/aes.c:622:45: error:
cast from pointer to integer of different size
[-Werror=pointer-to-int-cast]
622 | printf("%s [%d] @0x%08x", name, num_bytes, (u32)data);
Pointers can only be cast to (uintptr_t). But anyway we have
%p for printing pointers.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += xyzModem.o is there,
no need obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make it more obvious what .dts file was expected by the build system.
When adding support for a new board, I kept getting this error message,
assuming I passed a wrong DEVICE_TREE parameter.
However, what was really the mistake was that the entry in
`arch/arm/dts/Makefile` was missing, and u-boot didn't like not being
able to find the .dtb file that should have been produced.
Simply logging the expected .dtb file name should make it easier to spot
such mistakes.
Signed-off-by: Florian Klink <flokli@flokli.de>
When ESC/CTRL+C is pressed interrupt bootmenu and jump into U-Boot console.
As the last entry in bootmenu is always U-Boot console just choose the last
entry when ESC or CTRL+C is pressed.
ESC key is detected when either no other character appears after '\e'
within 10ms or when non-'[' appears after '\e'.
It is useful when bootmenu is part of boot process and you want to
interrupt boot process by scripts which control U-Boot (serial) console.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
A common use of memmove() can be handled by memcpy(). Also memcpy()
includes an optimization for large sizes: it copies a word at a time. So
we can get a speed-up by calling memcpy() to handle our move in this case.
Update memmove() to call also memcpy() if the source don't overlap
the destination (src + count <= dest).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
U-Boot DM model probe only single device at a time
which is enabled and configured using device tree
or platform data method.
PL011 UART IP is SBSA compliant and firmware does the
serial port set-up, initialization and let the kernel use
UART port for sending and receiving characters.
Normally software talk to one serial port time but some
LayerScape platform require all the UART devices enabled
in Linux for various use case.
Adding support to probe all enabled serial devices like SBSA
compliant PL011 UART ports probe and initialization by firmware.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Support a common method to probe all devices associated with uclass.
This includes data structures and code for finding the first device and
looping for remaining devices associated with uclasses (groups of devices
with the same purpose, e.g. all SERIAL ports will be in the same uclass).
An example is SBSA compliant PL011 UART IP, where firmware does the serial
port initialization and prepare uart device to let the kernel use it for
sending and reveiving the characters.SERIAL uclass will use this function
to initialize PL011 UART ports.
The feature is enabled with CONFIG_DM.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Remove the #if 0 present since the first version of console.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With our optimization settings the linker eliminates unused functions.
But for debugging it is better to compile with -Og or -O0. With -O0
compiling the sandbox fails due to the missing function fixup_cmdtable()
called by dm_reloc() and others.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the hash check fails on a loadable image, the SPL/TPL simply
jump to the next one. This commit changes this behaviour, when the
hash check fails on a loadable image, the function spl_load_simple_fit
stops and report an error.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There should be no need to insert non-printable characters
and this prevents line editing getting confused.
Signed-off-by: Steve Bennett <steveb@workware.net.au>
The previous patch made the table look bad. Fix it, and leave some
space for a future element being a bit longer than the current
maximum.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
When setting aside a GPT partition for holding the U-Boot environment,
having a partition type GUID [1] indicating "Linux filesystem" (as
most tools default to) is somewhat misleading - and there's no other
well-known type GUID that is better suited. So to have a canonical
value to put into the type field, define
3de21764-95bd-54bd-a5c3-4abe786f38a8
to mean a partition holding a U-Boot environment.
This is a v5 namespace-name GUID [2], generated [3] from a namespace
of "25cbcde0-8642-47c6-a298-1a3a57cd256b" and name "U-Boot
environment".
Should future type GUIDs be defined in the context of U-Boot, it's
sensible to use that same namespace GUID.
[1] https://en.wikipedia.org/wiki/GUID_Partition_Table#Partition_type_GUIDs
[2] https://en.wikipedia.org/wiki/Universally_unique_identifier#Versions_3_and_5_(namespace_name-based)
[3] https://www.uuidtools.com/v5
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
There's no reason to require an appropriately sized output parameter
for the string, that's error-prone should the table ever grow an
element with a longer string. We can just return the const char*
pointer directly.
Update the only caller accordingly, and get rid of pointless ifdeffery
in the header so that the compiler always sees a declaration and can
thus do type-checking, whether or not PARTITION_TYPE_GUID is enabled
or not.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
power/regulator will not be built if just CONFIG_SPL_DM_REGULATOR is
enabled. It needs CONFIG_SPL_POWER_SUPPORT to be enabled as well.
For example, if we just need a GPIO regulator in SPL:
CONFIG_DM_REGULATOR=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_DM_REGULATOR_GPIO=y
Will not suffice, since the entire regulator build for SPL depends on
CONFIG_SPL_POWER_SUPPORT. Elaborate that information in the Kconfig
dependency.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Align the prefix used in cmd_ut_category function and name of tests
for ut str.
This patch solves the issues detected by "make qcheck" after previous
patch.
Fixes: fdc79a6b12 ("lib: Add a function to convert a string to upper case")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Align the prefix used in cmd_ut_category function and name of tests
for ut mem.
This patch solves the issues detected by "make qcheck" after previous
patch.
Fixes: 550a9e7902 ("cmd: Update the memory-search command")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This test cannot work unless CONFIG_BLOBLIST is enabled. Update it to add
that condition.
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This tests assumes it is running on sandbox. Add a few functions to handle
silencing the console on any board and use those instead.
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add eMMC and GPT support.
- GPT partition list and command to create the GPT added to u-boot
environment
- eMMC boot commands added to u-boot environment
- new gpt commands (enumarate and setenv) that are used by broadcom
update scripts and boot commands
- eMMC specific u-boot configurations with environment saved in eMMC
and GPT support
Signed-off-by: Corneliu Doban <cdoban@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
[trini: Make gpt_setenv initialize ret to -1, given relevant return
error values]
Signed-off-by: Tom Rini <trini@konsulko.com>
During build of simple panel driver backlight is needed so let's enable
it:
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight':
u-boot/drivers/video/simple_panel.c:43: undefined reference to `backlight_set_brightness'
aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight':
u-boot/drivers/video/simple_panel.c:28: undefined reference to `backlight_enable'
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
The tests in test/lib/test_print.c fail without CONFIG_CONSOLE_RECORD=y.
Add a build dependency.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Add MBR partition layout writing supporting, clean up code.
- A large number of assorted console/iomux cleanups
- A large number of board_r related cleanups.
- Log enhancements
Two sibling headings can never be the same.
Fix the heading levels.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a 'mbr' command to let users create or verify MBR partition layout
based on the provided text description. The partition layout is
alternatively read from the 'mbr_parts' environment variable. This can be
used in scripts to help system image flashing tools to ensure proper
partition layout.
The syntax of the text description of the partition list is similar to
the one used by the 'gpt' command. Supported parameters are: name
(currently ignored), start (partition start offset in bytes), size (in
bytes or '-' to expand it to the whole free area), bootable (boolean
flag) and id (MBR partition type). If one wants to create more than 4
partitions, an 'Extended' primary partition (with 0x05 ID) has to be
explicitely provided as a one of the first 4 entries.
Here is an example how to create a 6 partitions (3 on the 'extended
volume'), some of the predefined sizes:
> setenv mbr_parts 'name=boot,start=4M,size=128M,bootable,id=0x0e;
name=rootfs,size=3072M,id=0x83;
name=system-data,size=512M,id=0x83;
name=[ext],size=-,id=0x05;
name=user,size=-,id=0x83;
name=modules,size=100M,id=0x83;
name=ramdisk,size=8M,id=0x83'
> mbr write mmc 0
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Add a code for creating and writing MBR partition layout. The code generates
similar layout of EBRs (Exteneded Block Records) and logical volumes as
Linux's fdisk utility.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Make functions not used outside this file static.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[trini: Use __maybe_unused as there are cases they may not be used]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add some handy defines for some hardcoded magic numbers related to
extended partition handling.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
write_mbr_partition() function name is a bit misleading, so rename it to
write_mbr_sector(). This is a preparation for adding code for writing a
complete MBR partition layout.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Obviously the following has unnecessary indentation level in 'else' branch.
if (foo) {
...
return;
} else {
...
}
Drop indentation level by removing redundant 'else'.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Refactor iomux_doenv() a bit in order to increase readability.
There is no change in code generation on x86.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's realloc() 101 to avoid `foo = realloc(foo, ...);` call
due to getting a memory leak.
Actually it's not clear why realloc() has been used here.
If we shrink the array, the memcpy() overwrites it anyway
with the contents of a new array. If it becomes bigger,
same story.
Drop useless realloc() for good and thus preserve console list
in case of failed allocation.
Fixes: 16a28ef219 ("IOMUX: Add console multiplexing support.")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
search_device() is defined in console.c. Move its declaration
to an appropriate header file.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no need to call ->start() for already started device. All the same,
there is no need to call ->stop() for devices still in use.
For now enforce this only for IOMUX case.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the future we would like to stop unused consoles and
also add a reference counting to avoid imbalanced calls
to ->start() and ->stop() in some cases.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the helper function console_has_tstc() and replace the test
#if CONFIG_IS_ENABLED(CONSOLE_MUX) to a simple 'if' test to
respect the U-Boot coding rule.
No functional change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add helper functions to access to gd->console_out and gd->console_in
with membuff API and replace the #ifdef CONFIG_CONSOLE_RECORD test
by if (IS_ENABLED(CONFIG_CONSOLE_RECORD)) to respect the U-Boot
coding rule.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a new function to access to console_devices only defined if
CONFIG_IS_ENABLED(CONSOLE_MUX).
This path allows to remove #if CONFIG_IS_ENABLED(CONSOLE_MUX)
in console_getc function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove #ifdef or #ifndef for CONFIG when it is possible to simplify
the console.c code and respect the U-Boot coding rules.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
spl_handoff should only be enabled when CONFIG_HANDOFF is set. Drop the
nested ifdefs and check for CONFIG_HANDOFF instead.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_HANDOFF is used in u-boot proper to locate handoff info from SPL
during pre-relocation init (in setup_spl_handoff). Add explicit dependency
on CONFIG_SPL, to fix the following build error when CONFIG_HANDOFF &&
!CONFIG_SPL:
common/board_f.c: In function ‘setup_spl_handoff’:
common/board_f.c:283:4: error: ‘gd_t {aka struct global_data}’
has no member named ‘spl_handoff’
gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
^~
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to remove the arch-specific ifdefs around initr_trap, introduce
arch_initr_trap weak initcall. Implementations for ppc/m68k/mips have
been moved to arch/<arch>/lib/traps.c
Default implementation is a nop stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add a return value to bb_miiphy_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to api_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to jumptable_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to xen_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to noncached_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to pci_init and use it directly in the post-relocation
init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to pci_ep_init and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to post_output_backlog and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a return value to cpu_secondary_init_r and use it directly in the
post-relocation init sequence, rather than using a wrapper stub.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop initr_console_record wrapper and call console_record_init directly.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use IS_ENABLED(CONFIG_OF_EMBED) in instead of #ifdefs in reserve_fdt,
reloc_fdt functions.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
setup_bdinfo is used to populate various bdinfo fields, so move
setup_machine code there, as all it does is setting
gd->bd->bi_arch_number.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use IS_ENABLED(CONFIG_TIMER_EARLY) instead of #ifdef in initf_dm. Also,
move timer code to the main ifdef, so that ret is defined.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop initf_console_record wrapper and call console_record_init directly.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, the following #ifdef construct is used to check whether to run
console_record_init() during pre-relocation init:
defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
Introduce CONFIG_CONSOLE_RECORD_INIT_F Kconfig option to get rid of the
complex ifdef check. Also, use IS_ENABLED() instead of #ifdef.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reduce the log overhead when the traces are filtered,
by moving the vsnprintf call from _log() to log_dispatch().
This patch avoids the printf treatment when LOG features is
activated, but trace is filtered, for example when
MAX_LOG_LEVEL=8 and LOG_DEFAULT_LEVEL=6.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a new test to check the content of the dropped messages
sent to console puts function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Allow to record the console output before before U-Boot
has a console ready.
This patch allows to test the console output in sandbox test
based on console record.
It is possible because GD_FLG_RECORD and GD_FLG_SERIAL_READY
are 2 independent flags.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reorder test on gd value and remove the duplicated test (!gd)
in putc and puts function.
This patch is a preliminary step for rework of this function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test for dropped trace before log_init, displayed by debug uart.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the console puts functions to output the traces before
the log initialization (when CONFIG_LOG is not activated).
This patch allows to display the first U-Boot traces
(with macro debug) when CONFIG_DEBUG_UART is activated
and not only drop them.
For example for traces in board_f.c requested by the macro debug,
when LOG_DEBUG is defined and CONFIG_LOG is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a new test to check the dropped messages when LOG is not ready
with log_drop_count and the result of _log().
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update _log function to drop any traces when log is yet initialized:
vsnprintf is no more executed in this case.
This patch allows to reduce the cost for the dropped early debug trace.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a check of the _log function with LOGL_FORCE_DEBUG flags,
used to force the trace display.
The trace should be displayed for all the level when flags
have LOGL_FORCE_DEBUG bit is set, for any filter.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Something was wrong in the merge process into the mainline.
Some added patches access driver structure fields and functions that
have been modified by previous patches.
The patch renames:
- dev_get_platdata to dev_get_plat
- dev_get_uclass_platdata to dev_get_uclass_plat
- ofdata_to_platdata to of_to_plat
- plat_data_alloc_size to plat_auto
- priv_auto_alloc_size to priv_auto
- video_uc_platdata to video_uc_plat
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The existing socfpgaimage always pads the image to the maximum size of
OCRAM size. This will break in the encryption flow where it expects the
image to be un-padded. The encryption tool will do the encryption for
the whole image and append the signature key at end of the image.
The signature key will append to beyond the size of OCRAM if the image
is padded with the maximum size before encryption.
Move the padding step from socfpgaimage to Makefile and pads with objcopy
command.
socfpgaimage will pad the image with 16 bytes aligned (including CRC word),
this is a requirement in encryption flow.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add CONFIG_SPL_PAD_TO for Gen5 and Arria 10. CONFIG_SPL_PAD_TO is set to
size of OCRAM.
This is preparation for image padding change in socfpgaimage.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Print image header information if the header is verified.
Example output from mkimage "-l" option:
$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type : Cyclone V / Arria V SoC Image
Validation word : 0x31305341
Version : 0x00000000
Flags : 0x00000000
Program length : 0x00003a59
Header checksum : 0x00000188
$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type : Arria 10 SoC Image
Validation word : 0x31305341
Version : 0x00000001
Flags : 0x00000000
Header length : 0x00000014
Program length : 0x000138e0
Program entry : 0x00000014
Header checksum : 0x00000237
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Booting Agilex and Stratix 10 with ATF support.
SPL now loads ATF (BL31), U-Boot proper and DTB from FIT
image. The new boot flow with ATF support is as follow:
SPL -> ATF (BL31) -> U-Boot proper -> OS (Linux)
U-Boot proper now starts at 0x200000 (CONFIG_SYS_TEXT_BASE).
ATF will occupy the address range starting from 0x1000.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Add binman node to device tree to generate the FIT image for u-boot
(u-boot.itb) and OS kernel (kernel.itb).
u-boot.itb contains arm trusted firmware (ATF), u-boot proper and
u-boot device tree for ATF u-boot flow.
kernel.itb contains Linux Image and Linux device tree.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
SPL already setup the Clock Manager with the handoff data
from OCRAM. When the Clock Manager's driver get probed again
in SSBL, it shall skip the handoff data access in OCRAM.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Since SSBL is running in DRAM, it shall setup the stack in DRAM
instead of OCRAM which is occupied by SPL and handoff data.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
In non-secure mode (EL2), FPGA reconfiguration driver calls the
SMC/PSCI services provided by ATF to configure the FPGA.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
In non-secure mode (EL2), Reset Manager driver calls the
SMC/PSCI service provided by ATF to enable/disable the
SOCFPGA bridges.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
In non-secure mode (EL2), MAC driver calls the SMC/PSCI services
provided by ATF to setup the PHY interface.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
In non-secure mode (EL2), MMC driver calls the SMC/PSCI services
provided by ATF to set SDMMC's DRVSEL and SMPLSEL.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change 'clksel' callback function to allow the code to return a
status.
This patch is a preparation for enabling Arm-Trusted-Firmware (ATF)
in Intel SoC FPGA. This patch does not change functionality.
When using Arm-Trusted-Firmware (ATF) in Intel SoC FPGA, the MMC clock
related register is secure register which is required to be written
via SMC/PCSI call. It is possible that U-Boot fail to write the
register if there is unexpected error between U-Boot and ATF.
As a result, there maybe signal integrity on MMC connection due to
clock. So, the code should reports error to user when 'clksel' fail.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
This header file defines the Secure Monitor Call (SMC) message
protocol for ATF (BL31) PSCI runtime services. It includes all
the PSCI SiP function identifiers for the secure runtime services
provided by ATF. The secure runtime services include System Manager's
registers access, 2nd phase bitstream FPGA reconfiguration, Remote
System Update (RSU) and etc.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
invoke_smc() allow U-Boot proper running in non-secure mode (EL2)
to invoke SMC call to ATF's PSCI runtime services such as
System Manager's registers access, 2nd phase bitstream FPGA
reconfiguration, Remote System Update (RSU) and etc.
smc_send_mailbox() is a send mailbox command helper function which invokes
the ATF's PSCI runtime service (function ID: INTEL_SIP_SMC_MBOX_SEND_CMD)
to send mailbox messages to Secure Device Manager (SDM).
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Standard PSCI function "CPU_ON" provided by ATF is now used
by Linux kernel to bring up the secondary CPUs to enable SMP
booting in Linux on SoC 64bits platform.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Override 'lowlevel_init' to make sure secondary CPUs trapped
in ATF instead of SPL. After ATF is initialized, it will signal
the secondary CPUs to jump from SPL to ATF waiting to be 'activated'
by Linux OS via PSCI call.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Instead of loading u-boot proper image (u-boot.img), SPL
now loads FIT image (u-boot.itb) which includes u-boot
proper, ATF and u-boot proper's DTB.
For OS, u-boot now loads FIT images (kernel.itb) which
includes Linux Image and Linux's DTB.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Add board_fit_config_name_match() for matching board name with
device tree files in FIT image. This will ensure correct DTB
file is loaded for different board type. Currently, we are not
supporting multiple device tree files in FIT image therefore this
function basically do nothing for now.
Users are allowed to override this 'weak' function in their
specific board implementation.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Pull request for UEFI sub-system for efi-2021-04-rc1
In the UEFI sub-system:
* implement non-blocking file services
* print boot device and file path in helloworld.efi
* improve detection of boot device
* correct argument handling in efivar.py
* implement EFI_DT_FIXUP_PROTOCOL
Bug fixes:
* adjust conitrace command for low baud rates
* check that FIT images are valid FDTs
- Enable logging features for stm32mp15 boards
- Update MAINTAINERS emails for STI and STM32
- Activate OF_LIVE for ST stm32mp15 boards
- Switch to MCO2 for PHY 50 MHz clock for DHCOM boards
- Correction in stm32prog command on uart: always flush DFU on start command
- Update USB-C power detection algorithm on DK boards
- sync amlogic GX & AXG DT to Linux 5.10
- Add new MESON_EE driver support for GXBB & AXG
- Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards
- add driver for TDO tl070wsh30 panel driver
- meson: isolate loading of socinfo
- Add soc_rev to environment
- Enable G12A support for saradc
- Add correct mmcdev on VIM3(L) & Odroid-N2(C4)
- Read MAC from fuses for VIM3 & VIM3L boards
A previous series already update STMicroelectronics emails maintainers
but some files have been omitted (Makefile, .dts, .dtsi and .rst files).
Update Patrick and my email address with the one dedicated to upstream
activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Remove the test on data->dfu_seq, because dfu_seq=0 not only when
the DFU is not started (mask with 0xffff). This flush is mandatory
as the final treatment, common with USB, is done in DFU callback.
This patch avoids issue if the received length is a multiple of
the DFU packet.
For example if size of bootfs partition is egual to 0x4000000,
data->dfu_seq=0 at the end of the partition, the flush it not
requested and the phase is not increased in the callback.
U-Boot continue to request the bootfs in the next GetPhase command.
Fixes: 468f0508b5 ("stm32mp: stm32prog: add serial link support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Activate the live DT to reduce the DT parsing time.
For example the boot time is reduced by 200ms on STM32MP157C-EV1 board
for stm32mp15_basic_defconfig (boot with SPL) or
stm32mp15_trusted_defconfig (boot with TF-A).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The LAN8710i PHY currently uses 50 MHz clock direct from PLL4P.
To permit PLL4P to run at faster frequency, use MCO2 as a divider.
The PLL4P runs at 100 MHz, supplies MCO2 which divides it by 2 to
50MHz, and supplies the PHY with 50 MHz via pin PG2. The feedback
clock are fed back in via pin PA1.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ia9bf7119785d49b633a3ae761c3dc4a30b92628a
There shouldn't be a need to use loadables propertyn because u-boot can be
pointed by firmware property. This change should also speedup boot process
because loadables property is list of strings which code is going through.
On the other hand firmware can just point to one image.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
USB-C power supply which are Power Delivery compliant (USB-PD) are able
to provide different voltage/current (for example 5V/3A 9V/3A 12V/2.25A...)
In this case, the power supply need to negotiate the voltage/current to
use with the device using CC1/CC2 USB-C signals.
If this negotiation occurs during ADC measurement (done also on CC1/CC2
USB-C signals) some ADC acquisition can be corrupted which cause wrong
power supply current detection.
To avoid this, the power supply current detection algorithm is updated
as following:
- perform an ADC measurement, if a 3A current is detected, continue the
boot process.
- else, wait 20ms (max tPDDebounce duration) to ensure that USB-PD
negotiation is done and perform another ADC measurement.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate the logging features in SPL and U-Boot
(CONFIG_LOG and CONFIG_SPL_LOG) and the command 'log' with
CONFIG_CMD_LOG.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug/pr_* to log_* or dev_* macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug/pr_debug to log_debug or dev_dbg macro and
define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change pr_debug to log_debug or dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug and pr_ macro to dev macro and define LOG_CATEGORY.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, use dev_ macro when it is possible.
Remove the "%s:" __func__ header as it is managed by dev macro
(dev->name is displayed) or log macro (CONFIG_LOGF_FUNC).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, use dev_ macro when it is possible
and migrate other trace to log_ macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, change debug to dev_dbg and remove "%s:" __func__
header as it is managed by dev macro (dev->name is displayed)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY and remove unneeded pr_fmt macro with the dev
macro as dev->name is displayed and CONFIG_LOGF_FUNC can be
activated for log macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to dev_dbg macro and define LOG_CATEGORY.
Remove dev->name as it is already displayed by dev macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Change debug to log macro and define LOG_CATEGORY.
Remove "%s:" with __func__ as it is managed by log macro
(CONFIG_LOGF_FUNC)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Define LOG_CATEGORY, change pr_debug to dev_dbg and remove "bsec:"
header as it is managed by log macro (dev->name is displayed)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The dtbdump.efi binary can already be used to dump the configuration table
with the device-tree to a file.
With this patch a device-tree file can be loaded. The EFI_DT_FIXUP_PROTOCOL
is called to
* apply U-Boot's fix-ups
* let U-Boot make memory reservations as required by the device-tree
* install the new device-tree as configuration table
In a next step this configuration table can be dumped.
A dtbdump.efi session would look like:
DTB Dump
========
=> load test.dtb
device-tree installed
=> save fixed-up.dtb
fixed-up.dtb written
=> exit
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A boot manager like GRUB can use the protocol to
* apply U-Boot's fix-ups to the a device-tree
* let U-Boot make memory reservations according to the device-tree
* install the device-tree as a configuration table
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At 9600 baud or less a 1 ms wait is too short to detect the end of an
escape sequence.
Increase the wait duration to 10 ms which will work down to 1200 baud.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In efi_mem_sort() adjacent memory regions of same type are coalesced.
Remove the remark "Merging of adjacent free regions is missing".
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We do not want to use typedefs in U-Boot.
Do not use efi_string_t in the EFI_TEXT_OUTPUT_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now the bootefi command used the last file loaded to determine the
boot partition. This has led to errors when the fdt had been loaded from
another partition after the EFI binary.
Before setting the boot device from a loaded file check if it is a PE-COFF
image or a FIT image.
For a PE-COFF image remember address and size, boot device and path.
For a FIT image remember boot device and path.
If the PE-COFF image is overwritten by loading another file, forget it.
Do not allow to start an image via bootefi which is not the last loaded
PE-COFF image.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
fit_check_format() must check that the buffer contains a flattened device
tree before calling any device tree library functions.
Failure to do may cause segmentation faults.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Let helloworld.efi print the device path of the boot device and the file
path as provided by the loaded image protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently when executing 'bootefi hello' we copy helloworld.efi to the
address identified by environment variable loadaddr. This is unexected
behavior for a user. There is no need to copy helloworld.efi before
executing it after relocation.
Remove the copy action.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When deleting a variable we must check that the GUID provided by the
user matches the GUID of the variable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
When tools: efivar.py is called without arguments an error occurs:
Traceback (most recent call last):
File "tools/efivar.py", line 380, in <module>
main()
File "tools/efivar.py", line 360, in main
args.func(args)
AttributeError: 'Namespace' object has no attribute 'func'
Show the online help if the arguments do not specify a function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
- DM support for OMAP PWM backlight
- USB host mode support for AM654
- Minor SPI fixes
- Add support k2g ice board with 1GHz silicon
- Fix GTC programming for K3 devices
First set of u-boot-atmel features for 2021.04 cycle
This feature set includes the new board SAMA7G5 EK, the new evaluation
kit for Microchip AT91 SAMA7G5 SoC . The current board support includes
two configurations for booting from eMMC (SDMMC0), SD-Card (SDMMC1), and
support for two Ethernet interfaces.
Fix reading built-in ethernet MAC address from efuse
NOTE: MAC is stored in ASCII format, 1bytes = 2characters by 0 offset
if mac from efuse not valid we use meson_generate_serial_ethaddr
NOTE: remake odroid-n2.c from Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Artem Lapkin <art@khadas.com>
[narmstrong: remove MAC print & spurious new endline]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
ARMv8's generic timer[1] picks up it's graycode from GTC. However,
the frequency of the GTC is supposed to be programmed in CNTFID0[2]
register prior to enabling the GTC in CNTCR[3] register.
In K3 architecture, GTC provides a central time to many parts of the
SoC including graycode to the generic timer in the ARMv8 subsystem.
However, due to the central nature and the need to enable the counter
early in the boot process, the R5 based u-boot enables GTC and
programs it's frequency based on central needs of the system. This
may not be a constant 200MHz based on the system. The bootloader is
supposed to program the FID0 register with the correct frequency it
has sourced for GTC from the central system controller OR from PLLs
as appropriate, and TF-A is supposed[4] to use that as the frequency for
it's local timer.
Currently we are programming just the CNTCR[3] register to enable the
GTC, however we dont let TF-A know the frequency that GTC is actually
running at. A mismatch in programmed frequency and what we program for
generic timer will, as we can imagine, all kind of weird mayhem.
So, program the CNTFID0 register with the clock frequency. Note:
assigned-clock-rates should have set the clock frequency, so the only
operation we need to explicitly do is to retrieve the frequency and
program it in FID0 register.
Since the valid in K3 for GTC clock frequencies are < U32_MAX, we can
just cast the ulong and continue.
[1] https://developer.arm.com/documentation/100095/0002/generic-timer/generic-timer-register-summary/aarch64-generic-timer-register-summary
[2] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntfid0
[3] https://developer.arm.com/docs/ddi0595/h/external-system-registers/cntcr
[4] 6a22d9ea3c
Signed-off-by: Nishanth Menon <nm@ti.com>
This patch adds a new test which checks that U-Boot for Nokia RX-51 running
in qemu can print test line to serial console and also checks that test
line appeared on qemu serial console.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Those two commands now doing same thing, reading from ext2/3/4 filesystem.
So remove useless duplicated call.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
With support for other clock drivers, the potentially supported CDCE913
device can no longer be probed without specifying its DT node name.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The schedule for deprecating the features of the pre-driver-model puts
2019.17 as the deadline for the video subsystem. Furthermore, the latest
patches applied to the am335x-fb.c module have decreased the amount of
code shared with the pre-driver-model implementation. Splitting the two
implementations into two modules improves the readability of the code
and will make it easier to drop the pre-driver-model code.
I have not created a header file with the data structures and the
constants for accessing the LCD controller registers, but I preferred to
keep them inside the two c modules. This is a code replication until the
pre-driver-model version is dropped.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The patch configures the display DPLL using the functions provided by
the driver model API for the clock. The device tree contains everything
needed to get the DPLL clock. The round rate function developed for
calculating the DPLL multiplier and divisor and the platform routines
for accessing the DPLL registers are removed from the LCD driver code
because they are implemented inside the DPLL clock driver.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Enabling the domain clock is performed by the sysc interconnect target
module driver during the video device probing.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The previous version of am335x-fb.c contained the functionalities of two
drivers that this patch has split. It was a video type driver that used
the same registration compatible string that now registers a panel type
driver. The proof of this is that two compatible strings were referred
to within the same driver.
There are now two drivers, each with its own compatible string,
functions and API.
Furthermore, the panel driver, in addition to decoding the display
timings, is now also able to manage the backlight.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch adds a function to get display timings from the device tree
node attached to the device.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The TI PWMSS driver is a simple bus driver for providing clock and power
management for the PWM peripherals on TI AM33xx SoCs, namely eCAP,
eHRPWM and eQEP.
For DT binding details see Linux doc:
- Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Enhanced high resolution PWM module (EHRPWM) hardware can be used to
generate PWM output over 2 channels. This commit adds PWM driver support
for EHRPWM device present on AM33XX SOC.
The code is based on the drivers/pwm/pwm-tiehrpwm.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The prescaler (PTV) setting must be taken into account even when the
timer input clock frequency has been set.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The __of_translate_address routine translates an address from the
device tree into a CPU physical address. A note in the description of
the routine explains that the crossing of any level with
since inherited from IBM. This does not happen for Texas Instruments, or
at least for the beaglebone device tree. Without this patch, in fact,
the translation into physical addresses of the registers contained in the
am33xx-clocks.dtsi nodes would not be possible. They all have a parent
with #size-cells = <0>.
The CONFIG_OF_TRANSLATE_ZERO_SIZE_CELLS symbol makes translation
possible even in the case of crossing levels with #size-cells = <0>.
The patch acts conservatively on address translation, except for
removing a check within the of_translate_one function in the
drivers/core/of_addr.c file:
+
ranges = of_get_property(parent, rprop, &rlen);
- if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
- debug("no ranges; cannot translate\n");
- return 1;
- }
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
debug("empty ranges; 1:1 translation\n");
There are two reasons:
1 The function of_empty_ranges_quirk always returns false, invalidating
the following if statement in case of null ranges. Therefore one of
the two checks is useless.
2 The implementation of the of_translate_one function found in the
common/fdt_support.c file has removed this check while keeping the one
about the 1:1 translation.
The patch adds a test and modifies a check for the correctness of an
address in the case of enabling translation also for zero size cells.
The added test checks translations of addresses generated by nodes of
a device tree similar to those you can find in the files am33xx.dtsi
and am33xx-clocks.dtsi for which the patch was created.
The patch was also tested on a beaglebone black board. The addresses
generated for the registers of the loaded drivers are those specified
by the AM335x reference manual.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch moves the clk-ti-sci.c file to the 'ti' directory along with
all the other TI's drivers, and renames it clk-sci.c.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
This minimal driver is only used to bind child devices.
For DT binding details see Linux doc:
- Documentation/devicetree/bindings/arm/omap/prcm.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Until now the clkctrl clocks have been enabled/disabled through platform
routines. Thanks to this patch they can be enabled and configured directly
by the probed devices that need to use them.
For DT binding details see Linux doc:
- Documentation/devicetree/bindings/clock/ti-clkctrl.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Up till this commit passing NULL as input parameter was allowed, but not
handled properly. When a NULL parameter was passed to the function a data
abort was raised.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch adds support for TI gate clock binding. The code is based on
the drivers/clk/ti/gate.c driver of the Linux kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/gate.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The patch adds support for TI divider clock binding. The driver uses
routines provided by the common clock framework (ccf).
The code is based on the drivers/clk/ti/divider.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/divider.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The digital phase-locked loop (DPLL) provides all interface clocks and
functional clocks to the processor of the AM33xx device. The AM33xx
device integrates five different DPLLs:
* Core DPLL
* Per DPLL
* LCD DPLL
* DDR DPLL
* MPU DPLL
The patch adds support for the compatible strings:
* "ti,am3-dpll-core-clock"
* "ti,am3-dpll-no-gate-clock"
* "ti,am3-dpll-no-gate-j-type-clock"
* "ti,am3-dpll-x2-clock"
The code is loosely based on the drivers/clk/ti/dpll.c drivers of the
Linux kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/dpll.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The driver manages a register-mapped multiplexer with multiple input
clock signals or parents, one of which can be selected as output. It
uses routines provided by the common clock framework (ccf).
The code is based on the drivers/clk/ti/mux.c driver of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/clock/ti/mux.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
It returns the rate which will be set if you ask clk_set_rate() to set
that rate. It provides a way to query exactly what rate you'll get if
you call clk_set_rate() with that same argument.
So essentially, clk_round_rate() and clk_set_rate() are equivalent
except the former does not modify the clock hardware in any way.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
There have been several changes to the am33xx.dtsi, so this patch
re-syncs it with Linux.
Let's add proper interconnect hierarchy for l4 interconnect instances
with the related ti-sysc interconnect module data as documented in
Documentation/devicetree/bindings/bus/ti-sysc.txt of the Linux kernel.
With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to their
proper location and enable probing using ti-sysc.
The am33xx-clock.dtsi file is the same as that of the Linux kernel,
except for the reg property of the node l4-wkup-clkctrl@0.
As for the am33xx.dtsi file, all the devices with drivers not yet
implemented and those I was able to test with this patch have been moved
to am33xx-l4.dtsi. In case of any regressions, problem devices can be
reverted by moving them back and removing the related interconnect
target module node.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
We can handle the sysc interconnect target module in a generic way for
many TI SoCs. Initially let's just enable domain clocks before the
children are probed.
The code is loosely based on the drivers/bus/ti-sysc.c of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/bus/ti-sysc.txt
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Add support for PRUSS SYSC type:
The PRUSS module has a SYSCFG which is unique. The SYSCFG has two
additional unique fields called STANDBY_INIT and SUB_MWAIT in addition
to regular IDLE_MODE and STANDBY_MODE fields. Add the bindings for this
new sysc type.
Add support for MCAN on dra76x:
The dra76x MCAN generic interconnect module has a its own format for the
bits in the control registers.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Export routines that can be used by other drivers avoiding duplicating
code.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
As more and more LINUX drivers are modified to use asynchronous probing
instead of synchronous probing, relying on device names being equal in
U-Boot and LINUX is not possible anymore. This is also true for block
device names like mmc0, mmc1 ect.
With LINUX kernel commit a1a4891 the probing type for the sdhci-omap
driver has been set to asynchronous mode too (probe_type is now
PROBE_PREFER_ASYNCHRONOUS).
In the case of the PDU001 board this results in the devices mmc0 and
mmc1 being swapped between U-Boot and LINUX. Device mmc0 in U-Boot
becomes mmc1 in LINUX an vice versa. Hence using device name identifiers
with LINUX kernel parameter root does not work anymore.
This patch changes the LINUX kernel boot parameter root to use the
pseudo (since we use MBR not GPT) partition UUID to locate the partition
hosting the root file system.
Signed-off-by: Felix Brack <fb@ltec.ch>
Update the ddr settings to use the DDR reg config tool rev 0.5.0.
This enables 4266MTs DDR configuration.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
McSPI IP provides per CS specific speed and mode selection. Therefore it
is possible to apply these settings only after CS is known. But
set_speed and set_mode can be called without bus being claimed, this
would lead driver to set up wrong CS (or previously used CS).
Fix this by apply set_speed and set_mode only if bus is already claimed.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
struct ti_qspi_priv->max_hz is declared as unsigned int, so the following
error path check will always be false, even when "spi-max-frequency"
property is invalid/missing:
priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1);
if (priv->max_hz < 0) {
...
}
Replace the fdtdec call with dev_read_u32_default() and use 0 as the
default value. Error out if max_hz is zero.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
The value of input pin for bank > 0 is always 0 for input subcommand.
The reason is that gpio_bank variable is computed only for invert and
output subcommands (it depends on number of arguments). The default
value of zero causes to shift the mask away for banks > 0.
Please note that info subcommand works as expected, because the input
pin values are accessed differently.
Fixes: 61c1775f16 ("gpio: tca642x: Add the tca642x gpio expander driver")
Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tomas Novotny <tomas@novotny.cz>
In include/dfu.h, if CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then it is
defined as CONFIG_SYS_DFU_DATA_BUF_SIZE. This is 128 KiB for a53 core and
20 KiB for r5 core. If a larger file is transferred using dfu then it
fails.
CONFIG_SYS_DFU_DATA_BUF_SIZE can not be increased as there is not enough
heap memory to be allocated for the buffer in case of R5 spl.
Fix this by defining CONFIG_SYS_DFU_MAX_FILE_SIZE as the default
CONFIG_SYS_DFU_DATA_BUF_SIZE value.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The sequence number assigned for USB subsystem in a uclass is dependent on
the order of occurrence in the device tree. If the dr_mode of USB3SS0
controller is varied then the sequence number of USB3SS1 controller also
changes. If aliases are added then sequence numbers are assigned using the
alias number. This makes the sequence number of USB3SS1 controller
independent of USB3SS0 controller's dr_mode.
Therefore, add aliases to fix the sequence number assigned to the USB
subsystems.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
It has been observed that setting SERDES0 lane mux to USB prevents USB 2.0
operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is used in
USB 2.0 only mode solves this issue. However, for USB3.0+2.0 operation this
issue is not present.
Implement this workaround by writing 1 to LANE_FUNC_SEL field in
CTRLMMR_SERDES0_CTRL register.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
- Pinecube board support
- 64-bit FEL support
- mkimage support for eGON images (superseding mksunxiboot)
- Bluetooth BD address generation
- some fixes
Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3,
ship with the controller default address.
Add a config option to fix it up so it can function properly.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Ondrej Jirman <megous@megous.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
[rebased]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It turns out that in rare cases, current analytical approach to detect
correct DRAM bus width and rank on H6 doesn't work. On some TV boxes
with DDR3, incorrect DRAM configuration triggers write leveling error
which immediately stops initialization process. Exact reason why this
error appears isn't known. However, if correct configuration is used,
initalization works without problem.
In order to fix this issue, simply try another configuration when any
kind of error appears during initialization, not just those related to
rank and bus width.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Tested-by: Thomas Graichen <thomas.graichen@googlemail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
For the sake of consistency (*) and order of initialization, i.e.
after we have got the ethernet address, interrupt and timer initialized,
try to initialize USB ethernet gadget.
*) for example, zynqmp uses same order.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
So far we did not support the BootROM based FEL USB debug mode on the
64-bit builds for Allwinner SoCs: The BootROM is using AArch32, but the
SPL runs in AArch64.
Returning back to AArch32 was not working as expected, since the RMR
reset into 32-bit mode always starts execution in the BootROM, but not
in the FEL routine.
After some debug and research and with help via IRC, the CPU hotplug
mechanism emerged as a solution: If a certain R_CPUCFG register contains
some magic, the BootROM will immediately branch to an address stored in
some other register. This works well for our purposes.
Enable the FEL feature by providing early AArch32 code to first save the
FEL state, *before* initially entering AArch64.
If we eventually determine that we should return to FEL, we reset back
into AArch32, and use the CPU hotplug mechanism to run some small
AArch32 code snippet that restores the initially saved FEL state.
That allows the normal AArch64 SPL build to be loaded via the sunxi-fel
tool, with it returning into FEL mode, so that other payloads can be
transferred via FEL as well.
Tested on A64, H5 and H6.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Priit Laes <plaes@plaes.org> (on Olimex A64-Olinuxino)
The is_boot0_magic macro is missing parentheses around the macro
argument, breaking any usage with a more complex argument.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Switch the SPL boot image generation from using mksunxiboot to the new
sunxi_egon format of mkimage.
Verified to create identical results for all 152 Allwinner boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Samuel Holland <samuel@sholland.org>
So far we used the separate mksunxiboot tool for generating a bootable
image for Allwinner SPLs, probably just for historical reasons.
Use the mkimage framework to generate a so called eGON image the
Allwinner BROM expects.
The new image type is called "sunxi_egon", to differentiate it
from the (still to be implemented) secure boot TOC0 image.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
To be able to easily share the Allwinner eGON BROM header structure
between the tools and the SPL code, move the struct definition into a
separate header file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
PineCube is an IP camera development kit released by Pine64.
It comes with the following compoents:
- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
Ethernet port and FPC connectors for camera and daughter board.
- An OV5640-based camera module which is connected to the parallel CSI
bus of the mainboard.
- A daughterboard with several buttons, a SD slot, some IR LEDs, a
microphone and a speaker connector.
As the device tree is synchronized in a previous commit, just add it to
Makefile, create a new MAINTAINER item and provide a defconfig.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Detect eMMC or SD card boot on Odroid-C4/N2 and Khadas VIM3(l) boards and
report proper MMC device for the environment loading code. This allows to
automatically load and store environment variables on the FAT partition
or RAW offset of the MMC device without the need to use different
configurations on eMMC and SD card.
To use this feature with environment stored on FAT partition, one has to
specify an empty device part (i.e. ":1" for the first partition) in
CONFIG_ENV_FAT_DEVICE_AND_PART to let the code to set the device to the
value returned by mmc_get_env_dev() function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a defconfig for the Beelink GT-King Pro Android STB, which is based
on the Amlogic W400 reference design.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a defconfig for the Beelink GT-King Android STB, which is based
on the Amlogic W400 reference design.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Import the Beelink GT-King/Pro and supporting meson-g12b-w400.dtsi file
from Linux 5.10.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Analog to Digital Converter device (Meson SARADC) will be used for
probing 'Function' button state.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[narmstrong: also updated khadas-vim3l_defconfig]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The driver skips hardware initialization if it is already configured by
the earlier bootloader stage (BL30). Skip the initialization only if the
hardware is really initialized and enabled.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Update the device matrix and add build instructions.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2.rst to q200 MAINTAINERS and added blank lines to fix build]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add a config for the WeTek Core2, largely based on the VIM2 config.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: added wetek-core2_defconfig to q200 MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Import the WeTek Core2 and supporting meson-gx-p23x-q20x.dtsi files
from Linux 5.10.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for the Amlogic based libretech cc version 2.
As version 1, it is based on the s905x SoC.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: Fixed libretech-cc.rst bullet points]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Sync the libretech cc v2 device tree from Linux v5.10-rc1
commit 3650b228f83a ("Linux 5.10-rc1")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds support for the TDO TL070WSH30 TFT-LCD panel module.
The panel has a 1024×600 resolution and uses 24 bit RGB per pixel.
It provides a MIPI DSI interface to the host, a built-in LED backlight
and touch controller.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Linux 5.10-rc1 uses the new generic driver, so switch to it since GXBB and
later is now supported.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
SPI. Two last ones are necessary for booting the device. The GPIO support
allows deciding which medium will be used. For example the GPIO DTS node
(gpio@0 at imx28.dtsi) has pinctrl parent (pinctrl@80018000) for which we
don't need driver asigned for correct operation.
In the spl/dts/dt-platdata.c the gpio@0 has index 4 and its parent -
pinctrl@80018000 has index 5.
In the bind_drivers_pass() function (at drivers/core/lists.c) call to
device_bind_by_name() for `fsl_imx23_pinctrl` returns -2, which is
expected.
With current setup - when the SPL_OF_PLATDATA_PARENT=y
The gpio@0 node with index 4 is skipped as its parent with 5 is not yet
bound. It cannot be as we don't need and provide the driver for it.
As a result the gpio@0 is never bound and we end up with bricked board in
the SPL stage.
When CONFIG_SPL_OF_PLATDATA_PARENT is NOT set, all entries from
spl/dts/dt-platdata.c are scanned in ascending index order, so gpio@0 is
properly initialized. For `fsl_imx_pinctrl` we simply check 10 times if
the driver for is available (which is not) and exit.
As a result the GPIOs are initialized and can be used in early SPL stage.
This commit fixes XEA regression introduced with e41651fffd.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The usage of the preboot feature is now controlled via a separate Kconfig
option - namely CONFIG_USE_PREBOOT.
It must be enabled for preboot code executing commands now defined in
CONFIG_PREBOOT (also moved to the Kconfig).
After defining both CONFIG_USE_PREBOOT and CONFIG_PREBOOT in
imx28_xea_defconfig the define of CONFIG_PREBOOT shall be removed from
xea.h as it is redundant.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
On the imx287 pin GPMI_WRN (GPIO0_25) no PullUP is available that can be
enabled.
To get the same behavior for both boot select pins (i.e. GPIO0_2{35})
disable pull UPs on both.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Obtain two MAC addresses from the two EEPROMs and configure the two
available Ethernet interfaces accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add node for flx1 i2c1 subnode (and alias to bus 0)
This bus has two eeprom devices connected.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add new config for storing environment from sdmmc0.
Also clean-up sama7g5ek_emmc1 to point to the proper mmc device.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Clean-up boot command to use the predefined device and part for FAT
environment.
According to this device and partition, select the proper boot media.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Enable sdmmc0 on this board. A non-removable eMMC is connected on this
block.
Configure pincontrol accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SDMMC1 requires clock specification with assigned-clocks, such that
the PMC will know which parent to assign and the initial start-up frequency.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Get rid of software defined MCK and switch to PMC bindings
for IPs currently present in device tree.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
As highlighted by Stefan in the commit e074d0f79b ("arm: at91:
gardena-smart-gateway-at91sam: Enable CONFIG_SYS_NAND_USE_FLASH_BBT")
it's important to use BBT when Linux enables it. We use it for a long
time on all our boards.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
Xilinx changes for v2021.04
arm64:
- DT updates
microblaze:
- Add support for NOR device support
spi:
- Fix unaligned data write issue
nand:
- Minor code change
xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards
video:
- Add support for seps525 spi display
tools:
- Minor Vitis file support
cmd/common
- Minor code indentation fixes
serial:
- Uartlite debug uart initialization fix
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
Some of these tests don't actually check anything. Add a few more checks
to complete the tests.
Also add a simple scan test that does the basics.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the tests related to scanning into their own class, updating them
to avoid using dtb_platdata as a pass-through.
Signed-off-by: Simon Glass <sjg@chromium.org>
Before expanding the scanning features any more, move this into a separate
file. This will make it easier to maintain in the future. In particular,
it reduces the size of dtb_platdata.py and allows us to add tests
specifically for scanning, without going through that file.
The pieces moved are the Driver class, the scanning code and the various
naming functions, since they mostly depend on the scanning results.
So far there is are no separate tests for src_scan. These will be added
as new functionality appears.
This introduces no functional change.
Signed-off-by: Simon Glass <sjg@chromium.org>
This has not been needed since parent information was added and we started
using indicies for references to other drivers instead of pointers. It was
kept around in the expectation that it might be needed later.
However with the latest updates, it doesn't seem likely that we'll need
this in the foreseeable future.
Drop dm_populate_phandle_data() from dtoc and driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Previously we had to worry about nodes being output before those that they
depended on, thus causing build errors. So the current algorithm is
careful to output nodes in the right order.
We now use a different method for outputting phandles that does not
involve pointers. Also we plan to add a 'declarations' header file to
declare all drivers as 'extern'.
Update the code to drop the dependency checking and output in a simple
loop. This makes the output easier to follow since drivers are in order of
thier indices (0, 1, ...), which is also the order it appears in in the
linker list.
Signed-off-by: Simon Glass <sjg@chromium.org>
The base directory of U-Boot, where the source is, it currently calculated
from the directory of the dtb_platdata.py script. If this is installed
elsewhere that will not work. Also it is inconvenient for tests.
Add a parameter to allow specifying this base directory.
To test this, pass a temporary directory with some files in it and check
that they are passed to scan_driver().
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than the if/else construct, update OutputFile with the method to
call to process each command. This is easier to maintain as the number of
commands increases.
Rename generate_tables to generate_plat since it better describes what is
being generated ('plat' is the U-Boot name for platform data).
With this, each output method needs to have the same signature. Store the
output structures in a member variable instead of using parameters, to
accomplish this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use this new name to be consistent with the rest of U-Boot, which talks
about 'plat' for the platform data, which is what this file holds.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is currently fairly obvious what the two generated files are for, but
this will change as more are added. It is helpful for readers to describe
the purpose of each file.
Add a header commment field to OutputFile and use it to generate a comment
at the top of each file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the standard function for running tests and reported results. This
allows the tests to run in parallel, which is a significant speed-up on
most machines (e.g. 4.5 seconds -> 1.5s on mine).
Signed-off-by: Simon Glass <sjg@chromium.org>
This gives a warning in some situations:
File "tools/dtoc/../concurrencytest/concurrencytest.py", line 95,
in do_fork
stream = os.fdopen(c2pread, 'rb', 1)
File "/usr/lib/python3.8/os.py", line 1023, in fdopen
return io.open(fd, *args, **kwargs)
RuntimeWarning: line buffering (buffering=1) isn't supported in binary
mode, the default buffer size will be used
Fix this by dropping the line-buffer parameter.
Signed-off-by: Simon Glass <sjg@chromium.org>
We use the U_BOOT_ prefix (i.e. U_BOOT_DRIVER) to declare a driver but
in every other case we just use DM_. Update the alias macros to use the
DM_ prefix.
We could perhaps rename U_BOOT_DRIVER() to DM_DRIVER(), but this macro
is widely used and there is at least some benefit to indicating it us a
U-Boot driver, particularly for code ported from Linux. So for now, let's
keep that name.
Signed-off-by: Simon Glass <sjg@chromium.org>
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.
Signed-off-by: Simon Glass <sjg@chromium.org>
This does not get a device (struct udevice *) but a struct driver_info *
so the name is confusing.
Rename it accordingly. Since we plan to have several various of these
macros, put GET at the end instead of the middle, so it is easier to spot
the related macros.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.
The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)
It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.
Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the Makefile to run dtoc only once, generating all required files.
This saves time since there is a lot of processing in each invocation of
dtoc.
We already have a variable for the object files to build, so use that
instead of repeating the same filenames. Add a C version of this also,
for the same reason.
This makes it easier to add new C files (generated by dtoc) to the build
later, as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
With upcoming changes, dtoc will output several files for different
of-platdata components.
Add a way to output all ava!ilable files at once ('all'), to the
appropriate directories, without needing to specify each one invidually.
This puts the commands in alphabetical order, so update the tests
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Implement the 'output directory' feature, allowing dtoc to write the
output files separately to the supplied directories. This allows us to
handle the struct and platdata output in one run of dtoc.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present dtoc writes only a single file on each invocation. U-Boot
writes the two files it needs by separate invocations of dtoc. Since dtoc
now scans all U-Boot driver source, this is fairly slow (about 1 second
per file).
It would be better if dtoc could write all the files at once.
In preparation for this, add a way to specify an output directory for the
files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally dtoc outputs to a file but it also offers a way to write output
to stdout. At present the test for that does not actually check that the
output is correct. Add this to the test.
This uses a member variable to hold the expected text, so it can be used
in muitiple places.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present dtoc uses '-' internally to mean that output should go to
stdout. This is not necessary and None is more convenient. Update it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the uclass list head is in global_data. This is convenient
but with the new of-platdata we need the list head to be declared by
the generated code.
Change this over to be a pointer. Provide a 'static' version in
global_data to retain the current behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the code related to scanning for devices to bind, into a new
function. This will make it easier to skip this step with the new
of-platdata improvements.
Signed-off-by: Simon Glass <sjg@chromium.org>
To avoid having people accidentally access this member, add a trailing
underscore. Also remove it when of-platdata is enabled, since it is not
used.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
We have two functions which do the same thing. Standardise on
dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in
normal operation: it is either null or missing.
Also move the functions into one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
At present flags are stored as part of the device. In preparation for
storing them separately, change the access to go through inline functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that the sequence-numbering migration is complete, rename this member
back to seq_, adding an underscore to indicate it is internal to driver
model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Add a new function to handle the allocation of private/platform data for
a device. This will make it easier to skip this feature when using the new
of-platdata.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some devices are not needed in SPL/TPL. For TPL this causes the
generation of unnecessary of-platadata structs. Make some adjustments to
fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this driver calls malloc() to start a new platform data
structure, fills it in and tells driver model to use it.
We want to avoid malloc, particularly with the new version of of-platdata.
Create a new struct which encompasses both the dtd struct and the ns16550
one, to avoid this. Unfortunately we must copy the data into the right
place for the ns16550 driver. Add some comments about this.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them and add the dtd struct too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
This construct effectively uses struct spi_nor due to a #define in
spi-nor.h so we may as well use that struct here. This allows dtoc to
parse it correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
The #define of one struct to another has been around for a while. It
confuses dtoc and makes it think that struct spi_flash does not exist.
Make a few changes to improve things while we wait for migration to be
completed:
- Move the 'struct spi_flash' to column 1 so dtoc scans it
- Remove the #define when compiling dt-platdata.c
- Update the strange mtd_get/set_of_node() functions
- Use struct spi_nor in the drivers, so dtoc sees the correct struct
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is a bit odd in that it only reads and updates the livetree
version of the device ofnode. This means it won't work with flattree.
Update the code to work as it was presumably intended.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are require a few devices in the devicetree which are
not actually used in SPL. This will cause problems with the new
of-platdata, since it will try to instantiate devices which are not
compiled into U-Boot.
Update the devicetree to remove these devices from SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this driver does not have a compatible string. For it to be
used with the coming of-platadata, it must have one. Update it
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this struct into a header file so that dtoc can include it in its
dt-platdata.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Update management of "--rm_memory" sandbox's option and force
this option when U-Boot is loaded by SPL in os_spl_to_uboot()
and remove the ram file after reading in main() as described
in option help message: "Remove memory file after reading".
This patch avoids that the file "/tmp/u-boot.mem.XXXXXX" [created in
os_jump_to_file() when U-Boot is loaded by SPL] is never deleted
because state_uninit() is not called after U-Boot execution
(CtrlC or with running pytest for example).
This issue is reproduced by
> build-sandbox_spl/spl/u-boot-spl
and CtrlC in U-Bot console
> make qcheck
One temp file is created after each SPL and U-Boot execution
(7 tims in qcheck after test_handoff.py, test_ofplatdata.py,
test_spl.py execution).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These errors are only really for development purposes. Drop them to reduce
the size of TPL. The error numbers are still reported.
This reduces the TPL binary size on coral by about 160 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update various drivers to use of_match_ptr() and to avoid including debug
strings in TPL. Omit the WiFi driver entirely, since it is not used in
TPL.
This reduces the TPL binary size by about 608 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present several strings from this file appear in the TPL binary. Add
preprocessor checks to drop them.
This reduces the TPL binary size by about 128 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these settings are in the node for host-bridge and so are
visible in TPL as well as SPL. But they are only used for SPL.
Move them to a subnode so that TPL does not included them.
Signed-off-by: Simon Glass <sjg@chromium.org>
When this code is not used (e.g. by TPL) we want it to be excluded from
the image. Put it in its own section so that this happens.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this member holds a simple list of driver names. Update it to
be a dict of DriverInfo, with the name being the key. This will allow more
information to be added about each driver, in future patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reduce the length of output_node() futher by moving the struct-output
functionality into a two separate functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is annoying to have this function inside its parent since it makes the
parent longer and hard to read. Move it to the top level.
Signed-off-by: Simon Glass <sjg@chromium.org>
These have crept in again. Update the file to fix all but these ones:
dtb_platdata.py:143:0: R0902: Too many instance attributes (10/7)
(too-many-instance-attributes)
dtb_platdata.py:713:0: R0913: Too many arguments (6/5)
(too-many-arguments)
Signed-off-by: Simon Glass <sjg@chromium.org>
At present several test drivers are part of the test file itself. Some of
these are useful for of-platdata tests. Separate them out so we can use
them for other things also.
A few adjustments are needed so this driver can build for sandbox_spl as
well.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the entire test state is effective passed into a test driver
just to record which device was removed. This is unnecessary and makes it
harder to track what is going on.
Use a simple boolean instead.
Also drop the unused 'removed' member while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This error should not happen in normal use. Reduce the length of it to
save space in the image.
Add an empty spl.h file to sh since it appears to lack this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible to include spl.h in on these architectures
since the asm/spl.h file is not present. We want to be able to use the
spl_phase() function, so add empty headers to make things build.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are supposed to be private to driver model, not accessed by any code
outside. Add a trailing underscore to indicate this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use these functions in the core code as much as possible. With this, there
are only two places where each priv/plat pointer is accessed, one for read
and one for write.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most drivers use these access methods but a few do not. Update them.
In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Add functions so this information is not accessed directly. This will be
needed for of-platdata which stores it in a different place.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code was kept around after of-platdata started supporting parent
devices. That feature seems stable now, so let's drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the name 'uclass_driver' is used for the uclass linker list.
This does not follow the convention of using the struct name. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the output from this function is hard to read in SPL, due to
(intended) limitations in SPL's printf() function. Add an SPL version so
it is clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
This uses up space in the SPL binary but it always starts as zero. Also
some boards cannot support data in TPL (e.g. Intel Apollo Lake).
Use malloc() to allocate this structure instead, by moving the init a
little later, after malloc() is inited. Make this function optional since
it pulls in malloc().
This reduces the TPL binary size on coral by about 64 bytes
Signed-off-by: Simon Glass <sjg@chromium.org>
The spl-test4 node deliberately has an invalid compatible string. This
causes a warning from dtoc and the check it does is not really necessary.
Drop it, to avoid the warning and associated confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Lower case should be used for function names. Update this driver and its
callers accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Typedefs should not be used in U-Boot and structs should be lower case.
Update the code to use struct ns16550 consistently.
Put a header guard on the file while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
At present the dtoc commmand line is repeated twice in the Makefile. Use a
variable to avoid this, so it is easier to add more conditional arguments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the SPL_NAME variable to simplify the rules. Drop the SPL targets
clean-files since the SPL and TPL dts/ directories are removed by
existing rules. Move the SPL rules into a new spl_dtbs to avoid the
complicated $(if) construct.
Also drop unused pieces from the 'targets' variable.
With this, SPL and TPL have separate dtbs which respect the various
u-boot,dm-spl / u-boot,dm-tpl tags.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than putting these in the top-level dts/ directory (which is
intended for U-Boot proper), put them in the correct subdirectory for
SPL (either spl/ or tpl/). This is where other SPL targets are kept,
so this is more consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present both SPL and TPL use the same devicetree binary. While there
is logic to run fdtgrep separately on each one, it does not actually
happen.
Add a new TPL rule and use that instead. Make this rule conditional on
there actually being a TPL. Do the same for SPL for consistency.
Note that the SPL and TPL dtbs are build by a Makefule rule used for
U-Boot proper. This is the 'dtbs' target in dts/Makefile. So the check
for CONFIG_TPL_BUILD in cmd_fdtgrep never actually works at present.
We don't support CONFIG_OF_EMBED for TPL at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
It looks like that i2c bus lot of times timeout on some units. Prior
migration to CONFIG_DM_I2C i2c speed was set to CONFIG_SYS_OMAP24_I2C_SPEED
value which was 100000. Lower speed fixes timeout problems, so change speed
back to its previous value.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 8d8c181703 ("Nokia RX-51: Convert to CONFIG_DM_I2C")
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Support reusing board_fit_config_name_match() to automatically
select a sensible default configuration for booting fitImages
using 'bootm'.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Replace most #ifdef checks for USE_HOSTCC and CONFIG_*
with normal if instructions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
All Xilinx SoCs have repository location filled already but boards are
covered by different fragment which is missing this link.
The patch is extending description with adding proper link to the same
repository.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is a need to call sync when anybody asking for clearing display.
For example via cls command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for the WiseChip Semiconductor Inc. (UG-6028GDEBF02) display
using the SEPS525 (Syncoam) LCD Controller. Syncoam Seps525 PM-Oled is RGB
160x128 display. This driver has been tested through zynq-spi driver.
ZynqMP> load mmc 1 100000 rainbow.bmp
61562 bytes read in 20 ms (2.9 MiB/s)
ZynqMP> bmp info 100000
Image size : 160 x 128
Bits per pixel: 24
Compression : 0
ZynqMP> bmp display 100000
ZynqMP> setenv stdout vidconsole
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some drivers like LCD connected via SPI requires explicit sync function
which copy framebuffer content over SPI to controller to display.
This hook doesn't exist yet that's why introduce it via video operations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch is preparation for follow up one to support cases where
synchronization can fail.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Place description below function parameters to make kernel-doc stript
happy. Also rename dev to vid to be aligned with function parameters.
Fixes: 1acafc73bf ("dm: video: Add a video uclass")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building xilinx_zynq_virt_defconfig fails on origin/next as reported by
GCC 10.2 (as provided by Debian Bullseye):
CC board/xilinx/common/fru_ops.o
board/xilinx/common/fru_ops.c: In function ‘fru_capture’:
board/xilinx/common/fru_ops.c:173:8:
error: array subscript 284 is outside array bounds of
‘struct fru_table[1]’ [-Werror=array-bounds]
173 | limit = data + sizeof(struct fru_board_data);
| ~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
board/xilinx/common/fru_ops.c:17:18: note: while referencing ‘fru_data’
17 | struct fru_table fru_data __section(.data);
| ^~~~~~~~
When using sizeof(struct fru_board_data) to find the end of the structure
you should add it to the start of the structure.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This sort of code does not make much sense:
if (ondie_ecc_enabled) {
if (ondie_ecc_enabled) {
Remove the inner if.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch add ethernet node gem1 to zcu1285 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch add ethernet node gem1 to zcu1275 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commits add a check on the command ubi rename. This check avoids
to rename a volume to with a name that is already used on another ubi
volume. If two volumes has the same name, then the ubi device can't be
mounted anymore.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
My address at Toradex doesn't exist anymore, map this address
to my personal email.
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There might be hardware configurations where 64-bit data accesses
to NVMe registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit NVMe registers, similarly as it is done in Linux kernel.
This patch fixes operation of NVMe devices on RPi4 Broadcom BCM2711 SoC
based board, where the PCIe Root Complex, which is attached to the
system through the SCB bridge.
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
nvme_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0x3c033fff3c033fff which lead to NVMe devices to fail
probing.
This fix is analogous to commit 8e2ab05000 ("usb: xhci: Use only
32-bit accesses in xhci_writeq/xhci_readq").
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
When unaligned 3 bytes data write operation is performed, 3rd byte
is being over written by 1st byte of 3 bytes data. This patch
fixes it.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Set script_offset_nor env variable using CONFIG_BOOT_SCRIPT_OFFSET
and nor flash start address to keep bootscript offset configurable.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Endianness detection is checked against uninitialized ret variable.
Assign ret with read value from status register to fix this.
Fixes: 31a359f87e ("serial: uartlite: Add support to work with any endianness")
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Pull request for UEFI sub-system for next
* UEFI capsule authentication
* UEFI capsule update on QEMU ARM
* fsuuid command for FAT file system
* bug fixes
Add documentation highlighting the steps for using the uefi capsule
update feature for updating the u-boot firmware image.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add a efidebug subcommand to initiate a firmware update using the efi
firmware management protocol(fmp) set_image routine.
The firmware update can be initiated through
'efidebug capsule disk-update'
This would locate the efi capsule file on the efi system partition,
and call the platform's set_image fmp routine to initiate the firmware
update.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add support for enabling uefi capsule authentication. This feature is
enabled by setting the environment variable
"capsule_authentication_enabled".
The following configs are needed for enabling uefi capsule update and
capsule authentication features on the platform.
CONFIG_EFI_HAVE_CAPSULE_SUPPORT=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT=y
CONFIG_EFI_CAPSULE_FIRMWARE=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_EFI_CAPSULE_AUTHENTICATE=y
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add support for authenticating uefi capsules. Most of the signature
verification functionality is shared with the uefi secure boot
feature.
The root certificate containing the public key used for the signature
verification is stored as part of the device tree blob. The root
certificate is stored as an efi signature list(esl) file -- this file
contains the x509 certificate which is the root certificate.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The efi_sigstore_parse_sigdb function reads the uefi authenticated
variable, stored in the signature database format and builds the
signature store structure. Factor out the code for building
the signature store. This can then be used by the capsule
authentication routine to build the signature store even when the
signature database is not stored as an uefi authenticated variable
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The pkcs7 header parsing functionality is pretty generic, and can be
used by other features like capsule authentication. Make the function
an extern, also changing it's name to efi_parse_pkcs7_header
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Prior to writing to an mtd device, mtd_erase is called. This call
fails in case the sector being erased is locked. Call mtd_unlock to
unlock the region which is to be erased and later written to. Lock the
region once the write to the region has completed.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
When building the capsule using scripts in edk2, a fmp header is
added on top of the binary payload. Add logic to detect presence of
the header. When present, the pointer to the image needs to be
adjusted as per the size of the header to point to the actual binary
payload.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The dfu framework uses the dfu_alt_info environment variable to get
information that is needed for performing the firmware update. Add
logic to set the dfu_alt_info for the qemu arm64 platform to reflect
the two mtd partitions created for the u-boot env and the firmware
image. This can be subsequently extended for other qemu architectures
which need this variable set.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add support for setting the default values for mtd partitions on the
platform. This would be used for updating the firmware image using
uefi capsule update with the dfu mtd backend driver.
Currently, values have been defined for the qemu arm64 platform, with
default values defined for the mtd partitions based on the NOR
flash. This can be subsequently extended for other qemu architectures
which need mtdparts set.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
RFC 2315 Section 9.3 describes the message digesting process. The
digest calculated depends on whether the authenticated attributes are
present. In case of a scenario where the authenticated attributes are
present, the message digest that gets signed and is part of the pkcs7
message is computed from the auth attributes rather than the contents
field.
Check if the auth attributes are present, and if set, use the auth
attributes to compute the hash that would be compared with the
encrypted hash on the pkcs7 message.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
On the qemu arm platform, the virtio devices are initialised in the
board_init function, which gets called before the initr_pci. With
this sequence, the virtio block devices on the pci bus are not
initialised. Move the initialisation of the virtio devices to
board_late_init which gets called after the call to initr_pci.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Add options for embedding the public key esl(efi signature list) file
to the platform's dtb. The esl file is then retrieved and used for
authenticating the capsule to be used for updating firmare components
on the platform.
The esl file can now be embedded in the dtb by invoking the following
command
mkeficapsule -K <pub_key.esl> -D <dtb>
In the scenario where the esl file is to be embedded in an overlay,
this can be done through the following command
mkeficapsule -O -K <pub_key.esl> -D <dtb>
This will create a node named 'signature' in the dtb, and the esl file
will be stored as 'capsule-key'
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
When a new event is queued we have to process the event queue by calling
efi_process_event_queue(). But there is not reason to call the function
when the event is not queueable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Although the function description states the caller must provide a
sufficient buffer, it's better to have in function checks that the
destination buffer can hold the intended value.
So let's add an extra argument with the buffer size and check that
before doing any copying.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now we install the EFI_LOAD_FILE2_PROTOCOL to load an initrd
unconditionally. Although we correctly return various EFI exit codes
depending on the file status (i.e EFI_NO_MEDIA, EFI_NOT_FOUND etc), the
kernel loader only falls back to the cmdline interpreted initrd if the
protocol is not installed.
This creates a problem for EFI installers, since they won't be able to
load their own initrd and start the installation.
A following patch introduces a different logic where we search for an
initrd path defined in an EFI variable named 'Initrd####'.
If the bootmgr is used to launch the EFI payload, we'll will try to match
the BootCurrent value and find the corresponding initrd
(i.e Boot0000 -> Initrd0000 etc). If the file is found, we'll install
the required protocol which the kernel's efi-stub can use and load our
initrd.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
dm.h and env.h serve no purpose here. Remove them and sort the
remaining in alphabetical order.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Do not use data from the loaded image object after deleting it.
Fixes: 126a43f15b ("efi_loader: unload applications upon Exit()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
load_options passed from do_efibootmgr() to do_bootefi_exec() may contain
invalid data from the stack which will lead to an invalid free().
Fixes: 0ad64007fe ("efi_loader: set load options in boot manager")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now the escape key was not correctly detected in UEFI applications.
We had to hit it twice for a single escape to be recognized.
Use a 10 ms delay to detect if we are dealing with the escape key or an
escape sequence.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
IS_ENABLED() contains parentheses. But we should still put extra
parentheses around it in an if statement for readability.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The FAT file system does not have a UUID but a 4 byte volume ID.
Let the fsuuid command show it in XXXX-XXXX format.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The FAT filesystem implementation uses several marcros referring to a magic
variable name mydata which renders the code less readable. Eliminate one of
them which is only used for a debug() statement.
Use log_debug() instead of debug().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.
Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.
Make the size of the memory buffer for UEFI variables customizable.
Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Pull request for UEFI sub-system for efi-2021-01-rc5 (2)
The following errors in the UEFI sub-system are fixed:
* use after free in efi_exit()
* invalid free when using the boot manager
* pressing escape key once not recognized
Do not use data from the loaded image object after deleting it.
Fixes: 126a43f15b ("efi_loader: unload applications upon Exit()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
load_options passed from do_efibootmgr() to do_bootefi_exec() may contain
invalid data from the stack which will lead to an invalid free().
Fixes: 0ad64007fe ("efi_loader: set load options in boot manager")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Up to now the escape key was not correctly detected in UEFI applications.
We had to hit it twice for a single escape to be recognized.
Use a 10 ms delay to detect if we are dealing with the escape key or an
escape sequence.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
IS_ENABLED() contains parentheses. But we should still put extra
parentheses around it in an if statement for readability.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This reverts commit 828d326216.
This change revers code which asserting PERST# signal when unloading
driver. Driver's remove callback is still there as it is used for other
functionality.
Asserting PERST# signal prior booting kernel is causing that A3720 boards
(Turris MOX and Espressobin) with stable Linux kernel versions 4.14 and
4.19 are not able to detect some PCIe cards (e.g. Compex WLE200 and WLE900)
and anymore. When PERST# signal is not asserted these cards are detected
correctly. As this is regression for existing stable Linux kernel versions
revert this problematic change in U-Boot.
To make cards working with OpenWRT 4.14 kernel it is needed to disable link
training prior booting kernel, which is already done in driver's remove
callback.
Described issue is in Linux kernel pci aardvark driver which is (hopefully)
fixed in latest upstream versions. Latest upstream versions should be able
to initialize PCIe bus and detects cards independently of the link training
and PERST# signal state.
So with this change, U-Boot on A3720 boards should be able to boot OpenWRT
4.14 kernel, stable 4.14 and 4.19 kernels and also latest mainline kernels.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
For correct spi bus detection the spi0 alias is needed in the DT.
Otherwise this error will ocurr in U-Boot:
Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
controller and SPI NOR flash node to enable usage in SPL. Otherwise
these devices will not be available.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Use 0x%2lx to print the i2c bus base address in hexadecimal format
instead of printing as an integer.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Use %u and not %d for unsigned values.
Print kHz and not khz.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The dart6ul has an i2c eeprom at 0x50 which contains, among other
things, the manufacturing/revision/options info of the SoM. This patch
replaces the current checkboard() implementation with a more
exhaustive one based on the content of the eeprom.
Since this code uses the new driver model, some changes were also
required in the DTS to make the nodes related to i2c available before
relocation.
This code was inspired from the supported u-boot code from Variscite
which can be found here:
https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02
New output example:
Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17
Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The eeprom at address 0x50 is a BR24G04NUX-3TTR. It has a
4Kbit (512x8) capacity, change the compatible string to reflect this
fact.
Also, add an alias to easily refer to this eeprom with
fdt_path_offset() which will be in another commit.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Hand over maintainership of Toradex SoMs (that I was responsible of) to
Oleksandr because of my resignation from Toradex, as such I will
have no immediate involvement with these modules and as a result not
able to continue maintaining these boards.
CC: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
When booting imx8mp-evk the following allocation error
message is seen:
U-Boot 2021.01-rc3-00200-ge668bec96a5f (Dec 21 2020 - 14:36:42 -0300)
alloc space exhausted
Fix it by increasing CONFIG_SYS_MALLOC_F_LEN to 0x10000 like it
is done on other i.MX8MM/8MN boards.
Reported-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Calling ahab_close cmd force the user to interact for confirmation.
This is not user-friendly when using this cmd during factory process.
Allow the user to pass '-y' option to bypass this confirmation.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
The current PHY rework does the following things:
1. Configure 125MHz clock
2. Setup the TX clock delay (RX is enabled by default),
3. Setup reserved bits to avoid voltage peak
The clock delays are nowadays already configured by the
PHY driver (in ar803x_delay_config). The code for that
can simply be dropped. The clock speed can also be
configured by the PHY driver by adding the device tree
property "qca,clk-out-frequency".
What is left is setting up the undocumented reserved bits
to avoid the voltage peak problem. I slightly improved its
documentation while updating the board's PHY rework code.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Instead of hardcoding index magic numbers in the board code,
also rely on board_fit_config_name_match choosing the right
config for the fitImage containing the kernel.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Pull request for UEFI sub-system for efi-2021-01-rc5
* In the Standalone MM based implementation of UEFI variables
check the internal OP-TEE return code
When opening an OP-TEE session we need to check the internal return
value of OP-TEE call arguments as well the return code of the
function itself.
The code was also ignoring to close the OP-TEE session in case the
shared memory registration failed.
Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add a host_build() function, so that it's possible to
check for software being build with USE_HOSTCC without
relying on preprocessor conditions. In other words
#ifdef USE_HOSTCC
host_only_code();
#endif
can be written like this instead:
if (host_build())
host_only_code();
This improves code readability and test coverage and
compiler will eleminate this unreachable code.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After the conversion to device tree the board information becomes
redundant:
Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Board: MX6-SabreSD
Remove the printing of the board information.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
i.MX8M series includes support for high speed modes in uSDHC controllers.
Turn on corresponding configuration options for EVK boards, which would
enable high speed modes to be included in U-Boot.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
i.MX8M series provide support for high speed grades in their
usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks
to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Some SD Card controller and power circuitry has increased capacitance,
which keeps the internal logic remains powered after regulator is switch
off. This is generally the case when card is switched to SD104 mode,
where a power cycle should be performed. In case if the card internal
logic remains powered, it causes a subsequent failure of mode
transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for
internal card circuitry to drain voltages and perform a power cycle
correctly.
Similar fix is done in commit c49d0ac38a ("ARM: dts: rmobile: Increase
off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Stefano Babic <sbabic@denx.de>
There have been some updates to the device tree since 5.6.
This also includes some clocks, and makes it easier to keep
board device tree files in sync with Linux
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Fixed wrong PHY Interface Mode
As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
This problem has been exposed by commit:
commit 13114f38e2
Fix the phy-mode accordingly to fix the regression.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
A recent change to unify the flattree/livetree code introduced a small
size increase in SPL on some boards. For example SPL code size for
px30-core-ctouch2-px30 increased by 40 bytes.
To address this we can take advantage of the fact that some of the ofnode
functions are only called a few times in SPL, so it is worth inlining
them.
Add new Kconfig options to control this. These functions are not inlined
for U-Boot proper, since this increases code size.
Fixes: 2ebea5eaeb ("dm: core: Combine the flattree and livetree binding code")
Signed-off-by: Simon Glass <sjg@chromium.org>
Buildman reuses build directories from previous builds to avoid the cost
of 'make mrproper' for every build. If the previous build produced an SPL
image but the current one does not, the SPL image will remain and buildman
will think it is a result of building the current board.
Remove these files before building, to avoid this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove setting slave->dev to NULL after the device_remove() call.
The slave pointer points to dev->parent_priv, which has already
been freed by device_free(), called from device_remove() in the
preceding line. Writing to slave->dev may cause corruption of the
dlmalloc free chunk forward pointer of the previously freed chunk.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add testcase for spi_claim_bus(), which checks that sandbox spi bus
speed/mode settings are updated correctly when multiple slaves use
the bus consecutively. The following configurations are used for the
two spi slaves involved:
* different max_hz / different modes
* different max_hz / same modes
* different modes / same max_hz
asm/test.h header is added in order to be able to retrieve the current
speed/mode of the sandbox spi bus, via sandbox_spi_get_{speed, mode}.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, when different spi slaves claim the bus consecutively using
spi_claim_bus(), spi_set_speed_mode() will only be executed on the first
two calls, leaving the bus in a bad state starting with the third call.
This patch drops spi_slave->speed member and adds caching of bus
speed/mode in dm_spi_bus struct. It also updates spi_claim_bus() to call
spi_set_speed_mode() if either speed or mode is different from what the
bus is currently configured for. Current behavior is to only take into
account the speed, but not the mode, which seems wrong.
Fixes: 60e2809a84 ("dm: spi: Avoid setting the speed with every transfer")
Reviewed-by: Simon Glass <sjg@chromium.org>
Reported-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reported-by: Moshe, Yaniv <yanivmo@amazon.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Introduce sandbox_spi_get_{speed, mode} public interface to retrieve the
sandbox spi bus internal state. They are meant to be used in sandbox spi
testcases.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement sandbox_spi_set_{speed, mode} routines, to be able to keep track
of the current bus speed/mode. This will help determine whether the values
passed from dm_spi_claim_bus() are valid.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Place a second spi slave on the sandbox_spi bus, to be used by the
spi_claim_bus() testcase we are about to introduce. We need to make sure
that jumping between slaves calling spi_claim_bus() sets the bus speed and
mode appropriately. Use different max-hz and mode properties for this new
slave.
Also, update sandbox_spi cs_info call to allow activity on CS0/CS1 and
adapt dm_test_spi_find() testcase for this new setup.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 1289e96797 ("sandbox: spi: Drop command-line SPI option") dropped
support for specifying SPI devices on the command line, removing the only
user of sandbox_spi_parse_spec(). Remove the function too.
Fixes: 1289e96797 ("sandbox: spi: Drop command-line SPI option")
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Before executing code that we have loaded from a file we need to flush the
data cache and invalidate the instruction flash.
Implement functions flush_cache() and invalidate_icache_all().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
While assigning the sequence number to subsystem instances by reading the
aliases property, only DT nodes names are compared and not the complete
path. This causes a problem when there are two DT nodes with same name but
have different paths.
In arch/arm/dts/k3-am65-main.dtsi there are two USB controllers with the
same device tree node name but different path. When aliases are defined for
these USB controllers then fdtdec_get_alias_seq() fails to pick the correct
instance for a given index.
fdt_path_offset() function is slow and this would effect the U-Boot
startup. To avert the time penalty on all boards, apply this extra check
only when required by using a config option.
Fix it by comparing the phandles of DT nodes after the node names match,
under a config option.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix whitespace error in Kconfig:
Signed-off-by: Simon Glass <sjg@chromium.org>
Check for negative return value of fdt_noffset from calling
boot_get_fdt_fit().
Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement a reset function that we can call after ExitBootServices(),
when all driver model devices are gone.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add CONFIG_DEBUG_UART=y for all sandbox defconfig
as it is already done in sandbox_defconfig.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add defaults for FSF/GNU projects, such as gcc, that provide sensible
settings for those projects.
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
To enable use of patman with FSF/GNU projects, such as GCC or
Binutils, no Signed-off-by may be added. This adds a command
line flag '--no-signoff' to suppress adding signoffs in patman
when processing commits.
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix patman testBranch() test:
Signed-off-by: Simon Glass <sjg@chromium.org>
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Travis-CI is changing their support for FOSS (understandably) to have a
limited per-month number of build minutes. Unfortunately for us, the
matrix of jobs we run will exhaust that very quickly. Remove the yml
file. Thanks for all the builds, Travis-CI!
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since linux commit 2e6cde96873253fd9eb0f20afd8ffd18278cff75 ("arm64:
dts: ls1028a: make the eMMC and SD card controllers use fixed indices")
mmc0 is the eMMC and mmc1 is the SD card. Also swap it in u-boot to
avoid any confusion by the user and to be aligned with linux.
Signed-off-by: Michael Walle <michael@walle.cc>
Pull request for UEFI sub-system for efi-2021-01-rc4
* Provide a tool to create a file with UEFI variables to preseed UEFI
variable store.
* Make size of UEFI variable store configurable.
* Add man pages for commands 'bootefi' and 'button'.
tools/efivar.py allows to prepare a file with UEFI variables to preseed
the UEFI variable store.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.
Make the size of the memory buffer for UEFI variables customizable.
Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Now that migration to the new sequence numbers is complete, drop the old
fields. Add a test that covers the new behaviour.
Also drop the check for OF_PRIOR_STAGE since we always assign sequence
numbers now.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function current deals with req_seq which is deprecated. Update it to
use the new sequence numbers, putting them above existing aliases. Rename
the function to make this clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that there is only one sequence number (rather than both requested and
assigned ones) we can simplify this function. Also update its caller to
simplify the logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Check that this flag operates as expected. This patch is not earlier in
this series since is uses the new behaviour of dev_seq().
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no-longer any need to check if sequence numbers are valid, since
this is ensured by driver model. Drop the unwanted logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that sequence numbers are set up when devices are bound, this code is
not needed. Also, we should use dev_seq() instead of req_seq. Update the
whole file accordingly.
Also fix up APL cpu while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new sequence number in all cases. Since all devices are assigned
a number when bound, this hack should not be needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This hack cannot work in the new sequence-numbering scheme. Remove it
while we wait for the maintainer to complete DM conversion as noted in
the existing comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new sequence number in all cases. Drop the rockchip case because
the sequence number should be 0 anyway, and assigning to the sequence
number is not permitted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we know the sequence number at bind time, there is no need for
special-case code in dm_pci_hose_probe_bus().
Note: the PCI_CAP_ID_EA code may need a look, but there are no test
failures so I have left it as is.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some buses have their own rules which require assigning sequence numbers
with a bus-specific algorithm. For example, PCI requires that sub-buses
are numbered higher than their parent buses, meaning effectively that
parent buses must be numbered only after all of their child buses have
been numbered.
Add a uclass flag to indicate that driver model should not assign sequence
numbers. In this case, the uclass must do it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Checking for seq == -1 is effectively checking that the device is
activated. The new sequence numbers are never -1 for a bound device, so
update the check.
Also drop the note about valid sequence numbers so it is accurate with the
new approach.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new sequence number in all cases. Drop the logic to check for a
valid number in designware_i2c, since it will always be valid.
Also drop the numbering in the uclass, since we can rely on driver
model giving us the right sequence numbers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Several Octeon drivers operate by setting the sequence number of their
device. This should not be needed with the new sequence number setup. Also
it is not permitted. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the core logic to use the new approach. For now the old code is
left as is. Update one test so it still passes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present each device has two sequence numbers, with 'req_seq' being
set up at bind time and 'seq' at probe time. The idea is that devices
can 'request' a sequence number and then the conflicts are resolved when
the device is probed.
This makes things complicated in a few cases, since we don't really know
what the sequence number will end up being. We want to honour the
bind-time requests if at all possible, but in fact the only source of
these at present is the devicetree aliases. Since we have the devicetree
available at bind time, we may as well just use it, in the hope that the
required processing will turn out to be useful later (i.e. the device
actually gets used).
Add a new 'sqq' member, the bind-time sequence number. It operates in
parallel to the old values for now. All devices get a valid sqq value,
i.e. it is never -1.
Drop an #ifdef while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this is passed a uclass ID and it has to do a lookup. The
callers all have the uclass pointer, except for the I2C uclass where the
code will soon be deleted.
Update the argument to a uclass * instead of an ID since it is more
efficient.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.
The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
The linker script uses alphabetic sorting to group the different linker
lists together. Each group has its own struct and potentially its own
alignment. But when the linker packs the structs together it cannot ensure
that a linker list starts on the expected alignment boundary.
For example, if the first list has a struct size of 8 and we place 3 of
them in the image, that means that the next struct will start at offset
0x18 from the start of the linker_list section. If the next struct has
a size of 16 then it will start at an 8-byte aligned offset, but not a
16-byte aligned offset.
With sandbox on x86_64, a reference to a linker list item using
ll_entry_get() can force alignment of that particular linker_list item,
if it is in the same file as the linker_list item is declared.
Consider this example, where struct driver is 0x80 bytes:
ll_entry_declare(struct driver, fred, driver)
...
void *p = ll_entry_get(struct driver, fred, driver)
If these two lines of code are in the same file, then the entry is forced
to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
second line of code is in a different file, then no action is taken, since
the compiler cannot update the alignment of the linker_list item.
In the first case, an 8-byte 'fill' region is added:
.u_boot_list_2_driver_2_testbus_drv
0x0000000000270018 0x80 test/built-in.o
0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv
.u_boot_list_2_driver_2_testfdt1_drv
0x0000000000270098 0x80 test/built-in.o
0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv
*fill* 0x0000000000270118 0x8
.u_boot_list_2_driver_2_testfdt_drv
0x0000000000270120 0x80 test/built-in.o
0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv
.u_boot_list_2_driver_2_testprobe_drv
0x00000000002701a0 0x80 test/built-in.o
0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv
With this, the linker_list no-longer works since items after testfdt1_drv
are not at the expected address.
Ideally we would have a way to tell gcc not to align structs in this way.
It is not clear how we could do this, and in any case it would require us
to adjust every struct used by the linker_list feature.
One possible fix is to force each separate linker_list to start on the
largest possible boundary that can be required by the compiler. However
that does not seem to work on x86_64, which uses 16-byte alignment in this
case but needs 32-byte alignment.
So add a Kconfig option to handle this. Set the default value to 4 so
as to avoid changing platforms that don't need it.
Update the ll_entry_start() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN
pin to the high impedance mode, otherwise the board is stuck in the
middle of loading early stages of the bootloader from SD card.
This can be achieved by using the OPEN_DRAIN flag instead if the
ACTIVE_HIGH, what will leave the pin in input to achieve high state (pin
has the pull-up) and solve the issue.
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The designware ssi device has "broken" chip select behaviour [1], and needs
specific manipulation to use the built-in chip select. The existing fix is
to use an external GPIO for chip select, but typically the K210 has SPI3
directly connected to a flash chip with dedicated pins. This makes it
impossible to use the spi_xfer function to use spi, since the CS is
de-asserted in between calls. This patch adds an implementation of
exec_op, which gives correct behaviour when reading/writing spi flash.
This patch also rearranges the headers to conform to U-Boot style.
[1] https://lkml.org/lkml/2015/12/23/132
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This documentation has been taken from Linux commit 3d7db0f11c7a ("spi: dw:
Refactor mid_spi_dma_setup() to separate DMA and IRQ config"), immediately
before the file was deleted and replaced with a yaml version. Additional
compatible strings from newer versions have been added, as well as a few
U-Boot-specific ones.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
CTRLR0 can have several different layouts depending on the specific device
(dw-apb-ssi vs dwc-ssi), and specific parameters set during synthesis.
Update the driver to support three specific configurations: dw-apb-ssi with
SSI_MAX_XFER_SIZE=16, dw-apb-ssi with SSI_MAX_XFER_SIZE=32, and dwc-ssi.
dw-apb-ssi is the version of the device on Altera/Intel SoCFPGAs, MSCC
SoCs, and Canaan Kendryte K210 SoCs. This is the only version this driver
supported before this change. The register layout before version 3.23a is:
| 31 .. 16 |
| other stuff |
| 15 .. 10 | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff | TMOD | MODE | FRF | DFS |
Note that DFS (Data Frame Size) is only 4 bits, limiting transfers to data
frames of 16 bits or less.
In version 3.23a, the SSI_MAX_XFER_SIZE parameter was introduced. This
parameter defaults to 16 (resulting in the same layout as prior versions),
but may also be set to 32. To allow setting longer data frame sizes, a new
DFS_32 register was introduced:
| 31 .. 21 | 20 .. 16 |
| other stuff | DFS_32 |
| 15 .. 10 | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff | TMOD | MODE | FRF | all zeros |
The old DFS field no longer controls the data frame size. To detect this
layout, we try writing 0xF to DFS. If we read back 0x0, then this device
has SSI_MAX_XFER_SIZE=32.
dwc-ssi is the version of the device on Intel Keem Bay SoCs and Canaan
Kendryte K210 SoCs. The layout of ctrlr0 is:
| 31 .. 16 |
| other stuff |
| 15 .. 12 | 11 .. 10 | 9 .. 8 | 7 .. 6 | 4 .. 0 |
| other stuff | TMOD | MODE | FRF | DFS_32 |
The semantics of the fields have not changed since the previous version.
However, SSI_MAX_XFER_SIZE is effectively always 32.
To support these different layouts, we model our approach on the one
which the Linux kernel has taken. During probe, the driver calls an init
function stored in driver_data. This init function is responsible for
determining the layout of CTRLR0, and supplying the update_cr0 function.
The style of and information behind this commit is based on the Linux MMIO
driver for these devices. Specific reference was made to the series adding
support for Intel Keem Bay SoCs [1].
[1] https://lore.kernel.org/linux-spi/20200505130618.554-1-wan.ahmad.zainie.wan.mohamad@intel.com/
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.
Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
A few registers had slightly different names from what is in the datasheet.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This allows different log levels to be enabled or disabled depending on the
desired level of verbosity. In particular, it allows for general debug
information to be printed while excluding more verbose logging which may
interfere with timing.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The resting state of MOSI is high when nothing is driving it. If we drive
it low while recieving, it looks like we are transmitting 0x00 instead of
transmitting nothing. This can confuse slaves (like SD cards) which allow
new commands to be sent over MOSI while they are returning data over MISO.
The return of MOSI from 0 to 1 at the end of recieving a byte can look like
a start bit and a transmission bit to an SD card. This will cause the card
to become out-of-sync with the SPI device, as it thinks the device has
already started transmitting two bytes of a new command. The mmc-spi driver
will not detect the R1 response from the SD card, since it is sent too
early, and offset by two bits. This patch fixes transfer errors when using
SD cards with dw spi.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
U-Boot is able to erase bad mtd blocks on raw nand devices, but this
is not true for spinand flashes. Lets enable this feature for spinand
flashes as well. This is extemelly useful for flash testing.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@oktetlabs.ru>
Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.
In fact we don't need to do an erase at all before writing the BBM.
The ECC is disabled for raw accesses to the OOB data and we don't
need to work around any issues with chips reporting ECC errors as it
is known to be the case for raw NAND.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD_OPS_AUTO_OOB.
Fix this by explicitly setting req.mode to MTD_OPS_RAW.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by accessing it through spinand->oobbuf and/or spinand->databuf.
This is a flaw in the original design of the SPI NAND core and at the
latest from 13c15e07eedf ("mtd: spinand: Handle the case where
PROGRAM LOAD does not reset the cache") on, it results in not having
the bad block marker written at all, as the spinand->oobbuf is
cleared to 0xff after setting the marker bytes to zero.
To fix it, we now just store the two bytes for the marker on the
stack and let the read/write operations copy it from/to the page
buffer later.
Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
Define LOG_CATEGORY and change printf and pr_*
to dev_ (when dev is available) or log_ macro.
This patch adds the support of logging feature with log command
(filtering, display of device name in trace) and allows to
suppress traces via the syslog driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Remove the redundant setting for USB_RX_EARLY_SIZE. Besides, for
RTL8153B, it is necessary to notify the hardware of the changes
of the aggregation settings.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
The r8152_eth_probe() may allocate a memory for ss->dev_priv.
It has to be freed if r8152_eth_probe() fails finally.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
For bulk IN transfer, the codes will set ISP flag to request event TRB
being generated by xHC for the case of short packet. So when encountering
buffer-cross-64K-boundary (which we will divide payload and enqueuqe
more than 1 transfer TRB), and the first TRB ends up with a short packet
condition it will trigger an short packet code transfer event per that
flag and cause more than 1 event TRB generated for this transfer.
However, current codes will only handle the first transfer event TRB
then mark current transfer completed, causing next transfer
failure due to event TRB mis-match.
Such issue has been observed on some Layerscape platforms (LS1028A,
LS1088A, etc) with USB ethernet device.
This patch adds a loop to make sure the event TRB for last transfer TRB
has been handled in time.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.
Move Intel Edison to use DM_USB_GADGET and drop hard coded values.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It appears that U-Boot works by luck on Intel Edison board because the amount
of RAM is less than 1 GB and standard way of calculating the top of it work
for this configuration. However, this won't work if the amount of RAM is
different and split differently in address space. We have to find the suitable
window correctly.
Find proper memory region for relocation by scanning MMAP SFI table in
board_get_usable_ram_top() callback.
According to the address map documentation the Main Memory is guaranteed to lie
in the 0..2 GB range, that's why we limit search by this range.
Fixes: e71de54a49 ("x86: Add Intel Tangier support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Make use of the new bootargs substitution mechanism and zboot command
syntax.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With the updated changes to bootargs substitution[1], the zboot command
needs to be updated to get its command line from an environment variable
instead of a memory address. This is because the command-line string must
be updated to convert %U to ${uuid}, etc.
In any case it is more flexible to use a environment variable and it is
best to do this before the release to avoid a subsequent change.
Update the command accordingly.
[1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Documentation fixes for v2020.01-rc4
Move several README files to reStructured text for the HTML documentation.
Describe register for global data on x86.
Allow building HTML documentation with Sphinx 3
Set $devtype for DHCP boot, which can be handy for the boot.scr
for detection of devtype used (for example, when the same boot.scr is
used for both mmc/dhcp boot):
if test ${devtype} = "dhcp"; then
...
fi
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Convert README.bootmenu to reStructured text and move it to
usage/bootmenu.rst.
Adjust the text concerning configuration settings as these now are managed
via Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Convert README.trace to reStructured text and move it to develop/trace.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert README.NetConsole to reStructured text and move it to
doc/usage/netconsole.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reformat README.commands as reStructured text and add it to the HTML
documentation as develop/commands.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Due to removed function c_funcptr_sig_re building with Sphinx 3 fails.
With the patch building succeeds with a lot of warnings if the '-W' flag is
removed from doc/Makefile. Most of the documentation is correct
This follows the approach taken by the Linux kernel.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On x86 the global data pointer is stored in register fs.
On x86_64 no register is used for the global data pointer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Fix wrong amoswap t1 usage in startup.
- Reset the board after crash.
- Enable distro booting from an attached SCSI disk for QEMU.
- Support the optional header fields in efi header.
This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument.
Fixes: c4c726c26b ("pinctrl: meson: add pinconf support")
Reported-by: Anton Arapov <arapov@gmail.com>
Reported-by: Otto Meier <gf435@gmx.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
dwc3_meson_g12a_force_mode() sets the dr-mode of the USB PHY. However
it skips setting the mode if it matches the one done during driver probe
(stored in private structure). This fails if the mode has been changed
to other value and then back to initial one. Fix this by configuring the
dr-mode always, regadless of the one set at the driver probe).
This fixes operation of USB gadget based drivers when they are initialized
for the second time.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
RV32 should use PE32 format instead of PE32+ as the efi header format.
This requires following changes
1. A different header magic value
2. An additional parameter known as BaseOfData. Currently, it is set to
zero in absence of any usage.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
If an exception occurs on ARM or x86, we call panic() which will try to
reset the board. Do the same on RISC-V.
To avoid -Werror=format-zero-length move a '\n' to the string passed to
panic. We don't need a message here as depending on CONFIG_PANIC_HANG we
will either see
### ERROR ### Please RESET the board ###
or
resetting ...
as next message.
Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Not s2 register, t1 register is correct
Fortunately, it works because t1 register has a garbage value
Signed-off-by: Brad Kim <brad.kim@semifive.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
Reviewed-by: Leo Liang <ycliang@andestech.com>
As a way of keeping the driver declarations more consistent, add a warning
if the struct used does not end with _priv or _plat.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix up the code style for those declarations that should now fit onto one
line, which is all of them that currently do not.
This is needed for dtoc to detect the structs correctly, at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.
Signed-off-by: Simon Glass <sjg@chromium.org>
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).
Rename some of the latter variables to end with 'plat' for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.
Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this file to reduce the number of pylint warnings. Also add a few
missing comments while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
This doesn't need to be passed the devicetree anymore. Drop it.
Also rename the function to drop the _fdt suffix.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are two copies of this code. With ofnode we can combine
them to reduce duplication. Update the dm_scan_fdt_node() function and
adjust its callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is needed in at least one place. Avoid the conditional code in root.c
by adding this inline function.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is not necessary anymore, since device_bind_ofnode() does
the same thing and works with both flattree and livetree.
Rename it to indicate that it is special.
Signed-off-by: Simon Glass <sjg@chromium.org>
Test that an exception SIGILL is answered by a reset on the sandbox if
CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide a unit test that causes an illegal instruction to occur.
The test can be run with the following commands:
=> setenv efi_selftest exception
=> bootefi selftest
This might be the output:
Executing 'exception'
EFI application triggers exception.
Illegal instruction
pc = 0x1444d016, pc_reloc = 0xffffaa078e8dd016
UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
UEFI image [0x000000001444b000:0x0000000014451fff] pc=0x2016 '/bug.efi'
Resetting ...
It would tell us that the exception was triggered by an instruction
0x2016 bytes after the load address of the binary with filename /bug.efi.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement the commands
* exception undefined - execute an illegal instruction
* exception sigsegv - cause a segment violation
Here is a possible output:
=> exception undefined
Illegal instruction
pc = 0x55eb8d0a7575, pc_reloc = 0x57575
Resetting ...
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a handler for SIGILL, SIGBUS, SIGSEGV.
When an exception occurs print the program counter and the loaded
UEFI binaries and reset the system if CONFIG_SANDBOX_CRASH_RESET=y
or exit to the OS otherwise.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rather than implementing our own circular queue, use membuff. This allows
us to read multiple bytes at once into the serial input.
Signed-off-by: Simon Glass <sjg@chromium.org>
CONFIG_OF_CONTROL is always enabled for sandbox (as it should be for all
boards), so we can drop it. Also use IS_ENABLED() for the SPL check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this, mostly to add comments for argument and return types. It is
probably still too early to use type hinting since it was introduced in
3.5.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful anymore, since we always want to call chr() in Python 3.
Drop it and adjust callers to use chr().
Also drop ToChars() which is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
We don't need these now that everything uses Python 3. Remove them and
the extra code in GetBytes() and ToBytes() too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use an Enum instead of the current ad-hoc constants, so that there is a
data type associated with each 'type' value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Second set of u-boot-atmel fixes for 2021.01 cycle
This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to sam9x60 bit for
oscillator bypass mode, and eeproms read on sama5d2_icp.
The correct compatible for this eeproms is microchip,24aa02e48
The previous compatible string was working up to U-boot 2020.04.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Pull request for UEFI sub-system for next
Bug fixes
* avoid corruption of FAT file system when using long names
* correct values for RuntimeServicesSupport concerning UEFI capsule update
* link partition to block device via EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
New feature
* support EFI_LOAD_FILE_PROTOCOL in LoadImage() boot service
The USB support is not by default enabled on all designs, so it does not
make seance to have USB specific erratum's enabled on such a designs.
On our internal Hitachi-Powergrids design not using the USB controller
there is a crash when accessing those specific memory locations selected
by the erratum flags.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If the board isn't strapped to enable USB1 then attempting to access it
will result in a hang. Avoid this by allowing boards to define
CONFIG_USB_MAX_CONTROLLER_COUNT.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When booting from TF-A there is a logic that attempt to detect if the
default environment is used, if this is the case it then set the
`bootcmd` and `mcinitcmd` depending of the device we booted from.
This detection logic is dubious as it access internals of the env
implementation and it doesn't always work correctly.
First of all it detect any valid environment as not being the
default, so after running `env default -a && saveenv` the board
doesn't boot anymore as `bootcmd` is then empty.
But it also fails in some other ways, for example it always detect a
default environment when redundant env is enabled on MMC, so in that
case `bootcmd` is overwritten on every boot.
Instead of increasing the complexity of the detection just check if
`bootcmd` and `mcinitcmd` are set in the environment and set them if
they are not.
Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Check for NULL return value from fdt_getprop() in
fdt_fixup_remove_jr()
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
[Fixed checkpatch errors/warnings]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Fixes: commit 8ec619f8fd ("pci: layerscape: Fixup PCIe EP
mode DT nodes for LX2160A rev2")
This added the PCIe EP nodes fixup of LX2160A, but it
didn't update the condition value when there isn't a
property 'apio-wins'.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Fixed checkpatch error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable support to compile OPTEE driver, access AVB TA
and RPMB API's access via RPC from OPTEE for lx2162
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.
LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Move CORTINA_NO_FW_UPLOAD to Kconfig file so that it can
be controlled via defconfig files.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
We provide a UEFI driver for block devices. When ConnectController() is
called for a handle with the EFI_BLOCK_IO_PROTOCOL this driver creates the
partitions. When DisconnectController() is called the handles for the
partitions have to be deleted. This requires that the child controllers
(partitions) open the EFI_BLOCK_IO_PROTOCOL of the controller (block IO
device) with attribute EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A unit test is supplied to test the support for the EFI_LOAD_FILE_PROTOCOL
and the EFI_LOAD_FILE2_PROTOCOL by the LoadImage() boot service.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_load_image_from_file() should read via either of:
* EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
* EFI_LOAD_FILE_PROTOCOL
* EFI_LOAD_FILE2_PROTOCOL
To make the code readable carve out a function to load the image via the
file system protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Implementing support for loading images via the EFI_LOAD_FILE_PROTOCOL
requires the boot policy as input for efi_load_image_from_path().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The EFI_LOAD_FILE_PROTOCOL_GUID and EFI_LOAD_FILE2_PROTOCOL_GUID are needed
to complement the implementation of the LoadFile() boot service.
Remove a duplicate declaration of a variable for the
EFI_LOAD_FILE2_PROTOCOL_GUID.
Move the remaining declaration to efi_boottime.c.
Add a variable for the EFI_LOAD_FILE_PROTOCOL_GUID.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For implementing support for the EFI_LOAD_FILE_PROTOCOL in the LoadImage()
service we will have to call the LocateDevicePath() service. To avoid a
forward declaration resequence the functions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Our implementation of the EFI_HII_CONFIG_ROUTING_PROTOCOL is a mere stub,
where all services return an error code. The protocol is neither needed for
the EFI shell nor for the UEFI SCT. To reduce the code size remove it from
the U-Boot binary.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The EFI_RT_PROPERTIES_TABLE configuration table indicates which runtime
services are available at runtime.
Even if CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y, we neither support
UpdateCapsule() nor QueryCapsuleCapabilities() at runtime. Thus we should
not set the corresponding flags EFI_RT_SUPPORTED_UPDATE_CAPSULE and
EFI_RT_SUPPORTED_QUERY_CAPSULE_CAPABILITIES in RuntimeServicesSupported.
Fixes: 2bc27ca8a0 ("efi_loader: define UpdateCapsule api")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Long file names are stored in multiple directory entries. When deleting a
file we must delete all of them.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A long name is split over multiple directory entries. When deleting a file
with a long name we need the first directory entry to be able to delete the
whole chain.
Add the necessary fields to the FAT iterator:
* cluster of first directory entry
* address of first directory entry
* remaining entries in cluster
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When deleting a directory entry 0xe5 is written to name[0].
We have a constant for this value and should use it consistently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Searching for a file is not a write operation. So it should not lead to the
allocation of a new cluster to the directory.
If we reuse deleted entries, we might not even use the new cluster and due
to not flushing it the directory could be corrupted.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When creating new directory entries try to reuse entries marked as deleted.
In fill_dir_slot() do not allocate new clusters as this has already been
done in fat_find_empty_dentries().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a function to find a series of empty directory entries.
The current directory is scanned for deleted entries.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When handling long file names directory entries may be split over multiple
clusters. We must make sure that new clusters are zero filled on disk.
When allocating a new cluster for a directory flush it.
The flushing should be executed before updating the FAT. This way if
flushing fails, we still have a valid directory structure.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When iterating over a child directory we set itr->start_clust.
Do the same when over the root directory.
When looking for deleted directory entries or existing short names we will
have to iterate over directories a second and third time. With this patch
we do not need any special logic for the root directory.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For reusing deleted directory entries we have to adjust the function called
to step to the next directory entry.
This patch alone is not enough to actually reuse deleted directory entries
as the fill_dir_slot() is still called with first never used directory
entry.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
File names must be unique within their directory. So before assigning a
short name we must check that it is unique.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In set_name() we select the short name. Once this is correctly implemented
this will be a performance intensive operation because we need to check
that the name does not exist yet. So set_name should only be called once.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently we pass the short name via the directory iterator.
Pass it explicitly as a parameter.
This removes the requirement to set the short name in the iterator before
writing the long name.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current function set_name() used to create short names has the
following deficiencies resolved by this patch:
* Long names (e.g. FOO.TXT) are stored even if a short name is enough.
* Short names with spaces are created, e.g. "A ~1.TXT".
* Short names with illegal characters are created, e.g. "FOO++BAR".
* Debug output does not not consider that the short file name has no
concluding '\0'.
The solution for the following bug is split of into a separate patch:
* Short file names must be unique.
This patch only provides the loop over possible short file names.
Fixes: c30a15e590 ("FAT: Add FAT write feature")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rename function next_cluster() to fat_next_cluster() and export it.
When creating a new directory entries we should reuse deleted entries.
This requires re-scanning the directory.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The FAT specification [1] requires that for a '..' directory entry pointing
to the root directory the fields DIR_FstClusHi and DIR_FstClusLo are 0.
[1] Microsoft FAT Specification, Microsoft Corporation, August 30 2005
Fixes: 31a18d570d ("fs: fat: support mkdir")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition
Voids the need to set such partition as bootable to work with the
'dev:auto' tuple
Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fit images were loaded to a buffer provided by spl_get_load_buffer().
This may work when the FIT image is small and fits between the start
of DRAM and SYS_TEXT_BASE.
One problem with this approach is that the location of the buffer may
be manipulated by changing the 'size' field of the FIT. A maliciously
crafted FIT image could place the buffer over executable code and be
able to take control of SPL. This is unacceptable for secure boot of
signed FIT images.
Another problem is with larger FIT images, usually containing one or
more linux kernels. In such cases the buffer be be large enough so as
to start before DRAM (Figure I). Trying to load an image in this case
has undefined behavior.
For example, on stm32mp1, the MMC controller hits a RX overrun error,
and aborts loading.
_________________
| FIT Image |
| |
/===================\ /=====================\
|| DRAM || | DRAM |
|| || | |
||_________________|| SYS_TEXT_BASE | ___________________ |
| | || FIT Image ||
| | || ||
| _________________ | SYS_SPL_MALLOC_START || _________________ ||
|| malloc() data || ||| malloc() data |||
||_________________|| |||_________________|||
| | ||___________________||
| | | |
Figure I Figure II
One possibility that was analyzed was to remove the negative offset,
such that the buffer starts at SYS_TEXT_BASE. This is not a proper
solution because on a number of platforms, the malloc buffer() is
placed at a fixed address, usually after SYS_TEXT_BASE. A large
enough FIT image could cause the malloc()'d data to be overwritten
(Figure II) when loading.
/======================\
| DRAM |
| |
| | CONFIG_SYS_TEXT_BASE
| |
| |
| ____________________ | CONFIG_SYS_SPL_MALLOC_START
|| malloc() data ||
|| ||
|| __________________ ||
||| FIT Image |||
||| |||
||| |||
Figure III
The solution proposed here is to replace the ad-hoc heuristics of
spl_get_load_buffer() with malloc(). This provides two advantages:
* Bounds checking of the buffer region
* Guarantees the buffer does not conflict with other memory
The first problem is solved by constraining the buffer such that it
will not overlap currently executing code. This eliminates the chance
of a malicious FIT being able to replace the executing SPL code prior
to signature checking.
The second problem is solved in conjunction with increasing
CONFIG_SYS_SPL_MALLOC_SIZE. Since the SPL malloc() region is
carefully crafted on a per-platform basis, the chances of memory
conflicts are virtually eliminated.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
- Series to improve "bootm" by allowing variable evaluation within the
cmdline we would be passing. This will help with Chrome OS but can be
useful elsewhere.
- Improve ATF (TF-A) support within SPL.
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
threshold configuration (Joshua)
Use the full name of firmware self extracting file to make it run.
Also, don't use sudo when not needed.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Remove the parsing of atmel,main-osc-bypass DT property as the SAM9X60
have no support for crystal oscillator bypass. Setting this bit might
affect the device functionality.
Fixes: a64862284f ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.
This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.
Code for emmc is extracted from commit f1a43c84a9 ("arm64: dts: a3720:
add support for espressobin with populated emmc").
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.
As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].
Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM: 2 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In: serial@5a070000
Out: serial@5a070000
Err: serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net: eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot: 0
Functionality wise the following is known to be working:
- eMMC and MMC/SD card
- Ethernet (*)
- GPIOs
- I2C
Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.
* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.
[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Implement board_phys_sdram_size() to automatically detect Verdin iMX8M
Mini DualLite 1GB vs. Verdin iMX8M Mini Quad 2GB.
Note: This only works if we keep using similar RAM chips!
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Now with them first Verdin iMX8M Mini DualLite modules in for bring-up
we got clarity how is_cpu_type() actually behaves.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
The I2C address is 0x25, not 0x35. This according to the datasheet and
tests with a PCA9450A.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the
card clock will be divied by 2 automatically by the host. So need
to first config the DDR_EN correctly, then update the card clock.
This will make sure the actual card clock is as our expected.
IC also suggest config the DDR_EN firstly, then config the clock
divider.
For HS400/HS400ES mode, need to config the strobe dll, this need
to based on the correct target clock rate, so need to do this after
clock rate is update.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Set `bootcause' from b850v3 power management watchdog status.
Boot cause "REVERT" is no longer used, remove it.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Use VPD product ID instead of confidx, so that we can easily reuse the
product ID defines and avoid some magic numbers.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Remove pinmux defines, that are no longer used after
converting the code to devicetree.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Commit f692b479f0 changed the VPD partition name from "vpd" to
"vpd@0". Fix the VPD reader code to use the new name, so that
the VPD code keeps working.
Fixes: f692b479f0 ("i2c: eeprom: Use reg property instead of offset and size")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Fix the following warning:
arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration]
flush_dcache_range(s, e);
^~~~~~~~~~~~~~~~~~
Include cpu_func.h header which declares the flush_dcache_range()
function.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’:
arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type
‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",
Fix those by using "%lu" specified.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects
argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long
long unsigned int}’ [-Wformat=]
Fix those by using %llx
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
This patch fixes this clk issue on I2C on imx8qm
=> i2c bus
Bus 3: i2c@5a830000
=> i2c dev 3
Setting bus to 3
Failed to enable ipg clk
Failure changing bus number (-524)
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.
Adapt board code to remove stuff not needed anymore.
Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.
Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.
It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.
Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.
For example, to substitute the GUID of the kernel partition:
setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
kern_guid=${uuid}"
part uuid mmc 2:2 uuid
bootm
This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present cli_simple_process_macros() requires that the caller provide
an output buffer that is exactly CONFIG_SYS_CBSIZE bytes in length. This
makes sense since it is designed to be used from the command line. But we
also want to use it for bootargs substitution.
Update the function to allow the caller to specify the buffer size. Also
return an error if the buffer is exhausted. The caller can ignore that if
preferred.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present zimage does its own command-line processing and does not
support the 'silent console' feature. There doesn't seem to be any good
reason for this.
Add support for silent console to zimage.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we only support updating the 'bootargs' environment
variable. Add another function to update a buffer instead. This will
allow zimage to use this feature.
Also add a lot more tests to cover various cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present only one transformation is supported: making the Linux console
silent. To prepare for adding more, convert the boolean parameter into a
flag value.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present bootm_process_cmdline_env() reads the 'bootargs' variable and
then writes it back afterwards. This is painful for tests, which would
rather use a simple buffer.
It is also useful for zimage to use a buffer, since it does not actually
put the Linux command line in the bootargs variable.
Refactor the existing code into two pieces. One handles reading and
writing the environment variable, as well as allocating a buffer for use
by the rest of the code, which now operates on a buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the size (including terminator) for in this function, rather than
the length. This is arguably easier to follow, with the coming
refactor.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function will soon do more than just handle the 'silent linux'
feature. As a first step, update it to take a boolean parameter,
indicating whether or not the processing is required.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to add more processing to this function. Before doing so, rename
it to bootm_process_cmdline_env(), which is more generic.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function fails silently on error. Update it to produce
an error code. Report this error to the user and abort the boot, since it
likely will prevent a successful start.
No tests are added at this stage, since additional refactoring is taking
place in subsequent patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function returns 1 on success and 0 on failure. But in
the latter case it provides no indication of what went wrong.
If an attempt is made to delete a non-existent variable, the caller may
want to ignore this error. This happens when setting a non-existent
variable to "", for example.
Update the function to return 0 on success and a useful error code on
failure. Add a function comment too.
Make sure that env_set() does not return an error if it is deleting a
variable that doesn't exist. We could update env_set() to return useful
error numbers also, but that is beyond the scope of this change.
Signed-off-by: Simon Glass <sjg@chromium.org>
wip
The BL31 expects the GIC to be uninitialized. Thus, if we are loading
the BL31 by the SPL we must not initialize it. If u-boot is loaded by
the SPL directly, it will initialize the GIC again (in the same
lowlevel_init()).
This was tested on a custom board with SPL loading the BL31 and jumping
to u-boot as BL33 as well as loading u-boot directly by the SPL. In case
the ATF BL1/BL2 is used, this patch won't change anything, because no
SPL is used at all.
Signed-off-by: Michael Walle <michael@walle.cc>
bl2_to_bl31_params_mem is just an implementation detail of the SPL ATF
support and is not needed anywhere else. Move it from the header to the
actual module.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Move the actual implementation of the bl2_plat_get_bl31_params() to its
own function. The weak function will just call the default
implementation. This has the advantage that board code can still call
the original implementation if it just want to modify minor things.
Signed-off-by: Michael Walle <michael@walle.cc>
There is no need to have the storage available globally. This is also a
preparation for LOAD_IMAGE_V2 support. That will introduce a similar
generator function which also has its own storage.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
There is SPL_ARMV8_SEC_FIRMWARE_SUPPORT and ARMV8_SEC_FIRMWARE_SUPPORT.
Thus use CONFIG_IS_ENABLED() instead of the simple #ifdef.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Activate ARCH_SUPPORT_PSCI as other TEGRA124 target and remove
CONFIG_ARMV7_PSCI and CONFIG_ARMV7_PSCI_NR_CPUS in configs file as they
are migrated in Kconfig.
Select CONFIG_ARMV7_PSCI_0_1 (the first PSCI version),
because CONFIG_ARMV7_PSCI_0_2 and CONFIG_ARMV7_PSCI_1_0
are not activated in this product.
Hi,
This patch depend on the previous serie [1].
I don't test this patch on real hardware but
after this patch the size of the binary don't change.
In .config we have:
CONFIG_ARCH_SUPPORT_PSCI=y
CONFIG_ARMV7_PSCI=y
# CONFIG_ARMV7_PSCI_1_0 is not set
# CONFIG_ARMV7_PSCI_0_2 is not set
CONFIG_ARMV7_PSCI_0_1=y
CONFIG_ARMV7_PSCI_NR_CPUS=4
In u-boot.cfg, this patch only add the 2 lines
#define CONFIG_ARCH_SUPPORT_PSCI 1
#define CONFIG_ARMV7_PSCI_0_1 1
[1] "Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig"
http://patchwork.ozlabs.org/project/uboot/list/?series=184029
Regards
Patrick
END
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Peter Chubb <peter.chubb@data61.csiro.au>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Upstream linux DT naming doesn't align with the U-Boot DT, which may
not always be the case so this allows using BOOTENV_EFI_SET_FDTFILE_FALLBACK
where it might be appropriate for some boards.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
For booting via UEFI we need to define the fdtfile option so
bootefi has the option to load a fdtfile from disk. For arm64
the kernel dtb is located in a vendor directory so we define
that as nvidia for that architecture.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Use gpio_early_init_uart() function to disable RS232 serial transceiver
ForceOFF# pins on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Avoid UART input from floating RX pins on UARTB and UARTC (Colibri T30)
and UARTB, UARTC and UARTD (Apalis T30).
Note: Floating pins may cause spurious break conditions potentially
interrupting U-Boot's autoboot.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Fix SPI1 and UART2/3 resp. UARTB/C pinmuxing.
Note: The former was illegally muxing multiple SoC balls onto the same
internal SoC signal which caused rather strange behaviour regarding
the RS232 serial transceiver ForceOFF# pins as available on Iris.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add pinmuxing comment stating that TRISTATE means the output driver is
tri-stated and INPUT means the input driver is enabled vs. OUTPUT where
it is disabled.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Pull request for UEFI sub-system for next
This pull request adds:
* eventlog support for TCG2_PROTOCOL
* UEFI capusule updates
It replace printf by log in efi_uclass.c
The test can run on sandbox build and it attempts to execute a firmware
update via a capsule-on-disk, using a raw image capsule,
CONFIG_EFI_CAPSULE_RAW.
To run this test successfully, you need configure U-Boot specifically;
See test_capsule_firmware.py for requirements, and hence it won't run
on Travis CI, at least, for now.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
The test can run on sandbox build and it attempts to execute a firmware
update via a capsule-on-disk, using a FIT image capsule,
CONFIG_EFI_CAPSULE_FIT.
To run this test successfully, you need configure U-Boot specifically;
See test_capsule_firmware.py for requirements, and hence it won't run
on Travis CI, at least, for now.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This is a utility mainly for test purpose.
mkeficapsule -f: create a test capsule file for FIT image firmware
Having said that, you will be able to customize the code to fit
your specific requirements for your platform.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
"efidebug capsule" is more or less a debugging utility.
efidebug capsule update: invoke UpdateCapsule against data on memory
efidebug capsule show: show a capsule header
efidebug capsule result: dump a capsule result variable
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In this commit, a very simple firmware management protocol driver
is implemented. It will take a binary image in a capsule file and
apply the data using dfu backend storage drivers via dfu_write_by_alt()
interface.
So "dfu_alt_info" variable should be properly set to specify a device
and location to be updated. Please read README.dfu.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In this commit, a very simple firmware management protocol driver
is implemented. It will take a common FIT image firmware in a capsule
file and apply the data using dfu backend storage drivers via
update_fit() interface.
So "dfu_alt_info" variable should be properly set to specify a device
and location to be updated. Please read README.dfu.
Fit image is a common file format for firmware update on U-Boot, and
this protocol works neatly just as a wrapper for one.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A capsule tagged with the guid, EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID,
is handled as a firmware update object.
What efi_update_capsule() basically does is to load any firmware management
protocol (or fmp) drivers contained in a capsule, find out an appropriate
fmp driver and then invoke its set_image() interface against each binary
in a capsule.
In this commit, however, loading drivers is not supported.
The result of applying a capsule is set to be stored in "CapsuleXXXX"
variable, but its implementation is deferred to a fmp driver.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Memory range capsule gives us a way to notify that some memory regions
should be left untouched across the next reset.
See UEFI specification, section 8.5.3.
Since how we should handle this kind of capsule is totally up to
the system, no implementation will be added in this commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Capsule data can be loaded into the system either via UpdateCapsule
runtime service or files on a file system (of boot device).
The latter case is called "capsules on disk", and actual updates will
take place at the next boot time.
In this commit, we will support capsule on disk mechanism.
Please note that U-Boot itself has no notion of "boot device" and
all the capsule files to be executed will be detected only if they
are located in a specific directory, \EFI\UpdateCapsule, on a device
that is identified as a boot device by "BootXXXX" variables.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In this commit, skeleton functions for capsule-related API's are
added under CONFIG_EFI_UPDATE_CAPSULE configuration.
Detailed implementation for a specific capsule type will be added
in the succeeding patches.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Since update_flash() is used only in update_tftp(), it should be
guarded with appropriate config options.
After the commit 3149e524fc, common/update.c will be built under
either CONFIG_UDATE_TFTP, CONFIG_DFU_TFTP or CONFIG_UPDATE_FIT.
Since CONFIG_UPDATE_FIT, hence fit_update(), doesn't rely on
update_flash(), the compiler may cause an "unused" warning if
CONFIG_UPDATE_FIT=y and CONFIG_UPDATE_TFTP=n and CONFIG_DFU_TFTP=n.
This is, for example, the case for sandbox defconfig where
EFI_CAPSULE_FIRMWARE_FIT is enabled for test purpose.
Fixes: 3149e524fc ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A previous commit is adding EFI_TCG2_PROTOCOL, which in it's eventlog
support registers an EFI configuration table.
Let's add the necessary GUID so 'efidebug table' command can display
table names properly.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
In the previous patches we only introduced a minimal subset of the
EFI_TCG2_PROTOCOL protocol implementing GetCapability().
So let's continue adding features to it, introducing the
GetEventLog() and HashLogExtendEvent() functions.
In order to do that we first need to construct the eventlog in memory,
specifically in EFI_BOOT_SERVICES_DATA memory and a configuration table
from EFI_ACPI_MEMORY_NVS.
U-Boot won't currently add any events to the log or measure any
components, but will expose the necessary EFI APIs for applications
to do so.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
A following patch introduces support for the EFI_TCG2_PROTOCOL
eventlog management.
Introduce the necessary tpm related headers
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
The current tpm2_pcr_extend is hardcoded using SHA256.
Let's make the actual command to the TPM2 configurable so we can support
a wider range of algorithms and keep the current command line as-is i.e
limited to SHA256 only
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use logging functions instead of printf() and debug().
Change logging messages for uclass creation and destruction to log_debug().
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Kontron SMARC-sAL28 board uses that flash.
This is the same change as in the linux commit f3418718c0ec ("mtd:
spi-nor: Add support for w25q32jwm").
Signed-off-by: Michael Walle <michael@walle.cc>
Reported-by: Leo Krueger <leo.krueger@zal.aero>
Since update_flash() is used only in update_tftp(), it should be
guarded with appropriate config options.
After the commit 3149e524fc, common/update.c will be built under
either CONFIG_UDATE_TFTP, CONFIG_DFU_TFTP or CONFIG_UPDATE_FIT.
Since CONFIG_UPDATE_FIT, hence fit_update(), doesn't rely on
update_flash(), the compiler may cause an "unused" warning if
CONFIG_UPDATE_FIT=y and CONFIG_UPDATE_TFTP=n and CONFIG_DFU_TFTP=n.
This is, for example, the case for sandbox defconfig where
EFI_CAPSULE_FIRMWARE_FIT is enabled for test purpose.
Fixes: 3149e524fc ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.
Fixes: a294ead8d2 ("dm: Use an allocated array for run-time device info")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This comment is in the wrong format, so reports an error with
'make htmldocs'. Fix it.
Fixes: b73d61a556 ("x86: zimage: Add a little more logging")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
It seems nobody tested the debug() option in spin_lock_irqsave().
Currently, when #define DEBUG, it spoils the compiler with
In file included from drivers/usb/dwc3/gadget.c:18:
drivers/usb/dwc3/gadget.c: In function ‘dwc3_gadget_set_selfpowered’:
include/log.h:235:4: warning: ‘flags’ is used uninitialized in this function [-Wuninitialized]
235 | printf(pr_fmt(fmt), ##args); \
| ^~~~~~
drivers/usb/dwc3/gadget.c:1347:17: note: ‘flags’ was declared here
1347 | unsigned long flags;
| ^~~~~
and so on...
Drop useless debug() call to make compiler happy.
Fixes: 0c06db5983 ("lib, linux: move linux specific defines to linux/compat.h")
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
timeout should be in "millisecond" instead of second,
so divided it by 1000 when calculate the load value.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
This commit add the support of signature check for config node
in spl/tpl when the function spl_load_simple_fit is used.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
USB clocks were completely forgotten as driver would always return 0 even if clock ID was unknown.
This behaviour changed with "IPQ40xx: clk: dont always return 0" and this will now causes the USB-s to fail probing as clock enable will return -EINVAL.
So to fix that lets add all of the USB clocks to the driver.
Fixes: 430e1dcf ("IPQ40xx: Add USB nodes")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Currently the driver will go through the clock ID-s and set/enable them as needed.
But if the ID is unknown it will fall through the switch case to the default case which will always return 0.
This is not correct and default cases should return a error code since clock ID is unknown.
So lets return -EINVAL instead.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
There is no point in having break statements in the switch case as there is already a return before break.
So lets drop them from the driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Lets convert the driver to use dev_read_addr() instead of the devfdt_get_addr().
While we are here, lets also alphabetise the includes.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Move CONFIG_SYS_PROMPT_HUSH_PS2 in Kconfig, depending
on CONFIG_HUSH_PARSER, and remove the default value defined
in cli_hush.c under __U_BOOT__.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reason to define default option for this macro which is
already done in common/cli_hush.c.
87 #ifndef CONFIG_SYS_PROMPT_HUSH_PS2
88 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
89 #endif
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
CONFIG_TIMESTAMP is not related to the RTC drivers. It does not make any
sense to let the updating of the RTC by the sntp command depend on it.
Drop the CONFIG_TIMESTAMP checks.
Furthermore function dm_rtc_set() is enabled by CONFIG_DM_RTC. There is no
reason to require CONFIG_CMD_DATE when using a driver model RTC. The UEFI
sub-system can consume the RTC functions even if there is not date command.
Only check CONFIG_CMD_DATE when using a non-driver model RTC.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add support for dealing with string operands, including reading a string
from memory into an environment variable and concatenating two strings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Behún <marek.behun@nic.cz>
At present a ulong is used to hold operand values. This means that
strings cannot be used. While most operations are not useful for strings,
concatenation is. As a starting point to supporting strings, convert the
code to use a struct instead of a ulong for operands.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present when more than one substitution is made this function
overwrites its buffers. Fix this bug and update the tests now that they
can pass.
Also update the debug code to show all substrings, since at present it
omits the final one.
Fixes: 855f18ea0e ("setexpr: add regex substring matching and substitution")
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the 'nlen' variable increases with each loop. If the previous
loop had back references, then subsequent loops without back references
use the wrong value of nlen. The value is larger, meaning that the string
terminator from nbuf is copied along to the main buffer, thus terminating
the string prematurely.
This leads to the final result being truncated, e.g. missing the last
(unmatched) part of the string. So "match match tail" become
"replaced replaced" instead of "replaced replaced tail".
Fix this by resetting nlen to the correct value each time around the lop.
Fixes: 855f18ea0e ("setexpr: add regex substring matching and substitution")
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tests to check for buffer overflow using simple replacement as well
as back references. At present these don't fully pass.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function always allocates a large amount of stack, and
selects its own size for buffers. This makes it hard to test the code
for buffer overflow.
Separate out the inner logic of the substitution so that tests can call
this directly. This will allow checking that the algorithm does not
overflow the buffer.
Fix up one of the error lines at the same time, since it should be
printing nbuf_size, not data_size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add tests for the setexpr regex commands.
Note that these tests currently crash on sandbox due to an existing bug in
the setexpr implementation, so two of the tests are commented out.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function assumes that a size of 4 refers to a ulong. This
is true on 32-bit machines but not commonly on 64-bit machines.
This means that the 'l' specify does not work correctly with setexpr.
Add an explicit case for 32-bit values so that 64-bit machines can still
use the 'l' specifier. On 32-bit machines, 64-bit is still not supported.
This corrects the operation of the default size (which is 4 for setexpr),
so update the tests accordingly.
The original code for reading from memory was included in 47ab5ad145
("cmd_setexpr: allow memory addresses in expressions") but I am not adding
a Fixes: tag since that code was not written with 64-bit machines in mind.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these values are open-coded in a few places. Add constants so
the meaning is clear.
Also add a comment to cmd_get_data_size()
Signed-off-by: Simon Glass <sjg@chromium.org>
This command currently has no tests. Add some for basic assignment and the
integer operations.
Note that the default size for setexpr is ulong, which varies depending on
the build machine. So for sandbox on a 64-bit host, this means that the
default size is 64 bits.
Signed-off-by: Simon Glass <sjg@chromium.org>
On more places is used pattern 'command > $@ || rm -f $@'. But it does not
propagate failure from 'command' as 'rm -f' returns success.
Fix it by calling 'false' to correctly propagate failure after 'rm -f'.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
- ProxyDHCP allows a second DHCP server to exist alongside your main
DHCP server and supply additional BOOTP related options
- When u-boot sends out a DHCP request, the real DHCP server will
respond with a normal response containing the new client IP address
while simultaneously the ProxyDHCP server will respond with a blank
client IP address and a `bootfile` option
- This patch adds CONFIG_SERVERIP_FROM_PROXYDHCP (default false) to
enable this behavior and CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS
(default 100) which tells u-boot to wait additional time after
receiving the main DHCP response to give the ProxyDHCP response time
to arrive
- The PXE spec for ProxyDHCP is more complicated than the solution
added here as diagramed on page 16:
http://www.pix.net/software/pxeboot/archive/pxespec.pdf:
```
DHCP Discover will be retried four times. The four timeouts are 4, 8, 16
and 32 seconds respectively. If a DHCPOFFER is received without an Option
timeouts in an attempt to receive a PXE response.
```
- Adding a simple delay worked for my purposes but let me know if a
more robust solution is required
Signed-off-by: Lyle Franklin <lylejfranklin@gmail.com>
As FDTDIR label doesn't specify exact file to be loaded, it should
not fail if no file exists in the directory. In this case try to boot
with internal FDT if it exists.
Signed-off-by: Anton Leontiev <aleontiev@elvees.com>
The origin patch didn't have this change and it was caused by manual
resolution where additional backslash was added.
Fixes: 6723b4c6ca ("binman: Call helper function binman_set_rom_offset() to fill offset")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The test should be checking whether $flags are non-zero and $drv_flags
contain specific flags, however these two sets of flags are separate,
and the two tests should be logically ANDed, not bitwise ANDed.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 6900797678 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") the cros-ec-keyb driver has started using this
command, but the sandbox EC emulator does not recognize it and
continuously prints:
** Unknown EC command 0x67
This patch makes the sandbox driver send basic responses to the command,
but the response only supports keyboard scans for now.
The EC side of this command stores and returns events from a queue, and
returns -EC_RES_UNAVAILABLE when there are no new events. This should be
possible to implement by hooking into the SDL event queue (perhaps via
sandbox_sdl_poll_events). Implementing that is a bit harder to do since
the existing sandbox code is discarding pending keyboard events, then
reading the current keyboard state.
Since the EC emulator never explicitly fails to work on this command,
the fallback to the older command will not trigger and will not be
tested anymore.
Fixes: 6900797678 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present if CROSS_COMPILE contains a tilde, such as
~/.buildman-toolchains/gcc-7.3.0-nolibc/i386-linux/bin/i386-linux-gcc
then binman gives a confusing error:
binman: Error 255 running '~/..buildman-toolchains/gcc-7.3.0- ...
Fix this by expanding it out before running the tool.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a tool to update or insert an Octeon specific header into the U-Boot
image. This is needed e.g. for booting via SPI NOR, eMMC and NAND.
While working on this, move enum cvmx_board_types_enum and
cvmx_board_type_to_string() to cvmx-bootloader.h and remove the
unreferenced (unsupported) board definition.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Using ram_get_info() is complicated and does not work after relocation.
Now that gd->ram_size holds the full RAM size, let's use it instead and
remove the ram_get_size logic completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
With this patch, gd->ram_size now holds to full RAM size detected by the
DDR init code. It introduces the get_effective_memsize() function to
report the maximum usable RAM size in U-Boot to the system instead.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Don't use "platdata_auto_alloc_size" but "priv_auto_alloc_size" instead
to auto allocate the private data struct, which is referenced via
dev_get_priv() in this driver. This fixes an ugly bug detected while
trying to boot via SPI NOR.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Octeon has a specific boot header, when booted via SPI NOR, NAND or MMC.
Here the only 2 instructions are allowed in the first few bytes of the
image. And these instructions need to be one branch and a nop. This
patch adds the necessary nop after the nop, to that the common MIPS
image is compatible with this Octeon header.
The tool to patch the Octeon boot header into the image will be send in
a follow-up patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Pull request for UEFI sub-system for efi-2021-01-rc3 (3)
The following errors are corrected:
* Linux crash when accessing UEFI variables at runtime.
* UEFI variable using standalone MM on 32 bit systems
not working due to missing packing of communication
structure
* NULL dereference when FAT16 root directory is full
* FAT files with a short file name starting with 0xE5 (0x05 in directory
entry) where treated as deleted.
The UEFI SetTime() service is enabled on ARM QEMU.
commit 1fabfeef506c ("efi_loader: parameter check in GetNextVariableName()")
introduces a check using u16_strnlen(). This code is used on EFI
runtime variables as well, so unless we mark it as runtime, the kernel
will crash trying to access it.
Fixes: 1fabfeef506c ("efi_loader: parameter check in GetNextVariableName()")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable EFI_SET_TIME on the sandbox and QEMU ARM to ensure that we compile
and test the relevant code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Using constants instead of anonymous numbers increases code readability.
Fixes: 704df6aa0a ("fs: fat: refactor write interface for a file offset")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
0x05 is used as replacement letter for 0xe5 at the first position of short
file names. We must not skip over directory entries starting with 0x05.
Cf. Microsoft FAT Specification, August 30 2005
Fixes: 39606d462c ("fs: fat: handle deleted directory entries correctly")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When trying to create a file in the full root directory of a FAT32
filesystem a NULL dereference can be observed.
When the root directory of a FAT16 filesystem is full fill_dir_slot() must
return -1 to signal that a new directory entry could not be allocated.
Fixes: cd2d727fff ("fs: fat: allocate a new cluster for root directory of fat32")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At present if CONFIG_RESET is not enabled, this code shows a warning:
designware_i2c_ofdata_to_platdata() i2c_designware_pci i2c2@16,0:
Can't get reset: -524
Avoid this by checking if reset is supported, first.
Fixes: 622597dee4 ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Glass <sjg@chromium.org>
The hidden I2C slave is also present on the Armada 8k AP806. Testing
shows that this I2C slave causes the same issues as Armada 38x.
Disabling that I2C slave fixes all these issues.
I2C blocks on the Armada 8k CP110 are not affected.
Extend the I2C slave disable to Armada 8k as well.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Regulator can be set to "always-on".
It's not error about enable/disable. It needs to check about
its condition.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
For eMMC HS400 mode, the DLL reset is a required step for mmc rescan.
This step has not been documented in reference manual, but the RM will
be fixed sooner or later.
In previous commit to support eMMC HS400,
db8f936 mmc: fsl_esdhc: support eMMC HS400 mode
the steps to configure DLL could be found in commit message,
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
14. Wait for delay chain to lock.
these would be fixed as,
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
13.1 Write DLLCFG0[DLL_RESET] to 1 and wait for 1us,
then write DLLCFG0[DLL_RESET]
14. Wait for delay chain to lock.
This patch is to add the step of DLL reset, and make sure delay chain
locked for HS400.
Fixes: db8f93672b ("mmc: fsl_esdhc: support eMMC HS400 mode")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
All of the existing quirks add retries to various calls of mmc_send_cmd.
mmc_send_cmd_quirks is a helper function to do this retrying behavior. It
checks if quirks mode is enabled, and if a specific quirk is activated it
retries on error.
This also adds mmc_send_cmd_retry, which retries on error every time
(instead of if a quirk is activated).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
The AT91 architecture now has two possible timer blocks, the old PIT timer
and the new PIT64B.
The timer.c file has an old non DM driver that works for platforms
that do not use the ATMEL_PIT_TIMER DM-based driver.
Update the Makefile to select this old driver in case neither of the
ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected.
Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older
at91 clock.c driver. Remove it from the compilation list and adapt cpu.c
arch_cpu_init() to avoid calling at91_clock_init() which is wrong
anyway.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Align the pin setup for sdhci0 with linux kernel.
This means to have slew rate enable and high drive strength.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
If the clock driver does not offer a clk_enable ops, then the system will
return -ENOSYS.
The clk_enable works with CCF (common clock framework).
Some clocks in some cases (like the generic clock for some products: sama5d2)
do not have the clk_enable primitive, and in this case probing of the driver
will fail.
This patch changes the behavior to return an error in case there is really
an error, and not a missing primitive.
If the clock driver does not have an enable primitive, most likely clocks
are always enabled or enabled in the set_rate primitives.
Fixes: 81f16438d4 ("mmc: atmel-sdhci: enable the required generic clock")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
- STM32 MCU's DT update
- Add DHCOM based STM32MP15x PicoITX board
- Correct ALIGN macro usage for on syram for SPL dcache support
- Fixes on DHCOM: uSD card-detect GPIO and Drop QSPI CS2
- Fix compilation issue for spl_mmc_boot_partition
- Fix MTD partitions for serial boot
- Add support of MCU HOLD BOOT with reset for stm32 remoteproc
(prepare alligneent with kernel DT)
- Correct bias information and support in STM32 soc and STMFX
- Support optional vbus in usbphyc
- Update FIT examples to avoid kernel zImage relocation before decompression
Update kernel load address for FIT examples to avoid relocation:
- Kernel example uses Image.gz with U-Boot gzip decompression
at final kernel location 0x0xC0008000.
- Copro example loads zImage at a correct location (0xC4000000),
to avoid zImage relocation before decompression by kernel code.
An other solution to avoid zImage relocation is to align
the kernel load and entry address with the real location in FIT
(the relocation of zImage is skipped in U-Boot bootm command for
identical address) but it is less flexible because this offset
depends on FIT content:
For example:
## Loading kernel from FIT Image at c2000000 ...
Using 'ev1' configuration
Trying 'kernel' kernel subimage
Description: Linux kernel
Created: 2020-10-22 9:08:32 UTC
Type: Kernel Image
Compression: uncompressed
Data Start: 0xc20000cc
The kernel offset in FIT is 0xCC in FIT and zImage is decompressed at
0xC0008000 by kernel code:
kernel {
description = "Linux kernel";
data = /incbin/("zImage");
type = "kernel";
arch = "arm";
os = "linux";
compression = "none";
load = <0xC20000cc>;
entry = <0xC20000cc>;
hash-1 {
algo = "sha1";
};
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch adds support for optional vbus regulator.
It is managed on phy_power_on/off calls and may be needed for host mode.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Update pin name to avoid duplicated name with SOC GPIO
gpio0...gpio15 / agpio0....agpio7: add a stmfx prefix.
This pin name can be used in pinmux command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The device name is used in pinmux command and in log trace
so it is better to use the parent parent name ("stmfx@42" for
example) than a generic name ("pinctrl" or "stmfx-gpio")
to identify the device instance.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use the bias configuration for all the GPIO configurations and not
only for input GPIO, as indicated in Reference manual
(Table 81. Port bit configuration table).
Fixes: 43efbb6a3e ("gpio: stm32: add ops get_dir_flags")
Fixes: f13ff88b61 ("gpio: stm32: add ops set_dir_flags")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Display the bias information for input gpios or AF configuration,
and not only for output pin, as described in Reference manual
(Table 81. Port bit configuration table).
Fixes: da7a0bb1f2 ("pinctrl: stm32: add information on pin configuration")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The coprocessor is running as soon as the hold boot is de-asserted.
So indicate this running state and save the resource table even
if the protective assert, to avoid autonomous reboot, is failed.
This error case should never occurs.
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use the reset function to handle the hold boot bit in RCC
with device tree handle with MCU_HOLD_BOOT identifier.
This generic reset allows to remove the two specific properties:
- st,syscfg-holdboot
- st,syscfg-tz
This patch prepares alignment with kernel device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Handle the register RCC_MP_GCR without SET/CLR registers
but with a direct access to bit BOOT_MCU:
- deassert => set the bit: The MCU will not be in HOLD_BOOT
- assert => clear the bit: The MCU will be set in HOLD_BOOT
With this patch the RCC driver handles the MCU_HOLD_BOOT_R value
added in binding stm32mp1-resets.h
Cc: Fabien DESSENNE <fabien.dessenne@st.com>
Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Remove the update of the MTD partitions in kernel device tree
for serial boot (USB / UART), and the kernel will use the MTD
partitions define in the loaded DTB because U-Boot can't known the
expected flash layout in this case.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
spl_mmc_boot_partition is only defined when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is defined.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Correct the ALIGN macro usage in mmu_set_region_dcache_behaviour
call: the address must use ALIGN_DOWN and size can use ALIGN macro.
With STM32_SYSRAM_BASE=0x2FFC0000 and MMU_SECTION_SIZE=0x100000 for
STM32MP15x the computed address was 30000000 instead of 2ff00000.
Fixes: 43fe9d2fda ("stm32mp1: mmu_set_region_dcache_behaviour")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Commit 4b2be78ab6 ("time: Fix get_ticks being non-monotonic")
puts in evidence that get_ticks is called before timer initialization.
Fix it by initializing timer before relocation.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"),
skeleton.dtsi file is no more included.
This synchronization is needed to avoid to get 2 memory node
in DTB file if, in DTS file, memory node is declared with the correct
syntax as following:
memory@90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Then in DTB, we will have the 2 memory nodes, which is incorrect and
cause misbehavior during DT parsing by U-boot:
memory {
device_type = "memory";
reg = <0x00 0x00>;
};
memory@90000000 {
device_type = "memory";
reg = <0x90000000 0x800000>;
};
Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1.
When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize()
API, first above memory node is found (with reg = <0x00 0x00>), so
gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and
gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
If CONFIG_PHY is not enabled then the dwc3_setup_phy()
returns ENOTSUPP which can be still valid and intentional
so modify error check to handle this -ENOTSUPP.
The same error handling exists in drivers/usb/host/xhci-dwc3.c already
added by commit d648a50c0a ("dwc3: move phy operation to core.c").
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On some board, the ID pin is not connected so the B session must be
overridden with "u-boot,force_b_session_valid" but the VBus sensing
must continue to be handle.
To managed it, this patch adds a new DT field
"u-boot,force-vbus-detection" to use with "u-boot,force_b_session_valid"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This driver supports both RZ/G2H and R-Car H3 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3
(R8A7795) is not enabled
Based on the similar patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.
Based on the simialr patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.
Based on the similar patch on Linux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.
PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Pull request for UEFI sub-system for efi-2021-01-rc3 (2)
The parameter check for UEFI service GetNextVariableName() is corrected.
The dependencies of CONFIG_DFU_TFTP are simplified.
The set of supported hash algorithms reported by the EFI_TCG2_PROTOCOL is
corrected.
If GetNextVariableName() is called with a non-existing combination of
VariableName and VendorGuid, return EFI_INVALID_PARAMETER.
If GetNextVariableName() is called with a string that is not zero
terminated, return EFI_INVALID_PARAMETER.
Reformat a line over 80 characters.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Since CONFIG_UPDATE_COMMON always selects CONFIG_DFU_WRITE_ALT, we can
drop the latter from dependencies of CONFIG_DFU_TFTP.
Fixes: 3149e524fc ("common: update: add a generic interface for FIT
image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Xilinx changes for v2021.01-rc3
Microblaze:
- Enable GC
- Get rid of xparameters.h and switch to DT for CFI
- Fix config file
tpm:
- Fix TPM code
zynqmp:
- Enable TPM by default
- Remove unused macros
fru:
- Several fixes especially use limit for recording
If customs fields in board area are used it will likely go over allocated
space in struct fru_board_data. That's why calculate limit of this
structure to make sure that different data is not rewritten by accident.
When limit is reached stop to record fields.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
capture variable is bool which is just one byte and it is just causing
unaligned accesses. Better to have it as last entry in the structure.
It also simplify offset calculation for initial header copy.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to have these macros. But record offsets of missing
register in the structure for future use.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need for GD to be used and priv variable is unused.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove fixed configuration and detect flash based on DT.
Also increase amount of flash sectors to 2048 because on kc705 flash has
1027 sectors.
Bank # 1: CFI conformant flash (16 x 16) Size: 128 MB in 1027 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8962
Erase timeout: 4096 ms, write timeout: 2 ms
Buffer write timeout: 5 ms, buffer size: 1024 bytes
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
XIP is not enabled in SPL. SPL_NOR is enabled but any macro setting with
using SYS_FLASH_BASE are wrong because it is not aligned with DM.
That's why change these macro and align them with TEXT_BASE macro.
Information should be find at run time based on DT but implementation is
not done yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to use this file anymore. Include it in main config file
and simplify logic based on it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable caches by default. For now just simplify config file but it should
be read from DT or PVRs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
A lot of configs has been moved to Kconfig and it ends up in ifdef mess
with no bodies. That's why remove all of them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
GCC's garbage collector works for Microblaze for quite a long time but none
has enabled it.
The same change has be done for example by commit fac4790491 ("arc:
Eliminate unused code and data with GCC's garbage collector").
Before:
text data bss dec hex filename
588760 33592 39192 661544 a1828 u-boot
After:
text data bss dec hex filename
504504 32164 38608 575276 8c72c u-boot
Which saves almost 15% of memory footprint.
Also group symbols/functions to proper section.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
offset is the offset in the file read, not the offset in the destination
buffer.
If the offset is not null, this will lead to a memory corruption.
So, for now, we are returning an error if the offset is used.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
sqfs_decompressor_init() returns a value, so it's better to use it than
to force the return value to EINVAL (it could be ENOMEM)
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Resetting the context on error will prevent some checks like:
if (!ctx.cur_dev)
To pass when the probe method has failed
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
finfo.blk_sizes may not be freed in case of error in the for loop
Setting it to null and freeing it at the end makes prevents that from
happening.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
if sqfs_tokenize(rel_tokens, rc, rel); fails, the function exits
without freeing the array base_tokens.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
the return value of sqfs_tokenize(rel_tokens, rc, rel); wasn't checked.
(but "ret" value was !)
This is obviouly a typo.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
sqfs_closedir() should be called to free memory allocated by
sqfs_opendir()
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
path, target, res, rem and sym_tokens were not free on error nor success.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Using only one label permits to prevents bugs when moving code around.
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
add missing squashfs function to prevent dangling or null pointers.
For exemple, when calling test [ -e somefile ], squashfs.exists may be
called.
Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com>
In show_dir() if we hit a ROOT_ITEM, we can exit with uninitialized
@ret.
Fix it by initializing it to 0.
Reported-by: Coverity CID 312955
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
In btrfs_lookup_path() the local variable @type should always be updated
after we hit any file/dir.
But if @filename is NULL from the very beginning, then we don't
initialize it and return it directly.
To prevent such problem from happening, we initialize @type to
BTRFS_FT_UNKNOWN.
For normal execution route, it will get updated for each filename we
resolved.
Buf if we didn't find any path, we check if the type is still FT_UNKNOWN
and ret == 0. If true we know there is something wrong, just return
-EUCLEAN to inform the caller.
Reported-by: Coverity CID 312958
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
I've created a squashfs file system with Yocto (it use squashfs-tools)
and u-boot command sqfsls give the error:'Error while searching inode:
unknown type.'
After some digging in the code I found that the index is off by 1.
This patch fix this issue and I can successful use the sqfsls command.
After search for the squashfs format I found a link talk about a
similar issue but this time in the documentation. The link is:
https://github.com/AgentD/squashfs-tools-ng/commit/e6588526838caece9529
Signed-off-by: Gerard Koskamp <gerard.koskamp@nedap.com>
Tested-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
This change sets the output (hardware) polarity register instead of the
input (software) polarity register for the bcm6858 LED controller. The
logic was inverted (a LED configued active high behaved as active low).
Signed-off-by: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Also change back SYS_MEMTEST_END to 0x00f00000. 0xe00000 was wrong and
introduced due to the global Kconfig migration of this option in u-boot.
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
The -i option of the dumpimage tool has been removed so it should no
longer be documented in the README file. Refer readers to the tool's
help output rather than maintain a copy of the usage in the README.
Finally, adjust the example dumpfile invocation in imagetool.h to use
the -o option instead of the removed -i option.
Fixes: 12b831879a ("tools: dumpimage: Simplify arguments")
Signed-off-by: Tyler Hicks <tyhicks@linux.microsoft.com>
Cc: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Martyn Welch <martyn.welch@collabora.com>
In the function get_random_data, strerrno is called with
the variable ret (which is the return of the function
clock_gettime). It should be called with errnor. This
commit fixes this mistake.
Reported-by: Coverity (CID: 312956)
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
According to the manpage of rand, it is recommended
to use random instead of rand. This commit updates
the function get_random_data to use random.
Reported-by: Coverity (CID: 312953)
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Re-submitted because of missing description and signed-off.
flags reset in board_init caused bugs when executing command like editenv
because the reallocated flag was lost.
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Signed-off-by: Arnaud Aujon Chevallier <arnaud@intelibre.fr>
The function mmc_offset_try_partition searches the MMC partition for
locating environment data, by comparing the partition names with config
"u-boot,mmc-env-parition". However, it only compares the first word-size
bytes (size of 'const char *'), which may make the function to find
unintended partition.
Correct the function not to partially compare the partition name with
config "u-boot,mmc-env-partition".
Fixes: c9e87ba665 ("env: Save environment at the end of an MMC partition")
Signed-off-by: Hoyeonjiki Kim <jigi.kim@gmail.com>
Reviewed-by: Wolfgang Denk <wd@denx.de>
I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and
IE_INV set, but I2C cannot have those bits set. This adds a separate
default for SCCB.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
How to add an emulated disk to QEMU may not be known to the user.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Allow attaching a virtual SATA disk to QEMU RISC-V by implying
AHCI, AHCI_PCI, CMD_SCSI, DM_SCSI, PCI_INIT_R, SCSI, SCSI_AHCI.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Sort implied options in BOARD_SPECIFIC_OPTIONS in the same sequence as in
.config.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
This commit imports device tree files that are related to Allwinner V3
series from Linux commit 3650b228f83a ("Linux 5.10-rc1").
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The reference design of Allwinner V3 series uses an
AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the
first community-available V3s board, Lichee Pi Zero, omitted it.
Allow to introduce support for the PMIC on boards with it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
A new compatible string is introduced for V3 CCU, because it has a few
extra features available.
Add the compatible string to the clock driver. As the extra features are
not touched, just share the description struct now.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
A new compatible string is introduced for V3 GPIO, because it has more
pins available than V3s.
Add the compatible string to the GPIO driver.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Allwinner V3/Sochip S3 uses the same die with Allwinner V3s/S3L, but V3 comes
with no co-packaged DDR (DDR3 is usually used externally), and S3L comes
with co-packaged DDR3.
Add support for Allwinner V3/S3 chips by add SoC names to original V3s
choice, and allow to select DDR3.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The PinePhone is a smartphone produced by Pine64, with an A64 SoC,
2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel,
and Quectel EG25-G modem.
There are two main board revisions: 1.1 for early adopters, and 1.2
for mass production. Since there is code to detect the board revision
at boot, one config/image can support both boards.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Import updated device trees from Linux tag v5.9. This picks up new
hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI
files for the Pinebook and the Teres-I, since the ANX6345 bridge is
now supported upstream.
A couple of headers needed updates for recently-added hardware support.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE.
This meant that, regardless of the DT chosen by SPL (either by changing
the header in the image or by the selection code at runtime), Linux
always used the default DT.
By using the name from the SPL header (which, because of the previous
commit, always matches the DT used by U-Boot proper), Linux also sees
the same board as U-Boot/SPL, even if the boot script later loads a DT
from disk.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: remove no longer needed CONFIG_SPL_LOAD_FIT guards]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This overwrites the name loaded from the SPL image. It will be different
if there was previously no name provided, or if a more accurate name was
determined by the board variant selection logic. This means that the DT
name in the SPL header now always matches the DT appended to U-Boot.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: move function under CONFIG_SPL_LOAD_FIT guard]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
There are two different publicly-released revisions of the PinePhone
hardware, versions 1.1 and 1.2; and they need different device trees.
Since some GPIO pins were rerouted, we can use that to distinguish
between them.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Instead of using an entirely separate matching algorithm, simply update
the name of the DT we want to match. Enabling this logic does not depend
on the FIT config name, only on the initial guess of the board name.
Importantly, the initial guess must be "sun50i-a64-pine64-plus", because
otherwise the logic would trigger when "sun50i-a64-pine64-lts" was
written to the SPL header.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This moves the validity checking and typecasts all to one place away
from the string comparison logic, and it detangles the compile-time
and runtime control flow.
The new helper will also be used by U-Boot proper in a future commit.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[Andre: protect new function with CONFIG_SPL_LOAD_FIT]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The variable "cmp_str" always leaves me wondering if it is the DT name
of the current board (yes) or DT name in the FIT config entry (no).
In preparation for expanding the functionality here, rename it to
something that obviously means "this is the DT name we are looking for".
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
- Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
- fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
- Fix USB support for rk3399 Pinebook Pro;
- Fix SPI boot for rk3399 boards other than Bob;
- Fix 32bit boards firmware build without SPL_OPTEE support;
- Fix rockchip display driver license;
onenand_probe() function is missing to set mtd->type. So set same type as
which sets onenand Linux kernel driver.
After this change 'mtd list' prints correct type instead of 'Unknown'.
Signed-off-by: Pali Rohár <pali@kernel.org>
set_gpmc_cs0() sets wrong timings and size for Nokia N900 onenand flash.
Fix that by setting the correct timings and size from the board code
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
Include emmc/nand suffix into bootmenu script names and fix leaking sleep
processes when asynchronously waiting for them. 'wait -n' is not provided
by /bin/sh, so run script under bash.
Signed-off-by: Pali Rohár <pali@kernel.org>
After commit d5243359e1 ("OMAP24xx I2C: Add support for set-speed")
U-Boot is unstable to reset lp5523 led. That commit added pooling for i2c
poll ARDY bit which apparently is never set. It is not known what is
happening here.
Purpose of resetting lp5523 led in Nokia RX-51 code is just to turn off
very bright led which is powered on by NOLO and expects next boot image
(kernel or U-Boot) to turn it off.
After testing we observed that just disabling lp5523 led is working fine.
So as a workaround to this ARDY bit i2c issue we disable lp5523 led instead
of resetting it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
After commit 04a2ea248f ("mmc: disable UHS modes if Vcc cannot be
switched on and off") U-Boot started crashing on Nokia RX-51 while
initializing mmc and caused reboot loop.
It looks like that some clocks were not enabled and this patch fixes U-Boot
mmc crash.
Signed-off-by: Pali Rohár <pali@kernel.org>
Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
By default CONFIG_LOGLEVEL seems to be set to 4 which is
too low and doesn't show dev_info/dev_notice/dev_warn
messages on console. This has been deliberately set low
globally to be conservative setting across the board due to
primary bootloader size limitations. It is best to tune
per board config as per user needs.
On K3 we have separate SPL and u-boot configs so we
can afford to set u-boot CONFIG_LOGLEVEL to 7.
On AM65 this patch causes u-boot.img size to change from
932KB to 940KB with 1 line additional print during
MMC boot. i.e. details of Net subsystem
"Net: K3 CPSW: nuss_ver: 0x6BA00102 cpsw_ver: 0x6BA80102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000"
Similar 8KB difference was seen on J721E.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Function twl4030_i2c_read() is like twl4030_i2c_read_u8() but instead of
single value it rather returns array of values.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
With commit 6900797678 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") check_for_keys() tries to read keyboard
strokes using EC_CMD_GET_NEXT_EVENT. But the sandbox driver does
not understand this command. We need to reply with
-EC_RES_INVALID_COMMAND to force check_for_keys() to fall back to
use EC_CMD_MKBP_STATE. Currently the driver prints
** Unknown EC command 0x67
in this case. With the patch the message is suppressed.
In a future patch we should upgrade the sandbox driver to provide
EC_CMD_GET_NEXT_EVENT support.
Fixes: 6900797678 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Erasing the flash can take over a second on some devices and the EC is
not responsive during this time. Update the timeout to 5 seconds to cope
with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The EC now requires that the offset field be set correctly when checking
on hash status. Update the code to handle this. Use the same message
struct in both functions to reduce stack space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a commit tag to allow the Patchwork URL to be specified in a commit.
This can be handy for when you submit code to multiple projects but don't
want to use the -p option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an argument to allow specifying the the patchwork URL. This also adds
this feature to the settings file, either globally, or on a per-project
basis.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new argument to allow the URL of the patchwork server to be
speciified. For now this is hard-coded in the main file, but future
patches will move it to the settings file.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present values from the settings file are only applied to the main
parser. With the new parser structure this means that some settings are
ignored.
Update the implementation to set defaults across the main parser and all
subparsers. Also fix up the comments, since ArgumentParser is being used
now.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present patman tries to assume a default subcommand of 'send', to
maintain backwards compatibility. However it does not cope with
arguments added to the default command, so for example 'patman -t'
does not work.
Update the logic to handle this. Also update the CC command to use 'send'
explicitly, since otherwise patman gets confused with the patch-filename
argument.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-01-rc3
A part of the EFI_TCG2_PROTOCOL is implemented.
A unit test is supplied.
The following bugs are fixed:
* incorrect buffer size in efi_file_setinfo() leading to creash in SCT
* a crash in UEFI selftest on the sandbox due to removed drivers
* missing newlines in log message for the UEFI RNG driver
Since U-boot EFI implementation is getting richer it makes sense to
add support for EFI_TCG2_PROTOCOL taking advantage of any hardware TPM
available on the device.
This is the initial implementation of the protocol which only adds
support for GetCapability(). It's limited in the newer and safer
TPMv2 devices.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A following patch introduces EFI_TCG2_PROTOCOL.
Add the required TPMv2 headers to support it.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When copying a string with must allocate a byte for the terminating '\0' in
the target buffer.
Fixes: fbe4c7df00 ("efi_loader: enable file SetInfo()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add missing newline to log messages in efi_rng_register() otherwise
something like below would be shown
Scanning disk virtio-blk#31...
Found 2 disks
Missing RNG device for EFI_RNG_PROTOCOLNo EFI system partition
Signed-off-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When calling ExitBootServices during out unit tests we should not detach
devices as we need console output for runtime tests.
Fixes: 529441ca89 ("efi_loader: Disable devices before handing over control")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rockchip has many 32bit SoCs and some of them are support SPL_OPTEE now,
only boards with SPL_OPTEE support can fit BINMAN well, other boards
will fail at initr_binman() in U-Boot proper after below patch,
eg. rv1108 board.
83187546ae binman: Support multiple images in the library
Fixes: 79030a4861 ("rockchip: Add Single boot image (with binman, pad_cat)")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Commit c4cea2bbf9 ("rockchip: Enable building a SPI ROM image on bob")
added an alias spi1 referring to spi@ff1d0000, however there was already
an alias spi0 referring to the same node in rockpro64's u-boot.dtsi, and
having both aliases present broke booting from SPI flash for this board.
Remove the spi0 alias, set the default bus for SPI flash to 1, and
enable support for numbered aliases in SPL so that it uses the same bus
numbering as U-Boot proper. This fixes booting from U-Boot in SPI flash
on the rockpro64 board.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bbf9 ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Commit fe97471632 ("rockchip: rk3288: Allow setting up clocks in
U-Boot proper") fixes some clock issues when chainloading U-Boot on
rk3288 chromebooks. Part of that change is still available in veyron's
board_early_init_r() function. Since chain-loading U-Boot proper from
vendor firmware is possible on gru boards as well, do the same thing for
them too.
On rk3399, this needs to detect whether SPL was run via handoff, so
enable that and bloblist kconfigs it needs for chromebook_bob.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
It's possible to chainload U-Boot proper from the vendor firmware in
rk3399 chromebooks, but the way the vendor firmware sets up clocks is
somehow different than what U-Boot expects. This causes the display to
stay devoid of content even though vidconsole claims to work (with
patches in process of being upstreamed).
This is meant to be a rk3399 version of commit d3cb46aa8c ("rockchip:
Init clocks again when chain-loading") which can detect the discrepancy,
but this patch instead checks whether SPL (and therefore the clock init)
was run via the handoff functionality and runs the init if it was not.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
In order to enable the Amlogic SM1 MMC controller fix, we need to add a u-boot specific
MMC controller compatible.
This adds a new meson-sm1-u-boot.dtsi and reworks the other -u-boot.dtsi
to use this for SM1 based boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Amlogic SM1 SoCs doesn't work over 50MHz. When phase sets to 270', it's
working fine over 50MHz on Amlogic SM1 SoCs.
Since Other Amlogic SoCs doens't report an issue, phase value is using
to 180' by default.
To distinguish which value is used adds an u-boot only sm1 compatible.
In future, it needs to find what value is a proper about each SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Move the asm/arch-meson/sd_emmc.h to a local meson_gx_mmc.h,
remove the useless if/then and fix the meson_gx_mmc.c include.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This is a combination of upstream libfdt commits to fix warnings about
comparing signed and unsigned integers:
==========
scripts/dtc/libfdt/fdt.c: In function ‘fdt_offset_ptr’:
scripts/dtc/libfdt/fdt.c:137:18: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if ((absoffset < offset)
...
==========
For a detailed description of the fixes, see the dtc repo:
https://git.kernel.org/pub/scm/utils/dtc/dtc.git/log/?id=73e0f143b73d808
For this patch the commits between 73e0f143b73d8088 and ca19c3db2bf62000
have been combined and adjusted for the slight differences in U-Boot's
libfdt code base.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
- Avoid using hardcoded number of variable range MTRRs in mtrr_commit()
- coral: Correct max98357 file
- coral: Update smbios tables to latest definition
The accepted binding uses multiple nodes, one for each table type. Update
coral accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since commit 29d2d64ed5 ("x86: Add support for more than 8 MTRRs"),
the maximum number of variable range MTRRs was increased from 8 to 10.
On the BayTrail platform there are only 8 variable range MTRRs. In
mtrr_commit() it still uses MTRR_MAX_COUNT which caused a #GP during
VESA video driver probe. It should have been updated to use dynamically
probed number.
This fixes the boot failure seen on Intel Minnow Max board.
Fixes: 29d2d64ed5 ("x86: Add support for more than 8 MTRRs")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The following bugs are fixed:
* The conitrace command failed to build.
* Non-volatile UEFI variables were not delete form the file store.
The following features are added:
* Support for the FN1 - FN10 keys on crosswire keyboards is added.
* An EFI binary is provided to dump the binary device tree.
tpm2_get_capability() is adjusted in preparation of the implementation
of the EFI_TCG2_PROTOCOL.
after commit 4ab3817ff1 ("clk: fixed-rate: Enable DM_FLAG_PRE_RELOC flag")
Cubieboard7 (based on actions S700 SoC) fails to boot.
It is due to the fact that the default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
would not provide enough memory for clock device to probe (before relocation)
well.
This commit fixes it, by increasing SYS_MALLOC_F_LEN to value 0x2000.
Suggested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
In case there is an EEPROM attached to the KS8851 MAC and the EEPROM
contains a valid MAC address, the MAC address is loaded into the NIC
registers on power on. Read the MAC address out of the NIC registers
and provide it to U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
For implementing the EFI_TCG2_PROTOCOL we need the count field returned by
the TPM when reading capabilities via tpm2_get_capability().
Adjust the implementation of the 'tpm2 get_capability' command accordingly.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For validating the fixed up device tree we need a tool to need to save it
to a file.
dtbdump.efi copies the configuration table with the device tree to a file
on the same partition from which dtbdump.efi was invoked. The file name can
be entered on the console.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When deleting a non-volatile variable it was deleted from memory but the
deletion was not persisted to the file system.
SetVariable() may be called with attributes == 0 to delete a variable. To
determine if the deletion shall be persisted we have to consider the
non-volatile flag in the attributes of the deleted variable and not the
value passed in the call parameter.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Chromebooks and the sandbox use a crosswire keyboard with function keys
FN1 - FN10. These keys are needed when running UEFI applications like GRUB
or the UEFI SCT.
Add support for these keys when translating from key codes to
ECMA-48 (or withdrawn ANSI 3.64) escape sequences.
All escape sequences start with 0x1b. So we should not repeat this
byte in the kbd_to_ansi364 table.
For testing use:
sandbox_defconfig + CONFIG_EFI_SELFTEST=y
$ ./u-boot -D -l
=> setenv efi_selftest extended text input
=> bootefi selftest
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This command was missed when renaming getc() to getchar().
Fixes: c670aeee3d ("common: rename getc() to getchar()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests
- meson64_android: don't show logo on ROM USB boot
- doc: update support matrix and fix vim3/l build instructions
- meson64: relocate config_distro_bootcmmd header
- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
default sysinfo driver
Calling 'make V=1 all' on Ubuntu 18.04 with gcc version 9.2.1 and GNU Make
version 4.1 fails on error:
scripts/Kbuild.include:220: *** Recursive variable 'echo-cmd' references itself (eventually). Stop.
As a workaround expand 'echo-cmd' variable via 'call' construction instead
of expanding it directly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Fixes: ae897022d7 ("Makefile: Fix u-boot-nodtb.bin target")
Now that we can use devicetree to specify this information, drop the old
CONFIG options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a file containing defaults for these, using the existing CONFIG
options. This file must be included with #include since it needs to
be passed through the C preprocessor.
Enable the driver for all x86 boards that generate SMBIOS tables.
Disable it for coral since it has its own driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reword the commit message a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add settings and enable the default sysinfo driver so that these can come
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards want to specify the manufacturer or product name but do not
need to have their own sysinfo driver.
Add a default driver which provides a way to specify this SMBIOS
information in the devicetree, without needing any board-specific
functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add information about how to set SMBIOS properties using the devicetree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The current tables only support a subset of the available fields defined
by the SMBIOS spec. Add a few more.
We could use CONFIG_SYS_CPU or CONFIG_SYS_SOC as a default for family, but
the meaning of that value relates more to the whole system rather than
just the SoC.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Support a way to put SMBIOS properties in the device tree. These can be
placed in a 'board' device in an 'smbios' subnode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As a first step to obtaining SMBIOS information from the devicetree, add
an ofnode parameter to the writing functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a simple binding file for this, so that it is clear what this binding
directory is for.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.
In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.
The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.
Rename everything accordingly.
Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Much of the output is not very useful. The bootm command is quite a bit
quieter. Convert some output to use log_debug().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
With Chrome OS the kernel setup block is stored in a separate place from
the kernel, so it is not possible to access the kernel version string.
At present, garbage is printed.
Add a sanity check to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the top of available DRAM is the same as the top of the range
of the low-memory MTRR.
In fact, U-Boot is allowed to use memory up until the start of the FSP
reserved memory. Use that value for low_end, since it makes more memory
available.
Keep the same calculation as before for mtrr_top, i.e. the top of
reserved memory.
A side-effect of this change is that the E820 tables have a single entry
that extends from the bottom of the memory used by U-Boot to the bottom
of the FSP reserved memory. This includes the bloblist, if ACPI tables
are placed there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This is useful when using Linux's earlycon since the MMIO address must be
provided on some platforms, e.g.:
earlycon=uart8250,mmio32,0xddffc000,115200n8
However this is only for debugging, so don't show it by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This table is not needed if a v2 TPM is in use. Add a condition to avoid
adding it when not needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Quite a few log_info() calls are included in the x86 code which should use
log_debug() instead. Convert them to reduce unwanted output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use log_debug() instead of debug() in this file, to enable the extra
features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a script to boot Chrome OS from the internal MMC. This involved adding
a few commands and options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Set up a few fields necessarily to make Chrome OS boot without showing a
firmware error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present CONFIG_CHROMEOS is used to determine whether verified boot is
in use. The code to implement that is not in U-Boot mainline.
However, it is useful to be able to boot a Chromebook in developer mode
in U-Boot mainline without needing the verified boot code.
To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
should be used, and CONFIG_CHROMEOS to indicate that the board supports
Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is not possible to boot Chrome OS properly without passing some basic
information from U-Boot. This applies even if verified boot is not being
used. Add a structure definition for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present if SSDT and DSDT code is created, only the latter is retained
for examination by the 'acpi items' command. Fix this by only resetting
the list when explicitly requested.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The current implementation for DSDT tables is not correct for the case
where there is generated code, as the length ends up being incorrect.
Also, we want the generated code to go first in the table.
Rewrite this piece to correct these problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If there is nothing in the SSDT we should not include it in the tables.
Update the implementation to check this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If there is no reset line, this still emits ACPI code for the reset GPIO.
Fix it by updating the check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A few functions have changed to return pin numbers or I2C addresses. The
error checking for some of the callers is therefore wrong. Fix them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful for this command to show the address of the interrupt table.
Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present these tables do not have the correct header, and there is an
occasional incorrect value due to uninited data. Fix these bugs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present these functions are incorrect. Fix them and add some logging
and checking to avoid future problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present all tables are placed starting at address f0000 in memory, and
can be up to 64KB in size. If the tables are very large, this may not
provide enough space.
Also if the tables point to other tables (such as console log or a ramoops
area) then we must allocate other memory anyway.
The bloblist is a nice place to put these tables since it is contiguous,
which makes it easy to reserve this memory for linux using the 820 tables.
Add an option to put some of the tables in the bloblist. For SMBIOS and
ACPI, create suitable pointers from the f0000 region to the new location
of the tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/
20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
u-boot-imx for 2021.1
---------------------
- new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
- converted doc to reST
- fixes for verdin-imx8mm (Toradex)
- fixes for i.MX thermal driver
- mx7ulp: Align the PLL_USB frequency
- mx53: primary/secondary bmode
Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
While reviewing feedback it is helpful to see the review comments on the
command line to check that each has been addressed. Add an option to
support that.
Update the workflow documentation to describe the new features.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for parsing the contents of a patchwork 'patch' web page
containing comments received from reviewers. This allows patman to show
these comments in a simple 'snippets' format.
A snippet is some quoted code plus some unquoted comments below it. Each
review is from a unique person/email and can produce multiple snippets,
one for each part of the code that attracts a comment.
Show the file and line-number info at the top of each snippet if
available.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is tedious to add review tags into the local branch and errors can
sometimes be made. Add an option to create a new branch with the review
tags obtained from patchwork.
Signed-off-by: Simon Glass <sjg@chromium.org>
Before sending out a new version of a series for review, it is important
to add any review tags (e.g. Reviewed-by, Acked-by) collected by
patchwork. Otherwise people waste time reviewing the same patch
repeatedly, become frustrated and stop reviewing your patches.
To help with this, add a new 'status' subcommand that checks patchwork
for review tags, showing those which are not present in the local branch.
This allows users to see what new review tags have been received and then
add them.
Sample output:
$ patman status
1 Subject 1
Reviewed-by: Joe Bloggs <joe@napierwallies.co.nz>
2 Subject 2
Tested-by: Lord Edmund Blackaddër <weasel@blackadder.org>
Reviewed-by: Fred Bloggs <f.bloggs@napier.net>
+ Reviewed-by: Mary Bloggs <mary@napierwallies.co.nz>
1 new response available in patchwork
The '+' indicates a new tag. Colours are used to make it easier to read.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if we fail to find the upstream then the error output is piped
to wc, resulting in bogus results. Avoid the pipe and check the output
directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes warnings are associated with a file and sometimes with the
patch as a whole. Update the regular expression to handle both cases,
even in emacs mode. Also add support for detecting new files.
Signed-off-by: Simon Glass <sjg@chromium.org>
These lines can indicate a continuation of an error and should not be
ignored. Fix this.
Fixes: 666eb15e92 ("patman: Handle checkpatch output with notes and code")
Signed-off-by: Simon Glass <sjg@chromium.org>
On balance it is easier to use an iterator here, particularly if we need
to insert lines due to new functionality. The only niggle is the need to
keep the previous iterator value around in one case.
Convert this test to use iter().
Signed-off-by: Simon Glass <sjg@chromium.org>
The current functional tests run most of patman. Add a smaller test that
just checks tag handling with the PatchStream class.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the Series-xxx tag is not recognised patman currently reports a fatal
error. This is inconvenient if a new feature is later added to patman that
an earlier version does not support.
Report a warning instead, to allow the user to take action if needed, but
still allow operation to proceed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present warnings are produced across the whole set of patches when
parsing them. It is more useful to associate each warning with the patch
(or commit) that generated it.
Attach warnings to the Commit object and move them out of PatchStream.
Also avoid generating duplicate warnings for the same commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new function in PatchStream to collect the warnings generated while
parsing the stream. This will allow us to adjust the logic, such as
dealing with per-commit warnings.
Two of the warnings are in fact internal errors, so change them to raise
and exception.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new Series-links tag to tell patman how to find the series in
patchwork. Each item is the series ID optionally preceded by the series
version that the link refers to. An empty version indicates this is the
latest series.
For example:
Series-links: 209816 1:203302
Documentation is added in a later patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
One test still uses its own function for capturing output. Modify it to
use the standard one in test_util
Signed-off-by: Simon Glass <sjg@chromium.org>
This operation was unfortunately broken by a recent change. It is now
necessary to use -i in addition to -n, if there are errors or warnings in
the patches.
Correct this by always showing the summary information.
Fixes: f365375975 ("patman: Move main code out to a control module")
Signed-off-by: Simon Glass <sjg@chromium.org>
A recent change removed the base offset from the calculation. This is
used on coral to find the FSP-S binary. Fix it.
Fixes: a9fad07d4b ("binman: Avoid reporting image-pos with compression")
Signed-off-by: Simon Glass <sjg@chromium.org>
With a recent change this entry stores only part of the section data,
leaving out the padding at the end. Fix this by using GetPaddedData() to
get the data. Add this function to the base Entry class also.
Fixes: d1d3ad7d1f ("binman: Move section padding to the parent")
Signed-off-by: Simon Glass <sjg@chromium.org>
Building U-Boot with unit tests on a non-sandbox systems fails:
ld.bfd: test/built-in.o: in function `compress_using_gzip':
test/compression.c:138: undefined reference to `gzip'
ld.bfd: test/built-in.o: in function `uncompress_using_bzip2':
test/compression.c:187: undefined reference to `BZ2_bzBuffToBuffDecompress'
ld.bfd: test/built-in.o: in function `uncompress_using_lzma':
test/compression.c:222: undefined reference to `lzmaBuffToBuffDecompress'
ld.bfd: test/built-in.o: in function `uncompress_using_lzo':
test/compression.c:257: undefined reference to `lzop_decompress'
ld.bfd: test/built-in.o: in function `uncompress_using_lz4':
test/compression.c:292: undefined reference to `ulz4fn
Add the missing dependencies.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Building test/bloblist.c fails for non sandbox devices:
test/bloblist.c:10:10: fatal error: asm/state.h: No such file or directory
#include <asm/state.h>
^~~~~~~~~~~~~
Build the test only on the sandbox.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The cros_ec_keyb driver currently uses EC_CMD_MKBP_STATE to scan the
keyboard, but this host command was superseded by EC_CMD_GET_NEXT_EVENT
and unavailable on more recent devices (including gru-kevin), as it was
removed in cros-ec commit 87a071941b89 ("mkbp: Add support for buttons
and switches.") dated 2016-07-06.
The EC_CMD_GET_NEXT_EVENT has been available since cros-ec commit
d1ed75815efe ("MKBP event signalling implementation") dated 2014-10-20,
but it looks like it isn't included in firmware-* branches for at least
link, nyan-big, samus, snow, spring, panther and peach-pit which have
defconfigs in U-Boot. So this patch falls back to the old method if the
EC doesn't recognize the newer command.
The implementation is mostly adapted from Depthcharge commit
f88af26b44fc ("cros_ec: Change keyboard scanning method.").
On a gru-kevin, the current driver before this patch fails to read the
pressed keys with:
out: cmd=0x60: 03 9d 60 00 00 00 00 00
in-header: 03 fc 01 00 00 00 00 00
in-data:
ec_command_inptr: len=-1, din=0000000000000000
check_for_keys: keyboard scan failed
However the keyboard works fine with the newer command:
out: cmd=0x67: 03 96 67 00 00 00 00 00
in-header: 03 ef 00 00 0e 00 00 00
in-data: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ec_command_inptr: len=14, din=00000000f412df30
key_matrix_decode: num_keys = 0
0 valid keycodes found
out: cmd=0x67: 03 96 67 00 00 00 00 00
in-header: 03 df 00 00 0e 00 00 00
in-data: 00 00 00 00 00 00 00 00 00 00 00 00 10 00
ec_command_inptr: len=14, din=00000000f412df30
key_matrix_decode: num_keys = 1
valid=1, row=4, col=11
keycode=28
1 valid keycodes found
{0d}
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is prepared function for filing rom_offset. That's why use it instead
of copying content of it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
As we have a working COLD_RESET on the sandbox the sysreset test has to be
adjusted.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Up to now the sandbox would shutdown upon a cold reset request. Instead it
should be reset.
In our coding we use static variables like LIST_HEAD(efi_obj_list). A reset
can occur at any time, e.g. via an UEFI binary calling the reset service.
The only safe way to return to an initial state is to relaunch the U-Boot
binary.
The reset implementation uses execv() to relaunch U-Boot.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
During a cold reset execv() is used to relaunch the U-Boot binary.
We must ensure that all files are closed in this case.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is the 'poweroff' and not the 'reset' command that should shut down the
sandbox.
Adjust the unit test accordingly
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The command to shut down a device is 'poweroff'. It is a deficit of the
sandbox that it does not support resetting yet but shuts down upong seeing
the 'reset' command.
Once the sandbox properly supports reset we need the 'poweroff' command to
leave the sandbox.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When the sandbox eth-raw device host_lo is removed this leads to closing
the console input.
Do not call close(0).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Relocate a config_distro_bootcmd header before defined
CONFIG_EXTRA_ENV_SETTINGS. Otherwise it can't change to specific
environment.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This is required by Chrome OS so that the audio and other unibuild
features work correctly. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The bloblist guarantees that blobs are zeroed so there is no need to do
an additional memset(). Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we create the ACPI context but then drop it after generation of
tables is complete. This is annoying because we have to then search for
tables later.
To fix this, allocate the context and store it in global_data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present write_tables() can fail but does not report this problem to its
caller. Fix this by changing the return type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards need to include binary data into the image for use during the
boot process. Add a node for these.
An example is the audio-codec configuration used by some audio drivers on
Intel platforms. If no private files are provided, they will be omitted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add definitions for part of the vboot context used with verified boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Set up MSRs required for Apollo Lake. This enables Linux to use the
timers correctly. Also write the fixed MSRs for this platform.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This file can be included by any header but it includes C code. Guard it
to avoid errors when compiling ASL, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If u-boot gets used as coreboot payload it might be nice to get
vendor, model and bios version from smbios. I am not sure about
the output of all the read information.
With qemu target for coreboot this could look this:
CBFS: Found @ offset 14f40 size 3b188
Checking segment from ROM address 0xffc15178
Checking segment from ROM address 0xffc15194
Loading segment from ROM address 0xffc15178
code (compression=1)
New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150
Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150
using LZMA
Loading segment from ROM address 0xffc15194
Entry Point 0x01110000
BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
Jumping to boot code at 0x01110000(0x07fa7000)
U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)
CPU: x86_64, vendor AMD, device 663h
DRAM: 127.1 MiB
MMC:
Video: No video mode configured in coreboot!
Video: No video mode configured in coreboot!
Vendor: QEMU
Model: Standard PC (i440FX + PIIX, 1996)
Bios Version: 4.12-3152-g326a499f6f-dirty
Net: e1000: 52:54:00:12:34:56
eth0: e1000#0
No working controllers found
Finalizing coreboot
Hit any key to stop autoboot: 0
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a very simple API to be able to access SMBIOS strings
like vendor, model and bios version.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:
WARNING: the driver intel_apl_lpc was not found in the driver list
Correct these by using driver names that matches their compatible string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Fix the dtoc warning in these file by using a driver name that matches the
compatible string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This updates the PPD MAINTAINERS file doing a couple of changes:
* Replace Martyn with myself, since he no longer has the hardware
available and add Ian Ray as maintainer
* Fix the board directory path, which was still listing freescale/
instead of ge/
* Order the list of files alphabetically
* Add board specific device tree files to the file list
Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This updates the Bx50v3 MAINTAINERS file, so that it also catches
changes to the related device tree files. Additionally the list of
files has been sorted alphabetically and I added myself as maintainer.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.
Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michael wrote:
commit 92765f45bb ("env: Access Environment in SPI flashes before
relocation") at least breaks the Kontron sl28 board. I guess it also
breaks others which use a (late) SPI environment.
reason is, that env_init() sets the init bit, if there
is no init function defined in an environment driver,
and use default return value -ENOENT in this case
later for setting the default environment.
Change:
Environment driver can now implement an init
function and return, if this function does nothing,
simply -ENOENT.
env_init() now handles -ENOENT correct by setting the
inited bit for the environment driver. And if there
is no other environment driver whose init function
returns 0, load than the default environment.
This prevents that each environment driver needs to set the
default environment.
Fixes: 92765f45bb ("env: Access Environment in SPI flashes before relocation")
Reported-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc> [For the SF environment]
Signed-off-by: Heiko Schocher <hs@denx.de>
First set of u-boot-atmel fixes for 2021.01 cycle:
This specific feature set includes the patches for DT required to fix
the warnings for newer DTC version (1.6.0+), i2c and spi bus unit
address.
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32"
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The series contains the following enhancements
* preparatory patches for UEFI capsule updates
* initialization of the emulated RTC using an environment variable
and a bug fix
* If DisconnectController() is called for a child controller that is the
only child of the driver, the driver must be disconnected.
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor
series (GE Bx50). It consists of a carrier PCB used in combination
with a Congatec QMX6 SoM. This adds U-Boot support using device model
everywhere and SPL for memory initialization.
Proper configuration is provided as 'ge_b1x5v2_defconfig' and the
combined image u-boot-with-spi.imx can be flashed directly to 1024
byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can
be loaded separately via USB-OTG using e.g. imx_usb.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This separates the I2C specific code from the generic
GE vital product data code, so that the generic parts
can be used on hardware with VPD stored in SPI flash
memory.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
While this code is being used by all GE platforms its useful
to have it behind a config option for hardware bringup of
new platforms.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Add GPIO poweroff driver, which is based on the Linux
driver and uses the same DT binding.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Allow using disable_ldb_di_clock_sources with just the combined
CONFIG_MX6QDL being enabled.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
In case of empty battery or glitches the oscillator fail
bit might be set. This will reset the bit in the reset
routine.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This takes care of resetting the 32kHz square wave, which is
used by some boards as clock source for the SoC.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This driver allows to use SPI flash as backing store for
boot counter values with DM enabled.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This option is only supported by the IMX watchdog and seems to be
similar to CONFIG_WATCHDOG.
Move it below the IMX watchdog and make it dependent on IMX_WATCHDOG.
Signed-off-by: Michael Walle <michael@walle.cc>
This patch provides information regarding the boot stage with using LEDs.
On the very beginning of U-Boot execution the GREEN LED is turned on.
When the execution is passed to Linux kernel the GREEN LED is off and
RED one is ON.
Afterwards, when Linux takes over the execution, the "heartbeat" driver
provides indication if the board is still alive.
Please also note that this patch uses {set|clr}bits_le32 macros as turning
ON GREEN LED is performed in a _very_ early stage of U-Boot execution
before DM_GPIOs are initialized.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The command 'clocks' shows the following output:
=> clocks
PLL_A7_SPLL 528 MHz
PLL_A7_APLL 529 MHz
PLL_USB 0 MHz
Add some extra spaces so that the PLL_USB information gets aligned with
the previous reported frequencies.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The command 'clocks' shows the following output:
=> clocks
PLL_A7_SPLL 528 MHz
PLL_A7_APLL 529 MHz
PLL_USB 0 MHz
....
[do_mx7_showclocks] addr = 0x9FFB61F1
The last line is not useful at all, so just remove it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
commit c05ed00afb dropped linux/delay.h from common header
add linux/delay.h to avoid compile warning here
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Ensure we terminate the line with a CR if we get an invalid sensor device
or reading.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
In order to be able to run the I2C bus at 400Khz, the chip errata[1]
recommends that the peripheral clock runs out of the 24MHz oscillator.
Systems running I2C from OP-TEE before Linux executes - for example to
access a Secure Element [2] providing the cryptographic support - expect
this clock to be configured by the bootloader [3].
[1] IMX6SLCE Rev. 5, 02/2019, ERR007805.
[2] OP-TEE: support for NXP SE05X Plug and Trust (patch on the list).
[3] OP-TEE: check the imx_i2c.c driver (imx6 patch on the list).
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When using cygwin64 "dd (coreutils) 8.26 Packaged by Cygwin (8.26-2)",
the last not 512bytes aligned data wat cut off and not burned into SD
card.
Saying the flash.bin size is 1085608 bytes, not 512bytes aligned. It only
burned 1085440 bytes, the leaving 168 bytes were not burnned and cause
boot issue.
So update README dd command to add "conv=notrunc"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
- New PX30 board: Engicam PX30.Core;
- Fix USB HID support for rock960;
- Remove host endianness dependency for rockchip mkimage;
- dts update for rk3288-tinker;
- Enable console MUX for some ROCKPi boards;
- Add config-based ddr selection for px30;
The name of structure element logl_prev is not matched by the
documentation.
%s/logl_pref/logl_prev/
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This would be useful and recommended boot flow for new boards
which has doesn't have the DDR support yet in mainline.
Sometimes it is very useful for debugging mainline DDR support.
Documen it for px30 boot flow.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose
carrier board with capacitive touch interface.
Genaral features:
- TFT 10.1" industrial, 1280x800 LVDS display
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
SOM's like PX30.Core needs to mount on top of this Carrier board
for creating complete PX30.Core C.TOUCH 2.0 board.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.
PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
The existing common code for Engicam boards uses i.MX6,
so attach that into i.MX6 Engicam boards so-that adding
new SoC variants of Engicam boards become meaningful.
Add support for it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
TARGET_EVB_PX30 can be possible to use other px30 boards.
Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.
This would help to track which boards are using EVB_PX30 config.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
General features:
- Rockchip PX30
- Up to 2GB DDR4
- eMMC 4 GB expandible
- rest of PX30 features
PX30.Core needs to mount on top of Engicam baseboards for creating
complete platform boards.
Possible baseboards are,
- EDIMM2.2
- C.TOUCH 2.0
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
SOM's like PX30.Core needs to mount on top of this Evaluation board
for creating complete PX30.Core EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When booting from rom usb, skip the boot logo logic as it's possible
that the partition containing the logo does not exist yet.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
The Rockchip boot ROM expects little-endian values in the image header.
When running mkimage on a big-endian machine, these values need to be
byteswapped before writing or verifying the header.
This change fixes cross-compiling U-Boot SPL for the RK3399 SoC from a
big-endian ppc64 host machine.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Enable Console multiplexing in ROCKPi N8 which would is
required to video out the console buffer.
Enable it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Like, rk3399 the rk3288 also supports 4K resolution.
So, enable it for rk3288 with HDMI platforms.
Right now, rockchip video drivers are supporting for rk3288,
rk3399 SoC families, so mark the 4K resolution by default
if it's an HDMI video out.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Enable Console multiplexing in ROCKPi N10 which would is
required to video out the console buffer.
Enable it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This updates logging documentation with some examples of the new commands
added in the previous commits. It also removes some items from the to-do
list which have been implemented.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The functions in log.h are already mostly documented, so add them to the
generated documentation.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This exercises a few success and failure modes of the log filter-*
commands. log filter-list is not tested because it's purely informational.
I don't think there's a good way to test it except by testing if the output
of the command exactly matches a sample run.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds several commands to add, list, and remove log filters. Due to the
complexity of adding a filter, `log filter-list` uses options instead of
positional arguments.
These commands have been added as subcommands to log by using a dash to
join the subcommand and subsubcommand. This is stylistic, and they could be
converted to proper subsubcommands if it is wished.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
A few of these tests were inspired by those in glibc. The syntax for
invoking test_getopt is a bit funky, but it's necessary so that the CPP can
parse the arguments correctly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Some commands can get very unweildy if they have too many positional
arguments. Adding options makes them easier to read, remember, and
understand.
This implementation of getopt has been taken from barebox, which has had
option support for quite a while. I have made a few modifications to their
version, such as the removal of opterr in favor of a separate getopt_silent
function. In addition, I have moved all global variables into struct
getopt_context.
The getopt from barebox also re-orders the arguments passed to it so that
non-options are placed last. This allows users to specify options anywhere.
For example, `ls -l foo/ -R` would be re-ordered to `ls -l -R foo/` as
getopt parsed the options. However, this feature conflicts with the const
argv in cmd_tbl->cmd. This was originally added in 54841ab50c ("Make sure
that argv[] argument pointers are not modified."). The reason stated in
that commit is that hush requires argv to stay unmodified. Has this
situation changed? Barebox also uses hush, and does not have this problem.
Perhaps we could use their fix?
I have assigned maintenance of getopt to Simon Glass, as it is currently
only used by the log command. I would also be fine maintaining it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This makes the log level command print all valid log levels. The default
log level is annotated. This provides an easy way to see which log levels
are compiled-in.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This allows users to query which categories and drivers are available on
their system. This allows them to construct filter-add commands without
(e.g.) adjusting the log format to show categories and drivers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move parsing of log level into its own function so it can be re-used. This
also adds support for using log level names instead of just the integer
equivalent.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This reduces duplicate code, and makes adding new sub-commands easier.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This is the complement of the existing behavior to match only messages with
a log level less than a threshold. This is primarily useful in conjunction
with LOGFF_DENY.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds some tests for log filters which deny if they match.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When rebasing this series I had to renumber all my log tests because
someone made another log test in the meantime. This involved updaing a
number in several places (C and python), and it wasn't checked by the
compiler. So I though "how hard could it be to just rewrite in C?" And
though it wasn't hard, it *was* tedious. Tests are numbered the same as
before to allow for easier review.
A note that if a test fails, everything after it will probably also fail.
This is because that test won't clean up its filters. There's no easy way
to do the cleanup, except perhaps removing all filters in a wrapper
function.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Without this flag, log filters can only explicitly accept messages.
Allowing denial makes it easier to filter certain subsystems. Unlike
allow-ing filters, deny-ing filters are added to the beginning of the
filter list. This should do the Right Thing most of the time, but it's
less-universal than allowing filters to be inserted anywhere. If this
becomes a problem, then perhaps log_filter_add* should take a filter number
to insert before/after.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function exposes a way to specify flags when creating a filter.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These functions are required by "cmd: log: Add commands to manipulate
filters" and "test: Add a test for log filter-*".
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Checkpatch complains about using #ifdef for CONFIG variables.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Both these arrays and their members are const. Fixes checkpatch complaint.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Logging category lists are terminated by LOGC_END, not LOGC_NONE.
Fixes: e9c8d49d54 ("log: Add an implementation of logging")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Errors returned should be negative.
Fixes: 45fac9fc18 ("log: Correct missing free() on error in log_add_filter()")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On aristianetos boards the display type is detected
through "panel" environment variable. Dependend on the
display type we detect the board type and this decides which
DTB we have to use for the board.
So we need early spi environment access.
Signed-off-by: Heiko Schocher <hs@denx.de>
Enable the new Kconfig option ENV_SPI_EARLY if you want
to use Environment in SPI flash before relocation.
Call env_init() and than you can use env_get_f() for
accessing Environment variables.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
split from env_import_redund() the part which checks
which Environment is valid into a separate function
called env_check_redund() and call it from env_import_redund().
So env_check_redund() can be used from places which also
need to do this checks.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function will be used from several places in UEFI subsystem
to generate some specific form of utf-16 variable name.
For example, L"Capsule0001"
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Move function to separate module.
Use char * as argument instead of u16 *.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If this option, CONFIG_EFI_SETUP_EARLY, is enabled, the initialisation
of UEFI subsystem will be done as part of U-Boot initialisation.
Please note that this option won't be enabled explicitly by users,
instead, should be enabled implicitly by other configuration options.
Specifically, this feature will be utilised in implementing capsule-on-disk
feature.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This function is a variant of dfu_write_by_name() and takes a DFU alt
setting number for dfu configuration.
It will be utilised to implement UEFI capsule management protocol for
raw image in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This variable will be utilized to enumerate all dfu entities
for UEFI capsule firmware update in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The main purpose of this patch is to separate a generic interface for
updating firmware using DFU drivers from "auto-update" via tftp.
This function will also be used in implementing UEFI capsule update
in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The range of an addressable pointer can go beyond 'integer'.
So change the argument type to a void pointer.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function is essentially independent from tftp, and will also be
utilised in implementing UEFI capsule update in a later commit.
So just give it a more generic name.
In addition, a new configuration option, CONFIG_DFU_WRITE_ALT, was
introduced so that the file will be compiled with different options,
particularly one added in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Up to now the emulated RTC is initialized using the U-Boot build time.
With this patch the environment variable 'rtc_emul_epoch' can be used to
provide a better initial time. The variable is a decimal string with
the number of seconds since 1970-01-01. Here is an example where the RTC
had not been probed yet:
=> setenv rtc_emul_epoch 1610109000
=> date
Date: 2021-01-08 (Friday) Time: 12:30:00
If the variable does not exist, the U-Boot build time is used as fallback.
The environment variable may be set when shutting down the operating system
if the U-Boot environment is exposed to the OS (cf. ENV_IS_IN_FAT and
ENV_IS_IN_EXT4).
Suggested-by: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently the emulated RTC is initialized in the emul_rtc_get() get
function. This does not match the design of the driver model.
Move the initialization of the emulated RTC to the probe() function.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If ChildHandle indicates the sole child of the driver, disconnect the
driver.
This fixes the test results for UEFI SCT 2.6 A
sub-tests 5.1.3.12.43, 5.1.3.12.44, 5.1.3.12.45.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Found this by comparing it to the coreboot driver, a form of this call
was introduced there in their commit b9a7877568cf ("rockchip/*: refactor
edp driver"). This is copy-pasted from U-Boot's link_train_cr() slightly
above it.
Without this on a gru-kevin chromebook, I have:
clock recovery at voltage 0 pre-emphasis 0
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
channel eq failed, ret=-5
link train failed!
rk_vop_probe() Device failed: ret=-5
With this, it looks like training succeeds:
clock recovery at voltage 0 pre-emphasis 0
requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
using signal parameters: voltage 0.4V pre_emph 3.5dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 6dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 6dB
using signal parameters: voltage 0.4V pre_emph 6dB
requested signal parameters: lane 0 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 1 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 2 voltage 0.4V pre_emph 0dB
requested signal parameters: lane 3 voltage 0.4V pre_emph 0dB
using signal parameters: voltage 0.4V pre_emph 0dB
channel eq at voltage 0 pre-emphasis 0
config video failed
rk_vop_probe() Device failed: ret=-110
The "config video failed" error also goes away when I disable higher
log levels, and it claims to have successfully probed the device.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
The SRAM on the PX30 is not big enough to hold multiple DDR configs
so it needs to be selected during build.
So far simply the DDR3 config was always selected and getting DDR4
or LPDDR2/3 initialized would require a code modification.
So add Kconfig options similar to RK3399 to allow selecting the DDR4
and LPDDR2/3 options instead, while DDR3 stays the default as before.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Fix up USB config options so keyboards and other USB devices work.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Change-Id: I34b0696e0ac7303186f20c83278dde340399b690
The property reg-shift with the same value is present in the base
device tree already. Remove unnecessary node from rk3288-tinker.dts.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The I2C EEPROM is present on Tinker Board S as well. Move the i2c node
to the shared, U-Boot specific rk3288-tinker-u-boot.dtsi device tree.
Cc: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to correctly calculate the designware watchdog
timeouts, the watchdog clock is required. Implement required
clocks to facilitate this.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Refactor the implementation slightly so that section data is not
rebuilt when it is already available.
We still have GetData() set up to rebuild the section, since we don't
currently track when things change that might affect a section. For
example, if a blob is updated within a section, we must rebuild it.
Tracking that would be possible but is more complex, so it left for
another time.
Signed-off-by: Simon Glass <sjg@chromium.org>
With the previous changes, it is now possible to compress entire
sections. Add some tests to check that compression works correctly,
including updating the metadata.
Also update the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function adds up the total size of entries to work out the
size of a section's contents. With compression this is no-longer enough.
We may as well bite the bullet and build the section contents instead.
Call _BuildSectionData() to get the (possibly compressed) contents and
GetPaddedData() to get the same but with padding added.
Note that this is inefficient since the section contents is calculated
twice. Future work will improve this.
This affects testPackOverlapMap() since the error is reported with a
different section size now (enough to hold the contents). Update that at
the same time.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function assumes that the size of a section is at least as
large as its contents. With compression this is often not the case. Relax
this constraint by using the uncompressed size, if available.
Signed-off-by: Simon Glass <sjg@chromium.org>
This method introduces a separation between packing and checking that is
different for sections. In order to handle compression properly, we need
to be able to deal with a section's size being smaller than the
uncompressed size of its contents. It is easier to make this work if
everything happens in the Pack() method.
The only real user of CheckEntries() is entry_Section and it can call it
directly. Drop the call from 'control' and handle it locally.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present CheckSize() is called from the function that packs the entries.
Move it up to the main Pack() function so that _PackEntries() can just
do the packing.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is only used by entry_Section and that class already calls it. Avoid
calling it twice. Also drop it from the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sorting and expanding entries are side-effects of the
CheckEntries() function. This is a bit confusing, as 'checking' would
not normally involve making changes.
Move these steps into the Pack() function instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function just calls CheckEntries() in the only non-trivial
implementation. Drop it and use CheckEntries() directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
When a section is compressed, all entries within it are grouped together
into a compressed block of data. This obscures the start of each
individual child entry.
Avoid reporting bogus 'image-pos' properties in this case, since it is
not possible to access the entry at the location provided. The entire
section must be decompressed first.
CBFS does not support compressing whole sections, only individual files,
so needs no special handling here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Section contents is not set up when ObtainContents() is called, since
packing often changes the layout of the contents. Ensure that the contents
are correctly recorded by making this function regenerate the section. It
is normally only called by the parent section (when packing) or by the
top-level image code, when writing out the image. So the performance
impact is fairly small.
Now that sections have their contents in their 'data' property, update
testSkipAtStartSectionPad() to check it.
Signed-off-by: Simon Glass <sjg@chromium.org>
When compressing an entry, the original uncompressed data is overwritten.
Store it so it is available if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present padding of sections is inconsistent with other entry types, in
that different pad bytes are used.
When a normal entry is padded by its parent, the parent's pad byte is
used. But for sections, the section's pad byte is used.
Adjust logic to always do this the same way.
Note there is still a special case in entry_Section.GetPaddedData() where
an image is padded with the pad byte of the top-level section. This is
necessary since otherwise there would be no way to set the pad byte of
the image, without adding a top-level section to every image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Each section is padded up to its size, if the contents are not large
enough. Move this logic from _BuildSectionData() to
GetPaddedDataForEntry() so that all the padding is in one place.
With this, the testDual test is working again, so enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function does the padding needed around an entry. It is
easier to understand what is going on if we have a function that returns
the contents of an entry, with padding included.
Refactor the code accordingly, adding a new GetPaddedData() method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a new _BuildSectionData() to hold the code that is now in
GetData(), so that it is clearly separated from entry.GetData() base
function.
Separate out the 'pad-before' processing to make this easier to
understand.
Unfortunately this breaks the testDual test. Rather than squash several
patches into an un-reviewable glob, disable the test for now.
This also affects testSkipAtStartSectionPad(), although it still not
quite what it should be. Update that temporarily for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Alignment does form part of the entry once the image is written out, but
within binman the entry contents does not include the padding. Add
documentation to make this clear, as well as a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Padding becomes part of the entry once the image is written out, but
within binman the entry contents does not include the padding. Add
documentation to make this clear, as well as a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Check the contents of each section to make sure it is actually in the
right place.
Also fix a whitespace error in the .dts file.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use 'compress' as the property to set the compression of
a 'files' entry. But this conflicts with the same property for entries,
of which Entry_section is a subclass.
Strictly speaking, since Entry_files is in fact a subclass of
Entry_section, the files can be compressed individually but also the
section (that contains all the files) can itself be compressed. With this
change, it is possible to express that.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this is only used by blobs. To allow it to be used by other
entry types (such as sections), move it into the base class.
Also read the compression type in the base class.
Signed-off-by: Simon Glass <sjg@chromium.org>
While a section is the base class of Image, it is more correct to refer
to sections in most places in this file. Fix these comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if 'binman' is typed on the command line, a strange error about
a missing argument is displayed. Fix this.
These does not seem to be standard way to add the 'required' argument in
all recent Python versions, so set it manually.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this feature is tested view the end-at-4gb feature. Add some
tests of its own, including the operation of padding.
The third test here shows binman's current, inconsistent approach to
padding in the top-level section. Future patches in this series will
address this.
Signed-off-by: Simon Glass <sjg@chromium.org>
With of-platdata, the devicetree is supposed to specify all the devices
in the system. So far this hasn't really mattered since of-platdata still
works correctly.
However, new of-platdata features rely on numbering the devices in a
particular order so that they can be referenced by a single integer. It is
tricky to implement this efficiently when other devices are present in the
build.
To address this, disable use of U_BOOT_DEVICE() when of-platdata is
enabled. This seems acceptable as it is not supposed to be used at all,
except in SPL/TPL, where of-platdata is the recommended approach.
This breaks one non-compliant boards at present: mx6cuboxi
Signed-off-by: Simon Glass <sjg@chromium.org>
(disable CONFIG_IMX_THERMAL for mx6cuboxi to avoid a build error)
This feature is incompatble with of-platdata since it uses the
U_BOOT_DEVICE() macro. With of-platdata the only devices permitted are
those created by dtoc.
The driver is not used in SPL anyway, so exclude it from that build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
At present we use a 'node' pointer in the of-platadata phandle_n_arg
structs. This is a pointer to the struct driver_info for a particular
device, and we can use it to obtain the struct udevice pointer itself.
Since we don't know the struct udevice pointer until it is allocated in
memory, we have to fix up the phandle_n_arg.node at runtime. This is
annoying since it requires that SPL's data is writable and adds a small
amount of extra (generated) code in the dm_populate_phandle_data()
function.
Now that we can find a driver_info by its index, it is easier to put the
index in the phandle_n_arg structures.
Update dtoc to do this, add a new device_get_by_driver_info_idx() to look
up a device by drive_info index and update the tests to match.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that parent devices are supported with of-platadata, we don't need the
messy code to fix up the parent pointers and allocations on Apollo Lake.
Put the code behind a condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present, enabling CONFIG_APL_SPI_FLASH_BOOT does not build since SPI
and SPI flash are not enabled for TPL. Add a condition to fix this and
tidy up a build warning in the SPI-flash driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a simple test that we can obtain the correct parent for an I2C
device. This requires updating the driver names to match the compatible
strings, adding them to the devicetree and enabling a few options.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present of-platdata does not provide parent information. But this is
useful for I2C devices, for example, since it allows them to determine
which bus they are on.
Add support for setting the parent correctly, by storing the parent
driver_info index in dtoc and reading this in lists_bind_drivers(). This
needs multiple passes since we must process children after their parents
already have been bound.
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no devicetree with of-platdata. Update a few uclasses to allow
them to be built for sandbox_spl. Also drop the i2c-gpio from SPL to avoid
build errors, since it does not support of-platdata.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we update the driver_info struct with a pointer to the device
that it created (i.e. caused to be bound). This works fine when U-Boot SPL
is stored in read-write memory. But on some platforms, such as Intel
Apollo Lake, it is not possible to update the data memory.
In any case, it is bad form to put this information in a structure that is
in the data region, since it expands the size of the binary.
Create a new driver_rt structure which holds runtime information about
drivers. Update the code to store the device pointer in this instead.
Also update the test check that this works.
Signed-off-by: Simon Glass <sjg@chromium.org>
We have a test in dtoc for this feature, but not one in U-Boot itself.
Add a simple test that checks that the information comes through
correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
With of-platdata, the driver_info struct is updated with the device
pointer when it is bound. This makes it easy for a device to be found by
its driver info with the device_get_by_driver_info() function.
Add a test that all devices (except the root device) have such an entry.
Fix a bug that the function does not set *devp to NULL on failure, which
the documentation asserts.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present properties are tested in a roundabout way. The driver's probe()
method writes out the values of the properties and the Python test checks
the output from U-Boot SPL.
Add a C test which checks these values more directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have a pytest that covers of-platadata. Add a very simple
unit test that just checks that a device can be found. This shows the
ability to write these tests in C.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a -u flag for U-Boot SPL which requests that unit tests be run. To
make this work, export dm_test_main() and update it to skip test features
that are not used with of-platdata.
To run the tests:
$ spl/u-boot-spl -u
U-Boot SPL 2020.10-rc5 (Oct 01 2020 - 07:35:39 -0600)
Running 0 driver model tests
Failures: 0
At present there are no SPL unit tests.
Note that there is one wrinkle with these tests. SPL has limited memory
available for allocation. Also malloc_simple does not free memory
(free() is a nop) and running tests repeatedly causes driver-model to
reinit multiple times and allocate memory. Therefore it is not possible
to run more than a few tests at a time. One solution is to increase the
amount of malloc space in sandbox_spl. This is not a problem for pytest,
since it runs each test individually, so for now this is left as is.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present DM tests assume that a devicetree is available. This is not the
case with of-platadata.
Update the code to add this condition.
Signed-off-by: Simon Glass <sjg@chromium.org>
Without resizing the SDL window showed by
./u-boot -D -l
is not legible on a high resolution screen.
Allow resizing the window
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present an integer is converted to bytes incorrectly. The whole 32-bit
integer is inserted as the first element of the byte array, and the other
three bytes are skipped. This was not noticed because the unit test did
not check it, and the functional test was checking for wrong values.
Update the code to handle this as a special case. Add one more test to
cover all code paths.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this option is disabled in SPL, meaning that warnings are not
displayed. It is sometimes useful to see warnings in SPL for debugging
purposes.
Add a new Kconfig option to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the structures are written in name order, but parents have to
be written before their children, so the file does not end up being in
order. The order of nodes in _valid_nodes matches the order of the
devicetree.
Update the code so that _valid_nodes is in sorted order, by C name of
the structure. This allows us to assign a sequential ordering to each
U_BOOT_DEVICE() declaration.
U-Boot's linker lists are also ordered alphabetically, which means that
the order in the driver_info list will match the order used by dtoc. This
defines an index ('idx') for the U_BOOT_DEVICE declarations. They appear
in alphabetical order, numbered from 0 in _valid_nodes and in the
driver_info linker list.
Add a comment against each declaration, showing the idx value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add documentation to this function as well as generate_structs(), where
the return value is ultimately passed in.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since sandbox's SPL is build with of-platadata, we should not use
U_BOOT_DEVICE() declarations as well. Drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tests are easier to run in U-Boot proper. Running them in SPL does not add
test coverage in most cases. Also some tests use features that are not
available in SPL.
Update the build rules to disable these tests in SPL. We still need
test-main to be able to actually run SPL tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we always include test/dm from the main Makefile. We have a
CONFIG_UNIT_TEST that should control whether the test/ directory is built,
so rely on that instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present most of the tests in test/Makefile are dependent on
CONFIG_SANDBOX. But this is not ideal since they rely on commands being
available and SPL does not support commands.
Use CONFIG_COMMAND instead. This has the dual purpose of allowing these
tests to be used on other boards and allowing SPL to skip them.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this option results in a number of #ifdefs due to the presence
or absence of the global_data of_root member.
Add a few macros to global_data.h to work around this. Update the code
accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for multiple images, since these are used on x86 now. Select
the first image for now, since that is generally the correct one. At some
point we can add a way to determine which image is currently running.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a function to read the ROM offset so that we can store the value
in one place and clients don't need to store it themselves after calling
binman_set_rom_offset().
Signed-off-by: Simon Glass <sjg@chromium.org>
- Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch)
- Armada 8k: Use ATF serdes init instead of the "old" U-Boot version
(Baruch)
- Minor update to Octeon TX/TX2 defconfig (Stefan)
Xilinx changes for v2021.01-v2
common:
- Add support for 64bit loadables from SPL
xilinx:
- Update documentation and record ownership
- Enable eeprom board detection based legacy and fru formats
- Add support for FRU format
microblaze:
- Optimize low level ASM code
- Enable SPI/I2C
- Enable distro boot
zynq:
- Add support for Zturn V5
zynqmp:
- Improve silicon detection code
- Enable several kconfig options
- Align DT with the latest state
- Enabling security commands
- Enable and support FPGA loading from SPL
- Optimize xilinx_pm_request() calling
versal:
- Some DTs/Kconfig/defconfig alignments
- Add binding header for clock and power
zynq-sdhci:
- Add support for tap delay programming
zynq-spi/zynq-qspi:
- Use clock framework for getting clocks
xilinx-spi:
- Fix some code issues (unused variables)
serial:
- Check return value from clock functions in pl01x
Maxime mentioned that he feels not having the time to be an Allwinner
maintainer anymore. Take over from him.
Maxime, many thanks for your great work in the past! I hope I can still
relay the occasional technical question to you in the future.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Based on Linux kernel commit fc256f5789cb ("mtd: nand: pxa3xx: enable
NAND controller if the SoC needs it"). This commit adds support for the
Armada 8040 nand controller.
The kernel commit says this:
Marvell recent SoCs like A7k/A8k do not boot with NAND flash
controller activated by default. Enabling the controller is a matter
of writing in a system controller register that may also be used for
other NAND related choices.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Move board_fit_config_name_match() from Zynq/ZynqMP to common location.
This change will open a way to use it also by Microblaze and Versal.
Through this function there is a way to handle images with multiple DTBs.
For now match it with DEVICE_TREE as is done for Zynq.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove setting tapdelays for different speeds separately. Instead use
the ITAP and OTAP delay values which are read from the device tree.
If the DT does not contain tap delay values, the predefined values
will be used for the same.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The kfree() call is unreachable, and is not needed. Remove this call and
the fail_disable_clk label.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Use the generic DT code to find the device compatible property for us.
This makes the driver look more like other current drivers. It also make
it easier to add support for other variants like Armada 8K in a future
commit.
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Align node properties to kernel dts node.
The change of compatible property does not affect any currently
supported board.
Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility
with the current driver.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Align node properties to kernel dts node.
Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility
with the current driver.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
It helps ATF to determine who called power on function (U-boot/Linux).
The corresponding ATF code was added in this commit:
mvebu: cp110: avoid pcie power on/off sequence when called from Linux
55df84f974
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Replace the comphy initialization for PCIe with appropriate SMC call, so
the firmware will perform appropriate comphy initialization.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Replace all comphy initialization with appropriate smc calls. It will
result with triggering synchronous exception that is handled by Secure
Monitor code in EL3. Then the Secure Monitor code will dispatch each smc
call (by parsing the smc function identifier) and triggers appropriate
comphy initialization.
This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI
interfaces.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tests tests run the three mux subcommands: list, select, and deselect,
and verify that the commands do what we expect.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This command lets the user list, select, and deselect mux controllers
introduced with the mux framework on the fly. It has 3 subcommands:
list, select, and deselect.
List: Lists all the mux present on the system. The muxes are listed for
each chip. The chip is identified by its device name. Each chip can have
a number of mux controllers. Each is listed in sequence and is assigned
a sequential ID based on its position in the mux chip. It lists details
like ID, whether the mux is currently selected or not, the current
state, the idle state, and the number of states.
A sample output would look something like:
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 no unknown as-is 0x4
1 no 0x2 0x2 0x10
2 no 0x73 0x73 0x100
another-mux-controller:
ID Selected Current State Idle State Num States
0 no 0x1 0x1 0x4
1 no 0x2 0x2 0x4
Select: Selects a given mux and puts it in the specified state. This
subcommand takes 3 arguments: mux chip, mux ID, state to set
the mux in. The arguments mux chip and mux ID are used to identify which
mux needs to be selected, and then it is selected to the given state.
The mux needs to be deselected before it can be selected again in
another state. The state should be a hexadecimal number.
For example:
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 no 0x1 0x1 0x4
1 no 0x1 0x1 0x4
=> mux select a-mux-controller 0 0x3
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 yes 0x3 0x1 0x4
1 no 0x1 0x1 0x4
Deselect: Deselects a given mux and puts it in its idle state. This
subcommand takes 2 arguments: the mux chip and mux ID to identify which
mux needs to be deselected. So in the above example, we can deselect mux
0 using:
=> mux deselect a-mux-controller 0
=> mux list
a-mux-controller:
ID Selected Current State Idle State Num States
0 no 0x1 0x1 0x4
1 no 0x1 0x1 0x4
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide tests to check the behavior of the multiplexer framework.
Two sets of tests are added. One is using an emulated multiplexer driver
that can be used to test basic functionality like select, deselect, etc.
The other is using the mmio mux which adds tests specific to it.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The memory is close to full and adding a syscon node in test.dts makes
it go over the limit and makes malloc() fail on startup.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a driver for mmio-based syscon multiplexers controlled by
bitfields in a syscon register range.
This is heavily based on the linux mmio-mux driver.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
This will probe the multiplexer devices that have a "u-boot,mux-autoprobe"
property. As a consequence they will be put in their idle state.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add a new subsystem that handles multiplexer controllers. The API is the
same as in Linux.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
[trini: Update some error calls to use different functions or pass
correct arguments]
Signed-off-by: Tom Rini <trini@konsulko.com>
Pull request for UEFI sub-system for efi-2021-01-rc2
A software RTC driver is supplied for UEFI SCT testing.
The following UEFI related bugs are fixed:
* correct handling of daylight saving time in GetTime() and SetTime()
* handling of the gd register in function tracing on RISC-V
* disable U-Boot devices in ExitBootServices()
The log command has led to NULL dereferences if an unknown category name
name was used due to missing entries in the list of category names.
Add compile time checks for the array sizes of log_cat_name and
log_lvl_name to avoid future mishaps.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adjust the SetTime() and GetTime() runtime services to correctly convert
the daylight saving time information when communicating with the RTC.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
U-Boot Driver Model is supposed to remove devices with either
DM_REMOVE_ACTIVE_DMA or DM_REMOVE_OS_PREPARE flags set, before exiting.
Our bootm command does that by explicitly calling calling
"dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL);" and we also disable any
USB devices.
The EFI equivalent is doing none of those at the moment. As a result
probing an fTPM driver now renders it unusable in Linux. During our
(*probe) callback we open a session with OP-TEE, which is supposed to
close with our (*remove) callback. Since the (*remove) is never called,
once we boot into Linux and try to probe the device again we are getting
a busy error response. Moreover all uclass (*preremove) functions won't
run.
So let's fix this by mimicking what bootm does and disconnect devices
when efi_exit_boot_services() is called.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
An UEFI application may change the value of the register that gd lives in.
But some of our functions like get_ticks() access this register. So we
have to set the gd register to the U-Boot value when entering a trace
point and set it back to the application value when exiting the trace
point.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On a board without hardware clock this software real time clock can be
used. The build time is used to initialize the RTC. So you will have
to adjust the time either manually using the 'date' command or use
the 'sntp' to update the RTC with the time from a network time server.
See CONFIG_CMD_SNTP and CONFIG_BOOTP_NTPSERVER. The RTC time is
advanced according to CPU ticks.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a constant U_BOOT_EPOCH with the number of seconds since
1970-01-01. This constant can be used to initialize a software
real time clock until it is updated via the 'sntp' command.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a unit test checking that a continuation message will use the same
log level and log category as the previous message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some drivers use macro pr_cont() for continuing a message sent via printk.
Hence if we want to convert printk messaging to using the logging system,
we must support continuation of log messages too.
As pr_cont() does not provide a message level we need a means of
remembering the last log level.
With the patch a pseudo log level LOGL_CONT as well as a pseudo log
category LOGC_CONT are introduced. Using these results in the application
of the same log level and category as in the previous log message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace the static variable processing_msg by a field in the global data.
Make the field bool at it can only be true or false.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
With disabled legacy VIDEO option CONSOLE_MUX is not auto-selected
any more, re-enable it.
Fixes: 9dec5a0ea1 ("nokia_rx51: disable obsolete VIDEO config")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Define default values for input and output clock phase delays for
Versal. Also define functions for setting tapdelays based on these
clock phase delays.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Define input and output clock phase delays with pre-defined values.
Define arasan_sdhci_clk_data type structure and add it to priv
structure and store these clock phase delays in it.
Read input and output clock phase delays from dt. If these values are
not passed through dt, use pre-defined values.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Define timing macro's for all the available speeds of mmc. This is
done similar to linux. Replace speed macro's used with these new timing
macro's wherever applicable.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This reverts commit 942b5fc032.
This is partial revert of the above commit.
mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);
This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.
Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().
The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.
if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;
if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);
It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.
Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add function description for zynq_qspi_init_hw and zynq_qspi_chipselect.
Fix zqspi to priv in function descriptions.
Change the description of priv as pointer to zynq_qspi_priv structure.
Fix other function descriptions to kernel-doc style.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Use tabs to be aligned with the rest of the code.
Fixes: 658df8bd94 ("mtd: spi-nor-core: Add octal mode support")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Call generic board_late_init_xilinx() to be aligned with the rest of xilinx
platforms. Also getting rid of initrd_high/fdt_high and use
bootm_low/boot_size instead.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change parameter type to avoid compilation error:
In file included from ./tools/../lib/rsa/rsa-verify.c:23:0,
from tools/lib/rsa/rsa-verify.c:1:
include/u-boot/rsa-mod-exp.h:69:18: error: unknown type name ‘u32’; did you mean ‘__u32’?
int zynq_pow_mod(u32 *keyptr, u32 *inout);
^~~
__u32
include/u-boot/rsa-mod-exp.h:69:31: error: unknown type name ‘u32’; did you mean ‘__u32’?
int zynq_pow_mod(u32 *keyptr, u32 *inout);
^~~
__u32
Fixes: 37e3a36a54 ("xilinx: zynq: Add support to secure images")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add ram base address to scriptaddr env variable to make boot
script address to be a valid address when ddr base address changes.
This works properly if the first memory region is the region where uboot
runs. Also the solution was taken in respect of a lot of jtag script
putting u-boot script to certain address. For standard cases
bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed
out of this location it does calculation.
This is not the best solution and should be done differently in future but
enough for now till we don't have full solution ready yet.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
For zynqmp qspi, frequencies up to 40MHz will work irrespective
of feedback clock enabled or disabled. If we want higher than
40Mhz the feedback clock should be enabled.
With spi-max-frequency 108MHz it is not working when the feedback
clock is disabled. Change it to 40MHz so that it works irrespective
of feedback clock enabled or disabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
U-Boot SPL on ZynqMP is using CONFIG_SPL_USE_TINY_PRINTF which doesn't
return any return value and all the time returns 0. That's why
even correct snprintf was returning in SPL chip ID as "unknown".
Change checking condition and allow snprintf to return 0 which is according
manual patch successful return.
"If an output error is encountered, a negative value is returned."
Fixes: 43a138956f7e ("arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fix hex format from 0x%0X to 0x%0x to show correct numbers.
Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Idea is to have something what can be used for board bringup from
generic board perspective.
There is a violation compare to spec that FRU ID is ASCII8 instead of
binary format but this is really for having something to pass boot and
boot to OS which has better generating options.
Also time should be filled properly.
For example:
fru board_gen 1000 XILINX versal-x-prc-01-revA serialX partX
There is also support for revision field which is Xilinx specific field.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for fru commands "fru capture" and "fru display".
The fru capture parses the FRU table present at an address and stores in a
structure for later use. The fru display prints the content of captured
structured in a readable format.
As of now, it supports only common header and board area of FRU. Also, it
supports only English language code and ASCII8/BINARY formats.
fru_data variable is placed to data section because fru parser can be
called very early before bss is initialized. And also information needs to
be shared that's why it is exported via header.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to reference files in common folder back. Simply adding
Makefile to this folder does the job because this "common" location is
already wired in main Makefile.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to have ZYNQ specific Kconfig macro in generic location
to be visible for all other SoCs. That's why move it to Xilinx common
location to be visible only for us.
Also introduce new bool entry ZYNQ_MAC_IN_EEPROM to have also an option to
disable it or enable. This has connection to code which is reading the
whole content of i2c and also work with the rest of date not just with MAC
address.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The commit 9f45aeb937 ("spl: fit: implement fdt_record_loadable") which
introduced fdt_record_loadable() state there spl_fit.c is not 64bit safe.
Based on my tests on Xilinx ZynqMP zcu102 platform there shouldn't be a
problem to record these addresses in 64bit format.
The patch adds support for systems which need to load images above 4GB.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
SPL is creating fit-images DT node when loadables are recorded in selected
configuration. Entries which are created are using entry-point and
load-addr property names. But there shouldn't be a need to use non standard
properties because entry/load are standard FIT properties. But using
standard FIT properties enables option to use generic FIT functions to
descrease SPL size. Here is result for ZynqMP virt configuration:
xilinx_zynqmp_virt: spl/u-boot-spl:all -82 spl/u-boot-spl:rodata -22 spl/u-boot-spl:text -60
The patch causes change in run time fit image record.
Before:
fit-images {
uboot {
os = "u-boot";
type = "firmware";
size = <0xfd520>;
entry-point = <0x8000000>;
load-addr = <0x8000000>;
};
};
After:
fit-images {
uboot {
os = "u-boot";
type = "firmware";
size = <0xfd520>;
entry = <0x8000000>;
load = <0x8000000>;
};
};
Replacing calling fdt_getprop_u32() by fit_image_get_entry/load() also
enables support for reading entry/load properties recorded in 64bit format.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove fixed reference clk used by plat->frequency and use clk
subsystem to get reference clk. As per spi dt bindings
"spi-max-frequency" property should be used by the slave devices.
This property is read by spi-uclass driver for the slave device.
So avoid reading above property from the platform driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove fixed reference clk used by plat->frequency and use clk
subsystem to get reference clk. As per spi dt bindings
"spi-max-frequency" property should be used by the slave devices.
This property is read by spi-uclass driver for the slave device.
So avoid reading above property from the platform driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There also a need to check return values to make sure that clocks were
enabled and setup properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The most of Xilinx evaluation boards have FMC connectors which contain
small eeprom for card identification. That's why read content of eeprom and
record it.
Also generate cardX_ variables for easier script handling.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Starts to use new way how eeproms should be referenced.
Reference is done via nvmem alias nodes. When this new way is specified
code itself read the eeprom and decode xilinx legacy format and fill struct
xilinx_board_description. Then based on information present there board_*
variables are setup.
If variables are saved and content can't be changed information is just
shown on console.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for getting a node/property from aliases.
The similar functionality is provided for chosen node and this
implemenatation is copy of it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default 48B sha3 hash value is written to srcaddr which is not the best
solution in case of that you want to use data for other operations. That's
why add key_addr optional parameters which enables to write 48B sha3 hash
value to specified address.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
This patch adds support for encryption and decryption on a given data
blob using different key sources such as userkey(KUP), device key and
PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has
been introduced.
Command:
zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n"
Encrypts or decrypts blob of data at src address and puts it\n"
back to dstaddr using key and iv at keyaddr and ivaddr\n"
respectively. keysrc values specifies from which source key\n"
has to be used, it can be User/Device/PUF key. A value of 0\n"
for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n"
aesop value would specify the operationwhich can be 0 for\n"
decrypt and 1 for encrypt(1) operation\n";
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SPL DT contains only nodes which are contain u-boot,dm-pre-reloc property.
iommu node is not this case that's why when DT is read DTC reports some
warnings.
$ dtc -I dtb -O dts dts/dt-spl.dtb >/dev/null
<stdout>: Warning (iommus_property): /amba/spi@ff0f0000:iommus: Could not get phandle node for (cell 0)
<stdout>: Warning (iommus_property): /amba/mmc@ff160000:iommus: Could not get phandle node for (cell 0)
<stdout>: Warning (iommus_property): /amba/mmc@ff170000:iommus: Could not get phandle node for (cell 0)
SPL also has an option to remove some DT properties which are useless for
SPL to make DT even smaller.
Default DT properties are pinctrl-0 pinctrl-names interrupt-parent
interrupts which are already removed.
The patch extends this list with iommus to get rid of above warnings.
Also power-domains unused properties can be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sometimes it is very useful to be able disable/enable cache that's why
enable commands for it by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga bitstream needs to be listed in config node in FIT image. Only tested
option is bitstream in BIN format.
Enabling this feature increase code size by almost 4k.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
simple_itoa() is implemented only for !CONFIG_USE_TINY_PRINTF. Tiny printf
is normally used by SPL that's code which uses simple_itoa() has missing
reference. That's why refactor code by using on snprintf() instead of
strncpy()/strncat() combination. This change also descrease code size by
saving 24B based on buildman.
aarch64: (for 1/1 boards) all -22.0 rodata +2.0 text -24.0
xilinx_zynqmp_virt: all -22 rodata +2 text -24
u-boot: add: 0/0, grow: 0/-1 bytes: 0/-24 (-24)
function old new delta
board_init 520 496 -24
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In case of fpga loading (which can be huge) 100ms is not enough. That's why
extend timeout 10 times to wait maximum 1s to get ACK back.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Don't know reason but in regular flow addr_hi/low are swapped in ATF. It
means when fpga load is done from EL3 there is a need to swap it for PMUFW
to load bitstream.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mini u-boot timer clock is not updated when u-boot is migrated from
emulator to silicon. Due to this slower clock of 2.72Mhz, delay() functions
are not working accurately. Update CONFIG_COUNTER_FREQUENCY to 100Mhz.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mini u-boot eMMC dt parameters are not in sync with full u-boot dt.
Frequency for eMMC is fixed to 25Mhz. Due to this, mmc multi-block write
commands are failing. Increase frequency to 200Mhz to fix this issue.
Add bus-width = <8>, non-removable and disable-wp properties to the node
as this is eMMC.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add distro boot support for microblaze and enable jtag, qspi,
dhcp, pxe boot targets for distro boot.
Enable DISTRO_DEFAULTS config in microblaze defconfig and also
enable support for spi xilinx driver & spi vendors to access
spi flash by distro boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Setup all the distro boot related environment variables at
run time. Add BOOT_SCRIPT_OFFSET config to microblaze board
Kconfig.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9cg version was supported before code refactoring. The patch is adding it
back.
Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Adding Z-turn board V5 to resolve the change between:
"Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035
"Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel KSZ9031
At this time the S25FL128SAGNFI003 doesn't work because of bug:
*** Warning - spi_flash_probe_bus_cs() failed, using default environment
zynq-zturn was checked on V5 board, same error.
Maybe Z-turn board have the same problem (board with W25Q128BVFIG).
Signed-off-by: Alexandre GRIVEAUX <agriveaux@deutnet.info>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add missing documentation for Xilinx ZynqMP configuration with steps how
to configure it and run it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Several drivers have been added without updating documentation.
And also some dt bindings have been moved to yaml.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add fragment to cover documenation for Xilinx platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Implement early init by calling generic board_init_f_alloc_reserve and
board_init_f_init_reserve functions:
* drop SYS_MALLOC_F_LEN related code, as allocation and gd->malloc_base
assignment are taken care of by the generic functions
* drop _gd logic
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Currently, the exceptions setup code is duplicated in pre-relocation and
post-relocation init. Factor out this code to __setup_exceptions asm
routine to get rid of the duplication.
__setup_exceptions is called with a relocation offset parameter (r5)
which is set to zero for pre-reloc init and gd->reloc_off for post-reloc
exception setup.
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DM_VIDEO conversion deadline has passed, disable VIDEO config.
Boards should convert to DM_VIDEO if they need video console
support.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
DM_VIDEO conversion deadline has passed, disable VIDEO config.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Erik van Luijk <evanluijk@interact.nl>
- No need to check before free in kendryte clk.
- Only enable OF_BOARD_FIXUP if U-Boot is configured for S-Mode.
- Reduce k210 dts DMA block size
- Move timers into drivers/timer
- Correct fu540 dts reg size of clint node
Half of this driver is a DM-based timer driver, and half is RISC-V-specific
IPI code. Move the timer portions in with the other timer drivers. The
KConfig is not moved, since it also enables IPIs. It could also be split
into two configs, but no boards use the timer but not the IPI atm, so I
haven't split it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
This is a regular timer driver, and should live with the other timer
drivers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Although the max DMA size supported by the hardware register is 22 bits (or
4M), the Linux driver for this device only supports transfers of up to 2M.
On a device with 8M total memory, I don't think it will make too much of a
difference.
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
It is unsafe to enable OF_BOARD_FIXUP only based on OF_SEPARATE.
OF_SEPARATE may indicate that the user wishes U-Boot to use a different
device tree than one obtained via OF_PRIOR_STAGE. However, OF_SEPARATE may
also indicate that the device tree which would be obtained via
OF_PRIOR_STAGE is invalid, nonexistant, or otherwise unusable. In this
latter case, enabling OF_BOARD_FIXUP will result in corruption of the
device tree. To remedy this, only enable OF_BOARD_FIXUP if U-Boot is
configured for S-Mode.
Fixes: 1c17e55594
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
free() checks if its argument is NULL. No need to check it twice.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Highlights:
- Fix a problem with the bootm overlap tests
- Remove duplicated code in fatwrite
- Cleanup our current "misc" command code and add a new one for misc
class devices.
- Various GPIO fixes
It doesn't need to consider start byte address.
If ramdisk size is 0x800000 and start address is 0x2700000, then it's
used until 0x02efffff, not 0x02f00000. But it's detected to overlapt RD
image, when kernel start address is 0x02f00000.
Because it's doing wrong calculation about rd_len.
This patch fixed wrong calculation address position when check
condition.
In addition, it needs to check one more condition about overlapping
entire area.
Fixes: commit fbde7589ce ("common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
do_save() function defined in fs.c also supports FAT file system
re-use the same for fatwrite command.
Also fix the FAT test script to match the expected output.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Enable the command "misc" for accessing miscellaneous devices with
a MISC uclass driver. The command provides listing all MISC devices
as well as read and write functionalities via their drivers.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
The "cmd/Kconfig" has a TODO description for CMD_MISC that it should
really be named as CMD_SLEEP. Change it in the whole source tree.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
This change fixes two issues when building u-boot-nodtb.bin target:
* Remove intermediate binary u-boot-nodtb.bin from disk when static_rela
call (which modifies u-boot-nodtb.bin binary) failed. It is required
because previous objcopy call creates binary and static_rela finish it.
* Do not call static_rela cmd when u-boot-nodtb.bin binary was not
created/updated by previous objcopy call.
Second fix would ensure that u-boot-nodtb.bin binary is not updated when
all prerequisites were up-to-date. And therefore final binary u-boot.bin
is not updated in case all prerequisites were not modified and were
up-to-date.
Now running 'make SOURCE_DATE_EPOCH=0 u-boot.bin' second time now does not
touch u-boot.bin binary in case nothing was modified, so GNU make can
correctly detect that everything is up-to-date.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the size of states_array to avoid overflow for
dev_pdata->voltages[j] and dev_pdata->states[j].
As the size of array is GPIO_REGULATOR_MAX_STATES, the size of
states_array is limited by GPIO_REGULATOR_MAX_STATES * 2 = 4
instead of 8 previously.
The value of the "count" variable is limited by the third parameter of
fdtdec_get_int_array_count.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the CMD_MDIO Kconfig option by removing the "is not set"
indication from all the defconfigs for this SoC.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On all newer Layerscape SoCs, only the export-controlled ciphers of the
crypto module are disabled on non-E parts. Thus it doesn't make sense to
completely remove the node. Linux will figure out what is there and what
is not.
Just remove it for older SoCs, where the module is indeed completely
disabled on non-E parts.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board supports 16 configuration bits which can be manipulated with
this command. See the board's README for a detailed explanation on each
bit.
Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add basic support for the Kontron SMARC-sAL28 board. This includes just
the bare minimum to be able to bring up the board and boot linux.
For now, the Single and Dual PHY variant is supported. Other variants
will fall back to the basic variant.
In particular, there is no watchdog support for now. This means that you
have to disable the default watchdog, otherwise you'll end up in the
recovery bootloader. See the board README for details.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The register to enable/disable the write-permission of DBI RO
registers should be accessed via the CFG_ADDR/CFG_DATA registers
instead of accessing directly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As per hardware documentation, ECx_PMUX has precedence
over SerDes protocol.
For LX2160/LX2162 if DPMACs 17 and 18 are enabled as SGMII
through SerDes protocol but ECx_PMUX configured them as RGMII,
then the ports will be configured as RGMII and not SGMII.
Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable support to compile OPTEE driver, access AVB TA
and RPMB API's access via RPC from OPTEE for lx2160
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable "optee_rpmb" command to write/read named persistent values
created on RPMB by opening session with OPTEE AVB TA.
This provides easy test for establishing a session with OPTEE
TA and storage of persistent data in MMC RPMB.
It includes following subcommands:
optee_rpmb read_pvalue:read persistent values on rpmb via OPTEE AVB TA
optee_rpmb write_pvalue:write persistent values on rpmb via OPTEE AVB
TA
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
In the current implementation, u-boot creates iommu mappings only
for PCI devices enumarated at boot time thus does not take into
account more dynamic scenarios such as SR-IOV or PCI hot-plug.
Add an u-boot env var and a device tree property (to be used for
example in more static scenarios such as hardwired PCI endpoints
that get initialized later in the system setup) that would allow
two things:
- for a SRIOV capable PCI EP identified by its B.D.F specify
the maximum number of VFs that will ever be created for it
- for hot-plug case, specify the B.D.F with which the device
will show up on the PCI bus
More details can be found in the included documentation:
arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix duplication of this code by placing it in a common function.
Furthermore, the resulting function will be re-used in upcoming
patches.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Move the pci device related fdt fixup in a function in order to
re-use it in a following patch. While at it, improve the error
handling.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
- Assorted updates for Xen, IPQ40xx, ASpeed, Keymile
- Assorted typo / documentation fixes
- Fix default preboot cmd to act like before with USB_STORAGE set
- A number of other bugfixes throughout the code
dev_err has been used for debugging and a few dev_err message are
printed for normal code execution. Make them dev_dbg instead.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
By using a hypervisor call, we can implement DEBUG_UART on xen.
This will allow us to see messages even earlier than serial_init().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This new function, xen_debug_putc(), is intended to be used to
enable CONFIG_DEBUG_UART on xen guest.
Please note that the underlying functionality in Xen is available
only when Xen is configured with !NDEBUG but is much simpler than
a generic HYPERVISOR_console_io().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
At present, DM_FLAG_PRE_RELOC is set only if !OF_CONTROL.
It doesn't make sense for this para-virtualized driver.
With this patch applied, you will be able to see early boot messages:
U-Boot 2020.10-00001-ge442e71a6c52-dirty (Oct 15 2020 - 11:02:25 +0900)
xenguest
Xen virtual CPU
Model: XENVM-4.15
DRAM: 128 MiB
PVBLOCK:
(XEN) gnttab_mark_dirty not implemented yet
pvblock: 0
In: hypervisor
Out: hypervisor
Err: hypervisor
xenguest#
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
1. Rename AST2500 reset driver from ast2500-reset.c
to reset-ast2500.c
2. Rename AST2500 reset kconfig option from AST2500_RESET
to RESET_AST2500
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The System Control Unit (SCU) controller of Aspeed
SoCs provides the reset control for each peripheral.
This patch refactors the reset method to leverage
the SCU reset control. Thus the driver dependency
on watchdog including dedicated WDT API and reset
flag encoding can be eliminated.
The Kconfig description is also updated accordingly.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The 12d152620d commit fixed the get_rate helper because the set_parent
one did not re-parent the clock device to the new parent. The 4d139f3838
commit allows you to remove this workaround by calling the
clk_get_parent_rate routine.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Fix up the documentation which was lost in a merge conflict in the
conversion to RST.
Fixes: 52d3df7fef ("log: Allow LOG_DEBUG to always enable log output")
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove the default value "usb start" for CONFIG_USB_STORAGE as the USB
storage boot initialization is correctly managed by distro boot command
('usb_boot' defined in include/config_distro_bootcmd.h already include
the command 'usb start').
Fixes: 324d77998e ("Define default CONFIG_PREBOOT with right config option")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace 'dev->dev' with '@desc->dev' in the gpio_request_by_name function
desc parameter description.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Instead having a hard coded value for "cramfsaddr" after compile time,
we change it to take the variable "cramfsaddr" for the ubicopy variable.
This makes sure that ubicopy uses the right address, even when
the value for "cramfsaddr" has changed.
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Due to increasing kernel image sizes we get problems when decompressing
the kernel image. To fix this we need to change the addresses where we
load and where we extract the kernel. Also we need to adapt the address
where to load the CRAMFS image and where to load the DTB file.
While at it also harmonize all boards for PPC and ARM to have the
same values. Also we add a new variable "env_version", so that the
userspace is able to detect if this is a u-boot binary with updated
values or not.
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
CC: Heiko Schocher <hs@denx.de>
CC: Tom Rini <trini@konsulko.com>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Remove old values from kmp204x.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
In the International System of Units (SI) the prefix kilo is abbreviated as
'k' not 'K'. 'K' is the symbol for Kelvin.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Since we now have the driver for Qualcomm PRNG HW, lets use it and add the necessary clocks and nodes.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This adds the driver for the IPQ40xx built-in MDIO.
This will be needed to support future PHY driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Since we have SPI driver for IPQ40xx QUP SPI controller, lets add the necessary nodes, pinctrl and clocks.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s.
Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
When building on a 32bit host the following warning occurs:
tools/image-host.c: In function ‘fit_image_read_data’:
tools/image-host.c:296:56: warning: format ‘%ld’ expects argument of
type ‘long int’, but argument 3 has type ‘__off64_t’
{aka ‘long long int’} [-Wformat=]
printf("File %s don't have the expected size (size=%ld, expected=%d)\n",
~~^
%lld
filename, sbuf.st_size, expected_size);
~~~~~~~~~~~~
tools/image-host.c:311:62: warning: format ‘%ld’ expects argument of
type ‘long int’, but argument 4 has type ‘__off64_t’
{aka ‘long long int’} [-Wformat=]
printf("Can't read all file %s (read %zd bytes, expexted %ld)\n",
~~^
%lld
filename, n, sbuf.st_size);
~~~~~~~~~~~~
Fix the format strings.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
As the ownership is now Hitachi Power Grids, change the license string
and adapt the compatible string in DTS files. For kmeter1.dts we
change it to "keymile,KMETER1" for now, as this is then compliant with
what is submitted to the linux kernel. All other boards don't have
a upstreamed version in linux mainline.
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
CC: Heiko Schocher <hs@denx.de>
CC: Marek Vasut <marex@denx.de>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Convert all the other http:// links to https:// .
www.denx.de/twiki/ seems to move to www.denx.de/wiki/ ,
so change it.
I checked all links in this patch are valid.
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
doc/arch/index.rst is a list of links to each architecture.
As for the sandbox details, doc/arch/sandbox.rst looks better.
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch include these updates
- Git repository has moved to GitLab
- HTTPS access to the file server is allowed
- pre-built images are no longer available
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
No timer drivers return an error from get_count. Instead of possibly
returning an error, just return the count directly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds kerneldocs for <timer.h>.
I don't know who should maintain doc/api/timer.rst, since the timer
subsystem seems to be maintained by SoC maintainers. MAINTAINERS is left
un-updated for the moment.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The sandbox is built with the SDL2 library with invokes the X11 library
which in turn calls getc(). But getc() in glibc is defined as
int getc(FILE *)
This does not match our definition.
int getc(void)
The sandbox crashes when called with parameter -l.
Rename our library symbol getc() to getchar().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This code is intended do prevent one from setting a shell variable abc
by doing
abc=123
if an environment variable named abc already exists. However, the
check is broken, since the env_get is done before the split on =, so
we look up whether an environment variable "abc=123" exists, which is
obviously never the case.
One could move the code to below the split on =, but instead, just
remove it, saving a little .text: The check has never worked as
intended (it goes all the way back to the initial git commit), and it
would anyway not guard against one first setting the shell variable,
then doing 'env set abc xyz'.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
add back again special case: -2
autoboot with no delay and no check for abort
as described in Kconfig option, see common/Kconfig
help text for option BOOTDELAY.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix some comments about functions.
Move genimg_get_comp_name() above genimg_get_short_name() because
genimg_get_comp_name() is related to get_table_entry_name().
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
In show_valid_options(), this patch introduces checking whether
a category has an entry ID. If not, adding it to a list for output
is skipped before calling qsort().
This patch will affect all kinds of image header categories
(-A, -C, -O and -T flags).
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a generic function which can check whether a category has an
entry ID.
Signed-off-by: Naoki Hayama <naoki.hayama@lineo.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_{SPL,TPL}_SIZE_LIMIT are defined as hex (SPL_SIZE_LIMIT was
converted in b51882d0 ("spl: Convert CONFIG_SPL_SIZE_LIMIT to hex"), but
there are still places that reference integer values. Change those to hex
as well. Also, update the Makefile to check for 0x0 instead of 0.
This also fixes the following build error when CONFIG_SPL_SIZE_LIMIT
is set by menuconfig to 0x0:
...
spl/u-boot-spl.bin exceeds file size limit:
limit: 0 bytes
actual: 0x80f0 bytes
excess: 0x80f0 bytes
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We don't want the debug output to be visible in a normal boot. Silence it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
It is much easier to read the bloblist addresses if it starts on a 4KB
boundary. Update it to align it accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function can be called when it is not known whether it will find
anything. This results in confusing log messages if the device is not
found. It is better for the caller to log the failure, if necessary.
Drop the logging from this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Activate CMD_EXPORTENV/CMD_IMPORTENV/CMD_ELF for STM32MP15 defconfig
- Fix stm32prog command: parsing of FlashLayout without partition
- Update MAINTAINERS for ARM STM STM32MP
- Manage eth1addr on dh board with KS8851
- Limit size of cacheable DDR in pre-reloc stage in stm32mp1
- Use mmc_of_parse() to read host capabilities in mmc:sdmmc2 driver
Remove duplicated stdio print message.
It's already displayed in common/console.c.
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Model: Odroid XU3/XU4/HC1/HC2 based on Exynos5422
Type: xu3
In: serial
Out: serial
Err: serial
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
A64-Teres-I board is a laptop which comes with a builtin keyboard.
The keyboard+trackpad controller pauses for 2 seconds at a firmware
prompt before loading its HID interface.
U-Boot needs to wait equally long to reliably enable the keyboard.
Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Series-Cc: Jagan Teki <jagan@amarulasolutions.com>
Series-Cc: Lukasz Majewski <lukma@denx.de>
Series-Cc: Andre Przywara <andre.przywara@arm.com>
Olimex OLinuXino LIME2 rev. H through L uses Micrel KSZ9031 PHY.
This enables the Micrel PHY for A20-OLinuXino-Lime2-eMMC_defconfig.
Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Allwinner sun50i SoCs contain an OpenRISC 1000 CPU that functions as a
System Control Processor, or SCP. ARM Trusted Firmware (ATF)
communicates with the SCP over SCPI to implement the PSCI system
suspend, shutdown and reset functionality. Currently, SCP firmware is
optional; the system will boot and run without it, but system suspend
will be unavailable.
Since all communication with the SCP is mediated by ATF, the only thing
U-Boot needs to do is load the firmware into SRAM. The SCP firmware
occupies the last 16KiB of SRAM A2, immediately following ATF.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add an entry type for a firmware blob for a System Control Processor,
given by an entry arg. This firmware is a raw binary blob.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Since commit d879616e9e ("spl: fit: simplify logic for FDT loading for
non-OS boots"), the SPL looks at the "os" properties of FIT images to
determine where to append the FDT.
The "os" property of the "firmware" image also determines how to execute
the next stage of the boot process, as in 1d3790905d ("spl: atf:
introduce spl_invoke_atf and make bl31_entry private"). For this reason,
the next stage must be specified in "firmware", not in "loadables".
To support this additional functionality, and to properly model the boot
process, where ATF runs before U-Boot, add the "os" properties and swap
the firmware/loadable images in the FIT image.
Since this description was copied as an example in commit 70248d6a2916
("binman: Support generating FITs with multiple dtbs"), update those
examples as well for correctness and consistency.
Acked-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Some boards, specifically 64-bit Allwinner boards (sun50i), are
extremely limited on SPL size. One strategy that was used to make space
was to remove the FIT "os" property parsing code, because it uses a
rather large lookup table.
However, this forces the legacy FIT parsing code path, which requires
the "firmware" entry in the FIT to reference the U-Boot binary, even if
U-Boot is not the next binary in the boot sequence (for example, on
sun50i boards, ATF is run first).
This prevents the same FIT image from being used with a SPL with
CONFIG_SPL_FIT_IMAGE_TINY=n and CONFIG_SPL_ATF=y, because the boot
method selection code looks at `spl_image.os`, which is only set from
the "firmware" entry's "os" property.
To be able to use CONFIG_SPL_ATF=y, the "firmware" entry in the FIT
must be ATF, and U-Boot must be a loadable. For this to work, we need to
parse the "os" property just enough to tell U-Boot from other images, so
we can find it in the loadables list to append the FDT, and so we don't
try to append the FDT to ATF (which could clobber adjacent firmware).
So add the minimal code necessary to distinguish U-Boot/non-U-Boot
loadables with CONFIG_SPL_FIT_IMAGE_TINY=y. This adds about 300 bytes,
much less than the 7400 bytes added by CONFIG_SPL_FIT_IMAGE_TINY=n.
Acked-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This consolidates the SoC-specific part at the top of the file to avoid
cluttering it up with preprocessor conditions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Prior to commit 7f7f8aca8257 ("sunxi: Convert 64-bit boards to use
binman"), if the BL31 environment variable was not defined, the firmware
would be loaded from a file "bl31.bin" in the current directory. Restore
that behavior by providing that as the default filename in case no entry
arg is provided, which will be the case if the environment variable is
unset.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Nodes should have a blank line separating them from sibling nodes and
properties. Add the necessary lines.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Due to an extra level of indentation, the "data" property containing the
FDT was being written repeatedly after every other property in the node.
This caused the generated FIT image to be invalid.
Move the block up one level, so the property is added exactly once.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If neither CONFIG_SPL_FIT_SOURCE nor CONFIG_USE_SPL_FIT_GENERATOR is
enabled, U_BOOT_ITS will be undefined, and attempting to make u-boot.itb
will pass invalid arguments to mkimage, causing it to print its help
message.
Remove the rule in that case, so it is more obvious that u-boot.itb is
not something that can be made. This will reduce confusion as platforms
move away from CONFIG_USE_SPL_FIT_GENERATOR, as u-boot.itb was
previously a valid goal for those platforms.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Previously, because we have no source code about the DRAM initialization
of V3s and missing some configurations (delays and MBUS QoS info), our
V3s DRAM initialization sequence is hacked from the H3 one.
As the SDK shipped with PineCube contains source code for V3s libdram,
we can retrieve these information from it and tweak some other magic
bits.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
This reverts commit eb39d8ba5f.
The commit breaks booting of fitImage by SPL, the system simply hangs.
This is because on arm32, the fitImage and all of its content can be
aligned to 4 bytes and U-Boot expects just that.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Reuben Dowle <reuben.dowle@4rf.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The current default of 0x400 for SYS_MALLOC_F_LEN is too small if any
additional drivers marked as DM_FLAG_PRE_RELOC are loaded before
relocation.
CONFIG_RSA=y which is needed for UEFI secure boot or for FIT image
verification loads the driver mod_exp_sw which has DM_FLAG_PRE_RELOC.
CONFIG_LOG=Y is another setting requiring additional early malloc
area, cf. log_init().
When running pine64-lts_defconfig with CONFIG_RSA=y and debug UART enabled
we see as output in main U-Boot
alloc_simple() alloc space exhausted
With this patch the default values of SYS_MALLOC_F_LEN and
SPL_SYS_MALLOC_F_LEN on ARCH_SUNXI are raised to 0x2000.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update email address of Maxime Ripard in git-mailrc to match more
recently updated entry in MAINTAINERS.
commit 9bd9b2bcbe ("MAINTAINERS: Update my email address")
commit bf8f4c4400 ("MAINTAINERS: Update email address for Maxime Ripard")
Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
According to the devicetree and the schematic, the 3.3V power rail for
the PHY is enabled by GPIO PC16. It's wired as active-high, with a
pull-up resistor, so actually works already when the GPIO is in
High-Z state.
However we should not take any chances and explicitly set the GPIO pin
to high, to avoid accidentally losing the PHY power.
The existing MACPWR Kconfig allows to do this easily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When sending a command via the MDIO bus, the Designware MAC expects some
bits in the CMD register to describe the clock divider value between
the main clock and the MDIO clock.
So far we were omitting these bits, resulting in setting "00", which
means "/ 16", so ending up with an MDIO frequency of either 18.75 or
12.5 MHz.
All the internal PHYs in the H3/H5/H6 SoCs as well as the Gbit Realtek
PHYs seem to be fine with that - although it looks like to be severly
overclocked (the MDIO spec limits the frequency to 2.5 MHz).
However the external 100Mbit PHY on the Pine64 (non-plus) board is
not happy with that, Ethernet was actually never working there, as the
PHY didn't probe.
As we set the EMAC clock (via AHB2) to 300 MHz in ATF (on the 64-bit
SoCs), and use 200 MHz on the H3, we need the highest divider of 128
to let the MDIO clock end up below the required 2.5 MHz.
This enables Ethernet on the Pine64(non-plus).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The current implementation of sun8i_get_ephy_nodes() makes quite some
assumptions, in general relying on DT path names is a bad idea.
I think the idea of the code was to determine if we are using the
internal PHY, for which there are simpler and more robust methods:
Rewrite (and rename) the existing function to simply lookup the DT node
that "phy-handle" points to, using the device's DT node.
Then check whether the parent of that PHY node is using an "H3 internal
MDIO" compatible string. If we ever get another internal MDIO bus
implementation, we will probably need code adjustments anyway, so this
is good enough for now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: rebase on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The error handling in recv() is somewhat broken, for instance
good_packet isn't really used, and it's hardly readable. Also we try
to check for short or too big packets, but those are actually filtered
out by the hardware.
Simplify the whole routine and improve the error handling:
- Bail out early if the current RX descriptor is not ready.
- Enable propagation of runt, huge and broken packets.
- Check for runt and huge packets, and return 0 to indicate this.
This will force the framework to call free_pkt for cleanup.
- Avoid aligning the packet buffer for invalidation again.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The EMAC soft reset routine was subtly broken, using an open coded
timeout routine without any actual delay.
Remove the unneeded initial reset bit read, and call wait_for_bit_le32()
to handle the timeout correctly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When iterating over all RX/TX buffers, we were using a rather long "idx"
control variable, which lead to a nasty overlong line.
Replace "idx" with "i" to avoid this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
To meet the current alignment requirements for our cache maintenance
functions, we were explicitly aligning the *arguments* to those calls.
This is not only ugly to read, but also wrong, as we need to make sure
we are not accidentally stepping on other data.
Provide wrapper functions for the common case of cleaning or
invalidating a descriptor, to make the cache maintenance calls more
readable. This fixes a good deal of the problematic calls.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
There is no reason to invalidate a TX descriptor before we are setting
it up, as we will only write to a field.
Remove the not needed invalidate_dcache_range() call.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When we initialise the TX descriptors, there is no need yet to clean
them all to memory, as they don't contain any data yet. Later we will
touch and clean each descriptor anyway.
However we tell the MAC about the beginning of the chain, so we have to
clean at least the first descriptor, to make it clear that this is empty
and there are no packets to transfer yet.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Before we initialise the RX descriptors, there is no need to *clean*
them from the cache, as we touch them for the first time.
However we should cover the case that those buffers contain dirty cache
lines, which could be evicted and written back to DRAM any time later,
in the worst case *after* the MAC has transferred a packet into them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The EMAC driver contains a lot of magic bits, although the manuals
and the Linux driver have all names for them.
Define those names and use them when programming the registers.
Also this replaces a lot of readl/mask/writel operations with the much
easier-to-read setbits_le32() macro.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Apparently due to copying from some older or converted driver, the
sun8i_emac driver contains pointless wrapper functions to bridge
between a legacy driver and the driver model.
Since sun8i_emac is (and always was) driver model only, there is no
reason to have those confusing wrappers. Just remove them, and use
the driver model prototypes directly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When preparing the register value for the MDIO command register, we
start with a zeroed register, so there is no need to mask off certain
bits before setting them.
Simplify the sequence, and rename the variable to a more matching
mii_cmd on the way.
Also the open-coded time-out routine can be replaced with a much safer
and easier-to-read call to wait_for_bit_le32().
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When initialising the TX DMA descriptors, we mostly chain them up,
but of course don't know about any data or its length yet.
That means they are still invalid, and the OWN bit should NOT be set
yet.
In fact when we later tell the MAC about the beginning of the chain,
and enable TX DMA in the start() routine, the MAC will start fetching
TX descriptors prematurely, as it can be seen by dumping the TX_DMA_STA
and TX_DMA_CUR_DESC registers.
Clear the owner bit, to not give the MAC the wrong illusion that it
owns the descriptors already.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When phy_startup() returns with an error, because there is no link or
the user interrupted the process, we shall stop the _start() routine
and return with an error, instead of proceeding anyway.
This fixes pointless operations when there is no Ethernet cable
connected, for instance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Amit Singh Tomar <amittomer25@gmail.com> # Pine64+
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When partitions are not available on a device the command stm32prog raises
an error but a device can have no partition to check in init_device()
and the command need to continue to the next part_id.
This patch correct an issue for ram0 target, when block_dev and mtd
are NULL.
For example with the simple flashlayout file:
Opt Part Name Type Device Offset Binary
- 0x01 fsbl Binary none 0x0 tf-a-serialboot.stm32
- 0x03 ssbl Binary none 0x0 u-boot.stm32
P 0x10 kernel System ram0 0xC2000000 uImage.bin
P 0x11 dtb FileSytem ram0 0xC4000000 stm32mp157f-ev1.dtb
Fixes: ffc405e63b ("stm32mp: stm32prog: add upport of partial update")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate CONFIG_CMD_ELF to accept the command "bootelf".
This patch simplifies the file stm32mp defconfig, as we have
no reason to deactivate this command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate CONFIG_CMD_IMPORTENV to accept the command "env import".
This command is useful in script to include some variable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add the STM32MP1 RNG driver in the list of drivers supported by
the STMicroelectronics STM32MP15x series.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add files and directories regex "stm32" and "stm" in "ARM STM STM32MP"
platform to avoid missing files or drivers supported by the
STMicroelectronics series STM32MP15x.
This patch adds the rules already used in Linux kernel for
ARM/STM32 ARCHITECTURE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Cosmetic update of gpio.h:
- remove enumerate: stm32_gpio_port, stm32_gpio_pin
because STM32_GPIO_XXX values are unused
- move STM32_GPIOS_PER_BANK in stm32_gpio.c
as its value is IP dependent and not arch dependent
No functional change as number of banks and number of gpio by banks
is managed by device tree since since DM migration and
commit 8f651ca60b ("pinctrl: stm32: Add get_pins_count() ops").
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
In pre-reloc stage, U-Boot marks cacheable the DDR limited by
the new config CONFIG_DDR_CACHEABLE_SIZE.
This patch allows to avoid any speculative access to DDR protected by
firewall and used by OP-TEE; the "no-map" reserved memory
node in DT are assumed after this limit:
STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
Without security, in basic boot, the value is equal to STM32_DDR_SIZE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
mmc_of_parse() can populate the 'f_max' and 'host_caps' fields of
struct mmc_config from devicetree.
The same logic is duplicated in stm32_sdmmc2_probe(). Use
mmc_of_parse(), which is more generic.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
"cap-mmc-highspeed" enables support for 26 MHz MMC, but there is no
additional flag to enable 52 MHz MMC. In Linux. "cap-mmc-highspeed"
is used for MMC HS at both 26MHz and 52MHz.
Use the same approach and enable MMC_CAP(MMC_HS_52) host capability
when "cap-mmc-highspeed" is found in the devicetree. In the event an
MMC card doesn't support 52 MHz, it will be clocked at a speed based
on its EXT CSD, even on 52 MHz host controllers
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
An earlier conversion from struct to defines introduced two errors, both
related to setup of EMAC routed via the FPGA. One of the offsets was
incorrect, and the EMAC0/EMAC1 were swapped.
The effect of this was rather odd: both ports could operate at gigabit,
but one of them would fail to transmit when operating at 100Mbit.
Fixes: db5741f7a8 ("arm: socfpga: Convert system manager from struct to defines")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add fallback compatibility string for R-Car Gen3 and RZ/G2.
Also sorted the compatible string as per SoC ID.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Add MediaTek USB3 Dual-Role controller driver to ARM MEDIATEK,
and add myself as a maintainer for it.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable mtu3, xhci, tphy drivers.
Device mode: enable fastboot;
Host mode: enable USB, FAT commands, and fixed regulator,
mass storage drivers;
Due to device mode is enabled by default, comment out
the host mode config here.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add an entry in usb_gadget_controller_number() for the MTU3
gadget controller. It is used to bind the USB Ethernet driver.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds support for the MediaTek USB3 DRD controller,
its host side is based on xHCI, this driver supports device mode
and host mode.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
There is only declaration of usb_speed_string(), but no definition,
so add it to avoid build error when call it.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add dt-binding for MediaTek USB3 DRD Driver which it's ported
from the Linux kernel DTS binding:
Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
Commit ID:
34d0545978b6 ("dt-bindings: usb: mtu3: fix typo of DMA clock name")
Due to Dual-Role switch is not supported in Uboot, some properties
are removed or changed.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add bindings for common properties, include maximum-speed,
dr_mode and phy_type
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In buffer DMA mode, gadget should re-configure EP 0 to received SETUP
packets when doeptsiz.xfersize is equal to a setup packet size(8 bytes)
and EP 0 is in WAIT_FOR_SETUP state.
Since EP 0 is not enabled in WAIT_FOR_SETUP state, SETUP packets is NOT
received from RxFifo and wriiten to the external memory.
Signed-off-by: Chance.Yang <chance.yang@vatics.com>
With DM enabled the ethernet code will receive a packet, call
the push method that's set by the EFI network implementation
and then free the packet. Unfortunately the push methods only
sets a flag that the packet needs to be handled, but the code
that provides the packet to an EFI application runs after the
packet has already been freed.
To rectify this issue, adjust the push method to accept the packet
and store it in a temporary buffer. The EFI application then gets
the data copied from that buffer. This way the packet is cached
until is is needed.
The DM Ethernet stack tries to receive 32 packets at once, thus
we better allocate as many buffers as the stack.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With a define for the magic number of packets received as batch
we can make sure that the EFI network stack caches the same amount
of packets.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Second set of u-boot-atmel features for 2021.01 cycle:
This feature set brings the rework of the clock tree for sam9x60 SoC.
This makes the clock tree fully compatible with Common Clock Framework
and allows full clock configuration in U-Boot. This means that the
sam9x60 boards can boot now using U-Boot.
This also includes the definitions for sam9x60 SiPs and a divisor fix
for the clock on sama7g5 SoC.
Use slow clock CCF compatible DT bindings. This will not break
the above functionality as the SoC is not booting with current
PMC bindings.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Done with:
./tools/moveconfig.py VIDEO_BMP_GZIP
The 3 suspicious migration because CMD_BMP and SPLASH_SCREEN
are not activated in these defconfigs:
- trats_defconfig
- s5pc210_universal_defconfig
- trats2_defconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For levels equal to the maximum value, the duty cycle must be equal to
the period.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1] a328ca7e4af3 ("drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The timing values for dw-dsi are often dependent on the used display and
according to Philippe Cornu will most likely also depend on the used phy
technology in the soc-specific implementation.
To solve this and allow specific implementations to define them as needed
add a new get_timing callback to phy_ops and call this from the dphy_timing
function to retrieve the necessary values for the specific mode.
This is based on the Linux commit [1] and adapted to the U-Boot driver.
[1] 25ed8aeb9c39 ("drm/bridge/synopsys: dsi: driver-specific configuration of phy timings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
syslog_test.h is in test/log/, not include/
Fixes: 52d3df7fef ("log: Allow LOG_DEBUG to always enable log output")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Now that linux/compat.h does not define these macros, we do not need to
undefine them.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All users of these functions now include dm/device_compat.h directly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver doesn't use DM (in the correct places), so we use a device and
not a udevice. We also need to include device_compat.h
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This patch enhances the Octeon TX/TX2 watchdog driver to fully enable
the WDT. With this changes, the "wdt" command is now also supported
on these platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
- fsl_esdhc_imx cleanup
- not send cm13 if send_status is 0.
- Add reinit API
- Add mmc HS400 for fsl_esdhc
- Several cleanup for fsl_esdhc
- Add ADMA2 for sdhci
- Octeon TX: Add NAND driver (Suneel)
- Octeon TX: Add NIC driver driver (Suneel)
- Octeon TX2: Add NIC driver driver (Suneel)
- Armada 8040: Add iEi Puzzle-M80 board support (Luka)
- Armada A37xx SPI: Add support for CS-GPIO (George)
- Espressobin: Use Linux model/compatible strings (Andre)
- Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre)
- Armada A37xx: Small cleanup of config header (Pali)
Sphinx.override_domain() is deprecated since Sphinx 1.8 and removed in
Sphinx 3.
Use Sphinx.add_domain(, override=True) instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Set the defaults on probe for the packet buffer size registers
for the i210.
The TX/RX PBSIZE register of the i210 resets to its default value
only at power-on - see Intel Ethernet Controller I210 Datasheet rev 3.5
chapter 8.3 'Internal Packet Buffer Size Registers'.
If something (another driver, another OS, etc.) modifies this register
from its default value, the e1000 driver doesn't function correctly. It
detects a hang of the transmitter and continuously resets the adapter.
Here we set this value to its default when resetting the i210 to
resolve this issue.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Make including the prefix
an error in checkpatch.pl so calls in the wrong format aren't
accidentally reintroduced.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_IS_ENABLED() takes the kconfig name without the CONFIG_ prefix,
e.g. CONFIG_IS_ENABLED(CLK) for CONFIG_CLK. Some of these were being
fixed every now and then, see:
commit 71ba2cb0d6 ("board: stm32mp1: correct CONFIG_IS_ENABLED usage for LED")
commit a5ada25e42 ("rockchip: clk: fix wrong CONFIG_IS_ENABLED handling")
commit 5daf6e56d3 ("common: console: Fix duplicated CONFIG in silent env callback")
commit 48bfc31b64 ("MIPS: bootm: Fix broken boot_env_legacy codepath")
Fix all files found by `git grep "CONFIG_IS_ENABLED(CONFIG"` by running
':%s/CONFIG_IS_ENABLED(CONFIG_\(\w+\))/CONFIG_IS_ENABLED(\1)/g' in vim.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the description of the global data pointer to the generated HTML
documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add the missing Sphinx documentation for struct global_data and
gd_board_type().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sphinx documentation is only available for enums not for #defines.
Anyway it is better to keep related definitions in an enum.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Functions that are used in multiple C modules should be defined in an
include.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Michael Walle <michael@walle.cc>
get_ticks does not always succeed. Sometimes it can be called before the
timer has been initialized. If it does, it returns a negative errno.
This causes the timer to appear non-monotonic, because the value will
become much smaller after the timer is initialized.
No users of get_ticks which I checked handle errors of this kind. Further,
functions like tick_to_time mangle the result of get_ticks, making it very
unlikely that one could check for an error without suggesting a patch such
as this one.
This patch panics if we ever get an error. There are two cases in which
this can occur. The first is if we couldn't find/probe the timer for some
reason. One reason for this is if the timer is not available so early. This
likely indicates misconfiguration. Another reason is that the timer has an
invalid/missing device tree binding. In this case, panicing is also
correct. The second case covers errors calling get_count. This can only
occur if the timer is missing a get_count function (or on RISC-V, but that
should be fixed soon).
Fixes: c8a7ba9e6a
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This parallels what I added for FAT in commit 6731bef696, allowing the
environment to be found in a specific partition on the device that the
board's mmc_get_env_dev() returns. On the Banana Pi R2 that means the
device that U-Boot was loaded from; either the internal eMMC or an SD
card.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Since it's so trivial I could just about tolerate this when there were only
two copies of it. But now there are about to be three.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
The EFI_RNG_PROTOCOL is needed for address randomization in Linux.
We should provide it by default on QEMU.
Reported-by: François Ozog <francois.ozog@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
To make the button command useful in a shell script it should return the
status of the button:
* 0 (true) - pressed, on
* 1 (false) - not pressed, off
The button command takes only one argument. Correct maxargs.
Adjust the Python unit test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
For testing purposes keep the output value when switching to input.
This allows us to manipulate the input value via the gpio command.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Using different strings for the device tree node labels and the label
property of buttons sharpens the button label unit test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
To simplify configuration and keep synchronized the PStore/Ramoops between
U-Boot and the Linux kernel, this commit dynamically adds the Ramoops
parameters defined in the U-Boot session to the Device Tree.
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Add PStore command to sandbox and sandbox64 defconfigs.
Add test checking:
- 'pstore display' of all records
- 'pstore display' only the 2nd dump record
- 'pstore save' of all records
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
[trini: Adjust to always load files from source directory]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
This patch adds a new pstore command allowing to display or save ramoops
logs (oops, panic, console, ftrace and user) generated by a previous
kernel crash.
PStore parameters can be set in U-Boot configuration file, or at run-time
using "pstore set" command. Records size should be the same as the ones
used by kernel, and should be a power of 2.
This command allows:
- to display uncompressed logs
- to save compressed or uncompressed logs, compressed logs are saved as a
compressed stream, it may need some work to be able to decompress it,
e.g. adding a fake header:
"printf "\x1f\x8b\x08\x00\x00\x00\x00\x00\x00\x00" |
cat - dmesg-ramoops-0.enc.z | gzip -dc"
- ECC part is not used to check memory corruption
- only 1st FTrace log is displayed or saved
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
[trini: Minor updates for current design, correct spacing in rST]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Newer eSDHC controllers support ADMA2 descriptor tables which support
64bit DMA addresses. One notable user of addresses in the upper memory
segment is the EFI loader.
If support is enabled, but the controller doesn't support ADMA2, we
will fall back to SDMA (and thus 32 bit DMA addresses only).
Signed-off-by: Michael Walle <michael@walle.cc>
These comments are relict for old, now removed config options.
So remove these obsoleted comments too.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Import armada-3720-espressobin-emmc.dts from Linux, but use sdhc1 for
emmc, since our dtsi is still based on downstream and sdhc0 is used for
the sd card.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Move most of the dts to the new common armada-3720-espressobin.dtsi
file, just like Linux, but keep the current, downstream based, version.
The dts itself is imported from Linux.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Fix the actual board vendor and ease synching dts files from Linux.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The device tree has a way to specify GPIO lines as chip selects. From
the binding docs:
So if for example the controller has 2 CS lines, and the cs-gpios
property looks like this:
cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
Then it should be configured so that num_chipselect = 4 with the
following mapping:
cs0 : &gpio1 0 0
cs1 : native
cs2 : &gpio1 1 0
cs3 : &gpio1 2 0
Add support for this, while retaining backward-compatibility with
existing device trees; the driver will preserve existing behavior if a
cs-gpios list is not given, or if a particular line is specified as <0>
(native).
This implementation is inspired by similar implementations in
neighboring drivers for other platforms: atmega, mxc, etc.
Signed-off-by: George Hilliard <ghilliar@amazon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add support for the marvell,armada8040-puzzle-m801 compatible string
in the board/Marvell/mvebu_armada-8k/board.c file to initialize the
networking on iEi Puzzle-M801 board (2x CP1 1 Gb ports).
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Add initial U-Boot support for the iEi Puzzle-M801 board based on the
Marvell Armada 88F8040 SoC.
Currently supported hardware:
1x USB 3.0
4x Gigabit Ethernet
2x SFP+ (with NXP PCA9555 and NXP PCA9544)
1x SATA 3.0
1x M.2 type B
1x RJ45 UART
1x SPI flash
1x EPSON RX8010 RTC
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Adds support for Network Interface controllers found on
OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Adds support for Network Interface controllers found on
OcteonTX SoC platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Adds support for NAND controllers found on OcteonTX or
OcteonTX2 SoC platforms. Also includes driver to support
Hardware ECC using BCH HW engine found on these platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Fix verified boot on BE targets
- Add support for multiple required keys in verified boots
- Add support for Initialization Vectors in AES keys in FIT images
- Assorted fixes in the RSA code
Commit fdf0819afb (rsa: fix alignment issue when getting public
exponent) changed the logic to avoid doing an 8-byte access to a
possibly-not-8-byte-aligned address.
However, using rsa_convert_big_endian is wrong: That function converts
an array of big-endian (32-bit) words with the most significant word
first (aka a BE byte array) to an array of cpu-endian words with the
least significant word first. While the exponent is indeed _stored_ as
a big-endian 64-bit word (two BE words with MSW first), we want to
extract it as a cpu-endian 64 bit word. On a little-endian host,
swapping the words and byte-swapping each 32-bit word works, because
that's the same as byte-swapping the whole 64 bit word. But on a
big-endian host, the fdt32_to_cpu are no-ops, but
rsa_convert_big_endian() still does the word-swapping, breaking
verified boot.
To fix that, while still ensuring we don't do unaligned accesses, add
a little helper that first memcpy's the bytes to a local fdt64_t, then
applies fdt64_to_cpu(). [The name is chosen based on the
[bl]eXX_to_cpup in linux/byteorder/generic.h].
Fixes: fdf0819afb ("rsa: fix alignment issue when getting public exponent")
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
The algo name should match between the FIT's signature node and the
U-Boot's control FDT.
If we do not check it, U-Boot's control FDT can expect sha512 hash but
nothing will prevent to accept image with sha1 hash if the signature is correct.
Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr>
This commit add the support in u-boot to read the IV
in the FIT image instead of u-boot device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Binaries may be encrypted in a FIT image with AES. This
algo needs a key and an IV (Initialization Vector). The
IV is provided in a file (pointer by iv-name-hint in the
ITS file) when building the ITB file.
This commits adds provide an alternative way to manage
the IV. If the property iv-name-hint is not provided in
the ITS file, the tool mkimage will generate an random
IV and store it in the FIT image.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
We assign first_deleted = 0. There is no need to check its value without
any further assignment in between.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add documentation about 'required-mode' property in /signature node
in U-Boot's control FDT.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds vboot tests to verify the support for multiple
required keys using new required-mode DTB policy.
This patch also fixes existing test where dev
key is assumed to be marked as not required, although
it is marked as required.
Note that this patch re-added sign_fit_norequire().
sign_fit_norequire() was removed as part of the following:
commit b008677daf ("test: vboot: Fix pylint errors").
This patch leverages sign_fit_norequire() to fix the
existing bug.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently FIT image must be signed by all required conf keys. This means
Verified Boot fails if there is a signature verification failure
using any required key in U-Boot DTB.
This patch introduces a new policy in DTB that can be set to any required
conf key. This means if verified boot passes with one of the required
keys, U-Boot will continue the OS hand off.
There were prior attempts to address this:
https://lists.denx.de/pipermail/u-boot/2019-April/366047.html
The above patch was failing "make tests".
https://lists.denx.de/pipermail/u-boot/2020-January/396629.html
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- Minor cleanup on K3 env variables
- Fix OSPI compatible for J721e
- Drop unused property in omap-usb2-phy
- Update Maintainer for am335x-guardian board.
Currently, readl/writel and esdhc_read32/esdhc_write32 are used. To align
the usage, change to only use esdhc_read32/esdhc_write32.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.
Signed-off-by: Michael Walle <michael@walle.cc>
First, we need the waterlevel setting for PIO mode only. Secondy, both DMA
setup code is identical for both directions, except for the data pointer.
Thus, unify them.
Signed-off-by: Michael Walle <michael@walle.cc>
Use the dma_{map,unmap}_single() calls. These will take care of the
flushing and invalidation of caches.
Signed-off-by: Michael Walle <michael@walle.cc>
SDMA can only do DMA with 32 bit addresses. This is true for all
architectures (just doesn't apply to 32 bit ones). Simplify the code and
remove unnecessary CONFIG_FSL_LAYERSCAPE.
Also make the error message more concise.
Signed-off-by: Michael Walle <michael@walle.cc>
This 1ms delay before sending command already exist from the beginning
of the fsl_esdhc driver added in year 2008. Now this driver has been
split for two files: fsl_esdhc.c and fsl_esdhc_imx.c. fsl_esdhc_imx.c
only for i.MX series. i.MX series esdhc/usdhc do not need this 1ms delay
before sending any command. So remove this 1ms, this will save a lot
time if handling a large mmc data.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
According to the code logic in __mmc_switch, if the parameter 'send_status'
is zero, no need to send cmd13, just wait the stated timeout time, then
can return directly.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Add properties related to eMMC HS400 mode.
mmc-hs400-1_8v;
bus-width = <8>;
They had been already in kernel dts file since the first
lx2160ardb dts patch.
b068890 arm64: dts: add LX2160ARDB board support
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
There was a fix-up for eMMC HS400 stability issue in Linux.
Patch link:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
commit/?id=58d0bf843b49fa99588ac9f85178bd8dfd651b53
Description:
Currently only LX2160A eSDHC supports eMMC HS400. According to
a large number of tests, eMMC HS400 failed to work at 150MHz,
and for a few boards failed to work at 175MHz. But eMMC HS400
worked fine on 200MHz. We hadn't found the root cause but
setting eSDHC_DLLCFG0[DLL_FREQ_SEL] = 0 using slow delay chain
seemed to resovle this issue. Let's use this as fixup for now.
Introduce the fix-up in u-boot since the issue could be reproduced
in u-boot too.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Fix mmc->clock with actual clock which is divided by the
controller, and record it with priv->clock which was removed
accidentally.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The process for eMMC HS400 mode for eSDHC is,
1. Perform the Tuning Process at the HS400 target operating frequency.
Latched the clock division value.
2. if read transaction, then set the SDTIMNGCTL[FLW_CTL_BG].
3. Switch to High Speed mode and then set the card clock frequency to
a value not greater than 52Mhz
4. Clear TBCTL[TB_EN],tuning block enable bit.
5. Change to 8 bit DDR Mode
6. Switch the card to HS400 mode.
7. Set TBCTL[TB_EN], tuning block enable bit.
8. Clear SYSCTL[SDCLKEN]
9. Wait for PRSSTAT[SDSTB] to be set
10. Change the clock division to latched value.Set TBCTL[HS 400 mode]
and Set SDCLKCTL[CMD_CLK_CTRL]
11. Set SYSCTL[SDCLKEN]
12. Wait for PRSSTAT[SDSTB] to be set
13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL].
14. Wait for delay chain to lock.
15. Set TBCTL[HS400_WNDW_ADJUST]
16. Again clear SYSCTL[SDCLKEN]
17. Wait for PRSSTAT[SDSTB] to be set
18. Set ESDHCCTL[FAF]
19. Wait for ESDHCCTL[FAF] to be cleared
20. Set SYSCTL[SDCLKEN]
21. Wait for PRSSTAT[SDSTB] to be set.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Add a mmc_hs400_prepare_ddr() interface for controllers
which needs preparation before switching to DDR mode for
HS400 mode.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Some controllers may have difference between HS200 tuning
and HS400 tuning, such as different registers setting,
different procedure, or different errata.
This patch is to add a hs400_tuning flag to identify the
tuning for HS400 mode.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
For DM_MMC, the controller re-initialization is needed to
clear old configuration for mmc rescan.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
"ti,dis-chg-det-quirk" property is not part of Linux kernel DT binding
documentation. Therefore drop this and instead use soc_device_match()
to distinguish b/w AM654 SR1.0 and SR2.0 devices similar to Linux kernel
driver.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Use DEFAULT_LINUX_BOOT_ENV to define the standard addresses used in rest
of TI platforms as defined in ti_armv7_common.h
This avoids the standard pitfalls we've had with kernel images and fdt
addresses stomping on each other.
As part of this process, redefine overlayaddr to be dtboaddr (defined
in ti_armv7_common.h for this very purpose) and get rid of the
definition of overlayaddr..
Signed-off-by: Nishanth Menon <nm@ti.com>
Use dtboaddr to define the overlay address common to all TI platforms
instead of creating a new overlayaddr for the purpose.
Signed-off-by: Nishanth Menon <nm@ti.com>
Use DEFAULT_LINUX_BOOT_ENV to define the standard addresses used in rest
of TI platforms as defined in ti_armv7_common.h
This avoids the standard pitfalls we've had with kernel images and fdt
addresses stomping on each other.
As part of this process, redefine overlayaddr to be dtboaddr (defined
in ti_armv7_common.h for this very purpose).. we will get rid of
overlayaddr later in the series.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reset the channel completely during channel release in order to clear
teardown bit before handing over to next user or jumping to Linux.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Update detect_enable_hyperflash() to look for "ti,am654-ospi" compatible
to match the upstream DT node.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
doc/README.log was already moved to doc/develop/logging.rst but has been
recreated by an incorrect merge.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the previous patch, net_init now exposes some errors, so check for
them.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
net_init does not always succeed, and there is no existing mechanism to
discover errors. This patch allows callers of net_init (such as net_init)
to handle errors. The root issue is that eth_get_dev can fail, but
net_init_loop doesn't expose that. The ideal way to fix eth_get_dev would
be to return an error with ERR_PTR, but there are a lot of callers, and all
of them just check if it's NULL. Another approach would be to change the
signature to something like
int eth_get_dev(struct udevice **pdev)
but that would require rewriting all of the many callers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver interferes with other sandbox tests since it causes log output
to be interspersed with "No ethernet found." messages. Disable this driver
by default.
Enable it for the syslog tests so that they still pass.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present all log devices are enabled by default. Add a function to allow
devices to be disabled or enabled at runtime.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is no way to disable a log driver. But the syslog driver
causes (attempted) network traffic in sandbox every time a log message
is printed, which is often.
Add a flag to enable a log driver. Adjust struct log_device to use a short
for next_filter_num so that no more memory is used for devices. Also fix
a missing line in the struct log_driver comment while here.
To maintain compatibility, enable it for all drivers for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is sometimes useful to output hex dumps in SPL. Add a config option to
allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
At present if CONFIG_LOG enabled, putting LOG_DEBUG at the top of a file
(before log.h inclusion) causes _log() to be executed for every log()
call, regardless of the build- or run-time logging level.
However there is no guarantee that the log record will actually be
displayed. If the current log level is lower than LOGL_DEBUG then it will
not be.
Add a way to signal that the log record should always be displayed and
update log_passes_filters() to handle this.
With the new behaviour, log_debug() will always log if LOG_DEBUG is
enabled.
Move log_test_syslog_nodebug() into its own file since it cannot be made
to work where it is, with LOG_DEBUG defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present MKIMAGE_DTC_PATH is in the devicetree menu but not within
'devicetree control' since it does not relate to that. As a result it
shows up in the top menu.
It actually relates to the mkimage tool, so create a new tools menu for it
and move it there.
Signed-off-by: Simon Glass <sjg@chromium.org>
This relates to booting since it is the default devicetree provided to
Linux. Move it under the 'boot options' menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are a number of miscellaneous boot images at the top level of the
kconfig menu. Move these into the 'boot options' menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the autoboot options are in cmd/Kconfig but they don't really
relate to commands. They relate to booting, so move this menu under the
boot menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most of the boot options are in common/Kconfig but that file is already
extremely large. Create a new Kconfig.boot to hold the boot options.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are quite a few boot-related menu options at the top level. Create a
new menu to hold these and move 'Boot images' into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Move ASPEED ram driver, update.
- Exhance pinctrl/gpio support, update Kendryte K210 support
- Enhance qemu_arm64 support for a single binary to work with and
without TF-A
Generate 'u-boot-splx4.sfp' which consist of 4 SPL images required
for booting up Cyclone5/Arria10.
By default, this 'u-boot-splx4.sfp' is generated without extra
padding after each SPL image.
For Cyclone5, 'u-boot-splx4.sfp' contains:
4 x SPL(64KB) = 256KB
For Arria10, 'u-boot-splx4.sfp' contains:
4 x SPL(256KB) = 1024KB
For Cyclone5 using NAND flash image layout for 128 KB memory blocks,
user can 'make' the following target to generate 4 SPL images with
padding:
make u-boot-spl-padx4.sfp
'u-boot-spl-padx4.sfp' contains four 128KB SPL images (each 64KB SPL is
followed by 64KB of zero-padding).
4 x (SPL(64KB) + zero-padding(64KB)) = 512KB
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
CONFIG_OF_EMBED was primarily enabled to support the S10/Agilex
spl hex file requirements. Since this option now produces a
warning during build, and the spl hex can be created using
alternate methods, CONFIG_OF_EMBED is no longer needed.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Add param entry point (ep) support for Arria 10 header. User can pass in
'e' option to mkimage to set the entry point. This is an optional option.
If not specified, default is 0x14.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Move to use generic handoff dtsi (socfpga_arria10-handoff.dtsi) and include
the specify generated _handoff.h header file from qts-filter-a10.sh script.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add a script to process HPS handoff data and generate a header
for inclusion in u-boot specific devicetree addons. The header
should be included in the top level of u-boot.dtsi.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Don't invoke 'SYSTEM_RESET' PSCI function because PSCI
function calls are not supported by u-boot running in EL3.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Resend mailbox command for 3 times with 2ms interval in between if
it receives MBOX_RESP_TIMEOUT and MBOX_RESP_DEVICE_BUSY response code.
Add a wrapper function mbox_send_cmd_common_retry() for retry, change
all the callers to use this wrapper function.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Mailbox command which is too large to fit into the mailbox
FIFO command buffer can be sent to SDM in multiple parts.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Mailbox driver should always check for the length of the response
and read the response data before returning the response status to
caller.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add miliseconds delay when waiting for mailbox event to happen
before timeout. This will ensure the timeout duration is predictive.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Document down the usage of boot_scratch_cold register to avoid
overlapping of usage in the code for S10 & Agilex.
The boot_scratch_cold register is generally used for passing
critical system info between SPL, U-Boot and Linux.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Enable FPGA full reconfiguration support with Intel FPGA SDM
Mailbox driver for Agilex.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ensure watchdog reset is not triggered if the fpga
reconfiguration is taking too long.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver
because it is using generic SDM (Secure Device Manager) Mailbox
interface shared by other platform (e.g. Agilex) as well.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
All SoCFPGA platforms (except Cyclone V) are now switching
to CONFIG_WDT (driver model for watchdog timer drivers)
from CONFIG_HW_WATCHDOG.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Print reset state (warm/cold) together with the
source (watchdog/MPU) which has triggered the warm
reset on S10 & Agilex.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Include SDM triggered warm reset bit (BIT1) in Reset Manager's stat
register when checking for HPS warm reset status.
Refactor the warm reset mask macro for clarity purpose.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Rename the driver from S10 to SoC64 because Intel Agilex platform
also using the this SYSRESET SoCFPGA driver for S10.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
In current implementation, any exception would trigger a CPU reset.
But a bad written SPL would cause infinite loop where the system
will reload the same SPL instead of loading factory safe image.
Hence this patch is to ensure any exception will cause a hang. At this
moment, watchdog shall be triggered and Remote System Update mechanism
shall load the next production image or factory safe image.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Timer only need to be initialized once in SPL.
This patch remove the redundancy of initializing the
timer again in U-Boot proper
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
'dwmac_socfpga' driver will setup the PHY interface during probe.
PHY interface setup in arch_misc_init() is no longer needed.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add additional membus writes to configure main and peripheral PLL
for Agilex's clock manager.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Since warm reset may optionally set the CLock Manager to'boot mode',
the clock driver should always force the Agilex's Clock Manager to
'boot mode' before the clock driver start configuring the Clock Manager
in SPL.
In SSBL, clock driver will skip the Clock Manager configuration
if it's already being setup by SPL (Clock Manager NOT in 'boot
mode') to prevent any inaccurate clocking issues happened on HPS
peripherals such as UART, MAC and etc.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Some drivers probing failed if clock enable function is not supported in
clock driver. So, add clock enable function to clock driver to solve it.
Return 0 (success) for *.enable function because all clocks are enabled
by default in clock driver probe.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Now that PIE works when U-Boot is started from ROM, let's enable
CONFIG_POSITION_INDEPENDENT, which allows to load U-Boot also via
ARM Trusted-Firmware's fip.bin to DRAM, without tweaking the
configuration.
To get a writable initial stack, we need to keep the fixed initial
stack pointer, which points to DRAM in our case.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
CONFIG_ARCH_SUPPORT_TFABOOT was used on the qemu-arm64 platform to
guard a tweak to the flash bank configuration. U-Boot now reads the
current flash setup from the devicetree, so there is no need for
this option anymore.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Currently we hard-code the number and initial addresses of QEMU's flash
banks, even though our code is perfectly able to gather the same
information from the DTB provided by QEMU.
This is especially annoying, since we have two slightly different
U-Boot configurations ("bare-metal" vs. loaded via Arm Trusted
Firmware), which need to be selected at build time.
Drop the two hard coded alternatives, and use
CONFIG_SYS_MAX_FLASH_BANKS_DETECT instead, which relies on the DTB to
figure out the actual flash configuration at runtime.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Currently selecting CONFIG_POSITION_INDEPENDENT also forces us to use an
initial stack pointer relative to the beginning of the BSS section.
This makes some sense, because this should be writable memory anyway.
However the BSS section is not cleared or used until later in the
setup process (after relocation), so memory nearby might not be
available early enough to host the initial stack. This is an issue if
U-Boot is loaded from (Flash-)ROM, for instance.
Allow CONFIG_INIT_SP_RELATIVE to be turned off by a board's config, to
be able to select a fixed stack pointer, for instance in known good
DRAM.
This will help QEMU utilising PIE, when it's loaded to (Flash-)ROM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
When the actual offset between link and runtime address is zero, there
is no need for patching up U-Boot early when running with
CONFIG_POSITION_INDEPENDENT.
Skip the whole routine when the distance is 0.
This helps when U-Boot is loaded into ROM, or in otherwise sensitive
memory locations.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
When we build an arm64 target and enable POSITION_INDEPENDENT, we were
skipping our build-time dynamic relocation fixup routine (STATIC_RELA).
This was probably done because we didn't need it in this case, as the
PIE fixup routine in start.S would take care of that at runtime.
However when we now skip this routine (upon detecting that the fixup
offset is 0), this might lead to uninitialised pointers.
Remove the exception, so that we always do the build-time relocation.
NOTE: GNU binutils starting with v2.27.1 do this build-time relocation
automatically, to be in-line with other architecures. So on newer
toolchains our manual fixup is actually not needed. It doesn't hurt to
have it, though, so that we keep compatibility with the popular Linaro
toolchains, which lack this feature.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
The CONFIG_TFABOOT option is more about what U-Boot DOES NOT need to do
than to support some features.
Explain a bit more in the Kconfig help text to avoid misunderstandings.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Most users don't need the standalone API examples. Distributions like SUSE
do not supply libgcc for cross-compiling and we cannot do without on ARMv8
for building examples/.
Make examples selectable via symbol CONFIG_EXAMPLES. It defaults to
yes on ARCH_QEMU to ensure that we compile the API as part of our
continuous integration.
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
The timeout calculation is based on the clk being in KHz but
the clk api returns the clk value in Hz. Convert this to KHz
to calculate the correct timeout value.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
This modifies the existing led test to check for default led naming as
added in the previous patch.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This more closely mirrors Linux's behaviour, and will make it easier to
transition to using function+color in the future.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
dm_gpio_ops.get_value can be called when the gpio is either input or
output. The current dw code always returns the input value, which is
invalid if the direction is set to out.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Previously, if there was no bank-name property, it was easy to have
confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch
follows the example of the sifive gpio driver.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change the type of gpio_dwabp_platdata.base from fdt_addr_t to a void
pointer, since we pass it to readl.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This extends the pinctrl-sandbox driver to support pin muxing, and adds a
test for that behaviour. The test is done in C and not python (like the
existing tests for the pinctrl uclass) because it needs to call
pinctrl_select_state. Another option could be to add a command that
invokes pinctrl_select_state and then test everything in
test/py/tests/test_pinmux.py.
The pinctrl-sandbox driver now mimics the way that many pinmux devices
work. There are two groups of pins which are muxed together, as well as
four pins which are muxed individually. I have tried to test all normal
paths. However, very few error cases are explicitly checked for.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This normalizes the documentation to conform to kernel-doc style [1]. It
also moves the documentation for pinctrl_ops inline, and adds argument and
return-value documentation. I have kept the usual function style for these
comments. I could not find any existing examples of function documentation
inside structs.
[1] https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.
Support for the pinmux property is done differently than in Linux. As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.
This commit increases the size of the sandbox build by approximately 48
bytes. However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.
The documentation has been updated from the last Linux commit before it was
split off into yaml files.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
the aspeed ddr sdram controller needs to know if the memory chip mounted on
the board is dual x8 die or not. Or it may get the wrong size of the
memory space.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
to improve the maintainability. It is more easier to modify and add
configurations of the driver in the centralized ram driver directory.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
The cfi-flash driver uses an open-coded version of the generic
algorithm to decode and translate multiple frames of a "reg" property.
This starts off the wrong foot by using the address-cells and size-cells
properties of *this* very node, and not of the parent. This somewhat
happened to work back when we were using a wrong default size of 2,
but broke about a year ago with commit 0ba41ce1b7 ("libfdt: return
correct value if #size-cells property is not present").
Instead of fixing the reinvented wheel, just use the generic function
that does all of this properly.
This fixes U-Boot on QEMU (-arm64), which was crashing due to decoding
a wrong flash base address:
DRAM: 1 GiB
Flash: "Synchronous Abort" handler, esr 0x96000044
elr: 00000000000211dc lr : 00000000000211b0 (reloc)
elr: 000000007ff5e1dc lr : 000000007ff5e1b0
x0 : 00000000000000f0 x1 : 000000007ff5e1d8
x2 : 000000007edfbc48 x3 : 0000000000000000
x4 : 0000000000000000 x5 : 00000000000000f0
x6 : 000000007edfbc2c x7 : 0000000000000000
x8 : 000000007ffd8d70 x9 : 000000000000000c
x10: 0400000000000003 x11: 0000000000000055
^^^^^^^^^^^^^^^^
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When possible use DMA for reading from CFI flash, this provides upto 5x
improvement in read performance with high speed CFI compliant flashes
like HyperFlash.
Code will gracefully fallback to CPU copy when DMA is unavailable.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Caller would need gracefully handle failures of dma_get_device(),
therefore reduce pr_err() to pr_debug() when DMA device is not found.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Octeon needs a platform specific cmd to boot the Linux kernel, as
specific parameters need to be passed and special handling for the
multiple cores (SMP) is needed.
Co-developed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
[use gd->ram_base instead of gd->bd->bi_memstart]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This is needed for Linux booting, as the memory infos need to be passed
in this bootmem format to the Linux kernel.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add header to handle bootinfo support, needed for Octeon Linux kernel
booting.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header includes the Octeon feature detection used in many Octeon
drivers.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header includes common register defines and accessor functions.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the necessary lowlevel init code, to enable SMP Linux
booting. This code will be used with the platform specific Octeon Linux
boot command "bootoctlinux", which starts a configurable number of cores
into Linux.
Additionally some erratas and lowlevel register initializations are
copied from the original Cavium / Marvell U-Boot source code, enabling
booting into the Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
As noticed while working on the USB xHCI support, Octeon needs to flush
all pending writes so that the values are present in the memory. Add
this "syncw" instruction (twice) to flush_dcache_range().
Signed-off-by: Stefan Roese <sr@denx.de>
Import platform specific mangle-port.h header, allowing a area specific
swapping, which is needed on Octeon for USB & PCI areas.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
Import octeon_should_swizzle_table[] which is needed for the area
specific swapping. It will be used by the platform specific
mangle-port.h header.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the glue layer for the MIPS Octeon SoCs. It's ported
mainly from the Linux code.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Octeon uses mapped addresses for virtual and physical memory. It's not
that easy to calculate the resulting addresses here. So let's remove
this BUG_ON() completely, as it's not really helpful.
Please also note, that BUG_ON() is not recommended any more in the Linux
kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
On MIPS platforms, mapping of the base address is needed. This patch
switches from dev_get_addr() to dev_remap_addr() to get the mapped base
address of the xHCI controller.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
This patch adds the board specific configuration (struct) for the
Octeon 3 EBB7304 EVK. This struct is ported from the 2013er Cavium /
Marvell U-Boot repository. Also, the Octeon RAM driver is enabled in
the board defconfig for its usage.
Tested with one and two DIMMs on the EBB7304 EVK (8 & 16 GiB).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the initialization call for the Octeon RAM driver to
the Octeon platforms code. So if enabled via Kconfig, the DDR driver
will be called and the RAM will be configured and used. If the RAM
driver is not enabled, the L2 cache is still used as RAM.
Signed-off-by: Stefan Roese <sr@denx.de>
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 3 includes the DIMM SPD handling code and the Kconfig / Makefile
integration.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 2 includes the very complex Octeon 3 DDR4 configuration
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 1 adds the base U-Boot RAM driver, which will be instantiated by
the DT based probing.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This header is used by the upcoming DDR driver and potentially by other
drivers ported from the 2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the memory controller (LMC) DT node to the Octeon 3 dtsi
file. It also adds the L2C DT node, as this is referenced by the DDR
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
When using SDL for input the SDL key codes are first converted to Linux key
codes and then to matrix entries of the cross wired keyboard.
We must not map any key code to two different places on the keyboard. So
comment out one backslash position.
Update the rest of the file from Linux 5.7.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The result of fdt_node_offset_by_phandle is negative for error,
so this patch corrects the check of this result in
fdtdec_parse_phandle_with_args.
This patch allows to have the same behavior with or without OF_LIVE
for the function dev_read_phandle_with_args with cell_name = NULL and
with invalid phandle.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The cell_count argument is required when cells_name is NULL.
This patch adds this parameter in live tree API
- of_count_phandle_with_args
- ofnode_count_phandle_with_args
- dev_count_phandle_with_args
This parameter solves issue when these API is used to count
the number of element of a cell without cell name. This parameter
allow to force the size cell.
For example:
count = dev_count_phandle_with_args(dev, "array", NULL, 3);
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the test for node.of_offset because an invalid offset is not
always set to -1 because the return value of the libfdt functions are:
+ an error with a value < 0
+ a valid offset with value >=0
For example, in ofnode_get_by_phandle() function, we have:
node.of_offset = fdt_node_offset_by_phandle(gd->fdt_blob, phandle);
and this function can return -FDT_ERR_BADPHANDLE (-6).
Without this patch, the added test dm_test_ofnode_get_by_phandle failed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Include missing log.h and change _ofnode_to_np() to ofnode_to_np() so
that compiling with OF_CHECKS enabled does not break.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some blobs need a larger alignment than the default. For example, ACPI
tables often start at a 4KB boundary. Add support for this.
Update the size of the test blob to allow these larger records.
Signed-off-by: Simon Glass <sjg@chromium.org>
The intention which bloblists is that each blob's data is aligned in
memory. At present it is only the headers that are aligned.
Update the code to correct this and add a little more documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
When running these tests on sandbox any failures result in very large or
long pointer values which are a pain to work with. Map them to an address
so it is easier to diagnose failures.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is helpful to be able to see basic statistics about the bloblist and
also to list its contents. Add a 'bloblist' command to handle this.
Put the display functions in the bloblist modules rather than in the
command code itself. That allows showing a list from SPL, where commands
are not available.
Also make bloblist_first/next_blob() static as they are not used outside
this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reformat the command line options chapter so that the command line options
clearly stand out.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for efi-2021-01-rc1
The following bugs in the UEFI system are resolved:
* illegal free in EFI_LOAD_FILE2_PROTOCOL implementation
* incorrect documentation of EFI_LOAD_FILE2_PROTOCOL implementation
* output of CRC32 as decimal instead hexadecimal in unit test
* use EfiReservedMemoryType for no-map reserved memory
* avoid unnecessary resets in UEFI unit tests
* call EFI bootmgr even without having /EFI/boot
- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
The device tree may contain a /reserved-memory node. The no-map property
of the sub-nodes signals if the memory may be accessed by the UEFI payload
or not.
In the EBBR specification (https://github.com/arm-software/ebbr) the
modeling of the reserved memory has been clarified.
If a reserved memory node in the device tree has the no-map property map,
create a EfiReservedMemoryType memory map entry else use
EfiBootServicesData.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CONFIG_EFI_GRUB_ARM32 is only needed for architectures with caches that are
not managed via CP15 (or for some outdated buggy versions of GRUB). It
makes more sense to disable the setting per architecture than per defconfig.
Move QEMU's CONFIG_EFI_GRUB_ARM32_WORKAROUND=n from defconfig to Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently, the EFI bootmgr is only called if there is a EFI binary
inside the path for removable media is found, i.e. /EFI/boot/. This
doesn't make sense. It is the duty of the bootmgr to find out the
path and name of the EFI binary to boot. It should be called even
if there is no /EFI/boot directory.
Thus, call the bootmgr before we try to boot the EFI binary inside
the removable media path.
Also remove the ${fdtcontroladdr} parameter because the fallback is
handled in cmd/bootefi.c and that already takes care of correct settings
if the board has ACPI and thus no device tree at all.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When we do not execute a test requiring ExitBootServices do not reset the
system after testing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Print the CRC32 loaded via the EFI_LOAD_FILE2_PROTOCOL as a hexadecimal
number.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
strsep() changes the address that its first argument points to.
We cannot use the changed address as argument of free().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
U-Boot offers a EFI_LOAD_FILE2_PROTOCOL which the Linux EFI stub can use to
load an initial RAM disk. Update the function comments of the
implementation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
This adds the driver for the PWM controller found in the Amlogic SoCs.
This PWM is only a set of Gates, Dividers and Counters:
PWM output is achieved by calculating a clock that permits calculating
two periods (low and high). The counter then has to be set to switch after
N cycles for the first half period.
The hardware has no "polarity" setting. This driver reverses the period
cycles (the low length is inverted with the high length) for
PWM_POLARITY_INVERSED.
Disabling the PWM stops the output immediately (without waiting for the
current period to complete first).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
an USB3.0 Type A connector and a M.2 Key M slot.
The PHY driving these differential lines is shared between
the USB3.0 controller and the PCIe Controller, thus only
a single controller can use it.
This adds this dynamic switching right before booting Linux
and the configuration steps in the boards documentation.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[narmstrong: fixed warning by replacing min() by min_t()]
Add the correcly architectured USB Glue node for Meson AXG and the
S400 board in -u-boot.dtsi until support in upstream Linux then
backported.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add the board_usb_init()/cleanup() for USB gadget for AXG based
on the code for the G12A architecture.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The registers which are managed by the meson-gxl-usb3 PHY driver are
actually "USB control" registers (which are "glue" registers which
manage OTG detection and routing of the OTG capable port between the
DWC2 peripheral-only controller and the DWC3 host-only controller).
Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb
driver supports the USB control registers on GXL and GXM SoCs (these
were previously managed by the meson-gxl-usb3 PHY driver).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The USB support was initialy done with a set of PHYs and dwc3-of-simple
because the architecture of the USB complex was not understood correctly
at the time (and proper documentation was missing...).
But with the G12A family, the USB complex was correctly understood and
implemented correctly.
This adds a proper driver for the glue, based on the G12A one, but with
enough changes to require a different driver in U-Boot.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").
This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
First set of u-boot-atmel features for 2021.01 cycle:
This feature set includes a new CPU driver for at91 family, new driver
for PIT64B hardware timer, support for new at91 family SoC named sama7g5
which adds: clock support, including conversion of the clock tree to
CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The
feature set also includes updates for mmc driver and some other minor
fixes and features regarding building without the old Atmel PIT and the
possibility to read a secondary MAC address from a second i2c EEPROM.
Currently, the return value of dev_read_u32_default is stored in an u32,
causing the subsequent "if (function < 0)" to always be false:
u32 function;
...
function = dev_read_u32_default(config, "brcm,function", -1);
if (function < 0) {
debug("Failed reading function for pinconfig %s (%d)\n",
config->name, function);
return -EINVAL;
}
Make "function" variable an int to fix this.
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Factor out reading IP base address to ofdata_to_platdata function, which
is designed for this purpose. Also, drop the dev->priv NULL check, since
this is already done by the dm core when allocating space using
priv_auto_alloc_size feature. (in drivers/core/device.c ->
device_ofdata_to_platdata).
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Yannick Fertré <yannick.fertre@st.com>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add test on the size of ofnode_phandle_args result to avoid access
to uninitialized elements in args[] field.
This patch avoids the issue when gpio-ranges cell size is not 3 as
expected, for example:
gpio-ranges = <&pinctrl 0>;
instead of
gpio-ranges = <&pinctrl 0 112 16>;
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Move the variables definition at the beggining of the function
gpio_stm32_probe().
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
DT alignment with Linux kernel v5.9-rc4 for the STM32MP15x soc
device tree files and the STMicroelectronics boards device tree files.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
According to doc/README.distro fdt_addr must not be set when DTB is not
available from hardware. So remove this entry.
Use address 32MB above the start of DRAM for kernel_addr_r. This way
we likely can avoid the self-relocation of the compressed kernel image
before it decompresses to offset 0x8000 from start of DRAM.
Use address 128MB above the start of DRAM for fdt_addr_r, since this is
the maximum location for the end of the kernel. So we avoid overwriting
the DTB.
Use 512k above that for ramdisk_addr_r. This should be enough for the
DTB, rest of DRAM can be used for initrd.
Place boot script / extlinux.conf at offset 0 / 1MB from start of DRAM.
This space is available for processing in U-Boot.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The u-boot,dm-spl DT props are missing on AV96, hence the pinmux and
flash0 nodes are not included in the reduced SPL DT. This prevents
SPI NOR boot from working at all. Fix this by filling them in.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Upon further discussion on the mailing list, we should not get in the
situation where the generic code path to set ethaddr/etc correctly does
not work. Revert this until someone can further debug the smc911x
driver regarding this issue.
This reverts commit 387cbf096e.
Signed-off-by: Tom Rini <trini@konsulko.com>
The R8A774A1 is compatible with the generic rcar-gen3-xhci controller.
This patch adds the compatibility flag, to support the xHCI controller.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Use macros with parameter to fill ep_info2, then some macros
for MASK and SHIFT can be removed
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For normal TRB fields:
use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK);
and use TRB_INTR_TARGET(x) instead of
(((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT)
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There some vendor quirks for MTK xHCI 0.96 host controller:
1. It defines some extra SW scheduling parameters for HW
to minimize the scheduling effort for synchronous and
interrupt endpoints. The parameters are put into reserved
DWs of slot context and endpoint context.
2. Its TDS in Normal TRB defines a number of packets that
remains to be transferred for a TD after processing all
Max packets in all previous TRBs.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
xhci versions 1.0 and later report the untransferred data remaining in a
TD a bit differently than older hosts.
We used to have separate functions for these, and needed to check host
version before calling the right function.
Now Mediatek host has an additional quirk on how it uses the TD Size
field for remaining data. To prevent yet another function for calculating
remainder we instead want to make one quirk friendly unified function.
Porting from the Linux:
c840d6ce772d("xhci: create one unified function to calculate TRB TD remainder.")
124c39371114("xhci: use boolean to indicate last trb in td remainder calculation")
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The patches changing the compatible strings to the ones used by Linux have
not been merged yet, so fix the checks to use the current in-tree ones.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Some Espressobin boards got assigned more than one MAC address. Update
instructions how to correctly store and preserve all MAC addresses.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andre Heider <a.heider@gmail.com>
commit 7c8f821e5d ("i2c: rcar_i2c: Set the slave address from
rcar_i2c_xfer") blindly called rcar_i2c_set_addr() with read argument
always set to 1 during xfer which introduced read/write errors, whereas
earlier rcar_i2c_read_common() called rcar_i2c_set_addr() with read set to
1 and rcar_i2c_write_common() called rcar_i2c_set_addr() with read set 0.
Fixes: 7c8f821e5d ("i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This commits update the support of sntp to use
the framework udp. This change allows to remove
all the reference to sntp in the main network
file net/net.c.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit adds a generic udp protocol framework in the
network loop. So protocol based on udp may be implemented
without modifying the network loop (for example custom
wait magic packet).
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add support for stingray PAXB PHY controller driver.
This driver supports maximum 8 PAXB phys using pipemux data.
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When load the last block, the "len" might not be a block size. This cause
loading the incorrect last block data.
The fix change "len" to tftp_block_size and minus one tftp_block_size
for offset calculation.
Use same offset calculation formula as in store_block().
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
tftp_cur_block start with 1 for first block, but tftp_cur_block counter is
start with zero when block number is rollover. The existing code
"tftp_cur_block - 1" will cause the block number become -1 in store_block()
when tftp_cur_block is 0 when tftp_cur_block is rollover.
The fix pass in tftp_cur_block to store_block() and minus the
tftp_block_size when do the offset calculation.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Fixes missing update to tftp_prev_block counter before increase
tftp_cur_block counter when do the tftpput operation.
tftp_prev_block counter is used in update_block_number() function to
check whether block number (sequence number) is rollover. This bug
cause the tftpput command fail to upload a large file when block
number is greater than 16-bit (0xFFFF).
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
The ethernet controller can read the MAC from EEPROM and display it,
but if ethaddr is not set, the ethernet is still unavailable.
This patch checks will automatically set the MAC address if it has
not already been set.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
ftgmac100 driver is using hard-coded PHY interface address of zero.
Each board can have different PHY interface address (phy_addr).
This commit modifies the driver to make use of board specific address
by leveraging CONFIG_PHY_ADDR.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
The Linux kernel does set the clock delays to
- 0.2 ns (their default, and lowest, hardware value) if delays should
not be enabled
- 2.0 ns (which causes the data to be sampled at exactly half way between
clock transitions at 1000 Mbps) if delays should be enabled
depending on the interface mode
See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/mscc/mscc_main.c#n523
So instead of using arbitrary delay values like now, mimic this behaviour.
The behaviour is the same for all of vsc8530/8531/8540/8541 so move that
to a shared function while at it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Add tests for SCMI reset controllers. A test device driver
sandbox-scmi_devices.c is used to get reset resources, allowing further
resets manipulation.
Change sandbox-smci_agent to emulate 1 reset controller exposed through
an agent. Add DM test scmi_resets to test this reset controller.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change introduces a reset controller driver for SCMI agent devices.
When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent
binds a reset controller device for each SCMI reset domain protocol
devices enabled in the FDT.
SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If enabled,
CONFIG_SCMI_AGENT is also enabled.
SCMI Reset Domain protocol is defined in the SCMI specification [1].
Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
is used to get clock resources, allowing further clock manipulation.
Change sandbox-smci_agent to emulate 3 clocks exposed through 2 agents.
Add DM test scmi_clocks to test these 3 clocks.
Update DM test sandbox_scmi_agent with load/remove test sequences
factorized by {load|remove}_sandbox_scmi_test_devices() helper functions.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change implements a SMCCC transport for SCMI exchanges. This
implementation follows the Linux kernel as references implementation
for SCMI message processing, using the SMT format for communication
channel meta-data.
Use of SMCCC transport in SCMI FDT bindings are defined in the Linux
kernel DT bindings since v5.8. SMCCC with SMT is implemented in OP-TEE
from tag 3.9.0 [2].
Links: [2] https://github.com/OP-TEE/optee_os/commit/a58c4d706d23
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change implements a mailbox transport using SMT format for SCMI
exchanges. This implementation follows the Linux kernel and
SCP-firmware [1] as references implementation for SCMI message
processing using SMT format for communication channel meta-data.
Use of mailboxes in SCMI FDT bindings are defined in the Linux kernel
DT bindings since v4.17.
Links: [1] https://github.com/ARM-software/SCP-firmware
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change introduces SCMI agent uclass to interact with a firmware
using the SCMI protocols [1].
SCMI agent uclass currently supports a single method to request
processing of the SCMI message by an identified server. A SCMI message
is made of a byte payload associated to a protocol ID and a message ID,
all defined by the SCMI specification [1]. On return from process_msg()
method, the caller gets the service response.
SCMI agent uclass defines a post bind generic sequence for all devices.
The sequence binds all the SCMI protocols listed in the FDT for that
SCMI agent device. Currently none, but later change will introduce
protocols.
This change implements a simple sandbox device for the SCMI agent uclass.
The sandbox nicely answers SCMI_NOT_SUPPORTED to SCMI messages.
To prepare for further test support, the sandbox exposes a architecture
function for test application to read the sandbox emulated devices state.
Currently supports 2 SCMI agents, identified by an ID in the FDT device
name. The simplistic DM test does nothing yet.
SCMI agent uclass is designed for platforms that embed a SCMI server in
a firmware hosted somewhere, for example in a companion co-processor or
in the secure world of the executing processor. SCMI protocols allow an
SCMI agent to discover and access external resources as clock, reset
controllers and more. SCMI agent and server communicate following the
SCMI specification [1]. This SCMI agent implementation complies with
the DT bindings defined in the Linux kernel source tree regarding
SCMI agent description since v5.8.
Links: [1] https://developer.arm.com/architectures/system-architectures/software-standards/scmi
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The tests rely on a dummy driver to allocate and initialize the regmaps
and the regmap fields using the managed API. The first test checks if
the regmap config fields like width, reg_offset_shift, range specifiers,
etc work. The second test checks if regmap fields behave properly (mask
and shift are ok) by peeking into the regmap.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When more nodes are added for a uclass the index might go into two or
more digits. This means that there are less spaces printed because they
are used up by the extra digits. Update the regular expression to allow
variable-length spacing between the class name and and index.
This was discovered when adding a simple_bus node in test.dts made
test_bind_unbind_with_uclass() fail because the index went up to 10.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
A regmap field is an abstraction available in Linux. It provides to access
bitfields in a regmap without having to worry about shifts and masks.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Some devices need to calculate the regmap base address at runtime. This
makes it impossible to use device tree to get the regmap base. Instead,
allow devices to specify it in the regmap config. This will create a
regmap with a single range that corresponds to the start and size given
by the driver.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Right now, the base of a regmap can only be obtained from the device
tree. This makes it impossible for devices which calculate the base at
runtime to use a regmap. An example of such a device is the Cadence
Sierra PHY.
Allow creating a regmap with one range whose start and size can be
specified by the driver based on calculations at runtime.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drivers can configure it to adjust the final read/write location.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Right now, regmap_read() and regmap_write() read/write a 32-bit value
only. To write other lengths, regmap_raw_read() and regmap_raw_write()
need to be used.
This means that any driver ported from Linux that relies on
regmap_{read,write}() to know the size already has to be updated at each
callsite. This makes the port harder to maintain.
So, allow specifying the read/write width to make it easier to port the
drivers, since now the only change needed is when initializing the
regmap.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some fields will be introduced in the regmap structure that should be
set to 0 by default. So, once we allocate a regmap, make sure it is
zeroed out to avoid unexpected defaults for those values.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Most of new linux drivers are using managed-API to allocate resources. To
ease porting drivers from linux to U-Boot, introduce devm_regmap_init() as
a managed API to get a regmap from the device tree.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add a test to verify that GPIOs can be acquired/released using the managed
API. Also check that the GPIOs are released when the consumer device is
removed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add managed functions to get a gpio from the devce-tree, based on a
property name (minus the '-gpios' suffix) and optionally an index.
When the device is unbound, the GPIO is automatically released and the
data structure is freed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
The tests are basically the same as for the regular API. Except that
the reset are initialized using the managed API, and no freed manually.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Add managed functions to get a reset_ctl from the device-tree, based on a
name or an index.
Also add a managed functions to get a reset_ctl_bulk (array of reset_ctl)
from the device-tree.
When the device is unbound, the reset controllers are automatically
released and the data structure is freed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Move call to optee_copy_fdt_nodes() introduced by commit 6ccb05eae0
before generic changes in kernel FDT so that platform specific changes
are not overridden by the changes made by this function.
Fixes: 6ccb05eae0 ("image: fdt: copy possible optee nodes to a loaded devicetree")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
- Disable CMD_IRQ for RISC-V.
- Update sipeed/maix doc
- Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API.
- Cleans up RISC-V timer drivers and converts them to DM.
- Correctly handle IPIs already pending upon prior stage bootloader (on the K210)
This adorns messages generated by dev_xxx with the device and driver
names. It also redirects dev_xxx to log when it is available. The names
of these functions very roughly take inspiration from Linux, but there is
no deeper correlation.
Both struct udevice and struct device are supported when logging, though
logging with struct device is no better than using log_xxx. The latter is
supported because of the large amount of existing code which logs with
struct device.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This driver does not use DM, so we need to use a struct device instead of a
struct udevice. Not ideal, but it'll have to do for now.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This can conflict with asm/io.h on some archs, and it isn't needed to build
dwc3-generic.c
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This logs with the device from struct dwc3. Some files also need to include
dm.h so fields in udevice can be accessed.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This adds a dev argument to some functions so dev_xxx always has a device
to log with. In one instance we must use use a different log function when
we are compiled without DM_USB.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
ep0.c also need to include dm.h so dev_xxx can access udevice fields.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Usually we can get a device from the current core, but some dev_dbg calls
have been converted to debug, since we are called on a cluster.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This function is never used anywhere, and it also tries to log with a
nonexistant device.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Without DM_ETH, cpsw_priv.dev is an eth_device. Just use its name instead.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
netdev_xxx evaluates to printf in U-Boot, so there is no extra info
printed. mvpp2 one of only two drivers which use these functions in U-Boot.
Convert these functions to dev_xxx where possible (and to log_xxx where
not).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
netdev_xxx evaluates to printf in U-Boot, so there is no extra info
printed. mvneta is one of two drivers which use these functions in U-Boot.
Convert these functions to dev_xxx where possible (and to log_xxx where
not).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
The name of the device we are working on is `ethdev` and not just `dev`.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This member was presumably dropped when this driver was converted from
Linux. However, it is still used in log statements during initialization.
This patch adds the member back. In addition, allocation of struct
vf610_nfc has been moved to the callers of vf610_nfc_nand_init. This allows
it to be allocated by DM (if it is being used) and for dev to be
initialized.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
There are too many levels of indirection when calling dev_err. This is an
artifact of the conversion of brcmnand_host.pdev from a struct
platform_device (which has a member `dev` pointing to a struct device) to
struct udevice.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This adds a udevice parameter to get_best_delay and msdc_set_mclk so they
can call dev_err properly.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Get it from spinand->slave->dev. Another option would be to use
spinand_to_mtd(spinand)->dev, but this is what the existing code uses.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This fixes dev_xxx() not always being called with a device. In
spi_nor_reg_read, a the slave device may not always be available, so we use
bus and cs instead.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This header is needed so struct udevice can be used in dev_xxx().
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Usually the device is gotten from sunxi_nfc. This is a struct device and
not a struct udevice, but the whole driver seems to be written wihout DM
anyway...
In a few instances, this patch modifies functions to take an nfc to log
with. In once instance we use mtd_info's device since there is no nfc.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Use the device from any mtd already available, or from the active mtd via
pxa3xx_nand_info if one is not.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This converts calls to dev_err to get the device from ti_sci_info where
appropriate.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
This ensures constructs like `if (gd & gd->...) { ... }` work when
accessing the global data pointer. Without this change, it was possible for
a very early trap to cause _exit_trap to directly or indirectly (through
printf) to read arbitrary memory. This could cause a second trap,
preventing show_regs from being printed.
printf (and specifically puts) uses gd to determine what function to print
with. These functions in turn use gd to find the serial device, etc.
However, before accessing gd, puts first checks to see if it is non-NULL.
This indicates an existing (perhaps undocumented) assumption that either gd
is NULL or it is completely valid.
Before this patch, gd either points to unexpected data (because it retains
the value it did from the prior-stage) or points to uninitialized data
(because it has not yet been initialized by board_init_f_init_reserve)
until the hart has acquired available_harts_lock. This can cause two
problems, depending on the value of gd->flags. If GD_FLG_SERIAL_READY is
unset, then some garbage data will be printed to stdout, but there will not
be a second trap. However, if GD_FLG_SERIAL_READY is set, then puts will
try to print with serial_puts, which will likely cause a second trap.
After this patch, gd is zero up until either a hart has set it in
wait_for_gd_init, or until it is set by arch_init_gd. This prevents its
usage before its data is initialized because both handle_trap and puts
ensure that gd is nonzero before using it. After gd has been set, it is OK
to access it because its data has been cleared (and so flags is valid).
XIP cannot use locks because flash is not writable. This leaves it
vulnerable to the same class of bugs regarding already-pending IPIs as
before this series. Fixing that would require finding another method of
synchronization, which is outside the scope of this series.
Fixes: 7c6ca03eae ("riscv: additional crash information")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
We can reduce the number of instructions needed to use available_harts_lock
by using the aq and rl suffixes for AMOs.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Even though we no longer call smp_function if an IPI was not sent by
U-Boot, we still need to clear any IPIs which were pending from the
execution environment. Otherwise, secondary harts will busy-wait in
secondary_hart_loop, instead of relaxing.
Along with the previous commit ("riscv: Use a valid bit to ignore
already-pending IPIs"), this fixes SMP booting on the Kendryte K210.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI device.
To be specific, the Kendryte K210 ROM-based bootloader does not clear IPIs
before passing control to U-Boot. Without this patch, the secondary hart
jumps to address 0x0 as soon as it enters secondary_hart_loop, and then
hangs in its trap handler.
This commit introduces a valid bit so secondary harts know when and IPI
originates from U-Boot, and it is safe to use the IPI API. The valid bit is
initialized to 0 by board_init_f_init_reserve. Before this, secondary harts
wait in wait_for_gd_init.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Without a matching barrier on the write side, the barrier in handle_ipi
does nothing. It was entirely possible for the boot hart to write to addr,
arg0, and arg1 *after* sending the IPI, because there was no barrier on the
sending side.
Fixes: 90ae281437 ("riscv: add option to wait for ack from secondary harts in smp functions")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Clearing MIP.MSIP is not guaranteed to do anything by the spec. In
addition, most existing RISC-V hardware does nothing when this bit is set.
The following commits "riscv: Use a valid bit to ignore already-pending
IPIs" and "riscv: Clear pending IPIs on initialization" should implement
the original intent of the reverted commit in a more robust manner.
This reverts commit 9472630337.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
We currently do this in a u-boot specific dts, but hopefully we can get
these bindings added in Linux in the future.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
The interrupt controller property is removed from the clint binding because
the clint is not an interrupt-controller. That is, no other devices have an
interrupt which is controlled by the clint.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Another "virtual" clock (in the sense that it isn't configurable). This
could possibly be done as a clock in the device tree, but I think this is a
bit cleaner.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This converts the clint driver from the riscv-specific interface to be a
DM-based UCLASS_TIMER driver. In addition, the SiFive DDR driver previously
implicitly depended on the CLINT to select REGMAP.
Unlike Andes's PLMT/PLIC (which AFAIK never have anything pass it a dtb),
the SiFive CLINT is part of the device tree passed in by qemu. This device
tree doesn't have a clocks or clock-frequency property on clint, so we need
to fall back on the timebase-frequency property. Perhaps in the future we
can get a clock-frequency property added to the qemu dtb.
Unlike with the Andes PLMT, the Sifive CLINT is also an IPI controller.
RISCV_SYSCON_CLINT is retained for this purpose.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
This merges the PLIC initialization code from two functions into one.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
This converts the PLMT driver from the riscv-specific timer interface to be
a DM-based UCLASS_TIMER driver.
The clock-frequency/clocks properties are preferred over timebase-frequency
for two reasons. First, properties which affect a device should be located
near its binding in the device tree. Using timebase-frequency only really
makes sense when the cpu itself is the timer device. This is the case when
we read the time from a CSR, but not when there is a separate device.
Second, it lets the device use the clock subsystem which adds flexibility.
If the device is configured for a different clock speed, the timer can
adjust itself.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
To test this function, sandbox CPU must set cpu_platdata.timebase_freq on
bind. It also needs to expose a method to set the current cpu. I also make
some most members of cpu_sandbox_ops static.
On the timer side, the device tree property
sandbox,timebase-frequency-fallback controls whether sandbox_timer_probe
falls back to time_timebase_fallback or to SANDBOX_TIMER_RATE.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function is designed to be used when a timer used to be initialized by
the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
such a case, the timer may prefer to use the clocks and clock-frequency
properties, but should be able to fall back on using the cpu's
timebase-frequency.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The riscv-timer driver currently serves as a shim for several riscv timer
drivers. This is not too desirable because it bypasses the usual timer
selection via the driver model. There is no easy way to specify an
alternate timing driver, or have the tick rate depend on the cpu's
configured frequency. The timer drivers also do not have device structs,
and so have to rely on storing parameters in gd_t. Lastly, there is no
initialization call, so driver init is done in the same function which
reads the time. This can result in confusing error messages. To a user, it
looks like the driver failed when trying to read the time, whereas it may
have failed while initializing.
This patch removes the shim functionality from the riscv-timer driver, and
has it instead implement the former rdtime.c timer driver. This is because
existing u-boot users who pass in a device tree (e.g. qemu) do not create a
timer device for S-mode u-boot. The existing behavior of creating the
riscv-timer device in the riscv cpu driver must be kept. The actual reading
of the CSRs has been redone in the style of Linux's get_cycles64.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The usage of regmap API in the SiFive RAM driver is not correct.
The reg address should be obtained via dev_read_addr_index() API.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
In the boot flow description add the RESET and BOOT button as well as the
function of the DTR and RTS lines of the serial interface.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We should check if the incoming parameter file_mapping is not NULL instead
of checking after adding an offset.
Reported-by: Coverity CID 307210
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Fix a typo
%s/interract/interact/
Use Samsung's capitalization of their trademarks
%s/onenand/OneNAND/
%s/Hyperflash/HyperFlash/
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[trini: Add other Hyperflash cases as noted by Stefan]
Signed-off-by: Tom Rini <trini@konsulko.com>
The 44758771ee commit removes CONFIG_PREBOOT but actually sets the USE_PREBOOT
Kconfig option which isn't CONFIG_PREBOOT and is also a bool option which means
we regress because 'usb start' isn't run when expected, it should also be run
for devices that have USB storage because keyboards aren't the only thing we
might need the USB bus for.
Fixes: 44758771ee ("arm: move CONFIG_PREBOOT="usb start" to KConfig")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Jonas Smedegaard <dr@jones.dk>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Pull request for UEFI sub-system for efi-2020-10-rc6
The following UEFI related issues are fixed:
* restore the global data pointer in the RISC-V trap handler
* install EFI_RNG_PROTOCOL only if we have a random number generator
* display human readable string for EFI_RNG_PROTOCOL in efidebug command
Add support for Microchip PIT64B timer. The timer is 64 bit length and
is used as a free running counter (in continuous mode with highest values
for period registers). The clock feeding the timer would be no more
than 12.5MHz.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
The gp register is used to store U-Boot's global data pointer. We should
not assume that an UEFI application leaves the gp register unchanged as
the UEFI specifications does not define who is the owner of the gp and tp
registers.
So the following sequence should be followed in the trap handler:
* save the caller's gp register
* restore the global data pointer
* serve interrupts or print crash dump and reset
* restore the caller's gp register
Cc: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1
based boards dues to the lack of the core clock in the device tree.
It was reported breaking EFI boot in the Linux EFI stub, because the
EFI_RNG_PROTOCOL didn't check for the RNG device presence before
installing itself.
The Linux amlogic,meson-rng.yaml doesn't mandate the core clock,
this the clock should be ignores if not present.
Nevertheless, the clock should be present and this should be fixed
on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced
with U-Boot.
The change has been tested on a Khadas VIM3, which uses the common
meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's
report, along with the RNG cmd.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Scott K Logan <logans@cottsay.net>
Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Scott K Logan <logans@cottsay.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Having an EFI_RNG_PROTOCOL without a backing RNG device leads to failure
to boot Linux 5.8.
Only install the EFI_RNG_PROTOCOL if we have a RNG device.
Reported-by: Scott K Logan <logans@cottsay.net>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add the Random Number Generator (RNG) protocol to the GUIDs that the
'efidebug dh' protocol can replace by a text.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Renesas Ebisu board is based on R-Car E3 SoC which has dual CA53 and
a CR7.
This patch drops check for cputype from reset_cpu() and also drops the
corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro
which is unused.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
The micrel phy driver is already configuring this values from
device tree. So remove the redundant phy configuration call from
this driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Renesas Draak board based on R-Car D3 has single CA53.
This patch drops check for cputype from reset_cpu() and also drops the
corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro
which is unused.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Use "imply" instead of "select" for BOARD_EARLY_INIT_F config option,
and then disable it on boards which don't need it.
Updated grpeach_defconfig to disable CONFIG_BOARD_EARLY_INIT_F option for
RZA1.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same
for PINCTRL_PFC_R8A774A1 help description
Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing
number of the SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable the fitImage update options on RCar Gen3 boards.
This permits easy update of multiple bootloader components.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965
Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF
accessible, mainline ATF is mandatory and must be built with
RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for
development and testing convenience only and must be disabled
in deployment for platform security reasons.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- Enhance the 'zboot' command to be more like 'bootm' with sub-commands
- The last series of ACPI core changes for programmatic generation of
ACPI tables
- Add all required ACPI tables for ApolloLake and enable ACPIGEN on
Chromebook Coral
- A feature minor enhancements to the 'hob' command
- Intel edison: Support for writing an xFSTK image via binman
Call mmc_of_parse at probe time to fetch all the host properties
from the DT.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The second clock of the IP block (the generic clock), must be explicitly
enabled.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Peng Fan <pengfan@nxp.com>
clk_set_rate will return rate in case of success and zero in case of
error, however it can also return -ev, but it's an ulong function.
To avoid any issues, disregard the return value of this call.
In case this call actually fails, nothing much we can do anyway, but we
can at least try with the previous values (or DT assigned-clocks)
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
It is useful to be able to flash Edison directly without relying on the
installed U-Boot being functional.
Add a binman image for this. It includes a 'OSIP' header (which happens to
look like an MBR / (Master-Boot Record), U-Boot binary and an environment.
I am not able to find a specification for OSIP.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
In some cases it is useful to include a U-Boot environment region in an
image. This allows the board to start up with an environment ready to go.
Add a new entry type for this. The input is a text file containing the
environment entries, one per line, in the format:
var=value
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
The recent support for missing external binaries does not show an error
message when a file is genuinely missing (i.e. it is missing but not
marked as 'external'). This means that when -m is passed to binman, it
will never report a missing file.
Fix this and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
We already use binman's 'multiple-images' feature with Chrome OS and we
want to use it for Edison. There is no real down-side.
Adjust x86 to always use multiple-images.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
At present the 'bdinfo' command shows the framebuffer address, but not the
address of the copy framebuffer, if present. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the mtrr command only support 8 MTRRs. Some SoCs have more than
that. Update the implementation to support up to 10. Read the number of
MTRRs dynamically instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some HOBs include information that can be decoded. Add a -v option to the
hob command, to allow this to be displayed. Add the ability to decode a
resource descriptor.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
GUIDs are one of the seven evils of the computer world. They obfuscate the
meaning and require people to look up long hex strings to decode it.
Luckily only a miniscule fraction of the 10^38 possible GUIDs are in use.
Add a way to decode the GUIDs known to U-Boot. Add a few more to the list
for good measure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The 'hob' command currently lists all HOB entries. Add way to list a
single entry, by index.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable new features and provide require device-tree config so that U-Boot
produces the correct ACPI tables on Coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present linux/bitops.h is included in ACPI code. This is not needed and
can cause a problem in fls64.h since BITS_PER_LONG is not defined. Move
the #include into the part not used by ACPI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards want to reserve extra regions of memory. Add a 'chosen'
property to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A few fields have an open-coded length. Use the defines for this purpose
instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this function only supports FSP-M but it is also used to read
FSP-S, in which case FSP-M may be zero. Add support for showing whichever
address is present in the FSP binary.
Also change the debug() statements to log_debug() while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If locating the FSP header hangs for whatever reason it is useful to see
where it got stuck. Add a debug print. Also show the address of the FSP-S
entry point as a sanity check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add files describing the various audio configurations supported on coral.
These are passed to Linux in the ACPI tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file doesn't currently have a log category. Add one so that items
are logged correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This provides information about a v1 TPM in the system. Generate this
table if the TPM is present.
Add a required new bloblist type and correct the header order of one
header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file cannot currently be included in ASL files. Add a header guard
to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is currently in the wrong place, so including the file in the device
tree fails. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Send this notification when U-Boot is about to boot into Linux, as
requested by the FSP.
Currently this causes a crash with the APL FSP, so leave it disabled for
now.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the MTRR registers are programmed with the list the U-Boot
builds up in the same order. In some cases this list may be out of order.
It looks better in Linux to have the registers in order, so sort them,
Signed-off-by: Simon Glass <sjg@chromium.org>
This new method is intended to be called when UEFI shuts down the 'boot
services', i.e. any lingering code in the boot loader that might be used
by the OS.
Add a definition for this new method and update the comments a little.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't have CONFIG_PCI in TPL but it is present in SPL, etc. So this
code is not needed. Drop it, and fix a code-style nit just above.
Signed-off-by: Simon Glass <sjg@chromium.org>
Support generating a DMAR table and add a few helper routines as well.
Also set up NHLT so that audio works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for generating various ACPI tables for Apollo Lake. Add a few
S3 definitions that are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Allow this header to be included in ASL files by adding a header guard and
a few definitions that are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Apollo Lake needs to generate a few more table types used on Intel SoCs.
Add support for these into the x86 ACPI code.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are needed for the CPU tables. Add them into an x86-specific file
since we do not support them on sandbox, or include tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an implementation of the DBG2 (Debug Port Table 2) ACPI table.
Adjust one of the header includes to be in the correct order, before
adding more.
Note that the DBG2 table is generic but the PCI UART is x86-specific at
present since it assumes an ns16550 UART. It can be generalised later
if necessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an implementation of the HPET (High Precision Event Timer) ACPI
table. Since this is x86-specific, put it in an x86-specific file
Signed-off-by: Simon Glass <sjg@chromium.org>
Add some more definitions to the iomap. These will be used by
ACPI-generation code as well as the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add SCI and power-state definitions required by ACPI tables. Fix the
license to match the original source file.
Als update the guard on acpi_pmc.h to avoid an error when buiding ASL.
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot does not support SMM (System Management Mode) at present, but needs
a few definitions to correctly set up the ACPI table. Add these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Intel WiFi chips can use a common routine to write the information needed
by linux. Add an implementation of this.
Enable it for coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some devices can wake the system from sleep, e.g opening the lid on a
clamshell or moving a USB mouse.
Add a wake to specify this for USB devices and add the settings for Apollo
Lake.
Signed-off-by: Simon Glass <sjg@chromium.org>
Many I2C devices produce roughly the same ACPI data with just things like
the GPIO/interrupt information being different.
This can be handled by a generic driver along with some information in the
device tree.
Add a generic i2c driver for this purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The extra ACPI code increases U-Boot above it current size limit. Move
the start earlier to provide space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a function to generate ACPI code for a _DSM method for a device.
This includes functions for starting and ending each part of the _DSM.
Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: fix the "new blank line at EOF" git warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
A 'Power Resource for Wake' list the resources a device depends on for
wake. Add a function to generate this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This device has a large set of ACPI tables. Bring these in from coreboot
so that full functionality is available (apart from SMI).
Signed-off-by: Simon Glass <sjg@chromium.org>
Expand this to 4KB so that it is possible to add custom information to it.
On Chromebooks this is used to pass verified-boot information.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present U-Boot puts a magic number in the ASL for the GNVS table and
searches for it later.
Add a Kconfig option to use a different approach, where the ASL files
declare the table as an external symbol. U-Boot can then put it wherever
it likes, without any magic numbers or searching.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add the definition of this structure common to Intel devices. It includes
some optional Chrome OS pieces which are used when vboot is integrated.
Drop the APL version as it is basically the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
This value is incorrect and causes problems booting Linux. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Recent versions of Chrome OS do not have a kernel in the root disk, to
save space.
With the improvements to the 'zboot' command it is fairly easy to load
the kernel from the raw partition. Add instructions on how to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When booting Chrome OS images the command line is stored separately
from the kernel. Add a way to specify this address so that images boot
correctly.
Also add comments to the zimage.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust maxargs to 8 for 'zboot start']
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
There is a lot of information in the setup block and it is quite hard to
decode manually. Add a 'zboot dump' command to decode it into a
human-readable format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the setup block is always obtained from the image
automatically. In some cases it can be useful to use a setup block
obtained elsewhere, e.g. if the image has already been unpacked. Add an
argument to support this and update the logic to use it if provided.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust maxargs to 7 for 'zboot start']
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present it is not possible to tell from a script where the setup block
is, or where the image was loaded to. Add environment variables for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a subcommand that loads the kernel into the right places in memory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: adjust ZBOOT_STATE_INFO value to match the command order]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add a little subcommand that prints out where the kernel was loaded and
its setup pointer. Run it by default in the normal boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Split out the code that actually boots linux into a separate sub-command.
Add base_ptr to the state to support this.
Show an error if the boot fails, since this should not happen.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add subcommands to zboot. At present there is only one called 'start'
which does the whole boot. It is the default command so is optional.
Change the 's' string variable to const while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: reduce maxargs to 6 of 'zboot start' subcommand]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present if an error occurs while setting up the boot, interrupts are
left disabled. Move this call later in the sequence to avoid this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present U-Boot sets a loader type of 8 which means LILO version 8,
according to the spec. Update it to 0x80, which means U-Boot with no
particular version.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To help reduce the size and complexity of load_zimage(), move the code
that reads the kernel version into a separate function. Update
get_boot_protocol() to allow printing the 'Magic signature' message only
once, under control of its callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the 'zboot' command does everything in one go. It would be
better if it supported sub-commands like bootm, so it is possible to
examine what will be booted before actually booting it.
In preparation for this, move the 'state' of the command into a struct.
This will allow it to be shared among multiple functions in this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This header is missing a few of the newer features from the specification.
Add these as well as a link to the spec. Also use the BIT() macros where
appropriate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
LX2160A rev2 uses different PCIe controller, so EP mode DT
nodes also need to be fixed up.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_DM_SPI_FLASH is only supported now with passing of driver
conversion deadline from non-DM to DM model. Hence, it's safe to remove
non-DM code check from pfe_spi_flash_init.
Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of
reading reading values from DT.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix Coverity issue: RESOURCE_LEAK.
leaked_storage: Variable addr going out of scope leaks the storage it
points to.
Fixes: e0152dbed6 ("net: pfe_eth: Use spi_flash_read API to access
flash memory")
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
All the 10G ports that were working in XFI mode were described as
using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time).
Add the minimal changes required for the FMan code to support XFI.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
PFE DDR addresses are now stored on to a stack varaiable rather
dynamic allocation.
Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The next DPMAC was always verified if it is enabled. In case of
DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will
be considered disabled and not detected by uboot.
Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
emc2305 is a common driver. It should not use platform specific
i2c address for slave device.
Pass chip_addr as agrument to emc2305_init() and set_fan_speed()
so that emc2305 driver can be used with different platforms.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
According to the reference manual of LS2088A, for a VDD voltage of
0.9V, the entry should be at 01000b.
Fixes: 4911948ec7 ("board/freescale,lsch3: Add entry for 0.9v")
Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Configure DWC3’s cache type to ‘cacheable’ for better
performance. Actually related register definition and values are SoC
specific, which means this setting is only applicable to Layerscape SoC,
not generic for all platforms which have integrated DWC3 IP.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Xilinx changes for v2021.01
arm64:
- Support for bigger U-Boot images compiled with PIE
microblaze:
- Extend support for LE/BE systems
zynqmp:
- Refactor silicon ID detection code with using firmware interface
- Add support for saving variables based on bootmode
zynqmp-r5:
- Fix MPU mapping and defconfig setting.
xilinx:
- Minor driver changes: names alignment
- Enable UBIFS
- Minor DT and macros fixes
- Fix boot with appended DT
- Fix distro boot
cmd:
- pxe: Add fixing for platforms with manual relocation support
clk:
- fixed_rate: Add DM flag to support early boot on r5
fpga:
- zynqmppl: Use only firmware interface and enable SPL build
serial:
- uartlite: Enable for ARM systems and support endians
mmc:
- zynq: Fix indentation
net:
- gem: Support for multiple phys
- emac: Fix 64bit support and enable it for arm64
kconfig:
- Setup default values for Xilinx platforms
- Fix dependecies for Xilinx drivers
- Source board Kconfig only when platform is enabled
- Fix FPGA Kconfig entry with SPL
- Change some defconfig values
bindings:
- Add binding doc for vsc8531
- Add DM_SPI, DM_SPI_FLASH support for powerpc platforms
- Add DM_ETH support on P1010RDB, P1020RDB, P2020RDB
- Remove some un-maintained powerpc platforms
- Add USB_STORAGE support in config
commit 0cfccb5401 ("configs: Resync with savedefconfig")
removed CONFIG_USB_STORAGE from some powerpc platforms' defconfig
files, whicih would block the use case of system loading rootfs
from USB drives, add them back.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the DM_ETH and DM_MDIO config.
On P2020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board_eth_init() is only used by legacy ethernet driver framework,
so do not compile it when DM_ETH config has been selected.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable the DM_ETH and DM_MDIO config.
On P1020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board_eth_init() is only used by legacy ethernet driver framework,
so do not compile it when DM_ETH config has been selected.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Move vsc7835 firmware uploading to board_early_init_r(), so that
the switch also can work in DM eTSEC driver.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The info of fixed-link PHY is described in DT node instead of
getting from MII, so detect the fixed-link PHY DT node first,
if it doesn't exist then probe the MII.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
For the platforms on which the eTSEC driver uses DM_ETH, convert its
MDIO controller code to also use DM_MDIO.
Note that for handling the TBI PHY (the MAC PCS for SGMII), we still
don't register a udevice for it, since we can drive it locally and there
is no point in doing otherwise.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Reworked to fix gazerbeam config]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The MII management register block offset is different between
gianfar and etsec2 compatible devices, this patch is to fix
this issue by adding driver data for different compatible
string.
Fixes: 2932c5a802 ("net: tsec: fsl_mdio: add DM MDIO support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The tsec driver now requires DM_MDIO when DM_ETH is enabled. To avoid
build errors, enable DM_MDIO in these boards' configs before we actually
add DM_MDIO support to tsec.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
It is utterly pointless to require an MDIO bus pointer for a fixed PHY
device. The fixed.c implementation does not require it, only
phy_device_create. Fix that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
As required by PCI Express spec a delay for at least 100ms after
de-asserting PERST# signal is needed before link training is enabled.
Linux kernels prior to 5.8 version do not automatically disable link
training before de-asserting PERST# signal, therefore this requirement is
not fulfilled.
Above requirement is needed for proper detection of some Compex PCIe WiFi
cards. Otherwise Linux kernel cannot detect it.
To allow using those PCIe cards with older Linux kernel versions booted by
U-Boot compiled with U-Boot a37xx pci driver, disable link training in
U-Boot when unloading this pci driver.
Thanks to DM_FLAG_OS_PREPARE flag, U-Boot automatically unload this driver
when booting Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Testing on a DNS-325 NAS has shown that in order for the device to work
we need to set CONFIG_NR_DRAM_BANKS to 1 and not 2.
Tested-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Reported-by: Dmitry N. Kolesnikov <dk.diklab@gmail.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Required for the generic distro mechanism.
Linux ships with 4 variants:
marvell/armada-3720-espressobin-v7-emmc.dtb
marvell/armada-3720-espressobin-v7.dtb
marvell/armada-3720-espressobin-emmc.dtb
marvell/armada-3720-espressobin.dtb
Use available information to determine the appropriate filename.
Fixes booting GRUB EFI arm64 on Fedora.
Reported-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Andre Heider <a.heider@gmail.com>
The hardware does not provide a MAC address. Enable this so that
network access works with just the default environment.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Konstantin Porotchkin <kostap@marvell.com>
Increase max gunzip size, required for booting itb recovery images on
uDPU.
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
and ESPRESSObin v7.
Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt commit message to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI
root devices are layerscape PCIe controllers. Unfortunately, this is not
true for the LS1028A. There is one additional static PCI root complex
(this contains the networking devices) which has nothing to do with the
layerscape PCIe controllers. On recent U-Boot versions this results in
the following panic:
"Synchronous Abort" handler, esr 0x96000044
elr: 000000009602fa04 lr : 000000009602f9f4 (reloc)
elr: 00000000fbd73a04 lr : 00000000fbd739f4
x0 : 0080000002000101 x1 : 0000000000000000
x2 : 00000000fbde9000 x3 : 0000000000000001
x4 : 0000000000000000 x5 : 0000000000000030
x6 : 00000000fbdbd460 x7 : 00000000fbb3d3a0
x8 : 0000000000000002 x9 : 000000000000000c
x10: 00000000ffffffe8 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000a2c
x14: 00000000fbb3d2cc x15: 00000000ffffffff
x16: 0000000000010000 x17: 0000000000000000
x18: 00000000fbb3fda0 x19: 0000000000000800
x20: 0000000000000000 x21: 00000001f0000000
x22: 0000000000000800 x23: 0000000000000009
x24: 00000000fbdc3c1b x25: 00000000fbdc28e5
x26: 00000000fbdcc008 x27: 00000000fbdc16e2
x28: 000000000f000000 x29: 00000000fbb3d3a0
Code: 394072a1 f94006a0 34000041 5ac00a94 (b8336814)
Resetting CPU ...
This bug already existed in former versions, but the spurious write was
never trapped, because the destination address was a valid address (by
pure luck).
Make sure the PCI root is actually one of the expected PCIe layerscape
controllers by matching its compatible string.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_ENV_OVERWRITE disables write protection on various environment
variables like "ethaddr" and "serial".
Enable this config in LS1046A and LS1012A defconfigs. This resolves an
error while setting multiple values of "ethaddr" variable.
Before the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1
Error: Can't overwrite "ethaddr"
Error inserting "ethaddr" variable, errno=1
After the change:
=> setenv ethaddr 00:E0:0C:00:06:0
=> setenv ethaddr 00:E0:0C:00:06:1
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
scan_dev_for_efi is supposed to be called from scan_dev_for_boot.
However this call is missing for ls1028ardb and ls1028aqds boards. As
a result EFI boot doesn’t work. Fix this issue by removing custom
definition of scan_dev_for_boot and use the default definition
instead.
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: andy.tang@nxp.com
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
fixed-rate driver is not different from clk_fixed_factor and it is required
very early in boot that's why setup flag for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
pxe sub commands need to be manually relocated for architectures which
enables MANUAL_RELOC as Microblaze.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
PXE and DHCP shouldn't be listed when commands are not enabled that's why
handle it in the same way as is done for Zynq and ZynqMP.
Fixes: ec48b6c991 ("arm64: versal: Add support for new Xilinx Versal ACAPs")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Map all resource for R5 to operate properly.
The patch is done based on the commit 23f7b1a776 ("armv7R: K3: am654:
Enable MPU regions") which also map the whole 4GB at first and then change
mapping for DDR.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ATF support was all the time based on FIT image support but this dependency
is not recorded anywhere.
For !SPL_FIT && SPL_ATF there is compilation error:
common/spl/spl.c: In function 'board_init_r':
common/spl/spl.c:689:26: error: 'struct spl_image_info' has no member named 'fdt_addr'
689 | spl_fixup_fdt(spl_image.fdt_addr);
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Both SOCs shouldn't have any problem with 64bit dma accesses. Also with PIE
enabled when u-boot is placed above 4GB without any memory mapped below 4GB
address space efi_memory_init() call is failing due to missing memory node.
For this two reason disable this option for ZynqMP and Versal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
if conditions should match.
Fixes: a18d09ea38 ("fpga: zynqmp: Add secure bitstream loading for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile
and zynqmp.c to simplify if/endif logic in zynqmp.c.
This change is mostly done to be able to use CONFIG_IS_ENABLED macro and
obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync.
And removing one line from Topic Miami boards which is not needed because
symbol is not enabled via Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable position independent pre-relocation to let users options to put
u-boot to different locations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enabling saving variables to MMC(FAT), NAND, SPI based on primary bootmode.
Maybe that logic can be tuned for more complicated use cases and better
tested for different bootmodes.
Tested on zcu104 to SD(FAT) and JTAG(NOWHERE).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to have name variable saved in BSS section when it
doesn't need to be really used. That's why remove static from variable
definition and use strdup() to duplicate string with exact size from malloc
area instead.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Current algorithm used to get the silicon name is bit complicated and
hard to follow. Updated to use more straightforward mechanism based on
the Device ID code table (Table 1-2). The full IDCODE register is used
(except device revision bits [31:28]) to get the device name and IDCODE2
value is used for identifying the variant.
Additionally to make the algorithm bit more clear it also save some space
as the devices table is slightly bit smaller.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
flush_cache() arguments are not type casted to take care of 64 bit
systems. Use phys_addr_t to type cast for it to work properly for 32 bit
and 64 bit systems.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
There are compilation warnings showing up when we compile AXI ethernet
driver for 64bit architectures. Fix them, so that it works on both 32
and 64 bit architectures.
DMA descriptors are not taking care of 64bit addresses. To fix it,
change axidma_bd members as below:
next ==> next_desc
reserverd1 ==> next_desc_msb
phys ==> buf_addr
reserverd2 ==> buf_addr_msb
and update next_desc and buf_addr with lower 32 bits of the addresses,
update next_desc_msb and buf_addr_msb with upper 32 bits of the 64bit
addresses.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add MSCC header with delay definitions for VSC8531 and associated
family devices.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
It was protected just for SPL_OS_BOOT but this function is only called when
SPL_ATF is enabled that's why change macro name.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
NAND_ARASAN selecting DM_MTD uunconditionally. Driver can be enabled with
!DM that's why Kconfig it showing it as error:
WARNING: unmet direct dependencies detected for DM_MTD
Depends on [n]: DM [=n]
Selected by [y]:
- NAND_ARASAN [=y] && MTD_RAW_NAND [=y]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Value of shunt resistor for INA226s that monitor VCCINT and VCC_SOC power
rails are incorrect. This patch corrects those values.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
There is 2nd pca9548 mux on I2C1 bus that controls SFP0, SFP1, and QSFP1
ports. Channel 0 and 1 are connected to J287 connector for SFP0 & SFP1, and
channel 2 is connected to J288 connector for QSFP1.
Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add CONFIG_XILINX_UARTLITE config to versal/zynqmp defconfig to
enable uartlite driver support by default.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This endinness changes are taken from linux uartlite driver.
Reset TX fifo in control register and check TX fifo empty
flag in lower byte of the status register to detect if it
is a little endian system. Based on this check, program the
registers with le32 or be32 through out the driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable required configs for using ubifs in uboot.
UBIFS testing procedure from u-boot:
Let's say we have two partitions in dt as below and want to format
partition1 "images" with ubifs.
partition@0 {
label = "boot";
reg = <0x0 0x1000000>;
};
partition@1 {
label = "images";
reg = <0x1000000 0x7000000>;
};
We will format the partition from linux and copy some files and access
from uboot later.
First thing, in linux config disable CONFIG_MTD_SPI_NOR_USE_4K_SECTORS.
this is required as ubifs expects min LEB size as 15*1024 bytes.
Use below commands in linux to format "images" partition with ubifs.
ubiformat /dev/mtd1
ubiattach /dev/ubi_ctrl -m 1
ubimkvol /dev/ubi0 -N images -m
mount -t ubifs ubi0:images /mnt
We can copy files to /mnt and unmount it.
To access this ubifs partition from uboot, run below commands.
(Don't forget to probe device before, e.g. sf probe 0 0 0)
setenv mtdids "nor0=nor0"
setenv mtdparts "mtdparts=nor0:16m(boot),112m(images)"
ubi part images
ubifsmount ubi0:images
make sure we match "mtdparts" to whatever is given in dt w.r.t partition
sizes.
"mtdparts" command will list the mtd partitions in u-boot.
Once ubifs is mounted, we can use "ubifsls" to list the files in that
partition and use "ubifsload <addr> <filename>" to load files from ubifs
partition to DDR.
Reading information about mtd layout from DT is not supported.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add read/write memory utilities for 16 and 32 bits. Add these
api's for both little and big endian systems similar to arm
architecture.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
U-Boot on xilinx boards is checking one address where DTB can be placed as
the first location for DTB. Originally this code was developed for Versal
where QEMU was putting generated DTB for U-Boot to use.
The patch enables changing this address which is necessary for cases where
default address is pointing to location (DDR) which is not present. The
access to this location can cause exception.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Do not source xilinx board Kconfig by other boards. These configs should be
available only when Xilinx platforms are selected.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.
This is follow up patch based on commit 664e16ce99 ("xilinx: kconfig:
Change Kconfig dependencies for Xilinx drivers").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zynq is similar to ZynqMP u-boot feature wise that's why also enable
default option for ENV_FAT_DEVICE_AND_PART Kconfig entry.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Find out MDIO bus and enable MDIO access to it if this is done via
different GEM controller. Only works across GEM instances.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The most of drivers are using '_' instead of '-' in driver name. That's why
sync up these names to be aligned. It looks quite bad to see both in use.
It is visible via dm tree command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The GPIO bank name for banks J and K are not correct when using the
'gpio' command from the console.
The driver derives the bank name from the device tree instance string by
using the instance value and adding 'A': gpio0@xxaddrxx is Bank A,
gpio1@yyaddryy is Bank B and so on.
On the PIC32, there is no Bank I so instances 8 and 9 need to be
incremented as a minimum change.
An alternative (less opaque) implementation would be to use a bank-name
property instead but this would require modifying the driver code too.
Signed-off-by: John Robertson <john.robertson@simiatec.com>
GPIO state cannot be changed via the device tree (e.g. with gpio-hog) or
using the 'gpio' command from the console.
The root cause is a discrepancy between the driver and the device tree:
the driver code expects an absolute I/O address in the <reg> property,
while the device tree defines the address relative to a declaration in
the parent pinctrl node.
Changing the device tree to fix a driver issue would normally be wrong,
however:
- I have run the first version of U-Boot in which this driver appears
(v2016.03) and the same problem exists, so this is not a regression;
- There is no code that references a parent device tree node that might
suggest the intent of the author was to parse the DT as it exists now;
- The equivalent Linux PIC32 GPIO driver also uses absolute addresses
for the GPIO <reg> property. This change brings the U-Boot DT more
into line with Linux.
Additionally, the data sheet (Microchip ref. 60001361H) shows that the
register set to control a GPIO bank spans 0xE0 bytes, but the device
tree specified size is only 0x48 bytes.
Signed-off-by: John Robertson <john.robertson@simiatec.com>
CONFIG_BLK needs to be enabled by default to allow U-Boot to
compile after a 'make pic32mzdask_defconfig'.
Signed-off-by: John Robertson <john.robertson@simiatec.com>
The PIC32MZ DA Starter Kit does not need the card detect workaround
because the SDCD signal line is connected properly. Disable the
workaround in this case.
Signed-off-by: John Robertson <john.robertson@simiatec.com>
The GPIO pins used by the SDHCI controller need to be configured to
allow the interface to work.
Signed-off-by: John Robertson <john.robertson@simiatec.com>
The existing driver is not compatible with the Driver Model.
This patch makes the necessary changes while also removing obsolescent
calls/properties as follows:
- fdtdec_* calls replaced with dev_read_* equivalents;
- 'clock-freq-min-max' property replaced by querying the frequency of
the source clock 'base_clk';
- The card detect erratum workaround is applied during probe rather than
overriding get_cd.
The card detect workaround (Microchip ref. DS80000736E, erratum #15) is
not always needed and can be disabled using a vendor specific DT
property.
Signed-off-by: John Robertson <john.robertson@simiatec.com>
When a message is written by a log driver (e.g. via the network stack) this
may result in the generation of further messages. We cannot allow these
additional messages to be emitted as this might result in an infinite
recursion.
Up to now only the syslog driver was safeguarded. We should safeguard all
log drivers instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the live tree API ofnode_parse_phandle_with_args, the cell_count
argument must be used when cells_name is NULL.
But this argument is not provided to the live DT function
of_parse_phandle_with_args even it is provided to
fdtdec_parse_phandle_with_args.
This patch adds support of the cells_count parameter in dev_ and
of_node API to allow migration and support of live DT:
- of_parse_phandle_with_args
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
OP-TEE reserved memory node must set property "no-map" to prevent
Linux kernel from mapping secure memory unless what non-secure world
speculative accesses of the CPU can violate the memory firmware
configuration.
Fixes: 6ccb05eae0 ("image: fdt: copy possible optee nodes to a loaded devicetree")
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Add a test to verify that the no-map property is added in reserved-memory
node when fdtdec_add_reserved_memory() no-map parameter is set to true.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add boolean input argument @no_map to helper function
fdtdec_add_reserved_memory() to add or not "no-map" property
for an added reserved memory node.
Property no-map is used by the Linux kernel to not not map memory
in its static memory mapping. It is needed for example for the|
consistency of system non-cached memory and to prevent speculative
accesses to some firewalled memory.
No functional change. A later change will update to OPTEE library to
add no-map property to OP-TEE reserved memory nodes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When an external blob is missing it can be quite confusing for the user.
Add a way to provide a help message that is shown.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Add a new entry argument to the fit entry which allows selection of the
default configuration to use. This is the 'default' property in the
'configurations' node.
Update the Makefile to pass in the value of DEVICE_TREE or
CONFIG_DEFAULT_DEVICE_TREE to provide this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Explain that binman interprets these environment variables in the
"External tools" section to run target/host specific versions of the
tools, and add a new section on how to use CROSS_COMPILE to run the
tests on non-x86 machines.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch lets tools.Run() use host-specific versions with the
for_host keyword argument, based on the host-specific environment
variables (HOSTCC, HOSTOBJCOPY, HOSTSTRIP, etc.).
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, binman always runs the compile tools like cc, objcopy, strip,
etc. using their literal name. Instead, this patch makes it use the
target-specific versions by default, derived from the tool-specific
environment variables (CC, OBJCOPY, STRIP, etc.) or from the
CROSS_COMPILE environment variable.
For example, the u-boot-elf etype directly uses 'strip'. Trying to run
the tests with 'CROSS_COMPILE=i686-linux-gnu- binman test' on an arm64
host results in the '097_elf_strip.dts' test to fail as the arm64
version of 'strip' can't understand the format of the x86 ELF file.
This also adjusts some command.Output() calls that caused test errors or
failures to use the target versions of the tools they call. After this,
patch, an arm64 host can run all tests with no errors or failures using
a correct CROSS_COMPILE value.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These test files are currently "intended for use on x86 hosts", but most
of the tests using them can still pass when cross-compiled to x86 on an
arm64 host.
This patch enables non-x86 hosts to run the tests by specifying a
cross-compiler via CROSS_COMPILE. The list of variables it sets is taken
from the top-level Makefile. It would be possible to automatically set
an x86 cross-compiler with a few blocks like:
ifneq ($(shell i386-linux-gnu-gcc --version 2> /dev/null),)
CROSS_COMPILE = i386-linux-gnu-
endif
But it wouldn't propagate to the binman process calling this Makefile,
so it's better just raise an error and expect 'binman test' to be run
with a correct CROSS_COMPILE.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch makes buildman create linked working trees instead of clones
of the source repository, but keeps updating the older clones of the
repository that might already exist. These worktrees share "everything
except working directory specific files such as HEAD, index, etc." with
the source repository. See the git-worktree(1) manual page for more
information.
If git-worktree isn't available, silently falls back to cloning the
repository.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
At present 64-bit sunxi boards use the Makefile to create a FIT, using
USE_SPL_FIT_GENERATOR. This is deprecated.
Update sunxi to use binman instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At present binman warns about missing external blobs only when the
BUILD_ROM is defined. Enable this behaviour always, since many boards
are starting to use these (e.g. ARM Trusted Firmware's BL31).
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases it is useful to generate a FIT which has a number of DTB
images, selectable by configuration. Add support for this in binman,
using a simple iterator and string substitution.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an entry for ARM Trusted Firmware's 'BL31' payload, which is the
device's main firmware. Typically this is U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have an Entry_blob_ext which implement a blob which holds an
external binary. We need to support other entry types that hold external
binaries, e.g. Entry_blob_named_by_arg. Move the support into the base
Entry class to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the Python sequential-write interface can produce an error when
it calls fdt_finish(), since this needs to add a terminating tag to the
end of the struct section.
Fix this by automatically expanding the buffer if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tidy up a few test functions which lack argument comments. Rename one that
has the same name as a different test.
Also fix up the comment for PrepareImagesAndDtbs().
Signed-off-by: Simon Glass <sjg@chromium.org>
If an entry argument is needed by an entry but the entry argument is not
present, then a strange error can occur when trying to read the file.
Fix this by allowing arguments to be required. Select this option for the
cros-ec-rw entry. If a filename is provided in the node, allow that to be
used.
Also tidy up a few related tests to make the error string easier to find,
and fully ignore unused return values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently of_match_ptr is used to avoid referencing compatible strings
when OF_CONTROL is not enabled. This behaviour could be improved by
taking into account also OF_PLATDATA, as when this configuration is
enabled the compatible strings are not used at all.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present we look for resources based on the path of the Python module
that wants them. Instead we should use Python's pkg_resources feature
which is designed for this purpose.
Update binman to use this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When reading subentries of each image, the FIT entry type directly
concatenates their contents without padding them according to their
offset, size, align, align-size, align-end, pad-before, pad-after
properties.
This patch makes sure these properties are respected by offloading this
image-data building to the section etype, where each subnode of the
"images" node is processed as a section. Alignments and offsets are
respective to the beginning of each image. For example, the following
fragment can end up having "u-boot-spl" start at 0x88 within the final
FIT binary, while "u-boot" would then end up starting at e.g. 0x20088.
fit {
description = "example";
images {
kernel-1 {
description = "U-Boot with SPL";
type = "kernel";
arch = "arm64";
os = "linux";
compression = "none";
u-boot-spl {
};
u-boot {
align = <0x10000>;
};
};
};
}
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reinstate check in testPadInSections(), squash in
"binman: Allow FIT binaries to have missing external blobs"
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Other relevant properties (pad-after, offset, size, align, align-size,
align-end) already work since Pack() sets correct ranges for subentries'
data (.offset, .size variables), but some padding here is necessary to
align the data within this range to match the pad-before property.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Switch to str.startswith for matching like the FIT etype does since the
current version doesn't ignore 'hash-1', 'hash-2', etc.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Setting CONFIG_ENV_ADDR to something other than 0 stops gd->env_addr
from being allocated dynamically. When the environment is in SPI we need
it to be allocated as we can't use a direct memory mapped address.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Fix build failure, it used to get this implicitly through common.h
until f7ae49fc4f (common: Drop log.h from common header).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Heiko Schocher <hs@denx.de>
Somewhere between v2020.04 and v2020.07 the mpc8xxx_spi driver broke,
I'm guessing due to this hunk
@@ -559,6 +560,8 @@ int dm_gpio_set_dir_flags(struct gpio_desc *desc, ulong flags)
if (ret)
return ret;
+ /* combine the requested flags (for IN/OUT) and the descriptor flags */
+ flags |= desc->flags;
ret = _dm_gpio_set_dir_flags(desc, flags);
from commit 695e5fd546 ("gpio: update dir_flags management"). But
the blame is mostly on the driver itself which seems rather confused:
The chip select gpios are requested with GPIOD_ACTIVE_LOW, but then in
each activate/deactivate, dm_gpio_set_dir_flags() is called with
merely GPIOD_IS_OUT, and then the driver call set_value(0) for
activate.
That used to work, but with the above hunk, the ACTIVE_LOW setting
from the request becomes persistent, so the gpio driver ends up being
asked to set the value to 1 in mpc8xxx_spi_cs_activate().
So drop the dm_gpio_set_dir_flags() calls in the activate/deactivate
functions, and use a value of 1 to mean "logically enabled".
Ideally, I think we should also drop the GPIOD_ACTIVE_LOW from the
request and make it up to the list of gpio cs in DT to indicate
whether that CS is enabled when driven low (as is of course usually
the case), but that requires changing
arch/powerpc/dts/gdsys/gazerbeam-base.dtsi among others, and I don't
have that hardware to test on. I have, however, tested our
own (mpc8309-based) hardware with this change, and I have also tested
that removing the GPIOD_ACTIVE_LOW from the request and updating our
DT as
- gpios = <&spisel 0 0>;
+ gpios = <&spisel 0 GPIO_ACTIVE_LOW>;
still works.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Linking a U-Boot larger than 1MB fails with PIE enabled:
u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation
truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__rel_dyn_end'
defined in .bss_start section in u-boot.
This extends the supported range by using adrp & add to load symbols
early while starting up.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Atmel PIT timer is not available for next products that
have another timer hardware block.
To be able to use the common at91 code, guard the code that uses PIT
by ifdefs.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
We already have a function to retrieve the mac address from one EEPROM.
For boards with a second Ethernet interface, however, we would
require another EEPROM with a second unique MAC address.
Introduce at91_set_eth1addr which will look for a second EEPROM
and set the 'eth1addr' variable with the obtained MAC address.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via
XTALF register. Values written at bits 2..0 in this register
correspond to the on board crystal oscillator frequency.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has
multiple master clocks feeding different subsystems. One of them
feeds image subsystem and is changeable based on image subsystem
needs.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add sckc driver compatible with common clock framework. Driver
implements slow clock support for SAM9X60 compatible IPs (in this
list it is also present SAMA7G5's slow clock IP).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Move clock code to compat.c to allow switching to CCF
without mixing CCF code with non CCF code. This prepares the
field for next commits.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add helper for clock drivers. These will be used by following
commits in the process of switching AT91 clock drivers to CCF.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add pre-requisite headers for AT91 clock architecture. These
are based on already present files on Linux and will be used
by following commits for AT91 CCF clock drivers.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
clk_get_by_indexed_prop() retrieves a clock with dev member being set
with the pointer to the udevice for the clock controller driver. But
in case of CCF each clock driver has set in dev member the reference
to its parent (the root of the clock tree is a fixed clock, every
node in clock tree is a clock registered with clk_register()). In this
case the subsequent operations like dev_get_clk_ptr() on clocks
retrieved by clk_get_by_indexed_prop() will fail. For this, get the
pointer to the proper clock registered (with clk_register()) using
clk_get_by_id() before proceeding.
Fixes: 1d7993d1d0 ("clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Clock re-parenting is not binding the clock's device to its new
parent device, it only calls the clock's ops->set_parent() API. The
changes in this commit re-parent the clock device to its new parent
so that subsequent operations like clk_get_parent() to point to the
proper parent.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In common clock framework the relation b/w parent and child clocks is
determined based on the udevice parent/child information. A clock
parent could be changed based on devices needs. In case this is happen
the functionalities for clock who's parent is changed are broken. Add
a function that reparent a device. This will be used in clk-uclass.c
to reparent a clock device.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a missing memset to acpi_create_spcr().
The other acpi_create_xxxx() functions perform a memset on their
structures, acpi_create_spcr() does not and as a result the contents of
this table are partly uninitialized (and thus random after every reset).
Fixes: b288cd9600 ("x86: acpi: Generate SPCR table")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix the tags format in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Currently, the calculation for the length of the DSDT table includes any
bytes that are added for alignment, but those bytes are not initialized.
This is because the DSDT length is calculated after a call to
acpi_inc_align(). Split this up into the following sequence:
* acpi_inc()
* Calculate DSDT length
* acpi_align()
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The term eMMC is used inconsistently within the FSP devicetree
bindings (e-mmc and emmc), especially for "emmc-host-max-speed"
documentation and code disagree.
Change all eMMC instances within the FSP bindings to consistently
use "emmc". The term "emmc" is already used a lot within U-Boot,
while "e-mmc" is only used in the FSP bindings.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This patch moves the the config SYS_MALLOC_LEN to Kconfig
as it is already done for zynq arch in commit 01aa5b8f05
("Kconfig: Move config SYS_MALLOC_LEN to Kconfig for zynq").
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pull request for UEFI sub-system for efi-2020-10-rc5 (2)
The following bugs are fixed:
* incorrect online help for setenv and env
* description of function efi_mem_carve_out()
* replace printf() by log_err() in stm32mp1_rng driver
A unit test is provided to check that the boot hart id is provided in the
RISC-V device-tree.
- SquashFS Coverity fixes
- bitflip fix in the alternate memtest command
- Disable networking on bcmstb boards where we didn't have any network
drivers enabled.
'env -e -i' syntax was changed from "," to ":". Account for this also
in the documentation.
Fixes: 2b3fbcb59f ("efi_loader: use ':' as separator for setenv -i")
Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Correct the usage description for setenv -e too.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On RISC-V check that the /chosen node has a boot-hartid property.
To run the test configure with CONFIG_CMD_BOOTEFI_SELFTEST=y and issue
setenv efi_selftest device tree
setenv serial# myserial
bootefi selftest
If the test succeeds, it reports the boot-hartid, e.g.
boot-hartid: 1
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Allow specifying the node on which a property is searched.
Test the device tree consistency more rigorously.
Some efi_st_printf() calls have been converted to efi_st_error().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Refine text for overlap_only_ram description to
match to what exactly flag does and aling description
with other functions.
Signed-off-by: Maxim Uvarov <maxim.uvarov@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The logging system provides flexible filtering and enhanced output.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
There are drivers to support built in USB controller and PHY-s now, so lets add the USB nodes to DTSI.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Lot of Qualcomm SoC-s use DWC3 controller for both USB2.0 and USB3.0
ports.
Qualcomm has some custom config registers on top of the generic ones,
but for host mode these are not needed.
So lets add the neccessary compatible string.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the reset controller.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Its common to use dt-bindings instead of hard-coding clocks or resets.
So lets use the imported Linux GCC bindings on IPQ40xx target.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch fixes the pointer arithmetic problem.
A second problem arises because u-boot "mtest" command expects the
ending address to be inclusive. When computing (end - start) this
results in missing 1 byte of the requested length. The bitflip test
expects a count rather than an "ending" address. Thus it fails to test
the last word of the requested range. Fixed by using (end - start + 1).
Added Kconfig option to optionally disable the bitflip test, since it
does add significantly to the time taken for "mtest".
Fixes: 8e434cb705 ("cmd: mem: Add bitflip
memory test to alternate mtest")
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Silence the "Driver Model for Ethernet drivers" migration warning for
the bcm7445 and bcm7260 ports, neither of which supports networking yet.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is not required for sysboot (we defined fdtfile), let's save a few
bytes in the binary image without these variables.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
mpc83xx, keymile boards: enable DM_ETH and add DTS
- mpc83xx: remove unneeded extern declaration in cpu_init
- powerpc, qe: fix codingstyle issues for drivers/qe
- powerpc, qe: add DTS support for parallel I/O ports
- net, qe: add DM support for QE UEC ethernet
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
Currently, after config the clock rate, delay 10ms, this is quite a rough
method. Check the clock stable status in the present status register is
enough.
Tested-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
This patch adds support for iMX6UL/ULL/SL/SDL MMDC into the DDR calibration
code. The difference between MX6DQ and MX6UL/ULL/SL is that the later SoCs
have 2 SDQS registers, just like MX6SX, while the MX6DQ/MX6SDL has 8.
Fixes: 4f4c128c65 ("ARM: mx6: ddr: Add support for iMX6SX")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The size of the binary created with the default U-boot config is much
greater than the default offset for environment `0x60000`.
In case if that binary is used for booting via MMC it is overlapped with
the environment stored on MMC.
This leads to U-Boot corruption while saving environment with `saveenv`
command and non-bootable SabreLite board.
The offset for environment `CONFIG_ENV_OFFSET=0x60000` was added in
commit a09fea1 but did not count in the change to `0xC0000` if option
`CONFIG_ENV_IS_IN_MMC` is used.
The offset is also used for variant with environment saving onto SPI NOR
flash (with enabled option `CONFIG_ENV_IS_IN_SPI_FLASH`). In that case the
U-Boot binary flashed on SPI NOR is also corrupted after environment
saving with the original 0x60000 offset.
Signed-off-by: Denis Pynkin <denis.pynkin@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so
update u-boot to remove decoding and support for those parts.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16
Reported-by: Coverity 3448860
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK
was wrongly set.
Reported-by: Coverity 10045172
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1
The target interface CCM root index ranges [0,124], so the number
should be 125.
Reported-by: Coverity 18045
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Provide fdtfile value in default env instead of setting
it dynamically in runtime.
Fixes: 85cb2bc686("apalis/colibri imx6: provide proper fdtfile value")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Provide fdtfile value in default env instead of setting
it dynamically in runtime.
Fixes: 85cb2bc686("apalis/colibri imx6: provide proper fdtfile value")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.
This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.
Fixes: a62c60610f("colibri_imx7_emmc: add Colibri iMX7D 1GB (eMMC) module support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.
This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.
Fixes: 304042c1f3("colibri_vf: set fdtfile for distroboot")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Enable and set preboot var with fdtfile evaluation.
preboot will be checked and run immediately before starting the
CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp.
entering interactive mode.
This provides possibility to use different boot cmds in interactive mode
without manual setting fdtfile value, as it it's already evaluated
before entering interactive mode.
Fixes: board: 31b1e17f44("toradex: add Colibri iMX6ULL support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Wrap video specific functionality with ifdefs.
Fixes: 195011b24d("colibri-imx7: fix splash logo drawing")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Drop show_boot_logo legacy function, as splashscreen functionality can
be used instead.
Fixes: d324189772("toradex: common: show boot logo")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Set proper splashscreen env value instead of calling legacy function
to show embed boot logo.
Fixes: 195011b24d("colibri-imx7: fix splash logo drawing")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Set proper splashscreen env value instead of calling legacy function
to show embed boot logo.
Fixes: 391c712dde("colibri-imx6ull: show boot logo")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
enable DTS support for keymile mpc83xx based boards.
get rid of compile warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Therefore done:
- add DTS for all mpc83xx based boards from keymile
mainly they are not mainlined to linux.
- add u-boot specific dtsi
- add stdout-path
- add missing ucc4 par_io definitions, which were
in board code, but not in linux DTS
- remove not used ethernet nodes
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Series-to: u-boot
Series-version: 3
Series-changes: 3
- rebase patchset to current mainline commit
c0192950df
- update defconfig files
Series-changes: 2
- add patch which fixes Codingstyle errors in drivers/qe
- add patch which converts the mpc83xx based boards from
keymile to DM_ETH
Cover-letter:
powerpc, mpc83xx: add DM_ETH support
This patch series adds DM ethernet support for mpc83xx based
keymile boards.
Travis build:
END
add DM/DTS support for the UEC ethernet on QUICC Engine
Block.
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com>
Series-changes: 3
- revert:
commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled")
as now qe works with DM and DM_ETH support.
- fix mailaddress from Holger
Series-changes: 2
- add comments from Qiang Zhao:
- add device node documentation
- I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c
because using drivers/net/fsl_mdio.c leads in none existent
udevice mdio@3320
instead boards with DM ETH support should use now this
driver.
- remove RFC tag
Commit-notes:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This Code should be removed if all boards are converted
to DM/DTS.
- add the DM based qe uec driver under drivers/net/qe
- Therefore copied the files uccf.c uccf.h uec.h from
drivers/qe. So there are a lot of Codingstyle problems
currently. I fix them in next version if this RFC
patch is OK or it needs some changes.
- The dm based driver code is now under drivers/net/qe/dm_qe_uec.c
Used a lot of functions from drivers/qe/uec.c
- seperated the PHY specific code into seperate file
drivers/net/qe/dm_qe_uec_phy.c
END
add DM support for parallel I/O ports on QUICC Engine Block
Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Series-changes: 2
- remove RFC
- fixed Codingstyle errors, therefore new patch
powerpc, mpc83xx: fix codingstyle issues for qe_io.c
- moved DM part to drivers/pinctrl
Commit-notes:
Open questions / discussion:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This should be removed if all boards are converted to
DM/DTS.
- Unfortunately linux DTS does not use "pinctrl-"
properties, instead "pio-handle" properties.
Even worser old U-Boot code initializes all pins
defined in "const qe_iop_conf_t qe_iop_conf_tab[]"
table in board code. As linux does the same I decided
to also scan through all subnodes containing "pio-map"
property and initialize them too.
The proper solution would be to check for "pio-handle"
when a device is probed.
END
I also followed the development of the SquashFS support in U-Boot
as part of Joao Marcos internship, so I would also appreciate receiving
new contributions and bug reports related to this topic.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
As I have followed the development of the SquashFS support in U-Boot
as part of Joao Marcos work, it makes sense to get Cc'ed on
contributions/bug reports related to the squashfs support.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Repair incorrectly negated condition in the original patch which broke
DT memory node parsing on everything which has more than one DT memory
node, e.g. R-Car3.
In case multiple valid memory nodes are present in the DT, the original
patch would complete parsing cycle for the first memory node, then move
on to the next one, identify it as a valid, and end the parsing. The fix
is to invert the condition, to make the code behave as it did before the
livetree conversion, so it would continue parsing the subsequent memory
nodes as well.
Fixes: c2f0950c33 ("lib: fdt: Convert fdtdes_setup_mem..() to livetree API")
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
phy_write() uses bus->write() instead of bus->read(). This means NULL
pointer pre-check needs to happen on bus->write instead of bus->read.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Pull request for UEFI sub-system for efi-2020-10-rc5
The following bugs are fixed:
* unaligned access in br_i32_decode()
* missing restore of global data pointer in UEFI selftest
* missing restore of global data pointer on RISC-V in UEfI subsystem
* efi_var_mem_notify_exit_boot_services() should not be __efi_runtime
Use board_early_init_f() instead of mach_cpu_init() for board, the
board_early_init_f() is used for board init and after dm_initf, while
the mach_cpu_init() is used for CPU/SOC and before dm_initf()(not able
to use syscon API).
Fixes: 9cec336708 ("rockchip: evb-rv1108: Use syscon API to get grf base")
Fixes: 4aa33690fc {"rockchip: elgin-rv1108: Use syscon API to get grf base")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
- Hyperflash boot for J7200
- Update Main R5FSS lockstep mode
- R5F remoteproc support for J7200
- Minor env fixes
- Add SPI boot support for am335x-icev2
am335x internal SRAM is too small to support the addition of
SPI bootmode to the default defconfig. Add a separate spiboot_defconfig
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add an ofdata_to_platdata() callback to access dts in U-boot and
access all platform data in it. This prepares the driver for supporting
both device tree as well as static platform data structures in SPL.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add platform data and a device structure for the spi device
present on am335x-icev2. This requires moving all omap3_spi
platform data structures and symbols to an omap3_spi.h so that
the board file can access them.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
There are devices which don't use OF_CONTROL or OF_PLATDATA but instead
rely on statically defined platdata. Block dm_scan_fdt_dev() with both
configs to avoid build failures under this condition.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If devtype variable is setted via setenv, then the following devtype=X style is
ignored. Currently, many u-boot commands use devtype variable in the latter
manner:
mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
Use devtype=mmc instead of setenv devtype mmc to avoid bugs with booting from
another devtype.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Enable the FS_LOADER and associated configs in the j7200_evm_r5_defconfig
so that the R5 SPL can support the loading of firmware files from a boot
media/file system.
Signed-off-by: Suman Anna <s-anna@ti.com>
Add a generic fs_loader node to the K3 J7200 R5 common board dts
file and use it as the chosen firmware-loader so that it can be
used for loading various firmwares from a boot media/filesystem
in R5 SPL on K3 J7200 EVM.
Signed-off-by: Suman Anna <s-anna@ti.com>
The R5 SPL on J7200 SoCs will be limited to booting just the
MCU R5FSS0 R5F core in LockStep-mode at present, so add the
two required environment variables 'addr_mcur5f0_0load' and
'name_mcur5f0_0fw' that are needed by the R5 SPL early-boot
logic. The firmware name used is also different from that on
J721E SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
The A72 U-boot can support early booting of any of the Main or MCU R5F
remote processors from U-boot prompt to achieve various system usecases
before booting the Linux kernel. Update the default BOOTCOMMAND to provide
an automatic and easier way to start various remote processors through
added environment variables.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs has two R5F sub-systems. Enable the TI K3
R5F remoteproc driver and the remoteproc command options
to allow these R5F processors to be booted from A72 U-Boot.
The Kconfigs are added using savedefconfig.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs have different number of remote processors, but reuse
the same environment settings as the J721E SoCs. The current env
variable rproc_fw_binaries is geared towards J721E SoCs and is
incorrect for J7200 SoCs. Please see the logic originally added in
commit 0b4ab9c9a7 ("env: ti: j721e-evm: Add support to boot rprocs
including R5Fs and DSPs").
Fix this by defining the DEFAULT_RPROCS macro appropriately using
the corresponding TARGET_EVM Kconfig symbol. This macro is used by
the 'rproc_fw_binaries' env variable in the common remoteproc env
header file k3_rproc.h.
The list of R5F cores to be started before loading and booting the
Linux kernel are as follows, and mainly comprises of the Main R5FSS0
cores in this order:
Main R5FSS0 (Split) Core0 : 2 /lib/firmware/j7200-main-r5f0_0-fw
Main R5FSS0 (Split) Core1 : 3 /lib/firmware/j7200-main-r5f0_1-fw
The MCU R5FSS0 is in LockStep mode and is expected to be booted by
R5 SPL, so it is not included in the list. The order of rprocs to
boot cannot be really modified as only the Main R5FSS0 cores are
involved and Core0 has to be booted first always before the
corresponding Core1.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MAIN domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in Split-mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
The J7200 SoCs have 2 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster is present within the MCU
domain (MCU_R5FSS0), and the other one is present within the MAIN
domain (MAIN_R5FSS0). Each of these can be configured at boot time
to be either run in a LockStep mode or in an Asymmetric Multi
Processing (AMP) fashion in Split-mode. These subsystems have 64 KB
each Tightly-Coupled Memory (TCM) internal memories for each core
split between two banks - ATCM and BTCM (further interleaved into
two banks). The TCMs of both Cores are combined in LockStep-mode
to provide a larger 128 KB of memory.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5F cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in LockStep mode by default, with
the ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
The A72 U-Boot code can load and boot a number of the available
R5FSS Cores on the J7200 SoC. Change the memory attributes for the
DDR regions used by the remote processors so that the cores can see
and execute the proper code.
The J7200 SoC has less number of remote processors compared to J721E,
so use less memory for the remote processors. So, a separate table
based on the current J721E table is added for J7200 SoCs, and selected
using the appropriate Kconfig CONFIG_TARGET_J7200_A72_EVM symbol.
Signed-off-by: Suman Anna <s-anna@ti.com>
The K3 J7200 SoC family has a revised R5F sub-system and contains a
subset of the R5F clusters present on J721E SoCs. The integration of
these clusters is very much similar to J721E SoCs otherwise.
The revised IP has the following two new features:
1. TCMs are auto-initialized during module power-up, and the behavior
is programmable through a MMR bit controlled by System Firmware.
2. The LockStep-mode allows the Core1 TCMs to be combined with the
Core0 TCMs effectively doubling the amount of TCMs available.
The LockStep-mode on previous SoCs could only use the Core0 TCMs.
This combined TCMs appear contiguous at the respective Core0 TCM
addresses.
Add the support to these clusters in the K3 R5F remoteproc driver
using J7200 specific compatibles and revised logic accounting for
the above IP features/differences.
Signed-off-by: Suman Anna <s-anna@ti.com>
The K3 J7200 SoCs have two dual-core Arm R5F clusters/subsystems, with
2 R5F cores each, one in each of the MCU and MAIN voltage domains.
These clusters are a revised version compared to those present on
J721E SoCs. Update the K3 R5F remoteproc bindings with the compatible
info relevant to these R5F clusters/subsystems on K3 J7200 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
The commit 316c927135 ("include: configs: j721e_evm: Add env variables
for mcu_r5fss0_core0 & main_r5fss0_core0") added four different new env
variables 'addr_mainr5f0_0load', 'name_mainr5f0_0fw', 'addr_mcur5f0_0load'
and 'name_mcur5f0_0fw' to the generic environment, but these are only
needed and used in R5 SPL for early-booting the MCU R5FSS0 and Main
R5FSS0 Core0 on J721E SoCs.
These are not really needed for A72 U-Boot, so limit the scope of
these variables only to R5 SPL. While at this, also fix the loadaddr
variable values to include the hex prefix like with other such env
variables.
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
The default rproc list currently used by A72 U-Boot to boot various
remote processors include the Main R5FSS0 (Split-mode) Core1, Main
R5FSS1 (LockStep mode) Core0 and the three DSPs. The Main R5FSS1 cluster
is configured for Split mode by default in the dts now, so add the
Main R5FSS1 Core1 (rproc #5) to the default rproc boot list. This
core is now booted after the Main R5FSS1 Core0 and before the DSPs.
The order of the rprocs to boot can always be changed at runtime if
desired by overwriting the 'rproc_fw_binaries' environment variable
at U-boot prompt. Note that the R5FSS Core1 cannot be booted before
its associated Core0.
Signed-off-by: Suman Anna <s-anna@ti.com>
Switch the MAIN R5FSS1 cluster to be configured for Split-mode as the
default so that two different applications can be run on each of the
R5F cores in performance mode. LockStep-mode would be available only
on SoCs efused with the appropriate bit, and Split-mode is the mode
that is available on all J721E SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Enable configs required to support HyperFlash boot and detection of
onboard mux switch for HyperFlash selection
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
On J7200 SoC OSPI and HypeFlash are muxed at HW level and only one of
them can be used at any time. J7200 EVM has both HyperFlash and OSPI
flash on board. There is a user switch (SW3.1) that can be toggled to
select OSPI flash vs HyperFlash.
Read the state of this switch via wkup_gpio0_6 line and fixup the DT
nodes to select OSPI vs HyperFlash
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
HBMC controller on TI K3 SoC provides MMIO access to HyperFlash similar
to legacy Parallel CFI NOR flashes. Therefore alias HyperFlash bootmode
to NOR boot to enable SPL to load next stage using NOR boot flow.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add SH4 R2Dplus machine configured to test various U-Boot PCI ethernet
options -- RTL8139, EEPRO100, AMD PCnet, DEC Tulip.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use mmc_of_parse() to set the common host properties. That includes
"bus-width", so parsing it can be removed from the driver.
But more importantly, "non-removable" is now respected, which fixes
the usage of eMMC.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Marek Behún <marek.behun@nic.cz>
Since the introduction of 'get_cd' callback in sdhci core,
dragonboard410c's MMC interface is broken. It turns out that 'get_cd'
callback checks for the host_caps for validating the chip select. And
since the msm_sdhci driver is not parsing the host_caps from DT, not
all of the cababilities are parsed properly. This results in the MMC
interfaces to be broken.
Hence, fix this by adding a call to 'mmc_of_parse' during driver probe.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Before calling do_reset() in the EFI selftest we must restore the global
data pointer.
Fixes: fa63753f86 ("efi_selftest: substitute ResetSystem() by do_reset()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On RISC-V the global data pointer is stored in register gp. When a UEFI
binary calls the EFI API we have to restore it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Function set_gd() is needed in the UEFI sub-system if the global data
pointer is stored in a register.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_var_mem_notify_exit_boot_services() is invoked when ExitBootServices()
is called by the UEFI payload.
efi_var_mem_notify_exit_boot_services() should not be defined as
__efi_runtime as it is invoking EFI_ENTRY() and EFI_EXIT() which themselves
are not __efi_runtime.
Fixes: f1f990a8c9 ("efi_loader: memory buffer for variables")
Fixes: e01aed47d6 ("efi_loader: Enable run-time variable support for tee based variables")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Fixes problem for unaligned 32bit big-endian access in
lib/rsa/rsa-keyprop.c.
Exchanges br_i32_decode() with get_unaligned_be32().
This will keep the unaligned access for architectures capable and will do
some byte-shift magic for the not so capable ones.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-by: Robert Reither <robert.reither@external.thalesgroup.com>
Remove unused include.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The environment variable test uses function validate_empty() to check that
a variable is not defined. If the hush parser is not enabled, we cannot
refer to a variable by $var_name but only by ${var_name}.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
HTML documentation is generated in doc/output/. This directory shall be
deleted by 'make mrproper'
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Nand writes should skip the bad blocks with "nand write" command.
In case of bad blocks with above 32-bit address, nand_block_isbad()
returns false due to truncated bad block address.
In below code segment,
if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1)))
offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is
happening. Cast 'mtd->erasesize' with loff_t to fix this issue.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds a sanity check that avoids 'size' to overflow and crash when
importing an environment that contains a checksum. Example with the wrong size
that causes the crash:
=> env import -c 0x4100000 3 v1
This assumes that v1 has already been successfully exported with
'env export -c -s 0x100 0x4100000 v1'
Signed-off-by: Pedro Aguilar <pedro.aguilar@vimar.com>
In bootm_load_os() the OS image is decompressed. In later stages of the
boot process we need the decompressed size of the image.
Update images->os.image_len after decompression.
Passing the correct size is necessary if we want to check loaded EFI
binararies for file truncation by comparing the loaded size to the header
field SizeOfImage.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kconfig provides several config options for setting up default variables
but these are unused when variables are passed to U-Boot via file.
That's why cover this dependency in Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Include ast2500-evb.dtb for CONFIG_ASPEED_AST2500 instead of
for all aspeed targets.
ast2400 is based on ARM926EJ-S processor (ARMv5-architecture).
ast2500 is based on ARM1176JZS processor (ARMv6-architecture).
ast2600 is based on Cortex A7 processor (ARMv7-A architecture).
Each of the above SOC is using a different ARM CPU(s) with different ARM
architecture revision. It is not possible to support all 3 of these
families in a single binary. So there is no need to build ast2500-evb.dtb
for other SOC families.
Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.
Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Enable options SYS_WHITE_ON_BLACK to permit HDMI background
screen from white to back, also enable USB_KEYBOARD.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Import Qualcomm IPQ4019 GCC bindings from Linux.
This will enable using bindings instead of raw clock numbers both in the driver and DTS like Linux does.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
v2: modify title description aspeed:clock -> clock:aspeed
Use kernel include/dt-bindings/clock/aspeed-clock.h define
for clock driver.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Chimp is a core in Broadcom netxtream controller (bnxt).
Add support to check bnxt's chimp component status.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add command to update the environmental variables which
are used to read the data from QSPI offsets and load
the binaries to bnxt.
Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
PLL4Q is supplying both FDCAN and LTDC. In case HDMI is in use, the
50 MHz generated from PLL4Q cannot be divided well enough to produce
accurate clock for HDMI pixel clock. Adjust it to generate 74.25 MHz
instead. The PLL4P/PLL4R are generating 99 MHz instead of 100 MHz,
which is in tolerance for the SDMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Gerald Baeza <gerald.baeza@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
There is no dedicated pull resistor on the AV96 UART4 (console UART)
pin. In case there is no UART adapter installed on the AV96, the line
is floating and can trigger reception of garbage characters, which in
turn can abort U-Boot autoboot. Add default pull up to mitigate this
problem.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Remove the unnecessary inversion on the eth_env_set_enetaddr() result which
only make complex the code of setup_mac_address() and display an invalid
value in the associated pr_err.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB. This patch
adds USB keyboard support for 32 bit RPi4 config.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The commit 57805f2270 ("net: bcmgenet: Don't set ID_MODE_DIS when
not using RGMII") needed to be extended for the case of using the
rgmii-rxid. The latest version of the Rasbperry Pi4 dtb files for the
5.4 now specify the rgmii-rxid.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
This commit fixes a serious issue occurring when several network
commands are run on a raspberry pi 4 board: for instance a "dhcp"
command and then one or several "tftp" commands. In this case,
packet recv callbacks were called several times on the same packets,
and send function was failing most of the time.
note: if the boot procedure is made of a single network
command, the issue is not visible.
The issue is related to management of the packet ring buffers
(producer / consumer) and DMA.
Each time a packet is received, the ethernet device stores it
in the buffer and increments an index called RDMA_PROD_INDEX.
Each time the driver outputs a received packet, it increments
another index called RDMA_CONS_INDEX.
Between each pair of network commands, as part of the driver
'start' function, previous code tried to reset both RDMA_CONS_INDEX
and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
driver side, thus its value was actually not updated, and only
RDMA_CONS_INDEX was reset to 0. This was resulting in a major
synchronization issue between the driver and the device. Most
visible behavior was that the driver seemed to receive again the
packets from the previous commands (e.g. DHCP response packets
"received" again when performing the first TFTP command).
This fix consists in setting RDMA_CONS_INDEX to the same
value as RDMA_PROD_INDEX, when resetting the driver.
The same kind of fix was needed on the TX side, and a few variables
had to be reset accordingly (c_index, tx_index, rx_index).
The rx_index and tx_index have only 256 entries so the bottom 8 bits
must be masked off.
Originated-by: Etienne Dublé <etienne.duble@imag.fr>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
As the error message is now displayed by generic phy functions,
the dev_err/pr_err can be change to dev_dbg/pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the dev_err can be change to dev_dbg.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_idebug.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Since the current code base is mostly from btrfs-progs, anyone
contributing to U-Boot btrfs code could also help us to improve
btrfs-progs and btrfs kernel module.
Also add myself as designated reviewer.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This cleans up the now unneeded code from the old btrfs implementation.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch introduces a new function, list_one_subvol(), which will
resolve the path to FS_TREE of one subvolume.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch introduces a new function, get_path_in_subvolume(), which
resolves inode number into path inside a subvolume.
This function will be later used for btrfs subvolume list functionality.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This version of btrfs_file_read() has the following new features:
- Tries all mirrors
- More handling on unaligned size
- Better compressed extent handling
The old implementation doesn't handle compressed extent with offset
properly: we need to read out the whole compressed extent, then
decompress the whole extent, and only then copy the requested part.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This implements lookup_data_extent() function for the incoming
new implementation of btrfs_file_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
These two functions are used to do sector aligned read, which will be
later used to implement btrfs_file_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Rename btrfs_file_read() and its callees to avoid name conflicts with
the incoming new code.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
After this the only remaining function that still utilizes
__btrfs_lookup_path() is btrfs_read().
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Use extent buffer based infrastructure to re-implement btrfs_readdir().
Along this rework, some small corner cases fixed:
- Subvolume tree mtime
Mtime of a subvolume tree is recorded in its root item, since there is
no INODE_ITEM for it.
This needs extra search from tree root.
- Output the unknown type
If the DIR_ITEM is corrupted, at least don't try to access the memory
out of boundary.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This is the extent buffer based path lookup routine.
To implement this, btrfs_lookup_dir_item() is crossported from
btrfs-progs, and implements btrfs_lookup_path() from scratch.
Unlike the existing __btrfs_lookup_path(), since btrfs_read_fs_root()
will check whether a root is a orphan at read time, there is no need to
check root backref, this makes the code a little easier to read.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
All existing next_length() caller handles return value > BTRFS_NAME_LEN,
so there is no need to do BTRFS_NAME_LEN check in next_length().
But still, we want to exit early if we're beyond BTRFS_NAME_LEN, so this
patch makes next_length() exit as soon as we're beyond BTRFS_NAME_LEN.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
The existing __btrfs_readlink() can be easily re-implemented using the
extent buffer based btrfs_readlink().
This is the first step to re-implement U-Boot's btrfs code.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Since the old code is using __btrfs_path/__btrfs_root which is different
from the regular extent buffer based one, we add "__" prefix for the old
implementation to avoid name conflicts for the incoming crossport.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
open_ctree_fs_info() is the main entry point to open btrfs.
This version is a simplfied version of __open_ctree_fd() of btrfs-progs,
the main differences are:
- Parameters on how to specify a block device
Instead of @fd and @path, U-Boot uses blk_desc and disk_partition_t.
- Remove open_ctree flags
There won't be multiple open ctree modes in U-Boot.
Otherwise functions structures are all kept the same.
With open_ctree_fs_info() implemented, also introduce the global
current_fs_info pointer to show the current opened btrfs.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
These two functions play a big role in btrfs bootstrap.
The following function is removed:
- Seed device support
Although in theory we can still support multiple devices, we don't have
a facility in U-Boot to do device scan without opening them.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch copies the core function, btrfs_search_slot(), from
btrfs-progs.
This version has the following functionality removed:
- The ability to COW tree block
Related code is commented out, and can be enabled in the future.
- The readahead functionality
This is abused in kernel. Remove it completely.
With the core function in place, btrfs developers should feel at home now.
This also crossports supporting code like btrfs_previous_item() to
ctree.[ch].
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Crossport struct btrfs_root to ctree.h from btrfs-progs, with write
related members deleted.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This is to avoid naming conflicts between extent buffer based
btrfs_root.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
To avoid name conflicting between the extent buffer based btrfs_path
from btrfs-progs, rename struct btrfs_path to struct __btrfs_path.
Also rename btrfs_free_path() to __btrfs_free_path() to avoid conflicts.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This is the one of the basic stone function for btrfs, which:
- Resolves the chunk mappings
- Reads data from disk
- Does various sanity check
With read_tree_block(), we can finally crossport needed btrfs btree
operations to U-Boot.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch crossports volumes.[ch] from btrfs-progs, including:
- btrfs_map_block()
The core mechanism to map btrfs logical address to physical address.
This version includes multi-device support, along with RAID56 support.
- btrfs_scan_one_device()
This is the function to register one btrfs device to the list.
This is the main part of the multi-device btrfs assembling process.
Although we're not going to support multiple devices until U-Boot
allows us to scan one device without actually opening it.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
[trini: Use %zu in a debug print to avoid warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
This brings all structure accessors from btrfs-progs/ctree.h, as in
kernel's ctree.h.
All these accessors handle the endian convert at runtime, and since all
of them are defined as static inline functions, those which aren't used
won't take space in resulting binary.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This brings the extent_io_tree infrastructure, with which we can finally
bring in proper btrfs_fs_info structure to ctree.h.
With read/write_extent_buffer() implemented we also backport
read/write_eb_member() to ctree.h.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch implements an infrastructure to insert/search/merge an extent
range (with variable length).
This provides the basis for later extent buffer cache used in btrfs.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This patch uses generic code from btrfs-progs to read one super block
from block device.
To support the btrfs-progs coding style, the following is also
crossported:
- BTRFS_SETGET_FUNC for btrfs_super_block
- btrfs_check_super() function
- Move btrfs_read_superblock() to disk-io.[ch]
Since super.c only contains pretty small amount of code, and
the extra check will be covered in later root read patches.
Differences between this implementation and btrfs-progs:
- No sbflags/sb_bytenr support
Since we only need to read the primary super block (like kernel),
sbflags/sb_bytenr used by super block recovery is not needed.
This also changes the following behavior of U-Boot btrfs:
- Only reads the primary super block
The old implementation reads all 3 super blocks, and also one
non-existing backup.
This is not correct, especially if there is another filesystem created
on the device but old superblocks are not rewritten.
Just like kernel, we only check the primary super block.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
[trini: Change error to be a define in compat.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
This mostly crossports crypto/hash.[ch] from btrfs-progs.
The differences are:
- No blake2 support
No blake2 related library in U-Boot yet.
- Use uboot xxhash/sha256 directly
No need to implement the code as U-Boot has already provided the
interface.
This adds the support for the following csums:
- SHA256
- XXHASH
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
This version includes all needed on-disk format from kernel.
Only need to modify the include headers for U-Boot, everything else is
untouched.
Also, since U-Boot btrfs is using a different endian convert timing (at
tree block read time), it needs some forced type conversion before
proper crossport.
Signed-off-by: Qu Wenruo <wqu@suse.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Pull request for UEFI sub-system for efi-2020-10-rc4
Bug fixes are provided in the following areas:
* convert file system debug and print messages go log messages
* convert UEFI booting messages to log messages
* UEFI related code clean up and simplification
* Eliminate superfluous enum value EFI_TABLE_END.
* Use correct variable type for the memory type.
* Check validity of memory type.
* Make efi_build_mem_table static.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently if the bootefi command fails due to missing authentication, the
user gets no feedback.
Write a log message 'Image not authenticated' if LoadImage() fails due to
missing authentication.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Write log messages when booting via the bootefi command to allow tracking
on the syslog server. Example messages are
Booting /snp.efi
or
Booting /MemoryMapped(0x0,0x4fe00000,0x35a40)
Loading image failed
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use log functions for error and debug messages of the file-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Instead of querying SDM for FPGA configuration status through mailbox
messages, U-Boot now checks System Manager's FPGA Config status register
for FPGA configuration status before resetting bridge.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
It was revealed that when the fastboot_tx_write_str function is called
without the previously initialized fastboot_func->in_req->complete field,
a copy of in_req will be sent to the I/O requests queue without
an initialized field.
Moving a piece of code with the initializing of the
fastboot_func->in_req->complete field above transmit_tx allows to solve
this problem.
Fixes: 65c96757fe "usb: fastboot: Convert USB f_fastboot to shared fastboot"
Signed-off-by: yurii.pidhornyi <yurii.pidhornyi@globallogic.com>
Since the USB HID limits the maximum bandwidth(3072) for interrupt
endpoint transfers, when the bInterval set to 1, we can only support 3
boards to run sdp at the same time. In order to support more boards,
change the bInterval of interrupt endpoint to 3, which will not affect
the transmission speed.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
EP0 has been used to transfer file data in sdp before, but the max
packetsize of ep0 is 64 bytes. So in order to improve the file transfer
speed, here add the EP1_OUT interrupt endpoint which max packetsize is
set to 1024 byte.
After testing, it turns out that using ep1out is twice as fast as using
ep0 while receiving data in sdp.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add g_dnl_get_board_bcd_device_number, the new BCD value is used by uuu to distinguish
if the SPL supports the SDPV.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Add support to f_sdp to search and load iMX8 container image or iMX8M
FIT image by new UUU command SDPV.
When using the SDPV, the uuu will continue to send out data after first
level boot loader used by ROM. This means uuu won't skip to the offset
of the second boot loader, and the padding data before second boot loader
will be sent out. So we have to search the FIT header or container header
in the buffer that SDP received.
Also change to more common method to exit f_sdp handler not depending on
SPL_FIT_FOUND flag because container loader won't set this.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Because the buffer length of sdp usb request is 65, we have to allocate
65 bytes not 64 bytes. Otherwise there is potential buffer overflow.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Add HS endpoint descriptor for SDP. So that we can use high speed endpoint,
and the SDP device can send packet with 512 byte size.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
MAX3420 implements FullSpeed USB Device over SPI.
Another version MAX3421, also implements USB Host mode.
This driver should be good for the device mode of max3421 as well.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Default implementation of fastboot_set_reboot_flag function that depends
on "bcb" commands could be used in general case if there are no need to
make any platform-specific implementation, otherwise it could be
disabled via Kconfig option FASTBOOT_USE_BCB_SET_REBOOT_FLAG.
Please note that FASTBOOT_USE_BCB_SET_REBOOT_FLAG is mutually exclusive
with some platforms which already have their own implementation of this
function.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Android 10 adds support for dynamic partitions and in order to support
this userspace fastboot must be used[1]. New tool fastbootd is
included into recovery.
Userspace fastboot works from recovery and is launched if:
1) - Dynamic partitioning is enabled
2) - Boot control block has 'boot-fastboot' value into command field
The bootloader is expected to load and boot into the recovery image
upon seeing boot-fastboot in the BCB command. Recovery then parses the
BCB message and switches to fastbootd mode[2].
Please note that boot script is expected to handle 'boot-fastboot'
command in BCB and load into recovery mode.
Bootloader must support 'reboot fastboot' command which should reboot
device into userspace fastboot to accomodate those changes[3].
Another command that bootloader must support[3] is 'reboot recovery'. This
command should simply reboot device into recovery mode.
[1] - https://source.android.com/devices/bootloader/fastbootd
[2] - https://source.android.com/devices/bootloader/fastbootd#unified_fastboot_and_recovery
[3] - https://source.android.com/devices/bootloader/fastbootd#modifications_to_the_bootloader
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Change-Id: I9d2bdc9a6f6f31ea98572fe155e1cc8341e9af76
Extend fastboot_set_reboot_flag arguments with reboot reason so that
it could handle different reboot cases in future.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
The environment variable loadaddr is in the virtual address space of the
sandbox. To get the actual memory address where the FIT image has been
loaded we have to convert this address according to the memory mapping of
the sandbox.
Equally the addresses in the *.its file have to be converted when used in
the dfu_ram driver.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
For testing automated updates via dfu and mtd we need the dfu and mtd
commands as well as preboot support.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
%s/parameteres/parameters/g
Even if a line exceeds 80 characters we should not split output strings
to make debugging easier.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add support for defining raw fastboot partitions in eMMC by specifying
the offset and size in an environment variable. Optionally, the eMMC
hardware partition number may also be specified.
This makes it possible to e.g. update only part of the eMMC boot
partition, instead of having to write the entire partition.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
When unregister gadget driver in ci_udc, the usb device is not
removed or stop. This causes next "usb start" fails to work.
Add a new interface "usb_remove_ehci_gadget" in usb-uclass to
remove the usb device for DM driver. Using "usb_lowlevel_stop" for
non-DM driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The usb mass storage (f_mass_storage.c) uses fixed usb index 0,
this causes problem while CDNS3 USB controller index is 1.
Modify the API of fsg to pass the controller index.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The original rtl_clear_bp() is used to clear the firmware of both
PLA and USB MCU. The new one could clear the firmware of PLA or
USB independently. It is unnecessary to clear firmware, if there
is no one to be updated.
Besides, clear the firmware by writing the relative registers in
bulk.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Reset bmu after disabling Tx/Rx. This is used to clear the FIFO of
Tx/Rx. The remained data may be transferred after Tx/Rx is re-enabled.
And it results in garbage data.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
If the SCIF is receiving data quickly enough, it may happen that the
SCxSR_RDxF flag is cleared in sh_serial_getc_generic(), while the
FIFO still contains data. If that happens, the serial_getc_check()
reports no data in the FIFO as the flag is no longer set. Add one
more check, if the SCxSR_RDxF is not set, read out the FIFO level
and if there are still characters in the FIFO, permit reading them
out.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply replace the rule in it. We use stub C-file
like it's done for other boards.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The command 'mtrr' does not recognize the 'list' subcommand any more
since the code restructuring in commit b2a76b3fe7 ("x86: mtrr:
Restructure so command execution is in one place").
The if-else parsing the command arguments does not take 'list' into
account: the if-branch is intended for no subcommands, the else-branch
is intended for the non-list subcommands (which all expect additional
arguments). Calling the 'mtrr list' subcommand leads to a "return
CMD_RET_USAGE" in the else-branch.
Fix this by changing the else-branch to explicitly checking for
if (cmd != 'l').
Fixes: b2a76b3fe7 ("x86: mtrr: Restructure so command execution is in one place")
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
- MVEBU Espressobin fixes and enhancements (fix switch security
issue, enable MVNETA, enable SD-card, fix COMPHY nodes, default
env variables, etc)
- MMC Xenon: Set signal voltage and max base clock
- a37xx PCI driver: Depend on DM_GPIO and remove #ifdef's
Include information about permanent ethernet MAC address and add link how
to build ATF as U-Boot on Espressobin cannot be flashed without ATF.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Boot scripts for existing Espressobin Linux distributions, like OpenWRT,
expect that U-Boot set fdt_addr and kernel_addr envs. So add env aliases
from fdt_addr_r and kernel_addr_r values.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
Current loadaddr is not writable on Espressobin and 'loadb' command cause
rebooting board. Marvell's U-Boot already set default loadaddr to value
0x06000000 [1] and after this change 'loadb' is working fine.
[1] - 0a5b159806
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
According to Marvell's U-Boot description [1] current env load addresses
overlaps with ATF RT services region and TEE. Because the ATF RT service
and TEE region is going to be marked as secure and can't be overwritten,
use different different addresses for envs.
[1] - 0a5b159806
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
For proper initialization of aardvark pci driver it is required to
de-assert reset GPIO. So depeneds on DM_GPIO option.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
Due to different partition layouts in different U-Boot versions, DTS for
Espressobin in Linux does not contain any definition of MTD partitions.
See commit https://git.kernel.org/stable/c/00954566464a4 for more details.
This patch via ft_board_setup() hook fills current partition layout used by
U-Boot, so booted kernel would see correct MTD partitions layout.
U-Boot env partition is calculated from CONFIG_ENV_OFFSET option.
First partition contains secure firmware, ARM trusted firmware and U-Boot
with checksums. So it is not possible to replace just one image (e.g.
U-Boot) without updating other parts where is stored checksum of U-Boot.
Therefore there is no extra partition defined for U-Boot and first
partition is called just 'firmware'.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
Espressobin board comes with Marvell's U-Boot version where U-Boot env is
stored in SPI at offset 0x3F0000. This patch changes env offset in
Espressobin defconfig file to match Marvell's U-Boot version.
Users who want to use previous or different env offset can still change it
in .config file when compiling U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
- The SDIO signal voltage and max base clock frequency
setting are missing in driver, which causes SDIO
not working.
- The patch adds SDIO signal voltage switch support,
which is based on regulator-gpio of vqmmc-supply, and
sets the max base clock frequency.
- Fix the zero clock value in call to sdhci_setup_cfg()
function.
Change-Id: I79c8860c65b8db166f4f70db56ede4097f71f1fa
Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53589
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: Hua Jing <jinghua@marvell.com>
[pali: Amended fixup patch]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
This change ensures that PCIe card is put into reset state when U-Boot
stops using it.
DM_FLAG_OS_PREPARE ensures that U-Boot executes driver's remove callback
prior booting Linux kernel.
Linux kernel pci-aardvark driver needs to reset PCIe card via PERST# signal
prior initializing it. If it does not issue reset then some PCIe cards
(specially Compex WiFi cards) are not detected at all.
Putting PCIe card into reset state prior booting Linux kernel would ensure
that card would be properly reset at time when Linux kernel starts
initializing pci-aardvark driver.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
Change active-high to active-low and change DT property name from
reset-gpio to reset-gpios. This format of gpio reset is used by
pci-aardvark driver in Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
This commit fixes initialization of COMPHY on EspressoBin.
Commit 22f418935b ("phy: marvell: a3700: Use comphy_mux on Armada
37xx.") introduced usage of comphy_mux on Armada 37xx comphy driver.
The lanes are defined in comphy_a3700.c as described in functional
specification, that is:
lane 0 is SGMII1 or USB3
lane 1 is PCIe or SGMII0
lane 2 is SATA or USB3
But the DTS for EspressoBin configures PCIe on lane 0 and USB3 on
lane 1, which is wrong in the sense of the specification and doesn't
work with the comphy_mux code, which is 2 years now (the aardvark driver
causes synchronous abort in U-Boot).
It worked till the above mentioned commit, because the code for powering
up PCIe PHY doesn't work with lane number at all, and the code for
powering up USB3 PHY works differently only if USB3 is on lane 2, ie.
the check goes like:
if (lane == 2)
something
else
something else
so it does not differentiate between lanes 0 and 1.
In the future I shall post patches that remove the comphy_a3700 driver
and add comphy driver which uses calls to ATF, like Linux' driver does.
This will have the advantage of same DTS bindings as Linux', but till
this is done, we need this patch.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Pali Rohár <pali@kernel.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
By default Topaz switch on Espressobin board forwards packets between all
ethernet ports, including CPU (port 0), wan (port 1) and lan (ports 2,3).
This default U-Boot setup is unsuitable for using Espressobin as router as
it opens security hole in forwarding all packets between wan and lan ports.
E.g. dhcp packets from wan network leaks to lan network during small time
window until U-Boot boots Linux kernel which loads network drivers which
disallows forwarding between wan and lan.
This patch fixes above problem. For Espressobin board prior putting Topaz
switch into forwarding mode, Topaz switch is reconfigured to allow
forwarding packets from wan and lan ports only to CPU port. This ensures
that packets from wan port are not forwarded to lan ports and vice-versa.
Packets from CPU port are still forwarded to all other ports, so U-Boot
network boot works with any ethernet port as before.
This problem was already discussed on Espressobin forum [1] and on
Marvell's github issue tracker [2]. As a workaround people on Espressobin
forum patched U-Boot to completely disable lan ports on Topaz switch which
prevented forwarding packets. That workaround had an issue that U-Boot was
unable to netboot via lan ports anymore. Change in this patch does not have
such issue.
This security issue has been dicussed here as well: [3].
[1] - https://web.archive.org/web/20191231164238/http://espressobin.net/forums/topic/boot-behavior-of-the-switch-and-security/
[2] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/issues/18
[3] - https://forum.armbian.com/topic/12635-espressobin-uboot-security-concerns-switch-init-portmask/
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
There shouldn't be a need to call additional i2c read if above failed
already. Based on comment it should be enough to try to detect legacy
boards which are mentioned in the comment.
Fixes: 2463f6728e ("ti: common: board_detect: Allow DM I2C without CONFIG_DM_I2C_COMPAT")
Fixes: 0bea813d00 ("ARM: omap-common: Add standard access for board description EEPROM")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Update the ringacc and udma dt nodes to use the latest RM resource types
similar to the ones used in k3-j721e dt nodes.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
With ABI 3.0, sysfw deprecated special resource types used for AM65x
SoC. Instead started using device id as resource type similar to the
convention used in J721E SOC.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
- Fix for gd->ram_top and bootm_size calculations
- Assorted Kconfig entry cleanups / fixes.
- Make checkpatch.pl error on fdt_high/initrd_high=0xffffffff
- Resync scripts/setlocalversion
- Other minor bugfixes
The linux changes since v3.16 are
78283edf2c01 kbuild: setlocalversion: print error to STDERR
b24413180f56 License cleanup: add SPDX GPL-2.0 license identifier to files with no license
6147b1cf1965 scripts/setlocalversion: git: Make -dirty check more robust
8ef14c2c41d9 Revert "scripts/setlocalversion: git: Make -dirty check more robust"
ff64dd485730 scripts/setlocalversion: Improve -dirty check with git-status --no-optional-locks
7a82e3fa28f1 scripts/setlocalversion: clear local variable to make it work for sh
991b78fbd223 scripts: setlocalversion: fix a bashism
3c96bdd0ebfa scripts: setlocalversion: replace backquote to dollar parenthesis
and it's ff64dd485730 that is the motivation for this sync. It fixes
false positive "-dirty" added to the version string when building with
Yocto
(https://lists.openembedded.org/g/openembedded-core/message/137702).
There has been one U-Boot specific patch since this was synced with
linux 3.16: 81630a3b38 (scripts: setlocalversion: safely extract
variables from auto.conf using awk). Keep these changes applied.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
[trini: Re-add 81630a3b38 and reword message]
Signed-off-by: Tom Rini <trini@konsulko.com>
When board_get_usable_ram_top() limits gd->ram_top, env_get_bootm_size()
must not exceed that limit. Otherwise, boot_relocate_fdt() might put fdt
out of the allowed RAM range.
The similar commit 8ce1f10cf2 ("ARM: bootm: take into account
gd->ram_top") exposed this bug.
This fixes boot on Armada 8040 based Clearfog GT-8K where ram_top is set
to 0x80000000 (2GB), but bi_dram[0].size might be up to 0xc0000000
(3GB). Note the relocated fdt address (0xbfff4000) in the console output
listed below:
Found /extlinux/extlinux.conf
Retrieving file: /extlinux/extlinux.conf
62 bytes read in 21 ms (2 KiB/s)
1: linux
Retrieving file: /extlinux/Image
13740544 bytes read in 1266 ms (10.4 MiB/s)
Retrieving file: /extlinux/armada-8040-clearfog-gt-8k.dtb
33368 bytes read in 31 ms (1 MiB/s)
Booting using the fdt blob at 0x4f00000
Loading Device Tree to 00000000bfff4000, end 00000000bffff257 ... "Synchronous Abort" handler, esr 0x96000045
elr: 000000000006e1cc lr : 0000000000068fd8 (reloc)
elr: 000000007ffa91cc lr : 000000007ffa3fd8
x0 : ffffffffffffffff x1 : 00000000bfffc258
x2 : 0000000000000000 x3 : ffffffffffff7da7
x4 : 0000000004f08258 x5 : 00000000bfff4000
x6 : 00000000bfff4000 x7 : 000000000000000f
x8 : 000000007fb23bf8 x9 : 0000000000000008
x10: 00000000bffff257 x11: 00000000bffff257
x12: 0000000000000000 x13: fffffffffffff000
x14: 00000000bfff4000 x15: 0000000000000021
x16: 000000007ff7bc38 x17: 0000000000000000
x18: 000000007fb2add0 x19: 00000000bfff4000
x20: 0000000004f00000 x21: 000000000000b258
x22: 0000000058820000 x23: 0000000000000010
x24: 000000007ffe3c40 x25: 000000007fb23cb8
x26: 00000000c0000000 x27: 0000000000000000
x28: 000000007fc3fd50 x29: 000000007fb23bd0
Code: 54000061 aa0603e0 d65f03c0 38606882 (38206822)
Resetting CPU ...
Thanks to Patrice CHOTARD who directed me to the right way.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
The commit e519f03a18 ("cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH
mapping") removed CONFIG_SYS_MEMTEST_SCRATCH but commit 0914011310
("command: Remove the cmd_tbl_t typedef") has added it back. That's why
symbol is still in the tree that's why remove it again.
Fixes: 0914011310 ("command: Remove the cmd_tbl_t typedef
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After allocating to pointer ctx we should check that pointer and not
another pointer already checked above.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Entirely disabling relocation of the device tree or initrd is almost
never the right answer. Doing this by default leads to hard to diagnose
run-time failures.
Signed-off-by: Tom Rini <trini@konsulko.com>
ENV_IS_IN_EXT4 also need to enable FS_EXT4 which is not covered in Kconfig.
Kconfig reports this as:
WARNING: unmet direct dependencies detected for EXT4_WRITE
Depends on [n]: FS_EXT4 [=n]
Selected by [y]:
- ENV_IS_IN_EXT4 [=y] && !CHAIN_OF_TRUST [=n]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
ARC is selecting TIMER which depends on DM but DM is not selected and
doesn't need to be enabled. Fix it by selecting DM for ARC architecture.
Kconfig is showing this missing dependency by:
WARNING: unmet direct dependencies detected for TIMER
Depends on [n]: DM [=n]
Selected by [y]:
- ARC [=y] && <choice>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CMD_ADC selected DM_REGULATOR unconditionally without enabling DM.
That's why change select to depends on to cover it.
Kconfig is showing this issue as:
WARNING: unmet direct dependencies detected for REGMAP
Depends on [n]: DM [=n]
Selected by [y]:
- DM_REGULATOR_PBIAS [=y] && DM_REGULATOR [=y]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Update CMD_ADC=y configs to enable DM_REGULATOR now]
Signed-off-by: Tom Rini <trini@konsulko.com>
There is missing dependency for PCIE_ROCKCHIP which selects
PHY_ROCKCHIP_PCIE which directly depends on ARCH_ROCKCHIP.
WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_PCIE
Depends on [n]: ARCH_ROCKCHIP [=n]
Selected by [y]:
- PCIE_ROCKCHIP [=y] && PCI [=y]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The indentation was messing up with the scripts/build-whitelist.sh that
was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the
other indented options) erroneously as ad-hoc configure option with the
following error:
```
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
```
bi_memstart & bi_memsize are now not referenced any more. This patch
removes their definitions from the bd_info struct.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove printing of the superseeded (by bi_dram[]) memory values from the
bdinfo command.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Most likely these deprecated (removed) variables are not needed. Lets
remove the assignments completely from all spl.c files.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Oleksandr Zhadan and Michael Durrant
Reviewed-by: Simon Glass <sjg@chromium.org>
All platforms support bi_dram[] since quite some time. Lets remove the
and bi_memsize values completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
When this no-op dram_init_banksize() is removed, the weak default will
be used instead, which correctly sets the bi_dram[] banksize values.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
arch_setup_bdinfo() only configures the deprecated bi_memstart &
bi_memsize values, which should not be needed any more. Lets remove
this file completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
With the planned removal of bi_memstart & bi_memsize, this patch now
moves the references to the better suiting gd->ram_base/ram_size
variables.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove the bi_memstart / bi_memsize assignment in setup_bdinfo() and
make sure, that bd_dram[] is always configured in the weak default
implementation of dram_init_banksize(), when CONFIG_SYS_SDRAM_BASE is
not set.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Use only gd->ram_base/_size in env_get_bootm_size() instead of bi_dram[]
in some cases and bi_memstart in others.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit 86cf1c8285 ("configs: Migrate CONFIG_NR_DRAM_BANKS") &
commit 999a772d9f ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"),
CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default).
It makes no sense to still carry code that is guarded with
"#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes
all these unreferenced code paths.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
- Sipeed Maix support S-mode.
- Provide command sbi.
- Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
- Fix a compiler error with CONFIG_SPL_SMP=n.
- Fix sifive ram driver 32 compiler warnings.
- Fix kendryte/pll.h redefine nop() warning.
With the upcoming increase of the malloc area in U-Boot
("pci: pci-uclass: Dynamically allocate the PCI regions"), the CI QEMU
x86 test fails:
U-Boot 2020.10-rc2-g0a668f6d38 (Aug 25 2020 - 06:12:51 +0000)
alloc space exhausted
Error binding driver 'cpu_qemu': -12
Some drivers failed to bind
alloc space exhausted
initcall sequence fff6a760 failed at call fff13b3d (err=-19)
This patch now increases CONFIG_SYS_MALLOC_F_LEN to 0x1000, which is
already used on qemu-x86_64_defconfig.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
The loading address is too close to the kernel address, so newer kernels
may overlap memory space, so loading the device tree may corrupt zImage.
This patch moves the fdt_addr_r to 0x14000000 which is also consistent
with guidance that the kernel be allocated 32MB. This places it
in the same place as the ramdisk, so this patch moves the ramdisk address
512KB after the fdt.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:
"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."
i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
This patch adds support for all OcteonTX2 96xx/95xx
boards from Marvell.
For 96xx boards, use octeontx_96xx_defconfig and
for 95xx boards, use octeontx_95xx_defconfig.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
This patch adds support for all OcteonTX 81xx/83xx
boards from Marvell.
For 81xx boards, use octeontx_81xx_defconfig and
for 83xx boards, use octeontx_83xx_defconfig.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2
platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds support for PCI ECAM/PEM controllers found on OcteonTX
or OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
If ARI capability is found on device, use it to update next function
number in bus scan and also helps to skip unnecessary bdf scans.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Makes dm_pci_map_bar API available to map BAR for Virtual function
PCI devices which support Enhanced Allocation.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
SR-IOV - Single Root I/O Virtualization
PF - Physical Function VF - Virtual Function
If SR-IOV capability is present, use it to initialize Virtual Function
PCI device instances. pci_sriov_init function will read SR-IOV
registers to create VF devices under the PF PCI device and also bind
driver if available. This function needs to be invoked from Physical
function device driver which expects VF device support, creating
minimal impact on existing framework.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
If Enhanced Allocation capability is present in bridges, use it
to read the fixed sub-ordinate bus number.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Fix for the case of a U-Boot configuration with CONFIG_SPL,
CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no
CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because
dm_write_i2c does not exist because CONFIG_SPL_DM is not defined.
Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com>
Cc: Heiko Schocher <hs@denx.de>
This patch fixes a few issues noticed, when testing this new driver on
ARM Octeon TX2 again. Here the details:
- Remove "common.h" header inclusion
- Use correct THP define on Octeon TX2
- Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish
both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi"
compatible and add a check to the Octeon TX2 specific
"cavium,thunderx-i2c" so that the correct driver data is selected.
- Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE()
as its not needed for the PCI based probing on Octeon TX2
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Parse subnode DT properties only if parent node is valid.
Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode
from dev_for_each_subnode.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar().
Additinally minor spelling correction.
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.
Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek explained on IRC, that ft_board_setup() is not used / necessary
at all. So its best to just drop it completely, as it interferes with
the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed).
Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Provide a command to display information about the SBI implementation.
The output might look like:
=> sbi
SBI 0.2
OpenSBI
Extensions:
sbi_set_timer
sbi_console_putchar
sbi_console_getchar
sbi_clear_ipi
sbi_send_ipi
sbi_remote_fence_i
sbi_remote_sfence_vma
sbi_remote_sfence_vma_asid
sbi_shutdown
SBI Base Functionality
Timer Extension
IPI Extension
RFENCE Extension
Hart State Management Extension
The command can be used to construct a unit test checking that the
communication with the SEE is working.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Provide a defconfig that can be used to build U-Boot for the Maix boards
running upon OpenSBI.
Update the documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Building with CONFIG_SPL_SMP=n results in:
arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
arch/riscv/lib/spl.c:33:6:
error: unused variable ‘ret’ [-Werror=unused-variable]
33 | int ret;
| ^~~
Define the variable ret as __maybe_unused.
Fixes: 191636e448 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL")
Fixes: 8c59f2023c ("riscv: add SPL support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
The kendryte PLL code uses nop as barrier. The macro is not defined for
the sandbox on x86 but is defined on RISC-V.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
priv->info.size is of type 'size_t' but the length modifier is l.
Fix this by casting priv->info.size. Note 'z' cannot be used as
the modifier as SPL does not support that.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
At present fdtdec_get_addr() is used to get L2 cache controller base
address. This only works for a fixed #address-cells and #size-cells.
Change to use fdtdec_get_addr_size_auto_parent() instead.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
Pull request for UEFI sub-system for efi-2020-10-rc3 (3)
The following bug fixes are contained in this pull-request:
* ResetSystem() should no hang if not implemented.
* Device paths in Bootxxxx variables should be verified.
* Use ':' as separator for command setenv -e -i instead of ','.
* Correct comments for functions.
* Update UEFI documentation.
Cleaning up the following:
ERROR: do not use assignment in if condition
#281: FILE: drivers/xen/pvblock.c:260:
+ if ((err = xenbus_switch_state(XBT_NIL, nodename,
CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err"
#52: FILE: drivers/xen/pvblock.c:298:
+ if (err != NULL) {
ERROR: do not use assignment in if condition
#176: FILE: drivers/xen/gnttab.c:103:
+ if ((flags = nflags) & (GTF_reading | GTF_writing)) {
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1
#329: FILE: include/xen/gnttab.h:1:
+/*
WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead
#330: FILE: include/xen/gnttab.h:2:
+ * SPDX-License-Identifier: GPL-2.0
ERROR: do not use assignment in if condition
#630: FILE: lib/sscanf.c:558:
+ if ((n = inr) < width) {
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_CMD_RUN is set on by default in Kconfig.
Create xenguest_arm64_defconfig by using savedefconfig to avoid unnecessary
options.
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
after review of sam copyright should be on one line and link should
not between author lines
just remove the link and put ryder first as he is author of linux-driver
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Fix defects such as uninitialized variables and untrusted pointer
operations. Most part of the tainted variables and the related defects
actually comes from Linux's macro get_unaligned_le**, extensively used
in SquashFS code. Add sanity checks for those variables.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
'log2blksz' in blk_desc structure must always be initialized, otherwise
it will cause a lot of weird failures in file operations.
For example, fs_set_blk_dev[_with_part]() examines a block device against
every file system with its probe function. In particular, ext4 file
system's ext4_probe() will calls fs_devread() to fetch a super block.
If log2blksz is 0, the actual 'read' size, i.e. block_len >> log2blksz, is
much bigger than a buffer's size, and it can end up with memory corruption.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: f4802209e5 ("virtio: Add block driver support")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Improve SquashFS tests architecture. Add 'Compression' class. LZO
algorithm may crash if the file is fragmented, so the fragments are
disabled when testing LZO.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Add call to lzo's lzo1x_decompress_safe() into sqfs_decompress().
U-Boot's LZO sources may still have some unsolved issues that could make the
decompression crash when dealing with fragmented files, so those should be
avoided. The "-no-fragments" option can be passed to mksquashfs.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Add call to ZSTD's ZSTD_decompressDCtx(). In this use case, the caller
can upper bound the decompressed size, which will be the SquashFS data
block (or metadata block) size, so there is no need to use streaming
API. Add ZSTD's worskpace to squashfs_ctxt structure.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Add sqfs_decompressor_init() and sqfs_decompressor_cleanup(). These
functions are called respectively in sqfs_probe() and sqfs_close(). For
now, only ZSTD requires an initialization logic. ZSTD support will be
added in a follow-up commit.
Move squashfs_ctxt definition to sqfs_filesystem.h. This structure is
passed to sqfs_decompressor_init() and sqfs_decompressor_cleanup(), so
it can no longer be local to sqfs.c.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
There is no reason to bind psci driver if U-Boot runs in EL3 because
SMC/HVC instructions can't be called. That's why detect this state and
don't let user to crash from prompt by performing reset or poweroff
commands (if enabled).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Total Compute is based on ARM architecture and has
the following features enabled in u-boot:
- PL011 UART
- PL180 MMC
- NOR Flash
- FIT image with Signature
- AVB
Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
AVB only uses CONFIG_FASTBOOT_BUF_ADDR from fastboot for memory.
This memory is used for assigning temporary buffers.
This can be assigned a new variable and used as CONFIG_AVB_BUF_ADDR.
This is to support future boards that support AVB but dont support
USB and therefore dont support FASTBOOT.
Signed-off-by: Usama Arif <usama.arif@arm.com>
Cc: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Igor Opaniuk <igor.opaniuk@gmail.com>
[trini: Change defaults]
Signed-off-by: Tom Rini <trini@konsulko.com>
setenv -e -i <address>,<filesize> can be used to set a UEFI variable
from memory.
For separating an address and a size we use ':' in most commands.
Let's do the same for setenv -e -i.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Bootxxxx variables are provided by the user and therefore cannot be
trusted. We have to validate them before usage.
A device path provided by a Bootxxxx variable must have an end node within
the indicated device path length.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We need to check that device paths provided via UEFI variables are not
malformed.
Provide function efi_dp_check_length() to check if a device path has an
end node within a given number of bytes.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The unit test will reset the system by calling the ResetSystem() runtime
service before or after ExitBootServices() according to the users choice
by setting environment variable efi_selftest to:
* 'reset system' or
* 'reset system runtime'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If ResetSystem() is not implemented at runtime, it should return instead
of hanging in an endless loop. This allows the operating system to reset
the system by other means as Linux does. It also matches what EDK II
suggests in comments for functions ResetShutdown() and ResetWarm() in
OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* UEFI variables can be persisted
* describe that the sequence of files loaded before bootefi matters
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Add CCF clocks definitions for iMX6Q enet (ETH)
- Several fixes for CCF framework - the most notable is the one, which
adds get_rate helper to clk-mux.c
- Improvements for clk command - better visibility and alignment.
After adding custom get_rate helper function it was necessary to include
<dm/uclass.h> to avoid warnings about missing uclass_get_device_by_name.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Series-to: u-boot
Update depth only when clock uclass is found to have correct display
of command "clk dump".
Without this patch, the displayed depth is the binding depth for
all the uclass and that can be strange as only clock uclass nodes
are displayed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The previous version of the get_rate helper does not work if the mux
clock parent is changed after the probe. This error has not been
detected because this condition has not been tested. The error occurs
because the set_parent helper does not change the parent of the clock
device but only the clock selection register. Since changing the parent
of a probed device can be tricky, the new version of the get_rate helper
provides the rate of the selected clock and not that of the parent.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The tests developed for the mux clock are run on the sandbox. They don't
call the clk_mux_set_parent routine and therefore they do not detect
this error.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The parent->name variable can be used only in case the
uclass_get_device_by_name routine returns successfully.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The top-level framework flags are passed as parameter to the common
clock framework (ccf) registration routines without being used.
Checks of the flags setting added by the patch have been added in the
ccf test.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Unlike the other clock types, in the case of the gated clock, a new
driver has been developed which does not use the registering routine
provided by the common clock framework.
The addition of the ecspi0 clock to sandbox therefore allows testing
the ccf gate clock.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
After commit 673f659732 ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF need
to provide PTP clock.
On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux
kernel's CCF.
Code in this change models the simplest case when enet reference clock is
generated from 'osc' clock.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This code has been ported from Linux kernel v5.5.5 (tag) and has been
adjusted to U-Boot's DM.
It adds support for correct recognition of IMX_PLLV3_ENET flag in the
clk-pllv3.c driver.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After commit 673f659732 ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF
need to provide IMX6QDL_CLK_ENET.
This change defines the missing clock in i.MX6Q's CCF.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Do not calculate a unused value of n which is overwritten in both branches
of the subsequent if statement.
Identified by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
These prevent the use of IS_ENABLED() and are unnecessary. Drop them and
fix a few code-style nits nearby.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that this is in Kconfig we can move the logic at the top of the file
to Kconfig, and use if() instead of #if. Update the file with these
changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SPLASH_SCREEN
CONFIG_SPLASH_SCREEN_ALIGN
CONFIG_SPLASHIMAGE_GUARD
CONFIG_SPLASH_SOURCE
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a few more file extensions to the list of files that should not be
processed. This avoids unicode errors, for example.
Signed-off-by: Simon Glass <sjg@chromium.org>
The sections described in the sandbox linker script are inserted before
data section via "INSERT BEFORE .data;". Running readelf -S on sandbox
u-boot binary shows that the bss section is located after the data
section:
Section Headers:
[Nr] Name Type Address Offset
Size EntSize Flags Link Info Align
...
[25] .u_boot_list PROGBITS 000000000041d1c8 0021d1c8
000000000000dd90 0000000000000000 WA 0 0 8
[26] _u_boot_sandbox_g PROGBITS 000000000042af58 0022af58
00000000000000a0 0000000000000000 WA 0 0 8
[27] .data PROGBITS 000000000042b000 0022b000
000000000000f708 0000000000000000 WA 0 0 32
[28] .bss NOBITS 000000000043a720 0023a708
0000000000018930 0000000000000000 WA 0 0 32
This means that the __bss_start assignment in the linker script is bogus,
as the actual bss section start is located elsewhere. Remove this
assignment, as the __bss_start symbol is not used on sandbox anyway.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Since commit 69153988a6 ("i2c: Finish dropping use of CONFIG_I2C_HARD")
init_func_i2c is wrapped only by "#if defined(CONFIG_SYS_I2C)". Because
of this, the second ifdef within becomes pointless:
#if defined(CONFIG_SYS_I2C)
static int init_func_i2c(void)
<snip>
#ifdef CONFIG_SYS_I2C
...
#else
...
#endif
<snip>
}
#endif
Remove the dead #else preprocessor code.
Fixes: 69153988a6 ("i2c: Finish dropping use of CONFIG_I2C_HARD")
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Some of these were not converted when binman moved to use absolute paths.
Fix them.
Also drop the import of 'test' which is a directory, not a module.
Signed-off-by: Simon Glass <sjg@chromium.org>
When binman is installed its main program is in a different directory
to its modules. This means that __file__ is different and we cannot use
it to obtain the path to etype/ from main.py
To fix this, move the function to the 'control' module, since it is
installed with all the other modules, including the etype/ directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.
To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.
To generate this commit, I ran the following semantic patch
excluding include/dm/.
<smpl>
@@
type T;
expression dev;
@@
-(T *)devfdt_get_addr_ptr(dev)
+dev_read_addr_ptr(dev)
@@
expression dev;
@@
-devfdt_get_addr_ptr(dev)
+dev_read_addr_ptr(dev)
</smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to ulong because you could use devfdt_get_addr() without casting.
Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to uint32 because you could use devfdt_get_addr() without casting.
Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
According to the description of devfdt_get_addr_ptr, this function should
return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.
Fix this by making devfdt_get_addr_ptr return NULL on failure, as
described in the function comments. Also, update the drivers currently
checking (void *)FDT_ADDR_T_NONE to check for NULL.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add documentation in doc/drivel-model for the bind/unbind command.
Part of this documentation is extracted from original patch commit
message:
commit 49c752c93a ("cmd: Add bind/unbind commands to bind a device to a driver from the command line")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As bind-test is now binded at sandbox startup and no more by
test_bind.py, bind-test nodes are not located at the end of
"dm tree" output, but can be located everywhere in the tree, so
bind-test output could either be:
simple_bus 0 [ ] generic_simple_bus |-- bind-test
phy 0 [ ] phy_sandbox | |-- bind-test-child1
simple_bus 1 [ ] generic_simple_bus | `-- bind-test-child2
or:
simple_bus 5 [ ] generic_simple_bus `-- bind-test
phy 2 [ ] phy_sandbox |-- bind-test-child1
simple_bus 6 [ ] generic_simple_bus `-- bind-test-child2
in_tree() function need to be updated to take care of that change.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Usage of lists_bind_fdt() in bind command imposes to add
a compatible string for bind-test node.
Others impacts are:
- bind-test node is binded at sandbox start, so no need to bind it
in test_bind_unbind_with_node() test.
- As explained just above, after sandbox start, now a phy exist.
In test/dm/phy.c, it was verified that a third phy didn't exist,
now we must verified that a fourth phy doesn't exist.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data
This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
In sandbox_phy_bind() a check is added to validate driver_data
content.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the case of the live tree ofnode_read_addr_cells() and
ofnode_read_size_cells() return the #address-cells and #size-cells defined
in the parent node. With the patch the same is done for a non-live tree.
The only consumer of these functions is currently the CFI flash driver.
This patch fixes the incorrect parsing of the device tree leading to
'saveenv' failing on qemu_arm64_defconfig.
For testing qemu-system-aarch64 has to be called with
-drive if=pflash,format=raw,index=1,file=envstore.img
to provide the flash memory. envstore.img must be 64 MiB large.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
The sdmmc node is missing after the dts sync patch:
167efc2c7a arm64: dts: rk3399: Sync v5.7-rc1 from Linux
But we still need it for boot from SD card, so add it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Instead of recasting and shifting use macros which are designed for taking
upper/lower 32bit value from 64bit variable.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The capabilities register has a field to indicate whether the host
supports high speed mode or not. Add high speed host_caps based on
this bit instead of enabling it by default.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilnx.com>
Tested-by: Michal Simek <michal.simek@xilnx.com>
(zcu104 with sdhci-caps-mask = <0 0x200000>;)
Linux kernel for arm32 requires dtb and initrd to be placed in low memory
to work properly. This requirement is described in chapter 4b) and 5) in
Linux documentation (Documentation/arm/booting.rst).
There is an issue on arm32 with 2GB of memory that bootm_size is bigger
than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm
size on these systems not to be above 768MB.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
env_set..() can failed that's why check return status and report it back to
make sure that user is aware that's something went wrong.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When bootm_low/bootm_size are setup properly there is no need to setup any
initrd_high address. Location for initrd is determined through LMB.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to setup this variable if bootm_low and bootm_size
variable are properly setup. If fdt_high variable is missing U-Boot is
asking LMB to return free memory which is not used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to build private function when
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak
function which handles default case properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating
variables with run time information.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Current IPI module register description is not align with IPI HW. The
registers with the wrong offset are not used so it does not cause real
issues. This patch aligns the register description.
Additionally comments added to explain why recv function does not check
any flag prior copying rx data.
Fixes: 660b0c77d8 ("mailbox: zynqmp: ipi mailbox driver")
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove chip_id function and integrate the firmware call in the
zynqmp_get_silicon_idcode_name function. The change avoids querying the
firmware twice and makes the code bit more clear.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Modify the board init function to allow getting the chip ID when U-Boot
proper is executed at EL3.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Current implementation for getting chip ID uses either raw access on EL3
or a SMC call to get the silicon information. Following change
simplifies the code using always the firmware driver.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch merges ZynqMP firmware calls under xilinx_pm_request in order
to make trainsparent the EL. Calls at EL3 are send through IPI messages
and EL2 through SMC calls.
The EL2 call uses fixed payload and arg size as the EL3 call. The
firmware is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the
firmware API is limited by the SMC call size.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the
firmware driver. Additionally fixes payload buffer declarations without
macro usage
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DT binding is saying that default value is 0 not -1 that's why fix it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
s/xlnx,mio_bank/xlnx,mio-bank/g
DT binding is describing mio-bank not mio_bank that's why fix all DTSes and
also driver itself.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Remove adhoc dt binding for fixed-partition definition for i2c eeprom.
fixed-partition are using reg property instead of offset/size pair.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable DFU tftp support for firmware update. Fill dfu_ram_tftp variable to
have command present for showing how to use it.
boot FIT image has been created from below fragment. Key part is that type
of image has to be firmware. Also based on experiment load property is
completely ignored and base addresses are taken from dfu_alt_info variable.
$ cat update_uboot.its
/dts-v1/;
/ {
description = "Automatic U-Boot update";
#address-cells = <1>;
images {
Image {
description = "Kernel";
data = /incbin/("/tftpboot/Image");
compression = "none";
arch = "arm64";
type = "firmware";
os = "linux";
load = <0x80000>;
entry = <0x80000>;
hash-1 {
algo = "sha1";
};
};
system.dtb {
description = "DTB";
data = /incbin/("/tftpboot/system.dtb");
compression = "none";
arch = "arm64";
type = "firmware";
load = <0>;
hash-1 {
algo = "sha1";
};
};
};
};
$ mkimage -f update_uboot.its /tftpboot/boot
When U-Boot starts get IP address and server IP.
dhcp
setenv serverip 192.168.0.105
And then run prepared command.
run dfu_ram_tftp
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Image should be loaded to 0x80000 address and not to $kernel_addr_r.
Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined
that's why define it to be aligned with Versal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory
for malloc may not be required. Reduce it by 1.5K.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Find and use the lowest memory for Versal to make sure that we keep u-boot
as low as possible and never use memory above u-boot's maximum VA mapping.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Convert fdtdec_setup_mem_size_base(), get_next_memory_node(),
fdtdec_setup_memory_banksize() and fdtdec_setup_mem_size_base_lowest() to
livetree API.
Tested on ZynqMP zcu104 board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
New function should be called from board dram_init() because it initialized
gd->ram_base/ram_size. It finds the lowest available memory.
On systems with multiple memory nodes finding out the first memory node by
fdtdec_setup_mem_size_base() is not enough because this memory can be above
actual U-Boot VA mapping. Currently only mapping till 39bit is supported
(Full 44bit mapping was removed by commit 7985cdf74b ("arm64: Remove
non-full-va map code")).
If DT starts with the first memory node above 39bit address then system can
be unpredictable.
The function is available only when multiple memory bank support is
enabled.
Calling fdtdec_setup_memory_banksize() from dram_init() is not possible
because fdtdec_setup_memory_banksize() is saving dram information to bd
structure which is placed on stack but not initialized at this time. Also
stack is placed at location setup in dram_init().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The PM return payload size is defined as 4 bytes for Versal arquitecture
while the PM calls implemented both in the Versal clock driver and
ZynqMP firmware driver expects 5 bytes length.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Origin function was calling strsep which replaced delimiter ',' by a null
byte ('\0'). Operation was done directly on FDT which ends up with the
following behavior:
ZynqMP> printenv fdtfile
fdtfile=xilinx/zynqmp.dtb
ZynqMP> fdt addr $fdtcontroladdr
ZynqMP> fdt print / compatible
compatible = "xlnx", "zynqmp"
As is visible fdtfile was correctly composed but a null byte caused that
xlnx was separated from zynqmp.
This hasn't been spotted because in all Xilinx DTs there are at least 3
compatible string and only the first one was affected by this issue.
But for systems which only had one compatible string "xlnx,zynqmp" it was
causing an issue when U-Boot's DT was used by Linux kernel.
The patch removes strsep calling and strchr is called instead which just
locate the first char after deliminator ',' (variable called "name").
And using this pointer in fdtfile composing.
Fixes: 91d7e0c47f ("arm64: zynqmp: Create fdtfile from compatible string")
Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
On system with PL DDR which is placed before PS DDR in DT
env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low
and bootm_size variables are taking by default gd->bd->bi_dram[0].start and
gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be
PS ddr and even can be memory above 39bit VA which is what U-Boot supports
now.
That's why setup bootm variables based on ram_base/ram_size setting to make
sure that boot images are placed to the same location as U-Boot is placed.
This location should be by default location where OS can boot from.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
asm_sel is for switching between sata and pcie mode
on r64 there is GPIO90 connected to ASM1480 which
switches RX/TX pairs to PCIe/SATA connector
output-low means sata-controller is active
with 2020-10 now reg is also needed for the phy itself
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
- Remove pinmux definition from pico-imx6ul.c
- Enable NET_RANDOM_ETHADDR for temporary solution, because micrel_ksz8xxx
driver does not support DM_ETH yet, so cannot read MAC address directly.
Before enable DM_ETH:
Net: FEC [PRIME]
After enable DM_ETH:
Net:
Warning: using random MAC address - ca:3f:43:8f:67:d4
eth1: ethernet@20b4000
Here is the test commands:
=> dhcp
BOOTP broadcast 1
DHCP client bound to address 10.88.88.94 (139 ms)
*** ERROR: `serverip' not set
Cannot autoload with TFTPGET
=> ping 8.8.8.8
Using ethernet@20b4000 device
host 8.8.8.8 is alive
Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
It's due to the warning messages issue after compiled:
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Enable DM_VIDEO can fix it on the stage of compilation.
Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The correct order is load address, offset, length. The order was
accidentally switched a while ago; make it match the HAB Blocks output and
what CST expects again.
Fixes: e97bdfa5da ("tools/imximage: share DCD information via Kconfig")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
This function is unused since commit 862274913f ("bus:
uniphier-system-bus: move hardware init from board files").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fill is code for programming the DDR_PHY_CMD_DESKEW_CONx registers,
which are optional, but can be used to fill in the byte lane delays.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Implement the 'getprisec' subcommand of 'bmode' command for i.MX7 by
reading out the SRC GPR10 bit 30. This bit is either set by the BootROM
if it switched to the secondary copy due to primary copy being corrupted
OR it can be overridden by the user.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Add new 'getprisec' subcommand to 'bmode' command, which sets the return
value of the 'bmode' command to either 0 if the system booted from primary
copy or to 1 if the system booted from secondary copy. This can be used
e.g. in 'test' command to determine which copy of the system is running.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The i.MX6/i.MX7 is capable of booting a secondary "redundant" system
image in case the primary one is corrupted. The user can force this
boot mode as well by explicitly setting SRC GPR10 bit 30. This can be
potentially useful when upgrading the bootloader itself. Expose this
functionality to the user.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Add the basic differentiation between i.MX6 and i.MX7 into the bmode
command, the mechanism really works almost the same on both platforms.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Pull request for UEFI sub-system for efi-2020-10-rc3 (2)
This series includes bug fixes for:
* UEFI secure boot - images with multiple signatures
* UEFI secure boot - support for intermediate certificates
* corrections for UEFI unit tests
* missing loadaddr on MAIX board
There is no need to show demo list description twice when help demo is
performed. The patch removes duplicated entry.
Current state:
=> help demo
demo - Driver model (dm) demo operations
Usage:
demo list List available demo devices
demo hello <num> [<char>] Say hello
demo light [<num>] Set or get the lights
demo status <num> Get demo device status
demo list List available demo devices
Fixes: a02af4aeec ("dm: demo: Add a simple GPIO demonstration")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement Xen para-virtual frontend to backend communication
and actually read/write disk data.
This is based on mini-os implementation of the para-virtual block
frontend driver.
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Read essential virtual block device configuration data from XenStore,
initialize front ring and event channel.
Update block device description with actual block size.
Use code for XenStore from mini-os.
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Add initial infrastructure for Xen para-virtualized block device.
This includes compile-time configuration and the skeleton for
the future driver implementation.
Add new class UCLASS_PVBLOCK which is going to be a parent for
virtual block devices.
Add new interface type IF_TYPE_PVBLOCK.
Implement basic driver setup by reading XenStore configuration.
Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Add wait_event_timeout - sleep until a condition gets true or a
timeout elapses.
This is a stripped version of the same from Linux kernel with the
following u-boot specific modifications:
- no wait queues supported
- use u-boot timer to detect timeouts
- check for Ctrl-C pressed during wait
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop atomic_read from gadget/ether.c as this has existed for a
while and now causes problems]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add support for Xen para-virtualized serial driver. This
driver fully supports serial console for the virtual machine.
Please note that as the driver is initialized late, so no banner
nor memory size is visible.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.
Copyright for the bits ported belong to at least the following authors,
please see related files for details:
Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>
[1] - https://github.com/zyzii/mini-os.git
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add essential and required Xen interface headers only taken from
the stable Linux kernel stable/linux-5.7.y at commit
66dfe4522160 Linux 5.7.5.
These are better suited for U-boot than the original headers
from Xen as they are the stripped versions of the same.
At the same time use public protocols from Xen RELEASE-4.13.1, at
commit 6278553325a9 update Xen version to 4.13.1
as those have more comments in them.
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Introduce CONFIG_XEN to make U-Boot could be used as bootloader
for a virtual machine.
Without bootloader, we could successfully boot up android on XEN, but
we need need bootloader to support A/B, dm verify and etc.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Switch DTB provider form OF_EMBED to OF_SEPARATE
to avoid the compile warning message:
==================== WARNING ======================
CONFIG_OF_EMBED is enabled. This option should only
be used for debugging purposes. Please use
CONFIG_OF_SEPARATE for boards in mainline.
See doc/README.fdt-control for more info.
====================================================
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Move the BOOTCOMMAND definition from the board inclusion
header to the default configuration file.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
The hardcoded platform variables such as DRAM base address are not
common to Aspeed SoCs AST24xx/AST25xx/AST26xx. This patch replaces
those hardcoded with macros defined in a newly added header, where
the basic SoC HW information are assigned accordingly.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Rename the ast2500-board.c to board_common.c and
place the renamed file under the ast2500 folder.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
The original lowlevel_init function of AST2500 is written
in C. However, the C runtime environment is not ready until
_main execution.
This patch adds the assembly version of the lowlevel_init
function. Additional initialization to DRAM configuration
and LPC reset source are also added.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
- Fix HiFive Unleashed the broken problem by call fix_fdt() before
reserve_fdt(). Please refer to
https://www.mail-archive.com/u-boot@lists.denx.de/msg379444.html for
master u-boot broken for HiFive Unleashed.
- Add unaligned exception cmd.
- Refine sifive/fu540 spl flow.
- Add additional crash information for efi.
- Update sipeed/maix doc.
- Two minor refine.
The test case 5 in test_signed (multiple signatures) must be modified
and aligned with the change introduced in the previous commit
("efi_loader: signature: correct a behavior against multiple signatures").
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Under the current implementation, all the signatures, if any, in
a signed image must be verified before loading it.
Meanwhile, UEFI specification v2.8b section 32.5.3.3 says,
Multiple signatures are allowed to exist in the binary’s certificate
table (as per PE/COFF Section “Attribute Certificate Table”). Only
one hash or signature is required to be present in db in order to pass
validation, so long as neither the SHA-256 hash of the binary nor any
present signature is reflected in dbx.
This patch makes the semantics of signature verification compliant with
the specification mentioned above.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There may be a chance that board specific fix_fdt() will change the
size of FDT blob so it's safe to call reserve_fdt() after fix_fdt()
otherwise global data (gd) will overwrite with FDT blob values.
Fixes: a8492e25ac ("riscv: Expand the DT size before copy reserved memory node")
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
If an exception occurs, the relocated program counter and return address
are required for an analysis.
With this patch you get:
=> exception undefined
Unhandled exception: Illegal instruction
EPC: 0000000080595908 RA: 000000008059c0c6 TVAL: 000000008030c01e
EPC: 0000000080007908 RA: 000000008000e0c6 reloc adjusted
We can use the relocated addresses to find the involved functions in
u.boot.map:
.text.do_undefined
0x0000000080007908 0x8 cmd/built-in.o
.text.cmd_process
0x000000008000dfcc 0x11a common/built-in.o
0x000000008000dfcc cmd_process
If an exception occurs in an UEFI binary additionally the load addresses of
the UEFI binaries are needed. With this patch:
=> setenv efi_selftest exception
=> bootefi selftest
Unhandled exception: Illegal instruction
EPC: 000000008042e18a RA: 000000008042e18a TVAL: 000000008030c01e
EPC: 000000007fea018a RA: 000000007fea018a reloc adjusted
UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
UEFI image [0x000000008042e000:0x000000008042e43f] pc=0x18a '/bug.efi'
The value pc=0x18a matches the position of the illegal instruction in
efi_selftest_miniapp_exception.efi (loaded as /bug.efi);
asm volatile (".word 0xffffffff\n");
00000180 93 85 C5 11 1C 64 22 85 82 97 FF FF FF FF 1C 64
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The command 'exception' can be used to test the handling of exceptions.
Currently the exception command only allows to create an illegal
instruction exception on RISC-V.
Provide a sub-command 'exception unaligned' to cause a misaligned load
address exception.
Adjust the online help for 'exception undefined'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Provide the required settings for the debug UART.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
The MAIXDUINO runs fine with the sipeed_maix_bitm_defconfig but a different
board id parameter should be passed to kflash.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
This option was enabled during the earlier U-Boot porting time. Now
we already have the OTP driver in place and the unique MAC address
is read from the OTP, there is no need to turn on this option.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Under the new file-based variable implementation, the secure state
is always and falsely set to 0 (hence, the secure boot gets disabled)
after the reboot even if PK (and other signature database) has already
been enrolled in the previous boot.
This is because the secure state is set up *before* loading non-volatile
variables' values from saved data.
This patch fixes the order of variable initialization and secure state
initialization.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: 5f7dcf079d ("efi_loader: UEFI variable persistence")
In this test case, an image may have a signature with additional
intermediate certificates. A chain of trust will be followed and all
the certificates in the middle of chain must be verified before loading.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
It won't be very useful to customize HELLO_PATH and EFI_SECBOOT_IMAGE_NAME
under the current code base. So just remove them.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In this commit, efi_signature_verify(with_sigdb) will be re-implemented
using pcks7_verify_one() in order to support certificates chain, where
the signer's certificate will be signed by an intermediate CA (certificate
authority) and the latter's certificate will also be signed by another CA
and so on.
What we need to do here is to search for certificates in a signature,
build up a chain of certificates and verify one by one. pkcs7_verify_one()
handles most of these steps except the last one.
pkcs7_verify_one() returns, if succeeded, the last certificate to verify,
which can be either a self-signed one or one that should be signed by one
of certificates in "db". Re-worked efi_signature_verify() will take care
of this step.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This is a bug fix; Setting an authenticated variable may fail due to
a memory corruption in the authentication.
A temporary buffer will, if needed, be allocated to parse a variable's
authentication data, and some portion of buffer, specifically signer's
certificates, will be referenced by efi_signature_verify().
So the buffer should be kept valid until the authentication process
is finished.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Variable load_options must be initialized to NULL to avoid a segmentation
fault when freeing the memory this variable points to.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Use IS_ENABLED to prevent ifdef in board_key_check for STM32MP
- Add STM32 FMC2 EBI controller driver
- Fix dwc3-sti-glue which allows STiH410-B2260 to boot again
- Add fitImage its entry for 587-200 DHCOR SoM
- Add both PDK2 and DRC02 DT into DHCOM fitImage its
- Fix DHCOM KS8851 ethernet MAC address
- Remove stm32mp1 board.c file
- Use const for struct node_info in board stm32mp1.c file
Use const for the variable nodes in ft_board_setup,
this patch follow fdt_fixup_mtdparts prototype and no more use stack.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Remove the file board/st/stm32mp1/board.c which is not more
compiled since commit 156732cc8939 ("board: stm32mp1: move the
function board_debug_uart_init in spl.c")
Fixes: 4fb46816c7 ("board: stm32mp1: move the function board_debug_uart_init in spl.c")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The STM32MP1 DHCOM has two ethernet interfaces, the on-SoM DWMAC and KS8851.
Set eth1addr for the KS8851 to a MAC address of the DWMAC incremented by 1.
The MAC of the DWMAC is set from on-SoM EEPROM already, but the MAC address
of KS8851 was left uninitialized, so fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The new 587-200 DHCOR SoM is compatible with the 587-100 prototype,
hence just replicate the entries, as there is no pattern matching.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Include both PDK2 and DRC02 DTs in the DHCOM fitImage .its and implement
support in SPL to select the correct configuration entry for U-Boot by
using the machine compatible string from SPL DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
FMC2 EBI support has been added. Common resources (registers base
address and clock) can now be shared between the 2 drivers using
"st,stm32mp1-fmc2-nfc" compatible string. It means that the
common resources should now be found in the parent device when EBI
node is available.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The driver adds the support for the STMicroelectronics FMC2 EBI controller
found on STM32MP SOCs.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch renames functions and local variables.
This cleanup is done to get all functions starting by stm32_fmc2_nfc
in the FMC2 raw NAND driver when all functions will start by
stm32_fmc2_ebi in the FMC2 EBI driver.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
FMC2_TIMEOUT_5S will be used each time that we need to wait.
It was seen, during stress tests in an overloaded system,
that we could be close to 1 second, even if we never met this
value. To be safe, FMC2_TIMEOUT_MS is set to 5 seconds.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Remove inline comments that are useless since function label are
self explanatory.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use IS_ENABLED to prevent ifdef in g_dnl_board_usb_cable_connected
and in g_dnl_bind_fixup
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
node varaible is used as iterator into ofnode_for_each_subnode()
loop, when exiting of it, node is no more a valid ofnode.
Use dwc3_node instead as parameter of ofnode_valid()
Fixes: ac28e59a57 ("usb: Migrate to support live DT for some driver")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
every compilation shows this error
Hack for sunxi which doesn't have a proper binman definition for
64-bit boards
not only for sunxi-boards/arm64
fix this by changing to real comments
Fixes: 9f55ee259d0c ("Makefile: sunxi: Don't use binman to build ATF image")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
- Added support for J7200 evm
- DM_ETH and DM_USB migrations for omap3
- USB DFU and mass storage support for AM65x evm
- RTI watchdog support for K3 devices
- Fix an issue with L3 cache on K3 devices
On J7200 SoC OSPI0 and HypeFlash are muxed at HW level and only one of
them can be used at any time. J7200 EVM has both HyperFlash and OSPI
flash on board. There is a user switch (SW3.1) that can be toggled to
select OSPI flash vs HyperFlash.
Read the state of this switch via wkup_gpio0_6 line and fixup the DT
nodes to select OSPI0 vs HyperFlash
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add the basic a72 basic dts for j7200. Following nodes were supported:
- UART
- MMC SD
- I2C
- TISCI communication
- LPDDR with 1600MTs configuration.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add device identification for J7200 SoC
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
k3-j721e ddr driver sanity checks for product id and version number.
Version number gets changed for every minor update in the IP. So discard
the version check and just sanity check for product id.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add board detection support for j7200 common processor board.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
j7200-evm has minor differences with j721e-evm based on the IPs
available in the SoC. Introduce separate build targets for j7200-evm
to incorporate the differences.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Detect if sysfw is already loaded by ROM and pass this information to
sysfw loader. Based on this information sysfw loader either loads the
sysfw image from boot media or just receives the boot notification
message form sysfw.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. ROM passes this information on number of images that are loaded
to bootloader at certain location. Add support for storing this
information before it gets corrupted.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Add support for detection J7200 SoC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
In main control mmr there is no partition 4 and partition 6 is available
only on J721e. Fix the same in ctrl_mmr_unlock function
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Add an api soc_is_j721e(), and use it to enable certain functionality
that is available only on j721e. This detection is needed when DT is not
available.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. In such cases, SPL need not load sysfw from boot media, but need
to receive boot notification message from sysfw. So separate out
remoteproc calls for system controller from sysfw loader and just
receive the boot notification if sysfw is already loaded.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
mmr_unlock api is common for all k3 devices. Move it to a common
location.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined
And in turn tispl.bin ends up not embedding any DTB.
Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The DT nodes on J721E SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the current
and the expected corrected path names so that this logic won't be broken
with newer kernels.
Signed-off-by: Suman Anna <s-anna@ti.com>
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom
when eeprom is not available
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Current usage of eeprom apis produce a build failure when
CONFIG_TI_I2C_BOARD_DETECT is not defined. Add stub function for these
apis to avoid build failures.
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting from USB mass storage devices
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting in USB peripheral (DFU) bootmode
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
U-boot only supports either USB host or device mode for a node at a
time in dts. To support both host and dfu bootmodes, set "peripheral"
as the default dr_mode but fixup property to "host" if host bootmode
is detected.
This needs to happen before the dwc3 generic layer binds the usb device
to a host or device driver. Therefore, add an fdtdec_setup_board()
implementation to fixup the dt based on the boot mode.
Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe
in both the host and device cases. This is required for accessing the
interface at USB 2.0 speeds.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
In order to be able to use things like file system drivers early on in
SPL (before relocation) in a memory-constrained environment when DDR is
not yet available we cannot use the simple malloc scheme which does not
implement the freeing of previously allocated memory blocks. To address
this issue go ahead and enable the use of the full malloc by manually
initializing the required functionality inside board_init_f by creating
a full malloc pool inside the pre-relocation malloc pool.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
usb_init() may be called multiple times for fetching multiple images
from SPL. Skip reinitializing USB if its already been done
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Create a new API spl_usb_load() that takes the filename as a parameter
instead of taking the default U-boot PAYLOAD_NAME
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
The DT nodes on AM65x SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the
current and the expected corrected path names so that this logic won't
be broken with newer kernels.
The logic also corrects the crypto node name as the DT node
unit-addresses are all expected to be lower case.
Signed-off-by: Suman Anna <s-anna@ti.com>
The hardcoded array size leads to array overflows with changes in
speed modes enum in mmc core. Use MMC_MODES_END for otap_del_sel
array declaration to fix this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The various CBASS interconnect nodes on K3 J721E SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Signed-off-by: Suman Anna <s-anna@ti.com>
The various CBASS interconnect nodes on K3 AM65x SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Signed-off-by: Suman Anna <s-anna@ti.com>
This commit completes the migrations for DM_ETH and DM_USB. The board
is now consistent with omap3_beagle and other remaining OMAP3 boards.
Cc: Tom Rini <trini@konsulko.com>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Pull request for UEFI sub-system for efi-2020-10-rc3
Bugs in the UEFI sub-system are fixed:
* use the optional data of the BootXXXX variables as load options
* simplify function public_key_verify_signature()
* amend a copyright notice
When switching on or off the ARM caches some care must be taken to ensure
existing cache line allocations are not left in an inconsistent state.
An example of this is when cache lines are considered non-shared by
and L3 controller even though the lines are shared. To prevent these
and other issues all cache lines should be cleared before enabling
or disabling a coherent master's cache. ARM cores and many L3 controllers
provide a way to efficiently clean out all cache lines to allow for
this, unfortunately there is no such easy way to do this on current K3
MSMC based systems.
We could explicitly clean out every valid external address tracked by
MSMC (all of DRAM), or we could attempt to identify only the set of
addresses accessed by a given boot stage and flush only those
specifically. This patch attempts the latter. We start with cleaning the
SPL load address. More addresses can be added here later as they are
identified.
Note that we perform a flush operation for both the flush and invalidate
operations, this is not a typo. We do this to avoid the situation that
some ARM cores will promote an invalidate to a clean+invalidate, but only
emit the invalidation operation externally, leading to a loss of data.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Faiz Abbas <faiz_abbas@ti.com>
Add DT entries for main domain watchdog0 and 1 instances on the J721e
well as RTI1-based watchdog on the AM65x. RTI0 does not work for this
purpose on the AM65x, so leave it out.
On AM65x, we mark the power-domain as shared because RTI firmware such
as https://github.com/siemens/k3-rti-wdt may request it as well in order
to prevent accidental shutdown of the watchdog.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
This is based on the Linux kernel driver for the RTI watchdog.
To actually reset the system on an AM65x, it requires firmware running
on the R5 that accepts the NMI and issues the actual system reset via
TISCI. Kind of an iTCO, except that this watchdog hardware has support
for no-way-out, and only for that.
On the J721E, reset works without extra firmware help when routing the
RTI interrupt via the ESM.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Use "cons.config.build_dir" instead of writing to the source directory
(read-only). This will fix the test failures in Azure.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Up to now we used the value of the bootargs environment variable as load
options in the boot manager. This is not correct. The data has to be taken
from the Boot#### variable.
Let the boot manager copy the optional data of the EFI_LOAD_OPTION as load
options to the loaded image protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The bootefi bootmgr command has to set the load options for a loaded image
from the value of BootXXXX variable. If the boot manager is not used, the
value is set from the environment variable bootargs (or efi_selftest).
Factor out a common function efi_set_load_options().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some amount of code was moved/derived from efi_variable.c regarding
UEFI secure boot, in particluar in the commit 012c56ac76 ("efi_loader:
restructure code for TEE variables").
So add the orignal author's copyright notice.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This converts the following to Kconfig:
CONFIG_SYS_MMC_ENV_DEV
CONFIG_SYS_MMC_ENV_PART
Note that with this conversion we now have consistent behavior with
respect to ensuring that we have always selected the correct MMC
device and hardware partition.
Signed-off-by: Tom Rini <trini@konsulko.com>
At present with sunxi 64-bit, the Makefile builds
u-boot-sunxi-with-spl.bin and then binman overwrites it with its own
version. But the binman definition lacks some parts, in particular
BL31.
For now, work around this with a hack.
Tested-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 42b18df80f ("x86: Makefile: Drop explicit targets built by binman")
On some devices the environment variable serial# cannot be overwritten.
Set the variable only if it is not set.
For our unit test it is sufficient to test if any value for serial-number
is set.
Fixes: 8a5cdf601f ("test: efi_selftest: Do not force serial# setting")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The hush parser not enabled for some boards, e.g.
sipeed_maix_bitm_defconfig.
With CONFIG_HUSH_PARSER=n a double quotation mark is not interpreted as the
beginning of a string. Use a single quotation mark instead.
Furthermore without the hush parser variables have to be referenced as
${varname}. Add the missing braces.
Reported-by: Sean Anderson <seanga2@gmail.com>
Fixes: 8b86c609b8 ("test/py: add test of basic shell functionality")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Modify various test/py filesystem creation routines to support systems
that don't implement the metadata_csum ext4 feature.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add Python scripts to test 'ls' and 'load' commands. The scripts
generate a SquashFS image and clean the directory after the assertions,
or if an exception is raised.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Add call to zlib's 'uncompress' function. Add function to display the
right error message depending on the decompression's return value.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Add zlib (v1.2.11) uncompr() function to U-Boot. SquashFS depends on
this function to decompress data from a raw disk image. The actual
support for zlib into SquashFS sources will be added in a follow-up
commit.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Add support for SquashFS filesystem. Right now, it does not support
compression but support for zlib will be added in a follow-up commit.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Add various fixes and improvements to this command that were missed in
the original version. Unfortunately I forgot to send v2.
- Fix Kconfig name
- Use a separate variable for the remaining search length
- Correct a minor bug
- Move into a separate test suite
- Add -q flag to the 'quiet' test to test operation when console is enabled
- Enable the feature for sandbox
Signed-off-by: Simon Glass <sjg@chromium.org>
The test flags used by driver model are currently not available to other
tests. Rather than creating two sets of flags, make these flags generic
by changing the DM_ prefix to UT_ and moving them to the test.h header.
This will allow adding other test flags without confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
On boards without console recording these function are currently missing.
It is more convenient for them to be present but to return dummy values.
That way if we know that a test needs recording, we can check if it is
available, and skip the test if not, while avoiding #ifdefs.
Update the header file according and adjust console_record_reset_enable()
to return an error if recording is not available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some lines of the output are not worth testing, or not worth testing in
their entirety. For example, when checking a hex dump we know that the
hex-dump routine can display ASCII so we only need to check the hex bytes,
not the ASCII dump. Add a new test macros which can check only part of
a console line.
Sometimes it is useful to skip a line altogether, so add a macro for that
also.
Signed-off-by: Simon Glass <sjg@chromium.org>
The external data is located after the mmapped FDT pointed to by
'old_fdt', not in the newly created FDT we are importing into at 'fdt'.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
This patch addresses issue #2 for signed configurations.
-----8<-----
Including the image cipher properties in the configuration signature
prevents an attacker from modifying cipher, key or iv properties.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Previously, mkimage -F could be run multiple times causing already
ciphered image data to be ciphered again.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Also replace fdt_delprop/fdt_setprop with fdt_setprop as fdt_setprop can
replace an existing property value.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Previously mkimage would process any node matching the regex cipher.*
and apply the ciphers to the image data in the order they appeared in
the FDT. This meant that data could be inadvertently ciphered multiple
times.
Switch to processing a single cipher node which exactly matches
FIT_CIPHER_NODENAME.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
blkcache_init manually relocates blkcache list pointers when
CONFIG_NEEDS_MANUAL_RELOC is enabled. However, it is called very late in
the boot sequence, which could be a problem if previous boot calls execute
blkcache operations with the non-relocated pointers. For example, mmc is
initialized earlier and might call blkcache_invalidate (in
mmc_select_hwpart()) when trying to load the environment from mmc via
env_load().
To fix this issue, move blkcache_init boot call earlier, before mmc gets
initialized.
Acked-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Extend manual relocation of block_cache list pointers to all platforms that
enable CONFIG_NEEDS_MANUAL_RELOC. Remove m68k-specific checks and provide a
single implementation that adds gd->reloc_off to the pre-relocation
pointers.
Acked-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
[trini: Add guard around DECLARE_GLOBAL_DATA_PTR to avoid size growth]
Signed-off-by: Tom Rini <trini@konsulko.com>
serial_initialize is called only during the common init sequence, after
relocation (in common/board_r.c). Because it has a void return value, it
has to wrapped in initr_serial. In order to be able to get rid of this
indirection, make serial_initialize return int.
Remove extern from prototype in order to silence the following checkpatch
warning:
check: extern prototypes should be avoided in .h files
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Use IS_ENABLED() instead of #ifdef in blk_post_probe function.
No functional change intended.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
[trini: Fix thinko and use CONFIG_HAVE_BLOCK_DEVICE in IS_ENABLED()]
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that all arch specific code was converted to setup_bdinfo, we can
remove setup_board_part1.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Factor out ppc-specific bdinfo setup from generic init sequence to
arch_setup_bdinfo in arch/powerpc/lib/bdinfo.c.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Factor out m68k-specific bdinfo setup to arch_setup_bdinfo in
arch/m68k/lib/bdinfo.c. Also, use if(IS_ENABLED()) instead of #ifdef where
possible.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Move sram related bdinfo from arch-specific setup_board_part1 to generic
code in setup_bdinfo. Also use "if (IS_ENABLED(CONFIG_SYS_HAS_SRAM))"
instead of "#ifdef CONFIG_SYS_SRAM_BASE".
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.
Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.
For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.
Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Acked-by: Alexey Brodkin <abrokdin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Certain architectures (ppc, mips, sh, m68k) use setup board_part1 and
setup_board_part2 calls during pre-relocation init to populate gd->bd
boardinfo fields. This makes the generic init sequence cluttered with
arch-specific ifdefs.
In order to clean these arch-specific sequences from generic init,
introduce arch_setup_bdinfo weak initcall so that everyone can define their
own bdinfo setup routines.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Introduce setup_bdinfo initcall as a generic routine to populate bdinfo
fields.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
bi_sramstart and bi_sramsize are generic members of the bd_info structure,
so move the m68k/powerpc-specific prints to generic code. Also, print them
only if SRAM support is enabled via CONFIG_SYS_HAS_SRAM.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Remove ad-hoc CONFIG_SYS_SRAM_START and use CONFIG_SYS_SRAM_BASE instead.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
In order to be able to replace "#ifdef CONFIG_SYS_SRAM_BASE" sequences
with the IS_ENABLED() equivalent, introduce a new boolean Kconfig option
that signals whether the platform has SRAM support.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
The code around CONFIG_SYS_MMC_ENV_PART has been untested since merge.
This can be seen by it referencing 'mmc->part_num' which was migrated
elsewhere prior to this code being merged.
Cc: Joel Johnson <mrjoel@lixil.net>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Update the MikroTik CRS305-1G-4S flash layout to support redundant UBI
partitions.
Additionally enable the UBI commands in crs305-1g-4s_defconfig.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
MikroTik CRS328-4C-20S-4S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit board variant has a
bigger Macronix flash.
Add basic U-Boot, UART and SPI flash support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
MikroTik CRS326-24G-2S board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
This commit includes two board variants, namely the factory
default one and a Bit variant. The Bit board variant has a
bigger Macronix flash.
Add basic U-Boot, UART and SPI flash support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
MikroTik CRS305-1G-4S Bit board has a switch chip with an integrated
Marvell Prestera 98DX3236 CPU.
The Bit board variant is added, which has a bigger Macronix flash.
Add basic U-Boot, UART and Winbond SPI flash support.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Jakov Petrina <jakov.petrina@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
SPI_FLASH_PROTECTION config item is never used in anywhere
in the U-Boot tree.
Drop it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The printf() string produces a warning about %d not matching size_t. Fix
it and put the format string on one line to avoid a checkpatch warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
We still have some platforms that only implements functionalities in
PSCI 0.1 (e.g. Allwinner ARMv7 SoCs).
Add a Kconfig option for exporting only PSCI 0.1. The code to export
PSCI 0.1 is still available and gets activated by this patch.
In addition, default ARCH_SUNXI U-Boot PSCI implementation to export
PSCI 0.1, to fix poweroff/reboot regression on Allwinner multi-core
ARMv7 SoCs.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
We currently print the memory size with at least 8 hexadecimal digits.
This creates a ragged output on 64 bit boards, e.g. on a Kendryte K210:
DRAM bank = 0x0000000000000002
-> start = 0x0000000080600000
-> size = 0x0000000000200000
memstart = 0x0000000000000000
memsize = 0x00000000
flashstart = 0x0000000000000000
flashsize = 0x0000000000000000
flashoffset = 0x0000000000000000
All other numbers are printed with the number of digits needed for the type
ulong. So use this value as minimum number of digits (precision) for
printing physical addresses.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The address of the kernel image is stored in images->ep. zi_start is the
offset of execution entry in the image, which is usually 0 for ARM
zImage.
Fixes boot error when ftd is stored near RAM address 0x0:
ERROR: FDT image overlaps OS image (OS=0x0..0x5fd608)
Fixes: fbde7589ce ("common: bootm: add checks to verify if ramdisk / fdtimage overlaps OS image")
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Vagrant Cascadian reported that mx6cuboxi target no longer builds
reproducibility on Debian.
One example of builds mismatches:
00096680: 696e 6700 736f 756e 642d 6461 6900 6465 ing.sound-dai.de
-00096690: 7465 6374 2d67 7069 6f73 0000 tect-gpios..
+00096690: 7465 6374 2d67 7069 6f73 0061 tect-gpios.a
This problem happens because all the buffers in fit_image.c are
allocated via malloc(), which does not zero out the allocated buffer.
Using calloc() fixes this unpredictable behaviour as it guarantees
that the allocated buffer are zero initialized.
Reported-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@reproducible-builds.org>
Some platforms, like MIPS Octeon, use mapped addresses (virtual address
!= physical address). On these platforms we need to make sure, that the
local virtual addresses are converted to physical (DMA) addresses for
the xHCI controller. This patch adds the missing virt_to_phys() calls,
so that the correct addresses are used.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
These values are already swapped to CPU endianess, so swapping them
again is a bug. Let's remove the swap here instead.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
xhci_writeq() makes the CPU->LE swapping only when addressing registers
in the xHCI controller address range and not in the local memory (RAM).
We need to use cpu_to_le64() here to ensure that the conversion is done
correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
While trying to use the U-Boot xHCI driver on the MIPS Octeon platform,
which is big endian, I noticed that the driver is missing a few endian
conversion calls. This patch adds these missing endian conversion
calls.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
SPL_CLEAR_BSS is called regardless of build type if
CONFIG_SPL_EARLY_BSS is defined. Add a guard for CONFIG_SPL_BUILD
to fix.
Signed-off-by: Brian Moyer <bdm310@gmail.com>
* Move README.clang to doc/build/clang.rst and reformat as
reStructeredText.
* Indicate that -ffixed-r9 and -ffixed-x18 are used to reserve registers
for gd.
* Minor editing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The commit 47818e23a2 ("Makefile.lib: include /__symbols__ in dtb if
SPL_LOAD_FIT_APPLY_OVERLAY is enabled") enables DT building as overlays
based on symbols which depends on SPL. But there is already an option to
apply overlays in full U-Boot too.
And there are platforms which are not using SPL and there is no option to
build DTs with -@ parameter.
That's why change dependency on OF_LIBFDT_OVERLAY which is already symbol
which is selected when SPL_LOAD_FIT_APPLY_OVERLAY is enabled but also
adding support for platforms which don't enable SPL and want to work with
overlays on U-Boot prompt.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add 4 new phy types which are present in Linux kernel.
DP and SGMII types are used on Xilinx ZynqMP devices.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove a double space introduced by my previous fixdep fix.
Fixes: 76ae74d348 ("fixdep: fix CONFIG_IS_ENABLED etc. handling")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Current pytest only support upto 2 stage boot;
Some boards like TI K3 am6/J7 boards use 3 stage
boot. This patch adds u_boot_spl2 to be able to
handle the 3-stage boot case. User needs to set
"env__spl2_skipped" in u_boot_boardenv config
file to use this support. By default it is set
to TRUE.
Signed-off-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Yan Liu <yan-liu@ti.com>
This commit moves CONFIG_PREBOOT="usb start" to common/KConfig
for all boards also declaring USB_KEYBOARD.
Besides simplifying defconfig files, this also enables support for
board-specific CONFIG_PREBOOT for sunxi boards:
commit 37304aaf60 ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
Kconfig") intended to support CONFIG_PREBOOT, but
include/configs/sunxi-common.h hardcodes preboot as part of internally
defined CONSOLE_STDIN_SETTINGS, silently ignoring any board-specific
CONFIG_PREBOOT.
Signed-off-by: Jonas Smedegaard <dr@jones.dk>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Series-Cc: Jagan Teki <jagan@amarulasolutions.com>
Series-Cc: Lukasz Majewski <lukma@denx.de>
Series-Cc: Andre Przywara <andre.przywara@arm.com>
Reset the stored ping IP address before entering a netloop with different
protocol to ensure that it won't be interrupted by the received
correct ICMP_ECHO_REPLY packet.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Add configuration flag to select the supported dwc driver configuration:
- CONFIG_DWC_ETH_QOS_TEGRA186
- CONFIG_DWC_ETH_QOS_IMX
- CONFIG_DWC_ETH_QOS_STM32
See Linux driver ethernet/stmicro/stmmac and associated glue layers
for other configuration examples.
This patch removes the not-selected compatibles and lets the linker remove
the unused functions to reduce the size of the driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Dump lmb status from the bdinfo command. This is useful for seeing the
reserved memory regions from the u-boot cmdline.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Add support for RFC 7440: "TFTP Windowsize Option".
This optional feature allows the client and server
to negotiate a window size of consecutive blocks to send as an
alternative for replacing the single-block lockstep schema.
windowsize can be defined statically during compilation by
setting CONFIG_TFTP_WINDOWSIZE, or defined in runtime by
setting an environment variable: "tftpwindowsize"
If not defined, the windowsize is set to 1, meaning that it
behaves as it was never defined.
Choosing the appropriate windowsize depends on the specific
network topology, underlying NIC.
You should test various windowsize scenarios and see which
best work for you.
Setting a windowsize too big can actually decreases performance.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Move the variable psci_method in .data section when EFI is not
activated and the psci driver safely access it before relocation.
Without this patch the variable is located in .bss section
and the psci probe requested before relocation corrupts the device
tree (probe is requested by board_f.c::print_resetinfo()).
When EFI_LOADER is activated, this variable in already located in the
.data.efi_runtime section by __efi_runtime_data.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
In the unlikely event that both blocks 10 and 11 are marked as bad (on a
32 bit machine), then the process of marking block 10 as bad stomps on
cached entry for block 11. There are (of course) other examples.
Signed-off-by: Patrick Doyle <pdoyle@irobot.com>
Reviewed-by: Richard Weinberger <richard@nod.at>
This patch adds a feature for block device cloning similar to dd
command, this should be useful for boot-strapping a device where
usb gadget or networking is not available. For instance one can
clone a factory image into a blank emmc from an external sd card.
Signed-off-by: John Chau <john@harmon.hk>
While using u-boot with qemu's virtio driver I stumbled across a
problem reading files less than sector size. On the real hardware the
block reader seems ok with reading zero blocks, and while we could fix
the virtio host side of qemu to deal with a zero block read instead of
crashing, the u-boot fat driver should not be doing zero block reads
in the first place. If you ask hardware to read zero blocks you are
just going to get zero data. There may also be other hardware that
responds similarly to the virtio interface so this is worth fixing.
Without the patch I get the following and have to restart qemu because
it dies.
---------------------------------
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
qemu-system-aarch64: virtio: zero sized buffers are not allowed
---------------------------------
With the patch I get the expected results.
---------------------------------
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
30 bytes read in 11 ms (2 KiB/s)
=> md.b ${loadaddr} 0x1E
40080000: 64 77 63 5f 6f 74 67 2e 6c 70 6d 5f 65 6e 61 62 dwc_otg.lpm_enab
40080010: 6c 65 3d 30 20 72 6f 6f 74 77 61 69 74 0a le=0 rootwait.
---------------------------------
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
For 2020.10
-----------
- fixes for Toradex board
- fix warnings from previous PR
- HAB: reset instead of panic after failure
- new board: MYiR Tech MYS-6ULX
- mx6cuboxi: use OF_PLATDATA
- further changes for DM
Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163
Header files generally should not include header files just for a struct,
since forward declarations work just as well and reduce overhead.
Add a warning for dm.h being included, since this has crept into U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration and un-inlining of dev_get_clk_ptr()
instead.
Fix up the kendryte header files to avoid build errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Also move the inline function out into a C file. We should not include C
code in headers.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Also drop asm/io.h
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Drop the common.h inclusion also.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
from each one and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file should not include common.h and dm.h so remove them. Also move
the inclusion of this file to after the normal includes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Two files relies on efi_driver.h to include common.h and dm.h which is
incorrect. The former should always be included in a non-host C file and
the latter should be included if driver model is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use other headers and C inclusions instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
These header file should not be included in other header files. Remove
them and add to each individual file. Add test/test.h to test/ui.h since
that is a reasonable place.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and add it to the cmd file instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header file should not be included in other header files. Remove it
and use a forward declaration instead.
Also remove the other headers that are not needed, since the inline code
was removed in a recent commit:
b4d9452c4 ("watchdog: move initr_watchdog() to wdt-uclass.c")
Signed-off-by: Simon Glass <sjg@chromium.org>
The -ENODEV error value in spi_nor_read_id() is incorrect since there
clearly is a device - it just cannot be supported. Use -ENOMEDIUM instead
which has the virtue of being less common.
Fix the return value in spi_nor_scan().
Also there are a few printf() statements which should be debug() since
they bloat the code with unused strings at present. Fix those while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases SPL needs to be able to erase but TPL just needs to read.
Allow these to have separate settings for SPI_FLASH_TINY.
Signed-off-by: Simon Glass <sjg@chromium.org>
PRCI module within SiFive SoC's has register with which we can
reset the sub-systems within the SoC. The resets to DDR and ethernet
sub systems within FU540-C000 SoC are active low, and are hold low
by default on power-up. Currently these are directly asserted within
prci driver via register read/write.
With the DM based reset driver support here, we bind the reset
driver with clock (prci) driver and assert the reset signals of
both sub-system's appropriately.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
The resets to DDR and ethernet sub-system are connected to
PRCI device reset control register, these reset signals
are active low and are held low at power-up. Add these reset
producer and consumer details needed by the reset driver.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Indexes of reset signals available in PRCI driver are also
defined in include/dt-bindings/reset/sifive-fu540-prci.h.
So use those instead of defining new ones again within the
fu540-prci driver.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Add bit indexes for reset signals within the PRCI module
on FU540-C000 SoC.
The DDR and ethernet sub-system's have reset signals
indicated by these reset indexes.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Since commit 7812bbdc37 ("video: Correctly handle multiple
framebuffers") the vidconsole output is missing on the primary
display on boards with two IPU units (all i.MX6Q/D based boards).
The base address of the allocated framebuffer is not correctly
programmed in the display controller. Fix it.
Reported-by: Soeren Moch <smoch@web.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
Migration to DM_VIDEO changed the output device name (in stout, stderr)
from 'vga' to 'vidconsole'. This also was adapted in the default environment.
However, existing user defined environments still use 'vga'. Enable this
workaround to map the 'vga' name to 'vidconsole'. So we get HDMI video
output also with existing legacy environments.
Signed-off-by: Soeren Moch <smoch@web.de>
This patch enables the following options for the Octeon EBB7304 EVB:
- PCI & DM_PCI
- DM_SPI_FLASH & SPI flash device support
- SPI & Octeon SPI driver
- GPIO cmd support
- I2C cmd support
Signed-off-by: Stefan Roese <sr@denx.de>
This patch selects DM_SPI & DM_I2C for MIPS Octeon. DM_GPIO, DM_SERIAL
and DM_ETH are already selected.
Additionally the selections are now alphabetically sorted.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a simple clock driver for the Marvell Octeon MIPS SoC
family. Its for IO clock rate passing via DT in some of the Octeon
driver, like I2C. So that we don't need to use the non-mainline API
octeon_get_io_clock().
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Lukasz Majewski <lukma@denx.de>
Before enable _DM_ETH:
Net: FEC [PRIME]
After enable DM_ETH:
Net: eth0: ethernet@2188000
Here is the test commands:
=> dhcp
BOOTP broadcast 1
DHCP client bound to address 10.88.88.152 (146 ms)
*** ERROR: `serverip' not set
Cannot autoload with TFTPGET
=> ping 8.8.8.8
Using ethernet@2188000 device
host 8.8.8.8 is alive
Signed-off-by: Wig Cheng <wig.cheng@technexion.com>
Enable CONFIG_SPL_DM_SPI_FLASH to be able to boot from SPI NOR,
modify the offset of U-boot proper in the SPI NOR, so the
difference in offset matches between SPL and U-boot matches that of
the SD Card, allowing u-boot-with-spl.imx to also be copied to SPI
NOR at an offset of 0x400. Update the README to reflect this
change.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Instead of hang()ing the system and thus disallowing any automated
recovery possibility from a HAB authentication failure, panic() .
The panic() function can be configured to hang() the system after
printing an error message, however the default is to reset the
system instead.
This allows redundant boot to work correctly. In case the primary
or secondary image cannot be authenticated, the system reboots and
bootrom can try to start the other one.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
MYS-6ULX is single board computer (SBC) comes with eMMC or NAND based
on imx6ULL SoC from NXP and provision for expansion board. This
commit adds support only for SBC with NAND.
CPU: Freescale i.MX6ULL rev1.1 528 MHz (running at 396 MHz)
CPU: Commercial temperature grade (0C to 95C) at 45C
Reset cause: WDOG
Model: MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND
Board: MYiR MYS-6ULX 6ULL Single Board Computer
DRAM: 256 MiB
NAND: 256 MiB
MMC: FSL_SDHC: 0
In: serial@2020000
Out: serial@2020000
Err: serial@2020000
Net: FEC0
Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
- ApolloLake: add u64 parameters support for FSP2 bindings
- ApolloLake: add missing parameters to support full configuration of
the latest FSP MR6 release
- Append appropriate suffixes in various assembly codes
Pull request for UEFI sub-system for efi-2020-10-rc2
This series comprises error corrections for the UEFI subsystem:
* make the memory size reserved for the U-Boot stack customizable
and reduce it for the MAIX board
* correct build dependencies for UEFI unit test
* enable read-only UEFI variable are enabled with the TEE backend
* add 10 ms wait to sysreset to fix a problem with unit testing
Assembler is not happy:
arch/x86/cpu/call32.S: Assembler messages:
arch/x86/cpu/call32.S:36: Warning: no instruction mnemonic suffix given and no register operands; using default for `retf'
Fix this by adding appropriate suffixes to the assembler commands.
Fixes: 6f92ed8f1a ("x86: Add a way to call 32-bit code from 64-bit mode")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Assembler is not happy:
arch/x86/cpu/sipi_vector.S: Assembler messages:
arch/x86/cpu/sipi_vector.S:134: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
arch/x86/cpu/sipi_vector.S:139: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts'
arch/x86/cpu/sipi_vector.S:157: Warning: no instruction mnemonic suffix given and no register operands; using default for `cmp'
Fix this by adding appropriate suffixes to the assembler commands.
Fixes: 45b5a37836 ("x86: Add multi-processor init")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add simple DT and clock bindings to r2dplus DT to permit U-Boot
to bind the SCIF driver via DT probing instead of hard-coded
config options.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The gd->malloc_base must be set before the C runtime if the MALLOC_F_LEN
is non-zero, otherwise we hit assertion in dlmalloc.c initf_malloc(). So
set it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The ethernet on r2dplus is on PCI bus, enumerate the PCI early
to get the ethernet operational.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
As both MMC and GPIO driver now supports OF_PLATDATA, enable it in
defconfig in order to reduce the SPL footprint. After applying this
setting the SPL reduction is 5 KB, which partially compensates the
increment due to DM.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Continuing with the approach in commit <addf358bac1d2bd0> rename
additional drivers to allow the OF_PLATDATA support.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After enabling OF_PLATDATA support to both MMC and GPIO drivers add the
support for card detection.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Continuing with the OF_PLATADATA support for iMX6 to reduce SPL
footprint, add it to mxc_gpio. Thanks to this, it will be possible to
enable card detection on MMC driver.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
In order to reduce the footprint of SPL by removing dtb and library
overhead, add OF_PLATDATA support to fsl_esdhc_imx. This initial
approach does not support card detection, which will be enabled after
adding OF_PLATDATA support to GPIO.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As discussed in commit <addf358bac1d2bd0> rename fsl_esdhc_imx
driver to allow the OF_PLATDATA support.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Do not execute the block device test if CONFIG_DOS_PARTITION=n.
Imply CONFIG_DOS_PARTITION in Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In our Python tests we expect to see the word "resetting". It may be
truncated if we reset before the serial console buffer is transferred.
Wait for 100 ms between the "resetting ..." message and the actual reset
like we do when powering off.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The Kconfig symbol CONFIG_STACK_SIZE is used both by ARM and Microblaze
with the same meaning. Move it to menu 'General setup' so that we can use
it for all architectures.
Use the value of CONFIG_STACK_SIZE instead of a hard coded 16 MiB value for
reserving memory in the UEFI sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Configuration variables should have the same meaning independent of the
architecture. x86 and ARM both use CONFIG_STACK_SIZE:
* x86: U-Boot's runtime stack size during reboot
* ARM: max stack size that can be used by U-Boot
Rename the x86 configuration variable to CONFIG_STACK_SIZE_REBOOT
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We recently added functions for storing/restoring variables
from a file to a memory backed buffer marked as __efi_runtime_data
commit f1f990a8c9 ("efi_loader: memory buffer for variables")
commit 5f7dcf079d ("efi_loader: UEFI variable persistence")
Using the same idea we now can support GetVariable() and GetNextVariable()
on the OP-TEE based variables as well.
So let's re-arrange the code a bit and move the commmon code for
accessing variables out of efi_variable.c. Create common functions for
reading variables from memory that both implementations can use on
run-time. Then just use those functions in the run-time variants of the
OP-TEE based EFI variable implementation and initialize the memory
buffer on ExitBootServices()
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current code does not trim the output buffer correctly.
In fact it doesn't trim the buffer at all, since it calculates a wrong
value for it, which isn't even applied.
So let's remove the unused temporary size variable and trim the buffer
correctly.
Since we are editing efi_get_next_variable_name_int(), fix an indentation
error along the way.
Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Remove superfluous conversion to (u8 *) for memcpy argument.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Fix EFI selftest to not force setting serial# environment (and also
get the U-Boot prompt dynamically).
- Support for append only environment and other related features.
- Improved ext4 environment support
- Fix the case of fw_setenv being used on flash devices that were not
already locked.
With current implementation of fw_setenv, it is always locks u-boot-env
region if lock interface is implemented for such mtd device. You can
not control lock of this region with fw_setenv, there is no option for
it in config or in application itself. Because of this situation may
happen problems like in this thread on xilinx forum:
https://forums.xilinx.com/t5/Embedded-Linux/Flash-be-locked-after-use-fw-setenv-from-user-space
/td-p/1027851
A short summary of that link is: some person has issue with some spi
chip which has lock interface but doesn't locks properly which leads to
lock of whole flash memory on lock of u-boot-env region. As resulted
solution hack was added into spi-nor.c driver for this chip with lock
disablement.
Instead fix this problem by adding logic to fw_setenv only lock the
flash if it was already locked when we attempted to use it.
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
This option marks any U-Boot variable which does not have explicit 'w'
writeable flag set as read-only. This way the environment can be locked
down and only variables explicitly configured to be writeable can ever
be changed by either 'env import', 'env set' or loading user environment
from environment storage.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add configuration option which prevents the environment hash table to be
ever cleared and reloaded with different content. This is useful in case
the first environment loaded into the hash table contains e.g. sensitive
content which must not be dropped or reloaded.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add another custom environment flag which discerns environment coming
from external storage from environment set by U-Boot itself.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add another internal environment flag which indicates that the operation
is resetting the environment to the default one. This allows the env code
to discern between import of external environment and reset to default.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
If the ENV_ACCESS_IGNORE_FORCE is set, inform user that the variable
cannot be force-set if such attempt happens.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support of opts erase for env in ext4,
this opts is used by command 'env erase'.
This command only fill the env file (CONFIG_ENV_EXT4_FILE)
with 0, the CRC and the saved environment becomes invalid.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add basic test to persistent environment in ext4:
save and load in host ext4 file 'uboot.env'.
On first execution an empty EXT4 file system is created in
persistent data dir: env.ext4.img.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add support of environment location with the new env command:
'env select' and 'env load'
The ENV backend is selected by priority order
- 0 = "nowhere" (default at boot)
- 1 = "EXT4"
To test EXT4 env support, this backend is selected by name:
> env select EXT4
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate ENV in EXT4 support in sandbox.
The sandbox behavior don't change; the default environment with
the nowhere backend (CONFIG_ENV_IS_NOWHERE)is still used:
the weak function env_get_location() return ENVL_NOWHERE for priority 0.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add the new command 'env select' to force the persistent storage
of environment, saved in gd->env_load_prio.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add the new command env load to load the environment from
the current location gd->env_load_prio.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The ops driver load becomes mandatory in struct env_drive,
change the comment for this ops and remove unnecessary test.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add the ops .load for nowhere ENV backend to load the
default environment.
This ops is needed for the command 'env load'
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Only update gd->env_load_prio in generic function env_load()
and no more in the weak function env_get_location() which is
called in many place (for example in env_driver_lookup, even
for ENVOP_SAVE operation).
This patch is a preliminary step to use env_driver_lookup()/
env_get_location() in new function env_select() without
updating gd->env_load_prio.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a missing initialization of gd->env_valid in env_ext4_load
as it is already done in some other env device.
Set gd->env_valid = ENV_VALID in env_ext4_save() and env_ext4_load().
This patch allows to have a correct information in 'env info' command.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add the absolute path to the default value of
CONFIG_ENV_EXT4_FILE = "/uboot.env".
This patch avoid the error :
Saving Environment to EXT4... File System is consistent
Please supply Absolute path
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch adds prototypes for several weak functions:
- env_ext4_get_intf
- env_ext4_get_dev_part
- env_get_location
It solves the following warnings when compiling with W=1
on stm32mp1 board:
board/st/stm32mp1/stm32mp1.c:849:19: warning: no previous prototype for 'env_get_location' [-Wmissing-prototypes]
enum env_location env_get_location(enum env_operation op, int prio)
^~~~~~~~~~~~~~~~
board/st/stm32mp1/stm32mp1.c:876:13: warning: no previous prototype for 'env_ext4_get_intf' [-Wmissing-prototypes]
const char *env_ext4_get_intf(void)
^~~~~~~~~~~~~~~~~
board/st/stm32mp1/stm32mp1.c:889:13: warning: no previous prototype for 'env_ext4_get_dev_part' [-Wmissing-prototypes]
const char *env_ext4_get_dev_part(void)
^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As part of the EFI self test we set and check the serial# variable.
However, we should not be forcing this setting. In the case where we
are allowed to change the variable it will change, and we will pass the
test. In the case where we cannot change it, force may or may not be
allowed, depending on further environment restrictions. Drop the -f
flag here as we do not need it.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
- fix SPL boot issue due to early dbgmcu_init() call
- fix SPL boot issue due to dcache memory region configuration
- add support of CONFIG_ENV_IS_IN_MMC
- add specific SD/eMMC partition for U-Boot enviromnent
- enable env in SPL
- use "env info -q" to remove log during boot
- remove env location override for dh_stm32mp1
- update management of misc_read
- check result of find_mmc_device in stm32prog
- use regulator_set_enable_if_allowed for disabling vdd supply in usbphyc
- enable CMD_ADTIMG flag to handle Android images
- device tree alignment with Linux Kernel v5.8-rc1
- remove hnp-srp-disable for usbotg on dk1
- add reset support to uart nodes on stm32mp15x
- use correct weak function name spl_board_prepare_for_linux
- use cd-gpios for ST and DHSOM boards
- add seeed studio odyssey-stm32mp157c board support
- move ethernet PHY into SoM DT
- add DHSOM based DRC02 board support
Use device tree and UCLASS_SYSCON driver to get
Generic Interrupt Controller (GIC) lpi address and
maximum GIC redistributors count.
Also update Kconfig to select REGMAP and SYSCON when
GIC_V3_ITS is enabled.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use device tree and UCLASS_IRQ driver to get following
Generic Interrupt Controller (GIC) details,
-GIC Distributor interface (GICD) base address and
-GIC Redistributors (GICR) base address.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add optee based bnxt fw load driver.
bnxt is Broadcom NetXtreme controller Ethernet card.
This driver is used to load bnxt firmware binary using OpTEE.
Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable BCM IPROC mmc driver ns3.
Enable DMA for MMC Host to have better reads and writes.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcmns3.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default relocation happens to a higher address of DDR,
i.e, DDR start + DDR size.
U-Boot shall be used to collect the ramdump.
Restrict U-Boot to use only the 16MB memory, so that this
memory can be reserved. Limit relocation to happen within
16MB memory, start 0xFF00_0000 and end 0x1_0000_0000
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add API to save boot parameters passed from BL31
Use assembly implementation of save_boot_params instead of c function.
Because generally ATF does not set up SP_EL2 on exiting.
Thus, usage of a C function immediately after exiting with no stack
setup done by ATF explicitly, may cause SP_EL2 to be not sane,
which in turn causes a crash if this boot was not lucky to get
an SP_EL2 in valid range. Replace C implementation with assembly one
which does not use stack this early, and let u-boot to set up its stack
later.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for Broadcom Northstar 3 SoC.
NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors
targeting a broad range of networking applications.
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On the UniElec U7623 board there is no external SD slot and the preloader
doesn't fill in the magic field at 0x81dffff0 to indicate that it was
booted from eMMC.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Configuration changed, mainly several "CONFIG_..." moved from
s5p4418_nanopi2.h to s5p4418_nanopi2_defconfig and USB related
configs removed because USB is not supported yet.
- s5p4418_nanopi2.h: "CONFIG_" removed from several s5p4418/nanopi2
specific defines because the appropriate values do not need to be
configurable.
- pinctrl is supported now, therefore "CONFIG_PINCTRL=y" added to
s5p4418_nanopi2_defconfig.
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-dir in arch/arm/cpu/armv7/s5p4418/.
Appropriate line in Makefile removed.
- cpu.c: '#include <cpu_func.h>' added.
- arch/arm/cpu/armv7/s5p4418/u-boot.lds removed, is not required
anylonger.
- "obj-$(CONFIG_ARCH_NEXELL) += s5p-common/" added to
arch/arm/cpu/armv7/Makefile since s5p-common/pwm.c is used instead
of drivers/pwm/pwm-nexell.c.
- s5p4418.dtsi: '#include "../../../include/generated/autoconf.h"'
removed, is not necessary, error at out-of-tree building.
'#ifdef CONFIG_CPU_NXP4330'-blocks (2x) removed. Some minor changes
regarding mmc. 'u-boot,dm-pre-reloc' added to dp0 because of added
DM_VIDEO support.
- board/s5p4418/ renamed to board/friendlyarm/
- All s5p4418-boards except nanopi2 removed because there is no
possibility to test the other boards.
- Kconfig: Changes to have a structure like mach-bcm283x (RaspberryPi),
e.g. "config ..." entries moved from/to other Kconfig.
- "CONFIG_" removed from several s5p4418/nanopi2 specific defines
because the appropriate values do not need to be configurable.
- nanopi2/board.c: All getenv(), getenv_ulong(), setenv() and saveenv()
renamed to env_get(), env_get_ulong(), env_set() and env_save(),
respectively. MACH_TYPE_S5P4418 is not defined anymore, therefore
appropriate code removed (not necessary for DT-kernels).
- nanopi2/onewire.c: All crc8() renamed to crc8_ow() because crc8() is
already defined in lib/crc8.c (with different parameters).
- dts: "nexell,s5pxx18-i2c" used instead of "i2c-gpio", i2c0 and
i2c1 added. gmac-, ehci- and dwc2otg-entries removed because the
appropriate functionality is not supported yet. New mmc-property
"mmcboost" added.
s5p4418-pinctrl.dtsi: gmac-entries removed, mmc- and i2c-entries
added.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
possible (and similar).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- nexell_display.c: Changed to DM, CONFIG_FB_ADDR can not be used
anymore because framebuffer is allocated by video_reserve() in
video-uclass.c. Therefore code changed appropriately.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
possible (and similar).
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Low level functions for DPC (Display Controller) and Makefile for all
nexell video low level functions.
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- Since drivers/pwm/pwm-nexell.c is an adapted version of
s5p-common/pwm.c an appropriately changed version of s5p-common/pwm.c
is used instead. Therefore arch/arm/mach-s5pc1xx/include/mach/pwm.h
copied to arch/arm/mach-nexell/include/mach and s5p-common/Makefile
changed appropriately.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
possible (and similar).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
- doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added.
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- driver changed to DM.
- pinctrl-driver/dt is used now instead of configuring the mmc I/O-pins
in the mmc-driver.
- nexell_dwmmc_ofdata_to_platdata() reworked, i.e. valid default values
are used now (where possible) and the appropriate if-blocks have
been removed.
- new dt-property "mmcboost" is used now instead of "CONFIG_BOOST_MMC"
which was not defined anywhere.
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
"struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
in order s5p4418 is also working.
- "probe_chip" added.
- pinctrl-driver/dt is used instead of configuring the i2c I/O-pins
in the i2c-driver.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
possible (and similar).
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- SPL not supported yet --> no spl-directory in arch/arm/mach-nexell.
Appropriate line in Makefile removed.
- clock.c: 'section(".data")' added to declaration of clk_periphs[] and
core_hz.
- Kconfig: Changes to have a structure like in mach-bcm283x/Kconfig,
e.g. "config ..." entries moved from other Kconfig.
- timer.c: 'section(".data")' added to declaration of timestamp and
lastdec.
- arch/arm/mach-nexell/serial.c removed because this is for the UARTs
of the S5P6818 SoC which is not supported yet. S5P4418 UARTs are
different, here the (existing) PL011-code is used.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
possible (and similar).
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
Some instructions in the ARM ISA have multiple output registers, such
as ldrd/ldp (load pair), where two registers are loaded from memory,
but also ldr with indexing, where the memory base register is incremented
as well when the value is loaded to the destination register.
MMIO emulation under KVM is based on using the architecturally defined
syndrome information that is provided when an exception is taken to the
hypervisor. This syndrome information describes whether the instruction
that triggered the exception is a load or a store, what the faulting
address was, and which register was the destination register.
This syndrome information can only describe one destination register, and
when the trapping instruction is one with multiple outputs, KVM throws an
error like
kvm [615929]: Data abort outside memslots with no valid syndrome info
on the host and kills the QEMU process with the following error:
U-Boot 2020.07-rc3-00208-g88bd5b179360-dirty (Jun 06 2020 - 11:59:22 +0200)
DRAM: 1 GiB
Flash: error: kvm run failed Function not implemented
R00=00000001 R01=00000040 R02=7ee0ce20 R03=00000000
R04=7ffd9eec R05=00000004 R06=7ffda3f8 R07=00000055
R08=7ffd9eec R09=7ef0ded0 R10=7ee0ce20 R11=00000000
R12=00000004 R13=7ee0cdf8 R14=00000000 R15=7ff72d08
PSR=200001d3 --C- A svc32
QEMU: Terminated
This means that, in order to run U-Boot in QEMU under KVM, we need to
avoid such instructions when accessing emulated devices. For the flash
in particular, which is a hybrid between a ROM (backed by a read-only
KVM memslot) when in array mode, and an emulated MMIO device (when in
write mode), we need to take care to only use instructions that KVM can
deal with when they trap.
So override the flash read accessors that are used when running on QEMU
under KVM. Note that the the 64-bit wide read and write accessors have
been omitted: they are never used when running under QEMU given that it
does not emulate CFI flash that supports it.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
The QEMU/mach-virt targeted port of u-boot currently only runs on
QEMU under TCG emulation, which does not model the caches at all,
and so no users can exist that are relying on the GRUB hack for
EFI boot.
We will shortly enable support for running under KVM, but the GRUB
hack (which disables all caches without doing cache cleaning by VA
during ExitBootServices()) is likely to cause more problems than it
solves, given that KVM hosts require correct maintenance if they
incorporate non-architected system caches.
So let's disable the GRUB hack by default on the QEMU/mach-virt
port.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add an override for enable_caches to enable the I and D caches, along
with the cached 1:1 mapping of all of DRAM. This is needed for running
U-Boot under virtualization with QEMU/kvm.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
QEMU's mach-virt machine only supports selecting CPU models that
implement the virtualization extensions, and are therefore guaranteed
to support LPAE as well.
Initially, QEMU would not allow emulating these CPUs running in HYP
mode (or EL2, for AArch64), but today, it also contains a complete
implementation of the virtualization extensions themselves.
This means we could be running U-Boot in HYP mode, in which case the
LPAE long descriptor page table format is the only format that is
supported. If we are not running in HYP mode, we can use either.
So let's enable CONFIG_ARMV7_LPAE for qemu_arm_defconfig so that we
get the best support for running with the MMU and caches enabled at
any privilege level.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The LPAE versions of DCACHE_WRITEBACK and DCACHE_WRITETHROUGH are currently
defined as no-allocate for both reads and writes, which deviates from the
non-LPAE definition, and mostly defeats the purpose of enabling the caches
in the first place.
So align LPAE with !LPAE, and enable allocate-on-read for both. And while
at it, add some clarification about the meaning of the chosen values.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Snapdragon SoCs and IPQ40xx use common TLMM IP,
so existing driver supports IPQ40xx as well.
So lets simply add a compatible for IPQ40xx.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
IPQ40xx and currently supported Snapdragon boards don't use the same one
so enable reading it from DT, if no DT property is found default value
is the same as the previous define.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
This introduces initial support for the popular Qualcomm
IPQ40x8 and IPQ40x9 WiSoC series.
IPQ40xx series have 4x Cortex A7 ARM-v7A cores.
Supported are: IPQ4018, IPQ4019, IPQ4028 and IPQ4029.
IPQ40x8 and IPQ40x9 use the same cores, but differ in
addressable RAM size (1GB for IPQ40x9 and 256MB for IPQ40x8)
and supported peripherals (IPQ40x8 lacks RGMII, LCD controller
and EMMC/SDHCI controllers).
IQP4028/IPQ4029 models differ from IPQ4018/IPQ4019 only
by their rated temperatures rates with IPQ402X models being
rated for wider temperature ranges.
Initially this supports:
* Simple clock driver (Only for UART1 now, will be extended)
* Pinctrl driver (Supports UARTX and GPIO now, will be extended)
* GPIOs already supported by msm_gpio driver with updates
* UARTs already supported by serial_msm driver with updates
Further peripherals will come in later patches.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The pins for the MMC controller weren't being set up correctly because the
pinctrl driver only sets the GPIO pullup/pulldown config and doesn't
handle the special cases with PUPD/R0/R1 control.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
The sgmii mode init flow is almost the same for all mediatek SoC, the
only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629
and the following chips).
Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
Adds a command 'button' that provides the list of buttons
supported by the board, and the state of a button.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Add a new uclass for button that implements two functions:
- button_get_by_label
- button_get_status
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Since commit 9ba84329dc ("sandbox, test: add test for GPIO_HOG
function"), the gpio_a 0,1,2 and 3 are used by hog in test.dts.
But 2 leds 'sandbox:red' and 'sandbox:green' are using gpio_a 0
and 1. As hog always request his gpios, the led command on both
led is broken:
=> led sandbox:red
LED 'sandbox:red' not found (err=-16)
The gpio is already requested by hog, so it can't be enabled
for led 'sandbox:red'.
This commit change the gpio used by hog to 10, 11, 12 and 13,
so the led command could be used again with 'sandbox:red' and
'sandbox:green'.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
When trying to bind to a non-existent file the following output is
displayed:
=> host bind 0 non_existent
Failed to access host backing file 'non_existent'
exit not allowed from main input shell.
The last line is quite unexpected and due to an incorrect return value.
If do_host_bind() fails, return CMD_RET_FAILURE (= 1).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With OF_CONTROL disabled the build fails for
include/dm/read.h:932:10: error: ‘ENOTSUPP’ undeclared (first use in this function)
932 | return -ENOTSUPP;
Fixes: 45224e8f26 ("dm: core: gracefully handle alias seq without of")
Signed-off-by: Dan Murphy <dmurphy@ti.com>
After latest improvements in dtoc, compatible strings are checked
against driver and driver alias list to get a valid driver name. With
this new feature the list of compatible string aliases seems not
useful any more.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
After latest improvements on OF_PLATDATA struct names are generated
based on driver name instead of compatible strings. With this in mind,
using aliases in drivers are not longer needed.
This patch removes code that tried to handle these kind of aliases to
improve readability.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently dtoc checks if the first compatible string in a dtb node
matches either a driver o driver alias name, without taking into account
any other compatible string in the list. In the case that no driver matches
the first compatible string a warning is printed and the U_BOOT_DEVICE is
not being declared correctly.
This patch adds dtoc's support for try all the compatible strings in the
dtb node, in an effort to find the correct driver.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch is about bootm process, android boot image and device tree.
Android 10 updates the boot image header to version 2,
which includes a section to store the device tree blob (DTB) image.
include/android_image.h has updated the struct andr_img_hdr,
but not used in bootm process. This patch avoid reporting
"Device tree not found or missing FDT support"
when bootm a correctly constructed android boot image.
Signed-off-by: chenshuo <chenshuo@eswin.com>
At present there is not enough space for U-Boot due to the EFI loader.
Correct this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This board does not have microcode but at present that is not supported
by Kconfig nor the binman image layout. Fix both of these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the image layout is not correct, since it uses the SDRAM
address of the 64-bit U-Boot as the ROM address. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This causes conflicts on chromebook_link64. Move it to after U-Boot where
there should be plenty of space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Now that all board use binman instead of this script, drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this board uses a custom script to produce the .its file.
Update it to use binman instead. Binman can create all the images that
are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this board uses a custom script to produce the .its file.
Update it to use binman instead. Binman can create all the images that
are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is used to run arch-specific shell scripts which produce .its
files which are used to produce FIT images. We already have binman which
is designed to produce firmware images. It is more powerful and has tests.
So this option should be deprecated and not used. Existing uses should be
migrated.
Mentions of this in code reviews over the last year or so do not seem to
have resulted in action, and things are getting worse.
So let's add a warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we use the empty string to indicate that there is no FIT
generator, but this doesn't allow an individual board to undefine it.
Create a separate bool instead.
Update the config of the boards which currently have an empty string.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this is checked before the config has been loaded by the
Makefile, so it doesn't work.
Move the check to later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On mediatek various files that need to be created by binman. It does not
make sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
This avoid sprinkling the Makefile with arch-specific code.
Also update the binman definition so that idbloader.img is only needed
when SPL is actually being used.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
On tegra various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
This avoid sprinkling the Makefile with arch-specific code.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
On sunxi various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
This avoid sprinkling the Makefile with arch-specific code.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This Kconfig is not needed anymore since U-Boot will build the ROM if the
required binary blobs exist.
The BUILD_ROM environment variable used to request that the ROM be built.
Now this always happens if the required binary blobs are available. Update
it to mean that U-Boot should fail if the ROM cannot be built. This
behaviour should be compatible with how it used to work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On x86 various files that need to be created by binman. It does not make
sense to enumerate these in the Makefile. They are described in the
configuration (devicetree) for each board and we can simply run binman
(always) to generate them.
Update the Makefile to have a separate, final step which runs binman,
once all input dependencies are present.
This avoid sprinkling the Makefile with arch-specific code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Quite a few boards using this SoC family don't use binman, yet
CONFIG_BINMAN is enabled for all of them. But the option should only be
enabled if we expect binman to produce an image. Calling binman when the
device tree is missing, etc. will cause failer.
Add a condition so that CONFIG_BINMAN is only enabled as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When binman is in use, most of the targets built by the Makefile are
inputs to binman. We then need a final rule to run binman to produce the
final outputs.
Rename the variable to indicate this, and add a new 'inputs' target.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present only the ARMv7 tegra SoCs actually use binman to create an
image. Change the config to reflect this, since otherwise running binman
will produce an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a simple binman config and enable CONFIG_HAS_ROM so that U-Boot
produces a ROM for jerry.
Change the binman image definition to support multiple images, since it
may be used to build both u-boot-rockchip.bin and u-boot.rom
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the config for chromebook_bob to support booting from SPI flash.
The existing SPL size is too small since ATF is needed, so double it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some non-x86 devices can use SPI flash to boot and need to produce images
of a fixed size to program the flash.
Add a way to handle this for non-x86 boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most x86 boards build a u-boot.rom which is programmed into SPI flash. But
this is not unique to x86. For example some rockchip boards can also boot
from SPI flash.
Also, at least on x86, binary blobs are sadly quite common. It is not
possible to build a functional image without them, and U-Boot needs to
know this at build time.
Introduce a new CONFIG_HAS_ROM option which selects whether u-boot.rom is
built and a new CONFIG_ROM_NEEDS_BLOBS option to indicate whether binary
blobs are also needed. If they are not needed, it is safe to build the ROM
always. Otherwise we still require the BUILD_ROM environment variable.
For now this affects only x86, but future patches will enable this for
rockchip too.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is interesting to note the number of builds completed per second to
track machine performance and build speed. Add a 'rate' value at the end
of the build to show this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This current fails with an error. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7664b03ffc ("buildman: Remove _of_#_ from results directory paths")
Older versions of this script don't support the -q flag. Since buildman
runs this script from when it starts, we may get the old version.
Fix this in two ways:
1. Use the version from the same tree as buildman is run from, if
available
2. Failing that, allow the -q flag to be missing
Signed-off-by: Simon Glass <sjg@chromium.org>
Linux distributions generally use the "make defconfig && make tools-all"
recipe to generate a uboot-tools (or similar) package.
This patch enables FIT cipher support in the default mkimage build.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Add an additional test to dtoc in order improve the coverage,
specifically to take into account the case of unicode error when
scanning drivers.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Done with:
./tools/moveconfig.py -S SPL_LOAD_FIT_ADDRESS
./tools/moveconfig.py -S SPL_LOAD_FIT_ADDRESS -H
Signed-off-by: Peng Fan <peng.fan@nxp.com>
[trini: A few more migrations]
Signed-off-by: Tom Rini <trini@konsulko.com>
BOOTP_DEFAULT is defined in several boards, but this config
option is never checked or used.
This patch removes this config option from config files and
the whitelist.txt
Signed-off-by: Adam Ford <aford173@gmail.com>
This converts the following to Kconfig:
CONFIG_SPL_NAND_DRIVERS
CONFIG_SPL_NAND_ECC
CONFIG_SPL_NAND_SIMPLE
Signed-off-by: Adam Ford <aford173@gmail.com>
This converts the following to Kconfig:
CONFIG_ENV_OVERWRITE
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rerun migration, remove some comments]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add DT for DH DRC02 unit, which is a universal controller device.
The system has two ethernet ports, two CANs, RS485 and RS232, USB,
capacitive buttons and an OLED display.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
This commit adds device tree files supporting
SBC from Seeed Studio based on STM32MP157C.
This works with generic stm32mp1 config.
Right now only booting from SD card is supported.
Signed-off-by: Marcin Sloniewski <marcin.sloniewski@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Since commit f13ff88b61 ("gpio: stm32: add ops set_dir_flags")
the gpio flags are supported by stm32 pinctrl driver.
The cd-gpios is correctly handle in U-Boot and the patch on the
device tree can be removed.
This reverts commit 792919241b.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Since commit f13ff88b61 ("gpio: stm32: add ops set_dir_flags")
the gpio flags are supported by stm32 pinctrl driver.
The cd-gpios is correctly handle in U-Boot and the patch on the
device tree can be removed.
This reverts commit 3c2e2a1a79.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Replace the function spl_board_prepare_for_boot_linux by the correct
name of the weak function spl_board_prepare_for_linux defined in spl.h.
This patch avoids warning with W=1 option:
u-boot/arch/arm/mach-stm32mp/spl.c:150:6:
warning: no previous prototype for ‘spl_board_prepare_for_boot_linux’
[-Wmissing-prototypes]
Fixes: dc7e5f190d ("arm: stm32mp: activate data cache on DDR in SPL")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
STM32 serial IP can be reset via reset controller.
Add the support of reset to uart nodes on stm32mp15-u-boot.dtsi,
the ad-dons file for U-Boot.
This patch fix issues when previous UART configuration, for example
done in TF-A or ROM code, is not handled in U-Boot stm32 serial driver
init.
This reset property won't be not added in Linux kernel device tree
as this reset is not used in Linux STM32 serial driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Remove hnp-srp-disable for usbotg node because this feature is only needed
for usbotg in HOST mode (in drivers/usb/host/dwc2.c)
and this feature is not activated in stm32mp15 U-Boot
(stm32mp15_basic_defconfig and stm32mp15_trusted_defconfig);
only the device mode is activated and OTG is not supported in DWC2 driver.
This patch reduces the difference between U-Boot and Linux kernel
device-tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
DT alignment with Linux kernel v5.8-rc1 for the STM32MP15x soc
device tree files and the STMicroelectronics boards device tree files.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Alignment with pins name used in Linux kernel v5.8.
It is a preleminary step for device tree alignment.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate the support of the command adtimg to handle android images.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while disabling vdd supply. This way the driver doesn't see an error
when disabling an always-on regulator.
This patch is needed since the commit f93fab3126 ("Revert 'power:
regulator: Return success on attempt to disable an always-on regulator'")
and use the API introduced by commit cc4a224af2 ("power: regulator:
Introduce regulator_set_enable_if_allowed api").
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Check result of find_mmc_device() before calling mmc_init().
This patch avoid a data abort when the command try to acces
to sd/mmc device deactivated in device tree.
Fixes: aff4c5dd82 ("stm32mp: stm32prog: add MMC device")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Update management of misc_read, which now return length of data
after the commit 8729b1ae2c ("misc: Update read() and write()
methods to return bytes xfered")
Fixes: 8b8b3d6b55 ("stm32mp1: board: add environment variable for board id and board rev")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Overriding the environment location is not necessary as the defconfig
for the relevant boards only enable SPI flash and nowhere sources which
are in the same order per default but having this explicit override
prevents using eMMC or SD card (or EXT4) as environment source.
Signed-off-by: Jakob Riepler <jakob.riepler@aviloo.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate the new option -q in command "env info"
to avoid unnecessary trace during boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate env config in SPL with CONFIG_SPL_ENV_SUPPORT
and use CONFIG_IS_ENABLED macro to test the activated
CONFIG_$(SPL_)ENV_IS_IN_... in env_get_location.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Save the environment at the end of the U-Boot partition, the GPT
partition named "ssbl" in SD card or eMMC and avoid requirements
on the "bootfs" file system generated via specific raw tools
(like wic and genimage).
With the previous configuration of the U-Boot environment saved in ext4
file, U-Boot need to create/modify the file uenv.txt in the ext4 file
system; so this EXT4 file system need to be generated without some
functionality, like metadata_csum and dir_index, because they are not
supported by U-Boot.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add support of CONFIG_ENV_IS_IN_MMC in env_get_location, used for
all mmc device (SD card and eMMC).
The 2 configs CONFIG_ENV_IS_IN_MMC and CONFIG_ENV_IS_IN_EXT4 are
incompatible.
Add the weak function mmc_get_env_dev to select the mmc boot instance.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Since commit d877f8fd0f ("arm: provide a function for boards init
code to modify MMU virtual-physical map") the parameter of
mmu_set_region_dcache_behaviour need to be MMU_SECTION_SIZE
aligned.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
As the dbgmcu_init use the function bsec_dbgswenable which is based
on the DM and DT, its call can't be done before the spl is initialized
(driver model, DT and malloc) in board_init_f::spl_early_init().
This function call is moved later in spl_board_init().
Fixes: bd3f60d29c ("arm: stm32mp: protect DBGMCU_IDC access with BSEC")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Recent CI failures were seen [1] when building MSYS2 Windows host
tools. The error messages are something like:
downloading mingw32.db...
downloading mingw32.db.sig...
error: mingw32: key "4A6129F4E4B84AE46ED7F635628F528CF3053E04" is unknown
error: mingw32: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
error: failed to update mingw32 (invalid or corrupted database (PGP signature))
Per the MSYS2 official news [2], this was caused by a packager
switch and several solutions were suggested, e.g.: a new package
of msys2-keyring and a new msys2 installer that includes them are
released. However right now we have been using the MSYS2 github
CI base repo [3] for the MSYS2 build in U-Boot, but per the project
information on the github webpage, it says: "This repository is
unused/deprecated and will be remove after 2021-01-01". Since it is
unmaintained it's unlikely the new PGP keys will be included in the
git repo, and the only choice is to switch to use the MSYS2 official
installer as the CI base instead.
[1] https://dev.azure.com/u-boot/u-boot/_build/results?buildId=975
[2] https://www.msys2.org/news/#2020-06-29-new-packagers
[3] https://github.com/msys2/msys2-ci-base
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Package 'flex' is needed when building the U-Boot host tool, but
is currently missing in the build dependency in the CI pipeline.
This is to prepare switching to an installer based CI build.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This simplifies things a bit to just use a login shell everywhere.
This keeps in sync with MSYS2 upstream commit:
9d11b7f0aa93 ("azure-pipelines: simplify things a bit").
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
- Bug fixes and updates on ls2088a,ls1028a, ls1046a, ls1043a, ls1012a
- lx2-watchdog support
- layerscape: pci-endpoint support, spin table relocation fixes and
cleanups
- fsl-crypto: RNG support and bug fixes
With OF_CONTROL disabled the build fails for
include/dm/read.h:932:10: error: ‘ENOTSUPP’ undeclared (first use in this function)
932 | return -ENOTSUPP;
Fixes: 45224e8f26 ("dm: core: gracefully handle alias seq without of")
Signed-off-by: Dan Murphy <dmurphy@ti.com>
With the migration to python3 for all of our tests, we need to install
pyelftools via pip now rather than the system tools as they will
otherwise not be present in our virtualenv.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Changes in v2: Switch to pip
This checks and handles RX errors on the Amlogic UART controller
after experiencing errors on the Khadas VIM3 & VIM3L when UART AO A
lines are not connected.
When the RX line is not connected, the first byte is erroneous and breaks
the U-Boot autoboot, breaking automatic boot.
This checks and drops any erroneous RX byte on pending and getc callbacks
to avoid returning true to pending when an error byte is in the FIFO.
Fixes: bfcef28ae4 ("arm: add initial support for Amlogic Meson and ODROID-C2")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Guillaume La Roque <glaroque@baylibre.com>
- Assorted environment fixes.
- Enhance environment in MMC and controlled via OF_CONTROL
- Allow for environment in FAT to use the same device we boot from
rather than be hard-coded.
Checkpatch reports the following issue:
ERROR: space prohibited before that ',' (ctx:WxW)
#936: FILE: arch/arm/mach-imx/imx8m/soc.c:936:
+ 0, 0 , 0, 0, 0, 0, &res);
Remove the unneeded space.
^
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Currently checkpatch is not happy about this file:
total: 14 errors, 2 warnings, 7 checks, 359 lines checked
Improve the coding style so that it can now report:
total: 0 errors, 0 warnings, 6 checks, 360 lines checked
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
1. Configure white on black for video console.
2. Enable printing bmp logo during late board init stage.
3. Use iomux configuration from device tree.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
1. Show boot logo embed in U-Boot blob.
2. Drop iomux configration for LCD, and use the one provided in device
tree.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
This introduces support for EEPROM as a storage for the main Toradex
config block and additional config blocks on extra EEPROM chips (on
carrier board or video adapters).
To enable EEPROM as a storage for the main config block:
TDX_HAVE_EEPROM=y.
For additional EEPROMs please enable this Kconfig symbol:
TDX_CFG_BLOCK_EXTRA=y.
Information about existing EEPROM chips is provided via Device Tree
using aliases.
You can also write configuration for the carrier board using
create_carrier subcommand for cfgblock. Example:
Verdin iMX8MM # cfgblock create_carrier
Supported carrier boards:
UNKNOWN CARRIER = [0]
Verdin Carrier Board = [1]
Choose your carrier board (provide ID): 1
Enter carrier board version (e.g. V1.1B): V1.0A
Enter carrier board serial number: 10622780
Also with barcode:
Verdin iMX8MM # cfgblock create carrier -y 0156100010622780
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
According to i.MX 7Solo Applications Processor Reference Manual,
2.1.3 Cortex-M4 Memory Map, M4 can address only 1536MB of DDRC
(Start Address: 0x8000_0000; End Address: 0xDFFF_FFFF).
Correct DDRC size to 0x60000000.
Fixes: c0f037f6("mach-imx: bootaux: elf firmware support")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
According to Server Base System Architecture (SBSA) specification,
the SBSA Generic Watchdog has two stage timeouts: the first signal
(WS0) is for alerting the system by interrupt, the second one (WS1) is a
real hardware reset.
More details about the hardware specification of this device:
ARM DEN0029B - Server Base System Architecture (SBSA)
This driver can operate ARM SBSA Generic Watchdog as a single stage
In the single stage mode, when the timeout is reached, your system
will be reset by WS1. The first signal (WS0) is ignored.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add Root Complex and Endpoint mode specific config entries, such that
it's feasible to enable the RC and/or EP mode driver indepently.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Due to the ls2085a and ls2080a use different way to set the BAR size,
so add the BAR size init code here.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the multiple function support for Layerscape platform, some PEXs
of Layerscaple platform have more than one PF.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Some EP deivces need to initialize before RC scan it, e.g. NXP
layerscape platform, so add the init function in pci_ep uclass.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Split the RC and EP driver, and reimplement the EP driver base on
the EP framework.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
lx2160a rev2 requires 4KB space for type0 and 4KB
space for type1 iATU window. Increase configuration
size to 8KB to have sufficient space for type0
and type1 window.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
- Drop ifdef CONFIG_SYS_I2C to initialize
baudrate of i2c
- Drop warning of i2c_early_init_f as follows,
warning: implicit declaration of function 'i2c_early_init_f'; did you
mean 'arch_early_init_r'? [-Wimplicit-function-declaration]
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable secure system counter in board_early_init_f for udelay()
to fix a bug that always return 0 by timer_read_counter()
when boot from qspi(No TFA)
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
- Drop ifdef CONFIG_SYS_I2C to initialize
baudrate of i2c
- Drop warning of i2c_early_init_f as follows,
warning: implicit declaration of function 'i2c_early_init_f'; did you
mean 'arch_early_init_r'? [-Wimplicit-function-declaration]
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable secure system counter in board_early_init_f for udelay()
to fix a bug that always return 0 by timer_read_counter()
when boot from qspi(No TFA)
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Move i2c_early_init_f to common function
to initialize baudrate of i2c
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Register the random number generator with the rng subsystem in u-boot.
This way it can be used by EFI as well as for the 'rng' command.
Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If it is already instantiated tear it down first and then reinstanciate
it again with prediction resistance.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The secure keys (TDKEK, JDKEK, TDSK) can only be generated once after a
POR. Otherwise the RNG4 will throw an error.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Since Era 10, the version registers changed. Add the version registers
and use them on newer modules.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Align the status line with all the other output in U-Boot.
Before the change:
DDR 3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT: Started with servicing (60s timeout)
After the change:
DDR 3.9 GiB (DDR3, 32-bit, CL=11, ECC on)
SEC0: RNG instantiated
WDT: Started with servicing (60s timeout)
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The value 0 assigned to final is overwritten before ever being used.
Remove the assignment.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The sequence of arguments should match the format string.
For printing unsigned numbers we should use %u.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The workaround has been implemented in PBI phase, so remove
the duplicated implementation from U-Boot.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Previous attempt to increase CONFIG_SYS_MALLOC_LEN was done in commit
c084a8edf4 ("configs: ls1012a: Increase CONFIG_SYS_MALLOC_LEN size")
which increased malloc memory to ~1M.
PFE firmware alone requires 3M of dynamic memory allocation and
therefore, increase the config value to a larger value i.e 5M. This size
should be enough as of now to accommodate further memory requirements.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add support for SDHC adapter identification and configuration
during board init.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The eSDHC adapter card identification and multiplexing configuration
through FPGA had been implemented in both common mmc driver and
fsl_esdhc driver. However it is proper to move these code to board
files and do it during board initialization. The FPGA registers are
also board specific.
This patch is to move eSDHC adapter card identification and
multiplexing configuration from mmc driver to specific board files.
And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[Rebased, Removed T1040QDS change as board does not exist]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The sdhc_adapter of global data has not been used, and we
do not have to use it as global data even we may need it
in the future.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add xspi boot source to qixis command to let the soc boot from
flex-nor flash chip.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The correct setting for the RGMII ports on LS1012ARDB is to
enable delay on both Rx and Tx so the interface mode used should
be PHY_INTERFACE_MODE_RGMII_ID
Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
Signed-off-by: Anji J <anji.jagarlmudi@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Remove "fdt_high" environment variable to use the bootm_size
to safely contain a kernel, device tree and initrd for
relocation.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On aarch64 running with dcache off, will result in an unaligned access
exception:
=> dcache off
=> hash sha1 $kernel_addr_r 100
"Synchronous Abort" handler, esr 0x96000061
elr: 00000000960317d8 lr : 00000000960316a4 (reloc)
elr: 00000000fbd787d8 lr : 00000000fbd786a4
[..]
The compiler emits a "stur x1, [x0, #12]". x1 is might just be 32 bit
aligned pointer. Remove the unused u64 element from the union to drop
the minimal alignment to 32 bit. Also remove the union, because it is
no more needed.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This enables SYS_I2C_MXC to fix a bug that
failed to boot from sd card with
image u-boot-with-spl-pbl.bin
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There are two issues:
(1) The spin table doesn't convert the endianness of the jump address.
Although there is code for it, the result isn't used at all (x0).
(2) If something goes wrong, the function returns. But that doesn't
make sense at all.
Use the actual converted jump address as destination to fix. If
there is an error, jump to a trap loop. And rearrange the code exception
level switching code to make it smaller and clearer.
This reduces the size of the spin table code section from 696 bytes to
424 bytes. If CONFIG_ARMV8_SWITCH_TO_EL1 the code size reduced from 696
bytes to 632 bytes.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
On ARM64, a 64kb region is reserved for the runtime services code.
Unfortunately, this code overlaps with the spin table code, which also
needs to be reserved. Thus now that the code is relocatable, allocate a
new page from EFI, copy the spin table code into it, update any pointers
to the old region and the start the secondary CPUs.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add a new variable secondary_boot_code_start, which holds a pointer to
the start of the spin table code. This will help to relocate the code
section. While at it, move the size variable from the end to the
beginning so there is a common section for the variables. Remove any
other symbols.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Now that the spin table is in a separate module, this is no longer
necessary. Drop it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This function is not used outside the module. Make it static.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
There is no need to cast around. Assign the address to the local
variable and use it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Only the PowerPC architecture needs this function. Remove it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix the alignment so it will match the comments. The spin table has to
be 8 byte aligned, so ".align 3" is enough.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Don't use LDR to load a pointer to a function. This will generate a
literal which cannot be relocated. Use ADR which is PC-relative and
therefore can easily be relocated.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Move it out of lowlevel.S into spintable.S. On layerscape, the secondary
CPUs are brought up in main u-boot. This will make it possible to only
compile the spin table code for the main u-boot and omit it in SPL.
This saves about 720 bytes in the SPL.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The generic armv8 code already has support to bring up the secondary
cores. Thus, don't hardcode the jump in the layerscape lowlevel_init to
the spin table code; instead just return early and let the common armv8
code handle the jump. This way we can actually use the CPU_RELEASE_ADDR
feature.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased, Removed kontron_sl28.h change as file does not exist]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Make the print of the starting address a debug output and pretty print
the info about online cores.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Spin tables are broken with bootefi. This is because - in contrast to
the booti call chain - there is no call to smp_kick_all_cpus(). Due to
this missing call the secondary CPUs are never released from their "wait
for interrupt state", see secondary_boot_func() in lowlevel.S.
Originally, this "wait for interrupt" is there to make sure, the spin
table is cleared before the secondary cores read it for the first time.
But the boot flow for the layerscape architecture is different from
that. The CPUs are release from their BootROM _after_ U-Boot's
spin-table is cleared, see fsl_layerscape_wake_seconday_cores() in mp.c.
Thus, there is no need to wait for this interrupt and no need for
kicking all cores on cpu_release. An atomic 64bit write to the
spin-table and a "sev" is sufficient.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Current PFE firmware access spi-nor memory directly. New spi-mem
framework does not support direct memory access. So, let's use
spi_flash_read API to access memory instead of directly using it.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LS1088A-RDB has MMC, SCSI, DHCP as boot targets,
but the USB support was missing.
Add support for USB as Boot_targets_devices.
Signed-off-by: Era Tiwari <era.tiwari@nxp.com>
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
CONFIG_FSL_LAYERSCAPE is available in kconfig. There is no need to
define it per board; the ls1028a_common.h is really board dependent and
only fits to the NXP eval boards. Instead select CONFIG_FSL_LAYERSCAPE
when ARCH_LS1028A is selected.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Communication with some SPI slaves just won't cut it if these delays
(before the beginning, and after the end of a transfer) are not added to
the Chip Select signal.
These are a straight copy from Linux:
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
drivers/spi/spi-fsl-dspi.c
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
With the change to absolute imports the concurrent tests feature
unfortunately broke. Fix it.
We cannot easy add a warning, since the output messes up tests which check
the output.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present testPackX86RomMeNoDesc removes the contents of the
descriptor.bin file and testPackX86RomMeMissingDesc removes the file
completely.
If a test that relies on this file happens to run after it is removed, it
will not work. Since we have no control over the selecting of tests that
run in parallel and series, we must avoid changing the files.
Update this tests to use separate files instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Manage 2 copy at the end of the partition selected by config
"u-boot,mmc-env-partition" to save the U-Boot environment,
with CONFIG_ENV_SIZE and 2*CONFIG_ENV_SIZE offset.
This patch allows to support redundancy (CONFIG_ENV_OFFSET_REDUND).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The output of the function mmc_offset_try_partition must be a
byte offset in mmc and not a multiple of blksz.
This function is used in mmc_offset(), called by mmc_get_env_addr()
and the offset is used in write_env(), erase_env() and read_env().
In these function, blk_start = offset / mmc->read_bl_len
or /write_bl_len so this offset is not a multiple of blksz.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Use the weak function mmc_get_env_dev in mmc_offset_try_partition
function to allow dynamic selection of mmc device to use
and no more use directly the define CONFIG_SYS_MMC_ENV_DEV.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a pytest for testing the env info sub-command:
test_env_info: test command with several option that
can be executed on real hardware device without assumption
test_env_info_sandbox: test the result on sandbox
with a known ENV configuration: ready & default & persistent
The quiet option '-q' is used for support in shell test;
for example:
if env info -p -d -q; then env save; fi
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Enable support for sub command 'env info' in sandbox
with CONFIG_CMD_NVEDIT_INFO. This is aimed primarily
at adding unit test.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Check the current ENV location, dynamically provided by the weak
function env_get_location to be sure that the environment can be
persistent.
The compilation flag ENV_IS_IN_DEVICE is not enough when the board
dynamically select the available storage location (according boot
device for example).
This patch solves issue for stm32mp1 platform, when the boot device
is USB.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The "env info" can be use for test with -d and -p parameter,
in scripting case the output of the command is not needed.
This patch allows to deactivate this output with a new option "-q".
For example, we can save the environment if default
environment is used and persistent storage is managed with:
if env info -p -d -q; then env save; fi
Without the quiet option, I have the unnecessary traces
First boot:
Default environment is used
Environment can be persisted
Saving Environment to EXT4... File System is consistent
Next boot:
Environment was loaded from persistent storage
Environment can be persisted
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add trace in env save to indicate any errors to end user and avoid
silent output when the command 'env save' is not executed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Correct the overflow check of the bit-field env_has_init with
the max value of env_location= ENVL_COUNT and no more with the
size of env_locations.
This bit-field is indexed by this enumerate and not by the position in
the env_locations (only used in env_get_location) and the
2 values are different, depending of thea ctivated CONFIG_ENV_IS_ options.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
I don't want to have to specify the device; only the partition.
This allows me to use the same image on internal eMMC or SD card for
Banana Pi R2, and it finds its own environment either way.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
[trini: Add #if/#else/#endif logic around CONFIG_SYS_MMC_ENV_DEV usage,
whitespace changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.
To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/
The semantic patch that makes this change is as follows:
<smpl>
@@
expression dev;
@@
-devfdt_get_addr(dev)
+dev_read_addr(dev)
</smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.
One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:
priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
if (!priv->regs)
return -EINVAL;
devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.
dev_read_addr_ptr() returns NULL on error, so this error check
will work.
I generated this commit by the following command:
$ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'
I manually fixed drivers/usb/host/ehci-mx6.c
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, fdt_fixup_mtdparts() only checks the compatible property.
It is pointless to fix up the disabled node.
Skip the node if it has the property:
status = "disabled"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Platform code can call fdt_fixup_mtdparts() in order to hand U-Boot's
MTD partitions over to the Linux device tree.
Currently, fdt_fixup_mtdparts() calls mtdparts_init() in its entry.
If no target MTD device is found, an error message like follows is
displayed:
Device nand0 not found!
This occurs when the same code (e.g. arch/arm/mach-uniphier/fdt-fixup.c)
is shared among several boards, but not all of them support an MTD device.
Parse the DT first, then call mtdparts_init() only when the target MTD
node is found.
Yet, you still need to call mtdparts_init() before device_find().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Running 'ut dm' on the sandbox without -D or -d results in segmentation
faults due to NULL pointer dereferences.
Check that device pointers are non-NULL before using them.
Use ut_assertnonnull() for pointers instead of ut_assert().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Philippe Reynes <philippe.reynes@softathome.com>
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add a sandbox SOC driver, and some tests for the SOC uclass.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.
This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add a new documentation file for UCLASS_SOC and its usage to describe
the SoC Device ID framework that allows SoC identification and device
data matching.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The user can either count the number of patches, or provide a
tracking branch.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Setting sendemail.suppresscc to all or cccmd leads to --cc-cmd
parameter being ignored, and emails going either nowhere, or
just to the To: line maintainer.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The commit 361377dbdb ("ARM: rmobile: Merge prior-stage firmware DT
fragment into U-Boot DT on Gen3") reverted changes introduced by commit
175f502734 ("ARM: renesas: Configure DRAM size from ATF DT fragment")
that's why there is no reason to use functions with _fdt() suffix because
parameter is gd->fdt_blob as is already for functions without _fdt()
suffix.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The unsupported Commit-xxx option are silently skipped
and removed as 're_remove=Commit-\w*', this patch adds
warning message in this case to detect misspelled issue
for the 2 supported options:
Commit-notes:
Commit-changes:
For example: the final 's' is missing (Commit-note:)
NB: no issue for Series-xxx option as only the supported
options are accepted (see valid_series in series.py)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The function fdt_find_regions look in the exclude list for each
property, even if the name is NULL. It could happen if the fit
image is corrupted. On sandbox, it generates a segfault.
To avoid this issue, if the name of a property is NULL, we report
an error and avoid looking in the exclude list.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Detect unexpected 'END' line when a section is not detected.
This patch detect issue when tag name for section start is misspelled,
for example 'Commit-note:' for 'Commit-notes:'
Commit-note:
....
END
Then 'Commit-note:' is removed silently by re_remove = "Commit-\w*:"
but 'END' is kept in commit message.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.
Signed-off-by: Simon Glass <sjg@chromium.org>
FIT (Flat Image Tree) is the main image format used by U-Boot. In some
cases scripts are used to create FITs within the U-Boot build system. This
is not ideal for various reasons:
- Each architecture has its own slightly different script
- There are no tests
- Some are written in shell, some in Python
To help address this, add support for FIT generation to binman. This works
by putting the FIT source directly in the binman definition, with the
ability to adjust parameters, etc. The contents of each FIT image come
from sub-entries of the image, as is normal with binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a method for adding a property containing arbitrary bytes. Make sure
that the tree can expand as needed in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally the FIT timestamp is created the first time mkimage is run on a
FIT, when converting the source .its to the binary .fit file. This
corresponds to using the -f flag. But if the original input to mkimage is
a binary file (already compiled) then the timestamp is assumed to have
been set previously.
Add a -t flag to allow setting the timestamp in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some binary blobs unfortunately obtain their position in the image from
other binary blobs, such as Intel's 'descriptor'. In this case we cannot
rely on packing to work. It is not possible to produce a valid image in
any case, due to the missing blobs.
Allow zero-length overlaps so that this does not cause any problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When warnings and errors are produced by tools they should be written to
stderr. Update the tout implementation to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sometimes it is useful to build an image even though external binaries are
not present. This allows the build system to continue to function without
these files, albeit not producing valid images.
U-Boot does with with ATF (ARM Trusted Firmware) today.
Add a new flag to binman to request this behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Many of the existing blobs rely on external binaries which may not be
available. Move them over to use blob_ext to indicate this.
Unfortunately cros-ec-rw cannot use this class because it inherits
another. So set the 'external' value for that class.
While we are here, drop the import of Entry since it is not used (and
pylint3 complains).
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to distinguish between ordinary blobs such as
u-boot.bin and external blobs that cannot be build by the U-Boot build
system. If the external blobs are not available for some reason, then we
know that a value image cannot be built.
Introduce a new 'blob-ext' entry type for that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is easier and less error-prone to use super() when the parent type is
needed. Update binman to remove the type names.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Beacon EmbeddedWorks kit is based on the R8A774A1 SoC also
known as the RZ/G2M.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.
Signed-off-by: Adam Ford <aford173@gmail.com>
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Split the RX data check from the rest of the RX function, so that
the check can be performed separately from the processing of the
packet and the release of the received packet once the processing
is finished.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the phys_to_bus() macros and calling that dev, we
can substitute dev with udevice when DM support lands and do minor
adjustment to the macros to support both DM and non-DM operation.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
This patch replaces the various uses of struct eth_device for accessing
device private data with struct dc2114x_priv, which is compatible both
with DM and non-DM operation.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
The current dc21x4x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
The r8a774a1 is compatible with the generic rcar-gen3-sdhi controller.
This patch adds the compatibilty flag, to support the SDHI controller.
Signed-off-by: Adam Ford <aford173@gmail.com>
The PFC tables for the R8A774A1 are already available, but they
not enabled.
This patch adds the Kconfig option and builds the corresponding file
when PINCTRL_PFC_R8A774A1 is enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
This sync's the clock tables with the official release from
Linux 5.8-RC2 and update r8a774a1_mstp_table from Ref Manual
v1.00.
Signed-off-by: Adam Ford <aford173@gmail.com>
This patch imports the device tree and required bindings to permit
the device tree to build for the R8Z774A1 (RZ/G2M).
Signed-off-by: Adam Ford <aford173@gmail.com>
In order to build boards based on the R8A774A1, there needs to
be a config option from which to enable other drivers and/or flags
for this SoC.
Signed-off-by: Adam Ford <aford173@gmail.com>
If the pylibfdt shared-object file is detected, then Python assumes that
the libfdt.py file exists also.
Sometimes when an incremental build aborts, the shared-object file is
built but the libfdt.py is not. The only way out at this point is to use
'make mkproper', or similar.
Fix this by removing the .so file before it is built. This seems to make
Python rebuild everything.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As a first step to integrating mkimage into binman, add a new entry type
that feeds data into mkimage for processing and incorporates that output
into the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
When binman is run from 'make check' it is given a toolpath so that the
latest tools (e.g. mkimage) are used. When run manually with no toolpath,
it relies on the system mkimage. But this may be missing or old.
Make some effort to find the built-from-soruce version by looking in the
current directory and in the builds created by 'make check'.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman's test coverage runs without a toolpath set. This means
that the system tools will be used. That may not be correct if they are
out of date or missing and this can result in a reduction in test coverage
below 100%.
Provide the toolpath to binman in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that binman uses tools/ as its base directory for importing modules,
the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new
path.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present binman outputs errors to stdout which means that fails are
effectively silent when printed by buildman, for example. Fix this by
outputing errors to stderr.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These can appear when moving between branches that have different tools
in the tree. Ignore them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Most users don't want to see traceback errors. Add an option to enable
them for debugging. Disable them by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Collect response tags such as 'Reviewed-by' while parsing the stream.
This allows us to see what tags are present.
Add a new 'Fixes' tag also, since this is now quite common.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present all text is marked bright, which makes it stand out on the
terminal. Add a way to disable that, as is done with the Color class.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use --test to indicate that tests should be run. It is
better to use a subcommand for list, like binman. Change it and adjust
the existing code to fit under a 'send' subcommand, the default.
Give this subcommand the same default arguments as the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present patman only does one thing so does not have any comments. We
want to add a few more command, so create a sub-parser for the default
command ('send').
Signed-off-by: Simon Glass <sjg@chromium.org>
The -s option allows skipping patches at the top of the branch. Sometimes
there are commits at the bottom that need to be skipped. At present it is
necessary to count the number of commits and then use -c to tell patman
how many to process.
Add a -e option to easily skip a number of commits at the bottom of the
branch.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is convenient to use gitpython to create a real git repo for testing
patman's operation. Add a test for this. So far it just checks that patman
produces the right number of patches for a branch.
Signed-off-by: Simon Glass <sjg@chromium.org>
To make testing easier, move the code out from main into a separate
'control' module and split it into four parts: setup, preparing patches,
checking patches and emailing patches.
Add comments and fix a few code-style issues while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Fix SiFive HiFive Unleashed board booting failure problem.
- Enable SiFive fu540 PWM driver.
- Support SiFive fu540: SPI boot.
- Update OpenSBI used for RISC-V CI testing.
- Revert "riscv: Allow use of reset drivers".
- Revert "Revert "riscv: sifive: fu540: Add gpio-restart support"".
- sysreset: syscon:
- Don't assume default value for offset and mask property.
- Support value property.
- qemu: Add syscon reboot and poweroff support.
- Fix SIFIVE debug serial dependency.
- Fix linking error when building u-boot-spl with no SMP support.
- AE350 use fdtdec_get_addr_size_auto_noparent to parse smc reg.
- Make memory node available to SPL in hifive-unleashed-a00-u-boot.dtsi
- SiFive fu540 avoid using hardcoded ram base and size.
At present the SiFive FU540 RAM driver uses hard-coded memory base
address and size to initialize the DDR controller. This may not be
true when this driver is used on another board based on FU540.
Update the driver to read the memory information from DT and use
that during the initialization.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Make memory node available to SPL in prepration to updates to SiFive
DDR RAM driver to read memory information from DT.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Use fdtdec_get_addr_size_auto_noparent to read the "reg" property
instead of fdtdec_get_addr. This will increase the compatibility
of dtb parsing.
Signed-off-by: Rick Chen <rick@andestech.com>
Acked-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
Switch off SMP support when building u-boot-spl would cause linking error as follow:
undefined reference to 'secondary hart relocate' and 'smp_call_function'.
Add macro to wrap up proper code region that needs SMP configuration on.
Signed-off by: Leo Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Reviewed-by: Bin Meng <bin.meng@windriver.com>
The commit 4cc24aeaf4 ("serial: Add missing Kconfig dependencies for
debug consoles") has added incorrect dependency for SIFIVE debug uart which
should depend on SIFIVE driver instead of PL01x.
Fixes: 4cc24aeaf4 ("serial: Add missing Kconfig dependencies for debug consoles")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Per the DT binding, <mask> and <value> property can have either one
or both, and if <value> is missing, <mask> should be used, which is
what current U-Boot sysreset_syscon driver supports.
This adds support to the <value> property to the driver, and <mask>
semantics is updated to really be a mask to the value if both exist.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Per the DT binding, <offset> is a required property. Let's abort
the probe if it is missing. For the <mask> property, current codes
assume a default value of zero, which is not correct either.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
This reverts commit 23da3c682a.
Now the build failure of sifive_fu540_defconfig board has been fixed,
revert this "revert patch".
Signed-off-by: Bin Meng <bin.meng@windriver.com>
This reverts commit 958a3f464c.
A more appropriate change below is already in mainline.
Commit fd31e4fd18 ("riscv: Do not build reset.c if SYSRESET is on")
Revert this patch, so that U-Boot can be built successfully for
SiFive Fu540 board.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Change to use OpenSBI release v0.8 generic platform images for QEMU
RISC-V CI testing for azure, gitlab and travis-ci.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable SPI flash(SF) distro boot command in Sifive FU540.
This distro boot will read the boot script at specific
location at the flash and start sourcing the same.
Included the SF device at the last of the target devices
list since all the rest of the devices on the list have
more possibility to boot the distribution due to the
size of the SPI flash is concern.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
HiFive-Unleashed-A00 has SPI flash with 32MiB size.
So, let's use the script offset at the end of 4K.
This way it cannot overlap any offsets being used
by software components in flash layout.
So, SF distrocmd will pick the script at desired
script address and run.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Commit 40686c394e ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.
The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_init_ipi(). At that time the timer register
base (e.g.: the SiFive CLINT device in this case) is unknown yet.
It might be the name riscv_init_ipi() that misleads people to only
consider it is related to IPI, but in fact the timer capability is
provided by the same SiFive CLINT device that provides the IPI.
Timer capability is needed for both UP and SMP.
Considering that the original refactor does have benefits, that it
makes the IPI code more similar to U-Boot initialization idioms.
It also removes some quite ugly macros. Let's do the minimal revert
instead of a complete revert, plus a fixes to arch_cpu_init_dm() to
consider the SPL case.
Fixes: 40686c394e ("riscv: Clean up IPI initialization code")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Leo Liang <ycliang@andestech.com>
Pull request for UEFI sub-system for efi-2020-10-rc1 (5)
The series provides bug fixes for:
* crash in OS when accessing UEFI variables
* returning from UEFI fit images to U-Boot
* error handling for variable services provided by OP-TEE
* error handling in EFI_FILE_PROTOCOL.Read()
* missing function documentation
The first patches needed to use intermediate certificates for
secure boot are added. (The rest of the series requires
updating sbsigntool in our CI systems.)
Logging is enabled in the bootefi command.
- New rk3326 board: Hardkernel Odroid Go2;
- Update board config and dts for RockPI 4/N8/N10;
- Update led boot on support for roc-rk3399-pc;
- Enable SPI Flash suppor for rk3328 rock64 board;
- Update rockchip pcie phy to use generic framework;
Disable ram rockchip debug driver for ROCKPi N8/N10 boards
since we have verified ram in many instances with respective
U-Boot versions.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able
to boot from eMMC and SDMMC in order.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable PCI/NVME for M.2 Slot on RockPI-4 boards.
=> nvme info
Device 0: Vendor: 0x144d Rev: 4L1QCXB7 Prod: S35FNX0J623292
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add console settings like stdin, stdout and stderr as
usbkbd and vidconsole respectively for evb-rk3288 targets.
This would certainly help to detect the attached video
devices (like HDMI) and print the console messages on display.
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0
ports.
This patch adds support to enable all these USB ports for
N10 and N8 combinations SBCs.
Note that the USB 3.0 port on RockPI N8 combination works
as USB 2.0 OTG since it is driven from RK3288.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3288 and rk3288w have a usb host0 ohci controller.
Although rk3288 ohci doesn't actually work on hardware, but
rk3288w ohci can work well.
So add usb host0 ohci node in rk3288 dtsi and the quirk in
ohci platform driver will disable ohci on rk3288.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This sync has changes required to use HDMI CEC pin in U-Boot.
Sync dts from linux v5.8-rc5 commit:
"ARM: dts: rockchip: define the two possible rk3288 CEC pins"
(sha1: 838980dd04e994bf81cf104fa01ae60802146b39)
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
ROC-RK3399-PC has specific set of configurations for
on-board led setup.
Due to easiness for user to know the state of the board
roc-rk339-pc board code will setup the low power led
on/off, and waiting for user to press power key and then
glow full power led.
All this needs to happen only during power-on-reset not
for soft reset or WDT.
Also, it is not a proper usage to ask the user to press
the Power key if the board connected remotely, so add
the environment variable 'pwr_key' to check as well.
So, user need to press Power key only
- during POR
- pwr_key=y
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
reset cause is a generic functionality based on the soc
cru registers in rockchip. This can be used for printing
the cause of reset in cpuinfo or some other place where
reset cause is needed.
Other than cpuinfo, reset cause can also be using during
bootcount for checking the specific reset cause and glow
the led based on the reset cause.
So, let's separate the reset cause code from cpuinfo, and
add a check to build it for rk3399, rk3288 since these two
soc are supporting reset cause as of now.
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
reset reason can be used several stages of U-Boot bootloader
like SPL, U-Boot proper based on the requirements.
Clearing the status register end of get_reset_cause will end
up showing the wrong reset cause when it read the second time.
For example, if board resets, SPL reads the reset status as
RST whereas U-Boot proper reads the status as POR.
However, based on the latest testing clearing reset status
won't be required for determine the last reset cause or
following resets.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
roc-rk3399-pc has some specific requirements to support LEDS,
environment. board detection and etc prior to U-Boot proper.
So as of now SPL would be a better stage for these custom board
requirements to support unlike TPL. Adding few of these custom
requirements like LEDS in TPL would require extra code pulling
and also the size of TPL can grow.
So, this patch moves the leds code from TPL into SPL Board init
led_setup code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(split tpl.c change as separate patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add weak led_setup() so that board which has an uncommon
led setup code that can make use of custom implementation.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The new rk3288 revision rk3288w has some changes with respect
to legacy rk3288 like hclk_vio in cru and usb host0 ohci.
Linux clock driver already handle this via rockchip,rk3288w-cru
compatible.
USB ohci host can enable via dts for rk3288w based boards.
So, add fdt board setup code to update cru compatible with
rk3288w-cru compatible if the SOC revision is RK3288W.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip SoC's has a new revision chip for rk3288 SoCs.
RK3288 has a new revision chip called RK3288W which is similar
but different hclk_vio clock and fixed OHCI host.
Add common Rockchip SoC detection helper to support this rk3288w
detection.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.
So, add or enable difference nodes/properties in 4C dts
by including common dtsi.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rock PI 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- Rock PI 4A has no Wif/BT.
- Rock PI 4B has AP6256 Wifi/BT, PoE.
- Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and include
on respective variant dts files.
Use 4B dts into default rock-pi-4 defconfig until we find any
solution for dynamic detection of these variants.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
To fix below build error:
drivers/usb/host/built-in.o: In function `xhci_dwc3_remove':
drivers/usb/host/xhci-dwc3.c:174: undefined reference to `dwc3_shutdown_phy'
drivers/usb/host/built-in.o: In function `xhci_dwc3_probe':
drivers/usb/host/xhci-dwc3.c:130: undefined reference to `dwc3_setup_phy'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add default kernel_comp_addr_r and kernel_comp_size to support boot
from compressed kernel Image, this space is temporarily used during
decompress according to README.distro.
Reported-by: Tian Yuanhao <tianyuanhao@aliyun.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board
if CONFIG_SPL_OPTEE is set. This is troublesome when booting a
linux kernel since this size will be injected in FDT of the kernel.
gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE)
must not be taken into consideration for calculation of second bank
size, since this offset is already included in calculation of "top".
After applying this patch 992 MB (1024 MB - 32 MB reserved for
optee-os) is correctly calculated and has also been verified on
2 GB boards.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Drop the legacy PHY driver and it's associated code since
the PHY handling driver now part of Generic PHY framework.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Now, we have a PCIe PHY driver as part of the Generic
PHY framework. Let's use it instead of legacy PHY driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Disable ram rockchip debug driver for roc-rk3399-pc
boards since we have verified ram in many instances
with respective U-Boot versions.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The empty function define should not be in the header file, or else the
build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG
is disabled.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Right now all these debug statements are printing on the
console to make sure proper dram initialization happens.
Mark them into RAM_ROCKCHIP_DEBUG would be more meaningful
and work like before since the RAM_ROCKCHIP_DEBUG is by
default yet.
No functionality changes.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
stride debug is already present in sdram_common.c via
RAM_ROCKCHIP_DEBUG.
So, drop the redundant debug stride code in rk3399 driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable USB gadget for rock-pi-4 boards.
This would help to use fastboot by default.
Note: Connect the Host USB cable (Port A or C) to rock-pi-4
Upper USB 3.0 port.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable PCI/NVME for M.2 Slot on RockPI-4 boards.
=> nvme info
Device 0: Vendor: 0x144d Rev: 2B2QEXM7 Prod: S4EUNG0MC10012Y
Type: Hard Disk
Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)
Cc: Tom Cubie <tom@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable USB3.0 Host support for RockPI-4 boards.
Note that the Upper USB3.0 port is marked as otg and
lower USB3.0 port marked as host, so this below log
capture when USB3.0 mass storage plug in at lower
USB 3.0 port.
Log:
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... cannot reset port 1!?
2 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
u-boot EHCI Host Controller
1 Hub (480 Mb/s, 0mA)
u-boot EHCI Host Controller
1 Hub (5 Gb/s, 0mA)
U-Boot XHCI Host Controller
1 Hub (5 Gb/s, 0mA)
| U-Boot XHCI Host Controller
|
+-2 Mass Storage (5 Gb/s, 224mA)
SanDisk Dual Drive 040130e3ee554b7078843f4eb331646
Cc: Tom Cubie <tom@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3326 is just a trimmed down px30 from a software perspective,
so the mainline rk3326 dtsi also ist just a tiny addition.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The function, pkcs7_verify_one(), will be utilized to rework signature
verification logic aiming to support intermediate certificates in
"chain of trust."
To do that, its function interface is expanded, adding an extra argument
which is expected to return the last certificate in trusted chain.
Then, this last one must further be verified with signature database, db
and/or dbx.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This function was nullified when the file, pkcs7_verify.c, was imported
because it calls further linux-specific interfaces inside, hence that
could lead to more files being imported from linux.
We need this function in pkcs7_verify_one() and so simply re-implement it
here instead of re-using the code.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
The file, pkcs7_verify.c, will now be imported from linux code
(crypto/asymmetric_keys/pkcs7_verify.c in 5.7) and modified to fit
into U-Boot environment.
In particular, pkcs7_verify_one() function will be used in a later patch
to rework signature verification logic aiming to support intermediate
certificates in "chain of trust."
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
When the file, x509_public_key.c, was imported from linux code in
commit b4adf627d5 ("lib: crypto: add x509 parser"),
x509_check_for_self_signed() was commented out for simplicity.
Now it need be enabled in order to make pkcs7_verify_one(), which will be
imported in a later patch, functional.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This function will be called from x509_check_for_self_signed() and
pkcs7_verify_one(), which will be imported from linux in a later patch.
While it does exist in linux code and has a similar functionality of
rsa_verify(), it calls further linux-specific interfaces inside.
That could lead to more files being imported from linux.
So simply re-implement it here instead of re-using the code.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This is a fixup by autopep8 after the commit ("test/py: efi_secboot:
apply autopep8").
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
'tool_is_in_path' function is no longer used anywhere after Heinrich
has removed 'sudo' version of fixture setup.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Use logging instead of printf() for messages occurring when scanning block
devices during the initialization of the UEFI sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Log messages of the bootefi command instead of simply printing them to the
console.
Do not show "## Application terminated" message when the UEFI binary
completed successfully.
Adjust the python tests testing for '## Application terminated'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Do not reset the board when returning from an UEFI FIT image.
For failed UEFI binary we already print the return status in efi_run_image.
Remove duplicate output.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When reading a directory, EFI_BUFFER_TOO_SMALL should be returned when
the supplied buffer is too small, so a use-case is to call
efi_file_read with *buffer_size=0 and buffer=NULL to obtain the needed
size before doing the actual read.
So move the buffer!=NULL check to after the buffer size has been checked.
This fix allows the Redhat shim fallback to run and e.g. Fedora 32 now
boots out of the box.
Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently we only check for the return value of tee_invoke_func().
Although OP-TEE and StMM will correctly set param[1].u.value.a and we'll
eventually return an error, the correct thing to do is check for the
OP_TEE return code as well.
So let's check for that and move tee_shm_free() and tee_close_session()
before exiting with an error to make sure we always clear the registered
memory.
Fixes: f042e47e8f ("efi_loader: Implement EFI variable handling via OP-TEE")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Use EFI_DEVICE_ERROR for TEE communication problems.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Instead of adding the definition for the specific MM SVC used in
StandAloneMM we added the one used in the standard SMC calls.
So change the value from -4 to -5 to match the correct one defined in
EDK2 and rename them to avoid future confusion
Fixes 23a397d2e2: ("efi_loader: Add headers for EDK2 StandAloneMM communication")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_var_mem_del() is in __efi_runtime because it would be needed for a
runtime implementation of SetVariable(). memmove() is not in __efi_runtime.
So we should not use it in efi_var_mem_del().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Variable efi_current_var is a pointer to a physical memory address that
becomes invalid after SetVirtualAddressMap(). Instead of converting it via
ConvertPointer() simply set it to NULL.
Fixes: b02a707152 ("efi_loader: enable UEFI variables at runtime")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.
To generate this commit, I used coccinelle excluding drivers/core/,
include/dm/, and test/
The semantic patch that makes this change is as follows:
<smpl>
@@
expression dev;
@@
-devfdt_get_addr(dev)
+dev_read_addr(dev)
</smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use the _ptr suffixed variant instead of casting. Also, convert it to
dev_read_addr_ptr(), which is safe to CONFIG_OF_LIVE.
One curious part is an error check like follows in
drivers/watchdog/omap_wdt.c:
priv->regs = (struct wd_timer *)devfdt_get_addr(dev);
if (!priv->regs)
return -EINVAL;
devfdt_get_addr() returns FDT_ADDR_T_NONE (i.e. -1) on error.
So, this code does not catch any error in DT parsing.
dev_read_addr_ptr() returns NULL on error, so this error check
will work.
I generated this commit by the following command:
$ find . -name .git -prune -o -name '*.[ch]' -type f -print | \
xargs sed -i -e 's/([^*)]*\*)devfdt_get_addr(/dev_read_addr_ptr(/'
I manually fixed drivers/usb/host/ehci-mx6.c
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, fdt_fixup_mtdparts() only checks the compatible property.
It is pointless to fix up the disabled node.
Skip the node if it has the property:
status = "disabled"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Platform code can call fdt_fixup_mtdparts() in order to hand U-Boot's
MTD partitions over to the Linux device tree.
Currently, fdt_fixup_mtdparts() calls mtdparts_init() in its entry.
If no target MTD device is found, an error message like follows is
displayed:
Device nand0 not found!
This occurs when the same code (e.g. arch/arm/mach-uniphier/fdt-fixup.c)
is shared among several boards, but not all of them support an MTD device.
Parse the DT first, then call mtdparts_init() only when the target MTD
node is found.
Yet, you still need to call mtdparts_init() before device_find().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Running 'ut dm' on the sandbox without -D or -d results in segmentation
faults due to NULL pointer dereferences.
Check that device pointers are non-NULL before using them.
Use ut_assertnonnull() for pointers instead of ut_assert().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Philippe Reynes <philippe.reynes@softathome.com>
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add a sandbox SOC driver, and some tests for the SOC uclass.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.
This is useful for other device drivers that may need different
parameters or quirks enabled depending on the specific device variant in
use.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Add a new documentation file for UCLASS_SOC and its usage to describe
the SoC Device ID framework that allows SoC identification and device
data matching.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The user can either count the number of patches, or provide a
tracking branch.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Setting sendemail.suppresscc to all or cccmd leads to --cc-cmd
parameter being ignored, and emails going either nowhere, or
just to the To: line maintainer.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The commit 361377dbdb ("ARM: rmobile: Merge prior-stage firmware DT
fragment into U-Boot DT on Gen3") reverted changes introduced by commit
175f502734 ("ARM: renesas: Configure DRAM size from ATF DT fragment")
that's why there is no reason to use functions with _fdt() suffix because
parameter is gd->fdt_blob as is already for functions without _fdt()
suffix.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The unsupported Commit-xxx option are silently skipped
and removed as 're_remove=Commit-\w*', this patch adds
warning message in this case to detect misspelled issue
for the 2 supported options:
Commit-notes:
Commit-changes:
For example: the final 's' is missing (Commit-note:)
NB: no issue for Series-xxx option as only the supported
options are accepted (see valid_series in series.py)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The function fdt_find_regions look in the exclude list for each
property, even if the name is NULL. It could happen if the fit
image is corrupted. On sandbox, it generates a segfault.
To avoid this issue, if the name of a property is NULL, we report
an error and avoid looking in the exclude list.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Detect unexpected 'END' line when a section is not detected.
This patch detect issue when tag name for section start is misspelled,
for example 'Commit-note:' for 'Commit-notes:'
Commit-note:
....
END
Then 'Commit-note:' is removed silently by re_remove = "Commit-\w*:"
but 'END' is kept in commit message.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
These functions should not modify the device. Convert them to const so
that callers don't need to cast if they have a const udevice *.
Signed-off-by: Simon Glass <sjg@chromium.org>
FIT (Flat Image Tree) is the main image format used by U-Boot. In some
cases scripts are used to create FITs within the U-Boot build system. This
is not ideal for various reasons:
- Each architecture has its own slightly different script
- There are no tests
- Some are written in shell, some in Python
To help address this, add support for FIT generation to binman. This works
by putting the FIT source directly in the binman definition, with the
ability to adjust parameters, etc. The contents of each FIT image come
from sub-entries of the image, as is normal with binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a method for adding a property containing arbitrary bytes. Make sure
that the tree can expand as needed in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally the FIT timestamp is created the first time mkimage is run on a
FIT, when converting the source .its to the binary .fit file. This
corresponds to using the -f flag. But if the original input to mkimage is
a binary file (already compiled) then the timestamp is assumed to have
been set previously.
Add a -t flag to allow setting the timestamp in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some binary blobs unfortunately obtain their position in the image from
other binary blobs, such as Intel's 'descriptor'. In this case we cannot
rely on packing to work. It is not possible to produce a valid image in
any case, due to the missing blobs.
Allow zero-length overlaps so that this does not cause any problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When warnings and errors are produced by tools they should be written to
stderr. Update the tout implementation to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sometimes it is useful to build an image even though external binaries are
not present. This allows the build system to continue to function without
these files, albeit not producing valid images.
U-Boot does with with ATF (ARM Trusted Firmware) today.
Add a new flag to binman to request this behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Many of the existing blobs rely on external binaries which may not be
available. Move them over to use blob_ext to indicate this.
Unfortunately cros-ec-rw cannot use this class because it inherits
another. So set the 'external' value for that class.
While we are here, drop the import of Entry since it is not used (and
pylint3 complains).
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to distinguish between ordinary blobs such as
u-boot.bin and external blobs that cannot be build by the U-Boot build
system. If the external blobs are not available for some reason, then we
know that a value image cannot be built.
Introduce a new 'blob-ext' entry type for that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is easier and less error-prone to use super() when the parent type is
needed. Update binman to remove the type names.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With the change to absolute imports the concurrent tests feature
unfortunately broke. Fix it.
We cannot easy add a warning, since the output messes up tests which check
the output.
Signed-off-by: Simon Glass <sjg@chromium.org>
If the pylibfdt shared-object file is detected, then Python assumes that
the libfdt.py file exists also.
Sometimes when an incremental build aborts, the shared-object file is
built but the libfdt.py is not. The only way out at this point is to use
'make mkproper', or similar.
Fix this by removing the .so file before it is built. This seems to make
Python rebuild everything.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As a first step to integrating mkimage into binman, add a new entry type
that feeds data into mkimage for processing and incorporates that output
into the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
When binman is run from 'make check' it is given a toolpath so that the
latest tools (e.g. mkimage) are used. When run manually with no toolpath,
it relies on the system mkimage. But this may be missing or old.
Make some effort to find the built-from-soruce version by looking in the
current directory and in the builds created by 'make check'.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman's test coverage runs without a toolpath set. This means
that the system tools will be used. That may not be correct if they are
out of date or missing and this can result in a reduction in test coverage
below 100%.
Provide the toolpath to binman in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that binman uses tools/ as its base directory for importing modules,
the path to the pylibfdt build by U-Boot is incorrect. Fix it with a new
path.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present binman outputs errors to stdout which means that fails are
effectively silent when printed by buildman, for example. Fix this by
outputing errors to stderr.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These can appear when moving between branches that have different tools
in the tree. Ignore them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Most users don't want to see traceback errors. Add an option to enable
them for debugging. Disable them by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Collect response tags such as 'Reviewed-by' while parsing the stream.
This allows us to see what tags are present.
Add a new 'Fixes' tag also, since this is now quite common.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present all text is marked bright, which makes it stand out on the
terminal. Add a way to disable that, as is done with the Color class.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we use --test to indicate that tests should be run. It is
better to use a subcommand for list, like binman. Change it and adjust
the existing code to fit under a 'send' subcommand, the default.
Give this subcommand the same default arguments as the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present patman only does one thing so does not have any comments. We
want to add a few more command, so create a sub-parser for the default
command ('send').
Signed-off-by: Simon Glass <sjg@chromium.org>
The -s option allows skipping patches at the top of the branch. Sometimes
there are commits at the bottom that need to be skipped. At present it is
necessary to count the number of commits and then use -c to tell patman
how many to process.
Add a -e option to easily skip a number of commits at the bottom of the
branch.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is convenient to use gitpython to create a real git repo for testing
patman's operation. Add a test for this. So far it just checks that patman
produces the right number of patches for a branch.
Signed-off-by: Simon Glass <sjg@chromium.org>
To make testing easier, move the code out from main into a separate
'control' module and split it into four parts: setup, preparing patches,
checking patches and emailing patches.
Add comments and fix a few code-style issues while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add device table for new Micron SPI NAND devices, which have multiple
dies.
Also, enable support to select the dies.
Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
the Continuous Read mode.
Some of the Micron SPI NAND devices have the "Continuous Read" feature
enabled by default, which does not fit the subsystem needs.
In this mode, the READ CACHE command doesn't require the starting column
address. The device always output the data starting from the first
column of the cache register, and once the end of the cache register
reached, the data output continues through the next page. With the
continuous read mode, it is possible to read out the entire block using
a single READ command, and once the end of the block reached, the output
pins become High-Z state. However, during this mode the read command
doesn't output the OOB area.
Hence, we disable the feature at probe time.
Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage
details as a comment.
Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
In order to add new Micron SPI NAND devices, we generalized the OOB
layout structure and function names.
Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
At present do_mtrr() does the 'list' subcommand at the top and the rest
below. Update it to do them all in the same place so we can (in a later
patch) add parsing of the CPU number for all subcommands.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To enable support for the 'mtrr' command, add a way to perform MTRR
operations on selected CPUs.
This works by setting up a little 'operation' structure and sending it
around the CPUs for action.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
When the boot CPU MTRRs are updated, perform the same update on all other
CPUs so they are kept in sync.
This avoids kernel warnings about mismatched MTRRs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
SMP should be set up in U-Boot where possible, not SPL. Disable it in SPL.
For 64-bit U-Boot we should find a way to allow SMP operations in U-Boot,
but this is somewhat more complicated. For now that is disabled too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Update the mtrr command to use mp_run_on_cpus() to obtain its information.
Since the selected CPU is the boot CPU this does not change the result,
but it sets the stage for supporting other CPUs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is convenient to iterate through the CPUs performing work on each one
and processing the result. Add a few iterator functions which handle this.
These can be used by any client code. It can call mp_run_on_cpus() on
each CPU that is returned, handling them one at a time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With the new MP features the CPUs are no-longer parked when the OS is run.
Fix this by calling a special function to park them, just before the OS is
started.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a way to run a function on a selection of CPUs. This supports either
a single CPU, all CPUs, just the main CPU or just the 'APs', in Intel
terminology.
It works by writing into a mailbox and then waiting for the CPUs to notice
it, take action and indicate they are done.
When SMP is not yet enabled, this just calls the function on the main CPU.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Allow keeping track of whether all CPUs have been enabled yet. This allows
us to know whether other CPUs need to be considered when updating
CPU-specific settings such as MTRRs on x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the APs (non-boot CPUs) are inited once and then parked ready
for the OS to use them. However in some cases we want to send new requests
through, such as to change MTRRs and keep them consistent across CPUs.
Change the last state of the flight plan to go into a wait loop, accepting
instructions from the main CPU.
Drop cpu_map since it is not used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function is misnamed since it does not actually init the BSP. Also
it is convenient to adjust it to return a little more information.
Rename and update the function, to allow it to return the BSP CPU device
and number, as well as the total number of CPUs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present each CPU is given a number when it starts itself up. While this
saves a tiny amount of time by doing the device-tree read in parallel, it
is confusing that the numbering happens on the fly.
Move this code into mp_init() and do it at the start.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These parameters are named differently from elsewhere in this file. Switch
them to avoid confusion.
Also add comments to this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
The functions used by the flight plan are declared in the header file but
are not used in any other file.
Move the flight plan steps down to just above where it is used so that we
can make these function static.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the 'flight plan' for CPUs is passed into mp_init. But it is
always the same. Move it into the mp_init file so everything is in one
place. Also drop the SMI function since it does nothing. If we implement
SMIs, more refactoring will be needed anyway.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some boards don't care about the ordering of ACPI code fragments. Change
the warning to a debug message.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.
Supported devices:
- UART
- reset
- CFI parallel NOR flash
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds the code to copy itself from bootrom location to a
different location (TEXT_BASE) to the Octeon platform. Its used in
this case to copy the complete U-Boot image into L2 cache, which
greatly improves the bootup time - especially in regard to the
very long and complex DDR4 init code.
The Kconfig symbol CONFIG_MIPS_MACH_EARLY_INIT is enabled with this
patch for Octeon.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds very basic support for the Octeon III SoCs. Only
CFI parallel NOR flash and UART is supported for now.
Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches
later. To still use U-Boot on with this port, the L2 cache (4MiB on
Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the
prompt on such boards.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
family.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code. Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.
It will be used by thje Octeon platform.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Sync asm/mipsregs.h with Linux 5.7. Also replace the custom
symbols EBASE_CPUNUM and EBASE_WG with the according symbols
from Linux.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
This macro only served as a wrapper for CKSEG1ADDR() with an
exception for CONFIG_TB0229. CONFIG_TB0229 doesn't exist, thus
use CKSEG1ADDR() directly.
This also prepares for an upcoming asm header sync with Linux.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.
Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.
Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Logically this code belongs to cache_init.S.
If a complex SoC needs to replace the generic cache init,
mips_cache_disable() can now be called from custom start.S files.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
change_k0_cca() is called multiple times. Move the code for
changing to KSEG1 to a macro to avoid code duplication.
Also fix missing change to KSEG1 when changing to CONF_CM_CACHABLE_COW.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Since commit 703ec9ddf9 ("MIPS: Stop building position independent code")
the relocation code was completely reworked and removed from start.S.
Remove some left-overs of the old code.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds __weak to flush_cache() in lib/cache.c. This makes it
possible to overwrite this function by a platforms specific version,
like done with the Octeon base port.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch enables the usage of CONFIG_MIPS_L2_CACHE without
CONFIG_MIPS_CM, which is what is needed for the newly added Octeon
platform.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the R_MIPS_NONE define from 0 to a magic value. This
makes it possible to better detect any forbidden pre-relocation usage
of BSS variables, as they are often zero'ed and then relocation is
stopped too early.
Additionally the error message is improved to also print the faulting
address. This helps finding the root-cause for this breakage by
comparing this address with the values in System.map.
This patch helps a lot when working on pre-relocation code, like the
Octeon DDR init code, where such variables have hit me multiple times
now.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
This patch opts-out the compilation of get_tbclk() if
CONFIG_SYS_MIPS_TIMER_FREQ is not defined. This is used on the Octeon
platform, where the weak get_tbclk() function is overwritten by its
platform specific one.
Signed-off-by: Stefan Roese <sr@denx.de>
A large number of assorted fixes, including but not limited to:
- Correct fixdep and CONFIG_IS_ENABLED(...)
- lz4 on big endian
- Assorted LMB hardening
- Remove bd_t typedef
When update_uboot.its is used directly there is syntax error for no reason.
Error report:
mkimage -f update_uboot.its boot
Error: update_uboot.its:18.12-13 syntax error
FATAL ERROR: Unable to parse input tree
mkimage: Can't read boot.tmp: Invalid argument
Fixes: 4bae90904b ("Automatic software update from TFTP server")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The types of "offset" and "size" of "struct mtd_partition" are uint64_t,
while mtd_parse_partitions() uses int to work with these values. When
the offset reaches 2GB, it is interpreted as a negative value, which
leads to error messages like
mtd: partition "<partition name>" is out of reach -- disabled
eg. when using the "ubi part" command.
Fix this by using uint64_t for cur_off and cur_sz.
Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
When fixdep detects CONFIG_IS_ENABLED and other similar macros, it must
parse the macro parameter to determine which actual CONFIG_ option is
being referenced. This involves moving a pointer forward through the
entire CONFIG_ option "word". Currently, the code uses variable q to walk
through the word, but doesn't actually initialize it to point at the
parameter before doing so. Consequently, the walking process immediately
fails since it sees the macro invocatoins's ( rather than the expected
alpha-numeric characters in the macro parameter. Fix this by adding the
missing initialization.
Fixes: 67f2ee86cc ("kbuild: fixdep: Resync this with v4.17")
Fixes: 7012865e96 ("gpio: fix test.py for gpio label lookup")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a new error message in case the size of data written
are shorter than the one expected.
Currently, it will lead to the following error message:
"mkimage: Write error on uImage: Success"
This is not explicit when the error is because the device
doesn't have enough space. Let's use a more understandable message:
"mkimage: Write only 4202432/4682240 bytes, probably no space left on the device"
Signed-off-by: Mylène Josserand <mylene.josserand@collabora.com>
Reviewed-by: Walter Lozano <walter.lozano@collabora.com>
Since commit 4b0bcfa7c4 (Kconfig: Migrate CONFIG_BOOTM_* options),
the config_defaults.h file has been void of any actual content - and
these days, "sane defaults for everyone" is achieved by appropriate
default values in Kconfig. Remove it, and thus make every translation
unit process one less header file.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Remove the incorrect usage of double underscores for the
CONFIG_OF_LIST and CONFIG_SPL_OF_LIST symbols.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
If a file cannot be loaded, show an error message.
Set the EFI boot device only after successfully loading a file.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some code was not converted by coccinelle, somehow.
I manually fixed up the remaining, and comments, README docs.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
[trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and
include/fdt_support.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
The Linux coding style guide (Documentation/process/coding-style.rst)
clearly says:
It's a **mistake** to use typedef for structures and pointers.
Besides, using typedef for structures is annoying when you try to make
headers self-contained.
Let's say you have the following function declaration in a header:
void foo(bd_t *bd);
This is not self-contained since bd_t is not defined.
To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h>
#include <asm/u-boot.h>
void foo(bd_t *bd);
Then, the include direcective pulls in more bloat needlessly.
If you use 'struct bd_info' instead, it is enough to put a forward
declaration as follows:
struct bd_info;
void foo(struct bd_info *bd);
Right, typedef'ing bd_t is a mistake.
I used coccinelle to generate this commit.
The semantic patch that makes this change is as follows:
<smpl>
@@
typedef bd_t;
@@
-bd_t
+struct bd_info
</smpl>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
All configurations have been removed in 2016 by commit 7985cdf74b
("arm64: Remove non-full-va map code").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This fixes the CVE-2016-9840. Commit imported from [1].
inftrees.c was subtracting an offset from a pointer to an array,
in order to provide a pointer that allowed indexing starting at
the offset. This is not compliant with the C standard, for which
the behavior of a pointer decremented before its allocated memory
is undefined. Per the recommendation of a security audit of the
zlib code by Trail of Bits and TrustInSoft, in support of the
Mozilla Foundation, this tiny optimization was removed, in order
to avoid the possibility of undefined behavior.
[1]: 6a043145ca
Signed-off-by: Mark Adler <madler@alumni.caltech.edu>
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
- Despite other ext4 filesystem functions, ext4fs_mount returns
0 in case of error.
- This leads to u-boot crash in case that an SD card
with valid partition table but without ext4 filesystem created
in a partition is found on SD card.
- Fix this by returning a proper error code of '-1' from spl_load_image_ext
function in case of ext4fs_mount error.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
[hthiery: slightly reword the commit message]
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Moving of the OS image may have some nasty side effects like corrupting
DTB. Convert the current debug print to printf so that the relocation of
the OS is always obvious to the user.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
These cases are typically fatal and are difficult to debug for random
users. Add checks for detecting overlapping images and abort if overlap
is detected.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Currently the boot continues if the FDT image is clearly corrupted,
which just causes the loaded OS to hang. Abort boot properly if the FDT
is corrupted.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Booting an lz4-compressed kernel image fails on our powerpc board with
-EPROTONOSUPPORT. Adding a bit of debug prints, we get
magic: 0x184d2204
flags: 0x64
reserved0: 1
has_content_checksum: 1
has_content_size: 0
has_block_checksum: 0
independent_blocks: 1
version: 0
block_descriptor: 70
reserved1: 7
max_block_size: 0
reserved2: 0
So the magic is ok, but the version check fails, also some reserved
bits are apparently set. But that's because the code interprets the
"flags" and "block_descriptor" bytes wrongly:
Using bit-fields to access individual bits of an "on the wire" format
is not portable, not even when restricted to the C flavour implemented
by gcc. Quoting the gcc manual:
* 'The order of allocation of bit-fields within a unit (C90 6.5.2.1,
C99 and C11 6.7.2.1).'
Determined by ABI.
and indeed, the PPC Processor ABI supplement says
* Bit-fields are allocated from right to left (least to most
significant) on Little-Endian implementations and from left to
right (most to least significant) on Big-Endian implementations.
The upstream code (github.com/lz4/lz4) uses explicit shifts and masks
for encoding/decoding:
/* FLG Byte */
*dstPtr++ = (BYTE)(((1 & _2BITS) << 6) /* Version('01') */
+ ((cctxPtr->prefs.frameInfo.blockMode & _1BIT ) << 5)
+ ((cctxPtr->prefs.frameInfo.blockChecksumFlag & _1BIT ) << 4)
+ ((unsigned)(cctxPtr->prefs.frameInfo.contentSize > 0) << 3)
+ ((cctxPtr->prefs.frameInfo.contentChecksumFlag & _1BIT ) << 2)
+ (cctxPtr->prefs.frameInfo.dictID > 0) );
/* Flags */
{ U32 const FLG = srcPtr[4];
U32 const version = (FLG>>6) & _2BITS;
blockChecksumFlag = (FLG>>4) & _1BIT;
blockMode = (FLG>>5) & _1BIT;
contentSizeFlag = (FLG>>3) & _1BIT;
contentChecksumFlag = (FLG>>2) & _1BIT;
dictIDFlag = FLG & _1BIT;
/* validate */
if (((FLG>>1)&_1BIT) != 0) return err0r(LZ4F_ERROR_reservedFlag_set); /* Reserved bit */
if (version != 1) return err0r(LZ4F_ERROR_headerVersion_wrong); /* Version Number, only supported value */
}
Do the same here, and while at it, be more careful to use unaligned
accessors to what is most likely unaligned. Also update the comment to
make it clear that it only refers to the lz4.c file, not the following
code of lz4_wrapper.c.
This has been tested partly, of course, by seeing that my
lz4-compressed kernel now boots, partly by running the (de)compression
test-suite in the (x86_64) sandbox - i.e., it should still work just
fine on little-endian hosts.
Reviewed-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Move doc/README.coccinelle to doc/develop/coccinelle.rst using the current
linux-next version of the text.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86: A few fixes to FSP2 with ApolloLake
- x86: Drop setup_pcat_compatibility()
- x86: Primary-to-Sideband Bus minor fixes
i.MX for 2020.10
----------------
- i.MX DDR driver fix/update for i.MX8M
- i.MX pinctrl driver fix.
- Use arm_smccc_smc to remove imx sip function
- i.MX8M clk update
- support booting aarch32 kernel on aarch64 hardware
- fused part support for i.MX8MP
- imx6: pcm058 to DM
Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785
This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function sounds like something that is called when U-Boot is about to
jump to Linux. In fact it is an init function.
Rename it to reduce confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
This function does not exist anymore. Drop it from the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this information is used to locate and parse the tables but is
not stored. Store it so that we can display it to the user, e.g. with the
'bdinfo' command.
Note that now the GD_FLG_SKIP_LL_INIT flag is set in get_coreboot_info(),
so it is always set when booting from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Update this code to calculate the address to use, rather than hard-coding
it. Obtain the requested stack size from the FSP.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If there is MRC information we should run FSP-M with a different
boot_mode flag since it is supposed to do a 'fast path' through the
memory init. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Writing tables is currently pretty opaque. Add a bit of debugging to the
process so we can see what tables are written and where they start/end in
memory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
The FSP-S changes the ITSS priorities. The code that tries to save it
before running FSP-S and restore it afterwards does not work as U-Boot
relocates in between the save and restore. This means that the driver
data saved before relocation is lost and the new driver just sees zeroes.
Fix this by allocating space in the relocated memory for the ITSS data.
Save it there and access it from the driver after relocation.
This fixes interrupt handling on coral.
Also drop the log_msg_ret() in irq_first_device_type() since this function
can be called speculatively in places where we are not sure if there is
an interrupt controller of that type. The resulting log errors are
confusing when there is no error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Update the PCI driver to generate ACPI information so that Linux has the
full information about each I2C bus.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
[bmeng: Correct one typo in dw_i2c_gen_speed_config() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add debugging for a few more values and also use log to show return values
when something goes wrong. This makes it easier to see the root cause.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Implement the method that converts a GPIO into the form used by ACPI, so
that GPIOs can be added to ACPI tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the new binman memory-mapping function to access the VBT, to simplify
the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the itss is probed in the ofdata_to_platdata() method. This is
incorrect since itss is a child of p2sb which itself needs to probe the
pinctrl device. This means that p2sb is effectively not probed when the
itss is probed, so we get the wrong register address from p2sb.
Fix this by moving the itss probe to the correct place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Add a Kconfig to control whether pinctrl is represented as a single ACPI
device or as multiple devices. In the latter case (the default) we should
return the pin number relative to the pinctrl device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).
Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: Use the correct acpi_irq_polarity enum number]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).
Signed-off-by: Simon Glass <sjg@chromium.org>
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.
Add functions to allow adding to the structure that is eventually written
to the ACPI tables. Also add the device-tree bindings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Write required information into the SSDT to describe the SD card
card-detect pin. Since the required GPIO properties are not present in
the device-tree binding, set them manually for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present only acpigen_write_integer() is exported for use by other code.
But in some cases it is useful to call the specific function depending on
the size of the value.
Export these functions and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Fix the "new blank line at EOF" warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.
Add core support for this, based on a structure which is built up through
calls to the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Some devices such as GPIO need to override the normal path that would be
generated by driver model. Add a device-tree property for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
The start of an ACPI path typically has backslashes in it. These are not
preserved during the translation from device tree to C code, since dtc
(correctly) uses the first backslash as an escape character, and dtoc
therefore leaves it out of the C string.
Fix this with special-case handling.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases an internal error may prevent this from working. Update the
function return value and report the error. At present the API for writing
tables does not easily support reporting errors, but once it is fully
updated to use a context pointer, this will be easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Add support for accessing an entry's contents in memory-mapped SPI flash.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we can only read from a top-level binman node entry. Refactor
this function to produce a second local function which supports reading
from any node.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way
to tell binman the offset from a ROM address to a RAM address.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a command that shows the individual blocks of data generated by each
device, effectively splitting the full table into its component parts.
This can be helpful for debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For many device types it is possible to figure out the name just by
looking at its uclass or parent. Add a function to handle this, since it
allows us to cover the vast majority of cases automatically.
However it is sometimes impossible to figure out an ACPI name for a device
just by looking at its uclass. For example a touch device may have a
vendor-specific name. Add a new "acpi,name" property to allow a custom
name to be created.
With this new feature we can drop the get_name() methods in the sandbox
I2C and SPI drivers. They were only added for testing purposes. Update the
tests to use the new values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Call the new core function to inject ASL programmatically into the DSDT.
This is made up of fragments generated by devices that have the
inject_dsdt() method. The normal, compiled ASL file is added after this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some devices need to inject extra code into the Differentiated System
Descriptor Table (DSDT). Add a method to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in inject_dsdt() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Call the new core function to write the SSDT. This is made up of fragments
generated by devices that have the fill_ssdt() method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a /chosen property to control the order in which the data appears
in the SSDT. This allows matching up U-Boot's output from a dump of the
known-good data obtained from within Linux.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful to be able to control the order of data written to the SSDT
so that we can compare the output against known-good kernel dumps.
Add code to record each item that is added along with the device that
added it. That allows us to reorder things later if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Put this table before MCFG so that it matches the order that coreboot uses
when passing tables to Linux. This is a cosmetic change since the order of
the tables does not otherwise matter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a way for devices to enable and disable themselves using ACPI code
that updates GPIOs. This takes several timing parameters and supports
enable, reset and stop.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Power to some devices is controlled by GPIOs. Add a way to generate ACPI
code to enable and disable a GPIO so that this can be handled within an
ACPI method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These are used in ACPI to disable power to various pats of the system when
in sleep. Add a way to create a power resource, with the caller finishing
off the details.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some drivers in Linux support both device tree and ACPI. U-Boot itself
uses Linux device-tree bindings for its own configuration but does not use
ACPI.
It is convenient to copy these values over to the ACPI DP table for
passing to linux. Add some convenience functions to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Allowing writing out a reference to a GPIO within the ACPI output. This
can be used by ACPI code to access a GPIO at runtime.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
More complex device properties can be provided to drivers via a
device-specific data (_DSD) object.
To create this we need to build it up in a separate data structure and
then generate the ACPI code, due to its recursive nature.
Add an implementation of this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
ACPI supports storing names which are made up of multiple path components.
Several special cases are supported. Add a function to emit a name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A package collects together several elements. Add an easy way of writing
a package header and updating its length later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is convenient to write a length value for preceding a block of data.
Of course the length is not known or is hard to calculate a priori. So add
a way to mark the start on a stack, so the length can be updated when
known.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some devices use interrupts but some use GPIOs. Since these are fully
specified in the device tree we can automatically produce the correct ACPI
descriptor for a device.
Add a function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new GPIO method to do the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new file to handle generating ACPI code programatically. This is
used when information must be dynamically added to the tables, e.g. the
SSDT.
Initial support is just for writing simple values. Also add a 'base' value
so that the table can be freed. This likely doesn't happen in normal code,
but is nice to do in tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new IRQ method to do the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present U-Boot does not support the different ACPI status values, but
it is best to put this logic in a central place. Add a function to get the
device status.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With DDR4, Intel SOCs take quite a long time to init their memory. During
this time, if the user is watching, it looks like SPL has hung. Add a
message in this case.
This works by adding a return code to fspm_update_config() that indicates
whether MRC data was found and a new property to the device tree.
Also add one more debug message while starting.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
At present this enables a few arch-specific members of the global_data
struct which are otherwise not part of the struct. As a result we have to
use #ifdef in various places.
The cost of always having these in the struct is small. Adjust things so
that we can use compile-time code instead of #ifdefs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable this feature on chromebook_coral to speed up the display.
With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from 1830ms to 62ms.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
When implementing microsecond-level timeouts, 32-bits is plenty. Add a
new function that uses an unsigned long. On 64-bit machines this is
still 64-bit, but this doesn't introduce a penalty. On 32-bit machines
it is more efficient.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Currently it is possible to select the P2SB driver without selecting the
P2SB uclass, which can't work. Fix this by adding a "depends on" in
Kconfig.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pull request for UEFI sub-system for efi-2020-10-rc1 (4)
Improvements for the UEFI subsystem include:
* support for read-only TEE-backed variables
* allow to compile PK, KEK, db, dbx fixed values into U-Boot
* bug fixes
Python testing related changes comprise:
* enable 'bootefi hello' for better test coverage
* remove SKIP messages in UEFI Python tests
The fitupd command is dropped.
Build errors for the lsblk command are fixed.
Commit 4503299 has a side effect on this board, and build is broken.
Adjust mx6memcal_defconfig to build it again.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Currently default output of 'printenv -e' is restricted to variables with
GUID EFI_GLOBAL_VARIABLE. This excludes db and dbx. As the number of
variables is small there is no need for this restriction.
If no GUID is provided, print all matching variables irrespective of GUID.
Always show the numeric value of the GUID.
If the GUID provided to 'setenv -e' is invalid, return CMD_RET_USAGE.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Include a file with the initial values for non-volatile UEFI variables
into the U-Boot binary. If this variable is set, changes to variable PK
will not be allowed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
To determine if a varible is on the of the authentication variables
PK, KEK, db, dbx we have to check both the name and the GUID.
Provide a function converting the variable-name/guid pair to an enum and
use it consistently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The file based and the OP-TEE based UEFI variable store are mutually
exclusive. Define them as choice options in Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some distributions provide UEFI binaries like Shim that have been signed
using a Microsoft certificate. Provide the download paths for the public
keys.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Update the UEFI secure state when variable 'PK' is updated in the TEE
variables implementation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
When using secure boot functions needed both for file and TEE based UEFI
variables have to be moved to the common code module efi_var_common.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
A previous commit adds support for displaying variables RO flag.
Let's add it on the TEE backed variable storage as well.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Skip messages should only be written if the setup is not suitable for
testing.
If DHCP is enabled, we should not write a skip message if no static network
configuration is supplied.
Likewise if a static network configuration is supplied, we should not write
a skip message if DHCP is not enabled.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In our Python tests we want to run 'bootefi hello'. Enable it by default
when compiling with CMD_BOOTEFI_SELFTEST.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The `fitupd' command is not used by any board. The `dfu tftp' command
provides the same capabilities.
So let's drop the `fitupd' command.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:
"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."
i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.
Remove it from the i.MX6 defconfig files.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
OF graph endpoint connections must be bidirectional and dtc warn if they
are not. i.MX7 based DTs have an error and generate
warnings:
arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/replicator/ports/port@0/endpoint: graph connection to node
'/soc/tpiu@30087000/port/endpoint' is not bidirectional
arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/soc/tpiu@30087000/port/endpoint: graph connection to node
'/replicator/ports/port@1/endpoint' is not bidirectional
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
This commit enables imx28 based XEA board's u-boot.sb (SPL) to download
u-boot proper (u-boot.img) via Ymodem protocol.
This is extremely useful in the recovery scenario where u-boot.sb is
downloaded via uuu utility to SDRAM [*], and then one can upload u-boot
proper via serial console to fully debrick the device.
Note - debricking procedure of imx28 devices:
- NXP's original USB based tools (like mxsldr or uuu) expect single
u-boot.sb which is a relic of the old U-Boot (~2013) without SPL and
U-Boot proper distinction.
[*] On Host:
------------
cat << EOF > imx28_xea.lst
uuu_version 1.3.0
SDPS: boot -f /srv/tftp/xea/u-boot.sb
SDPU: done
EOF
Please start picocom:
sudo picocom -b 115200 -s "sz -vv" /dev/ttyUSB1
sudo ./uuu/uuu -V imx28_xea.lst
On the U-boot console one shall see:
Trying to boot from UART
CCC
Then please press CTRL+A, S
and type u-boot.img
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
as patch
gpio: search for gpio label if gpio is not found through bank name
is now in mainline, but functionality is disabled, we
need to enable
CONFIG_DM_GPIO_LOOKUP_LABEL
for the aristainetos boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog
can be started by wdt command. But the imx watchdog driver only
support start with the default timeout.
This commit adds the support for setting the timeout which pass from
the wdt command into the imx watchdog. If the timeout out of the
valid range(0.5~128s), start the watchdog with a timeout within the
valid range and the timeout is the one which closest to the passed
timeout.
Signed-off-by: Yuezhang.Mo <yuezhang.mo@sony.com>
Reviewed-by: Andy.Wu <Andy.Wu@sony.com>
Reviewed-by: stefano Babic <sbabic@denx.de>
Quoting Ye Li from NXP:
"We have confirmed with PMIC team, 0x35 is used only on early chips
and not used any more. 0x25 is the final address."
Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Even if the HAB fuse is not set we want to be able to use the Cryptographic
Accelerator and Assurance Module (CAAM) for generating random numbers. So
SYS_FSL_HAS_SEC should be selected even if IMX_HAB is not set.
arch_misc_init() has to be called to initialize the CAAM.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current URL for the pico imx6ul board is not valid anymore. Change
to a different URL that works.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Current mxc_gpio DM driver allocates the platdata in bind function to
handle both OF_CONTROL enabled case and disabled case. This implementation
puts the devfdt_get_addr in bind, which introduces much overhead especially
in board_f phase.
Change the driver to a common way for handling the cases by using
ofdata_to_platdata and using DM framework to allocate platdata.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add SCFW API sc_misc_get_boot_container to get current boot container
set index.
The index value returns 1 for primary container set, 2 for secondary
container set.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
i.MX platforms provide large AHB mapped space for QSPI, each
controller has 256MB. However, current driver only maps small
size (AHB buffer size) of AHB space, this implementation
causes i.MX failed to boot M4 with QSPI XIP image.
Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX)
to address above problem.
When the config is set:
1. Full AHB space is divided to each CS.
2. A dedicated LUT entry is used for AHB read only.
3. The MODE instruction in LUT is replaced to standard ADDR instruction
4. The address in spi_mem_op is used to SFAR and AHB read
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Add compatible string and driver data for i.MX7ULP.
Meanwhile, the address set to SFA1AD/SFA2AD/SFB1AD/SFB2AD should
align with 1KB, because the lowest 10 bits are reserved by the
registers definition.
For i.MX7ULP which has only 128Bytes AHB buffer, must align it
when setting the registers and selecting cs.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
While the general policy of not taking changes to the project via pull
requests directly on GitHub has not changed, it can be useful to submit
a PR there in order to trigger a CI run on Azure. These are run
automatically and the results are populated back to GitHub. Add a note
to the template to reflect this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert pcm058 support to use device trees and the driver model.
Add rudimentary boot scripts to the environment, expand README.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Add Phytec Mira device tree files, for use with pcm058.
>From Linux 5.6, commit 7111951b8d49 upstream
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
As per the SD physical layer specification version 7.10, erase
command (CMD38) and stop transmission command (CMD12) will generate
R1b response.
R1b = R1 + busy signal
A non-zero value after the R1 response indicates card is ready for
next command.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Erase block start address (CMD32) and erase block end address (CMD33)
command will generate R1 response for mmc SPI mode.
R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response
for this commands.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Send status command (CMD13) will send R1 response under SD mode
but R2 response under SPI mode.
R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
R1 response is 1 byte long for mmc SPI commands as per the updated
physical layer specification version 7.10.
So correct the resp and resp_size for existing commands
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.
When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Tested-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
We use non-dm code to configure the clk settings in order to simplify
dm clk driver in future, so remove the duplicated code from clk driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To fused part, we need to disable nodes of dtb to let kernel boot.
To mfgtool, USB issue when using super-speed for mfgtool, temporally
work around the problem to use high-speed only.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To use one defconfig for all boot device, we have to runtime set
env offset and return env medium according to the boot device.
This patch overrides the env_get_offset and env_get_location to
implement the feature.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
iMX8MP has 6 fused parts in each qualification tier, with core, VPU,
ISP, NPU or DSP fused respectively.
The configuration tables for enabled modules:
MIMX8ML8DVNLZAA Quad Core, VPU, NPU, ISP, DSP
MIMX8ML7DVNLZAA Quad Core, NPU, ISP
MIMX8ML6DVNLZAA Quad Core, VPU, ISP
MIMX8ML5DVNLZAA Quad Core, VPU
MIMX8ML4DVNLZAA Quad Lite
MIMX8ML3DVNLZAA Dual Core, VPU, NPU, ISP, DSP
Add the support in U-Boot
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
ROM SError happens on two cases:
1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
when ROM patch lock is fused, this write will cause SError.
2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
is field return mode, but the last 4K of ROM is still protected and cause
SError.
Since ROM mask SError until ATF unmask it, so then ATF always meets the
exception. This patch works around the issue in SPL by enabling SPL
Exception vectors table and the SError exception, take the exception
to eret immediately to clear the SError.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the
weak function in driver
Add set_clk_eqos to configure eQoS clk
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Current DM CLK is a bit complicated, for simplity, let DM clk only
support enable/disable/get_rate. For the expected rate settings,
we use non-DM clk to do that. Then we could have simple DM clk for
i.MX and could also share between SPL/U-Boot proper.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
A53 CCM root max support 1GHz, to support high freq, we need
to switch ARM clk sources from ARM PLL directly.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add clocks for FEC and flexspi, and add set parent clock callback,
so DTS can assign clocks
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add USB relevant clocks to support usb clock settings for both
DM USB host and gadget drivers
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add set clock parent support.
Add ENET and flexspi related clocks to support assigned clocks
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add logic to automatically update umctl2's setting based
on phy training CDD value for rank to rank space issue
Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
the DRAM Controller in i.MX8MP will support a feature called "Inline ECC".
This is supported for all 3 supported DRAM technologies (LPDDR4, DDR4 and
DDR3L). When this feature is enabled by software, the DRAM Controller
reserves 12.5% of DRAM capacity for ECC information, and presents only
the non-ECC portion (lower 87.5% of the installed capacity of DRAM) to
the rest of the SoC.
The DRAM memory can be divided into 8 regions so that if a use case only
requires ECC protection on a subset of memory, then only that subset of
memory need support inline ECC. If this occurs, then there is no
performance penalty accessing the non-ECC-protected memory (no need to
access ECC for this portion of the memory map). This is all configured
with the DRAM Controller.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The 'selfref_en' should be bit'0', so correct the setting to
enable the auto self-refresh.
Reviewed-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There is no DDR_SS_GPR0 exits on i.MX8MN, so skip setting
this register on i.MX8MN.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Pull request for UEFI sub-system for efi-2020-10-rc1 (3)
Up to now UEFI variables where stored in U-Boot environment variables.
Saving UEFI variables was not possible without saving the U-Boot
environment variables. With this patch series file ubootefi.var in the
EFI system partition is used for saving UEFI variables. Furthermore the
UEFI variables are exposed for reading at runtime.
Code corrections for UEFI secure boot are provided.
A buffer overrun in the RSA library is fixed.
Replace the function spl_board_prepare_for_boot_linux by the correct
name of the weak function spl_board_prepare_for_linux defined in spl.h.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
In commit commit d2c05f50e1 ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
was changed 3.0V IO voltage to 3.3V but it was not done on all places in
omap_hsmmc driver. That commit broke eMMC support on Nokia N900.
This patch fixes that problematic commit and changes 3.0V to 3.3V on all
remaining places in omap_hsmmc driver.
Fixes: d2c05f50e1 ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Faiz Abbas <faiz_abbas@ti.com>
Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose
about what it does. Change that by wrapping the call to k3_fit_atf.sh
into a cmd, also using that chance to reduce duplicate lines of makefile
code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
There are two options that are currently whitelisted, but they
are redundant, because there are not necessary since Kconfig options
exist to basically state the same thing.
CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and
only used by the da850 when booting from NOR, however the only time
CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since
NOR doesn't need SPL, the options for SPL can be moved to a check for
building SPL instead of checking for NOR.
This patch removes the checks for these two config options and unifies
the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH.
Since this board is the only board that uses these two config options,
they can be removed from the whitelist table.
Signed-off-by: Adam Ford <aford173@gmail.com>
The documentation states that SPL is enabled in all config options
for the da850. This incorrect, because devices booting from NOR
do not need the SPL to do the low level initializion because when
booting from NOR, the board is able to execute in place (XIP)
This also clarifies that SPL isn't only used for booting from SPI,
because it is also used for booting from MMC and NAND for those
devices supporting those boot options.
Signed-off-by: Adam Ford <aford173@gmail.com>
We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.
As a good side effect, all boot stages now use exposed RING mode which
avoid maintaining proxy mode for 32 bit R5 core.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
In K3 UDMA architecture, RX rings are associated with RX flows rather
than RX channels, therefore move the ring pointers to udma_rflow struct
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Encapsulate channel configuration in a separate struct so as to ease
resetting of these fields with memset() and also to increase readability
of the code.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
In preparation of adding more K3 SoCs, separate soc specific
initialization add a SoC specific initialization hook.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most case Rings are used with DMA channels which required
to request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Move the free, occ, windex and rinfex under a struct.
We can use memset to zero them and it will allow a cleaner way to extend
the variables for duplex rings.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi
files.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Update driver to use static PSIL endpoint Data instead of DT. This will
allow DT bindings to be in sync with kernel's DT.
Note that this patch breaks networking and OSPI boot as driver changes
are not backward compatible with existing DT. Subsequent commit will
update the DT to make it compatible with updated driver.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Much of PSIL endpoint configuration for a given SoC can be known at
compile time, therefore pass them for platform specific data instead of
DT.
Add per SoC's specific PSIL endpoint data. This is to bring driver in
sync with upstream DT.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
As variable services are available at runtime we have to expect EFI_SUCCESS
when calling the services.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Saving UEFI variable as encoded U-Boot environment variables does not allow
implement run-time support.
Use a memory buffer for storing UEFI variables.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Saving UEFI variable as encoded U-Boot environment variables does not allow
support at runtime.
Provide functions to manage a memory buffer with UEFI variables.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If the EFI_OPTIONAL_PTR is set in DebugDisposition, a NULL pointer does not
constitute an invalid parameter.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We need ConvertPointer() to adjust pointers when implementing runtime
services within U-Boot.
After ExitBootServices() gd is not available anymore. So we should not use
EFI_ENTRY() and EFI_EXIT().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Persist non-volatile UEFI variables in a file on the EFI system partition.
The file is written whenever a non-volatile UEFI variable is changed after
initialization of the UEFI sub-system.
The file is read during the UEFI sub-system initialization to restore
non-volatile UEFI variables.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In audit mode the UEFI variable SecureBoot is set to zero but the
efi_secure_boot flag is set to true.
The efi_secure_boot flag should match the UEFIvariable SecureBoot.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Set the read only property of the UEFI variables AuditMode and DeployedMode
conforming to the UEFI specification.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
According to the UEFI specification the variable VendorKeys is 1 if the
"system is configured to use only vendor-provided keys".
As we do not supply any vendor keys yet the variable VendorKeys must be
zero.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Do not change the value of parameter attributes in function
efi_set_variable_int(). This allows to use it later.
Do not use variable attr for different purposes but declare separate
variables (attr and old_attr).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simplify the implementation of the UEFI boot manager:
* avoid EFI_CALL for SetVariable() and GetVariable()
* remove unnecessary type conversions
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
UEFI variables OsIndicationsSupported, PlatformLangCodes should be read
only.
Avoid EFI_CALL() for SetVariable().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Separate the remaining UEFI variable API functions GetNextVariableName and
QueryVariableInfo() from internal functions implementing them.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Let the 'printenv -e' command display the read only flag.
If the variable is time authenticated write the time stamp.
Avoid EFI_CALL() when calling SetVariable() and GetVariable().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We currently have two implementations of UEFI variables:
* variables provided via an OP-TEE module
* variables stored in the U-Boot environment
Read only variables are up to now only implemented in the U-Boot
environment implementation.
Provide a common interface for both implementations that allows handling
read-only variables.
As variable access is limited to very few source files put variable
related definitions into new include efi_variable.h instead of efi_loader.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Allocated tmpbuf_cluster dynamically to reduce the data size added by
compiling with CONFIG_FAT_WRITE.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Commit 1b6c08548c ("efi_loader: image_loader: replace debug to
EFI_PRINT") leads to a build warning on 32bit systems:
lib/efi_loader/efi_image_loader.c: In function ‘efi_image_parse’:
include/efi_loader.h:123:8: warning: format ‘%lu’ expects argument
of type ‘long unsigned int’, but argument 8 has
type ‘size_t’ {aka ‘unsigned int’} [-Wformat=]
Use %zu for printing size_t.
Fixes: 1b6c08548c ("efi_loader: image_loader: replace debug to
EFI_PRINT")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
There's 2 variables in efi_get_next_variable_name() checking the size of
the variable name. Let's get rid of the reduntant definition and
simplitfy the code a bit.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This function will be used to implement public_key_verify_signature()
in a later patch. rsa_verify() is not suitable here because calculation
of message digest is not necessary.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signature database (db or dbx) may have not only certificates that contain
a public key for RSA decryption, but also digests of signed images.
In this test case, if database has an image's digest (EFI_CERT_SHA256_GUID)
and if the value matches to a hash value calculated from image's binary,
authentication should pass in case of db, and fail in case of dbx.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Use defined time stamps for sign-efi-sig-list.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In this test case, an image is signed multiple times with different
keys. If any of signatures contained is not verified, the whole
authentication check should fail.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Provide a defined time stamp for dbx_hash1.auth.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Revocation database (dbx) may have not only certificates, but also
message digests of certificates with revocation time
(EFI_CERT_X509_SHA256_GUILD).
In this test case, if the database has such a digest and if the value
matches to a certificate that created a given image's signature,
authentication should fail.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Set defined time stamp for dbx_hash.auth.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Split the existing test case-1 into case1 and a new case-2:
case-1 for non-SecureBoot mode; case-2 for SecureBoot mode.
In addition, one corner case is added to case-2; a image is signed
but a corresponding certificate is not yet installed in "db."
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Python's autopep8 can automatically correct some of warnings from pylint
and rewrite the code in a pretty print format. So just do it.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In case that a type of certificate in "db" or "dbx" is
EFI_CERT_X509_SHA256_GUID, it is actually not a certificate which contains
a public key for RSA decryption, but a digest of image to be loaded.
If the value matches to a value calculated from a given binary image, it is
granted for loading.
With this patch, common digest check code, which used to be used for
unsigned image verification, will be extracted from
efi_signature_verify_with_sigdb() into efi_signature_lookup_digest(), and
extra step for digest check will be added to efi_image_authenticate().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
A signed image may have multiple signatures in
- each WIN_CERTIFICATE in authenticode, and/or
- each SignerInfo in pkcs7 SignedData (of WIN_CERTIFICATE)
In the initial implementation of efi_image_authenticate(), the criteria
of verification check for multiple signatures case is a bit ambiguous
and it may cause inconsistent result.
With this patch, we will make sure that verification check in
efi_image_authenticate() should pass against all the signatures.
The only exception would be
- the case where a digest algorithm used in signature is not supported by
U-Boot, or
- the case where parsing some portion of authenticode has failed
In those cases, we don't know how the signature be handled and should
just ignore them.
Please note that, due to this change, efi_signature_verify_with_sigdb()'s
function prototype will be modified, taking "dbx" as well as "db"
instead of outputing a "certificate." If "dbx" is null, the behavior would
be the exact same as before.
The function's name will be changed to efi_signature_verify() once
current efi_signature_verify() has gone due to further improvement
in intermediate certificates support.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
There are a couple of occurrences of hash calculations in which a new
efi_hash_regions will be commonly used.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Since the size check against an entry in efi_search_siglist() is
incorrect, this function will never find out a to-be-matched certificate
and its associated revocation time in the signature list.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Since the certificate table, which is indexed by
IMAGE_DIRECTORY_ENTRY_SECURITY and contains authenticode in PE image,
doesn't always exist, we should make sure that we will retrieve its pointer
only if it exists.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
UEFI specification requires that we shall support three type of
certificates of authenticode in PE image:
WIN_CERT_TYPE_EFI_GUID with the guid, EFI_CERT_TYPE_PCKS7_GUID
WIN_CERT_TYPE_PKCS_SIGNED_DATA
WIN_CERT_TYPE_EFI_PKCS1_15
As EDK2 does, we will support the first two that are pkcs7 SignedData.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
UniPhier SoC updates for v2020.10
- remove workaround for Cortex-A72
- increase U-Boot proper size to 2MB
- sync DT with Linux
- add system bus controller driver
- improve serial driver
- add reset assertion to Denali NAND driver
Now that commit 3e57f879ee ("mtd: nand: raw: denali: Assert reset
before deassert") added the reset assertion, this code in the board
file is unneeded.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fixed delay 200us is not working in certain platforms. Change to
poll for reset completion status to have more reliable reset process.
Controller will set the rst_comp bit in intr_status register after
controller has completed its reset and initialization process.
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Radu Bacrau <radu.bacrau@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Always put the controller in reset, then take it out of reset.
This is to make sure controller always in reset state in both SPL and
proper Uboot.
This is preparation for the next patch to poll for reset completion
(rst_comp) bit after reset.
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Radu Bacrau <radu.bacrau@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This UART controller is integrated with a FIFO. Enable it.
You can put the next character into the FIFO while the transmitter
is sending out the current character. This works slightly faster.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Ensure the transmitter is empty when chaining the baudrate or any
hardware settings. If a character is remaining in the transmitter,
the console will be garbled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
After all, I am not a big fan of using a structure to represent the
hardware register map.
You do not need to know the entire register map.
Add only necessary register macros.
Use FIELD_PREP() instead of maintaining a pair of shift and mask.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Now that this directory contains only uniphier_sbc_boot_is_swapped(),
move it to boot-device.c and delete the sbc/ directory entirely.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Since commit 1517126fda ("ARM: uniphier: select DM_ETH"), DM-based
drivers/net/smc911x.c is compiled, but it is never probed because the
parent node lacks the DM-based driver.
I need a skeleton driver to populate child devices (but the next commit
will move more hardware settings to the this driver).
I put this to drivers/bus/uniphier-system-bus.c because this is the
same path as the driver in Linux kernel.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I actually do not see this used these days because eMMC or NAND is used
for non-volatile devices. Dump the burden to maintain this crappy code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This was used by the old sLD3 SoC, the support of which was removed
by commit 00aa453ebf ("ARM: uniphier: remove sLD3 SoC support").
There is no more user of this function.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, the supports for the following two ARMv7 SoC groups
are exclusive, because the boot ROM loads the SPL to a different
address:
- LD4, sLD8 (SPL is loaded at 0x00040000)
- Pro4, Pro5, PXs2, LD6b (SPL is loaded at 0x00100000)
This limitation exists only when CONFIG_SPL=y.
Instead of using crappy CONFIG options, checking SPL and SPL_TEXT_BASE
is cleaner.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I increased the maximum U-Boot proper size from time to time, but
configs/uniphier_v7_defconfig hit the current limit 832KB.
Some historical info:
In the initial support, the max size was 512MB.
Commit 58d702274c ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN")
increased it to 576KB, and commit 3ce5b1a8d8 ("ARM: uniphier: move
SPL stack address") moved the SPL stack location to avoid the memory
map conflict. It was the solution to increase the size without changing
the NOR boot image map.
commit 1a4bd3a095 ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN
again") ended up with increasing the max size again, breaking the NOR
boot image map. The limit was set to 832KB, otherwise the SPL stack
would overwrite the U-Boot proper image:
CONFIG_SPL_STACK - CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header) = 0xd0000
To increase CONFIG_SYS_MONITOR_LEN even more, the SPL stack must be
moved somewhere. I put it back to the original location prior to
commit 3ce5b1a8d8.
With this change, there is no more practical size limit.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This reverts commit 45f41c134b.
This weird workaround was the best I came up with at that time
to boot U-Boot from TF-A.
I noticed U-Boot successfully boots on LD20 (i.e. CA72 CPU) by using
the latest TF-A.
Specifically, since the following TF-A commit, U-Boot runs at EL2
instead of EL1, and this issue went away as a side-effect.
|commit f998a052fd94ea082833109f25b94ed5bfa24e8b
|Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|Date: Thu Jul 25 10:57:38 2019 +0900
|
| uniphier: run BL33 at EL2
|
| All the SoCs in 64-bit UniPhier SoC family support EL2.
|
| Just hard-code MODE_EL2 instead of using el_implemented() helper.
|
| Change-Id: I7ab48002c5205bc8c013e1b46313b57d6c431db0
| Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
However, if I reverted that, this problem would come back, presumably
because some EL1 code in U-Boot triggers this issue.
Now that commit f8ddd8cbb5 ("arm64: issue ISB after updating system
registers") fixed this issue properly, this weird workaround is no
longer needed irrespective of the exception level at which U-Boot runs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Call pytest3 with argument -ra to display the reason why Python tests are
skipped.
The -r flag displays a test summary info for each test. -ra eliminates
this info for passed tests.
Pros an cons were discussed in:
https://lists.denx.de/pipermail/u-boot/2020-June/417090.html
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM
32bit mode, this region is mapped at 0xff800000 CPU virtual address.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
On build with 32 bit, there is a warning for int-to-pointer-cast.
Fix the int to pointer cast by using uintptr_t.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Provide function for setting arbitrary virtual-physical MMU mapping
and cache settings for the given region.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move ADDR_MAP related config options from include/configs/*.h to the
proper place in lib/Kconfig. This has been done using
./tools/moveconfig.py and manual inspection of the generated changes.
This is a preparation to use ADDR_MAP helper on ARM 32bit Raspberry Pi4
board for mapping the PCIe XHCI MMIO, which is above the 4GiB identity
mapping limit.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Supporting USB keyboards out of the box is both handy for development
and production. Notably if u-boot is used to boot into GRUB.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[mb: drop rpi_4_32b_defconfig hunk]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[mb: squash fix to only build xhci_reset_hw() if CONFIG_DM_BUS]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
This is required in order to access the reset controller used to
initialize the board's xHCI chip.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
may either be loaded directly from an EEPROM or, if not present, by the
SoC's VideCore (the SoC's co-processor). Introduce the function that
informs VideCore that VL805 may need its firmware loaded.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
This patch adds basic driver PCI Express controller found on Broadcom
set-top-box SoCs, e.g. BCM2711.
The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI
handling removed. The inbound access memory region is not currently
parsed from dma-ranges DT property and a fixed 3GB region is used.
The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
USB Host Controller.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
an in depth explanation and two fixes from Johannes Berg:
e7d4a95da86e0 "bitfield: fix *_encode_bits()",
37a3862e12382 "bitfield: add u8 helpers".
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[s.nawrocki: added empty lines between functions and macros]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[mb: squash fix including byteorder.h]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
All SPI drivers are converted to DM_SPI but 3 drivers
still operate in nondm mode for SPL due to footprint
constraints.
Update the migration status for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Drop the nondm code from kirkwood_spi.c since there
is no board or any other code using for it.
Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Currently dtoc does not support the property cd-gpios used to declare
the gpios for card detect in mmc.
This patch adds support to cd-gpios property.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Several MMC drivers use GPIO for card detection with cd-gpios property in
the MMC node pointing to a GPIO node. However, as U-Boot tries to save
space by keeping only required nodes using u-boot* properties, several
devices tree result in having only in the MMC node but not the GPIO node
associated to cd-gpios.
This patch, fixes several ocurrence of this issue.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Update documentation to reflect the new phandle support when OF_PLATDATA
is used. Now phandles are implemented as pointers to U_BOOT_DEVICE,
which makes it possible to get a pointer to the actual device.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the current implementation, when dtoc parses a dtb to generate a struct
platdata it converts the information related to linked nodes as pointers
to struct platdata of destination nodes. By doing this, it makes
difficult to get pointer to udevices created based on these
information.
This patch extends dtoc to use struct driver_info when populating
information about linked nodes, which makes it easier to later get
the devices created. In this context, reimplement functions like
clk_get_by_index_platdata() which made use of the previous approach.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to be able to update data in u_boot_list, move this section to
make it RW.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently when creating an U_BOOT_DEVICE entry a struct driver_info
is declared, which contains the data needed to instantiate the device.
However, the actual device is created at runtime and there is no proper
way to get the device based on its struct driver_info.
This patch extends struct driver_info adding a pointer to udevice which
is populated during the bind process, allowing to generate a set of
functions to get the device based on its struct driver_info.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to prepare for a new support of phandle when OF_PLATDATA is used
drop the const for struct driver_info as this struct will need to be
updated on runtime.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the documentation with the support for driver aliases using
U_BOOT_DRIVER_ALIAS.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As dtoc now performs checks for valid driver names, when running dtoc
tests several warnings arise as these tests don't use valid driver
names.
This patch adds an option to disable those warning, which is only
intended for running tests.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently dtoc scans dtbs to convert them to struct platdata and
to generate U_BOOT_DEVICE entries. These entries need to be filled
with the driver name, but at this moment the information used is the
compatible name present in the dtb. This causes that only nodes with
a compatible name that matches a driver name generate a working
entry.
In order to improve this behaviour, this patch adds to dtoc the
capability of scan drivers source code to generate a list of valid driver
names and aliases. This allows to generate U_BOOT_DEVICE entries using
valid driver names and rise a warning in the case a name is not valid.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Open files in utf-8 mode:
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently when using OF_PLATDATA the binding between devices and drivers
is done trying to match the compatible string in the node with a driver
name. However, usually a single driver supports multiple compatible strings
which causes that only devices which its compatible string matches a
driver name get bound.
To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro,
which generates no code at all, but allows an easy way to declare driver
name aliases. Thanks to this, dtoc could be improve to look for the driver
name based on its alias when it populates the U_BOOT_DEVICE entry.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add missing information about internal class members in order to make
the code easier to follow.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.
In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour:
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds a test case to test the functionality of the fdtdec API
fdtdec_add_reserved_memory().
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add DECLARE_GLOBAL_DATA_PTR since it is referenced in the test codes.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When printing the device tree we want to get an output that can be used as
input for the device tree compiler. This requires that we do not write
bogus lines like
pcie@10000000 {
interrupt-map = * 0x4000127c [0x00000280];
For instance the QEMU virt device has a property interrupt-map with 640
bytes which exceeds CMD_FDT_MAX_DUMP=64.
So lets do away with the artificial limitation to 64 bytes.
As indicated in commit f0a29d4331 ("fdt: Limit printed hex in fdt print
and list commands") if a device tree contains binary blobs, it may still
be desirable to limit the output length. Provide environment variable
fdt_max_dump for this purpose.
Fixes: 5d927b4286 ("Kconfig: Drop CONFIG_CMD_FDT_MAX_DUMP")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the BIT() macro when creating a bitmask for the logging fields.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The name of the function emitting a log message may be of interest for a
developer but is distracting for normal users. See the example below:
try_load_entry() Booting: Debian
Make the default format for log messages customizable. By default show
only the message text.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Collect the 'checkpatch type' from each error, warning and check. Provide
this to patman and update the uclass test to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is quite likely that the number of U-Boot-specific tests in
checkpatch.pl will increase over time. We should have tests for these to
avoid undefined behaviour and bugs being introduced, which might cause
people to ignore the warnings.
Add a simple new class that can generate a patch with a single-line
addition in it. Use that to add a test for one of the checkpatch checks.
Signed-off-by: Simon Glass <sjg@chromium.org>
These tests check checkpatch.pl operation and can server as our tests for
the U-Boot-specific updates to that script. Rename the file and update
comments to indicate this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This parameter should be a struct uclass, not struct udevice. Correct it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
If CONFIG_SPL_DM=n and CONFIG_SPL_LOG=y a build error occurs:
ld.bfd: common/built-in.o: in function `log_get_cat_name':
common/log.c:48: undefined reference to `uclass_get_name'
make[1]: *** [scripts/Makefile.spl:422: spl/u-boot-spl] Error 1
Call uclass_get_name() only if DM is enabled.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Up to now the RAM size of the sandbox is hard coded as 128 MiB. This does
not allow testing the correct handling of addresses outside the 32bit
range. 128 MiB is also rather small when tracing functions where the trace
is written to RAM.
Provide configuration variable CONFIG_SANDBOX_RAM_SIZE_MB to set the RAM
size in MiB. It defaults to 128 MiB with a minimum of 64 MiB.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This module doesn't need to import itself. It causes problems on
very old Python 3 (e.g. 3.4.0). Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pass this module in so that settings does not need to import it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
Adjust the get_maintainer module to accept a list of directories to search
for the script. This avoids needing to import gitutil.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
Only a few members of this class are used and only in a test. To avoid
importing the module, convert the test to use a dict.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stefan Bosch <stefan_b@posteo.net>
This seems to cause problems in some cases. Split the dependency by
copying the code to command.
Reported-by: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
Compiling drivers/mtd/spi/sandbox.c fails when compiled with
CONFIG_LOG=n:
In file included from include/common.h:20,
from drivers/mtd/spi/sandbox.c:13:
drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of
type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=]
295 | log_content(" cmd: transition to %s state\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
37 | #define pr_fmt(fmt) fmt
| ^~~
include/log.h:128:30: note: in expansion of macro ‘log_nop’
128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \
| ^~~~~~~
drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro
‘log_content’
295 | log_content(" cmd: transition to %s state\n",
| ^~~~~~~~~~~
drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here
295 | log_content(" cmd: transition to %s state\n",
| ~^
| |
| char *
| %d
Supply function sandbox_sf_state_name() independent of CONFIG_LOG.
Fixes: c3aed5db59 ("sandbox: spi: Add more logging")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
assert() only works in debug mode. So checking a successful memory
allocation should not use assert().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable QE bit for ISSI flash chips.
QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The spi bitbanging driver did not implement all spi modes properly. Add
code to support all spi modes, honoring soft_spi_set_mode() and
defaulting to spi mode 0. Previously, CPHA was implemented inversely
(defaulting to CPHA=1) and CPOL=1 was hardcoded.
Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
DM, OF_CONTROL, DM_SPI and other driver model migration
deadlines are expired for this board.
Remove it.
Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Remove it.
Cc: Gilles Gameiro <gilles@gigadevices.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Drop it.
Cc: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.
Drop it.
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
- Add two- and three-argument versions of CONFIG_IS_ENABLED in
linux/kconfig.h
- Adds a new feature which supports copying modified parts of
the frame buffer to the uncached hardware buffer
- Enable the copy framebuffer on various x86 targets
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Some PCI Express register offsets are currently defined in multiple
drivers, move them to a common header to avoid re-definitions and
as a pre-requisite for adding new PCIe driver.
While at it replace some spaces with tabs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.
This patch fixes operation of the XHCI controller on RPI4 Broadcom
BCM2711 SoC based board, where the VL805 USB XHCI controller is
connected to the PCIe Root Complex, which is attached to the system
through the SCB bridge.
Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely
the 64-bit wide register accesses initiated by the CPU are not properly
translated to a sequence of 32-bit PCIe accesses.
xhci_readq(), for example, always returns same value in upper and lower
32-bits, e.g. 0xabcd1234abcd1234 instead of 0x00000000abcd1234.
Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
In current code there is no cache flush after initializing the scratchpad
buffer array with the scratchpad buffer pointers. This leads to a failure
of the "slot enable" command on the rpi4 board (Broadcom STB PCIe
controller + VL805 USB hub) - the very first TRB transfer on the command
ring fails and there is a timeout while waiting for the command completion
event. After adding the missing cache flush everything seems to be working
as expected.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
i2c changes for v2020.10
- Add support for I2C controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.
- Add I2C controller support for Cortina Access CAxxxx SoCs
- new rtc methods, rtc command, and tests
- imx_lpi2c: Improve the codes to use private data
- stm32f7_i2c.c: Add new compatible "st,stm32mp15-i2c"
- stm32f7_i2c.c: Add Fast Mode Plus support
- pwm: Add PWM driver for SiFive SoC
Since the mdio code got upstreamed it is not possible
to activate network ports on CP110 Master and Slave.
The problem is in mvpp2_base_probe which is called for each
CP110 and it initializes the buffer area for descs and rx_buffers.
This should only happen once though and the bd space is actually
set to 0 after the first run of the function.
This leads to an error when the second CP110 tries the initialization
again and disables all network ports on this CP110.
This patch adds a static variable to check if the buffer area is
initialized only once globally.
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch enables DM_ETH for the following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch enables DM_USB and USB_STORAGE for the following
Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch switches the SATA driver from mvsata_ide to sata_mv for the
following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch converts the following Kirkwood-based LaCie boards to DM,
DM_SPI and DM_SPI_FLASH:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The spi0 alias is needed by the environment code to retrieve the SPI
flash. This patch adds some -u-boot.dtsi files, providing the spi0
aliases, for all the following Kirkwood-based LaCie boards:
- d2 Network v2
- Internet Space v2
- 2Big Network v2
- Network Space v2
- Network Space Lite v2
- Network Space Max v2
- Network Space Mini v2
Note that this -u-boot.dtsi files will be removed as soon as the spi0
aliases will be available in the upstream Linux dtsi files.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The helios4 is built on the same microsom as the clearfog, by syncing the config
we enable the same featureset that exists in the som on the helios4. The current
config does not boot as some of the clearfog changes needed to be made on the
helios4 also, generally speaking most changes for the clearfog should also be
made on the helios4.
Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Reviewed-by: Stefan Roese <sr@denx.de>
When running USB compliance tests on our Armada-385 hardware platforms
we have seen some eye mask violations. Marvell's internal documentation
says: Based on silicon test results, it is recommended to change the
impedance calibration threshold setting to 0x6 prior to calibration.
Port changes from Marvell's u-boot fork[1] to address this.
[1] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/a6221551
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
At present the SPL loader is not included in the TPL image so SPL cannot
be loaded. Fix it by including this file for both SPL and TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: c87f9ce227 ("x86: Don't build some unused objects in TPL")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These prevent use of compile-time checks such as:
if (CONFIG_IS_ENABLED(DM_SPI))
since, for example, if CONFIG_SPL_DM_SPI is not enabled then the
definitions are not included by spi.h and the C code will not build.
The #ifdefs are unnecessary since there are no conflicts with the pre-DM
code. In any case we have almost switched over to driver model for SPI.
Drop these #ifdefs from spi.h to fix a build warning on chromebook_coral
in the following patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This adds a bunch of preprocessor magic to extend the capabilities of
CONFIG_IS_ENABLED. The existing semantics of
CONFIG_IS_ENABLED(FOO)
expanding to a 1 or 0 (depending on build context and the defined-ness
or not of the appropriate CONFIG_FOO/CONFIG_SPL_FOO/CONFIG_TPL_FOO)
are of course preserved. With this, one is also allowed a two-argument
form
CONFIG_IS_ENABLED(FOO, (something))
which expands to something precisely when CONFIG_IS_ENABLED(FOO) would
expand to 1, and expands to nothing otherwise. It is, in other words,
completely equivalent to the three lines
#if CONFIG_IS_ENABLED(FOO)
something
#endif
The second argument must be parenthesized in order to allow any
tokens, including a trailing comma, to appear - one use case for this
is precisely to make it a bit more ergonomic to build an array and
only include certain items depending on .config. That should increase
both readability and not least "git grep"ability.
A third variant is also introduced,
CONFIG_IS_ENABLED(FOO, (xxx), (yyy))
which corresponds to
#if CONFIG_IS_ENABLED(FOO)
xxx
#else
yyy
#endif
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot does not have loadable modules, and nothing currently uses any
of the (CONFIG_)?IS_(BUILTIN|MODULE) macros - only
the (CONFIG_)?IS_ENABLED variants are ever used.
While I understand the desire to keep this somewhat synchronized with
linux, we've already departed by the introduction of the
CONFIG_IS_ENABLED extra logic, and deleting these makes the next patch
much simpler, since I won't have to duplicate a lot of logic for no
real gain (as there are no users).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of using the arg1_or_junk trick to pick between two choices,
with a bit of duplication between the branches (and most of the
CONFIG_TPL_BUILD case being redundant, as _IS_TPL is known to be
defined to 1 in that case), simply define a prefix that we inject
between CONFIG_ and the given config symbol.
This only requires one level of indirection (to get the
_CONFIG_PREFIX macro expanded before the token concatenation takes
place), and makes it easy to, say, introduce a CONFIG_HOSTTOOL_
prefix. [I would expect most HOSTTOOL_ symbols to just be def_bool y,
but it would allow us to clean up some of the ifdef HOSTCC mess in the
sources shared between U-Boot and host tools.]
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add parentheses around CONFIG_IS_ENABLED() in the if statement, to
fix potential build failures.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
This seems like a more reasonable resolution for this board, since it is
quite slow. It also allows it to work with a 5" LCD display in my lab.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Update the video driver to support this feature and enable it on
minnowmax to speed up the display.
With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from over 13 seconds to
300ms, at 1280x1024.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Update the video driver to support this feature and enable it on link.
Also remove the multi-line scrolling since normal scrolling is fast enough
now.
With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from about 930ms to 29ms.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the video driver to support this feature and enable it on samus.
Also remove the multi-line scrolling since normal scrolling is fast enough
now.
With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from about 430ms to 12ms.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For PCI video devices that are not mentioned in the devicetree, U-Boot
does not bind a driver before relocation, since PCI is not fully probed
at that point. Furthermore it is possible for the video device to be on
a secondary bus which is not even scanned.
This is fine if the framebuffer is allocated in fixed memory, as it
normally is on x86. But when using this as a copy framebuffer, we also
need U-Boot to allocate its own cached framebuffer for working in. Since
the video driver is never bound before relocation, the framebuffer size
is never set and U-Boot does no allocation.
Add a new CONFIG option to reserve 16MB of memory for this eventuality.
This allows vesa devices to use the copy framebuffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present video_bottom is set to the bottom of each framebuffer when it
is allocated. This is not correct, since it should hold the bottom of the
entire area available for framebuffers.
Fix this by adding a private address in the uclass which keeps track of
the next available spot for a framebuffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
When the copy framebuffer is in use, we must also have the standard U-Boot
framebuffer available. Update the FSP driver to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
When using a copy framebuffer we need to tell the video subsystem its
address. U-Boot's normally allocated framebuffer is used as the working
buffer, but nothing is displayed until it is copied to the copy
framebuffer.
For this to work the video driver must request that a framebuffer be
allocated separately from the hardware framebuffer, so add a check for
that.
Also add a log category so that logging appears correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Enable this feature on sandbox by updating the SDL driver to have two
framebuffers.
Update the video tests to check that the copy framebuffer is kept in sync.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
This struct is not commented but needs it. Also fix the comment in
check_vidconsole_output() about the encoding for the rotation value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Adjust the bitmap code to sync to the copy framebuffer when done.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Add a convenience function to call video_sync_copy() for a vidconsole.
Also add a memmove() helper, which does the memmove() as well as the sync.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Update video_clear() to also sync to the copy framebuffer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This framebuffer is separately mapped. Update the video post-probe
function to set this up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Some architectures use a cached framebuffer and flush the cache as needed
so that changes are visible. This is supported by U-Boot.
However x86 uses an uncached framebuffer with a 'write-combining' feature
to speed up writes. Reads are permitted but they are extremely expensive.
Unfortunately, reading from the frame buffer is quite common, e.g. to
scroll it. This makes scrolling very slow.
Add a new feature which supports copying modified parts of the frame
buffer to the uncached hardware buffer. This speeds up scrolling by at
least 10x on x86 so the extra complexity cost seems worth it.
As a starting point, add the Kconfig, update the video structures to keep
track of the buffer and add a function to do the copy.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Add a few notes to explain the purpose of each member of this struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
All of the functions in this file only apply if DM_VIDEO is enabled. Drop
the #ifdef as it just clutters things up. Add the needed forward
declaration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present when the console is rotated 180 degrees it starts almost a
whole character to the left of the right edge (typically 7 pixels with
an 8-pixel-wide font). On a display which aligns with the font width,
this just wastes space. On a display that does not this can result in
x_frac going negative for the final character (the one on the left
side) and the overflow -EAGAIN check at the start of the function
failing.
Change the function to start at the rightmost pixel to fix these
problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The functions in this file do similar things but not always in the same
way. To make the code easier to read and compare, use a separate 'linenum'
variable in every function. This is then multiplied by the line length to
get the offset within the frame buffer to modify. Also use an 'x' variable
to hold the pixel position within that line. This is multipled by the
pixel size and added to the offset.
Also move the pbytes declaration up a little with the other long lines.
A side effect of splitting out these variables is that they are promoted
to int, i.e. a signed type, from the unsigned short used in the
vidconsole_priv struct. This would be necessary should any of the
variables go negative. At present this can actually happen in
console_putc_xy_2(), if the display width is not a multiple of the
character size (see next patch).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Add a devicetree property to select a rotated console. This uses the same
encoding as vidconsole itself: 0=normal; 1=90 degrees clockwise, 2=upside
down, 3=90 degrees anticlockwise.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
At present these functions fail silently even when debugging, which is not
very helpful. Add a way to print a message to the serial output when an
error is detected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In the video drivers it is useful to print errors while debugging but
doing so risks an infinite loop as the debugging info itself may go
through the video drivers.
Add a new console function that prints information only to the serial
device, thus making it safe for use in debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The APL FSP appears to leave the FPU in a bad state in that it has
registers in use. This causes an error when the next FPU operation is
performed.
Work around this by re-resetting the FPU after calling FSP-M. This allows
the freetype console to work correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC
This driver is simple port of Linux pwm sifive driver from Linux v5.6
commit: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM")
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Read SYSCFG bindings to set Fast Mode Plus bits if Fast Mode Plus
speed is selected.
Handle the stm32mp15 specific compatible to handle FastMode+
registers handling which is different on the stm32mp15 compared
to the stm32f7 or stm32h7.
Indeed, on the stm32mp15, the FastMode+ set and clear registers
are separated while on the other platforms (F7 or H7) the control
is done in a unique register.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add a new compatible "st,stm32mp15-i2c" introduced in Linux kernel v5.8
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add tests of the "list", "read" and "write" subcommands of the rtc
shell command.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
In order to allow adding unit tests of the rtc command, add it to the
various sandbox defconfigs.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Define a few aux registers and check that they can be read/written
individually. Also check that one can access the time-keeping
registers directly and get the expected results.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
It's more natural that any write that happens to touch the reset
register should cause a reset, rather than just a write that starts at
that offset.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
The current set method is broken; a simple test case is to first set
the date to something in April, then change the date to 31st May:
=> date 040412122020.34
Date: 2020-04-04 (Saturday) Time: 12:12:34
=> date 053112122020.34
Date: 2020-05-01 (Friday) Time: 12:12:34
or via the amending of the existing rtc_set_get test case similarly:
$ ./u-boot -T -v
=> ut dm rtc_set_get
Test: dm_test_rtc_set_get: rtc.c
expected: 31/08/2004 18:18:00
actual: 01/08/2004 18:18:00
The problem is that after each register write,
sandbox_i2c_rtc_complete_write() gets called and sets the internal
time from the current set of registers. However, when we get to
writing 31 to mday, the registers are in an inconsistent state (mon is
still 4), so the mktime machinery ends up translating April 31st to
May 1st. Upon the next register write, the registers are populated by
sandbox_i2c_rtc_prepare_read(), so the 31 we just wrote to mday gets
overwritten by a 1.
Fix it by writing all registers at once, and for consistency, update
the get method to retrieve them all with one "i2c transfer".
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Mostly as an aid for debugging RTC drivers, provide a command that can
be used to read/write arbitrary registers (assuming the driver
provides the read/write methods or their single-register-at-a-time
variants).
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This simply consists of renaming the existing pcf2127_read_reg()
helper to follow the naming of the other
methods (i.e. pcf2127_rtc_<method name>) and changing the type of its
"len" parameter.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Similar to how the dm_rtc_{read,write} functions fall back to using
the {read,write}8 methods, do the opposite in the rtc_{read,write}8
functions.
This way, each driver only needs to provide either ->read8 or ->read
to make both rtc_read8() and dm_rtc_read() work - without this, a
driver that provides ->read() would most likely just duplicate the
logic here for implementing a ->read8() method in term of its ->read()
method. The same remarks of course apply to the write case.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Similar to dm_rtc_read(), introduce a helper that allows the caller to
write multiple consecutive 8-bit registers with one call. If the
driver provides the ->write method, use that, otherwise loop using
->write8.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Some users may want to read multiple consecutive 8-bit
registers. Instead of each caller having to implement the loop,
provide a dm_rtc_read() helper. Also, allow a driver to provide a
->read method, which can be more efficient than reading one register
at a time.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Current driver calls the devfdt_get_addr to get the base address
of lpi2c controller in each sub-functions. Since the devfdt_get_addr
accesses the DTB and translate the address, it introduces much
overhead.
Improve the codes to use private variable which has recorded the
base address from probe.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
rsa_verify() expects a memory region and wants to do the hashing itself,
but there may be cases where the hashing is done via other means,
like hashing a squashfs rootfs.
So add rsa_verify_hash() to allow verifiying a signature against
an existing hash. As this entails the same verification routines
we can just move the relevant code over from rsa_verify() and also
call rsa_verify_hash() from there.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
It is useful to be able to find hex values and strings in a memory range.
Add a command to support this.
cmd: Fix 'md' and add a memory-search command
At present 'md.q' is broken. This series provides a fix for this. It also
implements a new memory-search command called 'ms'. It allows searching
memory for hex and string data.
END
Signed-off-by: Simon Glass <sjg@chromium.org>
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.
Fix up the code to take advantage of that, removing the preprocessor
conditions.
Also include the header file that defines MEM_SUPPORT_64BIT_DATA. It is
included by env.h in this file, but that might not last forever.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.
Fix up the code to take advantage of that, removing the preprocessor
conditions.
Also include the missing header file that defines MEM_SUPPORT_64BIT_DATA
Fixes: 0914011310 ("command: Remove the cmd_tbl_t typedef")
Signed-off-by: Simon Glass <sjg@chromium.org>
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.
Fix up the code to take advantage of that, removing the preprocessor
conditions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
It is a bit painful to have #ifdefs in the middle of the help for each
command. Add a macro to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Define this macro always so we don't need the preprocessor to check it.
Convert the users to #if instead of #ifdef.
Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the
macro is not define. It just assumes zero.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Replacing the ret variable with err and handling first the error
condition about the value returned by the spl_nand_fit_read routine,
improves the code readability.
Furthermore, the 'else' int the 'else return ret' instruction was
useless.
cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The offset at which the image to be loaded from NAND is located is
retrieved from the itb header. The presence of bad blocks in the area
of the NAND where the itb image is located could invalidate the offset
which must therefore be adjusted taking into account the state of the
sectors concerned.
cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
If uboot does not embed its device tree and the FIT loading function
returns error in case of failure in the FDT append, the redundant itb
image could be loaded.
cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Verifying FIT images obviously needs the rsa parts of crypto
support and while main uboot always compiles crypto support,
it's optional for SPL and we should thus select the necessary
option to not end up in compile errors like:
u-boot/lib/rsa/rsa-verify.c:328: undefined reference to `rsa_mod_exp'
So select SPL_CRYPTO_SUPPORT in SPL_FIT_SIGNATURE.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
rsa-checsum needs support for hash functions or else will run into
compile errors like:
u-boot/lib/rsa/rsa-checksum.c:28: undefined reference to `hash_progressive_lookup_algo'
So similar to the main FIT_SIGNATURE entry selects HASH,
select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
padding_pss_verify only works with the default pss salt setting of -2
(length to be automatically determined based on the PSS block structure)
not -1 (salt length set to the maximum permissible value), which makes
verifications of signatures with that saltlen fail.
Until this gets implemented at least document this behaviour.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
n, rr and rrtmp are used for internal calculations, but in the end
the results are copied into separately allocated elements of the
actual key_prop, so the n, rr and rrtmp elements are not used anymore
when returning from the function and should of course be freed.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When calculating rrtmp/rr rsa_gen_key_prop() tries to make
(((rlen + 31) >> 5) + 1) steps in the rr uint32_t array and
(((rlen + 7) >> 3) + 1) / 4 steps in uint32_t rrtmp[]
with rlen being num_bits * 2
On a 4096bit key this comes down to to 257 uint32_t elements
in rr and 256 elements in rrtmp but with the current allocation
rr and rrtmp only have 129 uint32_t elements.
On 2048bit keys this works by chance as the defined max_rsa_size=4096
allocates a suitable number of elements, but with an actual 4096bit key
this results in other memory parts getting overwritten.
So as suggested by Heinrich Schuchardt just use the actual bit-size
of the key as base for the size calculation, in turn making the code
compatible to any future keysizes.
Suggested-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
rrtmp needs 2 + (((*prop)->num_bits * 2) >> 5) array elements.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The exponent field of struct key_prop gets allocated an uint64_t,
and the contents are positioned from the back, so an exponent of
"0x01 0x00 0x01" becomes 0x0 0x0 0x0 0x0 0x0 0x1 0x0 0x1"
Right now rsa_gen_key_prop() allocates a uint64_t but sets exp_len
to the size returned from the parser, while on the other hand the
when getting the key from the devicetree exp_len always gets set to
sizeof(uint64_t).
So bring that in line with the established code.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Right now in multiple places there are only checks for the full
CONFIG_RSA_VERIFY_WITH_PKEY option, not split into main,spl,tpl variants.
This breaks when the rsa functions get enabled for SPL, for example to
verify u-boot proper from spl.
So fix this by using the existing helpers to distinguis between
build-steps.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
While the SPL may want to do signature checking this won't be
the case for TPL in all cases, as TPL is mostly used when the
amount of initial memory is not enough for a full SPL.
So on a system where SPL uses DM but TPL does not we currently
end up with a TPL compile error of:
lib/rsa/rsa-verify.c:48:25: error: dereferencing pointer to incomplete type ‘struct checksum_algo’
To prevent that change the $(SPL_) to $(SPL_TPL_) to distinguish
between both. If someone really needs FIT signature checking in
TPL as well, a new TPL_RSA_VERIFY config symbol needs to be added.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Even in boot scripts it may be needed to "panic" when all options
are exhausted and the device specification specifies hanging
instead of resetting the board.
So add a new panic command that just wraps around the core panic
call in U-Boot and can take an optional message.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add linefeeds before and after the announce string. This makes the
output easier to read, especially if some text follows the announce
message without a specific additional CR.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
tpm_tis_spi.c directly includes tpm_tis.h and tpm-v2.h which both
define the same enums (see e.g. TPM_ACCESS_VALID). Add an #ifndef to
prevent redeclaration errors.
Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
This solves a compatibility issue with Linux device trees
that contain TPMv2.x hardware. So it's easier to import DTS
from upstream kernel when migrating board init from C code
to DTS.
The issue is that fallback binding is different between Linux
and u-Boot.
Linux: "tcg,tpm_tis-spi"
U-Boot: "tis,tpm2-spi"
As there are currently no in-tree users of the U-Boot binding,
it makes sense to use Linux fallback binding.
Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
commit 2bd261dd17 ("gpio: search for gpio label if gpio is not found through bank name")
disabled DM_GPIO_LOOKUP_LABEL which is needed
in sandbox defconfigs, as we have tests for this
functionality.
Signed-off-by: Heiko Schocher <hs@denx.de>
The PHY needs a reset in order to be functionnal for U-Boot, add the old
PHY reset bindings for dwmac until we support the new bindings in the PHY node.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Odroid C4 is an Amlogic SM1 device, the board config and board documentation
are adapted from the Odroid-N2 support from the same vendor.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: fix odroid-c4.rst typos and structure]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
This imports the changes and the new Odroid-C4 board from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Add a proper Odroid-N2 board support to handle the Ethernet MAC
address stored in the in-SoC eFuses.
Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
SATA controller soldered on the board, providing two SATA ports.
Enable the driver and the sata command in the defconfig, to be able to
load images from SATA disks.
Tested by loading kernels and Grub/EFI from an SSD and successfully
booting a Linux system (with and without using UEFI).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
controller, which we configure already in board specific code to be ECAM
compliant. Hence we can just enable the generic ECAM driver to let
U-Boot use PCIe devices.
Add the respective options to the Juno defconfig to enable the PCI
framework and the generic ECAM driver, and initialise the driver upon
loading U-Boot.
Make some functions in the Juno PCIe init code static on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.
Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
The smc911X driver is now DM enabled, so we can switch the Juno board
over to use DM_ETH for the on-board Fast Ethernet device.
Works out of the box by using the DT.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
address from the optional EEPROM storage, but failed to copy this to the
platdata struct. Since it was also missing a definition of the
read_rom_hwaddr() function, the generic Ethernet code was dismissing
this MAC address, falling back to a random address or denying to start
at all.
Add an implementation of .read_rom_hwaddr, and refactor the function
reading the ROM address to be called by all interested parties.
This fixes MAC address issues when using the driver in DM_ETH "mode".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Similar to patch 821fec0ceb ("net: remove scary warning about EEPROM
provided MAC address") this removes the somewhat awkward "warning" on
boards using DM_ETH:
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.
If there is a properly provided MAC address (either from ROM or from DT),
remove the warning to not scare the user unnecessarily.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
crystal oscillator, so the frequency is not 25165824 MHz, as the current
code suggests.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Compiling with clang on ARMv8 shows errors like:
./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
^~
%w0
These errors are due to using an incorrect size for the variables used
for writing to and reading from special registers which have 64 bits on
ARMv8.
Mask off reserved bits when reading the exception level.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.
Use function set_gd() for setting the register on ARM.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Truncate file names if the buffer size is exceeded to avoid a buffer
overflow.
Use Sphinx style function description.
Add a TODO comment.
Reported-by: CID 303779
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
make the sleep time and the margin configurable.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
dm_gpio_lookup_name() searches for a gpio through
the bank name. But we have also gpio labels, and it
makes sense to search for a gpio also in the labels
we have defined, if no gpio is found through the
bank name definition.
This is useful for example if you have a wp pin on
different gpios on different board versions.
If dm_gpio_lookup_name() searches also for the gpio labels,
you can give the gpio an unique label name and search
for this label, and do not need to differ between
board revisions.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Don't enable by default]
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch adds MAC and PHY related configs (needed for proper
ethernet operations) for Action Semi S700 SoC.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This patch selects CONFIG_DM_ETH (ethernet driver is base on DM model)
for Action semi owl SoC.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This patch adds node for ethernet controller found on Action Semi OWL
S700 SoC.
Since, there is no upstream Linux binding exist for S700 ethernet
controller, Changes are put in u-boot specific dtsi file.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This patchs adds glue logic to enable designware mac present on
Action Semi based S700 SoC, Configures SoC specific bits.
Undocumented bit that programs the PHY interface select register
comes from vendor source.
It has been tested on Cubieboard7-lite based on S700 SoC.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have
specific Rx/Tx interface timings requirement for proper PHY operations.
These timing values are not documented anywhere and picked from vendor
code.
This commits lets proper packets to be transmitted over the network.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This patch adds support for Realtek PHY RTL8201F 10/100Mbs
(with variants: RTL8201FN and RTL8201FL) PHYceiver. It is
present on Actions Semi Cubieboard7 board.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
This commit adds clocks needed for ethernet operations for
Actions OWL family of SoCs (S700 and S900).
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Now that, we calculate SDRAM size by reading DDR registers,
"CONFIG_SYS_SDRAM_SIZE" is no more needed.
This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration
file.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Calculate the SDRAM size from DDR capacity register registers instead
of using hard-coded value. This is quite useful to get correct size
on differnt boards based on Actions OWL family of SoCs (S700 and S900).
There is no documentation available that talks about DDR registers, and
this is very much taken from vendor source.
This commit lets Linux boot on Cubieboard7-lite(based on S700).
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Add a command to print a list of available block device drivers,
and for each, the list of known block devices.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Renamed dm "drivers" subcommand to "compat" (as it listed
compatibility strings) and prevent it from segfaulting when
drivers have no of_match populated.
Added a new "drivers" subcommand to dump a list of all known DM
drivers and for each, their uclass id, uclass driver and names of
attached devices.
Added a new "static" subcommand to dump a list of DM drivers with
statically defined platform data.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added command "fstypes" to list supported/included filesystems.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Limit to sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add a subcommand "types" to the part command, which lists the supported
partition table types.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
- arch and board update for stm32mp15:
- use OPP information in device tree for 800MHz/650MHz support
- ram: inprovments of test command
- solve boot on closed chip when access to DBGMCU_IDC is protected
- stm32prog command: Add "device anme" during USB enumeration
- update configs: activate WATCHDOG and 'env erase' command,
increase teed partition, support SD card after NOR boot by default and
use env info in env_check
- some sboard cleanups: gpio hog in dh board, specific driver for
type-c stusb1600 controller code in a driver move part of code in spl.c
and in common directory
- fix STM32 compatible for dwc_eth_qos driver
- support of new pinctrl ops get_dir_flags/set_dir_flags in stm32 and stmfx
drivers
- vrefbuf: fix a possible overshoot when re-enabling
ARM Architecture reference manual clearly states that PE pipeline
should be flushed after changes to some system registers. Refer to
paragraph "B2.3.5 Memory Barriers" at page B2-92 of "Arm Architecture
Reference Manual ARMv8 for ARMv8-A Architecture Profile" (ARM DDI
0487B.a).
Failing to issue instruction synchronization barrier can lead to
spurious errors, like synchronous exception when accessing FPU
registers. This is very prominent on CPUs with long instruction
pipeline, like ARM Cortex A72.
This change fixes the following U-Boot panic:
"Synchronous Abort" handler, esr 0x1fe00000
elr: 00000000800948cc lr : 0000000080091e04
x0 : 00000000801ffdc8 x1 : 00000000000000c8
x2 : 00000000800979d4 x3 : 00000000801ffc60
x4 : 00000000801ffd40 x5 : ffffff80ffffffd8
x6 : 00000000801ffd70 x7 : 00000000801ffd70
x8 : 000000000000000a x9 : 0000000000000000
x10: 0000000000000044 x11: 0000000000000000
x12: 0000000000000000 x13: 0000000000000000
x14: 0000000000000000 x15: 0000000000000000
x16: 000000008008b2e0 x17: 0000000000000000
x18: 00000000801ffec0 x19: 00000000800957b0
x20: 00000000000000c8 x21: 00000000801ffdc8
x22: 000000008009909e x23: 0000000000000000
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 00000000801ffc50
Code: a94417e4 a90217e4 a9051fe6 a90617e4 (3d801fe0)
While executing instruction
str q0, [sp, #112]
in vsnprintf() prologue. This panic was observed only on Cortex A72 so
far.
This patch places ISBs on other strategic places as well.
Also, this probably is the right fix for the issue workarounded in the
commit 45f41c134b ("ARM: uniphier: add weird workaround code for LD20")
Reported-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Suggested-by: Julien Grall <julien.grall.oss@gmail.com>
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
CC: Tom Rini <trini@konsulko.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <julien@xen.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add size and addr parameter to test "All" to override the default
value (4kB and STM32_DDR_BASE) used in tests with these optional
parameters: [size] or [addr].
When other optional parameters are present before [addr],
they are replaced by default value:
- [loop] = "1"
- [pattern] = "-" (new: force default pattern)
Example to use:
DDR>test 0 1 0x20000
DDR>test 0 1 0x1000000 0xD0000000
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The test 4 = "AddressBus [size] [addr]" without parameter
detects alias for any address bit only when:
- size = real size of DDR
- addr = start of DDR = 0xC0000000
These value must be the default value when parameters are absent.
This patch sets bufsize to STM32_DDR_SIZE and get_bufsize() selects
the correct value for bufsize when this parameter is absent =
full size of the DDDR
On EV1 board :
DDR> test 4
running at 0xC0000000 length 0x40000000
On DK2 board
DDR> test 4
running at 0xC0000000 length 0x20000000
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a parameter addr in test FrequencySelectivePattern to select
the base address used to execute the tests.
Default value (when the parameter is absent) is STM32_DDR_BASE,
selected in get_addr() function.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add protection on minimum value for result of get_bufsize
and check the alignment of buffer size: only multiple min_size
is allowed; only 4 bytes alignment was checked previously
(value & 0x3).
For example the "Random" test raises an issue when size is not 8 bytes
aligned because address for buffer = address + size / 2 is not word
aligned.
This patch avoid test error for unsupported size value.
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate CMD_NVEDIT_INFO and use the new command "env info -d -p -q"
to automatically save the environment on first boot.
This patch allows to remove the env_default variable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Use the define ENV_IS_IN_DEVICE to test if one the
CONFIG_ENV_IS_IN_... is defined and correct the detection of
persistent storage support in the command "env info"
if CONFIG_ENV_IS_NOWHERE is activated.
Since commit 60d5ed2593c9 ("env: allow ENV_IS_NOWHERE with
other storage target") test CONFIG_ENV_IS_NOWHERE is not
enough; see also commit 953db29a1e9c6 ("env: enable saveenv
command when one CONFIG_ENV_IS_IN is activated").
This patch avoids issue for this command in stm32mp1 platform.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch update the current gpio hog implementation with
the new API gpio_hog_probe_all() activated with CONFIG_GPIO_HOG.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Migrate the ST Microelectronics STUSB160X Type-C controller code in
a generic I2C driver in st/common, based on Linux one in :
drivers/usb/typec/stusb160x.c
This patch simplifies the stm32mp1 board code and allows to reuse
this STUSB160X driver in other boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
In the boot command used in ST boards, bootcmd_stm32mp, only support
the SD card as second stage, where is found the bootfs with DISTRO.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
As debugger must be totally closed on Sec closed chip,
the DBGMCU_IDC register is no more accessible (self
hosted debug is disabled with OTP).
This patch adds a function bsec_dbgswenable() to check
if the DBGMCU registers are available before to access them:
BSEC_DENABLE.DBGSWENABLE = self hosted debug status.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add "Device Name" in iproduct during DFU USB enumeration
to have this information in STM32CubeProgrammer trace
(this tools is compatible with @Name since v2.3)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
With TEE 3.7.0, the partition teed (OP-TEE pageable
code and data) need to increase up to 512KB in NOR device.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Activate the command env erase to reset the environment with the command:
> env erase
it is simpler than:
> env default -a
> env save
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
There maybe an overshoot:
- when disabling, then re-enabling vrefbuf too quickly
- or upon platform reset as external capacitor maybe slow
discharging (VREFBUF is HiZ at reset by default).
VREFBUF is used by ADC/DAC on some boards. An overshoot on the reference
voltage make the conversions inaccurate for a short period of time. So:
- Don't put the VREFBUF in HiZ when disabling, to force an active
discharge.
- Enforce a 1ms OFF/ON delay, also upon reset
Penalty is a 1ms delay is applied (even for a cold boot), when enabling
VREFBUF.
Fixes: 93cf0ae775 ("power: regulator: Add support for stm32-vrefbuf")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
As kernel v5.6 have a solution since so we will be able to enable
the watchdog at boot time. It is reloaded by the watchdog
framework (if CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is set) and
until the userspace watchdog daemon takes over control.
Need presence of kernel patch 85fdc63fe256 ("drivers: watchdog:
stm32_iwdg: set WDOG_HW_RUNNING at probe") integrated in v5.6-rc1.
This patch revert the previous commit ca351e705a ("stm32mp1:
deactivate WATCHDOG in defconfig").
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add information on pin configuration used for pinmux command:
- bias configuration for output (disable, pull up, pull down)
- otype for input (open drain or push pull)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add support of ops get_dir_flags() to read dir flags from
STMFX registers.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add the helper functions stmfx_read_reg() and stmfx_write_reg() to avoid
duplicated code for access to stmfx's register with mask.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Rename the two function used to change the pin configuration
from stmfx_pinctrl_.. stmfx_conf_... to clarify the function usage.
No functional change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Move the functions stmfx_pinctrl_set_pupd and stmfx_pinctrl_set_type;
they can be used by the new ops get_dir_flags and set_dir_flags introduced
by next patch.
No functional change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch updates the current gpio hog implementation and uses
the new API gpio_hog_probe_all(), activated with CONFIG_GPIO_HOG.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Move the debug function board_debug_uart_init in spl.c
as the debug_uart_init() function is called in arch_cpu_init()
only for SPL and remove the board.c file.
For TFABOOT, the UART TX pin configuration is done in TF-A.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch allows to switch the CPU frequency to 800MHz on the
ST Microelectronics board (DK1/DK2 and EV1) or dh electronics SOM
using the STM32MP15x SOC and when it is supported by the HW
(for STM32MP15xD and STM32MP15xF).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
For board using STPMIC1, the vddcore is provided by BUCK1 of STPMIC1
and need to be updated for 800MHz support and only after the clock
tree initialization.
The VDDCORE voltage value is provided by clock driver, saved in global
variable opp_voltage_mv and udpated in SPL board_early_init_f(),
just after clock tree initialization.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add a function stmpic_init to early initialize the PMIC STPMIC1
- keep vdd on during the reset cycle (to avoid issue when backup battery
is absent)
- Check if debug is enabled to program PMIC according to the bit
This patch allows to remove the compilation of spl.c file from stm32mp1
board in dh_stm32mp1.
CONFIG_SPL_BOARD_INIT is removed as the new function is called earlier
in SPL, in the function board_early_init_f.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Add a weak functions to save the vddcore voltage value provided
in the OPP node when the clock tree is initialized.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
The PLL1 node (st,pll1) is optional in device tree, the max supported
frequency define in OPP node is used when the node is absent.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Move function board_ddr_power_init() in a new file stpmic1 in
board/st/common to avoid duplicated code in each board using
stpmic1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This commit adds cpufreq support on stm32mp15x SOC. STM32 cpufreq uses
operating points V2 bindings (no legacy). Nvmem cells have to be used to
know the chip version and then which OPPs are available. Note that STM32
cpufreq driver is mainly based on "cpufreq-dt" driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Update the compatible associated with the STM32 MPU glue
in the DWC ethernet driver.
The supported compatible is the specific "st,stm32mp1-dwmac"
as indicated in Linux binding
Documentation/devicetree/bindings/net/stm32-dwmac.txt
and not the "snps,dwmac-4.20a" only used to the select IP
version.
This glue is implemented in Linux kernel in:
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
For information in stm32mp151.dtsi, the 2 compatibles are
supported:
ethernet0: ethernet@5800a000 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
...
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
According to the FAT specification it is valid to have files with an
attribute value of 0x0. This fixes a regression where different U-Boot
versions are showing different amount of files on the same storage
device. With this change U-Boot shows the same number of files and folders
as Linux and Windows.
Fixes: 39606d462c ("fs: fat: handle deleted directory entries correctly")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
While relocating FDT we reserve some memory for the new FDT and
set the size of the FDT with that respect. But FDT may be placed
at the end of the RAM leading to memory access beyond it.
Fix this by copying exact FDT size bytes, not the reserved size.
Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rock Pi N8 is a Rockchip RK3288 based SBC, which has
- VMARC RK3288 SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3288 SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N8 SBC.
So, add initial support for Rock Pi N8 by including rk3288,
rk3288 vamrc-som and raxda dalang carrier board dtsi files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
VMARC RK3288 SOM is a standard SMARC SOM design with
Rockchip RK3288 SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3288
- PMIC: RK808
- SD slot, 16GiB eMMC
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3288 SOM, this would use
with associated carrier board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Radxa dalang carrier boards are used to mount vmarc SoM's
of rk3399pro and rk3288 to make complete SBC.
Among these combinations, card detection gpio, max-frequency
properties are used with rk3399pro SoM but not required for
rk3288 SoM based on the hardware schematics.
So, let's move these sdmmc specific properties on associate
vmarc dtsi to make common use of dalang carrier device tree file.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SPL_ATF_NO_PLATFORM_PARAM is selected by default for RK3399 configs, to
guard against issues when used with TF-A versions that perform
insufficient validation on the platform parameter. However, since commit
8109f738ffa7 "rockchip: increase FDT buffer size" in TF-A, passing a
device tree as platform parameter no longer causes problems for upstream
TF-A for RK3399.
Since SPL_ATF_NO_PLATFORM_PARAM doesn't need to be selected when using
upstream TF-A, change the Kconfig option from select to imply. It'll
still default to being selected but can be deselected by a user if they
know they will be using a compatible version of TF-A.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Walter Lozano <walter.lozano@collabora.com>
Rock Pi N10 is a Rockchip RK3399Pro based SBC, which has
- VMARC RK3399Pro SOM (as per SMARC standard) from Vamrs.
- Compatible carrier board from Radxa.
VAMRC RK3399Pro SOM need to mount on top of radxa dalang
carrier board for making Rock Pi N10 SBC.
So, add initial support for Rock Pi N10 by including rk3399,
rk3399pro vamrc-som and raxda dalang carrier board dtsi files.
rk3399pro-rock-pi-n10.dts was synced from linux-next v5.7-rc1.
Tested
- ROCK PI N10 Model B
- ROCK PI N10 Model C
- Boot from SD
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Carrier board often referred as baseboard. For making
complete SBC or any other industrial boards, these
carrier boards will be used with associated SOMs.
Radxa has Dalang carrier board which supports on-board
peripherals, ports like USB-2.0, USB-3.0, HDMI, MIPI DSI/CSI,
eDP, Ethernet, WiFi, PCIe, USB-C, 40-Pin GPIO header and etc.
Right now Dalang carrier board is used with two SBC-variants:
Rock Pi N10 => VMARC RK3399Por SOM + Dalang carrier board
Rock Pi N8 => VMARC RK3288 SOM + Dalang carrier board(+codec)
So add this carrier board dtsi as a separate file in
ARM directory, so-that the same can reuse it in both
rk3288, rk3399pro variants of Rockchip SOMs.
Sync this dtsi from linux-next v5.7-rc1.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
VMARC RK3399Pro SOM is a standard SMARC SOM design with
Rockchip RK3399Pro SoC, which is designed by Vamrs.
Specification:
- Rockchip RK3399Pro
- PMIC: RK809-3
- SD slot, 16GiB eMMC
- 2xUSB-2.0, 1xUSB3.0
- USB-C for power supply
- Ethernet, PCIe
- HDMI, MIPI-DSI/CSI, eDP
Add initial support for VMARC RK3399Pro SOM, this would use
with associated carrier board.
Sync this dtsi from linux-next v5.7-rc1.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Some minor fixes for SPI flash on the Pinebook Pro and also
default to saving environment to the SPI flash as it's
guaranteed to be on board.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(applied with make savedefconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The built in keyboard on the Pinebook Pro is attached via USB so
fix this up to ensure USB works as expected.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With video output enabled and USB keyboard supported there is no need
for serial console. So let initialize USB subsystem so keyboard connected to
board (either directly or via hub) can be used to interrupt autoboot.
U-Boot TPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
lpddr4_set_rate: change freq to 800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200)
Trying to boot from SPI
U-Boot 2020.07-rc3-00123-g52d6cbd1a7 (Jun 03 2020 - 17:34:20 +0200)
SoC: Rockchip rk3399
Reset cause: RST
Model: Pine64 RockPro64 v2.1
DRAM: 3.9 GiB
PMIC: RK808
MMC: mmc@fe310000: 2, mmc@fe320000: 1, sdhci@fe330000: 0
Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
OK
In: serial
Out: vidconsole
Err: vidconsole
Model: Pine64 RockPro64 v2.1
Net: eth0: ethernet@fe300000
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3a0000: USB OHCI 1.0
Bus usb@fe3c0000: USB EHCI 1.00
Bus usb@fe3e0000: USB OHCI 1.0
Bus dwc3: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus dwc3: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@fe380000 for devices... 1 USB Device(s) found
scanning bus usb@fe3a0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found
scanning bus usb@fe3e0000 for devices... 2 USB Device(s) found
scanning bus dwc3 for devices... 1 USB Device(s) found
scanning bus dwc3 for devices... 2 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
Hit any key to stop autoboot: 0
=>
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As part of merging the next branch in to master, the sifive_fu540 will
fail to link:
riscv64-linux-ld.bfd: lib/built-in.o: in function `panic_finish':
lib/panic.c:28: undefined reference to `do_reset'
make[2]: *** [spl/u-boot-spl] Error 1
make[1]: *** [spl/u-boot-spl] Error 2
make: *** [sub-make] Error 2
And while the "fix the build" option of enabling CONFIG_SPL_SYSRESET may
solve the issue, it is unclear that it is the correct path exactly. For
the moment, I am reverting this commit and take a "revert the revert"
and proper fix as soon as it's available.
This reverts commit cdae446461.
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch restores CONFIG_VIDCONSOLE_AS_LCD as boolean
and introduce a separate sting as CONFIG_VIDCONSOLE_AS_NAME
to search this string in stdout used as videoconsole.
This patch avoid issue with board defconfig or code expecting
CONFIG_VIDCONSOLE_AS_LCD as boolean.
Fixes: 22b897a123 ("video: extend stdout video console work-around for 'vga'")
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Pull request for UEFI sub-system for efi-2020-10-rc1
This series comprises error corrections for the UEFI subsystem:
* correct consideration of timestamps for variable authentication
* correct collection of data regions for code authentication
* correct unit tests to test loading dbx
* enable FAT_WRITE as required by the UEFI spec
The boot manager uses log functions instead of printf() and debug().
The UEFI intialization state is exported.
- Resync Kconfiglib with the v14.1.0 release.
- Re-sync our <linux/compiler*h> files with v5.7-rc5 from upstream.
- Fully resync checkpatch.pl with v5.7 release.
To safely to all of the above, we have a few bugfixes about functions
that need a 'static inline' but weren't. We also stop setting
CROSS_COMPILE in arch/*/config.mk. Finally, with the above changes
boards can now opt-in to optimizing inlining and we do this for the
socfpga stratix10 platform for space savings.
currently gpio hog function is not tested with "ut dm gpio"
so add some basic tests for gpio hog functionality.
For this enable GPIO_HOG in sandbox_defconfig, add
in DTS some gpio hog entries, and add testcase in
"ut dm gpio" command.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Export the UEFI sub-system initialization state. This will allow to treat
the setting of UEFI variables during and after initialization differently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When booting via the boot manager use log function for user messages
instead of printf() and debug().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When overwriting an existing time base authenticated variable we should
compare to the preceding time value and not to the start of the epoch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UEFI specification requires that when UEFI variables are set using time
based authentication we have to check that unused fields of the timestamp
are zero
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- sbi: Add newline to error message
- fu540: dts: Correct reg size of otp and dmc nodes
- Enhance reserved memory fixup about PMP information passed from OpenSBI
- sifive: fu540: Add gpio-restart support
- qemu-riscv: Update QEMU run command
- Assorted fixes related to reserved memory
- fu540: enable all cache ways from U-Boot proper
- use log functions in fdt_fixup
A time authenticated variable cannot be overwritten with another value
with the same time stamp. So we must ensure the correct sequence of time
stamps when generating out test data.
Using parameter -t for sign-efi-sig-list gives reproducible results and
avoids sleep statements.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In the test case (1g) of test_authvar, "db" is mistakenly used,
and it ends up being the exact same as (1f).
So correct it as "dbx" test case.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently, we don't use any regular expression in matching outputs from
U-Boot. Since its use is just redundant, we can remove all.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Just for style consistency, replace all the uses of debug() to
EFI_PRINT() in efi_image_loader.c.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Just for style consistency, replace all the uses of debug() to
EFI_PRINT in efi_variable.c.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Just for style consistency, replace all the uses of debug to
EFI_PRINT in efi_signature.c
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The simplest solution to revert the commit b32ac16f9a ("test/py: fix
test_efi_secboot/conftest.py") is to move efi_console_register()
forward before efi_disk_register().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Replace printf() and debug() by log_err() and log_debug().
"No reserved memory region found in source FDT\n" is not an error but a
debug information.
%s/can not/cannot/ - use the more common spelling.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
fdtdec_get_addr_size_no_parent is not an optimized version if parent
node is already available with the caller.
Use fdtdec_get_addr_size_auto_parent to read the "reg" property
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Not all errors are fatal. If a reserved memory node already exists in the
destination device tree, we can continue to boot without failing.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Explicitly pass the "-bios" option to QEMU to run U-Boot, instead
of the "-kernel" option, as we know that "-bios" behavior will be
changed since QEMU 5.1.0.
This also updates validated QEMU version to 5.0.0.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Starting from OpenSBI v0.7, the SBI firmware inserts/fixes up the
reserved memory node for PMP protected memory regions. All RISC-V
boards need to copy the reserved memory node from the device tree
provided by the firmware to the device tree used by U-Boot.
Turn on CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATE.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The copy of reserved memory node from source dtb to destination dtb
can be avoided if they point to the same place. This is useful when
OF_PRIOR_STAGE is used.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
While commit 048a648298 ("checkpatch.pl: Update to v5.7") largely
re-syncs us with checkpatch.pl from v5.7 there are a number of things
missing still. Re-copy the script and again take care to keep our
allowed debug prints and now localized checks intact.
Fixes: 048a648298 ("checkpatch.pl: Update to v5.7")
Signed-off-by: Tom Rini <trini@konsulko.com>
This is a side-port of commit 21c54b774744 ("kconfig: show compiler
version text in the top comment") from Linux:
"The kernel configuration phase is now tightly coupled with the compiler
in use. It will be nice to show the compiler information in Kconfig."
We have already had the required makefile logic for this and had not
included printing the value in various user and file visible places.
Cc: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable the new CONFIG_OPTIMIZE_INLINING and CONFIG_SPL_OPTIMIZE_INLINING
options for this platform. With gcc-9.2 from kernel.org this saves us
1784 bytes in U-Boot and 80 bytes in SPL.
Cc: Marek Vasut <marex@denx.de>
Cc: Chin-Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinh.nguyen@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Vasut <marex@denx.de>
There are cases where when we allow the compiler to decide about making
inline decisions rather than forcing them it can save us space.
For now, we keep the default values for inlining that we have had
historically.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
In the Linux kernel, support for forcing inline functions to be made
inline, rather than allowing the compiler to make its own choice has
been removed. With respect to performance, modern GCC (and Clang) do a
good job at deciding when to, or not to, inline code and there are no
run-time requirements in Linux anymore.
There is one downside to this, which is final binary size. On average
in U-Boot removing this support grows SPL by almost 1 kilobyte. But
there are cases where it shrinks the binary by making better inline
choices than we had forced.
Start by re-introducing CONFIG_OPTIMIZE_INLINING as a global which
essentially reverts 889b3c1245de ("compiler: remove CONFIG_OPTIMIZE_INLINING entirely")
from Linux.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Copy these from Linux v5.7-rc5 tag.
This brings in some handy new attributes and is otherwise important to
keep in sync.
We drop the reference to smp_read_barrier_depends() as it is not
relevant on the architectures we support at this time, based on where
it's implemented in Linux today. We drop the call to kasan_check_read()
as that is not relevant to U-Boot as well.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
In order to update our <linux/compiler.h> to a newer version that no
longer provides ACCESS_ONCE() but only READ_ONCE()/WRITE_ONCE() we need
to convert arch/x86/include/asm/atomic.h to the other macros.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In order to update our <linux/compiler.h> to a newer version that no
longer provides ACCESS_ONCE() but only READ_ONCE()/WRITE_ONCE() we need
to convert arch/arm/mach-tegra/ivc.c to the other macros.
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Borrowing from Linux commit 78a5255ffb6a ("Stop the ad-hoc games with -Wno-maybe-initialized")
move to have maybe-initialized warnings be handled with building with
W=2 instead of playing more guessing games with newer compilers.
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of re-syncing our Kconfig logic up to v4.19, we had missed
adding this new file that includes helper macros. To quote the upstream
commit e1cfdc0e72fc ("kconfig: add basic helper macros to scripts/Kconfig.include"):
Kconfig got text processing tools like we see in Make. Add Kconfig
helper macros to scripts/Kconfig.include like we collect Makefile
macros in scripts/Kbuild.include.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
A large number of changes have happened upstream since our last sync
in commit 65e05ddc1a ("kconfiglib: Update to the 12.14.0 release").
The big motivation for this sync is support for user defined macros
within Kconfig.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
All cpu cores within FU540-C000 having split I/D caches.
Set the L1 cache feature bit using the i-cache-size or d-cache-size
as one of the property from device tree indicating that L1 cache is
present on the cpu core.
=> cpu detail
1: cpu@1 rv64imafdc
ID = 1, freq = 999.100 MHz: L1 cache, MMU
2: cpu@2 rv64imafdc
ID = 2, freq = 999.100 MHz: L1 cache, MMU
3: cpu@3 rv64imafdc
ID = 3, freq = 999.100 MHz: L1 cache, MMU
4: cpu@4 rv64imafdc
ID = 4, freq = 999.100 MHz: L1 cache, MMU
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
The conditional check to read "mmu-type" from the device tree
is not rightly handled due to which the cpu feature doesn't include
CPU_FEAT_MMU even if it's corresponding entry is present in the device
tree.
The initialization of cpu features is now taken care in cpu-uclass
driver, so no need to zero out cpu_freq in riscv_cpu driver and can be
removed.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
The cmd "cpu detail" fetches uninitialized cpu feature information
and thus displays wrong / inconsitent details as below.
For eg: FU540-C000 doesn't have any microcode, yet the cmd display's it.
=> cpu detail
1: cpu@1 rv64imafdc
ID = 1, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
Microcode version 0x0
Device ID 0x0
2: cpu@2 rv64imafdc
ID = 2, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
Microcode version 0x0
Device ID 0x0
3: cpu@3 rv64imafdc
ID = 3, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
Microcode version 0x0
Device ID 0x0
4: cpu@4 rv64imafdc
ID = 4, freq = 999.100 MHz: L1 cache, MMU, Microcode, Device ID
Microcode version 0x0
Device ID 0x0
The L1 cache or MMU entry seen above is also displayed inconsistently.
So initialize cpu information to zero into cpu-uclass itself so that
similar issues can be avoided for other CPU drivers.
We now see correct features as:
=> cpu detail
1: cpu@1 rv64imafdc
ID = 1, freq = 999.100 MHz
2: cpu@2 rv64imafdc
ID = 2, freq = 999.100 MHz
3: cpu@3 rv64imafdc
ID = 3, freq = 999.100 MHz
4: cpu@4 rv64imafdc
ID = 4, freq = 999.100 MHz
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Add cpu aliases to U-Boot specific dtsi for hifive-unleashed.
Without aliases we see that the CPU device sequence numbers are set
randomly and the cpu list/detail command will show it as follows:
=> cpu list
1: cpu@1 rv64imafdc
2: cpu@2 rv64imafdc
3: cpu@3 rv64imafdc
0: cpu@4 rv64imafdc
Seems like CPU probing with dm-model also relies on aliases as observed
in case spi. The fu540-c000-u-boot.dtsi has cpu nodes and so adding
corresponding aliases we can ensure that cpu devices are assigned
proper sequence as follows:
=> cpu list
1: cpu@1 rv64imafdc
2: cpu@2 rv64imafdc
3: cpu@3 rv64imafdc
4: cpu@4 rv64imafdc
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a
"KPU" neural network processor, an audio processor supporting beamforming
reception, and a digital video port supporting capture and output at VGA
resolution. Other peripherals include 8M of sram (accessible with and
without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
peripherals vary, but include spi flash; on-board usb-serial bridges; ports
for cameras, displays, and sd cards; and ESP32 chips. Currently, only the
Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly
similar.
Documentation for Maix boards is located at
<http://dl.sipeed.com/MAIX/HDK/>. Documentation for the Kendryte K210 is
located at <https://kendryte.com/downloads/>. However, hardware details are
rather lacking, so most technical reference has been taken from the
standalone sdk located at
<https://github.com/kendryte/kendryte-standalone-sdk>.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This patch adds documentation for the Sipeed Maix bit, and more generally
for the Kendryte K210 processor.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Where possible, I have tried to find compatible drivers based on the layout
of registers. However, many devices remain untested. All untested devices
have been left disabled, but some tentative properties (such as compatible
strings, and clocks, interrupts, and resets properties) have been added.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
The cpu clock is probably already enabled if we are executing code (though
we could be executing from a different core). This patch prevents the cpu
clock or its parents from being disabled.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Instead of always using the "clock-frequency" property to determine cpu
frequency, try using a clock in "clocks" if it exists. This patch also
fixes a bug where there could be spurious higher frequencies if sizeof(u32)
!= sizeof(ulong).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Currently, one cannot use a reset driver on RISC-V. Follow the MIPS
example, and disable the default reset handler when the sysreset driver is
enabled.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some older processors (notably the Kendryte K210) use an older version of
the RISC-V privileged specification. The primary changes between the old
and new are in virtual memory, and in the merging of three separate counter
enable CSRs. Using the new CSR on an old processor causes an illegal
instruction exception. This patch adds an option to use the old CSRs
instead of the new one.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The previous IPI code initialized the device whenever the first call was
made to a riscv_*_ipi function. This made it difficult to determine when
the IPI device was initialized. This patch introduces a new function
riscv_init_ipi. It is called once during arch_cpu_init_dm. In SPL, it is
called in spl_invoke_opensbi. Before this point, no riscv_*_ipi functions
should be called.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
On some platforms (k210), the previous stage bootloader may have not
cleared pending IPIs before transferring control to U-Boot. This can cause
race conditions, as multiple harts all attempt to initialize the IPI
controller at once. This patch clears IPIs before enabling them, ensuring
that only one hart modifies shared memory at once.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
This header depended on bd_t and ulong, but did not include the appropriate
headers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This could give a confusing error message if it failed and didn't set
errno.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds a generic reset driver. It is designed to be useful when
one has a register in a regmap which contains bits that reset other
devices. I thought this seemed like a very generic use, so here is a
generic driver. The overall structure has been modeled on the syscon-reboot
driver.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
dev_read_addr_ptr had different semantics depending on whether OF_LIVE was
enabled. This patch converts both implementations to return NULL on error,
and converts all call sites which check for FDT_ADDR_T_NONE to check for
NULL instead. This patch also removes the call to map_physmem, since we
have dev_remap_addr* for those semantics.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This type of bus is used in Linux to designate buses which have power
domains and/or clocks which need to be enabled before their child devices
can be used. Because power domains are automatically enabled before probing
in U-Boot, we just need to enable any clocks present.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Due to the large number of clocks, I decided to use the CCF. The overall
structure is modeled after the imx code. Clocks parameters are stored in
several arrays, and are then instantiated at run-time. There are some
translation macros (FOOIFY()) which allow for more dense packing.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
This is a small driver to do a software bypass of a clock if hardware
bypass is not working. I have tried to write this in a generic fashion, so
that it could be potentially broken out of the kendryte code at some future
date. For the K210, it is used to have aclk bypass pll0 and use in0 instead
so that the CPU keeps on working.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
This pll code is primarily based on the code from the kendryte standalone
sdk in lib/drivers/sysctl.c. k210_pll_calc_config is roughly analogous to
the algorithm used to set the pll frequency, but it has been completely
rewritten to be fixed-point based.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
clk_get_by_index_nodev only ever fetched clock 1, due to passing a boolean
predicate instead of the index. Other clk_get_by_* functions got the clock
correctly, but passed a predicate instead of the index to clk_get_by_tail.
This could lead to confusing error messages.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
CC: Lukasz Majewski <lukma@denx.de>
clk_composite_ops was shared between all devices in the composite clock
driver. If one clock had a feature (such as supporting set_parent) which
another clock did not, it could call a null pointer dereference.
This patch does three things
1. It adds null-pointer checks to all composite clock functions.
2. It makes clk_composite_ops const and sets its functions at compile-time.
3. It adds some basic sanity checks to num_parents.
The combined effect of these changes is that any of mux, rate, or gate can
be NULL, and composite clocks will still function normally. Previously, at
least mux had to exist, since clk_composite_get_parent was used to
determine the parent for clk_register.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
CCF clocks should always use the struct clock passed to their methods for
extracting the driver-specific clock information struct. Previously, many
functions would use the clk->dev->priv if the device was bound. This could
cause problems with composite clocks. The individual clocks in a composite
clock did not have the ->dev field filled in. This was fine, because the
device-specific clock information would be used. However, since there was
no ->dev, there was no way to get the parent clock. This caused the
recalc_rate method of the CCF divider clock to fail. One option would be to
use the clk->priv field to get the composite clock and from there get the
appropriate parent device. However, this would tie the implementation to
the composite clock. In general, different devices should not rely on the
contents of ->priv from another device.
The simple solution to this problem is to just always use the supplied
struct clock. The composite clock now fills in the ->dev pointer of its
child clocks. This allows child clocks to make calls like clk_get_parent()
without issue.
imx avoided the above problem by using a custom get_rate function with
composite clocks.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Pull request for UEFI sub-system for efi-2020-07-rc6 (2)
Fix an incorrect update of the GD register in efi_get_variable_common().
Fix an incorrect check for an FDT reg property.
Fix a device tree used for Python testing.
- Minor updates to some platforms I am the listed maintainer of.
Notably this removes the ti814x_evm which stopped building with the PXA
MMC migration series (oops) but hasn't been functional in some time.
The TI814x (DM814x) platform is rather old and in need of a lot of
migration work. As much of that work is well past the deadline, remove
this platform.
Signed-off-by: Tom Rini <trini@konsulko.com>
This platform is already using DM in general and the MMC controller is
the early generation of what is compatible with "ti,omap4-hsmmc" so
enable DM_MMC (which in turn gets BLK enabled).
Signed-off-by: Tom Rini <trini@konsulko.com>
Both the am335x_boneblack and am335x_evm_usbspl configs have been gone
for a while, remove their entries from MAINTAINERS.
Signed-off-by: Tom Rini <trini@konsulko.com>
- net: pcnet: cleanup and add DM support
- Makefile: add rule to build an endian-swapped U-Boot image
used by MIPS Malta EL variants
- CI: add Qemu tests for MIPS Malta
Clean-up platform data include file by using BIT macro and converting
indentation with spaces to tabs.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
test_efi_fit tests fail on RISC-V currently. This is due to the
RISC-V arch_fixup_fdt() checks the #size-cells of the root node
in order to correctly fix up the reserved memory node.
Per the DT binding, the /reserved-memory node requires both
<#address-cells> and <#size-cells> and they should use the same
values as the root node. For the root node, it's not very useful
if <#size-cells> is zero.
Update #size-cells to 1 so tests can pass.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
With commit 0d7c2913fd ("cmd: bootefi: Honor the address & size cells
properties correctly") addr was replaced by fdt_addr. But not in the check
against FDT_ADDR_T_NONE.
Fixes: 0d7c2913fd ("cmd: bootefi: Honor the address & size cells properties
correctly")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add Qemu tests for the MIPS Malta machine as a replacement for
the deprecated generic MIPS machine.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The Qemu Malta machine expects the firmware in Big-Endian byte order.
Therefore the Little-Endian variants of the Malta board needs to
be byte swapped.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This rule generates an u-boot binary file where the byte endianness
is swapped. This will be used by the MIPS Malta Little-Endian variants
to be able to boot with Qemu. The Qemu Malta Machine expects the
firmware in Big-Endian order.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This can be used to swap the byte endianness of a binary file
from Little-Endian to Big-Endian or vice-versa.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.
Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.
This removes multiple malloc calls and cache flushes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
- Bring in the first pass at cleaning up config headers that reference
symbols that already have Kconfig symbols.
- In order to do that, bring in the small series that adds
CONFIG_SPL_DM_SPI_FLASH and makes more use of CONFIG_$(SPL_TPL_)DM_SPI
in order to allow for disabling those features in SPL stuff but using
them in full U-Boot
This patch moves the CONFIG_DM_SPI_FLASH and CONFIG_SPI_FLASH_DATAFLASH
to be defined in Kconfig, not in board specific header file
(include/configs/<board>.h).
Before this change the CONFIG_DM_SPI_FLASH was not set in .config (so it
was not possible to use CONFIG_IS_ENABLED(DM_SPI_FLASH) in SPI DM/DTS
converted drivers), but it was set in u-boot.cfg file.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This patch fixes issue with defining the DM_SPI_FLASH in the
configs/include/<board.h> instead of enabling this option in Kconfig.
The problem is that CONFIG_IS_ENABLED(DM_SPI_FLASH) shows false as there
is no DM_SPI_FLASH=y in .config (but the define is set in u-boot.cfg).
As a result conversion of DM_SPI_FLASH to using CONFIG_IS_ENABLED() is not
working properly.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
This change allows more fine tuning of driver model based SPI support in
SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI
support in SPL and TPL via Kconfig option.
Before this change it was necessary to use:
/* SPI Flash Configs */
#if defined(CONFIG_SPL_BUILD)
#undef CONFIG_DM_SPI
#undef CONFIG_DM_SPI_FLASH
#undef CONFIG_SPI_FLASH_MTD
#endif
in the ./include/configs/<board>.h, which is error prone and shall be
avoided when we strive to switch to Kconfig.
The goal of this patch:
Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL).
Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must
still support non DM driver.
Another use case is the conversion of non DM/DTS SPI driver to support
DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the
distinction is needed in Kconfig (also if SPL version of the driver
supports OF_PLATDATA).
In the end of the day one would have to support following use cases (in
single driver file - e.g. mxs_spi.c):
- U-Boot proper driver supporting DT/DTS
- U-Boot proper driver without DT/DTS support (deprecated)
- SPL driver without DT/DTS support
- SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to
run full blown DT/DTS)
- SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained
environment with no fitImage and OF_LIBFDT support).
Some boards do require SPI support (with DM) in SPL (TPL) and some only
have DM_SPI{_FLASH} defined to allow compiling SPL.
This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI)
and provides corresponding defines in Kconfig.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[trini: Fixup a few platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
In the future if we have separate symbols for DM_SPI_FLASH and
SPL_DM_SPI_FLASH we will not always have function declarations available
for some DM calls. This in turn leads to build warnings but not
failures as the code isn't used and is discarded at link time.
Restructure things to not build code we won't use for TPL anyways.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
efi_get_variable_common() does not use EFI_ENTRY(). So we should not use
EFI_EXIT() either.
Fixes: 767f6eeb01 ("efi_loader: variable: support variable authentication")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- fix logo on mx6ul_14x14_evk with DM_VIDEO enabled
- fix banner string overwriting the logo on small displays
- fix splash warning when building for ARM64
- fix STM32 DSI driver to probe only on supported hardware
- fix memory corruption with DSI panel drivers
The EDP_LCDC_SEL bit has to be set correctly to select vop0 or
vop1, but so far we have set it in both conditions, which is not
correct.
Can someone verify this is the correct way round? vop1 -> set,
vop0 -> clear?
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fill characteristics of DSI data link to platform data instead of
mipi device to avoid memory corruption.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Fill characteristics of DSI data link to platform data instead of
mipi device to avoid memory corruption.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Copy the DSI data link characteristics from panel
platform data to mipi DSI device.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Add new fields "lanes, format & mode_flags" to structure
mipi_dsi_panel_plat.
Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Get below warning on ARM64 platform, because the bmp_load_addr
is defined to u32.
common/splash.c: In function ‘splash_video_logo_load’:
common/splash.c:74:9: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
74 | memcpy((void *)bmp_load_addr, bmp_logo_bitmap,
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
The commit 84a6a27ae3 ("rockchip: rk3188: init CPU freq in clock
driver") changed ARM clock from 600MHz to 1600MHz. It made boot
unstable due to the fact that PMIC at the start generates insufficient
voltage for operation. See also: commit f4f57c58b5 ("rockchip:
rk3188: Setup the armclk in spl").
Fixes commit 84a6a27ae3 ("rockchip: rk3188: init CPU freq in clock
driver").
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move the setting for noc remap out of SPL code. Changing
noc remap inside SPL results in breaking back to BROM
boot.
Fixes commit c14fe2a8e1 ("rockchip: rk3188: Move SoC
one time setting into arch_cpu_init()").
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
While in most cases CSF_SIZE is handled via Kconfig we have some i.MX8M
platforms that set the size based on the now-renamed CONFIG_SECURE_BOOT
symbol. Update things so that CSF_SIZE itself depends on IMX_HAB being
enabled and provide the default value for i.MX8M family of parts.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ye Li <ye.li@nxp.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Fixes: d714a75fd4 ("imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Ye Li <ye.li@nxp.com>
There are two remaining users of the CONFIG_SECURE_BOOT symbol that have
not been migrated to another symbol. In this case, they should be using
CONFIG_NXP_ESBC as their guard.
Cc: Vladimir Oltean <olteanv@gmail.com>
Fixes: 5536c3c9d0 ("freescale/layerscape: Rename the config CONFIG_SECURE_BOOT name")
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_BOOTCOUNT_ENV
CONFIG_BOOTCOUNT_LIMIT
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_AUTOBOOT_PROMPT
CONFIG_AUTOBOOT_KEYED
CONFIG_AUTOBOOT_STOP_STR
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_ATMEL_NAND_HW_PMECC
CONFIG_ATMEL_NAND_HWECC
CONFIG_NAND_ATMEL
CONFIG_PMECC_CAP
CONFIG_PMECC_SECTOR_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Fix EMAC register address calculation, address need to multiply
with sizeof(u32) or 4.
This fixes write to invalid address.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Pull request for UEFI sub-system for efi-2020-07-rc6
Corrections for variable definitions are provided:
* Correct size of secure boot related UEFI variables.
* Do not use int for storing an enum.
* Replace fdt_addr by fdt_size where needed.
Set this value in global_data so that it is reported correctly on x86
boards.
In fact, U-Boot allocates space for the frame buffer even though it is not
used. Then the FSP picks the address itself (e.g. 0xb0000000). So the
value set by U-Boot (high in memory with everything else that is
relocated), is not actually the correct value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update this value with the address of a video device so that it shows with
the 'bd' command.
It would be better to obtain the address from the uclass by looking in
struct video_uc_platdata for each device. We can move over to that once
DM_VIDEO migration is complete.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the comment at the top of the file to indicate what this file does.
Also drop the line at the bottom and an unnecessary header include.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't have an easy way to share these three lines of code with two
architectures. We also want to make it clear that this code is actually
arch-specific.
So just duplicate it in each arch-specific file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
We don't really want to have m68k-specific code in a generic file. Create
a new arch-specific function to hold it, and move it into that.
Make the function weak so that any arch can implement it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
We don't really want to have PPC-specific code in a generic file. Create
a new arch-specific function to hold it, and move it into that.
Make the function weak so that any arch can implement it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
We don't really want to have ARM-specific code in a generic file. Create
a new arch-specific function to hold it, and move it into that.
Make the function weak so that any arch can implement it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the functions to print a number and a frequency are static. We
want to move some of the code in here to an arch-specific file. For
consistency that code should use these same functions. So export them with
an appropriate name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code pre-dates driver model and the migration date is nearly upon us.
Pare the print_eths() function down and enable it for driver model, since
it works correctly.
The IP address is already printed in print_eth_ip_addr() so we can remove
that.
Since this results in a one-line print_eths() function, inline it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These config options have not been migrated to Kconfig. This should be
handled using driver model, iterating over the available Ethernet devices.
For now, remove the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
These values were 'old' in 2013 so it should be safe to remove them. They
are never set in U-Boot anyway, so the values will always be zero.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This function only has three lines of code in it so inline it. This helps
to put all the code in one place for future partitioning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It isn't worth having arch-specific code for such minor output
differences. In fact it is better if all archs are consistent.
Drop the arch-specific code in print_bi_mem() and inline it to avoid a
two-line function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
This function outputs the same basic info. Since the baud rate is commonly
115200 these is often no difference. Drop the arch-specific code and
inline it to avoid a one-line function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Everything in this function is standard now so it serves no purpose. Move
it into the generic do_bdinfo() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This serves no purpose since the compiler will inline the functions
automatically. Drop use of inline in this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The differences these architectures have are minor and not worth the extra
code. Use the generic version always.
Tidy up the code style by removing unnecessary tabs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some of these are not needed now. Drop them to avoid cluttering the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Now that all architectures are using the generic do_bdinfo(), drop the
option to not use it. When new architectures are added, they will get at
least some useful information from the generic implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There is nothing new in the arc 'bd' command beyond what is already there.
Switch it over to use the generic code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Unfortunately ARM has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Unfortunately m68k has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Unfortunately PowerPC has a lot of special stuff. Move it into the generic
function for now, so we can have it all in one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This arch has none of its own info to show. Move it over to use the
generic do_bdinfo().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This arch has none of its own info to show. Move it over to use the
generic do_bdinfo().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sandbox has a printout of 'FB base' but this code is not used since
sandbox uses driver model for everything.
Move sandbox over to use the generic do_bdinfo().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This arch shows 'ethspeed' info but only the freescale drivers use it, so
it can be dropped.
It also calls print_bi_dram() which is safe to call from any arch since it
has an #ifdef inside it. Add this to the generic do_bdinfo() and move x86
over to use it. Put it first since pytests rely on seeing it before
memstart in find_ram_base().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This arch has no code that is not already in the generic function. Drop
the arch-specific function and change sh over to use the generic one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Microblaze prints out ethernet and FDT information. This is useful to
most archs, so move it into the generic code and move microblaze over to
use it.
Note that FDT information is shown for all boards, since they should be
using device tree by now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Nios2 currently has some code to output SRAM information which is behind
an #ifdef. No nios2 boards define this option, so the code can be removed.
Move Nios2 over to use the generic function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
MIPS currently has a few extra things which are generally useful. Add them
to the generic function and move MIPS over to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This arch uses only the generic function. It would be nice if all the
archs did the same. As a first step, create a new generic function for the
'bd' command and make xtensa use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present riscv still uses its own private bd_info struct. Move it over
to use the generic one like other archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present nds32 still uses its own private bd_info struct. Move it over
to use the generic one like other archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This board is very close to its limit. Drop this command before the bd
refactoring, which increases the size slightly on one toolchain.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since commit:
commit 6333cbb381
Author: Michael Walle <michael@walle.cc>
Date: Thu May 7 00:11:58 2020 +0200
phy: atheros: ar8035: remove static clock config
We can configure the clock output in the device tree. Disable the
hardcoded one in here. This is highly board-specific and should have
never been enabled in the PHY driver.
If bisecting shows that this commit breaks your board it probably
depends on the clock output of your Atheros AR8035 PHY. Please have a
look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set
"clk-out-frequency = <125000000>" because that value was the hardcoded
value until this commit.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
, the clock output setting for the AR803x driver is removed from being
hardcoded in the PHY driver and should be passed via device tree instead.
Update the device tree with the "qca,clk-out-frequency" property so that
Ethernet can work again.
Reported-by: Soeren Moch <smoch@web.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Soeren Moch <smoch@web.de>
Xilinx changes for v2020.10
Versal:
- xspi bootmode fix
- Removing one clock from clk driver
- Align u-boot memory setting with OS by default
- Map TCM and OCM by default
ZynqMP:
- Minor DT improvements
- Reduce console buffer for mini configurations
- Add fix for AMS
- Add support for XDP platform
Zynq:
- Support for AES engine
- Enable bigger memory test by default
- Extend documentation for SD preparation
- Use different freq for Topic miami board
mmc:
- minor GD pointer removal
net:
- Support fixed-link cases by zynq gem
- Fix phy looking loop in axi enet driver
spi:
- Cleanup global macros for xilinx spi drivers
firmware:
- Add support for pmufw reloading
fpga:
- Improve error status reporting
common:
- Remove 4kB addition space for FDT allocation
There is no technical reason to add additional 4k space for FDT. This space
is completely unused and just increase memory requirements. This is
problematic on systems with limited memory resources as Xilinx Zynq
CSE/ZynqMP mini and Versal mini configurations.
The patch is removing additional 4k space.
EFI code is using copy_fdt() which copy FDT to different location.
And all boot commands in case of using U-Boot's FDT pointed by
$fdtcontroladdr are copying FDT to different locations by
image_setup_libfdt().
That's why in proper flow none should modified DTB used by U-Boot that's
why there is no need for additional space.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
PMU FW has functionality to accept and reload configuration object at run
time. The patch is adding support for doing it via u-boot prompt.
For example:
tftpboot 100000 pmu_obj.bin
zynqmp pmufw 100000 $filesize
The most of pmufw configurations don't allow config reloading.
Also official Xilinx PMUFW doens't support this feature properly but the
patch should open a way to call PMUFW with this request.
Here is example of PMUFW config fragment which enables config reloading.
/* SET CONFIG SECTION */
PM_CONFIG_SET_CONFIG_SECTION_ID, /* Section ID */
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
It is better to print multiboot value in decimal because boot images are
also composed in decimal not in hex.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The variables SetupMode, AuditMode, DeployedMode are explicitly defined as
UINT8 in the UEFI specification. The type of SecureBoot is UINT8 in EDK2.
Use variable name secure_boot instead of sec_boot for the value of the
UEFI variable SecureBoot.
Avoid abbreviations in function descriptions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Variable efi_secure_mode is meant to hold a value of enum efi_secure_mode.
So it should not be defined as int but as enum efi_secure_mode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Variable fdt_size should be of type 'fdt_size_t', not 'fdt_addr_t'.
Fixes 0d7c2913fd: ("cmd: bootefi: Honor the address & size cells properties correctly")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
XDP - Xilinx Drone Platform is a board for drones or other UAV.
Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.
There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In all reference designs the FCLK1 runs at 150MHz, but the bootloader
doesn't set it up like that. Set the divider to 8 to generate the
correct clock. Fixes (a.o.) the DMA speed being too slow.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The index used to iterate over the possible PHYs in axiemac_phy_init was an
unsigned int and decremented. Therefor it was always >= 0 and never exited
the loop.
Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add a short description in the ZYNQ documentation how to prepare a SD card and
copy the related images to SD card.
Signed-off-by: Johannes Krottmayer <krjdev@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fpga returns error value when fails, error status should be
printed in hex format.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove below config options and convert them to macros. They have never
been configured to different values than default one. And also it makes
sense to reduce the config_whitelist.
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_XILINX_SPI_IDLE_VAL
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Disable PCS autonegotiation if fixed-link node is present in device tree.
This way systems with multiple GEM instances with a combination of
SGMII-fixed and SGMII-PHY will work.
Reported-by: Goran Marinkovic <goran.marinkovic@psi.ch>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change mini u-boot qspi spi-max-frequency to 108Mhz, make the
frequency similar to full u-boot qspi flash spi-max-frequency.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reduce console buffer size to 1kbyte to accommodate memory
allocations in mini u-boot for zynqmp.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to panic all the time when pmufw config object loading
failed. The patch improves function logic to report permission deny case
and also panic only for SPL case.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
alt_ref_clk is applicable only for PS extended version.
For PS base version there is no separate alt_ref_clk.
It is tied with ref_clk, so remove it from driver.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason not to let U-Boot to update memory node by default. In
past this was disabled by purpose to be able to test different memory
configurations from one U-Boot instance.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SDHCI HISPD bits need to be configured based on desired mmc
timings mode and some HISPD quirks.
So, handle the HISPD bit based on the mmc computed selected
mode(timing parameter) rather than fixed mmc card clock
frequency.
Linux handle the HISPD similar like this in below commit but no
SDHCI_QUIRK_BROKEN_HISPD_MODE,
commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling")
This eventually fixed the mmc write issue observed in
rk3399 sdhci controller.
Bug log for refernece,
=> gpt write mmc 0 $partitions
Writing GPT: mmc write failed
** Can't write to device 0 **
** Can't write to device 0 **
error!
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Peng Fan <peng.fan@nxp.com>
Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
According to eMMC specification v5.1 section 6.4.3, we should issue
CMD1 repeatedly in the idle state until the eMMC is ready even if
mmc_send_op_cond() send CMD1 with argument = 0. Otherwise some eMMC
devices seems to enter the inactive mode after mmc_complete_op_cond()
issued CMD0 when the eMMC device is busy.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In current code, we add 1ms dealy after each tuning command for standard
tuning method. Adding this 1ms dealy is because USDHC default check the
CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning
IC logic do not wait for the tuning data sending out by the card, trigger
the buffer read ready interrupt immediately, and step to next cycle. So
when next time the new tuning command send out by USDHC, card may still
not send out the tuning data of the upper command，then some eMMC cards
may stuck, can't response to any command, block the whole tuning procedure.
If do not check the CMD CRC for tuning, then do not has this issue. USDHC
will wait for the tuning data of each tuning command and check them. If the
tuning data pass the check, it also means the CMD line also okay for tuning.
So this patch disable the CMD CRC check for tuning, save some time for the
whole tuning procedure.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is
TUNING_START_TAP, bit[7] of this register is to disable the command
CRC check for standard tuning. So fix it here.
Fixes: fa33d20749 ("mmc: split fsl_esdhc driver for i.MX")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
The extcsd read target must be cache aligned in case the controller
uses DMA to read the extcsd register, make it so.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
This patch try to avoids eviction of dirty lines during DMA
transfer. The code right now execute the following step:
- allocate the buffer
- start a dma operation using the non-coherent dma buffer
- invalidate cache lines associated with the buffer
- read the buffer
This can lead to reading back not valid information, because the cache
controller could evict dirty cache lines belonging to the buffer *after*
the DMA operation has started to fill the DRAM.
In order to avoid this, a new invalidation is required *before* starting
the DMA operation. The patch just adds an invalidation before submitting
the DMA command.
Example below shows the nvme disk scan result without the following
patch
=> nvme scan
nvme_get_info_from_identify: nn = 544502629, vwc = 100,
sn = dev_0T, mn = `�\�, fr = t_part, mdts = 105
So, invalidating the cache before submitting the admin command,
fix the cpu read.
Cc: André Przywara <andre.przywara@arm.com>
Reported-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The correct name for the property is "qca,clk-out-frequency", so fix
it accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Commit 0528979fa7 ("part: Drop disk_partition_t typedef") changed to
a struct. As a result it uncovered an apparent missing include in
zfs_common.h for part.h which actually contains the definition. The ZFS
handles the struct exclusively as pointers so it was only a warning.
warning: ‘struct disk_partition’ declared inside parameter list
will not be visible outside of this definition or declaration
void zfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Series-CC: Simon Glass <sjg@chromium.org>
After enabling SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC the MMC
initialization code is not longer needed.
This patch removes the unused code.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
In order to take the beneficts of DT and DM in SPL, like reusing the code
and avoid redundancy, enable SPL_OF_CONTROL, SPL_DM and SPL_DM_MMC.
With this new configuration SPL image is 50 KB, higher than the
38 KB from the previous version, but it still under the 68 KB limit.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
In SPL legacy code only one MMC device is created, based on BOOT_CFG
register, which can be either SD or eMMC. In this context
board_boot_order return always MMC1 when configure to boot from
SD/eMMC. After switching to DM both SD and eMMC devices are created
based on the information available on DT, but as board_boot_order
only returns MMC1 is not possible to boot from eMMC.
This patch customizes board_boot_order taking into account BOOT_CFG
register to point to correct MMC1 / MMC2 device. Additionally, handle
IO mux for the desired boot device.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Current aliases missed gpio0 node, and this node shoud be
aliased to gpio index 0 to align with i.MX8QXP. Otherwise, we
will get below message when running "gpio status" command, and
see the reason by "dm uclass".
=> gpio status
Device 'gpio@5d090000': seq 0 is in use by 'gpio@5d080000'
Device 'gpio@5d0a0000': seq 1 is in use by 'gpio@5d090000'
Device 'gpio@5d0b0000': seq 2 is in use by 'gpio@5d0a0000'
=> dm uclass
uclass 36: gpio
0 * gpio@5d080000 @ fbaefb90, seq 0, (req -1)
1 * gpio@5d090000 @ fbaefc70, seq 1, (req 0)
2 * gpio@5d0a0000 @ fbaefd50, seq 2, (req 1)
3 * gpio@5d0b0000 @ fbaefe30, seq 5, (req 2)
4 * gpio@5d0c0000 @ fbaeff10, seq 3, (req 3)
5 * gpio@5d0d0000 @ fbaefff0, seq 4, (req 4)
6 * gpio@5d0e0000 @ fbaf00d0, seq 6, (req 5)
7 * gpio@5d0f0000 @ fbaf01b0, seq 7, (req 6)
Signed-off-by: Ye Li <ye.li@nxp.com>
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX
platforms, so we have to adjust the index accordingly.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
We need to change the environment offset to avoid corrupting the U-Boot
binary when saving it.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
This fixes the boot from USB loader, which is critical to easy the
manufacture process.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Select default U-Boot and SPL text base for the MX7 SoC. The U-Boot
text base is picked as the one used by various MX7 boards. The SPL
text base however is different.
The SPL text base is set to 0x912000 instead of the usual 0x911000,
that is because the 0x911000 value cannot work. Using 0x911000 as a
SPL text base will result in the DCD header being placed below the
0x911000 address, which is a reserved SRAM area which must not be
used. This will actually trigger eMMC boot failure on MX7D at least.
Hence the increment.
Update all boards affected by this SPL problem to the new SPL_TEXT_BASE.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
There are systems where board_early_init_f() is plain empty. Switch
the config option from "select" to "imply", to permit user to unset
the BOARD_EARLY_INIT_F if it were to be empty.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The iMX7 defines further DDRC ZQCTLx registers, however those were
thus far missing from the list of registers and not programmed. On
systems with LPDDR2 or DDR3, those registers must be programmed with
correct values, otherwise the DRAM may not work. However, existing
systems which worked without programming these registers before are
now setting those registers to 0, which is the default value, so no
functional change there.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This is needed to obtain the MAC from EEPROM/OTP only after the final
env is populated, otherwise the ethaddr might be overriden.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Claudius Heine <ch@denx.de>
Cc: Harald Seiler <hws@denx.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
For using a debug UART on the Wandboard CONFIG_MXC_UART=y must be set in
the .config file.
To avoid duplicate definitions move the setting from
include/configs/wandboard.h to configs/wandboard_defconfig.
Document the debug UART settings in the README.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
It appears that MMC access on the Sabrelite has been broken since
cdcaee9518:
Loading Environment from MMC... Card did not respond to voltage select!
*** Warning - No block device, using default environment
Remove the board_mmc_init() and related entries now that we should be
using DM_MMC, add PINCTRL so that things work as expected.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
1. Drop legacy emmcboot wrapper from env.
2. Change the "boot try" order. Default one is: SD -> eMMC -> USB -> DHCP
3. Drop DFU defines
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
This introduces automatic boot counter that increases after every
reset.After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it's
disabled if bootlimit isn't set.
To enable this feature you have set bootcount limit ("bootlimit"),
alternate boot action ("altbootcmd") that will be performed if
the new value of bootcount exceeds the value of bootlimit, and
"upgrade_available" to let U-Boot automatically increase and save
the counter value after every reset:
> setenv bootlimit 5
> setenv upgrade_available 1
> setenv altbootcmd "bootm ..."
In case the bootlimit exceeds, the message will be shown and
albootcmd executed:
Warning: Bootlimit (5) exceeded. Using altbootcmd.
To reset bootcount run:
> bootcount reset
Print current value:
> bootcount print
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
s/fdt-module/fdt_module/g, as we don't use dash in fdt_file anymore.
Fixes: 4c63a601("apalis-tk1: support v1.2 hardware revision")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
1. Use distro_bootcmd as default boot command instead of
legacy emmcboot wrapper.
2. Drop emmcboot and sdboot wrappers.
3. Provide proper boot order for Distro Boot.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
The distro bootscript uses kernel_image to get the file name of
the kernel, so change that variable name.
UBI boot has precedence in the default boot command. If one wants
to boot from SD with a working NAND installation stop in U-Boot
and enter:
setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
When using distro boot to boot from UBI volumes the boot partition
has been hardcoded to "UBI" (capital letters). However, our default
MTD layout uses "ubi" (lower case letter). Define "ubi" as the
default UBI partition for distro boot for Toradex. This allows to
use distro boot without having to redefine the MTD partition layout
which is useful for TorizonCore.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
This got dropped by a global 'make savedefconfig' resync as
required patches are still in flight.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
This problem has been exposed by commit:
commit 13114f38e2
Author: Vladimir Oltean <vladimir.oltean@nxp.com>
Date: Thu May 7 00:11:51 2020 +0200
phy: atheros: Explicitly disable RGMII delays
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.
If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode)
the correct phy-mode should be "rgmii-id", so fix it accordingly
to fix the Ethernet regression.
This problem has been exposed by commit:
commit 13114f38e2
Author: Vladimir Oltean <vladimir.oltean@nxp.com>
Date: Thu May 7 00:11:51 2020 +0200
phy: atheros: Explicitly disable RGMII delays
To eliminate any doubts about the out-of-reset value of the PHY, that
the driver previously relied on.
If bisecting shows that this commit breaks your board you probably have
a wrong PHY interface mode. You probably want the
PHY_INTERFACE_MODE_RGMII_RXID or PHY_INTERFACE_MODE_RGMII_ID mode.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fix the phy-mode accordingly to fix the regression.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Migration to DM_ETH is mandatory, so convert mx6cuboxi to Ethernet
Driver Model.
This also brings the benefit of restoring Ethernet functionality.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
Sync the device tree with 5.8-rc1.
It basically contains the following extra kernel commit:
commit 86b08bd5b99480b79a25343f24c1b8c4ddcb5c09
Author: Russell King <rmk+kernel@armlinux.org.uk>
Date: Wed Apr 15 16:44:17 2020 +0100
ARM: dts: imx6-sr-som: add ethernet PHY configuration
Add ethernet PHY configuration ahead of removing the quirk that
configures the clocking mode for the PHY. The RGMII delay is
already set correctly.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
, which passes the 'qca,clk-out-frequency' property and it is important
to specify the correct frequency generated by the AR8035.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
As we move towards driver model, it is required to let the FEC driver
know how to properly deal with an Ethernet PHY subnode in the device tree.
For example:
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@0 {
reg = <0>;
qca,clk-out-frequency = <125000000>;
};
};
};
Currently the PHY node pointer is incorrectly associated with the
Ethernel controller instead of the PHY node itself.
This causes the PHY properties, such as "qca,clk-out-frequency" in
the example above to not get parsed.
Fix this problem by populating the phy_of_node node.
Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Tom Rini <trini@konsulko.com>
The clock ouput frequency is calculated incorrectly for AR8035 due to
wrong masking of priv->clk_25m_reg and priv->clk_25m_mask.
This same issue has been already fixed in the kernel by:
commit b1f4c209d84057b6d40b939b6e4404854271d797
Author: Oleksij Rempel <o.rempel@pengutronix.de>
Date: Wed Apr 1 11:57:32 2020 +0200
net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
for the values that comprise the fields, not zero-bits-set.
This patch fixes the clock frequency configuration for ATH8030 and
ATH8035 Atheros PHYs by removing the erroneous "~".
To reproduce this bug, configure the PHY with the device tree binding
"qca,clk-out-frequency" and remove the machine specific PHY fixups.
Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reported-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Apply the same fix in the U-Boot driver.
Tested on a i.MX6 Hummingboard.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Tom Rini <trini@konsulko.com>
- migrate remaining imx5/imx6qd boards to DM_VIDEO
- use 'vidconsole' stdout in nitrogen6x upgrade script
- add option for selection of the vidconsole commands
lcdputs and setcurs
- allow building ipuv3 driver with disabled CONFIG_PANEL
- make backlight and panel drivers optional
- remove useless code from ipuv3 driver
- extend existing DM_VIDEO work-around for console name
to support 'vga'
- remove non-DM code in ipuv3
Migration to DM_VIDEO driver is long overdue. Update defconfig
to enable usage of converted ipuv3 driver DM configuration.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Acked-by: Jason Liu<jason.hui.liu@nxp.com>
Migration to DM_VIDEO driver is long overdue. Update defconfigs
to enable usage of converted ipuv3 driver DM configuration.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Migration to DM_VIDEO driver is long overdue. Update defconfig
to enable usage of converted ipuv3 driver DM configuration.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Migration to DM_VIDEO driver is long overdue. Update defconfigs
to enable usage of converted ipuv3 driver DM configuration.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Migration to DM_VIDEO driver is long overdue. Update defconfigs
to enable usage of converted ipuv3 driver DM configuration.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.
Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.
This removes multiple malloc calls and cache flushes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Split the common code from the non-DM code, so it can be reused by
the DM code later. As always, the recv() function had to be split
into the actual receiving part and free_pkt part to fit with the
DM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The RX/TX DMA descriptor rings are per-device-instance private data,
so move them into the private data.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Instead of doing ethernet device lookup by name every time there
is an MDIO access, pass the driver private data via mdiobus priv
to the MDIO bus accessors.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This patch replaces the various uses of struct eth_device for accessing
device private data with struct eepro100_priv, which is compatible both
with DM and non-DM operation.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is a trick in preparation for adding DM support. By passing in
the PCI BDF into the bus_to_phys()/phys_to_bus() macros and calling
that dev, we can substitute dev with udevice when DM support lands
and do minor adjustment to the macros to support both DM and non-DM
operation. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Drop the inline keyword from the static functions, the compiler has a
much better overview and can decide how to inline those functions much
better.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Those macros depended on specific variable names to be declared
at their usage sites, fix this by adding an argument to those
macros and also protect the argument with braces.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Pull the MII registration code into a separate function. Moreover,
properly free memory in case any of the registration or allocation
functions fail, so this fixes an existing memleak.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Move the functions around in the driver to prepare it for DM conversion.
Drop forward declarations which are not necessary anymore. No functional
change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Remove all the remaining use of the 'volatile' keyword, as this is
no longer required. All the accesses which might have needed this
use of 'volatile' have been repaired properly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Add cache invalidation and flushes wherever the DMA descriptors are
written or read, otherwise this driver cannot work reliably on any
systems where caches are enabled.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This code is replicated in the driver thrice almost verbatim, factor
it out into a separate function and clean it up. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The current eepro100 driver accesses its memory mapped registers directly
instead of using the standard I/O accessors. This can cause problems on
some systems as the accesses can get out of order. So convert the direct
volatile dereferences to use the normal in/out macros.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl -f --fix --fix-inplace drivers/net/eepro100.c
This fixes all the remaining errors except a couple of comments which
are longer than 80 characters, all the volatile misuse and all the
camelcase, that needs a separate patch.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types INDENTED_LABEL -f --fix --fix-inplace drivers/net/eepro100.c
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types POINTER_LOCATION -f --fix --fix-inplace drivers/net/eepro100.c
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types PARENTHESIS_ALIGNMENT -f --fix --fix-inplace drivers/net/eepro100.c
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types BRACES -f --fix --fix-inplace drivers/net/eepro100.c
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This is automated cleanup via checkpatch, no functional change.
./scripts/checkpatch.pl --show-types -f drivers/net/eepro100.c
./scripts/checkpatch.pl --types SPACING -f --fix --fix-inplace drivers/net/eepro100.c
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This code is never enabled, last board that used it was ELPPC which
was removed some 5 years ago, so just remove this code altogether.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Migration to DM_VIDEO driver is long overdue, configure it in
board config files. To enable the display set stdout like:
setenv stdout serial,vidconsole
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
cfb_console driver uses 'vga' console name and we still have board
environments defining this name. Re-use existing DM_VIDEO work-
around for console name to support 'vga' name in stdout environment.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Soeren Moch <smoch@web.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
To enable DM_VIDEO we must decrease binary size to fix build
breakage for some boards, so drop not needed code. Also add
!DM_VIDEO guards which can be later removed when last non DM
users will be converted.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Not all boards use these drivers, so allow to disable them to fix
building boards with U-Boot binary image size restrictions.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Converting some boards to DM_VIDEO results in build breakage due
to increased code size. Make video console specific commands
optional to reduce binary size.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable driver model for Video to remove compiler warning.
To enable display, issue
setenv stdout serial,vidconsole;
Add CONFIG_DM_VIDEO to all defconfigs whose board is
nitrogen6x.
mx6qsabrelite_defconfig
nitrogen6dl2g_defconfig
nitrogen6dl_defconfig
nitrogen6q2g_defconfig
nitrogen6q_defconfig
nitrogen6s1g_defconfig
nitrogen6s_defconfig
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Tested-by: Anatolij Gustschin <agust@denx.de>
Modify the Freescale ESPI driver to support the driver model.
Also resolved the following problems:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI. Please update
the board before v2019.04 for no dm conversion
and v2019.07 for partially dm converted drivers.
Failure to update can lead to driver/board removal
See doc/driver-model/MIGRATION.txt for more info.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Now that CONFIG_SPL_SEPARATE_BSS is selected for all the AT91 based
boards, cleanups the defconfigs by removing it.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
According to the linker script for both armv7 and arm926ejs based SoC,
BSS section was all the time separated for SPL but this symbol was
only enabled on some boards. However, it is necessary to have it
enabled for OF_SEPARATE configuration where DTB is appended to u-boot
with DTB.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Remove a left-over debug printf that was introduced with SHA512 support.
Fixes: d16b38f427 ("Add support for SHA384 and SHA512")
Signed-off-by: Harald Seiler <hws@denx.de>
The da850evm boots from SPI flash while the da850evm_nand_defconfig
boots from NAND and these are configs are mutually exclusive.
Since there isn't a need for SPI during SPL in the NAND configuration,
this patch removes the SPI drivers in SPL while making them still
available in U-Boot proper. This should save some code space in SPL.
Signed-off-by: Adam Ford <aford173@gmail.com>
Copy all device tree files required for omap4 sdp4430 support from
mainline Linux.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
On HS devices the access to SA2UL is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.
We used to only disable the TRNG but now that we have full SA2UL
support in Linux, in which TRNG is a sub-module, disable both
by disabling the parent SA2UL node.
Signed-off-by: Andrew F. Davis <afd@ti.com>
We generate a number of helper inline functions to make accesses easier.
However not all permutations of each function will be used and clang
will warn about unused ones. Decorate all of them with __maybe_unused
because of this.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
We only call the function omap_hsmmc_get_cfg in the case of OMAP34XX or
when we have to iodelay recalibration. Add guards for these checks as
clang will otherwise warn.
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
In the case of non-DM_GPIO the function get_gpio_index() will never be
called, and clang will warn about this. Move this to be with the other
non-DM code for easier removal later.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
With clang we get a report that we are setting this member twice.
Fortunately it is to the same value, so drop the hard-coded value line.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
When building this code with clang-10 a number of warnings will be
generated along the lines of:
warning: address of array 'ep->version' will always evaluate to 'true'
Convert these checks to checking the strlen of the part of the array we
care about. As this array will be null terminated previously by us,
this is safe.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which
could cause enumeration failure with some USB hubs. Disabling the
USB2_PHY Charger Detect function will put D+ into the normal state.
Using property "ti,dis-chg-det-quirk" in the DT usb2-phy node to
enable this workaround for AM654x PG1.0.
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
When authenticating the initial boot binary the ROM will check a debug
type value in the certificate and based on that open JTAG access to that
core. This only effects HS devices as non-HS device ROM allows JTAG
by default.
This can be useful for HS developers working in the early boot stage,
before SYSFW is loaded. After that point the JTAG access can be
changed based on board configurations passed to SYSFW.
This access can also be a large security problem as JTAG access on
HS devices can be used to circumvent the chain-of-trust controls.
Accidentally leaving this open defeats the security on HS, due to this
change the default to disabled.
This should only effect those working on early HS boot code, which
is a limited crowd who will already know how to re-enable this access
as needed.
Signed-off-by: Andrew F. Davis <afd@ti.com>
When authenticating the initial boot binary the ROM will check a debug
type value in the certificate and based on that open JTAG access to that
core.
Make this selectable in the signing tool to allow it to be enabled or
disabled based on user command line input.
This does not change the default behavior.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Cleanup this driver to use dt in U-boot and static platdata in SPL.
This requires the following steps:
1. Move all platdata assignment from probe() to ofdata_to_platdata().
This function is only called in U-boot.
2. Replicate all the platdata assignment being done in
ofdata_to_platdata() in the omapl138 board file. This data is used in
the SPL case where SPL_OF_CONTROL is not enabled.
3. Remove SPL_OF_CONTROL and related configs from omapl138_lcdk_defconfig
This cleanup effectively reverts 3ef94715cc ('mmc: davinci: fix mmc boot in SPL')
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
am57x_idk_lcd_detect() exits immediately if a known board not having
an LCD is found, i.e. a non-IDK board. This is annoying as we have to
remember to add an extra OR clause for every new non-IDK board.
Add a board_is_ti_idk() macro so that the logic becomes positive (detect
LCD on IDK boards instead of not-known-without-LCD boards). Even more
important, add the macro just below the board_is_*_idk() macros, so it is
easy to remember to update it when adding a new IDK.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
- Merge tbs2910 distro boot support and associated clean-ups and size
reduction.
- Assorted networking corrections / bugfixes.
- Drop smc911x standalone API example as it was likely non-functional for a
long time.
- Enhanced support for TI PHYs
- rtl8139 DM conversion
The random_port() routine is not used anywhere else. Make it local to
dns.c to reduce code clutter, and shrink generated code a little.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
RFC2348, RFC2349:
- Option string is case in-sensitive.
- Client must generate ERR pkt in case option value mismatch in server OACK
- Fix debug print for options
Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Do not re-read the HW address from the EEPROM on every start of
transfer, otherwise the user will not be able to adjust ethaddr
as needed. Read the address only once, when the card is detected.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Split the driver into common and non-DM functionality, so that the
DM support can later re-use the common code, while we retain the
non-DM code until all the platforms are converted.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Instead of always calling rtl8139_eeprom_delay() with priv->ioaddr,
call it with priv and let the function access priv->ioaddr. This
reduces code duplication and has no impact, since the compiler will
inline this as needed anyway.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Introduce rtl8139_pdata, which is a super-structure around eth_device
and tracks per-device state, here the device IO address, PCI BDF, RX
and TX ring position. Pass this structure around instead of the old
non-DM eth_device in preparation for DM conversion.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
These macros depended on the dev variable being declared wherever
they were used. This is wrong and will not work with DM anyway, so
pass only the PCI BFD into these macros, which fixes the dependency
and prepares them for DM support as well.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Pull the device name setting into a separate function, as this
will be shared between DM/non-DM variants.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
During packet sequence number wraparound the show_block_marker() API was
not called, as a result the progress marker doesn't stay within column
boundary. Use position in file instead of sequence number to align the
marker.
Signed-off-by: Ravik Hasija <rahasij@linux.microsoft.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Add the DP8382X generic PHY registration to the TI PHY init file.
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
ti_phy_init function was allocated to the DP83867 PHY. This function
name is to generic for a specific PHY. The function can be moved to a
TI specific file that can register all TI PHYs that are defined in the
defconfig. The ti_phy_init file will contain all TI PHYs initialization
so that only phy_ti_init can be called from the framework.
In addition to the above the config flag for the DP83867 needs to be changed
in the Kconfig and dependent defconfig files. The config flag that was
used for the DP83867 was also generic in nature so a more specific
config flag for the DP83867 was created.
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Add phy_set/clear_bit helper routines so that ported drivers from the
kernel can use these functions.
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Fix kernel doc warnings in phy.h. Mostly the warnings were due to the
return missing the semi-colon.
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Add kernel doc to the phy_read/write utility functions in phy.h
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
There are devices accesible through mdio clause-45, such as
retimers, that do not have PMA or PCS blocks.
This patch adds MDIO_MMD_VEND1 on the list of device addresses
where phyid is searched. Previous order of devices was kept.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
This is a WAR for DHCP failure after rebooting from the L4T kernel. The
r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0,
which goes by FuncEvent and MISC in various driver source/datasheets.
That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it
here at the end of probe to ensure that U-Boot can get an IP assigned
via DHCP.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Linux commit 232ba3a51cc2 ('net: phy: Micrel KSZ8061: link failure after
cable connect') implements a fix for the above errata.
This patch replicates that errata fix in an ksz8061 specific init routine.
Signed-off-by: Bryan O'Donoghue <bod@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Drop the example, for two reasons. First, it is tapping directly into
the IO accessors of the SMC911x, while it should instead go through
the net device API. Second, this makes conversion of the SMC911x driver
to DM real hard.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This documents the u-boot installation procedure and the
hardware in order to get started.
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
[trini: Add MAINTAINERS entry for doc file per Soeren's request]
This keeps the compatibility with the old bootcmd.
The fdtfile environment variable also needed to be set to
imx6q-tbs2910.dtb to enable booting mainline kernels
otherwise with extlinux.conf it tries to load
mx6-tbs2910.dtb instead.
With arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola
GNU/Linux distribution, we have the following size
differences:
- text: +2041 bytes
- data: 0 bytes
- bss: 0 bytes
- total: +2041 bytes
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Reviewed-by: Soeren Moch <smoch@web.de>
This is needed to enable distro_boot support later on.
Adding the necessary configuration to enable booting general
purpose distributions is typically done by enabling
CONFIG_DISTRO_DEFAULTS.
However the resulting image size is is already very close to
the size limit and PXE isn't strictly needed, so instead we
made sure that all the configuration selected by
CONFIG_DISTRO_DEFAULTS were selected, with the exception of
PXE related configuration (CONFIG_BOOTP_PXE and
CONFIG_CMD_PXE) that are both disabled.
With arm-linux-gnueabi-gcc 9.3.0-1 from the Parabola
GNU/Linux distribution, we have the following size
differences:
- text: +7526 bytes
- data: +28 bytes
- bss: -12 bytes
- total: +7542 bytes
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Reviewed-by: Soeren Moch <smoch@web.de>
This doesn't affect the size of the image: with
arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola GNU/Linux
distribution, the text, data, bss and total sizes remain
unchanged.
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Reviewed-by: Soeren Moch <smoch@web.de>
As that the resulting image is already very close to the
size limit, and that CONFIG_GZIP is not strictly required,
removing it shouldn't hurt.
With arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola
GNU/Linux distribution we have the following size
reduction:
- text: 9752
- data: 0
- bss: 16
- total: 9768
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Soeren Moch <smoch@web.de>
The loadb and loads commands are not needed for booting.
There are also more reliable and faster alternatives to
loadb and loads that can be used with the current configuration.
As that the resulting image is already very close to the
size limit, removing the loadb and loads commands shouldn't
hurt.
With arm-linux-gnueabi-gcc 9.2.0-1 from the Parabola
GNU/Linux distribution we have the following size
reduction:
- text: 6733 bytes
- data: 116 bytes
- bss: 1172 bytes
- total: 8021 bytes
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Acked-by: Soeren Moch <smoch@web.de>
The current recommendation for best security practice from the US government
is to use SHA384 for TOP SECRET [1].
This patch adds support for SHA384 and SHA512 in the hash command, and also
allows FIT images to be hashed with these algorithms, and signed with
sha384,rsaXXXX and sha512,rsaXXXX
The SHA implementation is adapted from the linux kernel implementation.
[1] Commercial National Security Algorithm Suite
http://www.iad.gov/iad/programs/iad-initiatives/cnsa-suite.cfm
Signed-off-by: Reuben Dowle <reuben.dowle@4rf.com>
If there are aliases for an uclass, set the base for the "dynamically"
allocated numbers next to the highest alias.
Please note, that this might lead to holes in the sequences, depending
on the device tree. For example if there is only an alias "ethernet1",
the next device seq number would be 2.
In particular this fixes a problem with boards which are using ethernet
aliases but also might have network add-in cards like the E1000. If the
board is started with the add-in card and depending on the order of the
drivers, the E1000 might occupy the first ethernet device and mess up
all the hardware addresses, because the devices are now shifted by one.
Also adapt the test cases to the new handling and add test cases
checking the holes in the seq numbers.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com>
Tested-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Michal Simek <michal.simek@xilinx.com> [on zcu102-revA]
If CONFIG_DM_DEV_READ_INLINE is set, dev_read_alias_highest_id() calls
libfdt_get_highest_id(). But this function is only available if we have
libfdt compiled in. If its not available return -1, which matches the
return code for no alias found.
This fixes the following error on omapl138_lcdk:
arm-linux-gnueabi-ld.bfd: drivers/built-in.o: in function `dev_read_alias_highest_id':
/home/mw/repo/u-boot/include/dm/read.h:986: undefined reference to `fdtdec_get_alias_highest_id'
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is possible to specify a device tree node for an USB device. This is
useful if you have a static USB setup and want to use aliases which
point to these nodes, like on the Raspberry Pi.
The nodes are matched against their hub port number, the compatible
strings are not matched for now.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Check that the argument provided to the 'log level' command is in the range
between zero and CONFIG_LOG_MAX_LEVEL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
LOG_DEFAULT_LEVEL has been chosen as 6. Adjust the default of LOG_MAX_LEVEL
to this value.
Use ranges to clamp log levels to reasonable values.
Group output options by main U-Boot, SPL, TPL, followed by other logging
options.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert README.log to reStructuredText and add it to the generated HTML
documentation.
Assign doc/develop/logging.rst to the maintainer of LOGGING.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace CONFIG_(SPL_)MAX_LOG_LEVEL by the correct name as defined in
common/Kconfig:
line 668:config LOG_MAX_LEVEL
line 688:config SPL_LOG_MAX_LEVEL
line 708:config TPL_LOG_MAX_LEVEL
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In regmap_raw_{read,write}_range(), offsets are checked to make sure
they aren't out of range. But this check happens _after_ the address is
mapped from physical memory. Input should be sanity-checked before using
it. Mapping the address before validating it leaves the door open to
passing an invalid address to map_physmem(). So check for out of range
offsets _before_ mapping them.
This fixes a segmentation fault in sandbox when -1 is used as an offset
to regmap_{read,write}().
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
The symbol path already ends with a NUL character (something which is
actually checked by the code) and this NUL is included in
rel_path_len, so there is no need to add a second one.
This change fixes incorrect display in "fdt list /__symbols" after
applying an overlay with symbols.
Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present fdtdec_add_reserved_memory() calls fdtdec_get_addr_size()
to get address and size for the subnodes of /reserved-memory node.
We should honor #address-cells and #size-cells properties in the
parent node.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
fdtdec_get_addr_size() expects size is of type 'fdt_size_t', and
return value is of type 'fdt_addr_t'. Adjust their types accordingly.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, the following scenario will rebuild the first commit even
though it is not really necessary - the commit sha or the position in the
patchset did not change:
$ git am <local-patch-0001>
$ tools/buildman/buildman -P -E -W -b master mx6
<do some more development work>
$ git am <local-patch-0002>
$ tools/buildman/buildman -P -E -W -b master mx6 <- will rebuild the first
commit as well, even
though nothing has
changed about it.
This is due to the fact that previous results directories get removed
when the number of commits change. By removing the _of_#_ part of the
directory path, the commits will be rebuilt only if the commit sha or the
position in the patchset changes. Also, update the testcase to reflect this
change.
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Rather than suffering in silence, output a warning if something about the
checkpatch output cannot be understood.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes checkpatch outputs problems in the patch subject. Add support
for parsing this output and reporting it correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
If checkpatch is configured to output code we should ignore it. Similarly,
notes should be ignored.
Update the logic to handle these situations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Once we have determined what the line refers to there is no point in
processing it further. Update the logic to continue to the next line in
these cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
If checkpatch is run in 'emacs' mode it shows the filename at the
start of each line. Add support for this so that the warnings and errors
are correctly detected.
Signed-off-by: Simon Glass <sjg@chromium.org>
If no warnings are detected due to checkpatch having unexpected options,
patman currently shows an error:
TypeError: unsupported operand type(s) for +=: 'int' and 'property'
Fix this by initing the variable correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
@@ -237,18 +275,16 @@ static int core_to_pos(int nr)
intcpu_status(u32nr)
{
u64*table;
u64*table=get_spin_tbl_addr();
intpos;
if(nr==0){
table=(u64*)get_spin_tbl_addr();
printf("table base @ 0x%p\n",table);
}else{
pos=core_to_pos(nr);
if(pos<0)
return-1;
table=(u64*)get_spin_tbl_addr()+pos*
WORDS_PER_SPIN_TABLE_ENTRY;
table+=pos*WORDS_PER_SPIN_TABLE_ENTRY;
printf("table @ 0x%p\n",table);
printf(" addr - 0x%016llx\n",
table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX]);
@@ -264,26 +300,44 @@ int cpu_status(u32 nr)
intcpu_release(u32nr,intargc,char*constargv[])
{
u64boot_addr;
u64*table=(u64*)get_spin_tbl_addr();
u64*table=get_spin_tbl_addr();
intpos;
boot_addr=simple_strtoull(argv[0],NULL,16);
if(check_psci()){
/* SPIN Table is used */
pos=core_to_pos(nr);
if(pos<=0)
return-1;
table+=pos*WORDS_PER_SPIN_TABLE_ENTRY;
boot_addr=simple_strtoull(argv[0],NULL,16);
table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX]=boot_addr;
flush_dcache_range((unsignedlong)table,
(unsignedlong)table+SPIN_TABLE_ELEM_SIZE);
asmvolatile("dsb st");
smp_kick_all_cpus();/* only those with entry addr set will run */
/*
* When the first releasecommand runs, all cores are set to go. Those
* without a valid entry address will be trapped by "wfe". "sev" kicks
* them off to check the address again. When set, they continue to run.
* The secondary CPUs polling the spin-table above for a non-zero
* value. To save power "wfe" is called. Thus call "sev" here to
* wake the CPUs and let them check the spin-table again (see
* slave_cpu loop in lowlevel.S)
*/
asmvolatile("sev");
}else{
/* Use PSCI to kick the core */
structpt_regsregs;
printf("begin to kick cpu core #%d to address %llx\n",
nr,boot_addr);
regs.regs[0]=PSCI_0_2_FN64_CPU_ON;
regs.regs[1]=nr;
regs.regs[2]=boot_addr;
regs.regs[3]=0;
smc_call(®s);
if(regs.regs[0])
return-1;
}
return0;
}
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