xilinx: common: Change macro handling in board_fdt_blob_setup()
Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -324,25 +324,29 @@ void *board_fdt_blob_setup(void)
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{
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void *fdt_blob;
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#if !defined(CONFIG_VERSAL_NO_DDR) && !defined(CONFIG_ZYNQMP_NO_DDR)
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fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
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if (!IS_ENABLED(CONFIG_VERSAL_NO_DDR) &&
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!IS_ENABLED(CONFIG_VERSAL_NO_DDR)) {
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fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
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if (fdt_magic(fdt_blob) == FDT_MAGIC)
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return fdt_blob;
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if (fdt_magic(fdt_blob) == FDT_MAGIC)
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return fdt_blob;
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debug("DTB is not passed via %p\n", fdt_blob);
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#endif
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debug("DTB is not passed via %p\n", fdt_blob);
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}
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#ifdef CONFIG_SPL_BUILD
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/* FDT is at end of BSS unless it is in a different memory region */
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if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
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fdt_blob = (ulong *)&_image_binary_end;
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else
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fdt_blob = (ulong *)&__bss_end;
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#else
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/* FDT is at end of image */
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fdt_blob = (ulong *)&_end;
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#endif
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if (IS_ENABLED(CONFIG_SPL_BUILD)) {
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/*
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* FDT is at end of BSS unless it is in a different memory
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* region
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*/
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if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
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fdt_blob = (ulong *)&_image_binary_end;
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else
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fdt_blob = (ulong *)&__bss_end;
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} else {
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/* FDT is at end of image */
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fdt_blob = (ulong *)&_end;
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}
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if (fdt_magic(fdt_blob) == FDT_MAGIC)
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return fdt_blob;
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