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mtd: spi-nor: Enable QE bit for ISSI flash in case of SFDP

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Enable QE bit for ISSI flash chips.

QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Pragnesh Patel authored and Jagan Teki committed 2020-07-09 20:58:06 +05:30
1 parent 0e146993bb
commit e69d078039
1 file changed
+4 -3
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drivers/mtd/spi/spi-nor-core.c
+4 -3
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@@ -1291,7 +1291,7 @@ write_err:
return ret;
}
#ifdef CONFIG_SPI_FLASH_MACRONIX
#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI)
/**
* macronix_quad_enable() - set QE bit in Status Register.
* @nor: pointer to a 'struct spi_nor'
@@ -1969,7 +1969,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
params->quad_enable = spansion_no_read_cr_quad_enable;
break;
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX
#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI)
case BFPT_DWORD15_QER_SR1_BIT6:
params->quad_enable = macronix_quad_enable;
break;
@@ -2206,8 +2206,9 @@ static int spi_nor_init_params(struct spi_nor *nor,
if (params->hwcaps.mask & (SNOR_HWCAPS_READ_QUAD |
SNOR_HWCAPS_PP_QUAD)) {
switch (JEDEC_MFR(info)) {
#ifdef CONFIG_SPI_FLASH_MACRONIX
#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI)
case SNOR_MFR_MACRONIX:
case SNOR_MFR_ISSI:
params->quad_enable = macronix_quad_enable;
break;
#endif