arm: rmobile: Add Silicon Linux EK874 board support
The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).
This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.
DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
This commit is contained in:
Lad Prabhakar
Marek Vasut
parent
220f308a5c
commit
07148c1899
@ -824,6 +824,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
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r8a774e1-beacon-rzg2h-kit.dtb \
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r8a774a1-hihope-rzg2m-u-boot.dtb \
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r8a774b1-hihope-rzg2n-u-boot.dtb \
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r8a774c0-ek874-u-boot.dtb \
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r8a774e1-hihope-rzg2h-u-boot.dtb \
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r8a77950-ulcb-u-boot.dtb \
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r8a77950-salvator-x-u-boot.dtb \
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64
arch/arm/dts/cat875.dtsi
Normal file
64
arch/arm/dts/cat875.dtsi
Normal file
@ -0,0 +1,64 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Silicon Linux sub board for CAT874 (CAT875)
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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/ {
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model = "Silicon Linux sub board for CAT874 (CAT875)";
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aliases {
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ethernet0 = &avb;
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};
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};
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&avb {
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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interrupt-parent = <&gpio2>;
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interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
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};
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};
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&can0 {
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pinctrl-0 = <&can0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&can1 {
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pinctrl-0 = <&can1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&pciec0 {
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status = "okay";
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};
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&pfc {
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avb_pins: avb {
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mux {
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groups = "avb_mii";
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function = "avb";
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};
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};
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can0_pins: can0 {
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groups = "can0_data";
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function = "can0";
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};
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can1_pins: can1 {
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groups = "can1_data";
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function = "can1";
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};
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};
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453
arch/arm/dts/r8a774c0-cat874.dts
Normal file
453
arch/arm/dts/r8a774c0-cat874.dts
Normal file
@ -0,0 +1,453 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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/dts-v1/;
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#include "r8a774c0.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/display/tda998x.h>
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/ {
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model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
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compatible = "si-linux,cat874", "renesas,r8a774c0";
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aliases {
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serial0 = &scif2;
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serial1 = &hscif2;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
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stdout-path = "serial0:115200n8";
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};
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_out: endpoint {
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remote-endpoint = <&tda19988_out>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
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label = "LED0";
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};
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led1 {
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gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
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label = "LED1";
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};
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led2 {
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gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
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label = "LED2";
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};
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led3 {
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gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
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label = "LED3";
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};
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};
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0x0 0x48000000 0x0 0x78000000>;
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};
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reg_12p0v: regulator-12p0v {
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compatible = "regulator-fixed";
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regulator-name = "D12.0V";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sound: sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "CAT874 HDMI sound";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&sndcpu>;
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simple-audio-card,frame-master = <&sndcpu>;
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sndcodec: simple-audio-card,codec {
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sound-dai = <&tda19988>;
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};
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sndcpu: simple-audio-card,cpu {
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sound-dai = <&rcar_sound>;
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};
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1>, <1800000 0>;
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};
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wlan_en_reg: fixedregulator {
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compatible = "regulator-fixed";
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regulator-name = "wlan-en-regulator";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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startup-delay-us = <70000>;
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gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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x13_clk: x13 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <74250000>;
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};
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hs_ep: endpoint {
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remote-endpoint = <&usb3_hs_ep>;
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};
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};
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port@1 {
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reg = <1>;
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ss_ep: endpoint {
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remote-endpoint = <&hd3ss3220_in_ep>;
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};
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};
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};
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};
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};
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&audio_clk_a {
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clock-frequency = <22579200>;
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};
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&du {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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status = "okay";
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&x13_clk>;
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clock-names = "du.0", "du.1", "dclkin.0";
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ports {
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port@0 {
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endpoint {
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remote-endpoint = <&tda19988_in>;
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};
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};
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};
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};
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&ehci0 {
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dr_mode = "host";
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status = "okay";
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};
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&extal_clk {
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clock-frequency = <48000000>;
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};
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&hscif2 {
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pinctrl-0 = <&hscif2_pins>;
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pinctrl-names = "default";
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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compatible = "ti,wl1837-st";
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enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
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};
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <100000>;
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hd3ss3220@47 {
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compatible = "ti,hd3ss3220";
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reg = <0x47>;
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interrupt-parent = <&gpio6>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hd3ss3220_in_ep: endpoint {
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remote-endpoint = <&ss_ep>;
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};
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};
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port@1 {
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reg = <1>;
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hd3ss3220_out_ep: endpoint {
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remote-endpoint = <&usb3_role_switch>;
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};
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};
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};
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};
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tda19988: tda19988@70 {
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compatible = "nxp,tda998x";
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reg = <0x70>;
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interrupt-parent = <&gpio1>;
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
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video-ports = <0x234501>;
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#sound-dai-cells = <0>;
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audio-ports = <TDA998x_I2S 0x03>;
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clocks = <&rcar_sound 1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tda19988_in: endpoint {
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remote-endpoint = <&du_out_rgb>;
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};
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};
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port@1 {
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reg = <1>;
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tda19988_out: endpoint {
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remote-endpoint = <&hdmi_con_out>;
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};
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};
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};
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};
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_pins>;
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pinctrl-names = "default";
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status = "okay";
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clock-frequency = <400000>;
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rtc@32 {
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compatible = "epson,rx8571";
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reg = <0x32>;
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};
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};
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&lvds0 {
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status = "okay";
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clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
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clock-names = "fck", "dclkin.0", "extal";
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};
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&ohci0 {
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dr_mode = "host";
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status = "okay";
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};
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&pcie_bus_clk {
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clock-frequency = <100000000>;
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};
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&pciec0 {
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/* Map all possible DDR as inbound ranges */
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dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
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};
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&pfc {
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du_pins: du {
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groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
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"du_clk_in_0";
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function = "du";
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};
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hscif2_pins: hscif2 {
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groups = "hscif2_data_a", "hscif2_ctrl_a";
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function = "hscif2";
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};
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i2c1_pins: i2c1 {
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groups = "i2c1_b";
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function = "i2c1";
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};
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scif2_pins: scif2 {
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groups = "scif2_data_a";
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function = "scif2";
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};
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <3300>;
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};
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sdhi0_pins_uhs: sd0_uhs {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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power-source = <1800>;
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};
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sdhi3_pins: sd3 {
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groups = "sdhi3_data4", "sdhi3_ctrl";
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function = "sdhi3";
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power-source = <1800>;
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};
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sound_clk_pins: sound_clk {
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groups = "audio_clkout1_a";
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function = "audio_clk";
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};
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sound_pins: sound {
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groups = "ssi01239_ctrl", "ssi0_data";
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function = "ssi";
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};
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usb30_pins: usb30 {
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groups = "usb30", "usb30_id";
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function = "usb30";
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};
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};
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&rcar_sound {
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pinctrl-0 = <&sound_pins &sound_clk_pins>;
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pinctrl-names = "default";
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/* Single DAI */
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#sound-dai-cells = <0>;
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/* audio_clkout0/1/2/3 */
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#clock-cells = <1>;
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clock-frequency = <11289600>;
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status = "okay";
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rcar_sound,dai {
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dai0 {
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playback = <&ssi0 &src0 &dvc0>;
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};
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};
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};
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&rwdt {
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timeout-sec = <60>;
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status = "okay";
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};
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&scif2 {
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pinctrl-0 = <&scif2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-1 = <&sdhi0_pins_uhs>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <&vcc_sdhi0>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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status = "okay";
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};
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&sdhi3 {
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status = "okay";
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pinctrl-0 = <&sdhi3_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&wlan_en_reg>;
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bus-width = <4>;
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non-removable;
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cap-power-off-card;
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keep-power-in-suspend;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1837";
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reg = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&usb2_phy0 {
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renesas,no-otg-pins;
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status = "okay";
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};
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&usb3_peri0 {
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companion = <&xhci0>;
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status = "okay";
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usb-role-switch;
|
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|
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usb3_hs_ep: endpoint {
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remote-endpoint = <&hs_ep>;
|
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};
|
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};
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port@1 {
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reg = <1>;
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usb3_role_switch: endpoint {
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remote-endpoint = <&hd3ss3220_out_ep>;
|
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};
|
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};
|
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};
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};
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&xhci0 {
|
||||
pinctrl-0 = <&usb30_pins>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
33
arch/arm/dts/r8a774c0-ek874-u-boot.dts
Normal file
33
arch/arm/dts/r8a774c0-ek874-u-boot.dts
Normal file
@ -0,0 +1,33 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot for the Hihope board
|
||||
*
|
||||
* Copyright (C) 2021 Renesas Electronisc Corporation
|
||||
*/
|
||||
|
||||
#include "r8a774c0-ek874.dts"
|
||||
#include "r8a774c0-u-boot.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
spi0 = &rpc;
|
||||
};
|
||||
};
|
||||
|
||||
&rpc {
|
||||
num-cs = <1>;
|
||||
status = "okay";
|
||||
spi-max-frequency = <50000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
flash0: spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "w25m512jv", "spi-flash", "jedec,spi-nor";
|
||||
spi-max-frequency = <50000000>;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <1>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
14
arch/arm/dts/r8a774c0-ek874.dts
Normal file
14
arch/arm/dts/r8a774c0-ek874.dts
Normal file
@ -0,0 +1,14 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874)
|
||||
*
|
||||
* Copyright (C) 2021 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
#include "r8a774c0-cat874.dts"
|
||||
#include "cat875.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Silicon Linux RZ/G2E evaluation kit EK874 (CAT874 + CAT875)";
|
||||
compatible = "si-linux,cat875", "si-linux,cat874", "renesas,r8a774c0";
|
||||
};
|
||||
53
arch/arm/dts/r8a774c0-u-boot.dtsi
Normal file
53
arch/arm/dts/r8a774c0-u-boot.dtsi
Normal file
@ -0,0 +1,53 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Device Tree Source extras for U-Boot on R8A774C0 SoC
|
||||
*
|
||||
* Copyright (C) 2021 Renesas Electronics Corp.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "r8a779x-u-boot.dtsi"
|
||||
|
||||
/ {
|
||||
soc {
|
||||
rpc: rpc@ee200000 {
|
||||
compatible = "renesas,rcar-gen3-rpc", "renesas,rpc-r8a774c0";
|
||||
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
|
||||
clocks = <&cpg CPG_MOD 917>;
|
||||
bank-width = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/delete-node/ &can0;
|
||||
/delete-node/ &can1;
|
||||
/delete-node/ &canfd;
|
||||
/delete-node/ &pwm0;
|
||||
/delete-node/ &pwm1;
|
||||
/delete-node/ &pwm2;
|
||||
/delete-node/ &pwm3;
|
||||
/delete-node/ &pwm4;
|
||||
/delete-node/ &pwm5;
|
||||
/delete-node/ &pwm6;
|
||||
/delete-node/ &vin4;
|
||||
/delete-node/ &vin5;
|
||||
/delete-node/ &rcar_sound;
|
||||
/delete-node/ &audma0;
|
||||
/delete-node/ &sdhi1;
|
||||
/delete-node/ &sdhi3;
|
||||
/delete-node/ &vspb0;
|
||||
/delete-node/ &vspd0;
|
||||
/delete-node/ &vspd1;
|
||||
/delete-node/ &vspi0;
|
||||
/delete-node/ &fcpvb0;
|
||||
/delete-node/ &fcpvd0;
|
||||
/delete-node/ &fcpvd1;
|
||||
/delete-node/ &fcpvi0;
|
||||
/delete-node/ &csi40;
|
||||
/delete-node/ &du;
|
||||
/delete-node/ &lvds0;
|
||||
/delete-node/ &lvds1;
|
||||
/delete-node/ &hdmi_con_out;
|
||||
/delete-node/ &sound;
|
||||
/delete-node/ &tda19988;
|
||||
@ -113,6 +113,12 @@ config TARGET_HIHOPE_RZG2
|
||||
help
|
||||
Support for RZG2 HiHope platform
|
||||
|
||||
config TARGET_SILINUX_EK874
|
||||
bool "Silicon Linux EK874 board"
|
||||
imply R8A774C0
|
||||
help
|
||||
Support for Silicon Linux EK874 platform
|
||||
|
||||
config TARGET_SALVATOR_X
|
||||
bool "Salvator-X board"
|
||||
imply R8A7795
|
||||
@ -148,6 +154,7 @@ source "board/renesas/salvator-x/Kconfig"
|
||||
source "board/renesas/ulcb/Kconfig"
|
||||
source "board/beacon/beacon-rzg2m/Kconfig"
|
||||
source "board/hoperun/hihope-rzg2/Kconfig"
|
||||
source "board/silinux/ek874/Kconfig"
|
||||
|
||||
config MULTI_DTB_FIT_UNCOMPRESS_SZ
|
||||
default 0x80000 if TARGET_HIHOPE_RZG2
|
||||
|
||||
15
board/silinux/ek874/Kconfig
Normal file
15
board/silinux/ek874/Kconfig
Normal file
@ -0,0 +1,15 @@
|
||||
if TARGET_SILINUX_EK874
|
||||
|
||||
config SYS_SOC
|
||||
default "rmobile"
|
||||
|
||||
config SYS_BOARD
|
||||
default "ek874"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "silinux"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "silinux-ek874"
|
||||
|
||||
endif
|
||||
6
board/silinux/ek874/MAINTAINERS
Normal file
6
board/silinux/ek874/MAINTAINERS
Normal file
@ -0,0 +1,6 @@
|
||||
SILINUX_EK874 BOARD
|
||||
M: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
|
||||
S: Maintained
|
||||
F: board/silinux/ek874/
|
||||
F: include/configs/silinux-ek874.h
|
||||
F: configs/silinux_ek874_defconfig
|
||||
9
board/silinux/ek874/Makefile
Normal file
9
board/silinux/ek874/Makefile
Normal file
@ -0,0 +1,9 @@
|
||||
#
|
||||
# board/silinux/ek874/Makefile
|
||||
#
|
||||
# Copyright (C) 2021 Renesas Electronics Corporation
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y := ek874.o ../../renesas/rcar-common/common.o
|
||||
30
board/silinux/ek874/ek874.c
Normal file
30
board/silinux/ek874/ek874.c
Normal file
@ -0,0 +1,30 @@
|
||||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* board/silinux/ek874/ek874.c
|
||||
* This file is ek874 board support.
|
||||
*
|
||||
* Copyright (C) 2021 Renesas Electronics Corporation
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/global_data.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define RST_BASE 0xE6160000
|
||||
#define RST_CA53RESCNT (RST_BASE + 0x44)
|
||||
#define RST_CA53_CODE 0x5A5A000F
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
/* address of boot parameters */
|
||||
gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void reset_cpu(ulong addr)
|
||||
{
|
||||
writel(RST_CA53_CODE, RST_CA53RESCNT);
|
||||
}
|
||||
83
configs/silinux_ek874_defconfig
Normal file
83
configs/silinux_ek874_defconfig
Normal file
@ -0,0 +1,83 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_CPU_INIT=y
|
||||
CONFIG_ARCH_RMOBILE=y
|
||||
CONFIG_SYS_TEXT_BASE=0x50000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_ENV_OFFSET=0x3F0000
|
||||
CONFIG_ENV_SECT_SIZE=0x10000
|
||||
CONFIG_RCAR_GEN3=y
|
||||
CONFIG_TARGET_SILINUX_EK874=y
|
||||
# CONFIG_BOARD_EARLY_INIT_F is not set
|
||||
# CONFIG_SPL is not set
|
||||
CONFIG_SOC_DEVICE=y
|
||||
CONFIG_SOC_DEVICE_RENESAS=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot"
|
||||
CONFIG_SMBIOS_PRODUCT_NAME=""
|
||||
CONFIG_FIT=y
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
|
||||
CONFIG_SUPPORT_RAW_INITRD=y
|
||||
CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb"
|
||||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PART=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_SPI_FLASH=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_BLK=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_CLK_RENESAS=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_RCAR_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_RCAR_I2C=y
|
||||
CONFIG_SYS_I2C_RCAR_IIC=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_BAR=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_SPI_FLASH_USE_4K_SECTORS=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_RENESAS_RPC_SPI=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_IO_VOLTAGE=y
|
||||
CONFIG_MMC_UHS_SUPPORT=y
|
||||
CONFIG_RENESAS_SDHI=y
|
||||
CONFIG_BITBANGMII=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_RENESAS_RAVB=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_SCIF_CONSOLE=y
|
||||
CONFIG_TEE=y
|
||||
CONFIG_OPTEE=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_GENERIC=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_SMBIOS_MANUFACTURER=""
|
||||
20
include/configs/silinux-ek874.h
Normal file
20
include/configs/silinux-ek874.h
Normal file
@ -0,0 +1,20 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* include/configs/silinux-ek874.h
|
||||
* This file is Silicon Linux EK874 board configuration.
|
||||
*
|
||||
* Copyright (C) 2021 Renesas Electronics Corporation
|
||||
*/
|
||||
|
||||
#ifndef __SILINUX_EK874_H
|
||||
#define __SILINUX_EK874_H
|
||||
|
||||
#include "rcar-gen3-common.h"
|
||||
|
||||
/* Ethernet RAVB */
|
||||
#define CONFIG_BITBANGMII_MULTI
|
||||
|
||||
/* Generic Timer Definitions (use in assembler source) */
|
||||
#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
|
||||
|
||||
#endif /* __SILINUX_EK874_H */
|
||||
8
include/dt-bindings/display/tda998x.h
Normal file
8
include/dt-bindings/display/tda998x.h
Normal file
@ -0,0 +1,8 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _DT_BINDINGS_TDA998X_H
|
||||
#define _DT_BINDINGS_TDA998X_H
|
||||
|
||||
#define TDA998x_SPDIF 1
|
||||
#define TDA998x_I2S 2
|
||||
|
||||
#endif /*_DT_BINDINGS_TDA998X_H */
|
||||
Loading…
Reference in New Issue
Block a user