imx: ventana: add Gateworks Ventana dts
Add Gateworks Ventana dts/dtsi files from Linux 5.11 in preparation for conversion to driver-model. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
parent
d331cee596
commit
acb9a13b50
@ -673,6 +673,20 @@ dtb-y += \
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imx6dl-cubox-i-emmc-som-v15.dtb \
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imx6dl-cubox-i-som-v15.dtb \
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imx6dl-dhcom-pdk2.dtb \
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imx6dl-gw51xx.dtb \
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imx6dl-gw52xx.dtb \
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imx6dl-gw53xx.dtb \
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imx6dl-gw54xx.dtb \
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imx6dl-gw551x.dtb \
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imx6dl-gw552x.dtb \
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imx6dl-gw553x.dtb \
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imx6dl-gw560x.dtb \
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imx6dl-gw5903.dtb \
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imx6dl-gw5904.dtb \
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imx6dl-gw5907.dtb \
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imx6dl-gw5910.dtb \
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imx6dl-gw5912.dtb \
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imx6dl-gw5913.dtb \
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imx6dl-hummingboard2.dtb \
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imx6dl-hummingboard2-emmc-som-v15.dtb \
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imx6dl-hummingboard2-som-v15.dtb \
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@ -702,6 +716,20 @@ dtb-y += \
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imx6q-cubox-i-som-v15.dtb \
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imx6q-dhcom-pdk2.dtb \
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imx6q-display5.dtb \
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imx6q-gw51xx.dtb \
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imx6q-gw52xx.dtb \
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imx6q-gw53xx.dtb \
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imx6q-gw54xx.dtb \
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imx6q-gw551x.dtb \
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imx6q-gw552x.dtb \
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imx6q-gw553x.dtb \
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imx6q-gw560x.dtb \
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imx6q-gw5903.dtb \
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imx6q-gw5904.dtb \
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imx6q-gw5907.dtb \
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imx6q-gw5910.dtb \
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imx6q-gw5912.dtb \
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imx6q-gw5913.dtb \
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imx6q-hummingboard2.dtb \
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imx6q-hummingboard2-emmc-som-v15.dtb \
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imx6q-hummingboard2-som-v15.dtb \
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13
arch/arm/dts/imx6dl-gw51xx.dts
Normal file
13
arch/arm/dts/imx6dl-gw51xx.dts
Normal file
@ -0,0 +1,13 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2013 Gateworks Corporation
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-gw51xx.dtsi"
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/ {
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model = "Gateworks Ventana i.MX6 DualLite/Solo GW51XX";
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compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
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};
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71
arch/arm/dts/imx6dl-gw52xx.dts
Normal file
71
arch/arm/dts/imx6dl-gw52xx.dts
Normal file
@ -0,0 +1,71 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2013 Gateworks Corporation
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-gw52xx.dtsi"
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/ {
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model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX";
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compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
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};
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&i2c3 {
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adv7180: camera@20 {
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compatible = "adi,adv7180";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adv7180>;
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reg = <0x20>;
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powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio3>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
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port {
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adv7180_to_ipu1_csi1_mux: endpoint {
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remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
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bus-width = <8>;
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};
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};
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};
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};
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&ipu1_csi1_from_ipu1_csi1_mux {
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bus-width = <8>;
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};
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&ipu1_csi1_mux_from_parallel_sensor {
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remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
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bus-width = <8>;
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};
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&ipu1_csi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu1_csi1>;
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};
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&iomuxc {
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pinctrl_adv7180: adv7180grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
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>;
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};
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pinctrl_ipu1_csi1: ipu1_csi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1b0b0
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MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x1b0b0
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MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x1b0b0
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MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x1b0b0
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MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x1b0b0
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MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x1b0b0
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MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x1b0b0
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MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x1b0b0
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MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x1b0b0
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MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1b0b0
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MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x1b0b0
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>;
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};
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};
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71
arch/arm/dts/imx6dl-gw53xx.dts
Normal file
71
arch/arm/dts/imx6dl-gw53xx.dts
Normal file
@ -0,0 +1,71 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2013 Gateworks Corporation
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-gw53xx.dtsi"
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/ {
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model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX";
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compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
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};
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&i2c3 {
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adv7180: camera@20 {
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compatible = "adi,adv7180";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adv7180>;
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reg = <0x20>;
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powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio3>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
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port {
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adv7180_to_ipu1_csi1_mux: endpoint {
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remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
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bus-width = <8>;
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};
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};
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};
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};
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&ipu1_csi1_from_ipu1_csi1_mux {
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bus-width = <8>;
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};
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&ipu1_csi1_mux_from_parallel_sensor {
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remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
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bus-width = <8>;
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};
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&ipu1_csi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu1_csi1>;
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};
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&iomuxc {
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pinctrl_adv7180: adv7180grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
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>;
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};
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pinctrl_ipu1_csi1: ipu1_csi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1b0b0
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MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x1b0b0
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MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x1b0b0
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MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x1b0b0
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MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x1b0b0
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MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x1b0b0
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MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x1b0b0
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MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x1b0b0
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MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x1b0b0
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MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1b0b0
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MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x1b0b0
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>;
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};
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};
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71
arch/arm/dts/imx6dl-gw54xx.dts
Normal file
71
arch/arm/dts/imx6dl-gw54xx.dts
Normal file
@ -0,0 +1,71 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2013 Gateworks Corporation
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-gw54xx.dtsi"
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/ {
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model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX";
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compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
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};
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&i2c3 {
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adv7180: camera@20 {
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compatible = "adi,adv7180";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adv7180>;
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reg = <0x20>;
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powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio3>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
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port {
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adv7180_to_ipu1_csi1_mux: endpoint {
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remote-endpoint = <&ipu1_csi1_mux_from_parallel_sensor>;
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bus-width = <8>;
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};
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};
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};
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};
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&ipu1_csi1_from_ipu1_csi1_mux {
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bus-width = <8>;
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};
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&ipu1_csi1_mux_from_parallel_sensor {
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remote-endpoint = <&adv7180_to_ipu1_csi1_mux>;
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bus-width = <8>;
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};
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&ipu1_csi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu1_csi1>;
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};
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&iomuxc {
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pinctrl_adv7180: adv7180grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
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>;
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};
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pinctrl_ipu1_csi1: ipu1_csi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1b0b0
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MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x1b0b0
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MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x1b0b0
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MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x1b0b0
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MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x1b0b0
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MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x1b0b0
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MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x1b0b0
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MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x1b0b0
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MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x1b0b0
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MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1b0b0
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MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x1b0b0
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>;
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};
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};
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55
arch/arm/dts/imx6dl-gw551x.dts
Normal file
55
arch/arm/dts/imx6dl-gw551x.dts
Normal file
@ -0,0 +1,55 @@
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/*
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* Copyright 2014 Gateworks Corporation
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
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||||
* the License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
||||
*
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* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-gw551x.dtsi"
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/ {
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model = "Gateworks Ventana i.MX6 DualLite/Solo GW551X";
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compatible = "gw,imx6dl-gw551x", "gw,ventana", "fsl,imx6dl";
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};
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14
arch/arm/dts/imx6dl-gw552x.dts
Normal file
14
arch/arm/dts/imx6dl-gw552x.dts
Normal file
@ -0,0 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2014 Gateworks Corporation
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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#include "imx6qdl-gw552x.dtsi"
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/ {
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model = "Gateworks Ventana i.MX6 DualLite/Solo GW552X";
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compatible = "gw,imx6dl-gw552x", "gw,ventana", "fsl,imx6dl";
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};
|
55
arch/arm/dts/imx6dl-gw553x.dts
Normal file
55
arch/arm/dts/imx6dl-gw553x.dts
Normal file
@ -0,0 +1,55 @@
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/*
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* Copyright 2016 Gateworks Corporation
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*
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* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw553x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 DualLite/Solo GW553X";
|
||||
compatible = "gw,imx6dl-gw553x", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
55
arch/arm/dts/imx6dl-gw560x.dts
Normal file
55
arch/arm/dts/imx6dl-gw560x.dts
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw560x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 DualLite/Solo GW560X";
|
||||
compatible = "gw,imx6dl-gw560x", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
55
arch/arm/dts/imx6dl-gw5903.dts
Normal file
55
arch/arm/dts/imx6dl-gw5903.dts
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw5903.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Duallite/Solo GW5903";
|
||||
compatible = "gw,imx6dl-gw5903", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
55
arch/arm/dts/imx6dl-gw5904.dts
Normal file
55
arch/arm/dts/imx6dl-gw5904.dts
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw5904.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 DualLite/Solo GW5904";
|
||||
compatible = "gw,imx6dl-gw5904", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
14
arch/arm/dts/imx6dl-gw5907.dts
Normal file
14
arch/arm/dts/imx6dl-gw5907.dts
Normal file
@ -0,0 +1,14 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw5907.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907";
|
||||
compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
14
arch/arm/dts/imx6dl-gw5910.dts
Normal file
14
arch/arm/dts/imx6dl-gw5910.dts
Normal file
@ -0,0 +1,14 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw5910.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 DualLite/Solo GW5910";
|
||||
compatible = "gw,imx6dl-gw5910", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
13
arch/arm/dts/imx6dl-gw5912.dts
Normal file
13
arch/arm/dts/imx6dl-gw5912.dts
Normal file
@ -0,0 +1,13 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw5912.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 DualLite/Solo GW5912";
|
||||
compatible = "gw,imx6dl-gw5912", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
14
arch/arm/dts/imx6dl-gw5913.dts
Normal file
14
arch/arm/dts/imx6dl-gw5913.dts
Normal file
@ -0,0 +1,14 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6dl.dtsi"
|
||||
#include "imx6qdl-gw5913.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913";
|
||||
compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl";
|
||||
};
|
13
arch/arm/dts/imx6q-gw51xx.dts
Normal file
13
arch/arm/dts/imx6q-gw51xx.dts
Normal file
@ -0,0 +1,13 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw51xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW51XX";
|
||||
compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
|
||||
};
|
75
arch/arm/dts/imx6q-gw52xx.dts
Normal file
75
arch/arm/dts/imx6q-gw52xx.dts
Normal file
@ -0,0 +1,75 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw52xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW52XX";
|
||||
compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
adv7180: camera@20 {
|
||||
compatible = "adi,adv7180";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adv7180>;
|
||||
reg = <0x20>;
|
||||
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
port {
|
||||
adv7180_to_ipu2_csi1_mux: endpoint {
|
||||
remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipu2_csi1_from_ipu2_csi1_mux {
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu2_csi1_mux_from_parallel_sensor {
|
||||
remote-endpoint = <&adv7180_to_ipu2_csi1_mux>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu2_csi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu2_csi1>;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_adv7180: adv7180grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
|
||||
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ipu2_csi1: ipu2_csi1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0
|
||||
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0
|
||||
MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0
|
||||
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
75
arch/arm/dts/imx6q-gw53xx.dts
Normal file
75
arch/arm/dts/imx6q-gw53xx.dts
Normal file
@ -0,0 +1,75 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw53xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW53XX";
|
||||
compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
adv7180: camera@20 {
|
||||
compatible = "adi,adv7180";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adv7180>;
|
||||
reg = <0x20>;
|
||||
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
port {
|
||||
adv7180_to_ipu2_csi1_mux: endpoint {
|
||||
remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipu2_csi1_from_ipu2_csi1_mux {
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu2_csi1_mux_from_parallel_sensor {
|
||||
remote-endpoint = <&adv7180_to_ipu2_csi1_mux>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu2_csi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu2_csi1>;
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_adv7180: adv7180grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
|
||||
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ipu2_csi1: ipu2_csi1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0
|
||||
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0
|
||||
MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0
|
||||
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
177
arch/arm/dts/imx6q-gw54xx.dts
Normal file
177
arch/arm/dts/imx6q-gw54xx.dts
Normal file
@ -0,0 +1,177 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw54xx.dtsi"
|
||||
#include <dt-bindings/media/tda1997x.h>
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX";
|
||||
compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
|
||||
|
||||
sound-digital {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "tda1997x-audio";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&sound_codec>;
|
||||
simple-audio-card,frame-master = <&sound_codec>;
|
||||
|
||||
sound_cpu: simple-audio-card,cpu {
|
||||
sound-dai = <&ssi2>;
|
||||
};
|
||||
|
||||
sound_codec: simple-audio-card,codec {
|
||||
sound-dai = <&hdmi_receiver>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
adv7180: camera@20 {
|
||||
compatible = "adi,adv7180";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adv7180>;
|
||||
reg = <0x20>;
|
||||
powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
port {
|
||||
adv7180_to_ipu2_csi1_mux: endpoint {
|
||||
remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_receiver: hdmi-receiver@48 {
|
||||
compatible = "nxp,tda19971";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tda1997x>;
|
||||
reg = <0x48>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
DOVDD-supply = <®_3p3v>;
|
||||
AVDD-supply = <&sw4_reg>;
|
||||
DVDD-supply = <&sw4_reg>;
|
||||
#sound-dai-cells = <0>;
|
||||
nxp,audout-format = "i2s";
|
||||
nxp,audout-layout = <0>;
|
||||
nxp,audout-width = <16>;
|
||||
nxp,audout-mclk-fs = <128>;
|
||||
/*
|
||||
* The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
|
||||
* and Y[11:4] across 16bits in the same cycle
|
||||
* which we map to VP[15:08]<->CSI_DATA[19:12]
|
||||
*/
|
||||
nxp,vidout-portcfg =
|
||||
/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
|
||||
< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
|
||||
/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
|
||||
< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
|
||||
/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
|
||||
< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
|
||||
/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
|
||||
< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
|
||||
|
||||
port {
|
||||
tda1997x_to_ipu1_csi0_mux: endpoint {
|
||||
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
|
||||
bus-width = <16>;
|
||||
hsync-active = <1>;
|
||||
vsync-active = <1>;
|
||||
data-active = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipu1_csi0_from_ipu1_csi0_mux {
|
||||
bus-width = <16>;
|
||||
};
|
||||
|
||||
&ipu1_csi0_mux_from_parallel_sensor {
|
||||
remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
|
||||
bus-width = <16>;
|
||||
};
|
||||
|
||||
&ipu1_csi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu1_csi0>;
|
||||
};
|
||||
|
||||
&ipu2_csi1_from_ipu2_csi1_mux {
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu2_csi1_mux_from_parallel_sensor {
|
||||
remote-endpoint = <&adv7180_to_ipu2_csi1_mux>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu2_csi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu2_csi1>;
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_adv7180: adv7180grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0
|
||||
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ipu1_csi0: ipu1_csi0grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ipu2_csi1: ipu2_csi1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0
|
||||
MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0
|
||||
MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0
|
||||
MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0
|
||||
MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_tda1997x: tda1997xgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
55
arch/arm/dts/imx6q-gw551x.dts
Normal file
55
arch/arm/dts/imx6q-gw551x.dts
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2014 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw551x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW551X";
|
||||
compatible = "gw,imx6q-gw551x", "gw,ventana", "fsl,imx6q";
|
||||
};
|
18
arch/arm/dts/imx6q-gw552x.dts
Normal file
18
arch/arm/dts/imx6q-gw552x.dts
Normal file
@ -0,0 +1,18 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2014 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw552x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW552X";
|
||||
compatible = "gw,imx6q-gw552x", "gw,ventana", "fsl,imx6q";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
55
arch/arm/dts/imx6q-gw553x.dts
Normal file
55
arch/arm/dts/imx6q-gw553x.dts
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2016 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw553x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW553X";
|
||||
compatible = "gw,imx6q-gw553x", "gw,ventana", "fsl,imx6q";
|
||||
};
|
59
arch/arm/dts/imx6q-gw560x.dts
Normal file
59
arch/arm/dts/imx6q-gw560x.dts
Normal file
@ -0,0 +1,59 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw560x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW560X";
|
||||
compatible = "gw,imx6q-gw560x", "gw,ventana", "fsl,imx6q";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
55
arch/arm/dts/imx6q-gw5903.dts
Normal file
55
arch/arm/dts/imx6q-gw5903.dts
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw5903.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW5903";
|
||||
compatible = "gw,imx6q-gw5903", "gw,ventana", "fsl,imx6q";
|
||||
};
|
59
arch/arm/dts/imx6q-gw5904.dts
Normal file
59
arch/arm/dts/imx6q-gw5904.dts
Normal file
@ -0,0 +1,59 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw5904.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW5904";
|
||||
compatible = "gw,imx6q-gw5904", "gw,ventana", "fsl,imx6q";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
14
arch/arm/dts/imx6q-gw5907.dts
Normal file
14
arch/arm/dts/imx6q-gw5907.dts
Normal file
@ -0,0 +1,14 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw5907.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW5907";
|
||||
compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q";
|
||||
};
|
14
arch/arm/dts/imx6q-gw5910.dts
Normal file
14
arch/arm/dts/imx6q-gw5910.dts
Normal file
@ -0,0 +1,14 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw5910.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW5910";
|
||||
compatible = "gw,imx6q-gw5910", "gw,ventana", "fsl,imx6q";
|
||||
};
|
13
arch/arm/dts/imx6q-gw5912.dts
Normal file
13
arch/arm/dts/imx6q-gw5912.dts
Normal file
@ -0,0 +1,13 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw5912.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW5912";
|
||||
compatible = "gw,imx6q-gw5912", "gw,ventana", "fsl,imx6q";
|
||||
};
|
14
arch/arm/dts/imx6q-gw5913.dts
Normal file
14
arch/arm/dts/imx6q-gw5913.dts
Normal file
@ -0,0 +1,14 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "imx6q.dtsi"
|
||||
#include "imx6qdl-gw5913.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gateworks Ventana i.MX6 Dual/Quad GW5913";
|
||||
compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q";
|
||||
};
|
637
arch/arm/dts/imx6qdl-gw51xx.dtsi
Normal file
637
arch/arm/dts/imx6qdl-gw51xx.dtsi
Normal file
@ -0,0 +1,637 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
nand = &gpmi;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc1,115200";
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc: ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw1 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
|
||||
reg_1p8v: sw2 {
|
||||
regulator-name = "vdd1p8";
|
||||
regulator-min-microvolt = <1033310>;
|
||||
regulator-max-microvolt = <2004000>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw4 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
|
||||
reg_2p5v: ldo2 {
|
||||
regulator-name = "vdd2p5";
|
||||
regulator-min-microvolt = <2490375>;
|
||||
regulator-max-microvolt = <2490375>;
|
||||
lltc,fb-voltage-divider = <487000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
adv7180: camera@20 {
|
||||
compatible = "adi,adv7180";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adv7180>;
|
||||
reg = <0x20>;
|
||||
powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
port {
|
||||
adv7180_to_ipu1_csi0_mux: endpoint {
|
||||
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipu1_csi0_from_ipu1_csi0_mux {
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu1_csi0_mux_from_parallel_sensor {
|
||||
remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu1_csi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu1_csi0>;
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_adv7180: adv7180grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0
|
||||
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ipu1_csi0: ipu1csi0grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
780
arch/arm/dts/imx6qdl-gw52xx.dtsi
Normal file
780
arch/arm/dts/imx6qdl-gw52xx.dtsi
Normal file
@ -0,0 +1,780 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
nand = &gpmi;
|
||||
ssi0 = &ssi1;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc1,115200";
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm4 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_1p0v: regulator-1p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P0V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "fsl,imx6q-ventana-sgtl5000",
|
||||
"fsl,imx-audio-sgtl5000";
|
||||
model = "sgtl5000-audio";
|
||||
ssi-controller = <&ssi1>;
|
||||
audio-codec = <&codec>;
|
||||
audio-routing =
|
||||
"MIC_IN", "Mic Jack",
|
||||
"Mic Jack", "Mic Bias",
|
||||
"Headphone Jack", "HP_OUT";
|
||||
mux-int-port = <1>;
|
||||
mux-ext-port = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clks {
|
||||
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
|
||||
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
|
||||
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
|
||||
};
|
||||
|
||||
&ecspi3 {
|
||||
cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
|
||||
channel@29 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x29>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc: ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw1 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
|
||||
reg_1p8v: sw2 {
|
||||
regulator-name = "vdd1p8";
|
||||
regulator-min-microvolt = <1033310>;
|
||||
regulator-max-microvolt = <2004000>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw4 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
|
||||
reg_2p5v: ldo2 {
|
||||
regulator-name = "vdd2p5";
|
||||
regulator-min-microvolt = <2490375>;
|
||||
regulator-max-microvolt = <2490375>;
|
||||
lltc,fb-voltage-divider = <487000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_AUD_1P8: Audio codec */
|
||||
reg_aud_1p8v: ldo3 {
|
||||
regulator-name = "vdd1p8a";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
codec: sgtl5000@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks IMX6QDL_CLK_CKO>;
|
||||
VDDA-supply = <®_1p8v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
|
||||
touchscreen: egalax_ts@4 {
|
||||
compatible = "eeti,egalax_ts";
|
||||
reg = <0x04>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <12 2>;
|
||||
wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
accel@1e {
|
||||
compatible = "nxp,fxos8700";
|
||||
reg = <0x1e>;
|
||||
};
|
||||
};
|
||||
|
||||
&ldb {
|
||||
status = "okay";
|
||||
|
||||
lvds-channel@0 {
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <18>;
|
||||
status = "okay";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: hsd100pxn1 {
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hback-porch = <220>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <21>;
|
||||
vfront-porch = <7>;
|
||||
hsync-len = <60>;
|
||||
vsync-len = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
#pwm-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
no-1-8-v; /* firmware will remove if board revision supports */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_audmux: audmuxgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
|
||||
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
|
||||
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
|
||||
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi3: escpi3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE_RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
770
arch/arm/dts/imx6qdl-gw53xx.dtsi
Normal file
770
arch/arm/dts/imx6qdl-gw53xx.dtsi
Normal file
@ -0,0 +1,770 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
nand = &gpmi;
|
||||
ssi0 = &ssi1;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc1,115200";
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm4 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_1p0v: regulator-1p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P0V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: regulator-usb-h1-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_h1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "fsl,imx6q-ventana-sgtl5000",
|
||||
"fsl,imx-audio-sgtl5000";
|
||||
model = "sgtl5000-audio";
|
||||
ssi-controller = <&ssi1>;
|
||||
audio-codec = <&codec>;
|
||||
audio-routing =
|
||||
"MIC_IN", "Mic Jack",
|
||||
"Mic Jack", "Mic Bias",
|
||||
"Headphone Jack", "HP_OUT";
|
||||
mux-int-port = <1>;
|
||||
mux-ext-port = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clks {
|
||||
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
|
||||
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
|
||||
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
|
||||
channel@26 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x26>;
|
||||
label = "vdd_gps";
|
||||
};
|
||||
|
||||
channel@29 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x29>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc: ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw1 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
|
||||
reg_1p8v: sw2 {
|
||||
regulator-name = "vdd1p8";
|
||||
regulator-min-microvolt = <1033310>;
|
||||
regulator-max-microvolt = <2004000>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw4 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
|
||||
reg_2p5v: ldo2 {
|
||||
regulator-name = "vdd2p5";
|
||||
regulator-min-microvolt = <2490375>;
|
||||
regulator-max-microvolt = <2490375>;
|
||||
lltc,fb-voltage-divider = <487000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_AUD_1P8: Audio codec */
|
||||
reg_aud_1p8v: ldo3 {
|
||||
regulator-name = "vdd1p8a";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
codec: sgtl5000@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks IMX6QDL_CLK_CKO>;
|
||||
VDDA-supply = <®_1p8v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
|
||||
touchscreen: egalax_ts@4 {
|
||||
compatible = "eeti,egalax_ts";
|
||||
reg = <0x04>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <11 2>;
|
||||
wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
accel@1e {
|
||||
compatible = "nxp,fxos8700";
|
||||
reg = <0x1e>;
|
||||
};
|
||||
};
|
||||
|
||||
&ldb {
|
||||
status = "okay";
|
||||
|
||||
lvds-channel@0 {
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <18>;
|
||||
status = "okay";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: hsd100pxn1 {
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hback-porch = <220>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <21>;
|
||||
vfront-porch = <7>;
|
||||
hsync-len = <60>;
|
||||
vsync-len = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
#pwm-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
no-1-8-v; /* firmware will remove if board revision supports */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_audmux: audmuxgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
|
||||
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
|
||||
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
|
||||
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
|
||||
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
|
||||
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
864
arch/arm/dts/imx6qdl-gw54xx.dtsi
Normal file
864
arch/arm/dts/imx6qdl-gw54xx.dtsi
Normal file
@ -0,0 +1,864 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2013 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/sound/fsl-imx-audmux.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
nand = &gpmi;
|
||||
ssi0 = &ssi1;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc1,115200";
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm4 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reg_1p0v: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <0>;
|
||||
regulator-name = "1P0V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "usb_h1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator@3 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <3>;
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
sound-analog {
|
||||
compatible = "fsl,imx6q-ventana-sgtl5000",
|
||||
"fsl,imx-audio-sgtl5000";
|
||||
model = "sgtl5000-audio";
|
||||
ssi-controller = <&ssi1>;
|
||||
audio-codec = <&sgtl5000>;
|
||||
audio-routing =
|
||||
"MIC_IN", "Mic Jack",
|
||||
"Mic Jack", "Mic Bias",
|
||||
"Headphone Jack", "HP_OUT";
|
||||
mux-int-port = <1>;
|
||||
mux-ext-port = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
|
||||
status = "okay";
|
||||
|
||||
ssi2 {
|
||||
fsl,audmux-port = <1>;
|
||||
fsl,port-config = <
|
||||
(IMX_AUDMUX_V2_PTCR_TFSDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
|
||||
IMX_AUDMUX_V2_PTCR_TCLKDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
|
||||
IMX_AUDMUX_V2_PTCR_SYN)
|
||||
IMX_AUDMUX_V2_PDCR_RXDSEL(4)
|
||||
>;
|
||||
};
|
||||
|
||||
aud5 {
|
||||
fsl,audmux-port = <4>;
|
||||
fsl,port-config = <
|
||||
IMX_AUDMUX_V2_PTCR_SYN
|
||||
IMX_AUDMUX_V2_PDCR_RXDSEL(1)>;
|
||||
};
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clks {
|
||||
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
|
||||
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
|
||||
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
|
||||
};
|
||||
|
||||
&ecspi2 {
|
||||
cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
|
||||
channel@26 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x26>;
|
||||
label = "vdd_gps";
|
||||
};
|
||||
};
|
||||
|
||||
fan-controller@2c {
|
||||
compatible = "gw,gsc-fan";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x2c>;
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc: ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
pmic: pfuze100@8 {
|
||||
compatible = "fsl,pfuze100";
|
||||
reg = <0x08>;
|
||||
|
||||
regulators {
|
||||
sw1a_reg: sw1ab {
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1875000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <6250>;
|
||||
};
|
||||
|
||||
sw1c_reg: sw1c {
|
||||
regulator-min-microvolt = <300000>;
|
||||
regulator-max-microvolt = <1875000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-ramp-delay = <6250>;
|
||||
};
|
||||
|
||||
sw2_reg: sw2 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3950000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sw3a_reg: sw3a {
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1975000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sw3b_reg: sw3b {
|
||||
regulator-min-microvolt = <400000>;
|
||||
regulator-max-microvolt = <1975000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sw4_reg: sw4 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
swbst_reg: swbst {
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
snvs_reg: vsnvs {
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vref_reg: vrefddr {
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen1_reg: vgen1 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
};
|
||||
|
||||
vgen2_reg: vgen2 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
};
|
||||
|
||||
vgen3_reg: vgen3 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vgen4_reg: vgen4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen5_reg: vgen5 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vgen6_reg: vgen6 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
sgtl5000: audio-codec@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks IMX6QDL_CLK_CKO>;
|
||||
VDDA-supply = <&sw4_reg>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
|
||||
touchscreen: egalax_ts@4 {
|
||||
compatible = "eeti,egalax_ts";
|
||||
reg = <0x04>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <12 2>;
|
||||
wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
accel@1e {
|
||||
compatible = "nxp,fxos8700";
|
||||
reg = <0x1e>;
|
||||
};
|
||||
};
|
||||
|
||||
&ldb {
|
||||
status = "okay";
|
||||
|
||||
lvds-channel@0 {
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <18>;
|
||||
status = "okay";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: hsd100pxn1 {
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hback-porch = <220>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <21>;
|
||||
vfront-porch = <7>;
|
||||
hsync-len = <60>;
|
||||
vsync-len = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
#pwm-cells = <2>;
|
||||
pinctrl-names = "default", "state_dio";
|
||||
pinctrl-0 = <&pinctrl_pwm4_backlight>;
|
||||
pinctrl-1 = <&pinctrl_pwm4_dio>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
no-1-8-v; /* firmware will remove if board revision supports */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&wdog2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_audmux: audmuxgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
|
||||
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
|
||||
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
|
||||
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
|
||||
MX6QDL_PAD_EIM_D25__AUD5_RXC 0x130b0
|
||||
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
|
||||
MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x130b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi2: escpi2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
|
||||
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
|
||||
MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
|
||||
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
|
||||
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm1: pwm1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4_backlight: pwm4grpbacklight {
|
||||
fsl,pins = <
|
||||
/* LVDS_PWM J6.5 */
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4_dio: pwm4grpdio {
|
||||
fsl,pins = <
|
||||
/* DIO3 J16.4 */
|
||||
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
697
arch/arm/dts/imx6qdl-gw551x.dtsi
Normal file
697
arch/arm/dts/imx6qdl-gw551x.dtsi
Normal file
@ -0,0 +1,697 @@
|
||||
/*
|
||||
* Copyright 2014 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/media/tda1997x.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/sound/fsl-imx-audmux.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
nand = &gpmi;
|
||||
ssi0 = &ssi1;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc1,115200";
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: regulator-usb-h1-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_h1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
sound-digital {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "tda1997x-audio";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&sound_codec>;
|
||||
simple-audio-card,frame-master = <&sound_codec>;
|
||||
|
||||
sound_cpu: simple-audio-card,cpu {
|
||||
sound-dai = <&ssi1>;
|
||||
};
|
||||
|
||||
sound_codec: simple-audio-card,codec {
|
||||
sound-dai = <&hdmi_receiver>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
|
||||
status = "okay";
|
||||
|
||||
ssi1 {
|
||||
fsl,audmux-port = <0>;
|
||||
fsl,port-config = <
|
||||
(IMX_AUDMUX_V2_PTCR_TFSDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
|
||||
IMX_AUDMUX_V2_PTCR_TCLKDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
|
||||
IMX_AUDMUX_V2_PTCR_SYN)
|
||||
IMX_AUDMUX_V2_PDCR_RXDSEL(4)
|
||||
>;
|
||||
};
|
||||
|
||||
aud5 {
|
||||
fsl,audmux-port = <4>;
|
||||
fsl,port-config = <
|
||||
IMX_AUDMUX_V2_PTCR_SYN
|
||||
IMX_AUDMUX_V2_PDCR_RXDSEL(0)>;
|
||||
};
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8a";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_1p0b";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc: ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw1 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw2 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_3P3 (1+R1/R2 = 1.281) */
|
||||
reg_3p3: sw4 {
|
||||
regulator-name = "vdd3p3";
|
||||
regulator-min-microvolt = <1880000>;
|
||||
regulator-max-microvolt = <3647000>;
|
||||
lltc,fb-voltage-divider = <200000 56200>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
|
||||
reg_1p8a: ldo2 {
|
||||
regulator-name = "vdd1p8a";
|
||||
regulator-min-microvolt = <1816125>;
|
||||
regulator-max-microvolt = <1816125>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8b: HDMI In analog */
|
||||
reg_1p8b: ldo3 {
|
||||
regulator-name = "vdd1p8b";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
gpio_exp: pca9555@24 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x24>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
hdmi_receiver: hdmi-receiver@48 {
|
||||
compatible = "nxp,tda19971";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tda1997x>;
|
||||
reg = <0x48>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
DOVDD-supply = <®_3p3>;
|
||||
AVDD-supply = <®_1p8b>;
|
||||
DVDD-supply = <®_1p8a>;
|
||||
#sound-dai-cells = <0>;
|
||||
nxp,audout-format = "i2s";
|
||||
nxp,audout-layout = <0>;
|
||||
nxp,audout-width = <16>;
|
||||
nxp,audout-mclk-fs = <128>;
|
||||
/*
|
||||
* The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
|
||||
* and Y[11:4] across 16bits in the same cycle
|
||||
* which we map to VP[15:08]<->CSI_DATA[19:12]
|
||||
*/
|
||||
nxp,vidout-portcfg =
|
||||
/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
|
||||
< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
|
||||
/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
|
||||
< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
|
||||
/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
|
||||
< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
|
||||
/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
|
||||
< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
|
||||
|
||||
port {
|
||||
tda1997x_to_ipu1_csi0_mux: endpoint {
|
||||
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
|
||||
bus-width = <16>;
|
||||
hsync-active = <1>;
|
||||
vsync-active = <1>;
|
||||
data-active = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipu1_csi0_from_ipu1_csi0_mux {
|
||||
bus-width = <16>;
|
||||
};
|
||||
|
||||
&ipu1_csi0_mux_from_parallel_sensor {
|
||||
remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
|
||||
bus-width = <16>;
|
||||
};
|
||||
|
||||
&ipu1_csi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu1_csi0>;
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_audmux: audmuxgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
|
||||
MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x130b0
|
||||
MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x130b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ipu1_csi0: ipu1_csi0grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_tda1997x: tda1997xgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
521
arch/arm/dts/imx6qdl-gw552x.dtsi
Normal file
521
arch/arm/dts/imx6qdl-gw552x.dtsi
Normal file
@ -0,0 +1,521 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright 2014 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
nand = &gpmi;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttymxc1,115200";
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
reg_1p0v: regulator-1p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P0V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc: ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw1 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8 (1+R1/R2 = 2.505): ENET-PHY */
|
||||
reg_1p8v: sw2 {
|
||||
regulator-name = "vdd1p8";
|
||||
regulator-min-microvolt = <1033310>;
|
||||
regulator-max-microvolt = <2004000>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw4 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
|
||||
reg_2p5v: ldo2 {
|
||||
regulator-name = "vdd2p5";
|
||||
regulator-min-microvolt = <2490375>;
|
||||
regulator-max-microvolt = <2490375>;
|
||||
lltc,fb-voltage-divider = <487000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay"; };
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_5p0v>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
737
arch/arm/dts/imx6qdl-gw553x.dtsi
Normal file
737
arch/arm/dts/imx6qdl-gw553x.dtsi
Normal file
@ -0,0 +1,737 @@
|
||||
/*
|
||||
* Copyright 2016 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
nand = &gpmi;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hdmi>;
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8a";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_1p0b";
|
||||
};
|
||||
|
||||
channel@26 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x26>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc: ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
magn@1c {
|
||||
compatible = "st,lsm9ds1-magn";
|
||||
reg = <0x1c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mag>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <2 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
imu@6a {
|
||||
compatible = "st,lsm9ds1-imu";
|
||||
reg = <0x6a>;
|
||||
st,drdy-int-pin = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_imu>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw1 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw2 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_3P3 (1+R1/R2 = 1.281) */
|
||||
reg_3p3v: sw4 {
|
||||
regulator-name = "vdd3p3";
|
||||
regulator-min-microvolt = <1880000>;
|
||||
regulator-max-microvolt = <3647000>;
|
||||
lltc,fb-voltage-divider = <200000 56200>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8a (1+R1/R2 = 2.505): Analog Video Decoder */
|
||||
reg_1p8a: ldo2 {
|
||||
regulator-name = "vdd1p8a";
|
||||
regulator-min-microvolt = <1816125>;
|
||||
regulator-max-microvolt = <1816125>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8b: microSD VDD_1P8 */
|
||||
reg_1p8b: ldo3 {
|
||||
regulator-name = "vdd1p8b";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
adv7180: camera@20 {
|
||||
compatible = "adi,adv7180";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adv7180>;
|
||||
reg = <0x20>;
|
||||
powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
port {
|
||||
adv7180_to_ipu1_csi0_mux: endpoint {
|
||||
remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ipu1_csi0_from_ipu1_csi0_mux {
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu1_csi0_mux_from_parallel_sensor {
|
||||
remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&ipu1_csi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ipu1_csi0>;
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_adv7180: adv7180grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0
|
||||
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_hdmi: hdmigrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_imu: imugrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ipu1_csi0: ipu1csi0grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
|
||||
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_mag: maggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
934
arch/arm/dts/imx6qdl-gw560x.dtsi
Normal file
934
arch/arm/dts/imx6qdl-gw560x.dtsi
Normal file
@ -0,0 +1,934 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
ssi0 = &ssi1;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
backlight-display {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm4 0 5000000>;
|
||||
brightness-levels = <
|
||||
0 1 2 3 4 5 6 7 8 9
|
||||
10 11 12 13 14 15 16 17 18 19
|
||||
20 21 22 23 24 25 26 27 28 29
|
||||
30 31 32 33 34 35 36 37 38 39
|
||||
40 41 42 43 44 45 46 47 48 49
|
||||
50 51 52 53 54 55 56 57 58 59
|
||||
60 61 62 63 64 65 66 67 68 69
|
||||
70 71 72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87 88 89
|
||||
90 91 92 93 94 95 96 97 98 99
|
||||
100
|
||||
>;
|
||||
default-brightness-level = <100>;
|
||||
};
|
||||
|
||||
backlight-keypad {
|
||||
compatible = "gpio-backlight";
|
||||
gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
|
||||
default-on;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_2p5v: regulator-2p5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P5V";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_12p0v: regulator-12p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "12P0V";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_1p4v: regulator-vddsoc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_soc";
|
||||
regulator-min-microvolt = <1400000>;
|
||||
regulator-max-microvolt = <1400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: regulator-usb-h1-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_h1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "fsl,imx6q-ventana-sgtl5000",
|
||||
"fsl,imx-audio-sgtl5000";
|
||||
model = "sgtl5000-audio";
|
||||
ssi-controller = <&ssi1>;
|
||||
audio-codec = <&sgtl5000>;
|
||||
audio-routing =
|
||||
"MIC_IN", "Mic Jack",
|
||||
"Mic Jack", "Mic Bias",
|
||||
"Headphone Jack", "HP_OUT";
|
||||
mux-int-port = <1>;
|
||||
mux-ext-port = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecspi3 {
|
||||
cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clks {
|
||||
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
|
||||
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
|
||||
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
|
||||
channel@26 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x26>;
|
||||
label = "vdd_gps";
|
||||
};
|
||||
|
||||
channel@29 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x29>;
|
||||
label = "vdd_an2";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
ds1672: rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
sgtl5000: codec@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
#sound-dai-cells = <0>;
|
||||
clocks = <&clks IMX6QDL_CLK_CKO>;
|
||||
VDDA-supply = <®_1p8v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
};
|
||||
|
||||
magn@1c {
|
||||
compatible = "st,lsm9ds1-magn";
|
||||
reg = <0x1c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mag>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <9 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
tca8418: keypad@34 {
|
||||
compatible = "ti,tca8418";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_keypad>;
|
||||
reg = <0x34>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
||||
linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0)
|
||||
MATRIX_KEY(0x00, 0x00, BTN_1)
|
||||
MATRIX_KEY(0x01, 0x01, BTN_2)
|
||||
MATRIX_KEY(0x01, 0x00, BTN_3)
|
||||
MATRIX_KEY(0x02, 0x00, BTN_4)
|
||||
MATRIX_KEY(0x00, 0x03, BTN_5)
|
||||
MATRIX_KEY(0x00, 0x02, BTN_6)
|
||||
MATRIX_KEY(0x01, 0x03, BTN_7)
|
||||
MATRIX_KEY(0x01, 0x02, BTN_8)
|
||||
MATRIX_KEY(0x02, 0x02, BTN_9)
|
||||
>;
|
||||
keypad,num-rows = <4>;
|
||||
keypad,num-columns = <4>;
|
||||
};
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
reg = <0x3c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw2 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.931) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <796551>;
|
||||
regulator-max-microvolt = <1544827>;
|
||||
lltc,fb-voltage-divider = <243000 261000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
linux,phandle = <®_vdd_arm>;
|
||||
};
|
||||
|
||||
/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
|
||||
reg_1p8v: sw4 {
|
||||
regulator-name = "vdd1p8";
|
||||
regulator-min-microvolt = <1033310>;
|
||||
regulator-max-microvolt = <2004000>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */
|
||||
reg_1p0v: ldo2 {
|
||||
regulator-name = "vdd1p0";
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
lltc,fb-voltage-divider = <78700 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_AUD_1P8: Audio codec */
|
||||
reg_aud_1p8v: ldo3 {
|
||||
regulator-name = "vdd1p8a";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
imu@6a {
|
||||
compatible = "st,lsm9ds1-imu";
|
||||
reg = <0x6a>;
|
||||
st,drdy-int-pin = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_imu>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
egalax_ts: touchscreen@4 {
|
||||
compatible = "eeti,egalax_ts";
|
||||
reg = <0x04>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&ldb {
|
||||
fsl,dual-channel;
|
||||
status = "okay";
|
||||
|
||||
lvds-channel@0 {
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <18>;
|
||||
status = "okay";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: hsd100pxn1 {
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hback-porch = <220>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <21>;
|
||||
vfront-porch = <7>;
|
||||
hsync-len = <60>;
|
||||
vsync-len = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
#pwm-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
uart-has-rtscts;
|
||||
rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbh1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
bus-width = <8>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_audmux: audmuxgrp {
|
||||
fsl,pins = <
|
||||
/* AUD4 */
|
||||
MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
|
||||
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
|
||||
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
|
||||
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
|
||||
/* AUD6 */
|
||||
MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
|
||||
MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
|
||||
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
|
||||
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi3: escpi3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan: flexcangrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x4001b0b0 /* DIOI2C_DIS# */
|
||||
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0001b0b0 /* LVDS_TOUCH_IRQ# */
|
||||
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0001b0b0 /* LVDS_BACKEN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_imu: imugrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_keypad: keypadgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */
|
||||
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001b0b0 /* KEYPAD_LED_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_mag: maggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */
|
||||
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbh1: usbh1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
|
||||
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
|
||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
|
||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
|
||||
MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x170f9
|
||||
MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x170f9
|
||||
MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x170f9
|
||||
MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
795
arch/arm/dts/imx6qdl-gw5903.dtsi
Normal file
795
arch/arm/dts/imx6qdl-gw5903.dtsi
Normal file
@ -0,0 +1,795 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm1 0 5000000>;
|
||||
brightness-levels = <
|
||||
0 1 2 3 4 5 6 7 8 9
|
||||
10 11 12 13 14 15 16 17 18 19
|
||||
20 21 22 23 24 25 26 27 28 29
|
||||
30 31 32 33 34 35 36 37 38 39
|
||||
40 41 42 43 44 45 46 47 48 49
|
||||
50 51 52 53 54 55 56 57 58 59
|
||||
60 61 62 63 64 65 66 67 68 69
|
||||
70 71 72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87 88 89
|
||||
90 91 92 93 94 95 96 97 98 99
|
||||
100
|
||||
>;
|
||||
default-brightness-level = <100>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_2p5v: regulator-2p5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "2P5V";
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: regulator-usb-h1-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_h1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 30 0>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_12p0: regulator-12p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "12P0V";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "fsl,imx-audio-tlv320";
|
||||
model = "imx-tlv320";
|
||||
ssi-controller = <&ssi1>;
|
||||
audio-codec = <&tlv320aic3105>;
|
||||
/* routing of sink, source */
|
||||
audio-routing =
|
||||
/* TLV320 LINE1L pin <-> Mic Jack connector */
|
||||
"LINE1L", "Mic Jack",
|
||||
/* board Headphone Jack <-> HPOUT */
|
||||
"Headphone Jack", "HPLOUT",
|
||||
"Headphone Jack", "HPROUT",
|
||||
"Mic Jack", "Mic Bias";
|
||||
mux-int-port = <1>;
|
||||
mux-ext-port = <6>;
|
||||
};
|
||||
};
|
||||
|
||||
&audmux {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_audmux>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clks {
|
||||
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
|
||||
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
|
||||
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
dts1672: rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_1P8 (1+R1/R2 = 2.505): Aud/eMMC/microSD/Touch */
|
||||
reg_1p8v: sw1 {
|
||||
regulator-name = "vdd1p8";
|
||||
regulator-min-microvolt = <1033310>;
|
||||
regulator-max-microvolt = <2004000>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw2 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
linux,phandle = <®_vdd_arm>;
|
||||
};
|
||||
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw4 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
linux,phandle = <®_vdd_soc>;
|
||||
};
|
||||
|
||||
/* VDD_1P0 (1+R1/R2 = 1.38): */
|
||||
reg_1p0v: ldo2 {
|
||||
regulator-name = "vdd1p0";
|
||||
regulator-min-microvolt = <1002777>;
|
||||
regulator-max-microvolt = <1002777>;
|
||||
lltc,fb-voltage-divider = <100000 261000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
tlv320aic3105: codec@18 {
|
||||
compatible = "ti,tlv320aic3x";
|
||||
reg = <0x18>;
|
||||
reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
|
||||
clocks = <&clks IMX6QDL_CLK_CKO>;
|
||||
ai3x-micbias-vg = <2>; /* MICBIAS_2_5V */
|
||||
/* Regulators */
|
||||
DRVDD-supply = <®_3p3v>;
|
||||
AVDD-supply = <®_3p3v>;
|
||||
IOVDD-supply = <®_3p3v>;
|
||||
DVDD-supply = <®_1p8v>;
|
||||
};
|
||||
|
||||
accelerometer@1d {
|
||||
compatible = "fsl,mma8451";
|
||||
reg = <0x1d>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "INT2";
|
||||
};
|
||||
|
||||
/* headphone detect */
|
||||
ts3a227e@3b {
|
||||
compatible = "ti,ts3a227e";
|
||||
reg = <0x3b>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
|
||||
ti,micbias = <4>; /* 2.5V micbias */
|
||||
};
|
||||
};
|
||||
|
||||
&ldb {
|
||||
status = "okay";
|
||||
|
||||
lvds-channel@0 {
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <18>;
|
||||
status = "okay";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: g101evn010 {
|
||||
clock-frequency = <68930000>;
|
||||
hactive = <1280>;
|
||||
vactive = <800>;
|
||||
hback-porch = <220>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <21>;
|
||||
vfront-porch = <7>;
|
||||
hsync-len = <60>;
|
||||
vsync-len = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
#pwm-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc1_200mhz>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
|
||||
cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
max-frequency = <100000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
keep-power-in-suspend;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_audmux: audmuxgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
|
||||
MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
|
||||
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
|
||||
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
|
||||
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* MCK */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
|
||||
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0 /* PHY_EN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
/* I2C3 */
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
|
||||
/* Headphone Detect */
|
||||
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x0001b0b0 /* HPDET_IRQ# */
|
||||
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x0001b0b0 /* HPDET_MIC# */
|
||||
|
||||
/* Codec */
|
||||
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x0001b0b0 /* CODEC_RST# */
|
||||
|
||||
/* Touch Controller */
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b0b0 /* TOUCH_IRQ# */
|
||||
MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b0b0 /* TOUCH_RST */
|
||||
|
||||
/* Stow Sensor */
|
||||
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x0001b0b0 /* ACCEL_IRQ2 */
|
||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x0001b0b0 /* ACCEL_IRQ1 */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm1: pwm1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b1 /* TXEN */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x4001b0b0 /* PWR_EN */
|
||||
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x4001b0b0 /* EMMY_EN */
|
||||
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x4001b0b0 /* EMMY_CFG1# */
|
||||
MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x4001b0b0 /* EMMY_CFG2# */
|
||||
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x0001b0b0 /* EMMY_BTWAKE# */
|
||||
MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x0001b0b0 /* EMMY_WFWAKE# */
|
||||
|
||||
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
|
||||
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x100f9
|
||||
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
||||
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x17059 /* CD */
|
||||
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
|
||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
|
||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
|
||||
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170b9 /* CD */
|
||||
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
|
||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
|
||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
|
||||
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170f9 /* CD */
|
||||
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
||||
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
||||
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
812
arch/arm/dts/imx6qdl-gw5904.dtsi
Normal file
812
arch/arm/dts/imx6qdl-gw5904.dtsi
Normal file
@ -0,0 +1,812 @@
|
||||
/*
|
||||
* Copyright 2017 Gateworks Corporation
|
||||
*
|
||||
* This file is dual-licensed: you can use it either under the terms
|
||||
* of the GPL or the X11 license, at your option. Note that this dual
|
||||
* licensing only applies to this file, and not this project as a
|
||||
* whole.
|
||||
*
|
||||
* a) This file is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This file is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public
|
||||
* License along with this file; if not, write to the Free
|
||||
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*
|
||||
* Or, alternatively,
|
||||
*
|
||||
* b) Permission is hereby granted, free of charge, to any person
|
||||
* obtaining a copy of this software and associated documentation
|
||||
* files (the "Software"), to deal in the Software without
|
||||
* restriction, including without limitation the rights to use,
|
||||
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||
* sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following
|
||||
* conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be
|
||||
* included in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm4 0 5000000>;
|
||||
brightness-levels = <0 4 8 16 32 64 128 255>;
|
||||
default-brightness-level = <7>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_1p0v: regulator-1p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "1P0V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: regulator-usb-h1-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_h1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&clks {
|
||||
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
|
||||
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
|
||||
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
reg = <0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <&fec>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom1: eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom2: eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom3: eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom4: eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
dts1672: rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
magn@1c {
|
||||
compatible = "st,lsm9ds1-magn";
|
||||
reg = <0x1c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mag>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
ltc3676: pmic@3c {
|
||||
compatible = "lltc,ltc3676";
|
||||
reg = <0x3c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
regulators {
|
||||
/* VDD_SOC (1+R1/R2 = 1.635) */
|
||||
reg_vdd_soc: sw1 {
|
||||
regulator-name = "vddsoc";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_1P8 (1+R1/R2 = 2.505): GbE switch */
|
||||
reg_1p8v: sw2 {
|
||||
regulator-name = "vdd1p8";
|
||||
regulator-min-microvolt = <1033310>;
|
||||
regulator-max-microvolt = <2004000>;
|
||||
lltc,fb-voltage-divider = <301000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_ARM (1+R1/R2 = 1.635) */
|
||||
reg_vdd_arm: sw3 {
|
||||
regulator-name = "vddarm";
|
||||
regulator-min-microvolt = <674400>;
|
||||
regulator-max-microvolt = <1308000>;
|
||||
lltc,fb-voltage-divider = <127000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_DDR (1+R1/R2 = 2.105) */
|
||||
reg_vdd_ddr: sw4 {
|
||||
regulator-name = "vddddr";
|
||||
regulator-min-microvolt = <868310>;
|
||||
regulator-max-microvolt = <1684000>;
|
||||
lltc,fb-voltage-divider = <221000 200000>;
|
||||
regulator-ramp-delay = <7000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
|
||||
reg_2p5v: ldo2 {
|
||||
regulator-name = "vdd2p5";
|
||||
regulator-min-microvolt = <2490375>;
|
||||
regulator-max-microvolt = <2490375>;
|
||||
lltc,fb-voltage-divider = <487000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD_HIGH (1+R1/R2 = 4.17) */
|
||||
reg_3p0v: ldo4 {
|
||||
regulator-name = "vdd3p0";
|
||||
regulator-min-microvolt = <3023250>;
|
||||
regulator-max-microvolt = <3023250>;
|
||||
lltc,fb-voltage-divider = <634000 200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
imu@6a {
|
||||
compatible = "st,lsm9ds1-imu";
|
||||
reg = <0x6a>;
|
||||
st,drdy-int-pin = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_imu>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
egalax_ts: touchscreen@4 {
|
||||
compatible = "eeti,egalax_ts";
|
||||
reg = <0x04>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&ldb {
|
||||
status = "okay";
|
||||
|
||||
lvds-channel@0 {
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <18>;
|
||||
status = "okay";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: hsd100pxn1 {
|
||||
clock-frequency = <65000000>;
|
||||
hactive = <1024>;
|
||||
vactive = <768>;
|
||||
hback-porch = <220>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <21>;
|
||||
vfront-porch = <7>;
|
||||
hsync-len = <60>;
|
||||
vsync-len = <10>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
#pwm-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_h1_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
non-removable;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
keep-power-in-suspend;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_imu: imugrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_mag: maggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
|
||||
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
||||
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
||||
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
538
arch/arm/dts/imx6qdl-gw5907.dtsi
Normal file
538
arch/arm/dts/imx6qdl-gw5907.dtsi
Normal file
@ -0,0 +1,538 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
nand = &gpmi;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_otg_vbus: regulator-usb-otg-vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_an1";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
ds1672@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
gpio@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
adc@48 {
|
||||
compatible = "ti,ads1015";
|
||||
reg = <0x48>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@4 {
|
||||
reg = <4>;
|
||||
ti,gain = <0>;
|
||||
ti,datarate = <5>;
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
reg = <5>;
|
||||
ti,gain = <0>;
|
||||
ti,datarate = <5>;
|
||||
};
|
||||
|
||||
channel@6 {
|
||||
reg = <6>;
|
||||
ti,gain = <0>;
|
||||
ti,datarate = <5>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_otg_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
666
arch/arm/dts/imx6qdl-gw5910.dtsi
Normal file
666
arch/arm/dts/imx6qdl-gw5910.dtsi
Normal file
@ -0,0 +1,666 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_wl: regulator-wl {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_wl>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wl";
|
||||
gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <100>;
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&ecspi3 {
|
||||
cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@6 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x06>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <3>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@82 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x82>;
|
||||
label = "vdd_vin";
|
||||
gw,voltage-divider-ohms = <22100 1000>;
|
||||
gw,voltage-offset-microvolt = <800000>;
|
||||
};
|
||||
|
||||
channel@84 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x84>;
|
||||
label = "vdd_5p0";
|
||||
gw,voltage-divider-ohms = <22100 10000>;
|
||||
};
|
||||
|
||||
channel@86 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x86>;
|
||||
label = "vdd_3p3";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@88 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x88>;
|
||||
label = "vdd_2p5";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@8c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8c>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@8e {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8e>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@90 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x90>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@92 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x92>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@98 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x98>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@9a {
|
||||
gw,mode = <2>;
|
||||
reg = <0x9a>;
|
||||
label = "vdd_1p0";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@9c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x9c>;
|
||||
label = "vdd_an1";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@a2 {
|
||||
gw,mode = <2>;
|
||||
reg = <0xa2>;
|
||||
label = "vdd_gsc";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
accel@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <13 0>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* off-board RS232 */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* serial console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* cc1352 */
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Sterling-LWB Bluetooth */
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>,<&pinctrl_bten>;
|
||||
uart-has-rtscts;
|
||||
status = "okay";
|
||||
|
||||
bluetooth {
|
||||
compatible = "brcm,bcm4330-bt";
|
||||
shutdown-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* GPS */
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_5p0v>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Sterling-LWB SDIO WiFi */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
vmmc-supply = <®_wl>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_accel: accelmuxgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_bten: btengrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi3: escpi3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
||||
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_wl: regwlgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
|
||||
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x4001b0b1 /* DIO20 */
|
||||
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x4001b0b1 /* DIO14 */
|
||||
MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x4001b0b1 /* DIO15 */
|
||||
MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b1 /* TMS */
|
||||
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b1 /* TCK */
|
||||
MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b1 /* TDO */
|
||||
MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b1 /* TDI */
|
||||
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x4001b0b1 /* RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
|
||||
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
||||
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
||||
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
||||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
608
arch/arm/dts/imx6qdl-gw5912.dtsi
Normal file
608
arch/arm/dts/imx6qdl-gw5912.dtsi
Normal file
@ -0,0 +1,608 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
led2 = &led2;
|
||||
nand = &gpmi;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: user3 {
|
||||
label = "user3";
|
||||
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x40000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_usb_vbus: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&can1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_flexcan1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecspi2 {
|
||||
cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x00>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x02>;
|
||||
label = "vdd_vin";
|
||||
};
|
||||
|
||||
channel@5 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x05>;
|
||||
label = "vdd_3p3";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@b {
|
||||
gw,mode = <1>;
|
||||
reg = <0x0b>;
|
||||
label = "vdd_5p0";
|
||||
};
|
||||
|
||||
channel@e {
|
||||
gw,mode = <1>;
|
||||
reg = <0xe>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@11 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x11>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@14 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x14>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x17>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@1d {
|
||||
gw,mode = <1>;
|
||||
reg = <0x1d>;
|
||||
label = "vdd_1p8";
|
||||
};
|
||||
|
||||
channel@20 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x20>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@23 {
|
||||
gw,mode = <1>;
|
||||
reg = <0x23>;
|
||||
label = "vdd_2p5";
|
||||
};
|
||||
};
|
||||
|
||||
fan-controller@a {
|
||||
compatible = "gw,gsc-fan";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0a>;
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
|
||||
accel@19 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_accel>;
|
||||
compatible = "st,lis2de12";
|
||||
reg = <0x19>;
|
||||
st,drdy-int-pin = <1>;
|
||||
interrupt-parent = <&gpio7>;
|
||||
interrupts = <13 0>;
|
||||
interrupt-names = "INT1";
|
||||
};
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
vbus-supply = <®_usb_vbus>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
vbus-supply = <®_usb_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc3 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_3p3v>;
|
||||
no-1-8-v; /* firmware will remove if board revision supports */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&wdog2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_accel: accelmuxgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi2: escpi2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
|
||||
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
|
||||
MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
|
||||
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
|
||||
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
|
||||
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
|
||||
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm1: pwm1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
|
||||
MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
500
arch/arm/dts/imx6qdl-gw5913.dtsi
Normal file
500
arch/arm/dts/imx6qdl-gw5913.dtsi
Normal file
@ -0,0 +1,500 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2019 Gateworks Corporation
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
/* these are used by bootloader for disabling nodes */
|
||||
aliases {
|
||||
led0 = &led0;
|
||||
led1 = &led1;
|
||||
nand = &gpmi;
|
||||
usb0 = &usbh1;
|
||||
usb1 = &usbotg;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart2;
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
user-pb {
|
||||
label = "user_pb";
|
||||
gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <BTN_0>;
|
||||
};
|
||||
|
||||
user-pb1x {
|
||||
label = "user_pb1x";
|
||||
linux,code = <BTN_1>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <0>;
|
||||
};
|
||||
|
||||
key-erased {
|
||||
label = "key-erased";
|
||||
linux,code = <BTN_2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
eeprom-wp {
|
||||
label = "eeprom_wp";
|
||||
linux,code = <BTN_3>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
tamper {
|
||||
label = "tamper";
|
||||
linux,code = <BTN_4>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
switch-hold {
|
||||
label = "switch_hold";
|
||||
linux,code = <BTN_5>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_leds>;
|
||||
|
||||
led0: user1 {
|
||||
label = "user1";
|
||||
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
|
||||
default-state = "on";
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led1: user2 {
|
||||
label = "user2";
|
||||
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
memory@10000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x10000000 0x20000000>;
|
||||
};
|
||||
|
||||
pps {
|
||||
compatible = "pps-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pps>;
|
||||
gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reg_3p3v: regulator-3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_5p0v: regulator-5p0v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "5P0V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&fec {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c1>;
|
||||
status = "okay";
|
||||
|
||||
gsc: gsc@20 {
|
||||
compatible = "gw,gsc";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc {
|
||||
compatible = "gw,gsc-adc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@6 {
|
||||
gw,mode = <0>;
|
||||
reg = <0x06>;
|
||||
label = "temp";
|
||||
};
|
||||
|
||||
channel@8 {
|
||||
gw,mode = <3>;
|
||||
reg = <0x08>;
|
||||
label = "vdd_bat";
|
||||
};
|
||||
|
||||
channel@82 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x82>;
|
||||
label = "vdd_vin";
|
||||
gw,voltage-divider-ohms = <22100 1000>;
|
||||
gw,voltage-offset-microvolt = <800000>;
|
||||
};
|
||||
|
||||
channel@84 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x84>;
|
||||
label = "vdd_5p0";
|
||||
gw,voltage-divider-ohms = <22100 10000>;
|
||||
};
|
||||
|
||||
channel@86 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x86>;
|
||||
label = "vdd_3p3";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@88 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x88>;
|
||||
label = "vdd_2p5";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@8c {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8c>;
|
||||
label = "vdd_arm";
|
||||
};
|
||||
|
||||
channel@8e {
|
||||
gw,mode = <2>;
|
||||
reg = <0x8e>;
|
||||
label = "vdd_soc";
|
||||
};
|
||||
|
||||
channel@90 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x90>;
|
||||
label = "vdd_1p5";
|
||||
};
|
||||
|
||||
channel@92 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x92>;
|
||||
label = "vdd_1p0";
|
||||
};
|
||||
|
||||
channel@98 {
|
||||
gw,mode = <2>;
|
||||
reg = <0x98>;
|
||||
label = "vdd_3p0";
|
||||
};
|
||||
|
||||
channel@9a {
|
||||
gw,mode = <2>;
|
||||
reg = <0x9a>;
|
||||
label = "vdd_an1";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
|
||||
channel@a2 {
|
||||
gw,mode = <2>;
|
||||
reg = <0xa2>;
|
||||
label = "vdd_gsc";
|
||||
gw,voltage-divider-ohms = <10000 10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
gsc_gpio: gpio@23 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&gsc>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x51>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x52>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1672";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcie>;
|
||||
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pwm4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart5>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbotg {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
disable-over-current;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbh1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_enet: enetgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||||
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
||||
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
||||
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
||||
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
||||
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
||||
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
||||
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: gpioledsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
||||
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpmi_nand: gpminandgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
||||
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
||||
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
||||
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
||||
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||||
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pcie: pciegrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm4: pwm4grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart5: uart5grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
||||
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usbotg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
||||
>;
|
||||
};
|
||||
};
|
@ -6,3 +6,51 @@ F: include/configs/gw_ventana.h
|
||||
F: configs/gwventana_nand_defconfig
|
||||
F: configs/gwventana_emmc_defconfig
|
||||
F: configs/gwventana_gw5904_defconfig
|
||||
F: arch/arm/dts/imx6dl-gw51xx.dts
|
||||
F: arch/arm/dts/imx6dl-gw52xx.dts
|
||||
F: arch/arm/dts/imx6dl-gw53xx.dts
|
||||
F: arch/arm/dts/imx6dl-gw54xx.dts
|
||||
F: arch/arm/dts/imx6dl-gw551x.dts
|
||||
F: arch/arm/dts/imx6dl-gw552x.dts
|
||||
F: arch/arm/dts/imx6dl-gw553x.dts
|
||||
F: arch/arm/dts/imx6dl-gw560x.dts
|
||||
F: arch/arm/dts/imx6dl-gw5903.dts
|
||||
F: arch/arm/dts/imx6dl-gw5904.dts
|
||||
F: arch/arm/dts/imx6dl-gw5905.dts
|
||||
F: arch/arm/dts/imx6dl-gw5907.dts
|
||||
F: arch/arm/dts/imx6dl-gw5910.dts
|
||||
F: arch/arm/dts/imx6dl-gw5912.dts
|
||||
F: arch/arm/dts/imx6dl-gw5913.dts
|
||||
F: arch/arm/dts/imx6qdl-gw51xx.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw52xx.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw53xx.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw54xx.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw551x.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw552x.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw553x.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw560x.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw5903.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw5904.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw5905.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw5907.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw5910.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw5912.dtsi
|
||||
F: arch/arm/dts/imx6qdl-gw5913.dtsi
|
||||
F: arch/arm/dts/imx6q-gw51xx.dts
|
||||
F: arch/arm/dts/imx6q-gw52xx.dts
|
||||
F: arch/arm/dts/imx6q-gw53xx.dts
|
||||
F: arch/arm/dts/imx6q-gw5400-a.dts
|
||||
F: arch/arm/dts/imx6q-gw54xx.dts
|
||||
F: arch/arm/dts/imx6q-gw551x.dts
|
||||
F: arch/arm/dts/imx6q-gw552x.dts
|
||||
F: arch/arm/dts/imx6q-gw553x.dts
|
||||
F: arch/arm/dts/imx6q-gw560x.dts
|
||||
F: arch/arm/dts/imx6q-gw5901.dts
|
||||
F: arch/arm/dts/imx6q-gw5902.dts
|
||||
F: arch/arm/dts/imx6q-gw5903.dts
|
||||
F: arch/arm/dts/imx6q-gw5904.dts
|
||||
F: arch/arm/dts/imx6q-gw5905.dts
|
||||
F: arch/arm/dts/imx6q-gw5907.dts
|
||||
F: arch/arm/dts/imx6q-gw5910.dts
|
||||
F: arch/arm/dts/imx6q-gw5912.dts
|
||||
F: arch/arm/dts/imx6q-gw5913.dts
|
||||
|
Loading…
Reference in New Issue
Block a user