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sunxi: Add support for I2C on H6 like SoCs

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I2C support, especially R_I2C port, will be needed in future. Upcoming
support for H616 will need R_I2C to adjust DRAM voltage.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Jernej Skrabec 2021-01-11 21:11:38 +01:00 committed by Andre Przywara
parent 807d94258c
commit 57e7623776
3 changed files with 31 additions and 1 deletions
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1
arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
View File

@ -297,6 +297,7 @@ struct sunxi_ccm_reg {
/* Module gate/reset shift*/
#define RESET_SHIFT (16)
#define GATE_SHIFT (0)
/* DRAM clock bit field */
#define DRAM_MOD_RESET BIT(30)

2
arch/arm/mach-sunxi/Kconfig
View File

@ -730,7 +730,7 @@ config I2C3_ENABLE
See I2C0_ENABLE help text.
endif
if SUNXI_GEN_SUN6I
if SUNXI_GEN_SUN6I || SUN50I_GEN_H6
config R_I2C_ENABLE
bool "Enable the PRCM I2C/TWI controller"
# This is used for the pmic on H3

29
arch/arm/mach-sunxi/clock_sun50i_h6.c
View File

@ -2,6 +2,7 @@
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clock.h>
#include <asm/arch/prcm.h>
#ifdef CONFIG_SPL_BUILD
void clock_init_safe(void)
@ -92,3 +93,31 @@ unsigned int clock_get_pll6(void)
/* The register defines PLL6-4X, not plain PLL6 */
return 24000000 / 4 * n / div1 / div2;
}
int clock_twi_onoff(int port, int state)
{
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
struct sunxi_prcm_reg *const prcm =
(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
u32 value, *ptr;
int shift;
value = BIT(GATE_SHIFT) | BIT (RESET_SHIFT);
if (port == 5) {
shift = 0;
ptr = &prcm->twi_gate_reset;
} else {
shift = port;
ptr = &ccm->twi_gate_reset;
}
/* set the apb clock gate and reset for twi */
if (state)
setbits_le32(ptr, value << shift);
else
clrbits_le32(ptr, value << shift);
return 0;
}