eth/r8152: support RTL8153B/RTL8154B
This is used to support RTL8153B and RTL8154B. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
This commit is contained in:
Hayes Wang
Marek Vasut
parent
9f6142aa0a
commit
3a41086f6a
@ -68,6 +68,8 @@ static const struct r8152_version r8152_versions[] = {
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{ 0x5c20, RTL_VER_05, 1 },
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{ 0x5c30, RTL_VER_06, 1 },
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{ 0x4800, RTL_VER_07, 0 },
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{ 0x6000, RTL_VER_08, 1 },
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{ 0x6010, RTL_VER_09, 1 },
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};
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static
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@ -331,6 +333,12 @@ void sram_write(struct r8152 *tp, u16 addr, u16 data)
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ocp_reg_write(tp, OCP_SRAM_DATA, data);
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}
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static u16 sram_read(struct r8152 *tp, u16 addr)
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{
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ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
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return ocp_reg_read(tp, OCP_SRAM_DATA);
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}
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int r8152_wait_for_bit(struct r8152 *tp, bool ocp_reg, u16 type, u16 index,
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const u32 mask, bool set, unsigned int timeout)
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{
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@ -467,12 +475,56 @@ static void r8153_set_rx_early_timeout(struct r8152 *tp)
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{
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u32 ocp_data = tp->coalesce / 8;
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ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
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switch (tp->version) {
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case RTL_VER_03:
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case RTL_VER_04:
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case RTL_VER_05:
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case RTL_VER_06:
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ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
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ocp_data);
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break;
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case RTL_VER_08:
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case RTL_VER_09:
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/* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
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* primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 1264ns.
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*/
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ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
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RX_AUXILIARY_TIMER / 8);
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ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
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ocp_data);
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break;
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default:
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debug("** %s Invalid Device\n", __func__);
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break;
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}
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}
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static void r8153_set_rx_early_size(struct r8152 *tp)
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{
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u32 ocp_data = (RTL8152_AGG_BUF_SZ - RTL8153_RMS) / 4;
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u32 ocp_data = (RTL8152_AGG_BUF_SZ - RTL8153_RMS -
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sizeof(struct rx_desc));
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switch (tp->version) {
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case RTL_VER_03:
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case RTL_VER_04:
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case RTL_VER_05:
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case RTL_VER_06:
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ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
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ocp_data / 4);
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break;
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case RTL_VER_08:
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case RTL_VER_09:
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ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
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ocp_data / 8);
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break;
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default:
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debug("** %s Invalid Device\n", __func__);
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break;
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}
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ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
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}
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@ -540,6 +592,19 @@ static void r8153_u1u2en(struct r8152 *tp, bool enable)
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usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
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}
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static void r8153b_u1u2en(struct r8152 *tp, bool enable)
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{
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u16 ocp_data;
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ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
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if (enable)
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ocp_data |= LPM_U1U2_EN;
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else
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ocp_data &= ~LPM_U1U2_EN;
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ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
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}
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static void r8153_u2p3en(struct r8152 *tp, bool enable)
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{
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u32 ocp_data;
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@ -784,6 +849,71 @@ static void r8153_hw_phy_cfg(struct r8152 *tp)
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sram_write(tp, SRAM_10M_AMP2, 0x0208);
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}
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static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
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{
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u32 ocp_data;
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD, EFUSE_READ_CMD | addr);
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ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
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ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
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ocp_data |= ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
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return ocp_data;
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}
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static void r8153b_hw_phy_cfg(struct r8152 *tp)
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{
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u32 ocp_data;
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u16 data;
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data = r8152_mdio_read(tp, MII_BMCR);
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if (data & BMCR_PDOWN) {
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data &= ~BMCR_PDOWN;
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r8152_mdio_write(tp, MII_BMCR, data);
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}
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/* U1/U2/L1 idle timer. 500 us */
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ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
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r8153b_firmware(tp);
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data = sram_read(tp, SRAM_GREEN_CFG);
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data |= R_TUNE_EN;
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sram_write(tp, SRAM_GREEN_CFG, data);
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data = ocp_reg_read(tp, OCP_NCTL_CFG);
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data |= PGA_RETURN_EN;
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ocp_reg_write(tp, OCP_NCTL_CFG, data);
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/* ADC Bias Calibration:
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* read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
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* bit (bit3) to rebuild the real 16-bit data. Write the data to the
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* ADC ioffset.
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*/
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ocp_data = r8152_efuse_read(tp, 0x7d);
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ocp_data = ((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7);
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if (ocp_data != 0xffff)
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ocp_reg_write(tp, OCP_ADC_IOFFSET, ocp_data);
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/* ups mode tx-link-pulse timing adjustment:
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* rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
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* swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
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*/
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ocp_data = ocp_reg_read(tp, 0xc426);
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ocp_data &= 0x3fff;
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if (ocp_data) {
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u32 swr_cnt_1ms_ini;
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swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
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ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
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ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
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ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
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}
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ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
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ocp_data |= PFM_PWM_SWITCH;
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
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}
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static void r8153_first_init(struct r8152 *tp)
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{
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u32 ocp_data;
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@ -991,6 +1121,16 @@ static void rtl8153_down(struct r8152 *tp)
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r8153_enter_oob(tp);
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}
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static void rtl8153b_up(struct r8152 *tp)
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{
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r8153_first_init(tp);
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}
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static void rtl8153b_down(struct r8152 *tp)
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{
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r8153_enter_oob(tp);
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}
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static void r8152b_get_version(struct r8152 *tp)
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{
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u32 ocp_data;
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@ -1154,6 +1294,60 @@ static void r8153_init(struct r8152 *tp)
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rtl_tally_reset(tp);
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}
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static void r8153b_init(struct r8152 *tp)
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{
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u32 ocp_data;
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int i;
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r8153_disable_aldps(tp);
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r8153b_u1u2en(tp, false);
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r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_BOOT_CTRL,
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AUTOLOAD_DONE, 1, R8152_WAIT_TIMEOUT);
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for (i = 0; i < R8152_WAIT_TIMEOUT; i++) {
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ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
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if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
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break;
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mdelay(1);
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}
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r8153_u2p3en(tp, false);
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/* MSC timer = 0xfff * 8ms = 32760 ms */
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ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
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r8153_power_cut_en(tp, false);
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/* MAC clock speed down */
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ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
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ocp_data |= MAC_CLK_SPDWN_EN;
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
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ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3);
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ocp_data &= ~PLA_MCU_SPDWN_EN;
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data);
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if (tp->version == RTL_VER_09) {
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/* Disable Test IO for 32QFN */
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if (ocp_read_byte(tp, MCU_TYPE_PLA, 0xdc00) & BIT(5)) {
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ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
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ocp_data |= TEST_IO_OFF;
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ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
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}
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}
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/* rx aggregation */
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ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
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ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
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ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
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rtl_tally_reset(tp);
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r8153b_hw_phy_cfg(tp);
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r8152b_enable_fc(tp);
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}
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static void rtl8152_unload(struct r8152 *tp)
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{
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if (tp->version != RTL_VER_01)
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@ -1194,6 +1388,15 @@ static int rtl_ops_init(struct r8152 *tp)
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ops->unload = rtl8153_unload;
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break;
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case RTL_VER_08:
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case RTL_VER_09:
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ops->init = r8153b_init;
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ops->enable = rtl8153_enable;
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ops->disable = rtl8153_disable;
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ops->up = rtl8153b_up;
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ops->down = rtl8153b_down;
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break;
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default:
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ret = -ENODEV;
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printf("r8152 Unknown Device\n");
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@ -26,6 +26,8 @@
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#define PLA_TEREDO_TIMER 0xd2cc
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#define PLA_REALWOW_TIMER 0xd2e8
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#define PLA_EXTRA_STATUS 0xd398
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#define PLA_EFUSE_DATA 0xdd00
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#define PLA_EFUSE_CMD 0xdd02
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#define PLA_LEDSEL 0xdd90
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#define PLA_LED_FEATURE 0xdd92
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#define PLA_PHYAR 0xde00
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@ -76,8 +78,10 @@
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#define USB_CSR_DUMMY2 0xb466
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#define USB_DEV_STAT 0xb808
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#define USB_CONNECT_TIMER 0xcbf8
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#define USB_MSC_TIMER 0xcbfc
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#define USB_BURST_SIZE 0xcfc0
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#define USB_FW_FIX_EN1 0xcfcc
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#define USB_LPM_CONFIG 0xcfd8
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#define USB_USB_CTRL 0xd406
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#define USB_PHY_CTRL 0xd408
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#define USB_TX_AGG 0xd40a
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@ -85,19 +89,23 @@
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#define USB_USB_TIMER 0xd428
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#define USB_RX_EARLY_TIMEOUT 0xd42c
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#define USB_RX_EARLY_SIZE 0xd42e
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#define USB_PM_CTRL_STATUS 0xd432
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#define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
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#define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
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#define USB_TX_DMA 0xd434
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#define USB_TOLERANCE 0xd490
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#define USB_LPM_CTRL 0xd41a
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#define USB_BMU_RESET 0xd4b0
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#define USB_U1U2_TIMER 0xd4da
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#define USB_UPS_CTRL 0xd800
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#define USB_POWER_CUT 0xd80a
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#define USB_MISC_0 0xd81a
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#define USB_AFE_CTRL2 0xd824
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#define USB_UPS_CFG 0xd842
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#define USB_WDT11_CTRL 0xe43c
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#define USB_BP_BA PLA_BP_BA
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#define USB_BP(n) (0xfc28 + 2 * (n))
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#define USB_BP_EN PLA_BP_EN
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#define USB_BP_EN PLA_BP_EN /* RTL8153A */
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#define USB_BP2_EN 0xfc48
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/* OCP Registers */
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#define OCP_ALDPS_CONFIG 0x2010
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@ -108,6 +116,7 @@
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#define OCP_EEE_AR 0xa41a
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#define OCP_EEE_DATA 0xa41c
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#define OCP_PHY_STATUS 0xa420
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#define OCP_NCTL_CFG 0xa42c
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#define OCP_POWER_CFG 0xa430
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#define OCP_EEE_CFG 0xa432
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#define OCP_SRAM_ADDR 0xa436
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@ -117,9 +126,11 @@
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#define OCP_EEE_ADV 0xa5d0
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#define OCP_EEE_LPABLE 0xa5d2
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#define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
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#define OCP_ADC_IOFFSET 0xbcfc
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#define OCP_ADC_CFG 0xbc06
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/* SRAM Register */
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#define SRAM_GREEN_CFG 0x8011
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#define SRAM_LPF_CFG 0x8012
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#define SRAM_10M_AMP1 0x8080
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#define SRAM_10M_AMP2 0x8082
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@ -201,6 +212,7 @@
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/* PLA_PHY_PWR */
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#define PLA_PHY_PWR_LLR (LINK_LIST_READY << 24)
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#define PLA_PHY_PWR_TXEMP (TXFIFO_EMPTY << 24)
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#define TEST_IO_OFF BIT(4)
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/* PLA_MISC_1 */
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#define RXDY_GATED_EN 0x0008
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@ -224,6 +236,10 @@
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/* PLA_BDC_CR */
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#define ALDPS_PROXY_MODE 0x0001
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/* PLA_EFUSE_CMD */
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#define EFUSE_READ_CMD BIT(15)
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#define EFUSE_DATA_BIT16 BIT(7)
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/* PLA_CONFIG34 */
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#define LINK_ON_WAKE_EN 0x0010
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#define LINK_OFF_WAKE_EN 0x0008
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@ -249,8 +265,10 @@
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/* PLA_MAC_PWR_CTRL2 */
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#define EEE_SPDWN_RATIO 0x8007
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#define MAC_CLK_SPDWN_EN BIT(15)
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/* PLA_MAC_PWR_CTRL3 */
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#define PLA_MCU_SPDWN_EN BIT(14)
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#define PKT_AVAIL_SPDWN_EN 0x0100
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#define SUSPEND_SPDWN_EN 0x0004
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#define U1U2_SPDWN_EN 0x0002
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@ -306,6 +324,9 @@
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/* USB_FW_FIX_EN1 */
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#define FW_IP_RESET_EN BIT(9)
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/* USB_LPM_CONFIG */
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#define LPM_U1U2_EN BIT(0)
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/* USB_TX_AGG */
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#define TX_AGG_MAX_THRESHOLD 0x03
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@ -314,6 +335,9 @@
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#define RX_THR_HIGH 0x7a120180
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#define RX_THR_SLOW 0xffff0180
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/* USB_RX_EARLY_TIMEOUT */
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#define RX_AUXILIARY_TIMER 1264
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/* USB_TX_DMA */
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#define TEST_MODE_DISABLE 0x00000001
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#define TX_SIZE_ADJUST1 0x00000100
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@ -364,6 +388,9 @@
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#define SEN_VAL_NORMAL 0xa000
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#define SEL_RXIDLE 0x0100
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/* USB_UPS_CFG */
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#define SAW_CNT_1MS_MASK 0x0fff
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/* OCP_ALDPS_CONFIG */
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#define ENPWRSAVE 0x8000
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#define ENPDNPS 0x0200
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@ -375,6 +402,9 @@
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#define PHY_STAT_LAN_ON 3
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#define PHY_STAT_PWRDN 5
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/* OCP_NCTL_CFG */
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#define PGA_RETURN_EN BIT(1)
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/* OCP_POWER_CFG */
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#define EEE_CLKDIV_EN 0x8000
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#define EN_ALDPS 0x0004
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@ -427,6 +457,10 @@
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#define ADC_EN 0x0080
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#define EN_EMI_L 0x0040
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/* SRAM_GREEN_CFG */
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#define GREEN_ETH_EN BIT(15)
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#define R_TUNE_EN BIT(11)
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/* SRAM_LPF_CFG */
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#define LPF_AUTO_TUNE 0x8000
|
||||
|
||||
@ -571,6 +605,8 @@ enum rtl_version {
|
||||
RTL_VER_05,
|
||||
RTL_VER_06,
|
||||
RTL_VER_07,
|
||||
RTL_VER_08,
|
||||
RTL_VER_09,
|
||||
RTL_VER_MAX
|
||||
};
|
||||
|
||||
@ -638,4 +674,5 @@ int r8152_wait_for_bit(struct r8152 *tp, bool ocp_reg, u16 type, u16 index,
|
||||
|
||||
void r8152b_firmware(struct r8152 *tp);
|
||||
void r8153_firmware(struct r8152 *tp);
|
||||
void r8153b_firmware(struct r8152 *tp);
|
||||
#endif
|
||||
|
||||
@ -729,6 +729,127 @@ static u16 r8153_pla_patch_d_bp[] = {
|
||||
0xfc2e, 0x0000, 0xfc30, 0x0000, 0xfc32, 0x0000, 0xfc34, 0x0000,
|
||||
0xfc36, 0x0000, 0xfc38, 0x0007 };
|
||||
|
||||
static u8 usb_patch2_b[] = {
|
||||
0x10, 0xe0, 0x26, 0xe0, 0x3a, 0xe0, 0x58, 0xe0,
|
||||
0x6c, 0xe0, 0x85, 0xe0, 0xa5, 0xe0, 0xbe, 0xe0,
|
||||
0xd8, 0xe0, 0xdb, 0xe0, 0xf3, 0xe0, 0xf5, 0xe0,
|
||||
0xf7, 0xe0, 0xf9, 0xe0, 0xfb, 0xe0, 0xfd, 0xe0,
|
||||
0x16, 0xc0, 0x00, 0x75, 0xd1, 0x49, 0x0d, 0xf0,
|
||||
0x0f, 0xc0, 0x0f, 0xc5, 0x00, 0x1e, 0x08, 0x9e,
|
||||
0x0c, 0x9d, 0x0c, 0xc6, 0x0a, 0x9e, 0x8f, 0x1c,
|
||||
0x0e, 0x8c, 0x0e, 0x74, 0xcf, 0x49, 0xfe, 0xf1,
|
||||
0x02, 0xc0, 0x00, 0xb8, 0x96, 0x31, 0x00, 0xdc,
|
||||
0x24, 0xe4, 0x80, 0x02, 0x34, 0xd3, 0xff, 0xc3,
|
||||
0x60, 0x72, 0xa1, 0x49, 0x0d, 0xf0, 0xf8, 0xc3,
|
||||
0xf8, 0xc2, 0x00, 0x1c, 0x68, 0x9c, 0xf6, 0xc4,
|
||||
0x6a, 0x9c, 0x6c, 0x9a, 0x8f, 0x1c, 0x6e, 0x8c,
|
||||
0x6e, 0x74, 0xcf, 0x49, 0xfe, 0xf1, 0x04, 0xc0,
|
||||
0x02, 0xc2, 0x00, 0xba, 0xa8, 0x28, 0xf8, 0xc7,
|
||||
0xea, 0xc0, 0x00, 0x75, 0xd1, 0x49, 0x15, 0xf0,
|
||||
0x19, 0xc7, 0x17, 0xc2, 0xec, 0x9a, 0x00, 0x19,
|
||||
0xee, 0x89, 0xee, 0x71, 0x9f, 0x49, 0xfe, 0xf1,
|
||||
0xea, 0x71, 0x9f, 0x49, 0x0a, 0xf0, 0xd9, 0xc2,
|
||||
0xec, 0x9a, 0x00, 0x19, 0xe8, 0x99, 0x81, 0x19,
|
||||
0xee, 0x89, 0xee, 0x71, 0x9f, 0x49, 0xfe, 0xf1,
|
||||
0x06, 0xc3, 0x02, 0xc2, 0x00, 0xba, 0xf0, 0x1d,
|
||||
0x4c, 0xe8, 0x00, 0xdc, 0x00, 0xd4, 0xcb, 0xc0,
|
||||
0x00, 0x75, 0xd1, 0x49, 0x0d, 0xf0, 0xc4, 0xc0,
|
||||
0xc4, 0xc5, 0x00, 0x1e, 0x08, 0x9e, 0xc2, 0xc6,
|
||||
0x0a, 0x9e, 0x0c, 0x9d, 0x8f, 0x1c, 0x0e, 0x8c,
|
||||
0x0e, 0x74, 0xcf, 0x49, 0xfe, 0xf1, 0x04, 0xc0,
|
||||
0x02, 0xc1, 0x00, 0xb9, 0xc4, 0x16, 0x20, 0xd4,
|
||||
0xb6, 0xc0, 0x00, 0x75, 0xd1, 0x48, 0x00, 0x9d,
|
||||
0xe5, 0xc7, 0xaf, 0xc2, 0xec, 0x9a, 0x00, 0x19,
|
||||
0xe8, 0x9a, 0x81, 0x19, 0xee, 0x89, 0xee, 0x71,
|
||||
0x9f, 0x49, 0xfe, 0xf1, 0x2c, 0xc1, 0xec, 0x99,
|
||||
0x81, 0x19, 0xee, 0x89, 0xee, 0x71, 0x9f, 0x49,
|
||||
0xfe, 0xf1, 0x04, 0xc3, 0x02, 0xc2, 0x00, 0xba,
|
||||
0x96, 0x1c, 0xc0, 0xd4, 0xc0, 0x88, 0x1e, 0xc6,
|
||||
0xc0, 0x70, 0x8f, 0x49, 0x0e, 0xf0, 0x8f, 0x48,
|
||||
0x93, 0xc6, 0xca, 0x98, 0x11, 0x18, 0xc8, 0x98,
|
||||
0x16, 0xc0, 0xcc, 0x98, 0x8f, 0x18, 0xce, 0x88,
|
||||
0xce, 0x70, 0x8f, 0x49, 0xfe, 0xf1, 0x0b, 0xe0,
|
||||
0x43, 0xc6, 0x00, 0x18, 0xc8, 0x98, 0x0b, 0xc0,
|
||||
0xcc, 0x98, 0x81, 0x18, 0xce, 0x88, 0xce, 0x70,
|
||||
0x8f, 0x49, 0xfe, 0xf1, 0x02, 0xc0, 0x00, 0xb8,
|
||||
0xf2, 0x19, 0x40, 0xd3, 0x20, 0xe4, 0x33, 0xc2,
|
||||
0x40, 0x71, 0x91, 0x48, 0x40, 0x99, 0x30, 0xc2,
|
||||
0x00, 0x19, 0x48, 0x99, 0xf8, 0xc1, 0x4c, 0x99,
|
||||
0x81, 0x19, 0x4e, 0x89, 0x4e, 0x71, 0x9f, 0x49,
|
||||
0xfe, 0xf1, 0x0b, 0xc1, 0x4c, 0x99, 0x81, 0x19,
|
||||
0x4e, 0x89, 0x4e, 0x71, 0x9f, 0x49, 0xfe, 0xf1,
|
||||
0x02, 0x71, 0x02, 0xc2, 0x00, 0xba, 0x0e, 0x34,
|
||||
0x24, 0xe4, 0x19, 0xc2, 0x40, 0x71, 0x91, 0x48,
|
||||
0x40, 0x99, 0x16, 0xc2, 0x00, 0x19, 0x48, 0x99,
|
||||
0xde, 0xc1, 0x4c, 0x99, 0x81, 0x19, 0x4e, 0x89,
|
||||
0x4e, 0x71, 0x9f, 0x49, 0xfe, 0xf1, 0xf1, 0xc1,
|
||||
0x4c, 0x99, 0x81, 0x19, 0x4e, 0x89, 0x4e, 0x71,
|
||||
0x9f, 0x49, 0xfe, 0xf1, 0x02, 0x71, 0x02, 0xc2,
|
||||
0x00, 0xba, 0x60, 0x33, 0x34, 0xd3, 0x00, 0xdc,
|
||||
0x1e, 0x89, 0x02, 0xc0, 0x00, 0xb8, 0xfa, 0x12,
|
||||
0x18, 0xc0, 0x00, 0x65, 0xd1, 0x49, 0x0e, 0xf0,
|
||||
0x11, 0xc0, 0x11, 0xc5, 0x00, 0x1e, 0x08, 0x9e,
|
||||
0x0c, 0x9d, 0x0e, 0xc6, 0x0a, 0x9e, 0x8f, 0x1c,
|
||||
0x0e, 0x8c, 0x0e, 0x74, 0xcf, 0x49, 0xfe, 0xf1,
|
||||
0x04, 0xc0, 0x02, 0xc2, 0x00, 0xba, 0xa0, 0x41,
|
||||
0x06, 0xd4, 0x00, 0xdc, 0x24, 0xe4, 0x80, 0x02,
|
||||
0x34, 0xd3, 0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00,
|
||||
0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00, 0x02, 0xc0,
|
||||
0x00, 0xb8, 0x00, 0x00, 0x02, 0xc0, 0x00, 0xb8,
|
||||
0x00, 0x00, 0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00,
|
||||
0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x00 };
|
||||
|
||||
static u16 r8153b_usb_patch_b_bp[] = {
|
||||
0xfc26, 0xa000, 0xfc28, 0x2a20, 0xfc2a, 0x28a6, 0xfc2c, 0x1dee,
|
||||
0xfc2e, 0x16c2, 0xfc30, 0x1c94, 0xfc32, 0x19f0, 0xfc34, 0x340c,
|
||||
0xfc36, 0x335e, 0xfc38, 0x12f8, 0xfc3a, 0x419e, 0xfc3c, 0x0000,
|
||||
0xfc3e, 0x0000, 0xfc40, 0x0000, 0xfc42, 0x0000, 0xfc44, 0x0000,
|
||||
0xfc46, 0x0000, 0xfc48, 0x03ff };
|
||||
|
||||
static u8 pla_patch2_b[] = {
|
||||
0x05, 0xe0, 0x1b, 0xe0, 0x2c, 0xe0, 0x60, 0xe0,
|
||||
0x73, 0xe0, 0x15, 0xc6, 0xc2, 0x64, 0xd2, 0x49,
|
||||
0x06, 0xf1, 0xc4, 0x48, 0xc5, 0x48, 0xc6, 0x48,
|
||||
0xc7, 0x48, 0x05, 0xe0, 0x44, 0x48, 0x45, 0x48,
|
||||
0x46, 0x48, 0x47, 0x48, 0xc2, 0x8c, 0xc0, 0x64,
|
||||
0x46, 0x48, 0xc0, 0x8c, 0x05, 0xc5, 0x02, 0xc4,
|
||||
0x00, 0xbc, 0x18, 0x02, 0x06, 0xdc, 0xb0, 0xc0,
|
||||
0x10, 0xc5, 0xa0, 0x77, 0xa0, 0x74, 0x46, 0x48,
|
||||
0x47, 0x48, 0xa0, 0x9c, 0x0b, 0xc5, 0xa0, 0x74,
|
||||
0x44, 0x48, 0x43, 0x48, 0xa0, 0x9c, 0x05, 0xc5,
|
||||
0xa0, 0x9f, 0x02, 0xc5, 0x00, 0xbd, 0x3c, 0x03,
|
||||
0x1c, 0xe8, 0x20, 0xe8, 0xd4, 0x49, 0x04, 0xf1,
|
||||
0xd5, 0x49, 0x20, 0xf1, 0x28, 0xe0, 0x2a, 0xc7,
|
||||
0xe0, 0x75, 0xda, 0x49, 0x14, 0xf0, 0x27, 0xc7,
|
||||
0xe0, 0x75, 0xdc, 0x49, 0x10, 0xf1, 0x24, 0xc7,
|
||||
0xe0, 0x75, 0x25, 0xc7, 0xe0, 0x74, 0x2c, 0x40,
|
||||
0x0a, 0xfa, 0x1f, 0xc7, 0xe4, 0x75, 0xd0, 0x49,
|
||||
0x09, 0xf1, 0x1c, 0xc5, 0xe6, 0x9d, 0x11, 0x1d,
|
||||
0xe4, 0x8d, 0x04, 0xe0, 0x16, 0xc7, 0x00, 0x1d,
|
||||
0xe4, 0x8d, 0xe0, 0x8e, 0x11, 0x1d, 0xe0, 0x8d,
|
||||
0x07, 0xe0, 0x0c, 0xc7, 0xe0, 0x75, 0xda, 0x48,
|
||||
0xe0, 0x9d, 0x0b, 0xc7, 0xe4, 0x8e, 0x02, 0xc4,
|
||||
0x00, 0xbc, 0x28, 0x03, 0x02, 0xc4, 0x00, 0xbc,
|
||||
0x14, 0x03, 0x12, 0xe8, 0x4e, 0xe8, 0x1c, 0xe6,
|
||||
0x20, 0xe4, 0x80, 0x02, 0xa4, 0xc0, 0x12, 0xc2,
|
||||
0x40, 0x73, 0xb0, 0x49, 0x08, 0xf0, 0xb8, 0x49,
|
||||
0x06, 0xf0, 0xb8, 0x48, 0x40, 0x9b, 0x0b, 0xc2,
|
||||
0x40, 0x76, 0x05, 0xe0, 0x02, 0x61, 0x02, 0xc3,
|
||||
0x00, 0xbb, 0x0a, 0x0a, 0x02, 0xc3, 0x00, 0xbb,
|
||||
0x1a, 0x0a, 0x98, 0xd3, 0x1e, 0xfc, 0xfe, 0xc0,
|
||||
0x02, 0x62, 0xa0, 0x48, 0x02, 0x8a, 0x00, 0x72,
|
||||
0xa0, 0x49, 0x11, 0xf0, 0x13, 0xc1, 0x20, 0x62,
|
||||
0x2e, 0x21, 0x2f, 0x25, 0x00, 0x71, 0x9f, 0x24,
|
||||
0x0a, 0x40, 0x09, 0xf0, 0x00, 0x71, 0x18, 0x48,
|
||||
0xa0, 0x49, 0x03, 0xf1, 0x9f, 0x48, 0x02, 0xe0,
|
||||
0x1f, 0x48, 0x00, 0x99, 0x02, 0xc2, 0x00, 0xba,
|
||||
0xda, 0x0e, 0x08, 0xe9 };
|
||||
|
||||
static u16 r8153b_pla_patch_b_bp[] = {
|
||||
0xfc26, 0x8000, 0xfc28, 0x0216, 0xfc2a, 0x0332, 0xfc2c, 0x030c,
|
||||
0xfc2e, 0x0a08, 0xfc30, 0x0ec0, 0xfc32, 0x0000, 0xfc34, 0x0000,
|
||||
0xfc36, 0x0000, 0xfc38, 0x001e };
|
||||
|
||||
static void rtl_clear_bp(struct r8152 *tp, u16 type)
|
||||
{
|
||||
u8 zeros[16] = {0};
|
||||
@ -744,7 +865,17 @@ static void rtl_clear_bp(struct r8152 *tp, u16 type)
|
||||
case RTL_VER_06:
|
||||
ocp_write_byte(tp, type, PLA_BP_EN, 0);
|
||||
break;
|
||||
case RTL_VER_08:
|
||||
case RTL_VER_09:
|
||||
default:
|
||||
if (type == MCU_TYPE_USB) {
|
||||
ocp_write_byte(tp, MCU_TYPE_USB, USB_BP2_EN, 0);
|
||||
|
||||
generic_ocp_write(tp, USB_BP(8), 0xff, sizeof(zeros),
|
||||
zeros, type);
|
||||
} else {
|
||||
ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1022,3 +1153,42 @@ void r8153_firmware(struct r8152 *tp)
|
||||
ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1, ocp_data);
|
||||
}
|
||||
}
|
||||
|
||||
void r8153b_firmware(struct r8152 *tp)
|
||||
{
|
||||
u32 ocp_data;
|
||||
int i;
|
||||
|
||||
if (tp->version != RTL_VER_09)
|
||||
return;
|
||||
|
||||
rtl_clear_bp(tp, MCU_TYPE_USB);
|
||||
|
||||
ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
|
||||
generic_ocp_write(tp, 0xe600, 0xff, sizeof(usb_patch2_b),
|
||||
usb_patch2_b, MCU_TYPE_USB);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(r8153b_usb_patch_b_bp); i += 2)
|
||||
ocp_write_word(tp, MCU_TYPE_USB,
|
||||
r8153b_usb_patch_b_bp[i],
|
||||
r8153b_usb_patch_b_bp[i + 1]);
|
||||
|
||||
rtl_clear_bp(tp, MCU_TYPE_PLA);
|
||||
|
||||
ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000);
|
||||
generic_ocp_write(tp, 0xf800, 0xff, sizeof(pla_patch2_b),
|
||||
pla_patch2_b, MCU_TYPE_PLA);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(r8153b_pla_patch_b_bp); i += 2)
|
||||
ocp_write_word(tp, MCU_TYPE_PLA,
|
||||
r8153b_pla_patch_b_bp[i],
|
||||
r8153b_pla_patch_b_bp[i + 1]);
|
||||
|
||||
ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
|
||||
ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
|
||||
ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
|
||||
|
||||
ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1);
|
||||
ocp_data |= FW_IP_RESET_EN;
|
||||
ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1, ocp_data);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user