arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11
Synchronize r8a774e1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
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arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts
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arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the HiHope RZ/G2H sub board
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*
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* Copyright (C) 2020 Renesas Electronics Corp.
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*/
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#include "r8a774e1-hihope-rzg2h.dts"
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#include "hihope-rzg2-ex.dtsi"
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/ {
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model = "HopeRun HiHope RZ/G2H with sub board";
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compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2h",
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"renesas,r8a774e1";
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};
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/* Set SW43 = ON and SW1001[7] = OFF for SATA port to be activated */
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&sata {
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status = "okay";
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};
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arch/arm/dts/r8a774e1-hihope-rzg2h.dts
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arch/arm/dts/r8a774e1-hihope-rzg2h.dts
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the HiHope RZ/G2H main board
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*
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* Copyright (C) 2020 Renesas Electronics Corp.
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*/
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/dts-v1/;
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#include "r8a774e1.dtsi"
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#include "hihope-rev4.dtsi"
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/ {
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model = "HopeRun HiHope RZ/G2H main board based on r8a774e1";
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compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1";
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0x0 0x48000000 0x0 0x78000000>;
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};
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memory@500000000 {
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device_type = "memory";
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reg = <0x5 0x00000000 0x0 0x80000000>;
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};
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};
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&du {
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 721>,
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<&versaclock5 1>,
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<&x302_clk>,
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<&versaclock5 2>;
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clock-names = "du.0", "du.1", "du.3",
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"dclkin.0", "dclkin.1", "dclkin.3";
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};
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&sdhi3 {
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mmc-hs400-1_8v;
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};
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