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dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO

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Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.

CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.

All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
     's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Igor Opaniuk 2021-02-09 13:52:45 +02:00 committed by Heiko Schocher
parent a907dce88e
commit 2147a16983
107 changed files with 311 additions and 311 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/include/asm/arch-fsl-layerscape/config.h
View File

@ -183,7 +183,7 @@
#elif defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
#define TZPC_BASE 0x02200000
#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
#if !defined(CONFIG_DM_I2C)
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_EARLY_INIT
#endif

2
arch/arm/include/asm/arch-lpc32xx/i2c.h
View File

@ -22,7 +22,7 @@ struct lpc32xx_i2c_base {
u32 stxfl;
};
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
enum {
I2C_0, I2C_1, I2C_2,
};

2
arch/arm/include/asm/mach-imx/mxc_i2c.h
View File

@ -53,7 +53,7 @@ struct mxc_i2c_bus {
#if CONFIG_IS_ENABLED(CLK)
struct clk per_clk;
#endif
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
int (*idle_bus_fn)(void *p);
void *idle_bus_data;
#else

2
arch/arm/include/asm/omap_i2c.h
View File

@ -3,7 +3,7 @@
#ifndef _OMAP_I2C_H
#define _OMAP_I2C_H
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
/* Information about a GPIO bank */
struct omap_i2c_plat {

2
arch/arm/mach-imx/i2c-mxv7.c
View File

@ -102,7 +102,7 @@ int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
if (ret)
goto err_idle;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
bus_i2c_init(i2c_index, speed, slave_addr, force_idle_bus, p);
#endif

2
arch/arm/mach-keystone/ddr3_spd.c
View File

@ -404,7 +404,7 @@ static void init_ddr3param(struct ddr3_spd_cb *spd_cb,
static int ddr3_read_spd(ddr3_spd_eeprom_t *spd_params)
{
int ret;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
int old_bus;
i2c_init(CONFIG_SYS_DAVINCI_I2C_SPEED, CONFIG_SYS_DAVINCI_I2C_SLAVE);

2
arch/arm/mach-kirkwood/include/mach/config.h
View File

@ -96,7 +96,7 @@
/*
* I2C related stuff
*/
#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C)
#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
#ifndef CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI

2
arch/arm/mach-omap2/am33xx/board.c
View File

@ -113,7 +113,7 @@ U_BOOT_DRVINFOS(am33xx_uarts) = {
# endif
};
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static const struct omap_i2c_plat am33xx_i2c[] = {
{ I2C_BASE1, 100000, OMAP_I2C_REV_V2},
{ I2C_BASE2, 100000, OMAP_I2C_REV_V2},

6
arch/arm/mach-omap2/am33xx/clk_synthesizer.c
View File

@ -29,7 +29,7 @@ static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf)
/* Enable Bye read */
addr = addr | CLK_SYNTHESIZER_BYTE_MODE;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/* Send the command byte */
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1);
if (rc)
@ -72,7 +72,7 @@ static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val)
cmd[0] = addr | CLK_SYNTHESIZER_BYTE_MODE;
cmd[1] = val;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2);
#else
rc = dm_i2c_write(dev, addr, cmd, 2);
@ -96,7 +96,7 @@ int setup_clock_synthesizer(struct clk_synth *data)
int rc;
u8 val = 0;
struct udevice *dev = NULL;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR);
if (rc) {
printf("i2c probe failed at address 0x%x\n",

2
arch/arm/mach-omap2/boot-common.c
View File

@ -202,7 +202,7 @@ void spl_board_init(void)
#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
gpmc_init();
#endif
#if defined(CONFIG_SPL_I2C_SUPPORT) && !defined(CONFIG_DM_I2C)
#if defined(CONFIG_SPL_I2C_SUPPORT) && !CONFIG_IS_ENABLED(DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)

2
arch/arm/mach-omap2/clocks-common.c
View File

@ -912,7 +912,7 @@ void prcm_init(void)
enable_basic_uboot_clocks();
}
#if !defined(CONFIG_DM_I2C)
#if !CONFIG_IS_ENABLED(DM_I2C)
void gpi2c_init(void)
{
static int gpi2c = 1;

2
arch/arm/mach-sunxi/board.c
View File

@ -227,7 +227,7 @@ void s_init(void)
clock_init();
timer_init();
gpio_init();
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_init_board();
#endif
eth_init_board();

2
arch/powerpc/include/asm/fsl_i2c.h
View File

@ -68,7 +68,7 @@ typedef struct fsl_i2c_base {
u8 res6[0xE8];
} fsl_i2c_t;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct fsl_i2c_dev {
struct fsl_i2c_base __iomem *base; /* register base */
u32 i2c_clk;

2
board/freescale/common/dcu_sii9022a.c
View File

@ -64,7 +64,7 @@ int dcu_set_dvi_encoder(struct fb_videomode *videomode)
u8 temp;
u16 temp1, temp2;
u32 temp3;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;

2
board/freescale/common/diu_ch7301.c
View File

@ -53,7 +53,7 @@ int diu_set_dvi_encoder(unsigned int pixclock)
u8 temp;
temp = I2C_DVI_TEST_PATTERN_VAL;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM,

4
board/freescale/common/emc2305.c
View File

@ -24,7 +24,7 @@ void set_fan_speed(u8 data, int chip_addr)
I2C_EMC2305_FAN5};
for (index = 0; index < NUM_OF_FANS; index++) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_write(chip_addr, Fan[index], 1, &data, 1) != 0) {
printf("Error: failed to change fan speed @%x\n",
Fan[index]);
@ -48,7 +48,7 @@ void emc2305_init(int chip_addr)
u8 data;
data = I2C_EMC2305_CMD;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_write(chip_addr, I2C_EMC2305_CONF, 1, &data, 1) != 0)
printf("Error: failed to configure EMC2305\n");
#else

4
board/freescale/common/qixis.c
View File

@ -32,7 +32,7 @@
#ifdef CONFIG_SYS_I2C_FPGA_ADDR
u8 qixis_read_i2c(unsigned int reg)
{
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
return i2c_reg_read(CONFIG_SYS_I2C_FPGA_ADDR, reg);
#else
struct udevice *dev;
@ -47,7 +47,7 @@ u8 qixis_read_i2c(unsigned int reg)
void qixis_write_i2c(unsigned int reg, u8 value)
{
u8 val = value;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_reg_write(CONFIG_SYS_I2C_FPGA_ADDR, reg, val);
#else
struct udevice *dev;

20
board/freescale/common/sys_eeprom.c
View File

@ -152,7 +152,7 @@ static int read_eeprom(void)
{
int ret;
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
unsigned int bus;
#endif
#endif
@ -161,13 +161,13 @@ static int read_eeprom(void)
return 0;
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM);
#endif
#endif
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(void *)&e, sizeof(e));
@ -186,7 +186,7 @@ static int read_eeprom(void)
#endif
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_set_bus_num(bus);
#endif
#endif
@ -223,7 +223,7 @@ static int prog_eeprom(void)
int i;
void *p;
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
unsigned int bus;
#endif
#endif
@ -237,7 +237,7 @@ static int prog_eeprom(void)
#endif
update_crc();
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM);
@ -250,7 +250,7 @@ static int prog_eeprom(void)
* complete a given write.
*/
for (i = 0, p = &e; i < sizeof(e); i += 8, p += 8) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, i,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
p, min((int)(sizeof(e) - i), 8));
@ -279,7 +279,7 @@ static int prog_eeprom(void)
/* Verify the write by reading back the EEPROM and comparing */
struct eeprom e2;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(void *)&e2, sizeof(e2));
@ -302,7 +302,7 @@ static int prog_eeprom(void)
ret = -1;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
i2c_set_bus_num(bus);
#endif
@ -594,7 +594,7 @@ unsigned int get_cpu_board_revision(void)
u8 minor; /* 0x05 Board revision, minor */
} be;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(void *)&be, sizeof(be));
#else

24
board/freescale/common/vid.c
View File

@ -65,14 +65,14 @@ static int find_ir_chip_on_i2c(void)
u8 byte;
int i;
const int ir_i2c_addr[] = {0x38, 0x08, 0x09};
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
/* Check all the address */
for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) {
i2caddress = ir_i2c_addr[i];
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_MFR_ID_OFFSET, 1, (void *)&byte,
sizeof(byte));
@ -117,12 +117,12 @@ static int read_voltage_from_INA220(int i2caddress)
int i, ret, voltage_read = 0;
u16 vol_mon;
u8 buf[2];
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
for (i = 0; i < NUM_READINGS; i++) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(I2C_VOL_MONITOR_ADDR,
I2C_VOL_MONITOR_BUS_V_OFFSET, 1,
(void *)&buf, 2);
@ -160,12 +160,12 @@ static int read_voltage_from_IR(int i2caddress)
int i, ret, voltage_read = 0;
u16 vol_mon;
u8 buf;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
for (i = 0; i < NUM_READINGS; i++) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_LOOP1_VOUT_OFFSET,
1, (void *)&buf, 1);
@ -213,7 +213,7 @@ static int read_voltage_from_LTC(int i2caddress)
int ret, vcode = 0;
u8 chan = PWM_CHANNEL0;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/* select the PAGE 0 using PMBus commands PAGE for VDD*/
ret = i2c_write(I2C_VOL_MONITOR_ADDR,
PMBUS_CMD_PAGE, 1, &chan, 1);
@ -229,7 +229,7 @@ static int read_voltage_from_LTC(int i2caddress)
return ret;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/*read the output voltage using PMBus command READ_VOUT*/
ret = i2c_read(I2C_VOL_MONITOR_ADDR,
PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
@ -344,7 +344,7 @@ static int set_voltage_to_IR(int i2caddress, int vdd)
vid = DIV_ROUND_UP(vdd - 245, 5);
#endif
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET,
1, (void *)&vid, sizeof(vid));
#else
@ -392,7 +392,7 @@ static int set_voltage_to_LTC(int i2caddress, int vdd)
vdd & 0xFF, (vdd & 0xFF00) >> 8};
/* Write the desired voltage code to the regulator */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/* Check write protect state */
ret = i2c_read(I2C_VOL_MONITOR_ADDR,
PMBUS_CMD_WRITE_PROTECT, 1,
@ -621,7 +621,7 @@ int adjust_vdd(ulong vdd_override)
}
/* check IR chip work on Intel mode*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_INTEL_MODE_OOFSET,
1, (void *)&buf, 1);
@ -803,7 +803,7 @@ int adjust_vdd(ulong vdd_override)
}
/* check IR chip work on Intel mode*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_INTEL_MODE_OOFSET,
1, (void *)&buf, 1);

10
board/freescale/common/vsc3316_3308.c
View File

@ -34,7 +34,7 @@ int vsc_if_enable(unsigned int vsc_addr)
/* enable 2-wire Serial InterFace (I2C) */
data = 0x02;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int ret, bus_num = 0;
struct udevice *dev;
@ -62,7 +62,7 @@ int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],
debug("VSC:Initializing VSC3316 at I2C address 0x%2x"
" for Tx\n", vsc_addr);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int bus_num = 0;
struct udevice *dev;
@ -185,7 +185,7 @@ int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2],
debug("VSC:Initializing VSC3308 at I2C address 0x%x for Tx\n",
vsc_addr);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int bus_num = 0;
struct udevice *dev;
@ -385,7 +385,7 @@ int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2],
debug("VSC:Initializing VSC3308 at I2C address 0x%x"
" for Tx\n", vsc_addr);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int bus_num = 0;
struct udevice *dev;
@ -509,7 +509,7 @@ void vsc_wp_config(unsigned int vsc_addr)
/* For new crosspoint configuration to occur, WP bit of
* CORE_CONFIG_REG should be set 1 and then reset to 0 */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int ret, bus_num = 0;
struct udevice *dev;

2
board/freescale/ls1012aqds/ls1012aqds.c
View File

@ -112,7 +112,7 @@ int misc_init_r(void)
u8 mux_sdhc_cd = 0x80;
int bus_num = 0;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;

2
board/freescale/ls1012ardb/eth.c
View File

@ -29,7 +29,7 @@ static inline void ls1012ardb_reset_phy(void)
{
#ifdef CONFIG_TARGET_LS1012ARDB
/* Through reset IO expander reset both RGMII and SGMII PHYs */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;

12
board/freescale/ls1012ardb/ls1012ardb.c
View File

@ -43,7 +43,7 @@ int checkboard(void)
puts("Board: LS1012ARDB ");
/* Initialize i2c early for Serial flash bank information */
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR,
@ -195,7 +195,7 @@ int esdhc_status_fixup(void *blob, const char *compat)
u8 io = 0;
int ret, bus_num = 0;
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR,
@ -234,7 +234,7 @@ int esdhc_status_fixup(void *blob, const char *compat)
* 10 - eMMC Memory
* 11 - SPI
*/
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, I2C_MUX_IO_0, &io, 1);
#else
ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1);
@ -273,7 +273,7 @@ static int switch_to_bank1(void)
u8 data = 0xf4, chip_addr = 0x24, offset_addr = 0x03;
int ret, bus_num = 0;
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, chip_addr,
@ -338,7 +338,7 @@ static int switch_to_bank2(void)
u8 chip_addr = 0x24;
int ret, i, bus_num = 0;
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, chip_addr,
@ -361,7 +361,7 @@ static int switch_to_bank2(void)
* CS routed to SPI memory bank2
*/
for (i = 0; i < sizeof(data); i++) {
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_write(dev, offset_addr[i], &data[i], 1);
#else /* Non DM I2C support - will be removed */
ret = i2c_write(chip_addr, offset_addr[i], 1, &data[i], 1);

6
board/freescale/ls1021aqds/dcu.c
View File

@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
static int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
@ -65,7 +65,7 @@ int platform_dcu_init(struct fb_info *fbinfo,
u8 ch;
/* Mux I2C3+I2C4 as HSYNC+VSYNC */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
/* QIXIS device mount on I2C1 bus*/
@ -113,7 +113,7 @@ int platform_dcu_init(struct fb_info *fbinfo,
pixval = 1000000000 / dcu_fb_videomode->pixclock;
pixval *= 1000;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM);
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_CH7301,

2
board/freescale/ls1021aqds/ls1021aqds.c
View File

@ -144,7 +144,7 @@ unsigned long get_board_ddr_clk(void)
int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,

2
board/freescale/ls1021atwr/ls1021atwr.c
View File

@ -458,7 +458,7 @@ void ls1twr_program_regulator(void)
#define MC34VR500_ADDR 0x8
#define MC34VR500_DEVICEID 0x4
#define MC34VR500_DEVICEID_MASK 0x0f
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;

2
board/freescale/ls1028a/ls1028a.c
View File

@ -92,7 +92,7 @@ int board_init(void)
#if defined(CONFIG_TARGET_LS1028ARDB)
u8 val = I2C_MUX_CH_DEFAULT;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_MUX_PCA_ADDR_PRI, 0x0b, 1, &val, 1);
#else
struct udevice *dev;

4
board/freescale/ls1043aqds/ls1043aqds.c
View File

@ -283,7 +283,7 @@ int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
@ -338,7 +338,7 @@ void board_retimer_init(void)
/* Retimer is connected to I2C1_CH7_CH5 */
select_i2c_ch_pca9547(I2C_MUX_CH7, bus_num);
reg = I2C_MUX_CH5;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;

2
board/freescale/ls1046afrwy/ls1046afrwy.c
View File

@ -42,7 +42,7 @@ int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,

2
board/freescale/ls1046aqds/ls1046aqds.c
View File

@ -279,7 +279,7 @@ u32 get_lpuart_clk(void)
int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,

16
board/freescale/ls1088a/eth_ls1088aqds.c
View File

@ -114,12 +114,12 @@ static void sgmii_configure_repeater(int dpmac)
{0x18, NULL}, {0x23, &reg_val[3]},
{0x2d, &reg_val[4]}, {4, &reg_val[5]},
};
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@ -173,7 +173,7 @@ static void sgmii_configure_repeater(int dpmac)
return;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev);
#endif
@ -184,7 +184,7 @@ static void sgmii_configure_repeater(int dpmac)
reg_pair[5].val = &ch_b_eq[i];
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_phy_addr,
reg_pair[k].addr,
1, reg_pair[k].val, 1);
@ -257,12 +257,12 @@ static void qsgmii_configure_repeater(int dpmac)
const char *dev = mdio_names[EMI1_SLOT1];
int ret = 0;
unsigned short value;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@ -304,7 +304,7 @@ static void qsgmii_configure_repeater(int dpmac)
return;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev);
#endif
@ -316,7 +316,7 @@ static void qsgmii_configure_repeater(int dpmac)
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_phy_addr,
reg_pair[k].addr,
1, reg_pair[k].val, 1);

60
board/freescale/ls1088a/ls1088a.c
View File

@ -379,7 +379,7 @@ int select_i2c_ch_pca9547(u8 ch)
{
int ret;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#else
struct udevice *dev;
@ -406,7 +406,7 @@ void board_retimer_init(void)
/* Access to Control/Shared register */
reg = 0x0;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);
#else
struct udevice *dev;
@ -416,7 +416,7 @@ void board_retimer_init(void)
#endif
/* Read device revision and ID */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR, 1, 1, &reg, 1);
#else
dm_i2c_read(dev, 1, &reg, 1);
@ -425,20 +425,20 @@ void board_retimer_init(void)
/* Enable Broadcast. All writes target all channel register sets */
reg = 0x0c;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);
#else
dm_i2c_write(dev, 0xff, &reg, 1);
#endif
/* Reset Channel Registers */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR, 0, 1, &reg, 1);
#else
dm_i2c_read(dev, 0, &reg, 1);
#endif
reg |= 0x4;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0, 1, &reg, 1);
#else
dm_i2c_write(dev, 0, &reg, 1);
@ -446,45 +446,45 @@ void board_retimer_init(void)
/* Set data rate as 10.3125 Gbps */
reg = 0x90;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x60, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x60, &reg, 1);
#endif
reg = 0xb3;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x61, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x61, &reg, 1);
#endif
reg = 0x90;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x62, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x62, &reg, 1);
#endif
reg = 0xb3;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x63, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x63, &reg, 1);
#endif
reg = 0xcd;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x64, &reg, 1);
#endif
/* Select VCO Divider to full rate (000) */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR, 0x2F, 1, &reg, 1);
#else
dm_i2c_read(dev, 0x2F, &reg, 1);
#endif
reg &= 0x0f;
reg |= 0x70;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x2F, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x2F, &reg, 1);
@ -496,7 +496,7 @@ void board_retimer_init(void)
/* Access to Control/Shared register */
reg = 0x0;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, &reg, 1);
#else
i2c_get_chip_for_busnum(0, I2C_RETIMER_ADDR2, 1, &dev);
@ -504,7 +504,7 @@ void board_retimer_init(void)
#endif
/* Read device revision and ID */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR2, 1, 1, &reg, 1);
#else
dm_i2c_read(dev, 1, &reg, 1);
@ -513,20 +513,20 @@ void board_retimer_init(void)
/* Enable Broadcast. All writes target all channel register sets */
reg = 0x0c;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, &reg, 1);
#else
dm_i2c_write(dev, 0xff, &reg, 1);
#endif
/* Reset Channel Registers */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR2, 0, 1, &reg, 1);
#else
dm_i2c_read(dev, 0, &reg, 1);
#endif
reg |= 0x4;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0, 1, &reg, 1);
#else
dm_i2c_write(dev, 0, &reg, 1);
@ -534,45 +534,45 @@ void board_retimer_init(void)
/* Set data rate as 10.3125 Gbps */
reg = 0x90;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x60, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x60, &reg, 1);
#endif
reg = 0xb3;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x61, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x61, &reg, 1);
#endif
reg = 0x90;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x62, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x62, &reg, 1);
#endif
reg = 0xb3;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x63, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x63, &reg, 1);
#endif
reg = 0xcd;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x64, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x64, &reg, 1);
#endif
/* Select VCO Divider to full rate (000) */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR2, 0x2F, 1, &reg, 1);
#else
dm_i2c_read(dev, 0x2F, &reg, 1);
#endif
reg &= 0x0f;
reg |= 0x70;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x2F, 1, &reg, 1);
#else
dm_i2c_write(dev, 0x2F, &reg, 1);
@ -640,7 +640,7 @@ int get_serdes_volt(void)
u8 chan = PWM_CHANNEL0;
/* Select the PAGE 0 using PMBus commands PAGE for VDD */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
PMBUS_CMD_PAGE, 1, &chan, 1);
#else
@ -658,7 +658,7 @@ int get_serdes_volt(void)
}
/* Read the output voltage using PMBus command READ_VOUT */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(I2C_SVDD_MONITOR_ADDR,
PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
#else
@ -679,7 +679,7 @@ int set_serdes_volt(int svdd)
svdd & 0xFF, (svdd & 0xFF00) >> 8};
/* Write the desired voltage code to the SVDD regulator */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
#else
@ -720,7 +720,7 @@ int set_serdes_volt(int svdd)
printf("SVDD changing of RDB\n");
/* Read the BRDCFG54 via CLPD */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,
QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
#else
@ -740,7 +740,7 @@ int set_serdes_volt(int svdd)
brdcfg4 = brdcfg4 | 0x08;
/* Write to the BRDCFG4 */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,
QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
#else

14
board/freescale/ls2080aqds/eth.c
View File

@ -125,12 +125,12 @@ static void sgmii_configure_repeater(int serdes_port)
};
int *riser_phy_addr = &xqsgii_riser_phy_addr[0];
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@ -151,7 +151,7 @@ static void sgmii_configure_repeater(int serdes_port)
mii_bus = 1;
dpmac_id = dpmac + 9;
a = 0xb;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x76, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x76, 1, &udev);
@ -198,7 +198,7 @@ static void sgmii_configure_repeater(int serdes_port)
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_addr[dpmac],
reg_pair[k].addr,
1, reg_pair[k].val, 1);
@ -277,12 +277,12 @@ static void qsgmii_configure_repeater(int dpmac)
const char *dev = "LS2080A_QDS_MDIO0";
int ret = 0;
unsigned short value;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@ -347,7 +347,7 @@ static void qsgmii_configure_repeater(int dpmac)
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_phy_addr,
reg_pair[k].addr,
1, reg_pair[k].val, 1);

4
board/freescale/ls2080aqds/ls2080aqds.c
View File

@ -164,7 +164,7 @@ unsigned long get_board_ddr_clk(void)
int select_i2c_ch_pca9547(u8 ch)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
@ -238,7 +238,7 @@ int board_init(void)
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
rtc_enable_32khz_output(0, CONFIG_SYS_I2C_RTC_ADDR);
#else
rtc_enable_32khz_output();

2
board/freescale/ls2080ardb/ls2080ardb.c
View File

@ -167,7 +167,7 @@ int select_i2c_ch_pca9547(u8 ch)
{
int ret;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#else
struct udevice *dev;

2
board/freescale/lx2160a/lx2160a.c
View File

@ -83,7 +83,7 @@ int select_i2c_ch_pca9547(u8 ch)
{
int ret;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#else
struct udevice *dev;

8
board/freescale/p1010rdb/p1010rdb.c
View File

@ -141,7 +141,7 @@ int config_board_mux(int ctrl_type)
ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u8 tmp;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
#if defined(CONFIG_TARGET_P1010RDB_PA)
@ -377,7 +377,7 @@ int i2c_pca9557_read(int type)
u8 val;
int bus_num = I2C_PCA9557_BUS_NUM;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
@ -419,7 +419,7 @@ int checkboard(void)
printf("Board: %sRDB-PA, ", cpu->name);
#elif defined(CONFIG_TARGET_P1010RDB_PB)
printf("Board: %sRDB-PB, ", cpu->name);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
@ -462,7 +462,7 @@ int checkboard(void)
case 0xe:
puts("SDHC\n");
val = 0x60; /* set pca9557 pin input/output */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
dm_i2c_write(dev, 3, &val, 1);
#else
i2c_write(I2C_PCA9557_ADDR2, 3, 1, &val, 1);

2
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
View File

@ -173,7 +173,7 @@ int checkboard(void)
in_8(&cpld_data->pcba_rev) & 0x0F);
/* Initialize i2c early for rom_loc and flash bank information */
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;

2
board/freescale/t102xrdb/t102xrdb.c
View File

@ -259,7 +259,7 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
u8 tmp;
int bus_num = I2C_PCA6408_BUS_NUM;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;

2
board/freescale/t208xqds/t208xqds.c
View File

@ -83,7 +83,7 @@ int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, 1, &dev);

6
board/friendlyarm/nanopi2/onewire.c
View File

@ -35,7 +35,7 @@ static int bus_type = -1;
static int lcd_id = -1;
static unsigned short lcd_fwrev;
static int current_brightness = -1;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static struct udevice *i2c_dev;
#endif
@ -182,7 +182,7 @@ static int onewire_i2c_do_request(unsigned char req, unsigned char *buf)
tx[0] = req;
tx[1] = crc8_ow(req << 24, 8);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
if (dm_i2c_write(i2c_dev, 0, tx, 2))
return -EIO;
@ -214,7 +214,7 @@ static void onewire_i2c_init(void)
unsigned char buf[4];
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_chip_for_busnum(ONEWIRE_I2C_BUS,
ONEWIRE_I2C_ADDR, 0, &i2c_dev);
#else

2
board/keymile/common/ivm.c
View File

@ -333,7 +333,7 @@ static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset)
int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset)
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *eedev = NULL;
ret = i2c_get_chip_for_busnum(CONFIG_KM_IVM_BUS,

2
board/samsung/common/misc.c
View File

@ -117,7 +117,7 @@ void set_board_info(void)
#ifdef CONFIG_LCD_MENU
static int power_key_pressed(u32 reg)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
struct pmic *pmic;
u32 status;
u32 mask;

10
board/samsung/trats/trats.c
View File

@ -52,7 +52,7 @@ int exynos_init(void)
return 0;
}
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
static void trats_low_power_mode(void)
{
struct exynos4_clock *clk =
@ -114,7 +114,7 @@ static void trats_low_power_mode(void)
int exynos_power_init(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
int chrg, ret;
struct power_battery *pb;
struct pmic *p_fg, *p_chrg, *p_muic, *p_bat;
@ -293,7 +293,7 @@ int board_usb_init(int index, enum usb_init_type init)
int g_dnl_board_usb_cable_connected(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
struct pmic *muic = pmic_get("MAX8997_MUIC");
if (!muic)
return 0;
@ -415,7 +415,7 @@ void exynos_reset_lcd(void)
int lcd_power(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
int ret = 0;
struct pmic *p = pmic_get("MAX8997_PMIC");
if (!p)
@ -439,7 +439,7 @@ int lcd_power(void)
int mipi_power(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
int ret = 0;
struct pmic *p = pmic_get("MAX8997_PMIC");
if (!p)

10
board/samsung/trats2/trats2.c
View File

@ -129,7 +129,7 @@ int exynos_init(void)
int exynos_power_init(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
int chrg;
struct power_battery *pb;
struct pmic *p_chrg, *p_muic, *p_fg, *p_bat;
@ -192,7 +192,7 @@ int exynos_power_init(void)
#ifdef CONFIG_USB_GADGET
static int s5pc210_phy_control(int on)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
int ret = 0;
unsigned int val;
struct pmic *p, *p_pmic, *p_muic;
@ -269,7 +269,7 @@ int board_usb_init(int index, enum usb_init_type init)
int g_dnl_board_usb_cable_connected(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
struct pmic *muic = pmic_get("MAX77693_MUIC");
if (!muic)
return 0;
@ -288,7 +288,7 @@ int g_dnl_board_usb_cable_connected(void)
#ifdef CONFIG_LCD
int mipi_power(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
struct pmic *p = pmic_get("MAX77686_PMIC");
/* LDO8 VMIPI_1.0V_AP */
@ -302,7 +302,7 @@ int mipi_power(void)
void exynos_lcd_power_on(void)
{
#ifndef CONFIG_DM_I2C /* TODO(maintainer): Convert to driver model */
#if !CONFIG_IS_ENABLED(DM_I2C) /* TODO(maintainer): Convert to driver model */
struct pmic *p = pmic_get("MAX77686_PMIC");
/* LCD_2.2V_EN: GPC0[1] */

2
board/sunxi/board.c
View File

@ -293,7 +293,7 @@ int board_init(void)
}
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
/*
* Temporary workaround for enabling I2C clocks until proper sunxi DM
* clk, reset and pinctrl drivers land.

8
board/ti/am335x/board.c
View File

@ -77,7 +77,7 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
void do_board_detect(void)
{
enable_i2c0_pin_mux();
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS,
@ -336,7 +336,7 @@ static void scale_vcores_bone(int freq)
if (board_is_bone() && !strncmp(board_ti_get_rev(), "00A1", 4))
return;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_probe(TPS65217_CHIP_PM))
return;
#else
@ -435,7 +435,7 @@ void scale_vcores_generic(int freq)
* 1.10V. For MPU voltage we need to switch based on
* the frequency we are running at.
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_probe(TPS65910_CTRL_I2C_ADDR))
return;
#else
@ -469,7 +469,7 @@ void gpi2c_init(void)
if (first_time) {
enable_i2c0_pin_mux();
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif

2
board/ti/am335x/mux.c
View File

@ -333,7 +333,7 @@ static unsigned short detect_daughter_board_profile(void)
{
unsigned short val;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_probe(I2C_CPLD_ADDR))
return PROFILE_NONE;

12
board/ti/am43xx/board.c
View File

@ -393,7 +393,7 @@ void scale_vcores_generic(u32 m)
{
int mpu_vdd, ddr_volt;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_probe(TPS65218_CHIP_PM))
return;
#else
@ -451,7 +451,7 @@ void scale_vcores_idk(u32 m)
{
int mpu_vdd;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_probe(TPS62362_I2C_ADDR))
return;
#else
@ -492,7 +492,7 @@ void gpi2c_init(void)
if (first_time) {
enable_i2c0_pin_mux();
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
@ -632,14 +632,14 @@ void sdram_init(void)
int power_init_board(void)
{
int rc;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
struct pmic *p = NULL;
#endif
if (board_is_idk()) {
rc = power_tps62362_init(0);
if (rc)
goto done;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
p = pmic_get("TPS62362");
if (!p || pmic_probe(p))
goto done;
@ -649,7 +649,7 @@ int power_init_board(void)
rc = power_tps65218_init(0);
if (rc)
goto done;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
p = pmic_get("TPS65218_PMIC");
if (!p || pmic_probe(p))
goto done;

4
board/ti/common/board_detect.c
View File

@ -22,7 +22,7 @@
#include "board_detect.h"
#if !defined(CONFIG_DM_I2C)
#if !CONFIG_IS_ENABLED(DM_I2C)
/**
* ti_i2c_eeprom_init - Initialize an i2c bus and probe for a device
* @i2c_bus: i2c bus number to initialize
@ -89,7 +89,7 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
u32 hdr_read;
int rc;
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
struct udevice *bus;

2
board/ti/ks2_evm/board_k2g.c
View File

@ -259,7 +259,7 @@ int board_fit_config_name_match(const char *name)
#if defined(CONFIG_DTB_RESELECT)
static int k2g_alt_board_detect(void)
{
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
int rc;
rc = i2c_set_bus_num(1);

4
board/wandboard/wandboard.c
View File

@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define REV_DETECTION IMX_GPIO_NR(2, 28)
/* Speed defined in Kconfig is only applicable when not using DM_I2C. */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
#define I2C1_SPEED_NON_DM 0
#define I2C2_SPEED_NON_DM 0
#else
@ -259,7 +259,7 @@ static void do_enable_hdmi(struct display_info_t const *dev)
static int detect_i2c(struct display_info_t const *dev)
{
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *bus, *udev;
int rc;

6
cmd/eeprom.c
View File

@ -61,7 +61,7 @@
#endif
#endif
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
static int eeprom_i2c_bus;
#endif
@ -73,7 +73,7 @@ __weak int eeprom_write_enable(unsigned dev_addr, int state)
void eeprom_init(int bus)
{
/* I2C EEPROM */
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
eeprom_i2c_bus = bus;
#elif defined(CONFIG_SYS_I2C)
if (bus >= 0)
@ -132,7 +132,7 @@ static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen,
{
int ret = 0;
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(eeprom_i2c_bus, addr[0],

98
cmd/i2c.c
View File

@ -124,13 +124,13 @@ static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
* For legacy code, this is not stored, so we need to use a suitable
* default.
*/
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
#define DEFAULT_ADDR_LEN (-1)
#else
#define DEFAULT_ADDR_LEN 1
#endif
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static struct udevice *i2c_cur_bus;
static int cmd_i2c_set_bus_num(unsigned int busnum)
@ -209,7 +209,7 @@ void i2c_init_board(void)
*
* Returns I2C bus speed in Hz.
*/
#if !defined(CONFIG_SYS_I2C) && !defined(CONFIG_DM_I2C)
#if !defined(CONFIG_SYS_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
/*
* TODO: Implement architecture-specific get/set functions
* Should go away, if we switched completely to new multibus support
@ -298,7 +298,7 @@ static int do_i2c_read(struct cmd_tbl *cmdtp, int flag, int argc,
int alen;
u_char *memaddr;
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -329,7 +329,7 @@ static int do_i2c_read(struct cmd_tbl *cmdtp, int flag, int argc,
*/
memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret && alen != -1)
ret = i2c_set_chip_offset_len(dev, alen);
@ -352,7 +352,7 @@ static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
int alen;
u_char *memaddr;
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
struct dm_i2c_chip *i2c_chip;
#endif
@ -384,7 +384,7 @@ static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
*/
length = simple_strtoul(argv[4], NULL, 16);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret && alen != -1)
ret = i2c_set_chip_offset_len(dev, alen);
@ -402,7 +402,7 @@ static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
* a page boundary. No write delay upon completion, take this
* into account if linking commands.
*/
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS;
ret = dm_i2c_write(dev, devaddr, memaddr, length);
#else
@ -416,7 +416,7 @@ static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
* write transactions of one byte each
*/
while (length-- > 0) {
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS;
ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
#else
@ -435,7 +435,7 @@ static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
return 0;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_flags(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@ -520,7 +520,7 @@ static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
int alen;
int j, nbytes, linebytes;
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -562,7 +562,7 @@ static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
length = simple_strtoul(argv[3], NULL, 16);
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret && alen != -1)
ret = i2c_set_chip_offset_len(dev, alen);
@ -583,7 +583,7 @@ static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, addr, linebuf, linebytes);
#else
ret = i2c_read(chip, addr, alen, linebuf, linebytes);
@ -641,7 +641,7 @@ static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
uchar byte;
int count;
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -661,7 +661,7 @@ static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
if (alen > 3)
return CMD_RET_USAGE;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret && alen != -1)
ret = i2c_set_chip_offset_len(dev, alen);
@ -682,7 +682,7 @@ static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
count = 1;
while (count-- > 0) {
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_write(dev, addr++, &byte, 1);
#else
ret = i2c_write(chip, addr++, alen, &byte, 1);
@ -730,7 +730,7 @@ static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
ulong crc;
ulong err;
int ret = 0;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -750,7 +750,7 @@ static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
if (alen > 3)
return CMD_RET_USAGE;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret && alen != -1)
ret = i2c_set_chip_offset_len(dev, alen);
@ -770,7 +770,7 @@ static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
crc = 0;
err = 0;
while (count-- > 0) {
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, addr, &byte, 1);
#else
ret = i2c_read(chip, addr, alen, &byte, 1);
@ -814,7 +814,7 @@ static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
int size = 1;
int nbytes;
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -851,7 +851,7 @@ static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
return CMD_RET_USAGE;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret && alen != -1)
ret = i2c_set_chip_offset_len(dev, alen);
@ -865,7 +865,7 @@ static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
*/
do {
printf("%08lx:", addr);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, addr, (uchar *)&data, size);
#else
ret = i2c_read(chip, addr, alen, (uchar *)&data, size);
@ -912,7 +912,7 @@ static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
* good enough to not time out
*/
bootretry_reset_cmd_timeout();
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_write(dev, addr, (uchar *)&data,
size);
#else
@ -964,7 +964,7 @@ static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc,
unsigned int bus = GET_BUS_NUM;
#endif /* NOPROBES */
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *bus, *dev;
if (i2c_get_cur_bus(&bus))
@ -990,7 +990,7 @@ static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc,
if (skip)
continue;
#endif
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_probe(bus, j, 0, &dev);
#else
ret = i2c_probe(j);
@ -1039,7 +1039,7 @@ static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
u_char bytes[16];
int delay;
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -1058,7 +1058,7 @@ static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
if (alen > 3)
return CMD_RET_USAGE;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret && alen != -1)
ret = i2c_set_chip_offset_len(dev, alen);
@ -1084,7 +1084,7 @@ static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
* Run the loop...
*/
while (1) {
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, addr, bytes, length);
#else
ret = i2c_read(chip, addr, alen, bytes, length);
@ -1165,7 +1165,7 @@ static int do_sdram(struct cmd_tbl *cmdtp, int flag, int argc,
u_char data[128];
u_char cksum;
int j, ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -1221,7 +1221,7 @@ static int do_sdram(struct cmd_tbl *cmdtp, int flag, int argc,
*/
chip = simple_strtoul (argv[1], NULL, 16);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret)
ret = dm_i2c_read(dev, 0, data, sizeof(data));
@ -1664,7 +1664,7 @@ int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
uint chip;
struct edid1_info edid;
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
@ -1674,7 +1674,7 @@ int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
}
chip = simple_strtoul(argv[1], NULL, 16);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_cur_bus_chip(chip, &dev);
if (!ret)
ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid));
@ -1695,7 +1695,7 @@ int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
}
#endif /* CONFIG_I2C_EDID */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static void show_bus(struct udevice *bus)
{
struct udevice *dev;
@ -1725,13 +1725,13 @@ static void show_bus(struct udevice *bus)
*
* Returns zero always.
*/
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
if (argc == 1) {
/* show all busses */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *bus;
struct uclass *uc;
int ret;
@ -1766,7 +1766,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
/* show specific bus */
i = simple_strtoul(argv[1], NULL, 10);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *bus;
int ret;
@ -1812,7 +1812,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
* on error.
*/
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
defined(CONFIG_DM_I2C)
CONFIG_IS_ENABLED(DM_I2C)
static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@ -1821,7 +1821,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
if (argc == 1) {
/* querying current setting */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *bus;
if (!i2c_get_cur_bus(&bus))
@ -1841,7 +1841,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
}
#endif
printf("Setting bus to %d\n", bus_no);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = cmd_i2c_set_bus_num(bus_no);
#else
ret = i2c_set_bus_num(bus_no);
@ -1869,14 +1869,14 @@ static int do_i2c_bus_speed(struct cmd_tbl *cmdtp, int flag, int argc,
{
int speed, ret=0;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *bus;
if (i2c_get_cur_bus(&bus))
return 1;
#endif
if (argc == 1) {
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
speed = dm_i2c_get_bus_speed(bus);
#else
speed = i2c_get_bus_speed();
@ -1886,7 +1886,7 @@ static int do_i2c_bus_speed(struct cmd_tbl *cmdtp, int flag, int argc,
} else {
speed = simple_strtoul(argv[1], NULL, 10);
printf("Setting bus speed to %d Hz\n", speed);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_set_bus_speed(bus, speed);
#else
ret = i2c_set_bus_speed(speed);
@ -1942,7 +1942,7 @@ static int do_i2c_nm(struct cmd_tbl *cmdtp, int flag, int argc,
static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *bus;
if (i2c_get_cur_bus(&bus))
@ -1960,12 +1960,12 @@ static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
}
static struct cmd_tbl cmd_i2c_sub[] = {
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
#endif
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
#if defined(CONFIG_SYS_I2C) || \
defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C)
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
#endif /* CONFIG_I2C_MULTI_BUS */
#if defined(CONFIG_I2C_EDID)
@ -1979,7 +1979,7 @@ static struct cmd_tbl cmd_i2c_sub[] = {
U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""),
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""),
U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""),
#endif
@ -2036,13 +2036,13 @@ static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
/***************************************************/
#ifdef CONFIG_SYS_LONGHELP
static char i2c_help_text[] =
#if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
"i2c " /* That's the prefix for the crc32 command below. */
#endif
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
#if defined(CONFIG_SYS_I2C) || \
defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C)
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
"i2c dev [dev] - show or set current I2C bus\n"
#endif /* CONFIG_I2C_MULTI_BUS */
#if defined(CONFIG_I2C_EDID)
@ -2057,7 +2057,7 @@ static char i2c_help_text[] =
"i2c read chip address[.0, .1, .2] length memaddress - read to memory\n"
"i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n"
" to I2C; the -s option selects bulk write in a single transaction\n"
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
"i2c flags chip [flags] - set or get chip flags\n"
"i2c olen chip [offset_length] - set or get chip offset length\n"
#endif

2
doc/driver-model/i2c-howto.rst
View File

@ -25,7 +25,7 @@ forward to convert these, at some point there may come a patch to remove them!
Here is a suggested approach for converting your I2C driver over to driver
model. Please feel free to update this file with your ideas and suggestions.
- #ifdef out all your own I2C driver code (#ifndef CONFIG_DM_I2C)
- #ifdef out all your own I2C driver code (#if !CONFIG_IS_ENABLED(DM_I2C))
- Define CONFIG_DM_I2C for your board, vendor or architecture
- If the board does not already use driver model, you need CONFIG_DM also
- Your board should then build, but will not work fully since there will be

8
drivers/ddr/fsl/main.c
View File

@ -86,7 +86,7 @@ u8 spd_i2c_addr[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR] = {
#endif
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
#define DEV_TYPE struct udevice
#else
/* Local udevice */
@ -106,7 +106,7 @@ static int ddr_i2c_read(DEV_TYPE *dev, unsigned int addr,
{
int ret;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, 0, buf, len);
#else
ret = i2c_read(dev->chip, addr, alen, buf, len);
@ -120,7 +120,7 @@ static int ddr_i2c_dummy_write(unsigned int chip_addr)
{
uint8_t buf = 0;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
@ -146,7 +146,7 @@ static void __get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
int ret;
DEV_TYPE *dev;
#if defined(CONFIG_DM_I2C)
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_chip_for_busnum(CONFIG_SYS_SPD_BUS_NUM, i2c_address,
1, &dev);
if (ret) {

4
drivers/i2c/davinci_i2c.c
View File

@ -21,7 +21,7 @@
#include <linux/delay.h>
#include "davinci_i2c.h"
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
/* Information about i2c controller */
struct i2c_bus {
int id;
@ -340,7 +340,7 @@ static int _davinci_i2c_probe_chip(struct i2c_regs *i2c_base, uint8_t chip)
return rc;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static struct i2c_regs *davinci_get_base(struct i2c_adapter *adap)
{
switch (adap->hwadapnr) {

4
drivers/i2c/designware_i2c.c
View File

@ -598,7 +598,7 @@ static int __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
writel(IC_RX_TL, &i2c_base->ic_rx_tl);
writel(IC_TX_TL, &i2c_base->ic_tx_tl);
writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
_dw_i2c_set_bus_speed(NULL, i2c_base, speed, IC_CLK);
writel(slaveaddr, &i2c_base->ic_sar);
#endif
@ -611,7 +611,7 @@ static int __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
return 0;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/*
* The legacy I2C functions. These need to get removed once
* all users of this driver are converted to DM.

6
drivers/i2c/fsl_i2c.c
View File

@ -40,7 +40,7 @@
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static const struct fsl_i2c_base *i2c_base[4] = {
(struct fsl_i2c_base *)(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_I2C_OFFSET),
#ifdef CONFIG_SYS_FSL_I2C2_OFFSET
@ -203,7 +203,7 @@ static uint set_i2c_bus_speed(const struct fsl_i2c_base *base,
return speed;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static uint get_i2c_clock(int bus)
{
if (bus)
@ -497,7 +497,7 @@ static uint __i2c_set_bus_speed(const struct fsl_i2c_base *base,
return 0;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static void fsl_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
{
__i2c_init(i2c_base[adap->hwadapnr], speed, slaveadd,

42
drivers/i2c/ihs_i2c.c
View File

@ -6,7 +6,7 @@
#include <common.h>
#include <i2c.h>
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
#include <dm.h>
#include <regmap.h>
#else
@ -18,7 +18,7 @@
#include <linux/bitops.h>
#include <linux/delay.h>
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct ihs_i2c_priv {
uint speed;
struct regmap *map;
@ -91,7 +91,7 @@ enum {
I2COP_READ = 1,
};
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static int wait_for_int(struct udevice *dev, int read)
#else
static int wait_for_int(bool read)
@ -99,11 +99,11 @@ static int wait_for_int(bool read)
{
u16 val;
uint ctr = 0;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct ihs_i2c_priv *priv = dev_get_priv(dev);
#endif
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_get(priv->map, interrupt_status, &val);
#else
I2C_GET_REG(interrupt_status, &val);
@ -116,7 +116,7 @@ static int wait_for_int(bool read)
debug("%s: timed out\n", __func__);
return -ETIMEDOUT;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_get(priv->map, interrupt_status, &val);
#else
I2C_GET_REG(interrupt_status, &val);
@ -126,7 +126,7 @@ static int wait_for_int(bool read)
return (val & I2CINT_ERROR_EV) ? -EIO : 0;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_transfer(struct udevice *dev, uchar chip,
uchar *buffer, int len, int read, bool is_last)
#else
@ -137,13 +137,13 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
u16 val;
u16 data;
int res;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct ihs_i2c_priv *priv = dev_get_priv(dev);
#endif
/* Clear interrupt status */
data = I2CINT_ERROR_EV | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_set(priv->map, interrupt_status, data);
ihs_i2c_get(priv->map, interrupt_status, &val);
#else
@ -157,7 +157,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
if (len > 1)
val |= buffer[1] << 8;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_set(priv->map, write_mailbox_ext, val);
#else
I2C_SET_REG(write_mailbox_ext, val);
@ -170,13 +170,13 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
| ((len > 1) ? I2CMB_2BYTE : 0)
| (is_last ? 0 : I2CMB_HOLD_BUS);
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_set(priv->map, write_mailbox, data);
#else
I2C_SET_REG(write_mailbox, data);
#endif
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
res = wait_for_int(dev, read);
#else
res = wait_for_int(read);
@ -190,7 +190,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
/* If we want to read, get the bytes from the mailbox */
if (read) {
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ihs_i2c_get(priv->map, read_mailbox_ext, &val);
#else
I2C_GET_REG(read_mailbox_ext, &val);
@ -203,7 +203,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
return 0;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_send_buffer(struct udevice *dev, uchar chip, u8 *data, int len, bool hold_bus, int read)
#else
static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus,
@ -216,7 +216,7 @@ static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus,
int transfer = min(len, 2);
bool is_last = len <= transfer;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
res = ihs_i2c_transfer(dev, chip, data, transfer, read,
hold_bus ? false : is_last);
#else
@ -233,21 +233,21 @@ static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus,
return 0;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int alen,
bool hold_bus)
#else
static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
#endif
{
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
return ihs_i2c_send_buffer(dev, chip, addr, alen, hold_bus, I2COP_WRITE);
#else
return ihs_i2c_send_buffer(chip, addr, alen, hold_bus, I2COP_WRITE);
#endif
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
static int ihs_i2c_access(struct udevice *dev, uchar chip, u8 *addr,
int alen, uchar *buffer, int len, int read)
#else
@ -261,7 +261,7 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, u8 *addr,
if (len <= 0)
return -EINVAL;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
res = ihs_i2c_address(dev, chip, addr, alen, len);
#else
res = ihs_i2c_address(chip, addr, alen, len);
@ -269,14 +269,14 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, u8 *addr,
if (res)
return res;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
return ihs_i2c_send_buffer(dev, chip, buffer, len, false, read);
#else
return ihs_i2c_send_buffer(chip, buffer, len, false, read);
#endif
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int ihs_i2c_probe(struct udevice *bus)
{

4
drivers/i2c/lpc32xx_i2c.c
View File

@ -42,7 +42,7 @@
#define LPC32XX_I2C_STAT_NAI 0x00000004
#define LPC32XX_I2C_STAT_TDI 0x00000001
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static struct lpc32xx_i2c_base *lpc32xx_i2c[] = {
(struct lpc32xx_i2c_base *)I2C1_BASE,
(struct lpc32xx_i2c_base *)I2C2_BASE,
@ -224,7 +224,7 @@ static int __i2c_write(struct lpc32xx_i2c_base *base, u8 dev, uint addr,
return 0;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static void lpc32xx_i2c_init(struct i2c_adapter *adap,
int requested_speed, int slaveadd)
{

2
drivers/i2c/mv_i2c.c
View File

@ -370,7 +370,7 @@ static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
return 0;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static struct mv_i2c *base_glob;

16
drivers/i2c/mvtwsi.c
View File

@ -16,7 +16,7 @@
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/compat.h>
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
#include <dm.h>
#endif
@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
* settings
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#if defined(CONFIG_ARCH_ORION5X)
#include <asm/arch/orion5x.h>
#elif (defined(CONFIG_ARCH_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
@ -43,7 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
* On SUNXI, we get CONFIG_SYS_TCLK from this include, so we want to
* always have it.
*/
#if defined(CONFIG_DM_I2C) && defined(CONFIG_ARCH_SUNXI)
#if CONFIG_IS_ENABLED(DM_I2C) && defined(CONFIG_ARCH_SUNXI)
#include <asm/arch/i2c.h>
#endif
@ -83,7 +83,7 @@ struct mvtwsi_registers {
#endif
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct mvtwsi_i2c_dev {
/* TWSI Register base for the device */
struct mvtwsi_registers *base;
@ -184,7 +184,7 @@ inline uint calc_tick(uint speed)
return (1000000000u / speed) + 100;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/*
* twsi_get_base() - Get controller register base for specified adapter
@ -481,7 +481,7 @@ static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,
writel(baud, &twsi->baudrate);
/* Wait for controller for one tick */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ndelay(calc_tick(highest_speed));
#else
ndelay(10000);
@ -516,7 +516,7 @@ static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
writel(slaveadd, &twsi->slave_address);
writel(0, &twsi->xtnd_slave_addr);
/* Assert STOP, but don't care for the result */
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
(void) twsi_stop(twsi, calc_tick(*actual_speed));
#else
(void) twsi_stop(twsi, 10000);
@ -683,7 +683,7 @@ static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,
return status != 0 ? status : stop_status;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
static void twsi_i2c_init(struct i2c_adapter *adap, int speed,
int slaveadd)
{

4
drivers/i2c/mxc_i2c.c
View File

@ -394,7 +394,7 @@ static struct mxc_i2c_bus mxc_i2c_buses[] = {
#endif
};
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus)
{
if (i2c_bus && i2c_bus->idle_bus_fn)
@ -646,7 +646,7 @@ int __enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
int enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
__attribute__((weak, alias("__enable_i2c_clk")));
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/*
* Read data from I2C device
*

2
drivers/i2c/omap24xx_i2c.c
View File

@ -836,7 +836,7 @@ wr_exit:
return i2c_error;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
/*
* The legacy I2C functions. These need to get removed once
* all users of this driver are converted to DM.

2
drivers/power/palmas.c
View File

@ -176,7 +176,7 @@ int twl603x_enable_bb_charge(u8 bb_fields)
return err;
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int palmas_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
{
struct udevice *dev;

6
drivers/power/pmic/pmic_tps62362.c
View File

@ -10,7 +10,7 @@
#include <power/pmic.h>
#include <power/tps62362.h>
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *tps62362_dev __attribute__((section(".data"))) = NULL;
#endif
@ -26,7 +26,7 @@ int tps62362_voltage_update(unsigned char reg, unsigned char volt_sel)
if (reg > TPS62362_NUM_REGS)
return 1;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
return i2c_write(TPS62362_I2C_ADDR, reg, 1, &volt_sel, 1);
#else
if (!tps62362_dev)
@ -35,7 +35,7 @@ int tps62362_voltage_update(unsigned char reg, unsigned char volt_sel)
#endif
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
int power_tps62362_init(unsigned char bus)
{
static const char name[] = "TPS62362";

14
drivers/power/pmic/pmic_tps65217.c
View File

@ -18,7 +18,7 @@ struct udevice *tps65217_dev __attribute__((section(".data"))) = NULL;
*/
int tps65217_reg_read(uchar src_reg, uchar *src_val)
{
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
return i2c_read(TPS65217_CHIP_PM, src_reg, 1, src_val, 1);
#else
return dm_i2c_read(tps65217_dev, src_reg, src_val, 1);
@ -52,7 +52,7 @@ int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
* mask
*/
if (mask != TPS65217_MASK_ALL_BITS) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(TPS65217_CHIP_PM, dest_reg, 1, &read_val, 1);
#else
ret = dm_i2c_read(tps65217_dev, dest_reg, &read_val, 1);
@ -67,7 +67,7 @@ int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
if (prot_level > 0) {
xor_reg = dest_reg ^ TPS65217_PASSWORD_UNLOCK;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1,
&xor_reg, 1);
#else
@ -77,7 +77,7 @@ int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
if (ret)
return ret;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1);
#else
ret = dm_i2c_write(tps65217_dev, dest_reg, &dest_val, 1);
@ -86,7 +86,7 @@ int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
return ret;
if (prot_level == TPS65217_PROT_LEVEL_2) {
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(TPS65217_CHIP_PM, TPS65217_PASSWORD, 1,
&xor_reg, 1);
#else
@ -96,7 +96,7 @@ int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
if (ret)
return ret;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(TPS65217_CHIP_PM, dest_reg, 1, &dest_val, 1);
#else
ret = dm_i2c_write(tps65217_dev, dest_reg, &dest_val, 1);
@ -137,7 +137,7 @@ int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
int power_tps65217_init(unsigned char bus)
{
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev = NULL;
int rc;

4
drivers/power/pmic/pmic_tps65218.c
View File

@ -10,7 +10,7 @@
#include <power/pmic.h>
#include <power/tps65218.h>
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
int tps65218_reg_read(uchar dest_reg, uchar *dest_val)
{
uchar read_val;
@ -225,7 +225,7 @@ int tps65218_lock_fseal(void)
return 0;
}
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
int power_tps65218_init(unsigned char bus)
{
static const char name[] = "TPS65218_PMIC";

6
drivers/power/pmic/pmic_tps65910.c
View File

@ -12,7 +12,7 @@ struct udevice *tps65910_dev __attribute__((section(".data"))) = NULL;
static inline int tps65910_read_reg(int addr, uchar *buf)
{
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
return i2c_read(TPS65910_CTRL_I2C_ADDR, addr, 1, buf, 1);
#else
int rc;
@ -27,7 +27,7 @@ static inline int tps65910_read_reg(int addr, uchar *buf)
static inline int tps65910_write_reg(int addr, uchar *buf)
{
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
return i2c_write(TPS65910_CTRL_I2C_ADDR, addr, 1, buf, 1);
#else
return dm_i2c_reg_write(tps65910_dev, addr, *buf);
@ -36,7 +36,7 @@ static inline int tps65910_write_reg(int addr, uchar *buf)
int power_tps65910_init(unsigned char bus)
{
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev = NULL;
int rc;

2
drivers/power/twl4030.c
View File

@ -182,7 +182,7 @@ int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
}
#endif
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
{
struct udevice *dev;

2
drivers/power/twl6030.c
View File

@ -270,7 +270,7 @@ void twl6030_usb_device_settings()
twl6030_i2c_write_u8(TWL6030_CHIP_PM, TWL6030_MISC2, value);
}
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
int twl6030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
{
struct udevice *dev;

6
drivers/tpm/tpm_atmel_twi.c
View File

@ -81,7 +81,7 @@ static int tpm_atmel_twi_xfer(struct udevice *dev,
print_buffer(0, (void *)sendbuf, 1, send_size, 0);
#endif
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
res = i2c_write(0x29, 0, 0, (uchar *)sendbuf, send_size);
#else
res = dm_i2c_write(dev, 0, sendbuf, send_size);
@ -92,7 +92,7 @@ static int tpm_atmel_twi_xfer(struct udevice *dev,
}
start = get_timer(0);
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
while ((res = i2c_read(0x29, 0, 0, recvbuf, 10)))
#else
while ((res = dm_i2c_read(dev, 0, recvbuf, 10)))
@ -116,7 +116,7 @@ static int tpm_atmel_twi_xfer(struct udevice *dev,
return -1;
} else {
*recv_len = hdr_recv_len;
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
res = i2c_read(0x29, 0, 0, recvbuf, *recv_len);
#else
res = dm_i2c_read(dev, 0, recvbuf, *recv_len);

8
drivers/usb/host/ohci-lpc32xx.c
View File

@ -86,7 +86,7 @@ static struct clk_pm_regs *clk_pwr = (struct clk_pm_regs *)CLK_PM_BASE;
static int isp1301_set_value(struct udevice *dev, int reg, u8 value)
{
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
return i2c_write(ISP1301_I2C_ADDR, reg, 1, &value, 1);
#else
return dm_i2c_write(dev, reg, &value, 1);
@ -95,7 +95,7 @@ static int isp1301_set_value(struct udevice *dev, int reg, u8 value)
static void isp1301_configure(struct udevice *dev)
{
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_set_bus_num(I2C_2);
#endif
@ -160,7 +160,7 @@ int usb_cpu_init(void)
u32 ret;
struct udevice *dev = NULL;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev);
if (ret) {
debug("%s: No bus %d\n", __func__, I2C_2);
@ -216,7 +216,7 @@ int usb_cpu_stop(void)
struct udevice *dev = NULL;
int ret = 0;
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_get_chip_for_busnum(I2C_2, ISP1301_I2C_ADDR, 1, &dev);
if (ret) {
debug("%s: No bus %d\n", __func__, I2C_2);

2
include/_exports.h
View File

@ -40,7 +40,7 @@
EXPORT_FUNC(simple_strtol, long, simple_strtol,
const char *, char **, unsigned int)
EXPORT_FUNC(strcmp, int, strcmp, const char *cs, const char *ct)
#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C)
#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
EXPORT_FUNC(i2c_write, int, i2c_write, uchar, uint, int , uchar * , int)
EXPORT_FUNC(i2c_read, int, i2c_read, uchar, uint, int , uchar * , int)
#else

2
include/config_fallbacks.h
View File

@ -46,7 +46,7 @@
#define CONFIG_SYS_MAXARGS 16
#endif
#ifdef CONFIG_DM_I2C
#if CONFIG_IS_ENABLED(DM_I2C)
# ifdef CONFIG_SYS_I2C
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# endif

2
include/configs/MPC8548CDS.h
View File

@ -296,7 +296,7 @@ extern unsigned long get_clock_freq(void);
/*
* I2C
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

2
include/configs/P1010RDB.h
View File

@ -525,7 +525,7 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

2
include/configs/P2041RDB.h
View File

@ -259,7 +259,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

2
include/configs/T102xRDB.h
View File

@ -422,7 +422,7 @@ unsigned long get_board_ddr_clk(void);
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

2
include/configs/T104xRDB.h
View File

@ -452,7 +452,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SPEED 400000

2
include/configs/T208xQDS.h
View File

@ -377,7 +377,7 @@ unsigned long get_board_ddr_clk(void);
/*
* I2C
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F

2
include/configs/T208xRDB.h
View File

@ -322,7 +322,7 @@ unsigned long get_board_ddr_clk(void);
/*
* I2C
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F

2
include/configs/T4240RDB.h
View File

@ -154,7 +154,7 @@
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000

2
include/configs/am43xx_evm.h
View File

@ -26,7 +26,7 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* Power */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#endif

2
include/configs/corenet_ds.h
View File

@ -269,7 +269,7 @@
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

2
include/configs/ls1012a_common.h
View File

@ -55,7 +55,7 @@
CONFIG_SYS_SCSI_MAX_LUN)
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM

2
include/configs/ls1021aiot.h
View File

@ -98,7 +98,7 @@
* I2C
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM

2
include/configs/ls1021aqds.h
View File

@ -330,7 +330,7 @@ unsigned long get_board_ddr_clk(void);
/*
* I2C
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM

2
include/configs/ls1021atsn.h
View File

@ -104,7 +104,7 @@
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM

2
include/configs/ls1021atwr.h
View File

@ -208,7 +208,7 @@
/*
* I2C
*/
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM

2
include/configs/ls1028a_common.h
View File

@ -44,7 +44,7 @@
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#endif

2
include/configs/ls1043a_common.h
View File

@ -149,7 +149,7 @@
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

2
include/configs/ls1046a_common.h
View File

@ -133,7 +133,7 @@
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */

2
include/configs/ls1088a_common.h
View File

@ -61,7 +61,7 @@
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#endif

2
include/configs/ls1088aqds.h
View File

@ -26,7 +26,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_DDR_CLK_FREQ 100000000
#else
#define CONFIG_QIXIS_I2C_ACCESS
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C_EARLY_INIT
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()

2
include/configs/ls2080a_common.h
View File

@ -74,7 +74,7 @@
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#endif

2
include/configs/ls2080aqds.h
View File

@ -16,7 +16,7 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_FSL_QSPI
#define CONFIG_QIXIS_I2C_ACCESS
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C_EARLY_INIT
#endif
#define CONFIG_SYS_I2C_IFDR_DIV 0x7e

2
include/configs/ls2080ardb.h
View File

@ -13,7 +13,7 @@
#ifdef CONFIG_TARGET_LS2081ARDB
#define CONFIG_QIXIS_I2C_ACCESS
#endif
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C_EARLY_INIT
#endif
#endif

2
include/configs/p1_p2_rdb_pc.h
View File

@ -463,7 +463,7 @@
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
/* I2C */
#ifndef CONFIG_DM_I2C
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_FSL_I2C_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F

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