arm: socfpga: Use DM watchdog timer
All SoCFPGA platforms (except Cyclone V) are now switching to CONFIG_WDT (driver model for watchdog timer drivers) from CONFIG_HW_WATCHDOG. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
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@ -40,3 +40,7 @@
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&qspi {
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status = "okay";
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};
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&watchdog0 {
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u-boot,dm-pre-reloc;
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};
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@ -15,3 +15,7 @@
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&uart1 {
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u-boot,dm-pre-reloc;
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};
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&watchdog1 {
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u-boot,dm-pre-reloc;
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};
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@ -386,7 +386,6 @@
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reg = <0xffd00200 0x100>;
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interrupts = <0 117 4>;
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resets = <&rst WATCHDOG0_RESET>;
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u-boot,dm-pre-reloc;
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status = "disabled";
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};
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@ -33,5 +33,6 @@
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};
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&watchdog0 {
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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@ -51,11 +51,11 @@ void board_init_f(ulong dummy)
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socfpga_get_managers_addr();
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#ifdef CONFIG_HW_WATCHDOG
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/* Ensure watchdog is paused when debugging is happening */
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writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
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socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
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#ifdef CONFIG_HW_WATCHDOG
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/* Enable watchdog before initializing the HW */
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socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
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socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
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@ -53,11 +53,11 @@ void board_init_f(ulong dummy)
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socfpga_get_managers_addr();
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#ifdef CONFIG_HW_WATCHDOG
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/* Ensure watchdog is paused when debugging is happening */
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writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
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socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
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#ifdef CONFIG_HW_WATCHDOG
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/* Enable watchdog before initializing the HW */
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socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
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socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
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@ -60,5 +60,7 @@ CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_DWC2=y
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CONFIG_USB_STORAGE=y
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CONFIG_DESIGNWARE_WATCHDOG=y
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CONFIG_WDT=y
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# CONFIG_SPL_USE_TINY_PRINTF is not set
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CONFIG_PANIC_HANG=y
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