ARM: da850-evm: Unify config options with Kconfig
There are two options that are currently whitelisted, but they are redundant, because there are not necessary since Kconfig options exist to basically state the same thing. CONFIG_DIRECT_NOR_BOOT and CONFIG_USE_NOR are both set together and only used by the da850 when booting from NOR, however the only time CONFIG_MTD_NOR_FLASH is configured is when booting from NOR. Since NOR doesn't need SPL, the options for SPL can be moved to a check for building SPL instead of checking for NOR. This patch removes the checks for these two config options and unifies the checks around the Kconfig option of CONFIG_MTD_NOR_FLASH. Since this board is the only board that uses these two config options, they can be removed from the whitelist table. Signed-off-by: Adam Ford <aford173@gmail.com>
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@ -205,7 +205,7 @@ int misc_init_r(void)
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}
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static const struct pinmux_config gpio_pins[] = {
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#ifdef CONFIG_USE_NOR
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#ifdef CONFIG_MTD_NOR_FLASH
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/* GP0[11] is required for NOR to work on Rev 3 EVMs */
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{ pinmux(0), 8, 4 }, /* GP0[11] */
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#endif
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@ -235,7 +235,7 @@ const struct pinmux_resource pinmuxes[] = {
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PINMUX_ITEM(emifa_pins_cs3),
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PINMUX_ITEM(emifa_pins_cs4),
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PINMUX_ITEM(emifa_pins_nand),
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#elif defined(CONFIG_USE_NOR)
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#elif defined(CONFIG_MTD_NOR_FLASH)
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PINMUX_ITEM(emifa_pins_cs2),
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PINMUX_ITEM(emifa_pins_nor),
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#endif
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@ -341,7 +341,7 @@ int board_init(void)
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DAVINCI_SYSCFG_SUSPSRC_UART2),
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&davinci_syscfg_regs->suspsrc);
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#ifdef CONFIG_USE_NOR
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#ifdef CONFIG_MTD_NOR_FLASH
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/* Set the GPIO direction as output */
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clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
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@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x2800
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_DM_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SYS_EXTRA_OPTIONS="USE_NOR,DIRECT_NOR_BOOT"
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
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@ -13,10 +13,6 @@
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/*
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* Board
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*/
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/* check if direct NOR boot config is used */
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#ifndef CONFIG_DIRECT_NOR_BOOT
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#define CONFIG_USE_SPIFLASH
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#endif
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/*
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* SoC Configuration
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@ -28,7 +24,7 @@
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#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
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#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
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#ifdef CONFIG_DIRECT_NOR_BOOT
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#ifdef CONFIG_MTD_NOR_FLASH
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#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11)
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#endif
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@ -107,10 +103,6 @@
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#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
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#ifdef CONFIG_USE_SPIFLASH
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#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
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#endif
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/*
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* I2C Configuration
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*/
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@ -170,7 +162,7 @@
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#define CONFIG_NET_RETRY_COUNT 10
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#endif
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#ifdef CONFIG_USE_NOR
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#ifdef CONFIG_MTD_NOR_FLASH
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
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#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */
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#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
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@ -223,16 +215,11 @@
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#define CONFIG_CLOCKS
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#endif
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#if !defined(CONFIG_MTD_RAW_NAND) && \
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!defined(CONFIG_USE_NOR) && \
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!defined(CONFIG_USE_SPIFLASH)
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#endif
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/* USB Configs */
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
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#ifndef CONFIG_DIRECT_NOR_BOOT
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#ifdef CONFIG_SPL_BUILD
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/* defines for SPL */
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#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
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CONFIG_SYS_MALLOC_LEN)
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@ -247,12 +234,12 @@
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/* additions for new relocation code, must added to all boards */
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#define CONFIG_SYS_SDRAM_BASE 0xc0000000
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#ifdef CONFIG_DIRECT_NOR_BOOT
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#ifdef CONFIG_MTD_NOR_FLASH
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#define CONFIG_SYS_INIT_SP_ADDR 0x8001ff00
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#else
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
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GENERATED_GBL_DATA_SIZE)
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#endif /* CONFIG_DIRECT_NOR_BOOT */
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#endif /* CONFIG_MTD_NOR_FLASH */
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#include <asm/arch/hardware.h>
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@ -312,7 +312,6 @@ CONFIG_DFU_ENV_SETTINGS
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CONFIG_DHCP_MIN_EXT_LEN
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CONFIG_DIALOG_POWER
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CONFIG_DIMM_SLOTS_PER_CTLR
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CONFIG_DIRECT_NOR_BOOT
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CONFIG_DISCONTIGMEM
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CONFIG_DISCOVER_PHY
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CONFIG_DISPLAY_AER_xxxx
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@ -4150,7 +4149,6 @@ CONFIG_USB_XHCI_EXYNOS
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CONFIG_USB_XHCI_OMAP
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CONFIG_USER_LOWLEVEL_INIT
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CONFIG_USE_INTERRUPT
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CONFIG_USE_NOR
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CONFIG_USE_ONENAND_BOARD_INIT
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CONFIG_USE_SPIFLASH
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CONFIG_UTBIPAR_INIT_TBIPA
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