spi: zynq_qspi: Add function description
Add function description for zynq_qspi_init_hw and zynq_qspi_chipselect. Fix zqspi to priv in function descriptions. Change the description of priv as pointer to zynq_qspi_priv structure. Fix other function descriptions to kernel-doc style. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -110,6 +110,26 @@ static int zynq_qspi_ofdata_to_platdata(struct udevice *bus)
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return 0;
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}
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/**
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* zynq_qspi_init_hw - Initialize the hardware
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* @priv: Pointer to the zynq_qspi_priv structure
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*
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* The default settings of the QSPI controller's configurable parameters on
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* reset are
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* - Master mode
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* - Baud rate divisor is set to 2
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* - Threshold value for TX FIFO not full interrupt is set to 1
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* - Flash memory interface mode enabled
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* - Size of the word to be transferred as 8 bit
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* This function performs the following actions
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* - Disable and clear all the interrupts
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* - Enable manual slave select
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* - Enable auto start
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* - Deselect all the chip select lines
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* - Set the size of the word to be transferred as 32 bit
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* - Set the little endian mode of TX FIFO and
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* - Enable the QSPI controller
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*/
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static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv)
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{
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struct zynq_qspi_regs *regs = priv->regs;
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@ -189,9 +209,9 @@ static int zynq_qspi_probe(struct udevice *bus)
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return 0;
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}
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/*
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/**
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* zynq_qspi_read_data - Copy data to RX buffer
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* @zqspi: Pointer to the zynq_qspi structure
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* @priv: Pointer to the zynq_qspi_priv structure
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* @data: The 32 bit variable where data is stored
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* @size: Number of bytes to be copied from data to RX buffer
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*/
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@ -234,9 +254,9 @@ static void zynq_qspi_read_data(struct zynq_qspi_priv *priv, u32 data, u8 size)
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priv->bytes_to_receive = 0;
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}
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/*
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/**
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* zynq_qspi_write_data - Copy data from TX buffer
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* @zqspi: Pointer to the zynq_qspi structure
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* @priv: Pointer to the zynq_qspi_priv structure
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* @data: Pointer to the 32 bit variable where data is to be copied
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* @size: Number of bytes to be copied from TX buffer to data
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*/
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@ -283,6 +303,11 @@ static void zynq_qspi_write_data(struct zynq_qspi_priv *priv,
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priv->bytes_to_transfer = 0;
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}
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/**
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* zynq_qspi_chipselect - Select or deselect the chip select line
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* @priv: Pointer to the zynq_qspi_priv structure
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* @is_on: Select(1) or deselect (0) the chip select line
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*/
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static void zynq_qspi_chipselect(struct zynq_qspi_priv *priv, int is_on)
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{
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u32 confr;
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@ -302,9 +327,10 @@ static void zynq_qspi_chipselect(struct zynq_qspi_priv *priv, int is_on)
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writel(confr, ®s->cr);
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}
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/*
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/**
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* zynq_qspi_fill_tx_fifo - Fills the TX FIFO with as many bytes as possible
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* @zqspi: Pointer to the zynq_qspi structure
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* @priv: Pointer to the zynq_qspi_priv structure
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* @size: Number of bytes to be copied to fifo
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*/
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static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv *priv, u32 size)
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{
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@ -342,9 +368,9 @@ static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv *priv, u32 size)
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}
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}
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/*
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/**
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* zynq_qspi_irq_poll - Interrupt service routine of the QSPI controller
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* @zqspi: Pointer to the zynq_qspi structure
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* @priv: Pointer to the zynq_qspi structure
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*
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* This function handles TX empty and Mode Fault interrupts only.
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* On TX empty interrupt this function reads the received data from RX FIFO and
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@ -430,11 +456,9 @@ static int zynq_qspi_irq_poll(struct zynq_qspi_priv *priv)
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return 0;
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}
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/*
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/**
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* zynq_qspi_start_transfer - Initiates the QSPI transfer
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* @qspi: Pointer to the spi_device structure
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* @transfer: Pointer to the spi_transfer structure which provide information
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* about next transfer parameters
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* @priv: Pointer to the zynq_qspi_priv structure
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*
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* This function fills the TX FIFO, starts the QSPI transfer, and waits for the
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* transfer to be completed.
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