sunxi: Introduce common symbol for H6 like SoCs
It turns out that there are at least 2 other SoCs which have basically the same memory map, similar clocks and other features as H6. It's very likely that we'll see more such SoCs in the future. In order to ease porting to new SoCs and lower ifdef clutter, introduce common symbol for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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@ -39,7 +39,7 @@
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.word 0xf57ff06f // isb sy
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.word 0xe320f003 // wfi
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.word 0xeafffffd // b @wfi
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#ifndef CONFIG_MACH_SUN50I_H6
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#ifndef CONFIG_SUN50I_GEN_H6
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.word 0x017000a0 // writeable RVBAR mapping address
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#else
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.word 0x09010040 // writeable RVBAR mapping address
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@ -16,7 +16,7 @@
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/* clock control module regs definition */
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#if defined(CONFIG_MACH_SUN8I_A83T)
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#include <asm/arch/clock_sun8i_a83t.h>
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#elif defined(CONFIG_MACH_SUN50I_H6)
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#elif defined(CONFIG_SUN50I_GEN_H6)
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#include <asm/arch/clock_sun50i_h6.h>
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#elif defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \
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defined(CONFIG_MACH_SUN50I)
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@ -8,7 +8,7 @@
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#if defined(CONFIG_MACH_SUN9I)
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#include <asm/arch/cpu_sun9i.h>
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#elif defined(CONFIG_MACH_SUN50I_H6)
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#elif defined(CONFIG_SUN50I_GEN_H6)
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#include <asm/arch/cpu_sun50i_h6.h>
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#else
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#include <asm/arch/cpu_sun4i.h>
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@ -76,7 +76,7 @@ struct sunxi_timer_reg {
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struct sunxi_tgp tgp[4];
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u8 res5[8];
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u32 cpu_cfg;
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#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
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#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
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u8 res3[16];
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struct sunxi_wdog wdog[5]; /* We have 5 watchdogs */
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#endif
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@ -82,7 +82,7 @@ config SUN8I_RSB
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config SUNXI_SRAM_ADDRESS
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hex
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default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
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default 0x20000 if MACH_SUN50I_H6
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default 0x20000 if SUN50I_GEN_H6
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default 0x0
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---help---
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Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
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@ -108,6 +108,15 @@ config SUNXI_GEN_SUN6I
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separate ahb reset control registers, custom pmic bus, new style
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watchdog, etc.
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config SUN50I_GEN_H6
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bool
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select FIT
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select SPL_LOAD_FIT
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select SUPPORT_SPL
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---help---
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Select this for sunxi SoCs which have H6 like peripherals, clocks
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and memory map.
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config SUNXI_DRAM_DW
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bool
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---help---
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@ -302,11 +311,9 @@ config MACH_SUN50I_H5
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config MACH_SUN50I_H6
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bool "sun50i (Allwinner H6)"
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select ARM64
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select SUPPORT_SPL
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select FIT
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select PHY_SUN4I_USB
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select SPL_LOAD_FIT
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select DRAM_SUN50I_H6
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select SUN50I_GEN_H6
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endchoice
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@ -756,7 +763,7 @@ config VIDEO_SUNXI
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depends on !MACH_SUN8I_V3S
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depends on !MACH_SUN9I
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depends on !MACH_SUN50I
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depends on !MACH_SUN50I_H6
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depends on !SUN50I_GEN_H6
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select VIDEO
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imply VIDEO_DT_SIMPLEFB
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default y
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@ -989,7 +996,7 @@ config SPL_STACK_R_ADDR
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default 0x4fe00000 if MACH_SUN8I
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default 0x2fe00000 if MACH_SUN9I
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default 0x4fe00000 if MACH_SUN50I
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default 0x4fe00000 if MACH_SUN50I_H6
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default 0x4fe00000 if SUN50I_GEN_H6
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config SPL_SPI_SUNXI
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bool "Support for SPI Flash on Allwinner SoCs in SPL"
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@ -26,7 +26,7 @@ else
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obj-$(CONFIG_MACH_SUN8I) += clock_sun6i.o
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endif
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obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o gtbus_sun9i.o
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obj-$(CONFIG_MACH_SUN50I_H6) += clock_sun50i_h6.o
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obj-$(CONFIG_SUN50I_GEN_H6) += clock_sun50i_h6.o
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_DRAM_SUN4I) += dram_sun4i.o
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@ -144,7 +144,7 @@ static int gpio_init(void)
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#error Unsupported console port number. Please fix pin mux settings in board.c
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#endif
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#ifdef CONFIG_MACH_SUN50I_H6
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#ifdef CONFIG_SUN50I_GEN_H6
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/* Update PIO power bias configuration by copy hardware detected value */
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val = readl(SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_VAL);
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writel(val, SUNXI_PIO_BASE + SUN50I_H6_GPIO_POW_MOD_SEL);
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@ -329,7 +329,7 @@ void reset_cpu(ulong addr)
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/* sun5i sometimes gets stuck without this */
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writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
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}
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#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
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#elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6)
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#if defined(CONFIG_MACH_SUN50I_H6)
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/* WDOG is broken for some H6 rev. use the R_WDOG instead */
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static const struct sunxi_wdog *wdog =
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@ -30,7 +30,7 @@
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.text
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#ifndef CONFIG_MACH_SUN50I_H6
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#ifndef CONFIG_SUN50I_GEN_H6
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ldr r1, =0x017000a0 @ MMIO mapped RVBAR[0] register
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#else
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ldr r1, =0x09010040 @ MMIO mapped RVBAR[0] register
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@ -159,7 +159,7 @@ config SPL_TEXT_BASE
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hex "SPL Text Base"
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default ISW_ENTRY_ADDR if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
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default 0x10060 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN9I
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default 0x20060 if MACH_SUN50I_H6
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default 0x20060 if SUN50I_GEN_H6
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default 0x00060 if ARCH_SUNXI
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default 0xfffc0000 if ARCH_ZYNQMP
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default 0x0
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@ -468,7 +468,7 @@ config SPL_SHA512_SUPPORT
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config SPL_FIT_IMAGE_TINY
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bool "Remove functionality from SPL FIT loading to reduce size"
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depends on SPL_FIT
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default y if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6
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default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6
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default y if ARCH_IMX8M
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help
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Enable this to reduce the size of the FIT image loading code
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@ -10,7 +10,7 @@
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* A64 specific configuration
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*/
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#ifndef CONFIG_MACH_SUN50I_H6
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#ifndef CONFIG_SUN50I_GEN_H6
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#define GICD_BASE 0x1c81000
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#define GICC_BASE 0x1c82000
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#else
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