Move eSDHC adapter card identification to board files
The eSDHC adapter card identification and multiplexing configuration through FPGA had been implemented in both common mmc driver and fsl_esdhc driver. However it is proper to move these code to board files and do it during board initialization. The FPGA registers are also board specific. This patch is to move eSDHC adapter card identification and multiplexing configuration from mmc driver to specific board files. And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [Rebased, Removed T1040QDS change as board does not exist] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2011 Freescale Semiconductor
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* Copyright 2020 NXP
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* Author: Shengzhou Liu <Shengzhou.Liu@freescale.com>
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*
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* This file provides support for the QIXIS of some Freescale reference boards.
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@ -115,7 +116,6 @@ void qixis_write_i2c(unsigned int reg, u8 value);
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#endif
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/* Use for SDHC adapter card type identification and operation */
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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#define QIXIS_SDID_MASK 0x07
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#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45 0x1 /* eMMC Card Rev4.5 */
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#define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY 0x2 /* SD/MMC Legacy Card */
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@ -131,6 +131,5 @@ void qixis_write_i2c(unsigned int reg, u8 value);
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#define QIXIS_DAT4 0X01
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#define QIXIS_EVDD_BY_SDHC_VS 0x0c
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#endif
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#endif
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@ -345,6 +345,33 @@ int brd_mux_lane_to_slot(void)
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return 0;
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}
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static void esdhc_adapter_card_ident(void)
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{
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u8 card_id, value;
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card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
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switch (card_id) {
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case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
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value = QIXIS_READ(brdcfg[5]);
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value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
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QIXIS_WRITE(brdcfg[5], value);
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break;
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case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
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value = QIXIS_READ(pwr_ctl[1]);
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value |= QIXIS_EVDD_BY_SDHC_VS;
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QIXIS_WRITE(pwr_ctl[1], value);
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break;
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case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
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value = QIXIS_READ(brdcfg[5]);
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value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
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QIXIS_WRITE(brdcfg[5], value);
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break;
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default:
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break;
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}
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}
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int board_early_init_r(void)
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{
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const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
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@ -384,7 +411,7 @@ int board_early_init_r(void)
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brd_mux_lane_to_slot();
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select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
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esdhc_adapter_card_ident();
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return 0;
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}
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@ -1,19 +1,5 @@
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Freescale esdhc-specific options
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- CONFIG_FSL_ESDHC_ADAPTER_IDENT
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Support Freescale adapter card type identification. This is implemented by
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operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC
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Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot.
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SDHC Card ID[0:2] Adapter Card Type
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0b000 reserved
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0b001 eMMC Card Rev4.5
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0b010 SD/MMC Legacy Card
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0b011 eMMC Card Rev4.4
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0b100 reserved
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0b101 MMC Card
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0b110 SD Card Rev2.0/3.0
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0b111 No card is present
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- CONFIG_SYS_FSL_ESDHC_LE
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ESDHC IP is in little-endian mode. Accessing ESDHC registers can be
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determined by ESDHC IP's endian mode or processor's endian mode.
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@ -671,44 +671,6 @@ static void fsl_esdhc_get_cfg_common(struct fsl_esdhc_priv *priv,
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cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
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}
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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void mmc_adapter_card_type_ident(void)
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{
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u8 card_id;
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u8 value;
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card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
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switch (card_id) {
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case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
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value = QIXIS_READ(brdcfg[5]);
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value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);
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QIXIS_WRITE(brdcfg[5], value);
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break;
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case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
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value = QIXIS_READ(pwr_ctl[1]);
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value |= QIXIS_EVDD_BY_SDHC_VS;
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QIXIS_WRITE(pwr_ctl[1], value);
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break;
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case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
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value = QIXIS_READ(brdcfg[5]);
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value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);
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QIXIS_WRITE(brdcfg[5], value);
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break;
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case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
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break;
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case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
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break;
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case QIXIS_ESDHC_ADAPTER_TYPE_SD:
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break;
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case QIXIS_ESDHC_NO_ADAPTER:
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break;
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default:
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break;
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}
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}
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#endif
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#ifdef CONFIG_OF_LIBFDT
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__weak int esdhc_status_fixup(void *blob, const char *compat)
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{
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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* Copyright 2020 NXP
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* Written by Simon Glass <sjg@chromium.org>
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*/
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@ -309,9 +310,6 @@ void mmc_do_preinit(void)
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if (!m)
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continue;
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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mmc_set_preinit(m, 1);
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#endif
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if (m->preinit)
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mmc_start_init(m);
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}
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2008, Freescale Semiconductor, Inc
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* Copyright 2020 NXP
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* Andy Fleming
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*
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* Based vaguely on the Linux code
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@ -2789,9 +2790,6 @@ int mmc_get_op_cond(struct mmc *mmc)
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if (mmc->has_init)
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return 0;
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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mmc_adapter_card_type_ident();
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#endif
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err = mmc_power_init(mmc);
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if (err)
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return err;
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@ -3073,9 +3071,6 @@ int mmc_init_device(int num)
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m = mmc_get_mmc_dev(dev);
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if (!m)
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return 0;
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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mmc_set_preinit(m, 1);
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#endif
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if (m->preinit)
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mmc_start_init(m);
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Google, Inc
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* Copyright 2020 NXP
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* Written by Simon Glass <sjg@chromium.org>
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*/
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@ -23,9 +24,6 @@ struct mmc *find_mmc_device(int dev_num)
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void mmc_do_preinit(void)
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{
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struct mmc *m = &mmc_static;
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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mmc_set_preinit(m, 1);
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#endif
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if (m->preinit)
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mmc_start_init(m);
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}
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@ -77,9 +75,6 @@ void mmc_do_preinit(void)
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list_for_each(entry, &mmc_devices) {
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m = list_entry(entry, struct mmc, link);
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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mmc_set_preinit(m, 1);
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#endif
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if (m->preinit)
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mmc_start_init(m);
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}
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@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2008,2010 Freescale Semiconductor, Inc
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* Copyright 2020 NXP
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* Andy Fleming
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*
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* Based (loosely) on the Linux code
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@ -16,9 +17,6 @@ int mmc_send_status(struct mmc *mmc, unsigned int *status);
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int mmc_poll_for_busy(struct mmc *mmc, int timeout);
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int mmc_set_blocklen(struct mmc *mmc, int len);
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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void mmc_adapter_card_type_ident(void);
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#endif
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#if CONFIG_IS_ENABLED(BLK)
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ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
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#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
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#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
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#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
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#define CONFIG_FSL_ESDHC_ADAPTER_IDENT
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#endif
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/*
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/* needed for the mmc_cfg definition */
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#include <mmc.h>
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#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
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#include "../board/freescale/common/qixis.h"
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#endif
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/* FSL eSDHC-specific constants */
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#define SYSCTL 0x0002e02c
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#define SYSCTL_INITA 0x08000000
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CONFIG_FSL_DIU_FB
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CONFIG_FSL_DMA
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CONFIG_FSL_DSPI1
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CONFIG_FSL_ESDHC_ADAPTER_IDENT
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CONFIG_FSL_ESDHC_PIN_MUX
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CONFIG_FSL_FIXED_MMC_LOCATION
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CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
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