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gpio: x86: Drop the deprecated methods in intel_gpio

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We don't need to implement direction_input() and direction_output()
anymore. Drop them and use update_flags() instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2021-02-04 21:22:06 -07:00 committed by Tom Rini
parent 3d64774716
commit edab114775
2 changed files with 43 additions and 34 deletions
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5
arch/x86/include/asm/intel_pinctrl_defs.h
View File

@ -11,6 +11,11 @@
/* This file is included by device trees, so avoid BIT() macros */
#define GPIO_DW_SIZE(x) (sizeof(u32) * (x))
#define PAD_CFG_OFFSET(x, dw_num) ((x) + GPIO_DW_SIZE(dw_num))
#define PAD_CFG0_OFFSET(x) PAD_CFG_OFFSET(x, 0)
#define PAD_CFG1_OFFSET(x) PAD_CFG_OFFSET(x, 1)
#define PAD_CFG0_TX_STATE_BIT 0
#define PAD_CFG0_TX_STATE (1 << PAD_CFG0_TX_STATE_BIT)
#define PAD_CFG0_RX_STATE_BIT 1

72
drivers/gpio/intel_gpio.c
View File

@ -3,6 +3,8 @@
* Copyright 2019 Google LLC
*/
#define LOG_CATEGORY UCLASS_GPIO
#include <common.h>
#include <dm.h>
#include <errno.h>
@ -23,38 +25,6 @@
#include <dm/acpi.h>
#include <dt-bindings/gpio/x86-gpio.h>
static int intel_gpio_direction_input(struct udevice *dev, uint offset)
{
struct udevice *pinctrl = dev_get_parent(dev);
uint config_offset;
config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset,
PAD_CFG0_MODE_MASK | PAD_CFG0_TX_STATE |
PAD_CFG0_RX_DISABLE,
PAD_CFG0_MODE_GPIO | PAD_CFG0_TX_DISABLE);
return 0;
}
static int intel_gpio_direction_output(struct udevice *dev, uint offset,
int value)
{
struct udevice *pinctrl = dev_get_parent(dev);
uint config_offset;
config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
pcr_clrsetbits32(pinctrl, config_offset,
PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE |
PAD_CFG0_TX_DISABLE | PAD_CFG0_TX_STATE,
PAD_CFG0_MODE_GPIO | PAD_CFG0_RX_DISABLE |
(value ? PAD_CFG0_TX_STATE : 0));
return 0;
}
static int intel_gpio_get_value(struct udevice *dev, uint offset)
{
struct udevice *pinctrl = dev_get_parent(dev);
@ -130,6 +100,41 @@ static int intel_gpio_xlate(struct udevice *orig_dev, struct gpio_desc *desc,
return 0;
}
static int intel_gpio_set_flags(struct udevice *dev, unsigned int offset,
ulong flags)
{
struct udevice *pinctrl = dev_get_parent(dev);
u32 bic0 = 0, bic1 = 0;
u32 or0, or1;
uint config_offset;
config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
if (flags & GPIOD_IS_OUT) {
bic0 |= PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE |
PAD_CFG0_TX_DISABLE;
or0 |= PAD_CFG0_MODE_GPIO | PAD_CFG0_RX_DISABLE;
} else if (flags & GPIOD_IS_IN) {
bic0 |= PAD_CFG0_MODE_MASK | PAD_CFG0_TX_STATE |
PAD_CFG0_RX_DISABLE;
or0 |= PAD_CFG0_MODE_GPIO | PAD_CFG0_TX_DISABLE;
}
if (flags & GPIOD_PULL_UP) {
bic1 |= PAD_CFG1_PULL_MASK;
or1 |= PAD_CFG1_PULL_UP_20K;
} else if (flags & GPIOD_PULL_DOWN) {
bic1 |= PAD_CFG1_PULL_MASK;
or1 |= PAD_CFG1_PULL_DN_20K;
}
pcr_clrsetbits32(pinctrl, PAD_CFG0_OFFSET(config_offset), bic0, or0);
pcr_clrsetbits32(pinctrl, PAD_CFG1_OFFSET(config_offset), bic1, or1);
log_debug("%s: flags=%lx, offset=%x, config_offset=%x, %x/%x %x/%x\n",
dev->name, flags, offset, config_offset, bic0, or0, bic1, or1);
return 0;
}
#if CONFIG_IS_ENABLED(ACPIGEN)
static int intel_gpio_get_acpi(const struct gpio_desc *desc,
struct acpi_gpio *gpio)
@ -177,12 +182,11 @@ static int intel_gpio_of_to_plat(struct udevice *dev)
}
static const struct dm_gpio_ops gpio_intel_ops = {
.direction_input = intel_gpio_direction_input,
.direction_output = intel_gpio_direction_output,
.get_value = intel_gpio_get_value,
.set_value = intel_gpio_set_value,
.get_function = intel_gpio_get_function,
.xlate = intel_gpio_xlate,
.set_flags = intel_gpio_set_flags,
#if CONFIG_IS_ENABLED(ACPIGEN)
.get_acpi = intel_gpio_get_acpi,
#endif