board: atmel: sama7g5ek: add initial support for sama7g5ek
Add initial support for sama7g5 evaluation kit board. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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@ -889,6 +889,9 @@ dtb-$(CONFIG_TARGET_OMAP4_SDP4430) += \
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dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \
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omap5-uevm.dtb
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dtb-$(CONFIG_TARGET_SAMA7G5EK) += \
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sama7g5ek.dtb
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dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
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at91-sama5d2_ptc_ek.dtb
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33
arch/arm/dts/sama7g5ek-u-boot.dtsi
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33
arch/arm/dts/sama7g5ek-u-boot.dtsi
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@ -0,0 +1,33 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* sama7g5ek-u-boot.dts - Device Tree file for SAMA7G5 SoC u-boot properties.
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*
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* Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
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*
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* Author: Eugen Hristev <eugen.hristev@microchip.com>
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* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
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*
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*/
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/ {
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chosen {
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u-boot,dm-pre-reloc;
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};
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ahb {
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u-boot,dm-pre-reloc;
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apb {
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u-boot,dm-pre-reloc;
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};
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};
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};
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&uart0 {
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u-boot,dm-pre-reloc;
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};
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&mck {
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u-boot,dm-pre-reloc;
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};
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39
arch/arm/dts/sama7g5ek.dts
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39
arch/arm/dts/sama7g5ek.dts
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@ -0,0 +1,39 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* sama7g5ek.dts - Device Tree file for SAMA7G5 EK
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* SAMA7G5 Evaluation Kit
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*
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* Copyright (c) 2020, Microchip Technology Inc.
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* 2020, Eugen Hristev <eugen.hristev@microchip.com>
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* 2020, Claudiu Beznea <claudiu.beznea@microchip.com>
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*/
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/dts-v1/;
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#include "sama7g5.dtsi"
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#include "sama7g5-pinfunc.h"
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/ {
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model = "Microchip SAMA7G5 Evaluation Kit";
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compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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ahb {
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apb {
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sdmmc1: sdio-host@e1208000 {
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bus-width = <4>;
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status = "okay";
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};
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uart0: serial@e1824200 {
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status = "okay";
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};
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};
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};
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};
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@ -265,6 +265,13 @@ config TARGET_CORVUS
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select SUPPORT_SPL
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imply CMD_DM
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config TARGET_SAMA7G5EK
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bool "SAMA7G5 EK board"
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select SAMA7G5
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select BOARD_EARLY_INIT_F
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select BOARD_LATE_INIT
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config TARGET_TAURUS
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bool "Support taurus"
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select AT91SAM9G20
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@ -327,6 +334,7 @@ source "board/atmel/at91sam9n12ek/Kconfig"
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source "board/atmel/at91sam9rlek/Kconfig"
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source "board/atmel/at91sam9x5ek/Kconfig"
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source "board/atmel/sam9x60ek/Kconfig"
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source "board/atmel/sama7g5ek/Kconfig"
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source "board/atmel/sama5d2_ptc_ek/Kconfig"
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source "board/atmel/sama5d2_xplained/Kconfig"
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source "board/atmel/sama5d27_som1_ek/Kconfig"
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15
board/atmel/sama7g5ek/Kconfig
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15
board/atmel/sama7g5ek/Kconfig
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@ -0,0 +1,15 @@
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if TARGET_SAMA7G5EK
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config SYS_BOARD
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default "sama7g5ek"
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config SYS_VENDOR
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default "atmel"
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config SYS_SOC
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default "at91"
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config SYS_CONFIG_NAME
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default "sama7g5ek"
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endif
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7
board/atmel/sama7g5ek/MAINTAINERS
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7
board/atmel/sama7g5ek/MAINTAINERS
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@ -0,0 +1,7 @@
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SAMA7G5 EK BOARD
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M: Eugen Hristev <eugen.hristev@microchip.com>
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S: Maintained
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F: board/atmel/sama7g5ek.c
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F: include/configs/sama7g5ek.h
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F: configs/sama7g5ek_mmc1_defconfig
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7
board/atmel/sama7g5ek/Makefile
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7
board/atmel/sama7g5ek/Makefile
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@ -0,0 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2020 Microchip Technology Inc.
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# Eugen Hristev <eugen.hristev@microchip.com>
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#
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obj-y += sama7g5ek.o
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68
board/atmel/sama7g5ek/sama7g5ek.c
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68
board/atmel/sama7g5ek/sama7g5ek.c
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@ -0,0 +1,68 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Microchip Technology, Inc.
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* Eugen Hristev <eugen.hristev@microchip.com>
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <init.h>
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#include <asm/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/atmel_pio4.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/sama7g5.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_late_init(void)
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{
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return 0;
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}
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#if (IS_ENABLED(CONFIG_DEBUG_UART_BOARD_INIT))
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static void board_uart0_hw_init(void)
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{
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/* FLEXCOM3 IO0 */
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atmel_pio4_set_f_periph(AT91_PIO_PORTD, 17, ATMEL_PIO_PUEN_MASK);
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/* FLEXCOM3 IO1 */
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atmel_pio4_set_f_periph(AT91_PIO_PORTD, 16, 0);
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at91_periph_clk_enable(ATMEL_ID_FLEXCOM3);
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}
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void board_debug_uart_init(void)
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{
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board_uart0_hw_init();
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}
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#endif
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int board_early_init_f(void)
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{
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#if (IS_ENABLED(CONFIG_DEBUG_UART))
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debug_uart_init();
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#endif
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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int misc_init_r(void)
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{
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return 0;
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}
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59
configs/sama7g5ek_mmc1_defconfig
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59
configs/sama7g5ek_mmc1_defconfig
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CONFIG_ARM=y
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CONFIG_ARCH_AT91=y
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CONFIG_SYS_TEXT_BASE=0x66f00000
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CONFIG_TARGET_SAMA7G5EK=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x4000
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CONFIG_DM_GPIO=y
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CONFIG_DEBUG_UART_BOARD_INIT=y
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CONFIG_DEBUG_UART_BASE=0xe1824200
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CONFIG_DEBUG_UART_CLOCK=200000000
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CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek"
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CONFIG_DEBUG_UART=y
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CONFIG_ENV_VARS_UBOOT_CONFIG=y
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CONFIG_FIT=y
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CONFIG_SD_BOOT=y
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CONFIG_USE_BOOTARGS=y
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CONFIG_MISC_INIT_R=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTOBOOT is not set
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMI is not set
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CONFIG_CMD_MD5SUM=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_SYS_MEMTEST_START=0x60000000
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CONFIG_SYS_MEMTEST_END=0x70000000
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CONFIG_CMD_STRINGS=y
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CONFIG_CMD_DM=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_FAT=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_DM=y
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CONFIG_CLK=y
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CONFIG_CLK_AT91=y
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CONFIG_AT91_UTMI=y
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CONFIG_AT91_GENERIC_CLK=y
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CONFIG_ATMEL_PIO4=y
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CONFIG_DM_I2C=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ATMEL=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_AT91PIO4=y
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# CONFIG_RAM_ROCKCHIP_DEBUG is not set
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CONFIG_DM_SERIAL=y
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_ATMEL_USART=y
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CONFIG_TIMER=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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# CONFIG_EFI_LOADER_HII is not set
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46
include/configs/sama7g5ek.h
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46
include/configs/sama7g5ek.h
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@ -0,0 +1,46 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration file for the SAMA7G5EK Board.
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*
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* Copyright (C) 2020 Microchip Corporation
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* Eugen Hristev <eugen.hristev@microchip.com>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */
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/* SDRAM */
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#define CONFIG_SYS_SDRAM_BASE 0x60000000
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#define CONFIG_SYS_SDRAM_SIZE 0x20000000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_INIT_SP_ADDR 0x218000
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#else
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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#endif
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#define CONFIG_SYS_LOAD_ADDR 0x62000000 /* load address */
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#undef CONFIG_BOOTCOMMAND
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#ifdef CONFIG_SD_BOOT
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/* u-boot env in sd/mmc card */
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#define FAT_ENV_INTERFACE "mmc"
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#define FAT_ENV_DEVICE_AND_PART "0"
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#define FAT_ENV_FILE "uboot.env"
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/* bootstrap + u-boot + env in sd card */
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#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; " \
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"fatload mmc 0:1 0x62000000 zImage; " \
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"bootz 0x62000000 - 0x61000000"
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#undef CONFIG_BOOTARGS
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
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#endif
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#endif
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