acpi: Add more support for generating processor tables
This adds tables relating to P-States and C-States. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
7764a8481c
commit
350c7f52b9
@ -10,8 +10,10 @@
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#ifndef __ACPI_ACPIGEN_H
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#define __ACPI_ACPIGEN_H
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#include <acpi/acpi_table.h>
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#include <linux/types.h>
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struct acpi_cstate;
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struct acpi_ctx;
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struct acpi_gen_regaddr;
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struct acpi_gpio;
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@ -87,6 +89,53 @@ enum psd_coord {
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HW_ALL = 0xfe
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};
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/**
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* enum csd_coord - Coordination types for C-states
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*
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* The type of coordination that exists (hardware) or is required (software) as
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* a result of the underlying hardware dependency
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*/
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enum csd_coord {
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CSD_HW_ALL = 0xfe,
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};
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/**
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* struct acpi_cstate - Information about a C-State
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*
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* @ctype: C State type (1=C1, 2=C2, 3=C3)
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* @latency: Worst-case latency to enter and exit the C State (in uS)
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* @power: Average power consumption of the processor when in this C-State (mW)
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* @resource: Register to read to place the processor in this state
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*/
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struct acpi_cstate {
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uint ctype;
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uint latency;
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uint power;
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struct acpi_gen_regaddr resource;
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};
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/**
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* struct acpi_tstate - Information about a Throttling Supported State
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*
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* See ACPI v6.3 section 8.4.5.2: _TSS (Throttling Supported States)
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*
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* @percent: Percent of the core CPU operating frequency that will be
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* available when this throttling state is invoked
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* @power: Throttling state’s maximum power dissipation (mw)
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* @latency: Worst-case latency (uS) that the CPU is unavailable during a
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* transition from any throttling state to this throttling state
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* @control: Value to be written to the Processor Control Register
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* (THROTTLE_CTRL) to initiate a transition to this throttling state
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* @status: Value in THROTTLE_STATUS when in this state
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*/
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struct acpi_tstate {
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uint percent;
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uint power;
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uint latency;
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uint control;
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uint status;
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};
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/**
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* acpigen_get_current() - Get the current ACPI code output pointer
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*
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@ -816,4 +865,117 @@ void acpigen_write_processor_package(struct acpi_ctx *ctx, const char *name,
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*/
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void acpigen_write_processor_cnot(struct acpi_ctx *ctx, const uint num_cores);
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/**
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* acpigen_write_ppc() - generates a function returning max P-states
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*
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* @ctx: ACPI context pointer
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* @num_pstates: Number of pstates to return
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*/
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void acpigen_write_ppc(struct acpi_ctx *ctx, uint num_pstates);
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/**
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* acpigen_write_ppc() - generates a function returning PPCM
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*
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* This returns the maximum number of supported P-states, as saved in the
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* variable PPCM
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*
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* @ctx: ACPI context pointer
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*/
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void acpigen_write_ppc_nvs(struct acpi_ctx *ctx);
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/**
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* acpigen_write_tpc() - Write a _TPC method that returns the TPC limit
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*
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* @ctx: ACPI context pointer
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* @gnvs_tpc_limit: Variable that holds the TPC limit
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*/
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void acpigen_write_tpc(struct acpi_ctx *ctx, const char *gnvs_tpc_limit);
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/**
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* acpigen_write_pss_package() - Write a PSS package
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*
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* See ACPI v6.3 section 8.4.6: Processor Performance Control
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*
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* @ctx: ACPI context pointer
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* @corefreq: CPU core frequency in MHz
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* @translat: worst-case latency in uS that the CPU is unavailable during a
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* transition from any performance state to this performance state
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* @busmlat: worst-case latency in microseconds that Bus Masters are prevented
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* from accessing memory during a transition from any performance state to
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* this performance state
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* @control: Value to write to PERF_CTRL to move to this performance state
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* @status: Expected PERF_STATUS value when in this state
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*/
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void acpigen_write_pss_package(struct acpi_ctx *ctx, uint corefreq, uint power,
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uint translat, uint busmlat, uint control,
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uint status);
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/**
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* acpigen_write_psd_package() - Write a PSD package
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*
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* Writes a P-State dependency package
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*
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* See ACPI v6.3 section 8.4.6.5: _PSD (P-State Dependency)
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*
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* @ctx: ACPI context pointer
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* @domain: Dependency domain number to which this P state entry belongs
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* @numprocs: Number of processors belonging to the domain for this logical
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* processor’s P-states
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* @coordtype: Coordination type
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*/
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void acpigen_write_psd_package(struct acpi_ctx *ctx, uint domain, uint numprocs,
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enum psd_coord coordtype);
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/**
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* acpigen_write_cst_package() - Write a _CST package
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*
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* See ACPI v6.3 section 8.4.2.1: _CST (C States)
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*
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* @ctx: ACPI context pointer
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* @entry: Array of entries
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* @nentries; Number of entries
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*/
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void acpigen_write_cst_package(struct acpi_ctx *ctx,
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const struct acpi_cstate *entry, int nentries);
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/**
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* acpigen_write_csd_package() - Write a _CSD Package
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*
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* See ACPI v6.3 section 8.4.2.2: _CSD (C-State Dependency)
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*
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* @ctx: ACPI context pointer
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* @domain: dependency domain number to which this C state entry belongs
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* @numprocs: number of processors belonging to the domain for the particular
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* C-state
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* @coordtype: Co-ordination type
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* @index: Index of the C-State entry in the _CST object for which the
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* dependency applies
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*/
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void acpigen_write_csd_package(struct acpi_ctx *ctx, uint domain, uint numprocs,
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enum csd_coord coordtype, uint index);
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/**
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* acpigen_write_tss_package() - Write a _TSS package
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*
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* @ctx: ACPI context pointer
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* @entry: Entries to write
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* @nentries: Number of entries to write
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*/
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void acpigen_write_tss_package(struct acpi_ctx *ctx,
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struct acpi_tstate *entry, int nentries);
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/**
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* acpigen_write_tsd_package() - Write a _TSD package
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*
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* See ACPI v6.3 section 8.4.5.4: _TSD (T-State Dependency)
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*
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* @ctx: ACPI context pointer
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* @domain: dependency domain number to which this T state entry belongs
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* @numprocs: Number of processors belonging to the domain for this logical
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* processor’s T-states
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* @coordtype: Coordination type
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*/
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void acpigen_write_tsd_package(struct acpi_ctx *ctx, uint domain, uint numprocs,
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enum psd_coord coordtype);
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#endif
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@ -481,6 +481,53 @@ void acpigen_write_register_resource(struct acpi_ctx *ctx,
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acpigen_write_resourcetemplate_footer(ctx);
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}
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void acpigen_write_ppc(struct acpi_ctx *ctx, uint num_pstates)
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{
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/*
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* Method (_PPC, 0, NotSerialized)
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* {
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* Return (num_pstates)
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* }
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*/
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acpigen_write_method(ctx, "_PPC", 0);
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acpigen_emit_byte(ctx, RETURN_OP);
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acpigen_write_byte(ctx, num_pstates);
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acpigen_pop_len(ctx);
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}
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/*
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* Generates a func with max supported P-states saved
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* in the variable PPCM.
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*/
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void acpigen_write_ppc_nvs(struct acpi_ctx *ctx)
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{
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/*
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* Method (_PPC, 0, NotSerialized)
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* {
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* Return (PPCM)
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* }
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*/
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acpigen_write_method(ctx, "_PPC", 0);
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acpigen_emit_byte(ctx, RETURN_OP);
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acpigen_emit_namestring(ctx, "PPCM");
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acpigen_pop_len(ctx);
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}
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void acpigen_write_tpc(struct acpi_ctx *ctx, const char *gnvs_tpc_limit)
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{
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/*
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* // Sample _TPC method
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* Method (_TPC, 0, NotSerialized)
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* {
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* Return (\TLVL)
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* }
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*/
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acpigen_write_method(ctx, "_TPC", 0);
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acpigen_emit_byte(ctx, RETURN_OP);
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acpigen_emit_namestring(ctx, gnvs_tpc_limit);
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acpigen_pop_len(ctx);
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}
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void acpigen_write_prw(struct acpi_ctx *ctx, uint wake, uint level)
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{
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/* Name (_PRW, Package () { wake, level } */
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@ -491,6 +538,126 @@ void acpigen_write_prw(struct acpi_ctx *ctx, uint wake, uint level)
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acpigen_pop_len(ctx);
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}
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void acpigen_write_pss_package(struct acpi_ctx *ctx, u32 core_freq, u32 power,
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u32 trans_lat, u32 busm_lat, u32 control,
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u32 status)
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{
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acpigen_write_package(ctx, 6);
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acpigen_write_dword(ctx, core_freq);
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acpigen_write_dword(ctx, power);
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acpigen_write_dword(ctx, trans_lat);
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acpigen_write_dword(ctx, busm_lat);
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acpigen_write_dword(ctx, control);
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acpigen_write_dword(ctx, status);
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acpigen_pop_len(ctx);
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log_debug("PSS: %uMHz power %u control 0x%x status 0x%x\n",
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core_freq, power, control, status);
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}
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void acpigen_write_psd_package(struct acpi_ctx *ctx, uint domain, uint numprocs,
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enum psd_coord coordtype)
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{
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acpigen_write_name(ctx, "_PSD");
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acpigen_write_package(ctx, 1);
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acpigen_write_package(ctx, 5);
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acpigen_write_byte(ctx, 5); // 5 values
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acpigen_write_byte(ctx, 0); // revision 0
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acpigen_write_dword(ctx, domain);
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acpigen_write_dword(ctx, coordtype);
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acpigen_write_dword(ctx, numprocs);
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acpigen_pop_len(ctx);
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acpigen_pop_len(ctx);
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}
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static void acpigen_write_cst_package_entry(struct acpi_ctx *ctx,
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const struct acpi_cstate *cstate)
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{
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acpigen_write_package(ctx, 4);
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acpigen_write_register_resource(ctx, &cstate->resource);
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acpigen_write_dword(ctx, cstate->ctype);
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acpigen_write_dword(ctx, cstate->latency);
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acpigen_write_dword(ctx, cstate->power);
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acpigen_pop_len(ctx);
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}
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void acpigen_write_cst_package(struct acpi_ctx *ctx,
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const struct acpi_cstate *cstate, int nentries)
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{
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int i;
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acpigen_write_name(ctx, "_CST");
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acpigen_write_package(ctx, nentries + 1);
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acpigen_write_dword(ctx, nentries);
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for (i = 0; i < nentries; i++)
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acpigen_write_cst_package_entry(ctx, cstate + i);
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acpigen_pop_len(ctx);
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}
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void acpigen_write_csd_package(struct acpi_ctx *ctx, uint domain, uint numprocs,
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enum csd_coord coordtype, uint index)
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{
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acpigen_write_name(ctx, "_CSD");
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acpigen_write_package(ctx, 1);
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acpigen_write_package(ctx, 6);
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acpigen_write_byte(ctx, 6); // 6 values
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acpigen_write_byte(ctx, 0); // revision 0
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acpigen_write_dword(ctx, domain);
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acpigen_write_dword(ctx, coordtype);
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acpigen_write_dword(ctx, numprocs);
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acpigen_write_dword(ctx, index);
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acpigen_pop_len(ctx);
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acpigen_pop_len(ctx);
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}
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void acpigen_write_tss_package(struct acpi_ctx *ctx,
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struct acpi_tstate *entry, int nentries)
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{
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/*
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* Sample _TSS package with 100% and 50% duty cycles
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* Name (_TSS, Package (0x02)
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* {
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* Package(){100, 1000, 0, 0x00, 0)
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* Package(){50, 520, 0, 0x18, 0)
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* })
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*/
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struct acpi_tstate *tstate = entry;
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int i;
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acpigen_write_name(ctx, "_TSS");
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acpigen_write_package(ctx, nentries);
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for (i = 0; i < nentries; i++) {
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acpigen_write_package(ctx, 5);
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acpigen_write_dword(ctx, tstate->percent);
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acpigen_write_dword(ctx, tstate->power);
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acpigen_write_dword(ctx, tstate->latency);
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acpigen_write_dword(ctx, tstate->control);
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acpigen_write_dword(ctx, tstate->status);
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acpigen_pop_len(ctx);
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tstate++;
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}
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acpigen_pop_len(ctx);
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}
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void acpigen_write_tsd_package(struct acpi_ctx *ctx, u32 domain, u32 numprocs,
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enum psd_coord coordtype)
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{
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acpigen_write_name(ctx, "_TSD");
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acpigen_write_package(ctx, 1);
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acpigen_write_package(ctx, 5);
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acpigen_write_byte(ctx, 5); // 5 values
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acpigen_write_byte(ctx, 0); // revision 0
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acpigen_write_dword(ctx, domain);
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acpigen_write_dword(ctx, coordtype);
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acpigen_write_dword(ctx, numprocs);
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acpigen_pop_len(ctx);
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acpigen_pop_len(ctx);
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}
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/*
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* ToUUID(uuid)
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*
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@ -1450,3 +1450,297 @@ static int dm_test_acpi_write_processor_cnot(struct unit_test_state *uts)
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return 0;
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}
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DM_TEST(dm_test_acpi_write_processor_cnot, 0);
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/* Test acpigen_write_tpc */
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static int dm_test_acpi_write_tpc(struct unit_test_state *uts)
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{
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struct acpi_ctx *ctx;
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u8 *ptr;
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ut_assertok(alloc_context(&ctx));
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ptr = acpigen_get_current(ctx);
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acpigen_write_tpc(ctx, "\\TLVL");
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ut_asserteq(METHOD_OP, *ptr++);
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ptr += 3; /* skip length */
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ut_asserteq_strn("_TPC", (char *)ptr);
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ptr += 4;
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ut_asserteq(0, *ptr++);
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ut_asserteq(RETURN_OP, *ptr++);
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ut_asserteq_strn("\\TLVL", (char *)ptr);
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ptr += 5;
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ut_asserteq_ptr(ptr, ctx->current);
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free_context(&ctx);
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return 0;
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}
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DM_TEST(dm_test_acpi_write_tpc, 0);
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/* Test acpigen_write_pss_package(), etc. */
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static int dm_test_acpi_write_pss_psd(struct unit_test_state *uts)
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{
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struct acpi_ctx *ctx;
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u8 *ptr;
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ut_assertok(alloc_context(&ctx));
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ptr = acpigen_get_current(ctx);
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acpigen_write_pss_package(ctx, 1, 2, 3, 4, 5, 6);
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ut_asserteq(PACKAGE_OP, *ptr++);
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ptr += 3; /* skip length */
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ut_asserteq(6, *ptr++);
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ut_asserteq(DWORD_PREFIX, *ptr++);
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ut_asserteq(1, get_unaligned((u32 *)ptr));
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ptr += 5;
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ut_asserteq(2, get_unaligned((u32 *)ptr));
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ptr += 5;
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ut_asserteq(3, get_unaligned((u32 *)ptr));
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ptr += 5;
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ut_asserteq(4, get_unaligned((u32 *)ptr));
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ptr += 5;
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ut_asserteq(5, get_unaligned((u32 *)ptr));
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ptr += 5;
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ut_asserteq(6, get_unaligned((u32 *)ptr));
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ptr += 4;
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acpigen_write_psd_package(ctx, 6, 7, HW_ALL);
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ut_asserteq(NAME_OP, *ptr++);
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ut_asserteq_strn("_PSD", (char *)ptr);
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ptr += 4;
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ut_asserteq(PACKAGE_OP, *ptr++);
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ptr += 3; /* skip length */
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ut_asserteq(1, *ptr++);
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ut_asserteq(PACKAGE_OP, *ptr++);
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ptr += 3; /* skip length */
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ut_asserteq(5, *ptr++);
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ut_asserteq(BYTE_PREFIX, *ptr++);
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ut_asserteq(5, *ptr++);
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ut_asserteq(BYTE_PREFIX, *ptr++);
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ut_asserteq(0, *ptr++);
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ut_asserteq(DWORD_PREFIX, *ptr++);
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ut_asserteq(6, get_unaligned((u32 *)ptr));
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ptr += 5;
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ut_asserteq(HW_ALL, get_unaligned((u32 *)ptr));
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ptr += 5;
|
||||
|
||||
ut_asserteq(7, get_unaligned((u32 *)ptr));
|
||||
ptr += 4;
|
||||
|
||||
ut_asserteq_ptr(ptr, ctx->current);
|
||||
|
||||
free_context(&ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_acpi_write_pss_psd, 0);
|
||||
|
||||
/* Test acpi_write_cst_package() */
|
||||
static int dm_test_acpi_write_cst(struct unit_test_state *uts)
|
||||
{
|
||||
static struct acpi_cstate cstate_map[] = {
|
||||
{
|
||||
/* C1 */
|
||||
.ctype = 1, /* ACPI C1 */
|
||||
.latency = 1,
|
||||
.power = 1000,
|
||||
.resource = {
|
||||
.space_id = ACPI_ADDRESS_SPACE_FIXED,
|
||||
},
|
||||
}, {
|
||||
.ctype = 2, /* ACPI C2 */
|
||||
.latency = 50,
|
||||
.power = 10,
|
||||
.resource = {
|
||||
.space_id = ACPI_ADDRESS_SPACE_IO,
|
||||
.bit_width = 8,
|
||||
.addrl = 0x415,
|
||||
},
|
||||
},
|
||||
};
|
||||
int nentries = ARRAY_SIZE(cstate_map);
|
||||
struct acpi_ctx *ctx;
|
||||
u8 *ptr;
|
||||
int i;
|
||||
|
||||
ut_assertok(alloc_context(&ctx));
|
||||
|
||||
ptr = acpigen_get_current(ctx);
|
||||
acpigen_write_cst_package(ctx, cstate_map, nentries);
|
||||
|
||||
ut_asserteq(NAME_OP, *ptr++);
|
||||
ut_asserteq_strn("_CST", (char *)ptr);
|
||||
ptr += 4;
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(nentries + 1, *ptr++);
|
||||
ut_asserteq(DWORD_PREFIX, *ptr++);
|
||||
ut_asserteq(nentries, get_unaligned((u32 *)ptr));
|
||||
ptr += 4;
|
||||
|
||||
for (i = 0; i < nentries; i++) {
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(4, *ptr++);
|
||||
ut_asserteq(BUFFER_OP, *ptr++);
|
||||
ptr += 0x17;
|
||||
ut_asserteq(DWORD_PREFIX, *ptr++);
|
||||
ut_asserteq(cstate_map[i].ctype, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(cstate_map[i].latency, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(cstate_map[i].power, get_unaligned((u32 *)ptr));
|
||||
ptr += 4;
|
||||
}
|
||||
|
||||
ut_asserteq_ptr(ptr, ctx->current);
|
||||
|
||||
free_context(&ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_acpi_write_cst, 0);
|
||||
|
||||
/* Test acpi_write_cst_package() */
|
||||
static int dm_test_acpi_write_csd(struct unit_test_state *uts)
|
||||
{
|
||||
struct acpi_ctx *ctx;
|
||||
u8 *ptr;
|
||||
|
||||
ut_assertok(alloc_context(&ctx));
|
||||
|
||||
ptr = acpigen_get_current(ctx);
|
||||
acpigen_write_csd_package(ctx, 12, 34, CSD_HW_ALL, 56);
|
||||
|
||||
ut_asserteq(NAME_OP, *ptr++);
|
||||
ut_asserteq_strn("_CSD", (char *)ptr);
|
||||
ptr += 4;
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(1, *ptr++);
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(6, *ptr++);
|
||||
|
||||
ut_asserteq(BYTE_PREFIX, *ptr++);
|
||||
ut_asserteq(6, *ptr++);
|
||||
ut_asserteq(BYTE_PREFIX, *ptr++);
|
||||
ut_asserteq(0, *ptr++);
|
||||
ut_asserteq(DWORD_PREFIX, *ptr++);
|
||||
ut_asserteq(12, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(CSD_HW_ALL, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(34, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(56, get_unaligned((u32 *)ptr));
|
||||
ptr += 4;
|
||||
|
||||
ut_asserteq_ptr(ptr, ctx->current);
|
||||
|
||||
free_context(&ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_acpi_write_csd, 0);
|
||||
|
||||
/* Test acpigen_write_tss_package() */
|
||||
static int dm_test_acpi_write_tss(struct unit_test_state *uts)
|
||||
{
|
||||
static struct acpi_tstate tstate_list[] = {
|
||||
{ 1, 2, 3, 4, 5, },
|
||||
{ 6, 7, 8, 9, 10, },
|
||||
};
|
||||
int nentries = ARRAY_SIZE(tstate_list);
|
||||
struct acpi_ctx *ctx;
|
||||
u8 *ptr;
|
||||
int i;
|
||||
|
||||
ut_assertok(alloc_context(&ctx));
|
||||
|
||||
ptr = acpigen_get_current(ctx);
|
||||
acpigen_write_tss_package(ctx, tstate_list, nentries);
|
||||
|
||||
ut_asserteq(NAME_OP, *ptr++);
|
||||
ut_asserteq_strn("_TSS", (char *)ptr);
|
||||
ptr += 4;
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(nentries, *ptr++);
|
||||
|
||||
for (i = 0; i < nentries; i++) {
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(5, *ptr++);
|
||||
ut_asserteq(DWORD_PREFIX, *ptr++);
|
||||
ut_asserteq(tstate_list[i].percent, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(tstate_list[i].power, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(tstate_list[i].latency, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(tstate_list[i].control, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(tstate_list[i].status, get_unaligned((u32 *)ptr));
|
||||
ptr += 4;
|
||||
}
|
||||
|
||||
ut_asserteq_ptr(ptr, ctx->current);
|
||||
|
||||
free_context(&ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_acpi_write_tss, 0);
|
||||
|
||||
/* Test acpigen_write_tsd_package() */
|
||||
static int dm_test_acpi_write_tsd_package(struct unit_test_state *uts)
|
||||
{
|
||||
struct acpi_ctx *ctx;
|
||||
u8 *ptr;
|
||||
|
||||
ut_assertok(alloc_context(&ctx));
|
||||
|
||||
ptr = acpigen_get_current(ctx);
|
||||
acpigen_write_tsd_package(ctx, 12, 34, HW_ALL);
|
||||
|
||||
ut_asserteq(NAME_OP, *ptr++);
|
||||
ut_asserteq_strn("_TSD", (char *)ptr);
|
||||
ptr += 4;
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(1, *ptr++);
|
||||
ut_asserteq(PACKAGE_OP, *ptr++);
|
||||
ptr += 3; /* skip length */
|
||||
ut_asserteq(5, *ptr++);
|
||||
|
||||
ut_asserteq(BYTE_PREFIX, *ptr++);
|
||||
ut_asserteq(5, *ptr++);
|
||||
ut_asserteq(BYTE_PREFIX, *ptr++);
|
||||
ut_asserteq(0, *ptr++);
|
||||
ut_asserteq(DWORD_PREFIX, *ptr++);
|
||||
ut_asserteq(12, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(CSD_HW_ALL, get_unaligned((u32 *)ptr));
|
||||
ptr += 5;
|
||||
ut_asserteq(34, get_unaligned((u32 *)ptr));
|
||||
ptr += 4;
|
||||
|
||||
ut_asserteq_ptr(ptr, ctx->current);
|
||||
|
||||
free_context(&ctx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
DM_TEST(dm_test_acpi_write_tsd_package, 0);
|
||||
|
Loading…
Reference in New Issue
Block a user