* Patch by Stefan Roese, 5 Jul 2005:

Update uc100 board PHY setup
* Patch by Detlev Zundel, 30 Jun 2005:
2005-07-05 11:35:27 +00:00 · 2005-07-04 00:03:16 +00:00 · 2005-07-01 15:53:57 +00:00 · 2005-06-30 13:06:07 +00:00 · 2005-06-27 13:30:03 +00:00 · 2005-06-20 10:28:38 +00:00
3072 changed files with 563349 additions and 84087 deletions
--- a/3336
+++ b/3336
--- a/11
+++ b/11
@@ -1,3 +1,14 @@
+  NOTE! This copyright does *not* cover the so-called "standalone"
+applications that use U-Boot services by means of the jump table
+provided by U-Boot exactly for this purpose - this is merely
+considered normal use of U-Boot, and does *not* fall under the
+heading of "derived work". Also note that the GPL below is
+copyrighted by the Free Software Foundation, but the instance of code
+that it refers to (the U-Boot source code) is copyrighted by me and
+others who actually wrote it. -- Wolfgang Denk
+
+=======================================================================
+
 		    GNU GENERAL PUBLIC LICENSE
 		       Version 2, June 1991

--- a/192
+++ b/192
@@ -18,22 +18,40 @@ N: Dr. Bruno Achauer
 E: bruno@exet-ag.de
 D: Support for NetBSD (both as host and target system)

+N: Guillaume Alexandre
+E: guillaume.alexandre@gespac.ch
+D: Add PCIPPC6 configuration
+
 N: Swen Anderson
 E: sand@peppercon.de
 D: ERIC Support

-N: Guillaume Alexandre
-E: guillaume.alexandre@gespac.ch
-D: Add PCIPPC6 configuration
+N: Pantelis Antoniou
+E: panto@intracom.gr
+D: NETVIA & NETPHONE board support, ARTOS support.

 N: Pierre Aubert
 E: <p.aubert@staubli.com>
 D: Support for RPXClassic board

+N: Yuli Barcohen
+E: yuli@arabellasw.com
+D: Unified support for Motorola MPC826xADS/MPC8272ADS/PQ2FADS boards.
+D: Support for Zephyr Engineering ZPC.1900 board.
+D: Support for Interphase iSPAN boards.
+D: Support for Analogue&Micro Adder boards.
+D: Support for Analogue&Micro Rattler boards.
+W: http://www.arabellasw.com
+
 N: Jerry van Baren
 E: <vanbaren@cideas.com>
 D: BedBug port to 603e core (MPC82xx). Code for enhanced memory test.

+N: Pavel Bartusek
+E: <pba@sysgo.com>
+D: Reiserfs support
+W: http://www.elinos.com
+
 N: Andre Beaudin
 E: <andre.beaudin@colubris.com>
 D: PCMCIA, Ethernet, TFTP
@@ -46,6 +64,10 @@ N: Raphael Bossek
 E: raphael.bossek@solutions4linux.de
 D: 8xxrom-0.3.0

+N: Rick Bronson
+E: rick@efn.org
+D: Atmel AT91RM9200DK and NAND support
+
 N: David Brown
 E: DBrown03@harris.com
 D: Extensions to 8xxrom-0.3.0
@@ -54,18 +76,36 @@ N: Oliver Brown
 E: obrown@adventnetworks.com
 D: Port to the gw8260 board

+N: Curt Brune
+E: curt@cucy.com
+D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
+D: Added support for ESPD-Inc. EVB4510 Board
+W: http://www.cucy.com
+
 N: Jonathan De Bruyne
 E: jonathan.debruyne@siemens.atea.be
 D: Port to Siemens IAD210 board

+N: Ken Chou
+E: kchou@ieee.org
+D: Support for A3000 SBC board
+
 N: Conn Clark
 E: clark@esteem.com
 D: ESTEEM192E support

 N: Magnus Damm
-E: eramdam@kieray1.p.y.ki.era.ericsson.se
+E: damm@opensource.se
 D: 8xxrom

+N: George G. Davis
+E: gdavis@mvista.com
+D: Board ports for ADS GraphicsClient+ and Intel Assabet
+
+N: Arun Dharankar
+E: ADharankar@ATTBI.Com
+D: threads / scheduler example code
+
 N: K<>ri Dav<61><76>sson
 E: kd@flaga.is
 D: FLAGA DM Support
@@ -87,6 +127,11 @@ N: Dave Ellis
 E: DGE@sixnetio.com
 D: EEPROM Speedup, SXNI855T port

+N: Thomas Elste
+E: info@elste.org
+D: Port for the ModNET50 Board, NET+50 CPU Port
+W: http://www.imms.de
+
 N: Daniel Engstr<74>m
 E: daniel@omicron.se
 D: x86 port, Support for sc520_cdp board
@@ -96,6 +141,10 @@ E: wg@denx.de
 D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
 W: www.denx.de

+N: Peter Figuli
+E: peposh@etc.sk
+D: Support for WEP EP250 (PXA) board
+
 N: Thomas Frieden
 E: ThomasF@hyperion-entertainment.com
 D: Support for AmigaOne
@@ -126,6 +175,10 @@ N: Andreas Heppel
 E: aheppel@sysgo.de
 D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]

+N: August Hoeraendl
+E: august.hoerandl@gmx.at
+D: Support for the logodl board (PXA2xx)
+
 N: Josh Huber
 E: huber@alum.wpi.edu
 D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
@@ -154,17 +207,62 @@ N: Yoo. Jonghoon
 E: yooth@ipone.co.kr
 D: Added port to the RPXlite board

+N: Mark Jonas
+E: mark.jonas@freescale.com
+D: Support for Freescale Total5200 platform
+W: http://www.mobilegt.com/
+
+N: Sam Song
+E: samsongshu@yahoo.com.cn
+D: Port to the RPXlite_DW board
+
 N: Brad Kemp
 E: Brad.Kemp@seranoa.com
 D: Port to Windriver ppmc8260 board

+N: Sangmoon Kim
+E: dogoil@etinsys.com
+D: Support for debris board
+
+N: Frederick W. Klatt
+E: fred.klatt@windriver.com
+D: Support for Wind River SBC8540/SBC8560 boards
+
 N: Thomas Koeller
 E: tkoeller@gmx.net
 D: Port to Motorola Sandpoint 3 (MPC8240)

+N: Raghu Krishnaprasad
+E: Raghu.Krishnaprasad@fci.com
+D: Support for Adder-II MPC852T evaluation board
+W: http://www.forcecomputers.com
+
+N: Bernhard Kuhn
+E: bkuhn@metrowerks.com
+D Support for Coldfire CPU; Support for Motorola M5272C3 and M5282EVB boards
+
+N: Prakash Kumar
+E: prakash@embedx.com
+D  Support for Intrinsyc CERF PXA250 board.
+
 N: Thomas Lange
-E: thomas@corelatus.com
-D: Support for GTH board; lots of PCMCIA fixes
+E: thomas@corelatus.se
+D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes
+
+N: The LEOX team
+E: team@leox.org
+D: Support for LEOX boards, DS164x RTC
+W: http://www.leox.org
+
+N: Leif Lindholm
+E: leif.lindholm@i3micro.com
+D: Support for AMD dbau1550 board.
+
+N: Stephan Linz
+E: linz@li-pro.net
+D: Support for Nios Stratix Development Kit (DK-1S10)
+D: Support for SSV ADNP/ESC1 (Nios Cyclone)
+W: http://www.li-pro.net

 N: Raymond Lo
 E: lo@routefree.com
@@ -174,6 +272,11 @@ N: Dan Malek
 E: dan@netx4.com
 D: FADSROM, the grandfather of all of this

+N: Andrea "llandre" Marson
+E: andrea.marson@dave-tech.it
+D: Port to PPChameleonEVB board
+W: www.dave-tech.it
+
 N: Reinhard Meyer
 E: r.meyer@emk-elektronik.de
 D: Port to EMK TOP860 Module
@@ -190,18 +293,25 @@ N: David M
 E: d.mueller@elsoft.ch
 D: Support for Samsung ARM920T SMDK2410 eval board

+N: Scott McNutt
+E: smcnutt@psyent.com
+D: Support for Altera Nios-32 CPU
+D: Support for Altera Nios-II CPU
+D: Support for Nios Cyclone Development Kit (DK-1C20)
+W: http://www.psyent.com
+
 N: Rolf Offermanns
 E: rof@sysgo.de
 D: Initial support for SSV-DNP1110, SMC91111 driver
 W: www.elinos.com

-N: Keith Outwater
-E: Keith_Outwater@mvis.com
-D: Support for GEN860T board
+N: Tolunay Orkun
+E: torkun@nextio.com
+D: Support for Cogent CSB272 & CSB472 boards

 N: Keith Outwater
 E: keith_outwater@mvis.com
-D: Support for generic/custom MPC860T board (GEN860T)
+D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)

 N: Frank Panno
 E: fpanno@delphintech.com
@@ -213,25 +323,60 @@ D: Support for 4xx SCSI, floppy, CDROM, CT69000 video, ...
 D: Support for PIP405 board
 D: Support for MIP405 board

+N: Dave Peverley
+E: dpeverley@mpc-data.co.uk
+W: http://www.mpc-data.co.uk
+D: OMAP730 P2 board support
+
 N: Bill Pitts
 E: wlp@mindspring.com
 D: BedBug embedded debugger code

+N: Daniel Poirot
+E: dan.poirot@windriver.com
+D: Support for the Wind River sbc405, sbc8240 board
+W: http://www.windriver.com
+
 N: Stefan Roese
 E: stefan.roese@esd-electronics.com
 D: IBM PPC401/403/405GP Support; Windows environment support

+N: Erwin Rol
+E: erwin@muffin.org
+D: boot support for RTEMS
+
+N: Paul Ruhland
+E: pruhland@rochester.rr.com
+D: Port to Logic Zoom LH7A40x SDK board(s)
+
 N: Neil Russell
 E: caret@c-side.com
 D: Author of LiMon-1.4.2, which contributed some ideas

+N: Travis B. Sawyer
+E: travis.sawyer@sandburst.com
+D: Support for IBM PPC440GX, XES XPedite1000 440GX PrPMC board.  IBM 440gx Ref Platform (Ocotea)
+
 N: Paolo Scaffardi
 E: arsenio@tin.it
 D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more

 N: Robert Schwebel
 E: r.schwebel@pengutronix.de
-D: Support for csb226 and innokom boards (xscale)
+D: Support for csb226, logodl and innokom boards (PXA2xx)
+
+N: Yasushi Shoji
+E: yashi@atmark-techno.com
+D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board
+
+N: Kurt Stremerch
+E: kurt@exys.be
+D: Support for Exys XSEngine board
+
+N: Andrea Scian
+E: andrea.scian@dave-tech.it
+D: Port to B2 board
+W: www.dave-tech.it

 N: Rob Taylor
 E: robt@flyingpig.com
@@ -249,6 +394,10 @@ N: Rune Torgersen
 E: <runet@innovsys.com>
 D: Support for Motorola MPC8266ADS board

+N: Greg Ungerer
+E: greg.ungerer@opengear.com
+D: Support for ks8695 CPU, and OpenGear cmXXXX boards
+
 N: David Updegraff
 E: dave@cray.com
 D: Port to Cray L1 board; DHCP vendor extensions
@@ -257,6 +406,27 @@ N: Christian Vejlbo
 E: christian.vejlbo@tellabs.com
 D: FADS860T ethernet support

+N: Robert Whaley
+E: rwhaley@applieddata.net
+D: Port to ARM PXA27x adsvix SBC
+
+N: Martin Winistoerfer
+E: martinwinistoerfer@gmx.ch
+D: Port to MPC555/556 microcontrollers and support for cmi board
+
+N: Ming-Len Wu
+E: minglen_wu@techware.com.tw
+D: Motorola MX1ADS board support
+W: http://www.techware.com.tw/
+
+N: Xianghua Xiao
+E: x.xiao@motorola.com
+D: Support for Motorola 85xx(PowerQUICC III) chip, MPC8540ADS and MPC8560ADS boards.
+
+N: John Zhan
+E: zhanz@sinovee.com
+D: Support for SinoVee Microsystems SC8xx SBC
+
 N: Alex Zuepke
 E: azu@sysgo.de
 D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
--- a/236
+++ b/236
@@ -3,10 +3,7 @@
 # Regular Maintainers for U-Boot board support:				#
 #									#
 # For any board without permanent maintainer, please contact		#
-#    for PowerPC systems:						#
 #	Wolfgang Denk <wd@denx.de>					#
-#    for ARM systems:							#
-#	Marius Gr<47>ger <mag@sysgo.de>					#
 # and Cc: the <U-Boot-Users@lists.sourceforge.net> mailing lists.	#
 #									#
 # Note: lists sorted by Maintainer Name					#
@@ -28,10 +25,26 @@ Pantelis Antoniou <panto@intracom.gr>

 	NETVIA			MPC8xx

-Jerry Van Baren <vanbaren_gerald@si.com>
+Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+
+	CPCI750			PPC750FX/GX
+
+Yuli Barcohen <yuli@arabellasw.com>
+
+	Adder			MPC87x/MPC852T
+	ISPAN			MPC8260
+	MPC8260ADS		MPC826x/MPC827x/MPC8280
+	Rattler			MPC8248
+	ZPC1900			MPC8265
+
+Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>

 	sacsng			MPC8260

+Rick Bronson <rick@efn.org>
+
+	AT91RM9200DK		at91rm9200
+
 Oliver Brown <obrown@adventnetworks.com>

 	gw8260			MPC8260
@@ -44,8 +57,15 @@ K

 	FLAGADM			MPC823

+Torsten Demke <torsten.demke@fci.com>
+
+	eXalion			MPC824x
+
 Wolfgang Denk <wd@denx.de>

+	IceCube_5100		MGT5100
+	IceCube_5200		MPC5200
+
 	AMX860			MPC860
 	ETX094			MPC850
 	FPS850L			MPC850
@@ -59,6 +79,10 @@ Wolfgang Denk <wd@denx.de>
 	IVMS8_128		MPC860
 	IVMS8_256		MPC860
 	LANTEC			MPC850
+	LWMON			MPC823
+	NC650			MPC852
+	R360MPI			MPC823
+	RMU			MPC850
 	RRvision		MPC823
 	SM850			MPC850
 	SPD823TS		MPC823
@@ -75,15 +99,25 @@ Wolfgang Denk <wd@denx.de>

 	CU824			MPC8240
 	Sandpoint8240		MPC8240
+	SL8245			MPC8245
+
+	ATC			MPC8250
+	PM825			MPC8250
+
+	TQM8255			MPC8255

 	CPU86			MPC8260
 	PM826			MPC8260
 	TQM8260			MPC8260

+	P3G4			MPC7410
+
 	PCIPPC2			MPC750
 	PCIPPC6			MPC750

-Jon Diekema <diekema_jon@si.com>
+	EXBITGEN		PPC405GP
+
+Jon Diekema <jon.diekema@smiths-aerospace.com>

 	sbc8260			MPC8260

@@ -114,9 +148,14 @@ Howard Gray <mvsensor@matrix-vision.de>

 	MVS1			MPC823

+Bill Hargen <Bill_Hargen@Jabil.com>
+
+	BUBINGA405EP		PPC405EP
+
 Klaus Heydeck <heydeck@kieback-peter.de>

 	KUP4K			MPC855
+	KUP4X			MPC859

 Murray Jensen <Murray.Jensen@cmst.csiro.au>

@@ -129,51 +168,100 @@ Brad Kemp <Brad.Kemp@seranoa.com>

 	ppmc8260		MPC8260

+Sangmoon Kim <dogoil@etinsys.com>
+
+	debris			MPC8245
+
 Nye Liu <nyet@zumanetworks.com>

 	ZUMA			MPC7xx_74xx

-Thomas Lange <thomas@corelatus.com>
+Thomas Lange <thomas@corelatus.se>

 	GTH			MPC860

+The LEOX team <team@leox.org>
+
+	ELPT860			MPC860T
+
 Eran Man <eran@nbase.co.il>

 	EVB64260_750CX		MPC750CX

+Andrea "llandre" Marson <andrea.marson@dave-tech.it>
+
+	PPChameleonEVB	PPC405EP
+
 Reinhard Meyer <r.meyer@emk-elektronik.de>

-	TOP860			MPC860
+	TOP860			MPC860T
+	TOP5200			MPC5200

 Scott McNutt <smcnutt@artesyncp.com>

 	EBONY			PPC440GP

+Tolunay Orkun <torkun@nextio.com>
+	csb272			PPC405GP
+	csb472			PPC405GP
+
 Keith Outwater <Keith_Outwater@mvis.com>

 	GEN860T			MPC860T
+	GEN860T_SC		MPC860T

 Frank Panno <fpanno@delphintech.com>

 	ep8260			MPC8260

+Peter Pearse <peter.pearse@arm.com>
+
+	Integrator/AP		CM 926EJ-S, CM7x0T, CM9x0T
+	Integrator/CP		CM 926EJ-S  CM920T, CM940T, CM922T-XA10
+	Versatile/AB		ARM926EJ-S
+	Versatile/PB		ARM926EJ-S
+
 Denis Peter <d.peter@mpl.ch>

 	MIP405			PPC4xx
 	PIP405			PPC4xx

-Stefan Roese <stefan.roese@esd-electronics.com>
+Daniel Poirot <dan.poirot@windriver.com>
+	sbc8240			MPC8240
+	sbc405			PPC405GP
+
+Matthias Fuchs <matthias.fuchs@esd-electronics.com>

 	ADCIOP			IOP480 (PPC401)
+	APC405			PPC405GP
 	AR405			PPC405GP
+	ASH405			PPC405EP
 	CANBT			PPC405CR
 	CPCI405			PPC405GP
+	CPCI4052		PPC405GP
+	CPCI405AB		PPC405GP
+	CPCI405DT		PPC405GP
 	CPCI440			PPC440GP
 	CPCIISER4		PPC405GP
 	DASA_SIM		IOP480 (PPC401)
+	DP405			PPC405EP
 	DU405			PPC405GP
+	G2000			PPC405EP
+	HH405			PPC405EP
+	HUB405			PPC405EP
 	OCRTC			PPC405GP
 	ORSG			PPC405GP
+	PCI405			PPC405GP
+	PLU405			PPC405EP
+	PMC405			PPC405GP
+	VOH405			PPC405EP
+	VOM405			PPC405EP
+	WUH405			PPC405EP
+
+Travis Sawyer (travis.sawyer@sandburst.com>
+
+	XPEDITE1K		PPC440GX
+	OCOTEA			PPC440GX

 Peter De Schrijver <p2@mind.be>

@@ -193,6 +281,34 @@ Rune Torgersen <runet@innovsys.com>

 	MPC8266ADS		MPC8266

+Josef Wagner <Wagner@Microsys.de>
+
+	CPC45			MPC8245
+	PM520			MPC5200
+
+Stephen Williams <steve@icarus.com>
+
+	JSE			PPC405GPr
+
+John Zhan <zhanz@sinovee.com>
+
+	svm_sc8xx		MPC8xx
+
+Jon Loeliger <jdl@freescale.com>
+
+	MPC8540ADS		MPC8540
+	MPC8560ADS		MPC8560
+	MPC8541CDS		MPC8541
+	MPC8555CDS		MPC8555
+
+Dan Malek <dan@embeddededge.com>
+
+	STxGP3			MPC85xx
+
+Yusdi Santoso <yusdi_santoso@adaptec.com>
+
+	HIDDEN_DRAGON	MPC8241/MPC8245
+
 -------------------------------------------------------------------------

 Unknown / orphaned boards:
@@ -215,7 +331,6 @@ Unknown / orphaned boards:

 	MOUSSE			MPC824x

-	MPC8260ADS		MPC8260
 	RPXsuper		MPC8260
 	rsdproto		MPC8260

@@ -229,6 +344,19 @@ Unknown / orphaned boards:
 #	Board			CPU					#
 #########################################################################

+George G. Davis <gdavis@mvista.com>
+
+	assabet			SA1100
+	gcplus			SA1100
+
+Thomas Elste <info@elste.org>
+
+	modnet50		ARM720T (NET+50)
+
+Peter Figuli <peposh@etc.sk>
+
+	wepep250		xscale
+
 Marius Gr<47>ger <mag@sysgo.de>

 	impa7			ARM720T (EP7211)
@@ -238,15 +366,41 @@ Kyle Harris <kharris@nexus-tech.net>

 	lubbock			xscale
 	cradle			xscale
+	ixdp425			xscale

 Gary Jennejohn <gj@denx.de>

 	smdk2400		ARM920T
 	trab			ARM920T

+Prakash Kumar <prakash@embedx.com>
+
+	cerf250			xscale
+
+Kshitij Gupta <kshitij@ti.com>
+
+	omap1510inn		ARM925T
+	omap1610inn		ARM926EJS
+
+Dave Peverley <dpeverley@mpc-data.co.uk>
+	omap730p2		ARM926EJS
+
+Nishant Kamat <nskamat@ti.com>
+
+	omap1610h2		ARM926EJS
+
+Rishi Bhattacharya <rishi@ti.com>
+
+	omap5912osk		ARM926EJS
+
+Richard Woodruff <r-woodruff2@ti.com>
+
+	omap2420h4		ARM1136EJS
+
 David M<>ller <d.mueller@elsoft.ch>

 	smdk2410		ARM920T
+	VCMA9			ARM920T

 Rolf Offermanns <rof@sysgo.de>

@@ -257,6 +411,16 @@ Robert Schwebel <r.schwebel@pengutronix.de>
 	csb226			xscale
 	innokom			xscale

+Andrea Scian <andrea.scian@dave-tech.it>
+
+	B2				ARM7TDMI (S3C44B0X)
+
+Greg Ungerer <greg.ungerer@opengear.com>
+
+	cm4008			ks8695p
+	cm4116			ks8695p
+	cm4148			ks8695p
+
 Alex Z<>pke <azu@sysgo.de>

 	lart			SA1100
@@ -283,6 +447,60 @@ Daniel Engstr
 Wolfgang Denk <wd@denx.de>

 	incaip			MIPS32 4Kc
+	purple			MIPS64 5Kc
+
+Thomas Lange <thomas@corelatus.se>
+	dbau1x00		MIPS32 Au1000
+
+#########################################################################
+# Nios-32 Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board			CPU					#
+#########################################################################
+
+Stephan Linz <linz@li-pro.net>
+
+	DK1S10			Nios-32
+	ADNPESC1		Nios-32
+
+Scott McNutt <smcnutt@psyent.com>
+
+	DK1C20			Nios-32
+
+#########################################################################
+# Nios-II Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board			CPU					#
+#########################################################################
+
+Scott McNutt <smcnutt@psyent.com>
+
+	PCI5441			Nios-II
+	PK1C20			Nios-II
+
+#########################################################################
+# MicroBlaze Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board			CPU					#
+#########################################################################
+
+Yasushi Shoji <yashi@atmark-techno.com>
+
+	SUZAKU			MicroBlaze
+
+#########################################################################
+# Coldfire Systems:							#
+#									#
+# Maintainer Name, Email Address					#
+#	Board			CPU					#
+#########################################################################
+
+Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+	TASREG			MCF5249

 #########################################################################
 # End of MAINTAINERS list						#
--- a/203
+++ b/203
@@ -1,5 +1,7 @@
 #!/bin/sh

+: ${JOBS:=}
+
 if [ "${CROSS_COMPILE}" ] ; then
 	MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
 else
@@ -10,24 +12,47 @@ fi

 LIST=""

+#########################################################################
+## MPC5xx Systems
+#########################################################################
+
+LIST_5xx="	\
+	cmi_mpc5xx							\
+"
+
+#########################################################################
+## MPC5xxx Systems
+#########################################################################
+
+LIST_5xxx="	\
+	icecube_5100	icecube_5200	EVAL5200	PM520		\
+	Total5100	Total5200	Total5200_Rev2	TQM5200_auto	\
+"
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################

 LIST_8xx="	\
-	ADS860		AMX860		c2mon		CCM		\
-	cogent_mpc8xx	ESTEEM192E	ETX094		FADS823		\
-	FADS850SAR	FADS860T	FLAGADM		FPS850L		\
-	GEN860T		GENIETV		GTH		hermes		\
-	IAD210		ICU862_100MHz	IP860		IVML24		\
-	IVML24_128	IVML24_256	IVMS8		IVMS8_128	\
-	IVMS8_256	KUP4K           LANTEC	        lwmon   	\
-	MBX		MBX860T		MHPC		MVS1		\
-	NETVIA		NX823		pcu_e		R360MPI		\
-	RPXClassic	RPXlite		RRvision	SM850		\
-	SPD823TS	SXNI855T	TOP860		TQM823L		\
-	TQM823L_LCD	TQM850L		TQM855L		TQM860L		\
-	TQM860L_FEC	TTTech		v37				\
+	Adder87x	GENIETV		MBX860T		R360MPI		\
+	AdderII		GTH		MHPC		RBC823		\
+	ADS860		hermes		MPC86xADS	rmu		\
+	AMX860		IAD210		MPC885ADS	RPXClassic	\
+	c2mon		ICU862_100MHz	MVS1		RPXlite		\
+	CCM		IP860		NETPHONE	RPXlite_DW	\
+	cogent_mpc8xx	IVML24		NETTA		RRvision	\
+	ELPT860		IVML24_128	NETTA2		SM850		\
+	ESTEEM192E	IVML24_256	NETTA_ISDN	SPD823TS	\
+	ETX094		IVMS8		NETVIA		svm_sc8xx	\
+	FADS823		IVMS8_128	NETVIA_V2	SXNI855T	\
+	FADS850SAR	IVMS8_256	NX823		TOP860		\
+	FADS860T	KUP4K		pcu_e		TQM823L		\
+	FLAGADM		KUP4X		QS823		TQM823L_LCD	\
+	FPS850L		LANTEC		QS850		TQM850L		\
+	GEN860T		lwmon		QS860T		TQM855L		\
+	GEN860T_SC	MBX		quantum		TQM860L		\
+							uc100		\
+							v37		\
 "

 #########################################################################
@@ -35,12 +60,24 @@ LIST_8xx="	\
 #########################################################################

 LIST_4xx="	\
-	ADCIOP		AR405		CANBT		CPCI405		\
-	CPCI4052 	CPCI440         CPCIISER4	CRAYL1  	\
-	DASA_SIM	DU405    	EBONY           ERIC  		\
-	MIP405  	ML2		OCRTC		ORSG		\
-	PCI405          PIP405		W7OLMC		W7OLMG          \
-	WALNUT405							\
+	ADCIOP		AR405		ASH405		BUBINGA405EP	\
+	CANBT		CPCI405		CPCI4052	CPCI405AB	\
+	CPCI440		CPCIISER4	CRAYL1		csb272		\
+	csb472		DASA_SIM	DP405		DU405		\
+	EBONY		ERIC		EXBITGEN	HUB405		\
+	JSE		MIP405		MIP405T		ML2		\
+	ml300		OCOTEA		OCRTC		ORSG		\
+	PCI405		PIP405		PLU405		PMC405		\
+	PPChameleonEVB	VOH405		W7OLMC		W7OLMG		\
+	WALNUT405	WUH405          XPEDITE1K			\
+"
+
+#########################################################################
+## MPC8220 Systems
+#########################################################################
+
+LIST_8220="	\
+	Alaska8220	Yukon8220					\
 "

 #########################################################################
@@ -48,20 +85,35 @@ LIST_4xx="	\
 #########################################################################

 LIST_824x="	\
-	BMW		CU824		MOUSSE		MUSENKI		\
-	OXC		PN62		Sandpoint8240	Sandpoint8245	\
-	utx8245								\
+	A3000		BMW		CPC45		CU824		\
+	debris		eXalion		HIDDEN_DRAGON	MOUSSE		\
+	MUSENKI		MVBLUE		OXC		PN62		\
+	Sandpoint8240	Sandpoint8245	SL8245		utx8245		\
+	sbc8240	\
 "

 #########################################################################
-## MPC8260 Systems
+## MPC8260 Systems (includes 8250, 8255 etc.)
 #########################################################################

 LIST_8260="	\
-	cogent_mpc8260	CPU86		ep8260		gw8260		\
-	hymod		IPHASE4539	MPC8260ADS	MPC8266ADS	\
-	PM826		ppmc8260	RPXsuper	rsdproto	\
-	sacsng		sbc8260		SCM		TQM8260		\
+	atc		cogent_mpc8260	CPU86		CPU87		\
+	ep8260		gw8260		hymod		IPHASE4539	\
+	ISPAN		MPC8260ADS	MPC8266ADS	MPC8272ADS	\
+	PM826		PM828		ppmc8260	Rattler8248	\
+	RPXsuper	rsdproto	sacsng		sbc8260		\
+	SCM		TQM8260_AC	TQM8260_AD	TQM8260_AE	\
+	ZPC1900								\
+"
+
+#########################################################################
+## MPC85xx Systems (includes 8540, 8560 etc.)
+#########################################################################
+
+LIST_85xx="	\
+	MPC8540ADS	MPC8541CDS	MPC8555CDS	MPC8560ADS	\
+	PM854		sbc8540		sbc8560		stxgp3		\
+	TQM8540								\
 "

 #########################################################################
@@ -69,43 +121,113 @@ LIST_8260="	\
 #########################################################################

 LIST_74xx="	\
-	EVB64260	PCIPPC2		PCIPPC6		ZUMA		\
+	DB64360		DB64460		EVB64260	P3G4		\
+	PCIPPC2		PCIPPC6		ZUMA				\
 "

 LIST_7xx="	\
-	BAB7xx		ELPPC						\
+	BAB7xx		CPCI750		ELPPC				\
 "

-LIST_ppc="${LIST_8xx} ${LIST_824x} ${LIST_8260} \
-	  ${LIST_4xx} ${LIST_74xx} ${LIST_7xx}"
+LIST_ppc="${LIST_5xx}  ${LIST_5xxx}		\
+	  ${LIST_8xx}				\
+	  ${LIST_8220} ${LIST_824x} ${LIST_8260} \
+	  ${LIST_85xx}				\
+	  ${LIST_4xx}				\
+	  ${LIST_74xx} ${LIST_7xx}"

 #########################################################################
 ## StrongARM Systems
 #########################################################################

-LIST_SA="lart shannon dnp1110"
+LIST_SA="assabet dnp1110 gcplus lart shannon"

 #########################################################################
 ## ARM7 Systems
 #########################################################################

-LIST_ARM7="impa7 ep7312"
+LIST_ARM7="B2 ep7312 evb4510 impa7 modnet50"

 #########################################################################
 ## ARM9 Systems
 #########################################################################

-LIST_ARM9="smdk2400 smdk2410 trab"
+LIST_ARM9="	\
+	at91rm9200dk	cmc_pu2		integratorcp	integratorap 	\
+	lpd7a400	mx1ads		mx1fs2		omap1510inn	\
+	omap1610h2	omap1610inn	omap730p2	scb9328		\
+	smdk2400	smdk2410	trab		VCMA9		\
+	versatile	voiceblue					\
+"
+
+#########################################################################
+## ARM11 Systems
+#########################################################################
+LIST_ARM11="omap2420h4"

 #########################################################################
 ## Xscale Systems
 #########################################################################

-LIST_xscale="lubbock cradle csb226 innokom"
+LIST_pxa="	\
+	adsvix		cerf250		cradle		csb226		\
+	innokom		lubbock		wepep250	xaeniax		\
+	xm250		xsengine							\
+"
+
+LIST_ixp="ixdp425"


-LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
+LIST_arm="	\
+	${LIST_SA}							\
+	${LIST_ARM7} ${LIST_ARM9} ${LIST_ARM11}				\
+	${LIST_pxa} ${LIST_ixp}						\
+"

+#########################################################################
+## MIPS Systems
+#########################################################################
+
+LIST_mips4kc="incaip"
+
+LIST_mips5kc="purple"
+
+LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el"
+
+LIST_mips="${LIST_mips4kc} ${LIST_mips5kc} ${LIST_au1xx0}"
+
+#########################################################################
+## i386 Systems
+#########################################################################
+
+LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
+
+LIST_x86="${LIST_I486}"
+
+#########################################################################
+## NIOS Systems
+#########################################################################
+
+LIST_nios="	\
+	ADNPESC1 ADNPESC1_base_32					\
+	ADNPESC1_DNPEVA2_base_32					\
+	DK1C20 DK1C20_standard_32					\
+	DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20			\
+"
+
+#########################################################################
+## Nios-II Systems
+#########################################################################
+
+LIST_nios2="PCI5441 PK1C20"
+
+#########################################################################
+## MicroBlaze Systems
+#########################################################################
+
+LIST_microblaze="suzaku"
+
+#-----------------------------------------------------------------------

 #----- for now, just run PPC by default -----
 [ $# = 0 ] && set $LIST_ppc
@@ -117,7 +239,7 @@ build_target() {

 	${MAKE} distclean >/dev/null
 	${MAKE} ${target}_config
-	${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
+	${MAKE} ${JOBS} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
 	${CROSS_COMPILE:-ppc_8xx-}size u-boot | tee -a LOG/$target.MAKELOG
 }

@@ -127,7 +249,12 @@ build_target() {
 for arg in $@
 do
 	case "$arg" in
-	8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale)
+	ppc|5xx|5xxx|8xx|8220|824x|8260|85xx|4xx|7xx|74xx| \
+	arm|SA|ARM7|ARM9|ARM11|pxa|ixp| \
+	microblaze| \
+	mips| \
+	nios|nios2| \
+	x86|I486)
 			for target in `eval echo '$LIST_'${arg}`
 			do
 				build_target ${target}
--- a/1317
+++ b/1317
--- a/1427
+++ b/1427
--- a/board/AtmarkTechno/suzaku/Makefile
+++ b/board/AtmarkTechno/suzaku/Makefile
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2000-2002
+# (C) Copyright 2003
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -28,7 +28,7 @@ LIB	= lib$(BOARD).a
 OBJS	= $(BOARD).o flash.o

 $(LIB):	.depend $(OBJS)
-	$(AR) crv $@ $^
+	$(AR) crv $@ $(OBJS)

 #########################################################################

--- a/board/AtmarkTechno/suzaku/config.mk
+++ b/board/AtmarkTechno/suzaku/config.mk
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2004 Atmark Techno, Inc.
+#
+# Yasushi SHOJI <yashi@atmark-techno.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0x80F00000
+
+PLATFORM_CPPFLAGS += -mno-xl-soft-mul
+PLATFORM_CPPFLAGS += -mno-xl-soft-div
+PLATFORM_CPPFLAGS += -mxl-barrel-shift
--- a/board/AtmarkTechno/suzaku/flash.c
+++ b/board/AtmarkTechno/suzaku/flash.c
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2004 Atmark Techno, Inc.
+ *
+ * Yasushi SHOJI <yashi@atmark-techno.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+unsigned long flash_init(void)
+{
+	return 0;
+}
+
+void flash_print_info(flash_info_t *info)
+{
+}
+
+int flash_erase(flash_info_t *info, int s_first, int s_last)
+{
+	return 0;
+}
+
+int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	return 0;
+}
--- a/board/AtmarkTechno/suzaku/suzaku.c
+++ b/board/AtmarkTechno/suzaku/suzaku.c
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2004 Atmark Techno, Inc.
+ *
+ * Yasushi SHOJI <yashi@atmark-techno.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* This is a board specific file.  It's OK to include board specific
+ * header files */
+#include <asm/suzaku.h>
+
+void do_reset(void)
+{
+	*((unsigned long *)(MICROBLAZE_SYSREG_BASE_ADDR)) = MICROBLAZE_SYSREG_RECONFIGURE;
+}
--- a/board/AtmarkTechno/suzaku/u-boot.lds
+++ b/board/AtmarkTechno/suzaku/u-boot.lds
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2004 Atmark Techno, Inc.
+ *
+ * Yasushi SHOJI <yashi@atmark-techno.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(microblaze)
+ENTRY(_start)
+
+SECTIONS
+{
+	.text ALIGN(0x4):
+	{
+		__text_start = .;
+		cpu/microblaze/start.o (.text)
+		*(.text)
+		__text_end = .;
+	}
+
+	.rodata ALIGN(0x4):
+	{
+		__rodata_start = .;
+		*(.rodata)
+		__rodata_end = .;
+	}
+
+	.data ALIGN(0x4):
+	{
+		__data_start = .;
+		*(.data)
+		__data_end = .;
+	}
+
+	.u_boot_cmd ALIGN(0x4):
+	{
+		__u_boot_cmd_start = .;
+		*(.u_boot_cmd)
+		__u_boot_cmd_end = .;
+	}
+
+	.bss ALIGN(0x4):
+	{
+		__bss_start = .;
+		*(.bss)
+		__bss_start = .;
+	}
+}
--- a/board/LEOX/elpt860/Makefile
+++ b/board/LEOX/elpt860/Makefile
@@ -0,0 +1,48 @@
+
+#######################################################################
+#
+# Copyright (C) 2000, 2001, 2002, 2003
+# The LEOX team <team@leox.org>, http://www.leox.org
+#
+# LEOX.org is about the development of free hardware and software resources
+#   for system on chip.
+#
+# Description: U-Boot port on the LEOX's ELPT860 CPU board
+# ~~~~~~~~~~~
+#
+#######################################################################
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#######################################################################
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/LEOX/elpt860/README.LEOX
+++ b/board/LEOX/elpt860/README.LEOX
@@ -0,0 +1,424 @@
+=============================================================================
+
+	     U-Boot port on the LEOX's ELPT860 CPU board
+	     -------------------------------------------
+
+LEOX.org is about the development of free hardware and software resources
+	 for system on chip.
+
+For more information, contact The LEOX team <team@leox.org>
+
+References:
+~~~~~~~~~~
+    1) Get the last stable release from denx.de:
+	   o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
+    2) Get the current CVS snapshot:
+	   o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
+	   o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
+
+=============================================================================
+
+The ELPT860 CPU board has the following features:
+
+Processor:	- MPC860T @ 50MHz
+		- PowerPC Core
+		- 65 MIPS
+		- Caches: D->4KB, I->4KB
+		- CPM: 4 SCCs, 2 SMCs
+		- Ethernet 10/100
+		- SPI, I2C, PCMCIA, Parallel
+
+CPU board:	- DRAM:   16 MB
+		- FLASH: 512 KB + (2 * 4 MB)
+		- NVRAM: 128 KB
+		- 1 Serial link
+		- 2 Ethernet 10 BaseT Channels
+
+On power-up the processor jumps to the address of 0x02000100
+
+Thus, U-Boot is configured to reside in flash starting at the address of
+0x02001000.  The environment space is located in NVRAM separately from
+U-Boot, at the address of 0x03000000.
+
+=============================================================================
+
+			U-Boot test results
+
+=============================================================================
+
+
+##################################################
+# Operation on the serial console (SMC1)
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: help
+askenv  - get environment variables from stdin
+autoscr - run script from memory
+base    - print or set address offset
+bdinfo  - print Board Info structure
+bootm   - boot application image from memory
+bootp   - boot image via network using BootP/TFTP protocol
+bootd   - boot default, i.e., run 'bootcmd'
+cmp     - memory compare
+coninfo - print console devices and informations
+cp      - memory copy
+crc32   - checksum calculation
+echo    - echo args to console
+erase   - erase FLASH memory
+flinfo  - print FLASH memory information
+go      - start application at address 'addr'
+help    - print online help
+iminfo  - print header information for application image
+loadb   - load binary file over serial line (kermit mode)
+loads   - load S-Record file over serial line
+loop    - infinite loop on address range
+md      - memory display
+mm      - memory modify (auto-incrementing)
+mtest   - simple RAM test
+mw      - memory write (fill)
+nm      - memory modify (constant address)
+printenv- print environment variables
+protect - enable or disable FLASH write protection
+rarpboot- boot image via network using RARP/TFTP protocol
+reset   - Perform RESET of the CPU
+run     - run commands in an environment variable
+saveenv - save environment variables to persistent storage
+setenv  - set environment variables
+sleep   - delay execution for some time
+tftpboot- boot image via network using TFTP protocol
+	       and env variables ipaddr and serverip
+version - print monitor version
+?       - alias for 'help'
+
+##################################################
+# Environment Variables (CFG_ENV_IS_IN_NVRAM)
+##############################
+
+LEOX_elpt860: printenv
+bootdelay=5
+loads_echo=1
+baudrate=9600
+stdin=serial
+stdout=serial
+stderr=serial
+ethaddr=00:03:ca:00:64:df
+ipaddr=192.168.0.30
+netmask=255.255.255.0
+serverip=192.168.0.1
+nfsserverip=192.168.0.1
+preboot=echo;echo Type "run nfsboot" to mount root filesystem over NFS;echo
+gatewayip=192.168.0.1
+ramargs=setenv bootargs root=/dev/ram rw
+rootargs=setenv rootpath /tftp/$(ipaddr)
+nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(nfsserverip):$(rootpath)
+addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(nfsserverip):$(gatewayip):$(netmask):$(hostname):eth0:
+ramboot=tftp 400000 /home/leox/pMulti;run ramargs;bootm
+nfsboot=tftp 400000 /home/leox/uImage;run rootargs;run nfsargs;run addip;bootm
+bootcmd=run ramboot
+clocks_in_mhz=1
+
+Environment size: 730/16380 bytes
+
+##################################################
+# Flash Memory Information
+##############################
+
+LEOX_elpt860: flinfo
+
+Bank # 1: AMD AM29F040   (4 Mbits)
+  Size: 512 KB in 8 Sectors
+  Sector Start Addresses:
+    02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000
+    02050000      02060000      02070000
+
+##################################################
+# Board Information Structure
+##############################
+
+LEOX_elpt860: bdinfo
+memstart    = 0x00000000
+memsize     = 0x01000000
+flashstart  = 0x02000000
+flashsize   = 0x00080000
+flashoffset = 0x00030000
+sramstart   = 0x00000000
+sramsize    = 0x00000000
+immr_base   = 0xFF000000
+bootflags   = 0x00000001
+intfreq     =     50 MHz
+busfreq     =     50 MHz
+ethaddr     = 00:03:ca:00:64:df
+IP addr     = 192.168.0.30
+baudrate    =   9600 bps
+
+##################################################
+# Image Download and run over serial port
+#    hello_world (S-Record image)
+#    ===> 1) Enter "loads" command into U-Boot monitor
+#    ===> 2) From TeraTerm's bar menu, Select 'File/Send file...'
+#            Then select 'hello_world.srec' with the file browser
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: loads
+## Ready for S-Record download ...
+S804040004F3050154000501709905014C000501388D
+## First Load Addr = 0x00040000
+## Last  Load Addr = 0x0005018B
+## Total Size      = 0x0001018C = 65932 Bytes
+## Start Addr      = 0x00040004
+LEOX_elpt860: go 40004 This is a test !!!
+## Starting application at 0x00040004 ...
+Hello World
+argc = 6
+argv[0] = "40004"
+argv[1] = "This"
+argv[2] = "is"
+argv[3] = "a"
+argv[4] = "test"
+argv[5] = "!!!"
+argv[6] = "<NULL>"
+Hit any key to exit ...
+
+## Application terminated, rc = 0x0
+
+##################################################
+# Image download and run over ethernet interface
+#    Linux-2.4.4 (uImage) + Root filesystem mounted over NFS
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: run nfsboot
+ARP broadcast 1
+TFTP from server 192.168.0.1; our IP address is 192.168.0.30
+Filename '/home/leox/uImage'.
+Load address: 0x400000
+Loading: #################################################################
+	 #############################
+done
+Bytes transferred = 477294 (7486e hex)
+## Booting image at 00400000 ...
+   Image Name:   Linux-2.4.4
+   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
+   Data Size:    477230 Bytes = 466 kB = 0 MB
+   Load Address: 00000000
+   Entry Point:  00000000
+   Verifying Checksum ... OK
+   Uncompressing Kernel Image ... OK
+Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
+On node 0 totalpages: 4096
+zone(0): 4096 pages.
+zone(1): 0 pages.
+zone(2): 0 pages.
+Kernel command line: root=/dev/nfs rw nfsroot=192.168.0.1:/tftp/192.168.0.30 ip=192.168.0.30:192.168.0.1:192.168.0.1:255.255.255.0::eth0:
+rtsched version <20010618.1050.24>
+Decrementer Frequency: 3125000
+Warning: real time clock seems stuck!
+Calibrating delay loop... 49.76 BogoMIPS
+Memory: 14720k available (928k kernel code, 384k data, 44k init, 0k highmem)
+Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
+Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
+Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
+Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
+POSIX conformance testing by UNIFIX
+Linux NET4.0 for Linux 2.4
+Based upon Swansea University Computer Society NET3.039
+Starting kswapd v1.8
+CPM UART driver version 0.03
+ttyS0 on SMC1 at 0x0280, BRG1
+block: queued sectors max/low 9701kB/3233kB, 64 slots per queue
+RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
+eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
+NET4: Linux TCP/IP 1.0 for NET4.0
+IP Protocols: ICMP, UDP, TCP
+IP: routing cache hash table of 512 buckets, 4Kbytes
+TCP: Hash tables configured (established 1024 bind 1024)
+NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
+Looking up port of RPC 100003/2 on 192.168.0.1
+Looking up port of RPC 100005/2 on 192.168.0.1
+VFS: Mounted root (nfs filesystem).
+Freeing unused kernel memory: 44k init
+INIT: version 2.78 booting
+		Welcome to DENX Embedded Linux Environment
+		Press 'I' to enter interactive startup.
+Mounting proc filesystem:  [  OK  ]
+Configuring kernel parameters:  [  OK  ]
+Cannot access the Hardware Clock via any known method.
+Use the --debug option to see the details of our search for an access method.
+Setting clock : Wed Dec 31 19:00:11 EST 1969 [  OK  ]
+Activating swap partitions:  [  OK  ]
+Setting hostname 192.168.0.30:  [  OK  ]
+Finding module dependencies:
+[  OK  ]
+Checking filesystems
+Checking all file systems.
+[  OK  ]
+Mounting local filesystems:  [  OK  ]
+Enabling swap space:  [  OK  ]
+INIT: Entering runlevel: 3
+Entering non-interactive startup
+Starting system logger: [  OK  ]
+Starting kernel logger: [  OK  ]
+Starting xinetd: [  OK  ]
+
+192 login: root
+Last login: Wed Dec 31 19:00:41 on ttyS0
+bash-2.04#
+
+##################################################
+# Image download and run over ethernet interface
+#    Linux-2.4.4 + Root filesystem mounted from RAM (pMulti)
+##############################
+
+U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
+
+CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
+	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
+Board: ### No HW ID - assuming ELPT860
+DRAM:  16 MB
+FLASH: 512 kB
+In:    serial
+Out:   serial
+Err:   serial
+Net:   SCC ETHERNET
+
+Type "run nfsboot" to mount root filesystem over NFS
+
+Hit any key to stop autoboot:  0
+LEOX_elpt860: run ramboot
+ARP broadcast 1
+TFTP from server 192.168.0.1; our IP address is 192.168.0.30
+Filename '/home/leox/pMulti'.
+Load address: 0x400000
+Loading: #################################################################
+	 #################################################################
+	 #################################################################
+	 #################################################################
+	 #################################################################
+	 ########################################################
+done
+Bytes transferred = 1947816 (1db8a8 hex)
+## Booting image at 00400000 ...
+   Image Name:   linux-2.4.4-2002-03-21 Multiboot
+   Image Type:   PowerPC Linux Multi-File Image (gzip compressed)
+   Data Size:    1947752 Bytes = 1902 kB = 1 MB
+   Load Address: 00000000
+   Entry Point:  00000000
+   Contents:
+   Image 0:   477230 Bytes = 466 kB = 0 MB
+   Image 1:  1470508 Bytes = 1436 kB = 1 MB
+   Verifying Checksum ... OK
+   Uncompressing Multi-File Image ... OK
+   Loading Ramdisk to 00e44000, end 00fab02c ... OK
+Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
+On node 0 totalpages: 4096
+zone(0): 4096 pages.
+zone(1): 0 pages.
+zone(2): 0 pages.
+Kernel command line: root=/dev/ram rw
+rtsched version <20010618.1050.24>
+Decrementer Frequency: 3125000
+Warning: real time clock seems stuck!
+Calibrating delay loop... 49.76 BogoMIPS
+Memory: 13280k available (928k kernel code, 384k data, 44k init, 0k highmem)
+Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
+Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
+Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
+Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
+POSIX conformance testing by UNIFIX
+Linux NET4.0 for Linux 2.4
+Based upon Swansea University Computer Society NET3.039
+Starting kswapd v1.8
+CPM UART driver version 0.03
+ttyS0 on SMC1 at 0x0280, BRG1
+block: queued sectors max/low 8741kB/2913kB, 64 slots per queue
+RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
+eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
+RAMDISK: Compressed image found at block 0
+Freeing initrd memory: 1436k freed
+NET4: Linux TCP/IP 1.0 for NET4.0
+IP Protocols: ICMP, UDP, TCP
+IP: routing cache hash table of 512 buckets, 4Kbytes
+TCP: Hash tables configured (established 1024 bind 1024)
+IP-Config: Incomplete network configuration information.
+NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
+VFS: Mounted root (ext2 filesystem).
+Freeing unused kernel memory: 44k in<69>
+init started:  BusyBox v0.60.2 (2002.07.01-12:06+0000) multi-call Configuring hostname
+Configuring lo...
+Configuring eth0...
+Configuring Gateway...
+
+Please press Enter to activate this console.
+
+ELPT860 login: root
+Password:
+Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz)
+
+					      a8888b.
+					     d888888b.
+					     8P"YP"Y88
+     _      _                                8|o||o|88
+    | |    |_|                               8'    .88
+    | |     _ ____  _   _  _  _              8`._.' Y8.
+    | |    | |  _ \| | | |\ \/ /            d/      `8b.
+    | |___ | | | | | |_| |/    \          .dP   .     Y8b.
+    |_____||_|_| |_|\____|\_/\_/         d8:'   "   `::88b.
+					d8"           `Y88b
+				       :8P     '       :888
+					8a.    :      _a88P
+				      ._/"Yaa_ :    .| 88P|
+				      \    YP"      `| 8P  `.
+				      /     \._____.d|    .'
+				      `--..__)888888P`._.'
+login[21]: root login  on `ttyS0'
+
+
+
+BusyBox v0.60.3 (2002.07.20-10:39+0000) Built-in shell (ash)
+Enter 'help' for a list of built-in commands.
+
+root@ELPT860:~ #
--- a/board/LEOX/elpt860/config.mk
+++ b/board/LEOX/elpt860/config.mk
@@ -0,0 +1,36 @@
+#######################################################################
+#
+# Copyright (C) 2000, 2001, 2002, 2003
+# The LEOX team <team@leox.org>, http://www.leox.org
+#
+# LEOX.org is about the development of free hardware and software resources
+#   for system on chip.
+#
+# Description: U-Boot port on the LEOX's ELPT860 CPU board
+# ~~~~~~~~~~~
+#
+#######################################################################
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#######################################################################
+
+#
+# ELPT860 board
+#
+
+TEXT_BASE = 0x02000000
+#TEXT_BASE = 0x00FB0000
--- a/board/LEOX/elpt860/elpt860.c
+++ b/board/LEOX/elpt860/elpt860.c
@@ -0,0 +1,348 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+/*
+** Note 1: In this file, you have to provide the following functions:
+** ------
+**              int             board_early_init_f(void)
+**              int             checkboard(void)
+**              long int        initdram(int board_type)
+** called from 'board_init_f()' into 'common/board.c'
+**
+**              void            reset_phy(void)
+** called from 'board_init_r()' into 'common/board.c'
+*/
+
+#include <common.h>
+#include <mpc8xx.h>
+
+/* ------------------------------------------------------------------------- */
+
+static long int dram_size (long int, long int *, long int);
+
+/* ------------------------------------------------------------------------- */
+
+#define	_NOT_USED_	0xFFFFFFFF
+
+const uint init_sdram_table[] = {
+	/*
+	 * Single Read. (Offset 0 in UPMA RAM)
+	 */
+	0x0FFCCC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,
+	0xFFFFFC04,		/* last */
+	/*
+	 * SDRAM Initialization (offset 5 in UPMA RAM)
+	 *
+	 * This is no UPM entry point. The following definition uses
+	 * the remaining space to establish an initialization
+	 * sequence, which is executed by a RUN command.
+	 *
+	 */
+	0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,	/* last */
+	/*
+	 * Burst Read. (Offset 8 in UPMA RAM)
+	 */
+	0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+	0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+	0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
+	0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,	/* last */
+	/*
+	 * Single Write. (Offset 18 in UPMA RAM)
+	 */
+	0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,
+	0xFFFFFC04, 0xFFFFFC04, 0x0FFFFC04, 0xFFFFFC04,	/* last */
+	/*
+	 * Burst Write. (Offset 20 in UPMA RAM)
+	 */
+	0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+	0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
+	0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC34, 0x0FAC0C34,
+	0xFFFFFC05, 0xFFFFFC04, 0x0FFCFC04, 0xFFFFFC05,	/* last */
+};
+
+const uint sdram_table[] = {
+	/*
+	 * Single Read. (Offset 0 in UPMA RAM)
+	 */
+	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
+	0xFF0FFC00,		/* last */
+	/*
+	 * SDRAM Initialization (offset 5 in UPMA RAM)
+	 *
+	 * This is no UPM entry point. The following definition uses
+	 * the remaining space to establish an initialization
+	 * sequence, which is executed by a RUN command.
+	 *
+	 */
+	0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC05,	/* last */
+	/*
+	 * Burst Read. (Offset 8 in UPMA RAM)
+	 */
+	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
+	0xF00FFC00, 0xF00FFC00, 0xF00FFC00, 0xFF0FFC00,
+	0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
+	0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04,	/* last */
+	/*
+	 * Single Write. (Offset 18 in UPMA RAM)
+	 */
+	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00,
+	0xFF0FFC04, 0x0FFCCC04, 0xFFAFFC05,	/* last */
+	_NOT_USED_,
+	/*
+	 * Burst Write. (Offset 20 in UPMA RAM)
+	 */
+	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00,
+	0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04,
+	0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
+	0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04,	/* last */
+	/*
+	 * Refresh  (Offset 30 in UPMA RAM)
+	 */
+	0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
+	0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_,
+	0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04,	/* last */
+	/*
+	 * Exception. (Offset 3c in UPMA RAM)
+	 */
+	0x0FFFFC34, 0x0FAC0C34, 0xFFFFFC05, 0xFFAFFC04,	/* last */
+};
+
+/* ------------------------------------------------------------------------- */
+
+#define CFG_PC4    0x0800
+
+#define CFG_DS1    CFG_PC4
+
+/*
+ * Very early board init code (fpga boot, etc.)
+ */
+int board_early_init_f (void)
+{
+	volatile immap_t *immr = (immap_t *) CFG_IMMR;
+
+	/*
+	 * Light up the red led on ELPT860 pcb (DS1) (PCDAT)
+	 */
+	immr->im_ioport.iop_pcdat &= ~CFG_DS1;	/* PCDAT (DS1 = 0)                */
+	immr->im_ioport.iop_pcpar &= ~CFG_DS1;	/* PCPAR (0=general purpose I/O)  */
+	immr->im_ioport.iop_pcdir |= CFG_DS1;	/* PCDIR (I/O: 0=input, 1=output) */
+
+	return (0);		/* success */
+}
+
+/*
+ * Check Board Identity:
+ *
+ * Test ELPT860 ID string
+ *
+ * Return 1 if no second DRAM bank, otherwise returns 0
+ */
+
+int checkboard (void)
+{
+	unsigned char *s = getenv ("serial#");
+
+	if (!s || strncmp (s, "ELPT860", 7))
+		printf ("### No HW ID - assuming ELPT860\n");
+
+	return (0);		/* success */
+}
+
+/* ------------------------------------------------------------------------- */
+
+long int initdram (int board_type)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+	long int size8, size9;
+	long int size_b0 = 0;
+
+	/*
+	 * This sequence initializes SDRAM chips on ELPT860 board
+	 */
+	upmconfig (UPMA, (uint *) init_sdram_table,
+		   sizeof (init_sdram_table) / sizeof (uint));
+
+	memctl->memc_mptpr = 0x0200;
+	memctl->memc_mamr = 0x18002111;
+
+	memctl->memc_mar = 0x00000088;
+	memctl->memc_mcr = 0x80002000;	/* CS1: SDRAM bank 0 */
+
+	upmconfig (UPMA, (uint *) sdram_table,
+		   sizeof (sdram_table) / sizeof (uint));
+
+	/*
+	 * Preliminary prescaler for refresh (depends on number of
+	 * banks): This value is selected for four cycles every 62.4 us
+	 * with two SDRAM banks or four cycles every 31.2 us with one
+	 * bank. It will be adjusted after memory sizing.
+	 */
+	memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
+
+	/*
+	 * The following value is used as an address (i.e. opcode) for
+	 * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
+	 * the port size is 32bit the SDRAM does NOT "see" the lower two
+	 * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
+	 * MICRON SDRAMs:
+	 * ->    0 00 010 0 010
+	 *       |  |   | |   +- Burst Length = 4
+	 *       |  |   | +----- Burst Type   = Sequential
+	 *       |  |   +------- CAS Latency  = 2
+	 *       |  +----------- Operating Mode = Standard
+	 *       +-------------- Write Burst Mode = Programmed Burst Length
+	 */
+	memctl->memc_mar = 0x00000088;
+
+	/*
+	 * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
+	 * preliminary addresses - these have to be modified after the
+	 * SDRAM size has been determined.
+	 */
+	memctl->memc_or1 = CFG_OR1_PRELIM;
+	memctl->memc_br1 = CFG_BR1_PRELIM;
+
+	memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE));	/* no refresh yet */
+
+	udelay (200);
+
+	/* perform SDRAM initializsation sequence */
+
+	memctl->memc_mcr = 0x80002105;	/* CS1: SDRAM bank 0 */
+	udelay (1);
+	memctl->memc_mcr = 0x80002230;	/* CS1: SDRAM bank 0 - execute twice */
+	udelay (1);
+
+	memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */
+
+	udelay (1000);
+
+	/*
+	 * Check Bank 0 Memory Size for re-configuration
+	 *
+	 * try 8 column mode
+	 */
+	size8 = dram_size (CFG_MAMR_8COL,
+			   (ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
+
+	udelay (1000);
+
+	/*
+	 * try 9 column mode
+	 */
+	size9 = dram_size (CFG_MAMR_9COL,
+			   (ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
+
+	if (size8 < size9) {	/* leave configuration at 9 columns       */
+		size_b0 = size9;
+		/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
+	} else {		/* back to 8 columns                      */
+
+		size_b0 = size8;
+		memctl->memc_mamr = CFG_MAMR_8COL;
+		udelay (500);
+		/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
+	}
+
+	udelay (1000);
+
+	/*
+	 * Adjust refresh rate depending on SDRAM type, both banks
+	 * For types > 128 MBit leave it at the current (fast) rate
+	 */
+	if (size_b0 < 0x02000000) {
+		/* reduce to 15.6 us (62.4 us / quad) */
+		memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
+		udelay (1000);
+	}
+
+	/*
+	 * Final mapping: map bigger bank first
+	 */
+	memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
+	memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
+
+	{
+		unsigned long reg;
+
+		/* adjust refresh rate depending on SDRAM type, one bank */
+		reg = memctl->memc_mptpr;
+		reg >>= 1;	/* reduce to CFG_MPTPR_1BK_8K / _4K */
+		memctl->memc_mptpr = reg;
+	}
+
+	udelay (10000);
+
+	return (size_b0);
+}
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Check memory range for valid RAM. A simple memory test determines
+ * the actually available RAM size between addresses `base' and
+ * `base + maxsize'. Some (not all) hardware errors are detected:
+ * - short between address lines
+ * - short between data lines
+ */
+
+static long int
+dram_size (long int mamr_value, long int *base, long int maxsize)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8xx_t *memctl = &immap->im_memctl;
+
+	memctl->memc_mamr = mamr_value;
+
+	return (get_ram_size (base, maxsize));
+}
+
+/* ------------------------------------------------------------------------- */
+
+#define CFG_PA1     0x4000
+#define CFG_PA2     0x2000
+
+#define CFG_LBKs    (CFG_PA2 | CFG_PA1)
+
+void reset_phy (void)
+{
+	volatile immap_t *immr = (immap_t *) CFG_IMMR;
+
+	/*
+	 * Ensure LBK LXT901 ethernet 1 & 2 = 0 ... for normal loopback in effect
+	 *                                          and no AUI loopback
+	 */
+	immr->im_ioport.iop_padat &= ~CFG_LBKs;	/* PADAT (LBK eth 1&2 = 0)        */
+	immr->im_ioport.iop_papar &= ~CFG_LBKs;	/* PAPAR (0=general purpose I/O)  */
+	immr->im_ioport.iop_padir |= CFG_LBKs;	/* PADIR (I/O: 0=input, 1=output) */
+}
--- a/board/LEOX/elpt860/flash.c
+++ b/board/LEOX/elpt860/flash.c
@@ -0,0 +1,615 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+/*
+** Note 1: In this file, you have to provide the following variable:
+** ------
+**              flash_info_t    flash_info[CFG_MAX_FLASH_BANKS]
+** 'flash_info_t' structure is defined into 'include/flash.h'
+** and defined as extern into 'common/cmd_flash.c'
+**
+** Note 2: In this file, you have to provide the following functions:
+** ------
+**              unsigned long   flash_init(void)
+** called from 'board_init_r()' into 'common/board.c'
+**
+**              void            flash_print_info(flash_info_t *info)
+** called from 'do_flinfo()' into 'common/cmd_flash.c'
+**
+**              int             flash_erase(flash_info_t *info,
+**                                          int           s_first,
+**                                          int           s_last)
+** called from 'do_flerase()' & 'flash_sect_erase()' into 'common/cmd_flash.c'
+**
+**              int             write_buff (flash_info_t *info,
+**                                          uchar        *src,
+**                                          ulong         addr,
+**                                          ulong         cnt)
+** called from 'flash_write()' into 'common/cmd_flash.c'
+*/
+
+#include <common.h>
+#include <mpc8xx.h>
+
+
+#ifndef	CFG_ENV_ADDR
+#  define CFG_ENV_ADDR	(CFG_FLASH_BASE + CFG_ENV_OFFSET)
+#endif
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * Internal Functions
+ */
+static void   flash_get_offsets (ulong base, flash_info_t *info);
+static ulong  flash_get_size (volatile unsigned char *addr, flash_info_t *info);
+
+static int write_word (flash_info_t *info, ulong dest, ulong data);
+static int write_byte (flash_info_t *info, ulong dest, uchar data);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long
+flash_init (void)
+{
+  volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+  volatile memctl8xx_t *memctl = &immap->im_memctl;
+  unsigned long         size_b0;
+  int i;
+
+  /* Init: no FLASHes known */
+  for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
+    {
+      flash_info[i].flash_id = FLASH_UNKNOWN;
+    }
+
+  /* Static FLASH Bank configuration here - FIXME XXX */
+
+  size_b0 = flash_get_size ((volatile unsigned char *)FLASH_BASE0_PRELIM,
+			    &flash_info[0]);
+
+  if ( flash_info[0].flash_id == FLASH_UNKNOWN )
+    {
+      printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+	      size_b0, size_b0<<20);
+    }
+
+  /* Remap FLASH according to real size */
+  memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
+  memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_PS_8 | BR_V;
+
+  /* Re-do sizing to get full correct info */
+  size_b0 = flash_get_size ((volatile unsigned char *)CFG_FLASH_BASE,
+			    &flash_info[0]);
+
+  flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+  /* monitor protection ON by default */
+  flash_protect (FLAG_PROTECT_SET,
+		 CFG_MONITOR_BASE,
+		 CFG_MONITOR_BASE + monitor_flash_len-1,
+		 &flash_info[0]);
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+  /* ENV protection ON by default */
+  flash_protect(FLAG_PROTECT_SET,
+		CFG_ENV_ADDR,
+		CFG_ENV_ADDR + CFG_ENV_SIZE-1,
+		&flash_info[0]);
+#endif
+
+  flash_info[0].size = size_b0;
+
+  return (size_b0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void
+flash_get_offsets (ulong          base,
+		   flash_info_t  *info)
+{
+  int i;
+
+#define SECTOR_64KB    0x00010000
+
+  /* set up sector start adress table */
+  for (i = 0; i < info->sector_count; i++)
+    {
+      info->start[i] = base + (i * SECTOR_64KB);
+    }
+}
+
+/*-----------------------------------------------------------------------
+ */
+void
+flash_print_info (flash_info_t *info)
+{
+  int i;
+
+  if ( info->flash_id == FLASH_UNKNOWN )
+    {
+      printf ("missing or unknown FLASH type\n");
+      return;
+    }
+
+  switch ( info->flash_id & FLASH_VENDMASK )
+    {
+    case FLASH_MAN_AMD:	printf ("AMD ");		break;
+    case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+    case FLASH_MAN_STM: printf ("STM (Thomson) ");      break;
+    default:		printf ("Unknown Vendor ");	break;
+    }
+
+  switch ( info->flash_id & FLASH_TYPEMASK )
+    {
+    case FLASH_AM040:   printf ("AM29F040   (4 Mbits)\n");
+      break;
+    default:	        printf ("Unknown Chip Type\n");
+      break;
+    }
+
+  printf ("  Size: %ld KB in %d Sectors\n",
+	  info->size >> 10, info->sector_count);
+
+  printf ("  Sector Start Addresses:");
+  for (i=0; i<info->sector_count; ++i)
+    {
+      if ((i % 5) == 0)
+	printf ("\n   ");
+      printf (" %08lX%s",
+	      info->start[i],
+	      info->protect[i] ? " (RO)" : "     "
+	      );
+    }
+  printf ("\n");
+
+  return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+static ulong
+flash_get_size (volatile unsigned char *addr,
+		flash_info_t           *info)
+{
+  short i;
+  uchar value;
+  ulong base = (ulong)addr;
+
+  /* Write auto select command: read Manufacturer ID */
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+  addr[0x0555] = 0x90;
+
+  value = addr[0];
+
+  switch ( value )
+    {
+      /*    case AMD_MANUFACT: */
+    case 0x01:
+      info->flash_id = FLASH_MAN_AMD;
+      break;
+      /*    case FUJ_MANUFACT: */
+    case 0x04:
+      info->flash_id = FLASH_MAN_FUJ;
+      break;
+      /*    case STM_MANUFACT: */
+    case 0x20:
+      info->flash_id = FLASH_MAN_STM;
+      break;
+
+    default:
+      info->flash_id = FLASH_UNKNOWN;
+      info->sector_count = 0;
+      info->size = 0;
+      return (0);			/* no or unknown flash	*/
+    }
+
+  value = addr[1];			/* device ID		*/
+
+  switch ( value )
+    {
+    case STM_ID_F040B:
+    case AMD_ID_F040B:
+      info->flash_id += FLASH_AM040;    /* 4 Mbits = 512k * 8  */
+      info->sector_count = 8;
+      info->size = 0x00080000;
+      break;
+
+    default:
+      info->flash_id = FLASH_UNKNOWN;
+      return (0);			/* => no or unknown flash */
+    }
+
+  /* set up sector start adress table */
+  for (i = 0; i < info->sector_count; i++)
+    {
+      info->start[i] = base + (i * 0x00010000);
+    }
+
+  /* check for protected sectors */
+  for (i = 0; i < info->sector_count; i++)
+    {
+      /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+      /* D0 = 1 if protected */
+      addr = (volatile unsigned char *)(info->start[i]);
+      info->protect[i] = addr[2] & 1;
+    }
+
+  /*
+   * Prevent writes to uninitialized FLASH.
+   */
+  if ( info->flash_id != FLASH_UNKNOWN )
+    {
+      addr = (volatile unsigned char *)info->start[0];
+
+      *addr = 0xF0;	/* reset bank */
+    }
+
+  return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int
+flash_erase (flash_info_t  *info,
+	     int            s_first,
+	     int            s_last)
+{
+  volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
+  int flag, prot, sect, l_sect;
+  ulong start, now, last;
+
+  if ( (s_first < 0) || (s_first > s_last) )
+    {
+      if ( info->flash_id == FLASH_UNKNOWN )
+	{
+	  printf ("- missing\n");
+	}
+      else
+	{
+	  printf ("- no sectors to erase\n");
+	}
+      return ( 1 );
+    }
+
+  if ( (info->flash_id == FLASH_UNKNOWN) ||
+       (info->flash_id > FLASH_AMD_COMP) )
+    {
+      printf ("Can't erase unknown flash type %08lx - aborted\n",
+	      info->flash_id);
+      return ( 1 );
+    }
+
+  prot = 0;
+  for (sect=s_first; sect<=s_last; ++sect)
+    {
+      if ( info->protect[sect] )
+	{
+	  prot++;
+	}
+    }
+
+  if ( prot )
+    {
+      printf ("- Warning: %d protected sectors will not be erased!\n", prot);
+    }
+  else
+    {
+      printf ("\n");
+    }
+
+  l_sect = -1;
+
+  /* Disable interrupts which might cause a timeout here */
+  flag = disable_interrupts();
+
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+  addr[0x0555] = 0x80;
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+
+  /* Start erase on unprotected sectors */
+  for (sect = s_first; sect<=s_last; sect++)
+    {
+      if (info->protect[sect] == 0)    /* not protected */
+	{
+	  addr = (volatile unsigned char *)(info->start[sect]);
+	  addr[0] = 0x30;
+	  l_sect = sect;
+	}
+    }
+
+  /* re-enable interrupts if necessary */
+  if ( flag )
+    enable_interrupts();
+
+  /* wait at least 80us - let's wait 1 ms */
+  udelay (1000);
+
+  /*
+   * We wait for the last triggered sector
+   */
+  if ( l_sect < 0 )
+    goto DONE;
+
+  start = get_timer (0);
+  last  = start;
+  addr = (volatile unsigned char *)(info->start[l_sect]);
+  while ( (addr[0] & 0x80) != 0x80 )
+    {
+      if ( (now = get_timer(start)) > CFG_FLASH_ERASE_TOUT )
+	{
+	  printf ("Timeout\n");
+	  return ( 1 );
+	}
+      /* show that we're waiting */
+      if ( (now - last) > 1000 )     /* every second */
+	{
+	  putc ('.');
+	  last = now;
+	}
+    }
+
+DONE:
+  /* reset to read mode */
+  addr = (volatile unsigned char *)info->start[0];
+  addr[0] = 0xF0;	/* reset bank */
+
+  printf (" done\n");
+
+  return ( 0 );
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int
+write_buff (flash_info_t  *info,
+	    uchar         *src,
+	    ulong          addr,
+	    ulong          cnt)
+{
+  ulong cp, wp, data;
+  uchar bdata;
+  int i, l, rc;
+
+  if ( (info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 )
+    {
+      /* Width of the data bus: 8 bits */
+
+      wp = addr;
+
+      while ( cnt )
+	{
+	  bdata = *src++;
+
+	  if ( (rc = write_byte(info, wp, bdata)) != 0 )
+	    {
+	      return (rc);
+	    }
+
+	  ++wp;
+	  --cnt;
+	}
+
+      return ( 0 );
+    }
+  else
+    {
+      /* Width of the data bus: 32 bits */
+
+      wp = (addr & ~3);	/* get lower word aligned address */
+
+      /*
+       * handle unaligned start bytes
+       */
+      if ( (l = addr - wp) != 0 )
+	{
+	  data = 0;
+	  for (i=0, cp=wp; i<l; ++i, ++cp)
+	    {
+	      data = (data << 8) | (*(uchar *)cp);
+	    }
+	  for (; i<4 && cnt>0; ++i)
+	    {
+	      data = (data << 8) | *src++;
+	      --cnt;
+	      ++cp;
+	    }
+	  for (; cnt==0 && i<4; ++i, ++cp)
+	    {
+	      data = (data << 8) | (*(uchar *)cp);
+	    }
+
+	  if ( (rc = write_word(info, wp, data)) != 0 )
+	    {
+	      return (rc);
+	    }
+	  wp += 4;
+	}
+
+      /*
+       * handle word aligned part
+       */
+      while ( cnt >= 4 )
+	{
+	  data = 0;
+	  for (i=0; i<4; ++i)
+	    {
+	      data = (data << 8) | *src++;
+	    }
+	  if ( (rc = write_word(info, wp, data)) != 0 )
+	    {
+	      return (rc);
+	    }
+	  wp  += 4;
+	  cnt -= 4;
+	}
+
+      if ( cnt == 0 )
+	{
+	  return (0);
+	}
+
+      /*
+       * handle unaligned tail bytes
+       */
+      data = 0;
+      for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp)
+	{
+	  data = (data << 8) | *src++;
+	  --cnt;
+	}
+      for (; i<4; ++i, ++cp)
+	{
+	  data = (data << 8) | (*(uchar *)cp);
+	}
+
+      return (write_word(info, wp, data));
+    }
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int
+write_word (flash_info_t  *info,
+	    ulong          dest,
+	    ulong          data)
+{
+  vu_long *addr = (vu_long*)(info->start[0]);
+  ulong start;
+  int flag;
+
+  /* Check if Flash is (sufficiently) erased */
+  if ( (*((vu_long *)dest) & data) != data )
+    {
+      return (2);
+    }
+  /* Disable interrupts which might cause a timeout here */
+  flag = disable_interrupts();
+
+  addr[0x0555] = 0x00AA00AA;
+  addr[0x02AA] = 0x00550055;
+  addr[0x0555] = 0x00A000A0;
+
+  *((vu_long *)dest) = data;
+
+  /* re-enable interrupts if necessary */
+  if ( flag )
+    enable_interrupts();
+
+  /* data polling for D7 */
+  start = get_timer (0);
+  while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) )
+    {
+      if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
+	{
+	  return (1);
+	}
+    }
+
+  return (0);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a byte to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int
+write_byte (flash_info_t  *info,
+	    ulong          dest,
+	    uchar          data)
+{
+  volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
+  ulong  start;
+  int    flag;
+
+  /* Check if Flash is (sufficiently) erased */
+  if ( (*((volatile unsigned char *)dest) & data) != data )
+    {
+      return (2);
+    }
+  /* Disable interrupts which might cause a timeout here */
+  flag = disable_interrupts();
+
+  addr[0x0555] = 0xAA;
+  addr[0x02AA] = 0x55;
+  addr[0x0555] = 0xA0;
+
+  *((volatile unsigned char *)dest) = data;
+
+  /* re-enable interrupts if necessary */
+  if ( flag )
+    enable_interrupts();
+
+  /* data polling for D7 */
+  start = get_timer (0);
+  while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) )
+    {
+      if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
+	{
+	  return (1);
+	}
+    }
+
+  return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
--- a/board/LEOX/elpt860/u-boot.lds
+++ b/board/LEOX/elpt860/u-boot.lds
@@ -0,0 +1,151 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o			(.text)
+    common/dlmalloc.o			(.text)
+    lib_ppc/ppcstring.o			(.text)
+    lib_generic/vsprintf.o		(.text)
+    lib_generic/crc32.o			(.text)
+    lib_generic/zlib.o			(.text)
+    lib_generic/string.o		(.text)
+    lib_ppc/cache.o			(.text)
+    lib_ppc/extable.o			(.text)
+    lib_ppc/time.o			(.text)
+    lib_ppc/ticks.o			(.text)
+
+    . = env_offset;
+    common/environment.o		(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/LEOX/elpt860/u-boot.lds.debug
+++ b/board/LEOX/elpt860/u-boot.lds.debug
@@ -0,0 +1,139 @@
+/*
+**=====================================================================
+**
+** Copyright (C) 2000, 2001, 2002, 2003
+** The LEOX team <team@leox.org>, http://www.leox.org
+**
+** LEOX.org is about the development of free hardware and software resources
+**   for system on chip.
+**
+** Description: U-Boot port on the LEOX's ELPT860 CPU board
+** ~~~~~~~~~~~
+**
+**=====================================================================
+**
+** This program is free software; you can redistribute it and/or
+** modify it under the terms of the GNU General Public License as
+** published by the Free Software Foundation; either version 2 of
+** the License, or (at your option) any later version.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+**
+** You should have received a copy of the GNU General Public License
+** along with this program; if not, write to the Free Software
+** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+** MA 02111-1307 USA
+**
+**=====================================================================
+*/
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mpc8xx/start.o		(.text)
+    common/dlmalloc.o		(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o		(.text)
+
+    . = env_offset;
+    common/environment.o	(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
+++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
@@ -30,47 +30,47 @@
 #include "via686.h"

 __asm(" .globl send_kb                                      \n
-        send_kb:                                            \n
-                lis     r9, 0xfe00                          \n
-                                                            \n
-                li      r4, 0x10        # retries           \n
-                mtctr   r4                                  \n
-                                                            \n
-        idle:                                               \n
-                lbz     r4, 0x64(r9)                        \n
-                andi.   r4, r4, 0x02                        \n
-                bne     idle                                \n
-                                                            \n
-        ready:                                              \n
-                stb     r3, 0x60(r9)                        \n
-                                                            \n
-        check:                                              \n
-                lbz     r4, 0x64(r9)                        \n
-                andi.   r4, r4, 0x01                        \n
-                beq     check                               \n
-                                                            \n
-                lbz     r4, 0x60(r9)                        \n
-                cmpwi   r4, 0xfa                            \n
-                beq     done                                \n
-                                                            \n
-                bdnz    idle                                \n
-                                                            \n
-                li      r3, 0                               \n
-                blr                                         \n
-                                                            \n
-        done:                                               \n
-                li      r3, 1                               \n
-                blr                                         \n
-                                                            \n
-        .globl test_kb                                      \n
-        test_kb:                                            \n
-                mflr    r10                                 \n
-	        li      r3, 0xed                            \n
-                bl      send_kb                             \n
-                li      r3, 0x01                            \n
-                bl      send_kb                             \n
-                mtlr    r10                                 \n
-                blr                                         \n
+	send_kb:                                            \n
+		lis     r9, 0xfe00                          \n
+							    \n
+		li      r4, 0x10        # retries           \n
+		mtctr   r4                                  \n
+							    \n
+	idle:                                               \n
+		lbz     r4, 0x64(r9)                        \n
+		andi.   r4, r4, 0x02                        \n
+		bne     idle                                \n
+							    \n
+	ready:                                              \n
+		stb     r3, 0x60(r9)                        \n
+							    \n
+	check:                                              \n
+		lbz     r4, 0x64(r9)                        \n
+		andi.   r4, r4, 0x01                        \n
+		beq     check                               \n
+							    \n
+		lbz     r4, 0x60(r9)                        \n
+		cmpwi   r4, 0xfa                            \n
+		beq     done                                \n
+							    \n
+		bdnz    idle                                \n
+							    \n
+		li      r3, 0                               \n
+		blr                                         \n
+							    \n
+	done:                                               \n
+		li      r3, 1                               \n
+		blr                                         \n
+							    \n
+	.globl test_kb                                      \n
+	test_kb:                                            \n
+		mflr    r10                                 \n
+		li      r3, 0xed                            \n
+		bl      send_kb                             \n
+		li      r3, 0x01                            \n
+		bl      send_kb                             \n
+		mtlr    r10                                 \n
+		blr                                         \n
 ");


@@ -86,7 +86,6 @@ long initdram (int board_type)
 }


-
 void after_reloc (ulong dest_addr, gd_t *gd)
 {
 /* HJF:	DECLARE_GLOBAL_DATA_PTR; */
--- a/board/MAI/AmigaOneG3SE/Makefile
+++ b/board/MAI/AmigaOneG3SE/Makefile
@@ -33,14 +33,14 @@ COBJS	= $(BOARD).o articiaS.o flash.o serial.o smbus.o articiaS_pci.o \

 AOBJS	= board_asm_init.o memio.o

-OBJS	= $(COBJS) $(AOBJS) 
+OBJS	= $(COBJS) $(AOBJS)

 EMUDIR  = ../bios_emulator/scitech/src/x86emu/
 EMUOBJ  = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \
 		$(EMUDIR)ops.o $(EMUDIR)sys.o
 EMUSRC = $(EMUOBJ:.o=.c)

-$(LIB):	.depend $(OBJS) $(EMUSRC) 
+$(LIB):	.depend $(OBJS) $(EMUSRC)
 	make libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)
 	-rm $(LIB)
 	$(AR) crv $@ $(OBJS) $(EMUOBJ)
--- a/board/MAI/AmigaOneG3SE/articiaS.c
+++ b/board/MAI/AmigaOneG3SE/articiaS.c
@@ -1,6 +1,6 @@
 /*
 * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com 
+ * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
@@ -572,7 +572,7 @@ long articiaS_ram_init (void)
 	if (banks[3].used)
 		burst_support = banks[3].burst_len;

-	/* 
+	/*
 	   ** Mode register:
 	   ** Bits         Use
 	   ** 0-2          Burst len
@@ -675,7 +675,7 @@ static __inline__ void set_msr (unsigned long msr)
 	asm volatile ("mtmsr %0"::"r" (msr));
 }

-int board_pre_init (void)
+int board_early_init_f (void)
 {
 	unsigned char c_value = 0;
 	unsigned long msr;
--- a/board/MAI/AmigaOneG3SE/articiaS.h
+++ b/board/MAI/AmigaOneG3SE/articiaS.h
@@ -99,14 +99,14 @@
 #define XDBCR_HWTOXD          (1<<0)
 #define XDBCR_KBTOXD          (1<<1)
 #define XDBCR_RTCTOXD         (1<<2)
-#define XDBCR_SCALE_1_1       (0x0<<3)       
-#define XDBCR_SCALE_2_2       (0x1<<3)       
-#define XDBCR_SCALE_3_2       (0x2<<3)       
-#define XDBCR_SCALE_4_4       (0x3<<3)       
-#define XDBCR_SCALE_5_8       (0x4<<3)       
-#define XDBCR_SCALE_6_8       (0x5<<3)       
-#define XDBCR_SCALE_8_8       (0x6<<3)       
-#define XDBCR_SCALE_0_16      (0x7<<3)       
+#define XDBCR_SCALE_1_1       (0x0<<3)
+#define XDBCR_SCALE_2_2       (0x1<<3)
+#define XDBCR_SCALE_3_2       (0x2<<3)
+#define XDBCR_SCALE_4_4       (0x3<<3)
+#define XDBCR_SCALE_5_8       (0x4<<3)
+#define XDBCR_SCALE_6_8       (0x5<<3)
+#define XDBCR_SCALE_8_8       (0x6<<3)
+#define XDBCR_SCALE_0_16      (0x7<<3)
 #define XDBCR_XDPROM          (1<<7)


@@ -134,7 +134,6 @@
 #define ARTICIAS_ISAIO_PHYS    0xfe002000


-
 /* Prototypes */
 long articiaS_ram_init(void);
 void articiaS_pci_init(void);
--- a/board/MAI/AmigaOneG3SE/articiaS_pci.c
+++ b/board/MAI/AmigaOneG3SE/articiaS_pci.c
@@ -123,14 +123,14 @@ struct pci_irq_fixup_table fixuptab [] =
 {
    { 0, 0, 0, 0xff},        /* Articia S host bridge */
    { 0, 1, 0, 0xff},        /* Articia S AGP bridge */
-//    { 0, 6, 0, 0x05},        /* 3COM ethernet */
+/*    { 0, 6, 0, 0x05},        /###* 3COM ethernet */
    { 0, 7, 0, 0xff},        /* VIA southbridge */
    { 0, 7, 1, 0x0e},        /* IDE controller in legacy mode */
-//    { 0, 7, 2, 0x05},        /* First USB controller */
-//    { 0, 7, 3, 0x0c},        /* Second USB controller (shares interrupt with ethernet) */
+/*    { 0, 7, 2, 0x05},        /###* First USB controller */
+/*    { 0, 7, 3, 0x0c},        /###* Second USB controller (shares interrupt with ethernet) */
    { 0, 7, 4, 0xff},        /* ACPI Power Management */
-//    { 0, 7, 5, 0x08},        /* AC97 */
-//    { 0, 7, 6, 0x08},        /* MC97 */
+/*    { 0, 7, 5, 0x08},        /###* AC97 */
+/*    { 0, 7, 6, 0x08},        /###* MC97 */
    { 0xff, 0xff, 0xff, 0xff}
 };

@@ -287,7 +287,7 @@ void articiaS_pci_init (void)

    PRINTF("atriciaS_pci_init\n");

-    // Why aren't these relocated??
+    /* Why aren't these relocated?? */
    for (i=0; config_table[i].config_device; i++)
    {
 	switch((int)config_table[i].config_device)
@@ -335,7 +335,6 @@ void articiaS_pci_init (void)
 		   PCI_REGION_IO);


-
    articiaS_hose.region_count = 4;

    pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
@@ -410,8 +409,8 @@ pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_c
 	    pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
 	    pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
 	    class = c1<<8 | c2;
-	    //printf("At %02x:%02x:%02x: class %x\n",
-	    //	   PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class);
+	    /*printf("At %02x:%02x:%02x: class %x\n", */
+	    /*	   PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
 	    if (class == find_class)
 	    {
 		if (index == 0)
@@ -441,7 +440,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)

    if (hose == NULL) hose = &articiaS_hose;

-    if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; // Not in range
+    if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */

    /*
     * The bridge must be on a lower bus number
@@ -467,7 +466,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)

 		if (!PCI_FUNC(dev))
 		    found_multi = header_type & 0x80;
-		if (header_type == 1) // Bridge device header
+		if (header_type == 1) /* Bridge device header */
 		{
 		    pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
 		    if ((int)secondary_bus == busnr) return dev;
@@ -512,7 +511,7 @@ int articiaS_init_vga (void)
 	PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
 	/* Find the first of this class on this bus */
 	dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
-	if (dev != ~0) 
+	if (dev != ~0)
 	{
 	    PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
 	    break;
--- a/board/MAI/AmigaOneG3SE/board_asm_init.S
+++ b/board/MAI/AmigaOneG3SE/board_asm_init.S
@@ -1,14 +1,13 @@
-	#include	"macros.h"
-	
-	
+#include	"macros.h"

-#define GLOBALINFO0	      0x50	
+
+#define GLOBALINFO0	      0x50
 #define GLOBALINFO0_BO        (1<<7)
 #define GLOBALINFO2_B1ARBITER (1<<6)
 #define HBUSACR0              0x5c
 #define HBUSACR2_BURST        (1<<0)
 #define HBUSACR2_LAT          (1<<1)
-	
+
 #define RECEIVER_HOLDING 0
 #define TRANSMITTER_HOLDING 0
 #define INTERRUPT_ENABLE 1
@@ -35,9 +34,9 @@

 #define SUPERIO_1               ((7 << 3) | (0))
 #define SUPERIO_2               ((7 << 3) | (1))
-	
+
 	.globl	board_asm_init
-	
+
 board_asm_init:
 	mflr	r29
 	/* Set 'Must-set' register */
@@ -77,7 +76,7 @@ board_asm_init:
 	li	r5, 0x47
 	bl	pci_write_cfg_byte*/

-	
+
 	/* Enable NVRAM for environment */
 	li	r3, 0
 	li	r4, 0
@@ -91,7 +90,7 @@ board_asm_init:
 	siowb	0x40, 0x08
 	siowb	0x41, 0x01
 	siowb	0x45, 0x80
-	siowb	0x46, 0x60	
+	siowb	0x46, 0x60
 	siowb	0x47, 0x20
 	siowb	0x48, 0x01
 	siowb	0x4a, 0xc4
@@ -103,7 +102,7 @@ board_asm_init:
 	siowb	0x56, 0x99
 	siowb	0x57, 0x90
 	siowb	0x85, 0x01
-		
+
 	/* Enable configuration mode for SuperIO */
 	li	r3, 0
 	li	r4, (7<<3)
@@ -128,7 +127,7 @@ board_asm_init:
 	ori	r3, r3, 0x0c
 	outb	0x3f0, 0xe2
 	outbr	0x3f1, r3
-	
+
 	/* Disable configuration mode */
 	li	r3, 0
 	li	r4, (7<<3)
@@ -145,7 +144,7 @@ board_asm_init:
 	mtlr	r29
 	blr

-		
+
 	.globl	new_reset
 	.globl	new_reset_end
 new_reset:
@@ -153,5 +152,5 @@ new_reset:
 	oris	r0, r0, 0xFFF0
 	mtlr	r0
 	blr
-	
-new_reset_end:	
+
+new_reset_end:
--- a/board/MAI/AmigaOneG3SE/cmd_boota.c
+++ b/board/MAI/AmigaOneG3SE/cmd_boota.c
@@ -1,6 +1,5 @@
 #include <common.h>
 #include <command.h>
-#include <cmd_boota.h>
 #include "../disk/part_amiga.h"
 #include <asm/cache.h>

@@ -121,3 +120,10 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])

 	return 0;
 }
+#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
+U_BOOT_CMD(
+	boota,   3,      1,      do_boota,
+	"boota   - boot an Amiga kernel\n",
+	"address disk"
+);
+#endif /* _CMD_BOOTA_H */
--- a/board/MAI/AmigaOneG3SE/config.mk
+++ b/board/MAI/AmigaOneG3SE/config.mk
@@ -29,5 +29,4 @@ X86EMU =  -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86e

 TEXT_BASE = 0xfff00000

-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG 
-
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG
--- a/board/MAI/AmigaOneG3SE/enet.c
+++ b/board/MAI/AmigaOneG3SE/enet.c
@@ -36,45 +36,45 @@

 /* 3Com Ethernet PCI definitions*/

-// #define PCI_VENDOR_ID_3COM		0x10B7
+/* #define PCI_VENDOR_ID_3COM		0x10B7 */
 #define PCI_DEVICE_ID_3COM_3C905C	0x9200

 /* 3Com Commands, top 5 bits are command and bottom 11 bits are parameters */

-#define TotalReset 		(0<<11) 
+#define TotalReset 		(0<<11)
 #define SelectWindow 		(1<<11)
 #define StartCoax 		(2<<11)
-#define RxDisable 		(3<<11) 
-#define RxEnable 		(4<<11) 
+#define RxDisable 		(3<<11)
+#define RxEnable 		(4<<11)
 #define RxReset 		(5<<11)
-#define UpStall 		(6<<11) 
+#define UpStall 		(6<<11)
 #define UpUnstall 		(6<<11)+1
-#define DownStall 		(6<<11)+2 
+#define DownStall 		(6<<11)+2
 #define DownUnstall 		(6<<11)+3
 #define RxDiscard 		(8<<11)
 #define TxEnable 		(9<<11)
-#define TxDisable 		(10<<11) 
+#define TxDisable 		(10<<11)
 #define TxReset 		(11<<11)
-#define FakeIntr 		(12<<11) 
-#define AckIntr 		(13<<11) 
+#define FakeIntr 		(12<<11)
+#define AckIntr 		(13<<11)
 #define SetIntrEnb 		(14<<11)
-#define SetStatusEnb 		(15<<11) 
+#define SetStatusEnb 		(15<<11)
 #define SetRxFilter 		(16<<11)
 #define SetRxThreshold 		(17<<11)
-#define SetTxThreshold 		(18<<11) 
+#define SetTxThreshold 		(18<<11)
 #define SetTxStart 		(19<<11)
 #define StartDMAUp 		(20<<11)
 #define StartDMADown 		(20<<11)+1
 #define StatsEnable		(21<<11)
-#define StatsDisable		(22<<11) 
+#define StatsDisable		(22<<11)
 #define StopCoax 		(23<<11)
 #define SetFilterBit 		(25<<11)

 /* The SetRxFilter command accepts the following classes */

-#define RxStation 		1 
-#define RxMulticast		2 
-#define RxBroadcast		4 
+#define RxStation 		1
+#define RxMulticast		2
+#define RxBroadcast		4
 #define RxProm 			8

 /* 3Com status word defnitions */
@@ -83,12 +83,12 @@
 #define HostError 		0x0002
 #define TxComplete 		0x0004
 #define TxAvailable 		0x0008
-#define RxComplete 		0x0010 
+#define RxComplete 		0x0010
 #define RxEarly 		0x0020
 #define IntReq 			0x0040
 #define StatsFull 		0x0080
 #define DMADone 		(1<<8)
-#define DownComplete 		(1<<9) 
+#define DownComplete 		(1<<9)
 #define UpComplete 		(1<<10)
 #define DMAInProgress 		(1<<11)			/* DMA controller is still busy.*/
 #define CmdInProgress 		(1<<12)           	/* EL3_CMD is still busy.*/
@@ -114,31 +114,31 @@

 /* EEPROM locations. */

-#define PhysAddr01		0 
+#define PhysAddr01		0
 #define PhysAddr23		1
-#define PhysAddr45		2 
+#define PhysAddr45		2
 #define ModelID			3
-#define EtherLink3ID		7 
-#define IFXcvrIO		8 
+#define EtherLink3ID		7
+#define IFXcvrIO		8
 #define IRQLine			9
-#define NodeAddr01		10 
-#define NodeAddr23		11 
+#define NodeAddr01		10
+#define NodeAddr23		11
 #define NodeAddr45		12
-#define DriverTune		13 
+#define DriverTune		13
 #define Checksum		15

 /* Register window 1 offsets, the window used in normal operation */

-#define TX_FIFO 		0x10  
-#define RX_FIFO 		0x10  
+#define TX_FIFO 		0x10
+#define RX_FIFO 		0x10
 #define RxErrors 		0x14
-#define RxStatus 		0x18  
-#define Timer			0x1A 
+#define RxStatus 		0x18
+#define Timer			0x1A
 #define TxStatus 		0x1B
 #define TxFree 			0x1C	 		/* Remaining free bytes in Tx buffer. */

 /* Register Window 2 */
-        
+
 #define Wn2_ResetOptions	12

 /* Register Window 3: MAC/config bits */
@@ -148,11 +148,11 @@
 #define Wn3_Options		8

 #define BFEXT(value, offset, bitcount)  					\
-    	((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
+	((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))

 #define BFINS(lhs, rhs, offset, bitcount)                                       \
-        (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) |   		\
-        (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
+	(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) |   		\
+	(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))

 #define RAM_SIZE(v)             BFEXT(v, 0, 3)
 #define RAM_WIDTH(v)    	BFEXT(v, 3, 1)
@@ -163,7 +163,7 @@
 #define AUTOSELECT(v)   	BFEXT(v, 24, 1)

 /* Register Window 4: Xcvr/media bits */
-        
+
 #define Wn4_FIFODiag 		4
 #define Wn4_NetDiag 		6
 #define Wn4_PhysicalMgmt	8
@@ -196,28 +196,28 @@
 #define DN_COMPLETE     0x00010000                      /* This packet has been downloaded */

 struct rx_desc_3com {
-        u32 next;                                       /* Last entry points to 0	   	*/
-        u32 status;					/* FSH -> Frame Start Header 		*/
-        u32 addr;                                       /* Up to 63 addr/len pairs possible 	*/
-        u32 length;                                     /* Set LAST_FRAG to indicate last pair	*/
+	u32 next;                                       /* Last entry points to 0	   	*/
+	u32 status;					/* FSH -> Frame Start Header 		*/
+	u32 addr;                                       /* Up to 63 addr/len pairs possible 	*/
+	u32 length;                                     /* Set LAST_FRAG to indicate last pair	*/
 };

 /* Values for the Rx status entry. */

 #define RxDComplete		0x00008000
 #define RxDError		0x4000
-#define IPChksumErr		(1<<25) 
-#define TCPChksumErr		(1<<26) 
+#define IPChksumErr		(1<<25)
+#define TCPChksumErr		(1<<26)
 #define UDPChksumErr		(1<<27)
-#define IPChksumValid		(1<<29) 
+#define IPChksumValid		(1<<29)
 #define TCPChksumValid		(1<<30)
 #define UDPChksumValid		(1<<31)

 struct tx_desc_3com {
-        u32 next;                                       /* Last entry points to 0		*/
-        u32 status;                                     /* bits 0:12 length, others see below	*/
-        u32 addr;
-        u32 length;
+	u32 next;                                       /* Last entry points to 0		*/
+	u32 status;                                     /* bits 0:12 length, others see below	*/
+	u32 addr;
+	u32 length;
 };

 /* Values for the Tx status entry. */
@@ -232,9 +232,9 @@ struct tx_desc_3com {
 /* XCVR Types */

 #define XCVR_10baseT		0
-#define XCVR_AUI		1 
+#define XCVR_AUI		1
 #define XCVR_10baseTOnly	2
-#define XCVR_10base2		3 
+#define XCVR_10base2		3
 #define XCVR_100baseTx		4
 #define XCVR_100baseFx		5
 #define XCVR_MII		6
@@ -243,10 +243,10 @@ struct tx_desc_3com {
 #define XCVR_Default		10			/* I don't think this is correct -> should have been 0x10 if Auto Negotiate */

 struct descriptor {			    		/* A generic descriptor. */
-        u32 next;                                       /* Last entry points to 0	   	*/
-        u32 status;					/* FSH -> Frame Start Header 		*/
-        u32 addr;                                       /* Up to 63 addr/len pairs possible 	*/
-        u32 length;                                     /* Set LAST_FRAG to indicate last pair	*/
+	u32 next;                                       /* Last entry points to 0	   	*/
+	u32 status;					/* FSH -> Frame Start Header 		*/
+	u32 addr;                                       /* Up to 63 addr/len pairs possible 	*/
+	u32 length;                                     /* Set LAST_FRAG to indicate last pair	*/
 };

 /* Misc. definitions */
@@ -338,7 +338,7 @@ static inline int ETH_STATUS(struct eth_device* dev)

 static inline void ETH_CMD(struct eth_device* dev, int command)
 {
-	*(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command); 
+	*(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command);
    __asm volatile ("eieio");
 }

@@ -348,24 +348,24 @@ static inline void ETH_CMD(struct eth_device* dev, int command)
 static int issue_and_wait(struct eth_device* dev, int command)
 {

-        int i, status;
+	int i, status;

 	ETH_CMD(dev, command);
-        for (i = 0; i < 2000; i++) {
-                status = ETH_STATUS(dev);
-		//printf ("Issue: status 0x%4x.\n", status);
+	for (i = 0; i < 2000; i++) {
+		status = ETH_STATUS(dev);
+		/*printf ("Issue: status 0x%4x.\n", status); */
 		if (!(status & CmdInProgress))
-                        return 1;
-        }
+			return 1;
+	}

-        /* OK, that didn't work.  Do it the slow way.  One second */
-        for (i = 0; i < 100000; i++) {
-                status = ETH_STATUS(dev);
-		//printf ("Issue: status 0x%4x.\n", status);
-                        return 1;
-                udelay(10);
-        }
-        PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
+	/* OK, that didn't work.  Do it the slow way.  One second */
+	for (i = 0; i < 100000; i++) {
+		status = ETH_STATUS(dev);
+		/*printf ("Issue: status 0x%4x.\n", status); */
+			return 1;
+		udelay(10);
+	}
+	PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
 	return 0;
 }

@@ -378,7 +378,7 @@ static int auto_negotiate(struct eth_device* dev)

    EL3WINDOW(dev, 1);

-    // Wait for Auto negotiation to complete
+    /* Wait for Auto negotiation to complete */
    for (i = 0; i <= 1000; i++)
    {
 	if (ETH_INW(dev, 2) & 0x04)
@@ -391,7 +391,6 @@ static int auto_negotiate(struct eth_device* dev)
 	    return 0;
 	}
    }
-    


    return 1;
@@ -430,10 +429,10 @@ void eth_interrupt(struct eth_device *dev)

 int eth_3com_initialize(bd_t *bis)
 {
-        u32 eth_iobase = 0, status;
-        int card_number = 0, ret;
-        struct eth_device* dev;
-        pci_dev_t devno;
+	u32 eth_iobase = 0, status;
+	int card_number = 0, ret;
+	struct eth_device* dev;
+	pci_dev_t devno;
 	char *s;

 	s = getenv("3com_base");
@@ -453,10 +452,10 @@ int eth_3com_initialize(bd_t *bis)
 	}

 	ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &eth_iobase);
-        eth_iobase &= ~0xf;
+	eth_iobase &= ~0xf;

 	PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
-  
+
 	pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);

 	 /* Check if I/O accesses and Bus Mastering are enabled */
@@ -481,28 +480,28 @@ int eth_3com_initialize(bd_t *bis)
 		goto Done;
 	}

-        dev = (struct eth_device*) malloc(sizeof(*dev)); //struct eth_device));
+	dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */

-        sprintf(dev->name, "3Com 3c920c#%d", card_number);
-        dev->iobase = eth_iobase;
-        dev->priv   = (void*) devno;
-        dev->init   = eth_3com_init;
-        dev->halt   = eth_3com_halt;
-        dev->send   = eth_3com_send;
-        dev->recv   = eth_3com_recv;
+	sprintf(dev->name, "3Com 3c920c#%d", card_number);
+	dev->iobase = eth_iobase;
+	dev->priv   = (void*) devno;
+	dev->init   = eth_3com_init;
+	dev->halt   = eth_3com_halt;
+	dev->send   = eth_3com_send;
+	dev->recv   = eth_3com_recv;

-        eth_register(dev);
+	eth_register(dev);

 /* 	{ */
 /* 	    char interrupt; */
 /* 	    devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
 /* 	    pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
-	    
+
 /* 	    printf("Installing eth0 interrupt handler to %d\n", interrupt); */
 /* 	    irq_install_handler(interrupt, eth_interrupt, dev); */
 /* 	} */

-        card_number++;
+	card_number++;

 	/* Set the latency timer for value */
 	s = getenv("3com_latency");
@@ -532,13 +531,13 @@ int eth_3com_initialize(bd_t *bis)
 		PRINTF ("Cannot allocate memory for RX_RING.....\n");
 		goto Done;
 	}
-	
+
 	if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16)))
 	{
 		PRINTF ("Cannot allocate memory for TX_RING.....\n");
 		goto Done;
 	}
-	
+
 Done:
 	return status;
 }
@@ -552,7 +551,7 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
 	struct descriptor *ias_cmd;

 	/* Determine what type of network the machine is connected to	*/
-	/* presently drops the connect to 10Mbps			*/	     
+	/* presently drops the connect to 10Mbps			*/

 	if (!auto_negotiate(dev))
 	{
@@ -560,43 +559,43 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
 		goto Done;
 	}

-        issue_and_wait(dev, TxReset);
-        issue_and_wait(dev, RxReset|0x04);
+	issue_and_wait(dev, TxReset);
+	issue_and_wait(dev, RxReset|0x04);

-        /* Switch to register set 7 for normal use. */
-        EL3WINDOW(dev, 7);
+	/* Switch to register set 7 for normal use. */
+	EL3WINDOW(dev, 7);

 	/* Initialize Rx and Tx rings */

 	init_rx_ring(dev);
 	purge_tx_ring(dev);

- 	ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
+	ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);

-        issue_and_wait(dev,SetTxStart|0x07ff);
+	issue_and_wait(dev,SetTxStart|0x07ff);

-        /* Below sets which indication bits to be seen. */
+	/* Below sets which indication bits to be seen. */

-        status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
-        ETH_CMD(dev, status_enable);
+	status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
+	ETH_CMD(dev, status_enable);

 	/* Below sets no bits are to cause an interrupt since this is just polling */

-        intr_enable   = SetIntrEnb;
-//	intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6);
-        ETH_CMD(dev, intr_enable);
+	intr_enable   = SetIntrEnb;
+/*	intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
+	ETH_CMD(dev, intr_enable);
 	ETH_OUTB(dev, 127, UpPoll);

-        /* Ack all pending events, and set active indicator mask */
+	/* Ack all pending events, and set active indicator mask */

-        ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
-        ETH_CMD(dev, intr_enable);
+	ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
+	ETH_CMD(dev, intr_enable);

 	/* Tell the adapter where the RX ring is located */

 	issue_and_wait(dev,UpStall);				/* Stall and set the UplistPtr 		*/
 	ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
-        ETH_CMD(dev, RxEnable); 				/* Enable the receiver. 		*/
+	ETH_CMD(dev, RxEnable); 				/* Enable the receiver. 		*/
 	issue_and_wait(dev,UpUnstall);

 	/* Send the Individual Address Setup frame */
@@ -612,7 +611,7 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)

 	/* Tell the adapter where the TX ring is located */

-        ETH_CMD(dev, TxEnable); 				/* Enable transmitter. 			*/
+	ETH_CMD(dev, TxEnable); 				/* Enable transmitter. 			*/
 	issue_and_wait(dev, DownStall);				/* Stall and set the DownListPtr. 	*/
 	ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
 	issue_and_wait(dev, DownUnstall);
@@ -627,13 +626,13 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
 	}
 	if (ETH_STATUS(dev) & DownComplete)			/* If DownLoad Complete ACK the bit 	*/
 	{
-        	ETH_CMD(dev, AckIntr | DownComplete);		/* acknowledge the indication bit	*/
- 		issue_and_wait(dev, DownStall);			/* stall and clear DownListPtr 		*/
+		ETH_CMD(dev, AckIntr | DownComplete);		/* acknowledge the indication bit	*/
+		issue_and_wait(dev, DownStall);			/* stall and clear DownListPtr 		*/
 		ETH_OUTL(dev, 0, DownListPtr);
 		issue_and_wait(dev, DownUnstall);
 	}
 	status = 1;
-	    
+
 Done:
 	return status;
 }
@@ -673,8 +672,8 @@ int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
 	}
 	if (ETH_STATUS(dev) & DownComplete)			/* If DownLoad Complete ACK the bit 	*/
 	{
-        	ETH_CMD(dev, AckIntr | DownComplete);		/* acknowledge the indication bit	*/
- 		issue_and_wait(dev, DownStall);			/* stall and clear DownListPtr 		*/
+		ETH_CMD(dev, AckIntr | DownComplete);		/* acknowledge the indication bit	*/
+		issue_and_wait(dev, DownStall);			/* stall and clear DownListPtr 		*/
 		ETH_OUTL(dev, 0, DownListPtr);
 		issue_and_wait(dev, DownUnstall);
 	}
@@ -710,15 +709,15 @@ int eth_3com_recv(struct eth_device* dev)
 	status = le32_to_cpu(rx_ring[rx_next].status);		/* packet status		*/

 	while (status & (1<<15))
-	{		
+	{
 		/* A packet has been received */

-		if (status & (1<<15))		
+		if (status & (1<<15))
 		{
 			/* A valid frame received  */
-			
+
 			length = le32_to_cpu(rx_ring[rx_next].status) & 0x1fff;		/* length is in bits 0 - 12 	*/
-			
+
 			/* Pass the packet up to the protocol layers */

 			NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length);
@@ -748,7 +747,7 @@ Done:

 void eth_3com_halt(struct eth_device* dev)
 {
-	if (!(dev->iobase)) 
+	if (!(dev->iobase))
 	{
 		goto Done;
 	}
@@ -758,14 +757,14 @@ void eth_3com_halt(struct eth_device* dev)
 	issue_and_wait(dev, RxDisable);
 	issue_and_wait(dev, TxDisable);

-//	free(tx_ring);				/* release memory allocated to the DPD and UPD rings */
-//	free(rx_ring);
+/*	free(tx_ring);				/###* release memory allocated to the DPD and UPD rings */
+/*	free(rx_ring); */

 Done:
 	return;
 }

-static void init_rx_ring(struct eth_device* dev) 
+static void init_rx_ring(struct eth_device* dev)
 {
 	int i;

@@ -782,7 +781,7 @@ static void init_rx_ring(struct eth_device* dev)
 	rx_next = 0;
 }

-static void purge_tx_ring(struct eth_device* dev) 
+static void purge_tx_ring(struct eth_device* dev)
 {
 	int i;

@@ -799,39 +798,39 @@ static void purge_tx_ring(struct eth_device* dev)
 	}
 }

-static void read_hw_addr(struct eth_device* dev, bd_t *bis) 
+static void read_hw_addr(struct eth_device* dev, bd_t *bis)
 {
 	u8 hw_addr[ETH_ALEN];
 	unsigned int eeprom[0x40];
 	unsigned int checksum = 0;
 	int i, j, timer;

-        /* Read the station address from the EEPROM. */
+	/* Read the station address from the EEPROM. */

-        EL3WINDOW(dev, 0);
+	EL3WINDOW(dev, 0);
 	for (i = 0; i < 0x40; i++)
 	{
-        	ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
-                /* Pause for at least 162 us. for the read to take place. */
-                for (timer = 10; timer >= 0; timer--) 
+		ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
+		/* Pause for at least 162 us. for the read to take place. */
+		for (timer = 10; timer >= 0; timer--)
 		{
-                	udelay(162);
-                        if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
-                        	break;
-                }
-                eeprom[i] = ETH_INW(dev, Wn0EepromData);
-        }
+			udelay(162);
+			if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
+				break;
+		}
+		eeprom[i] = ETH_INW(dev, Wn0EepromData);
+	}

 	/* Checksum calculation.  I'm not sure about this part and there seems to be a bug on the 3com side of things */

-        for (i = 0; i < 0x21; i++)
-                checksum  ^= eeprom[i];
-        checksum = (checksum ^ (checksum >> 8)) & 0xff;
+	for (i = 0; i < 0x21; i++)
+		checksum  ^= eeprom[i];
+	checksum = (checksum ^ (checksum >> 8)) & 0xff;

-        if (checksum != 0xbb)
-                printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
+	if (checksum != 0xbb)
+		printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);

-        for (i = 0, j = 0; i < 3; i++)
+	for (i = 0, j = 0; i < 3; i++)
 	{
 		hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
 		hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
@@ -839,9 +838,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)

 	/*  MAC Address is in window 2, write value from EEPROM to window 2 */

-        EL3WINDOW(dev, 2);
-        for (i = 0; i < 6; i++)
-                ETH_OUTB(dev, hw_addr[i], i);
+	EL3WINDOW(dev, 2);
+	for (i = 0; i < 6; i++)
+		ETH_OUTB(dev, hw_addr[i], i);

 	for (j = 0; j < ETH_ALEN; j+=2)
 	{
@@ -849,9 +848,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
 		hw_addr[j+1] = (u8)((ETH_INW(dev, j) >> 8) & 0xff);
 	}

-	for (i=0;i<ETH_ALEN;i++) 
+	for (i=0;i<ETH_ALEN;i++)
 	{
-		if (hw_addr[i] != bis->bi_enetaddr[i]) 
+		if (hw_addr[i] != bis->bi_enetaddr[i])
 		{
 /* 			printf("Warning: HW address don't match:\n"); */
 /* 			printf("Address in 3Com Window 2 is         " */
@@ -870,9 +869,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
 			bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0)
 		    {

-			sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X", 
-				hw_addr[0], hw_addr[1], hw_addr[2], 
-				hw_addr[3], hw_addr[4], hw_addr[5]); 
+			sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
+				hw_addr[0], hw_addr[1], hw_addr[2],
+				hw_addr[3], hw_addr[4], hw_addr[5]);
 			setenv("ethaddr", buffer);
 		    }
 		}
@@ -883,4 +882,3 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
 Done:
 	return;
 }
-
--- a/board/MAI/AmigaOneG3SE/flash_new.c
+++ b/board/MAI/AmigaOneG3SE/flash_new.c
@@ -27,11 +27,10 @@
 #include <common.h>
 #include <flash.h>
 #include <asm/io.h>
-#include "memio.h" 
+#include "memio.h"

 /*---------------------------------------------------------------------*/
 #undef DEBUG_FLASH
-//#define DEBUG_FLASH

 #ifdef DEBUG_FLASH
 #define DEBUGF(fmt,args...) printf(fmt ,##args)
@@ -68,7 +67,7 @@ static void flash_to_mem(void)
    unsigned char x;

    flash_xd_nest --;
-   
+
    if (flash_xd_nest == 0)
    {
 	DEBUGF("Flash on memory bus\n");
@@ -120,7 +119,7 @@ unsigned long flash_init (void)
 		/* monitor protection ON by default */
 		flash_protect(FLAG_PROTECT_SET,
 			      CFG_MONITOR_BASE,
-			      CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+			      CFG_MONITOR_BASE + monitor_flash_len - 1,
 			      &flash_info[0]);
 #endif

@@ -327,7 +326,7 @@ static int flash_get_offsets (ulong base, flash_info_t *info)
 			/* set sector offsets for uniform sector type	*/
 			for (i = 0; i < info->sector_count; i++) {
 				info->start[i] = base + i * info->size /
-				                            info->sector_count;
+							    info->sector_count;
 			}
 			break;
 		default:
@@ -478,7 +477,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		}

 		if ((rc = write_word(info, wp, data)) != 0) {
-		        flash_to_mem();
+			flash_to_mem();
 			return (rc);
 		}
 		wp += 4;
@@ -493,7 +492,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 			data = (data << 8) | *src++;
 		}
 		if ((rc = write_word(info, wp, data)) != 0) {
-		        flash_to_mem();
+			flash_to_mem();
 			return (rc);
 		}
 		wp  += 4;
@@ -582,7 +581,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
 */
 static void flash_reset (ulong addr)
 {
-        flash_to_xd();
+	flash_to_xd();
 	out8(addr, 0xF0);	/* reset bank */
 	iobarrier_rw();
 	flash_to_mem();
@@ -633,10 +632,10 @@ void flash_print_info (flash_info_t *info)
 			info->size / 0x100000, info->sector_count);
 	} else if (info->size % 0x400 == 0) {
 		printf ("  Size: %ld KB in %d Sectors\n",
-		        info->size / 0x400, info->sector_count);
+			info->size / 0x400, info->sector_count);
 	} else {
 		printf ("  Size: %ld B in %d Sectors\n",
-		        info->size, info->sector_count);
+			info->size, info->sector_count);
 	}

 	printf ("  Sector Start Addresses:");
--- a/board/MAI/AmigaOneG3SE/i8259.c
+++ b/board/MAI/AmigaOneG3SE/i8259.c
@@ -75,16 +75,16 @@ void i8259_init(void)
 	char dummy;
 	PRINTF("Initializing Interrupt controller\n");
 	/* init master interrupt controller */
-	out8(0x20, 0x11); //0x19); // was: 0x11); /* Start init sequence */
+	out8(0x20, 0x11); /* 0x19); /###* Start init sequence */
 	out8(0x21, 0x00); /* Vector base */
 	out8(0x21, 0x04); /* edge tiggered, Cascade (slave) on IRQ2 */
-	out8(0x21, 0x11); // was: 0x01); /* Select 8086 mode */
+	out8(0x21, 0x11); /* was: 0x01); /###* Select 8086 mode */

 	/* init slave interrupt controller */
-	out8(0xA0, 0x11); //0x19); // was: 0x11); /* Start init sequence */
+	out8(0xA0, 0x11); /* 0x19); /###* Start init sequence */
 	out8(0xA1, 0x08); /* Vector base */
 	out8(0xA1, 0x02); /* edge triggered, Cascade (slave) on IRQ2 */
-	out8(0xA1, 0x11); // was: 0x01); /* Select 8086 mode */
+	out8(0xA1, 0x11); /* was: 0x01); /###* Select 8086 mode */

 	/* always read ISR */
 	out8(0x20, 0x0B);
--- a/board/MAI/AmigaOneG3SE/interrupts.c
+++ b/board/MAI/AmigaOneG3SE/interrupts.c
@@ -73,7 +73,7 @@ get_msr(void)
 static __inline__ void
 set_msr(unsigned long msr)
 {
-	asm volatile("mtmsr %0" : : "r" (msr)); 
+	asm volatile("mtmsr %0" : : "r" (msr));
 }

 static __inline__ unsigned long
@@ -89,7 +89,7 @@ get_dec(void)
 static __inline__ void
 set_dec(unsigned long val)
 {
-	asm volatile("mtdec %0" : : "r" (val)); 
+	asm volatile("mtdec %0" : : "r" (val));
 }


@@ -167,8 +167,8 @@ external_interrupt(struct pt_regs *regs)

 	int irq, unmask = 1;

-	irq = i8259_irq(); //i8259_get_irq(regs);
-//	printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000);
+	irq = i8259_irq(); /*i8259_get_irq(regs); */
+/*	printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); */
 	i8259_mask_and_ack(irq);

 	if (irq_handlers[irq].handler != NULL)
@@ -264,5 +264,3 @@ do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 {
 	puts("IRQ related functions are unimplemented currently.\n");
 }
-
-
--- a/board/MAI/AmigaOneG3SE/macros.h
+++ b/board/MAI/AmigaOneG3SE/macros.h
@@ -5,20 +5,20 @@
 	/*
 	** Load a long integer into a register
 	*/
-      	.macro liw reg, value
-                lis \reg, \value@h
-                ori \reg, \reg, \value@l
-        .endm
+	.macro liw reg, value
+		lis \reg, \value@h
+		ori \reg, \reg, \value@l
+	.endm


-	/* 
+	/*
 	** Generate config_addr request
 	** This macro expects the values in registers:
 	** r3 - bus
 	** r4 - devfn
 	** r5 - offset
 	*/
-	.macro config_addr 	
+	.macro config_addr
 		rlwinm	r9, r5, 24, 0, 6
 		rlwinm	r8, r4, 16, 0, 31
 		rlwinm	r7, r3, 8, 0, 31
@@ -31,7 +31,7 @@
 		sync
 	.endm

-	
+
 	/*
 	** Generate config_data address
 	*/
@@ -45,40 +45,40 @@
 	/*
 	** Write a byte value to an output port
 	*/
-        .macro outb port, value
-                lis     r2, 0xfe00
-                li      r0, \value
-                stb     r0, \port(r2)
-        .endm
+	.macro outb port, value
+		lis     r2, 0xfe00
+		li      r0, \value
+		stb     r0, \port(r2)
+	.endm


 	/*
 	** Write a register byte value to an output port
 	*/
-        .macro outbr port, value
-                lis     r2, 0xfe00
-                stb     \value, \port(r2)
-        .endm
+	.macro outbr port, value
+		lis     r2, 0xfe00
+		stb     \value, \port(r2)
+	.endm


-	/* 
+	/*
 	** Read a byte value from a port into a specified register
 	*/
-        .macro inb reg, port
-                lis     r2, 0xfe00
-                lbz     \reg, \port(r2)
-        .endm
+	.macro inb reg, port
+		lis     r2, 0xfe00
+		lbz     \reg, \port(r2)
+	.endm


 	/*
 	** Write a byte to the SuperIO config area
 	*/
-        .macro siowb offset, value
-                li      r3, 0
-                li      r4, (7<<3)
-                li      r5, \offset
-                li      r6, \value
-                bl      pci_write_cfg_byte
-        .endm
+	.macro siowb offset, value
+		li      r3, 0
+		li      r4, (7<<3)
+		li      r5, \offset
+		li      r6, \value
+		bl      pci_write_cfg_byte
+	.endm

 #endif
--- a/board/MAI/AmigaOneG3SE/memio.S
+++ b/board/MAI/AmigaOneG3SE/memio.S
@@ -1,9 +1,8 @@
 #include	"macros.h"

-	

 	.globl pci_read_cfg_byte
-	
+
 pci_read_cfg_byte:
 	config_addr
 	config_data	3
@@ -12,11 +11,10 @@ pci_read_cfg_byte:
 	lbz	r3, 0(r9)
 	blr

-	

 	.globl pci_write_cfg_byte
-	
-pci_write_cfg_byte:	
+
+pci_write_cfg_byte:
 	config_addr
 	config_data	3
 	stb	r6, 0(r9)
@@ -25,9 +23,8 @@ pci_write_cfg_byte:
 	blr


-
 	.globl pci_read_cfg_word
-	
+
 pci_read_cfg_word:
 	config_addr
 	config_data	2
@@ -37,9 +34,8 @@ pci_read_cfg_word:
 	blr


-	
 	.globl pci_write_cfg_word
-	
+
 pci_write_cfg_word:
 	config_addr
 	config_data	2
@@ -48,10 +44,9 @@ pci_write_cfg_word:
 	sync
 	blr

-	

 	.globl pci_read_cfg_long
-	
+
 pci_read_cfg_long:
 	config_addr
 	config_data	0
@@ -61,9 +56,8 @@ pci_read_cfg_long:
 	blr


-
 	.globl pci_write_cfg_long
-	
+
 pci_write_cfg_long:
 	config_addr
 	config_data	0
@@ -71,4 +65,3 @@ pci_write_cfg_long:
 	eieio
 	sync
 	blr
-
--- a/board/MAI/AmigaOneG3SE/memio.h
+++ b/board/MAI/AmigaOneG3SE/memio.h
@@ -2,7 +2,7 @@
 * Memory mapped IO
 *
 * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com 
+ * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
@@ -15,9 +15,9 @@
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 *
- */ 
+ */

 #ifndef _MEMIO_H
 #define _MEMIO_H
@@ -97,8 +97,8 @@ static inline void write_long_big(volatile uint32 *to, uint32 x)

 #define CONFIG_ADDR(bus, devfn, offset) \
    write_long_big((uint32 *)0xFEC00CF8,           \
-                   ((offset & 0xFC)<<24) | (devfn << 16)  \
-                   | (bus<<8) | 0x80);
+		   ((offset & 0xFC)<<24) | (devfn << 16)  \
+		   | (bus<<8) | 0x80);
 #define CONFIG_DATA(offset,mask) ((void *)(0xFEE00CFC+(offset & mask)))


--- a/board/MAI/AmigaOneG3SE/nvram.c
+++ b/board/MAI/AmigaOneG3SE/nvram.c
@@ -1,6 +1,6 @@
 /*
 * (C) Copyright 2002
- * Thomas Frieden, Hyperion Entertainment 
+ * Thomas Frieden, Hyperion Entertainment
 * ThomasF@hyperion-entertainment.com
 *
 * See file CREDITS for list of people who contributed to this
@@ -34,4 +34,3 @@ void disable_nvram(void)
 {
    pci_write_cfg_byte(0, 0, 0x56, 0x0);
 }
-
--- a/board/MAI/AmigaOneG3SE/ps2kbd.c
+++ b/board/MAI/AmigaOneG3SE/ps2kbd.c
@@ -1,7 +1,7 @@
 /*
 * (C) Copyright 2002
 * John W. Linville, linville@tuxdriver.com
- * 
+ *
 * Modified from code for support of MIP405 and PIP405 boards.  Previous
 * copyright follows.
 *
@@ -48,7 +48,6 @@ void i8259_unmask_irq(unsigned int irq);


 #undef KBG_DEBUG
-//#define KBG_DEBUG

 #ifdef KBG_DEBUG
 #define	PRINTF(fmt,args...)	printf (fmt ,##args)
@@ -143,8 +142,6 @@ void i8259_unmask_irq(unsigned int irq);
 #define 	KBD_BUFFER_LEN 0x20  /* size of the keyboardbuffer */


-
-
 static volatile char kbd_buffer[KBD_BUFFER_LEN];
 static volatile int in_pointer = 0;
 static volatile int out_pointer = 0;
@@ -172,7 +169,7 @@ static unsigned char kbd_plain_xlate[] = {
 	 '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,  /* 0x50 - 0x5F */
 	'\r',0xff,0xff
 	};
-	  	  
+
 static unsigned char kbd_shift_xlate[] = {
 	0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t',	/* 0x00 - 0x0f */
 	 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S',	/* 0x10 - 0x1f */
@@ -194,7 +191,7 @@ static unsigned char kbd_ctrl_xlate[] = {
 	};

 /******************************************************************
- * Init 
+ * Init
 ******************************************************************/

 int isa_kbd_init(void)
@@ -252,7 +249,7 @@ int drv_isa_kbd_init (void)
 			error=console_assign(stdin,DEVNAME);
 			if(error==0)
 				return 1;
-			else 
+			else
 				return error;
 		}
 		return 1;
@@ -261,7 +258,7 @@ int drv_isa_kbd_init (void)
 }

 /******************************************************************
- * Queue handling 
+ * Queue handling
 ******************************************************************/
 /* puts character in the queue and sets up the in and out pointer */
 void kbd_put_queue(char data)
@@ -287,7 +284,7 @@ int kbd_testc(void)
 	if(in_pointer==out_pointer)
 		return(0); /* no data */
 	else
-		return(1);	
+		return(1);
 }
 /* gets the character from the queue */
 int kbd_getc(void)
@@ -295,13 +292,13 @@ int kbd_getc(void)
 	char c;

 	while(in_pointer==out_pointer);
-	if((out_pointer+1)==KBD_BUFFER_LEN) 
+	if((out_pointer+1)==KBD_BUFFER_LEN)
 		out_pointer=0;
 	else
 		out_pointer++;
 	c=kbd_buffer[out_pointer];
 	return (int)c;
-	
+
 }


@@ -324,7 +321,7 @@ void kbd_set_leds(void)
 	kbd_send_data(KBD_CMD_SET_LEDS);
 	kbd_send_data(leds);
 }
-	
+

 void handle_keyboard_event(unsigned char scancode)
 {
@@ -381,11 +378,11 @@ void handle_keyboard_event(unsigned char scancode)
 		console_changed = 1;
 	    }
 	    return;
-	case 0x2A: 
+	case 0x2A:
 		case 0x36: /* shift pressed */
 			shift=1;
 			return; /* do nothing else */
-		case 0xAA: 
+		case 0xAA:
 		case 0xB6: /* shift released */
 			shift=0;
 			return; /* do nothing else */
@@ -408,15 +405,15 @@ void handle_keyboard_event(unsigned char scancode)
 		case 0x3A: /* capslock pressed */
 			caps_lock=~caps_lock;
 			kbd_set_leds();
-			return; 
+			return;
 		case 0x45: /* numlock pressed */
 			num_lock=~num_lock;
 			kbd_set_leds();
-			return; 
+			return;
 		case 0xC6: /* scroll lock released */
 		case 0xC5: /* num lock released */
 		case 0xBA: /* caps lock released */
-			return; /* just swallow */ 
+			return; /* just swallow */
 	}
 	if((scancode&0x80)==0x80) /* key released */
 		return;
@@ -456,7 +453,7 @@ void handle_keyboard_event(unsigned char scancode)
 		PRINTF("unkown scancode %X\n",scancode);
 		return; /* swallow unknown codes */
 	}
-	
+
 	kbd_put_queue(keycode);
 	PRINTF("%x\n",keycode);
 }
@@ -494,30 +491,29 @@ unsigned char handle_kbd_event(void)
 }


-
 /******************************************************************************
 * Lowlevel Part of keyboard section
- */  
+ */
 unsigned char kbd_read_status(void)
 {
 	return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT));
-} 
-  
+}
+
 unsigned char kbd_read_input(void)
 {
 	return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT));
-} 
+}

 void kbd_write_command(unsigned char cmd)
 {
 	out8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd);
-} 
-  
+}
+
 void kbd_write_output(unsigned char data)
 {
 	out8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data);
-} 
- 
+}
+
 int kbd_read_data(void)
 {
 	int val;
@@ -537,7 +533,7 @@ int kbd_wait_for_input(void)
 {
 	unsigned long timeout;
 	int val;
-	
+
 	timeout = KBD_TIMEOUT;
 	val=kbd_read_data();
 	while(val < 0)
@@ -602,7 +598,7 @@ char * kbd_initialize(void)
 	 * If the test is successful a x55 is placed in the input buffer.
 	 */
 	kbd_write_command_w(KBD_CCMD_SELF_TEST);
-	if (kbd_wait_for_input() != 0x55) 
+	if (kbd_wait_for_input() != 0x55)
 		return "Kbd:   failed self test";
 	/*
 	 * Perform a keyboard interface test.  This causes the controller
@@ -610,7 +606,7 @@ char * kbd_initialize(void)
 	 * test are placed in the input buffer.
 	 */
 	kbd_write_command_w(KBD_CCMD_KBD_TEST);
-	if (kbd_wait_for_input() != 0x00) 
+	if (kbd_wait_for_input() != 0x00)
 		return "Kbd:   interface failed self test";
 	/*
 	 * Enable the keyboard by allowing the keyboard clock to run.
@@ -628,7 +624,7 @@ char * kbd_initialize(void)
 	do {
 		kbd_write_output_w(KBD_CMD_RESET);
 		status = kbd_wait_for_input();
-		if (status == KBD_REPLY_ACK) 
+		if (status == KBD_REPLY_ACK)
 			break;
 		if (status != KBD_REPLY_RESEND)
 		{
@@ -692,8 +688,3 @@ void kbd_interrupt(void)
 {
 	handle_kbd_event();
 }
-
-
-
-/* eof */
-
--- a/board/MAI/AmigaOneG3SE/ps2kbd.h
+++ b/board/MAI/AmigaOneG3SE/ps2kbd.h
@@ -1,7 +1,7 @@
 /*
 * (C) Copyright 2002
 * John W. Linville, linville@tuxdriver.com
- * 
+ *
 * Modified from code for support of MIP405 and PIP405 boards.  Previous
 * copyright follows.
 *
@@ -30,7 +30,7 @@

 #ifndef _KBD_H_
 #define _KBD_H_
-   
+
 extern int kbd_testc(void);
 extern int kbd_getc(void);
 extern void kbd_interrupt(void);
--- a/board/MAI/AmigaOneG3SE/short_types.h
+++ b/board/MAI/AmigaOneG3SE/short_types.h
@@ -2,7 +2,7 @@
 * short type names
 *
 * (C) Copyright 2002
- * Hyperion Entertainment, ThomasF@hyperion-entertainment.com 
+ * Hyperion Entertainment, ThomasF@hyperion-entertainment.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
--- a/board/MAI/AmigaOneG3SE/smbus.c
+++ b/board/MAI/AmigaOneG3SE/smbus.c
@@ -26,18 +26,18 @@ void sm_write_byte(uint8 writeme)
 {
    int i;
    int level;
-    
+
    out_byte(0xA539, 0x00);

    level = 0;

    for (i=0; i<8; i++)
    {
-	if ((writeme & 0x80) == (level<<7)) 
-        {
+	if ((writeme & 0x80) == (level<<7))
+	{
 	    /* Bit did not change, rewrite strobe */
 	    out_byte(0xA539, level | 0x02);
-	    out_byte(0xA539, level); 
+	    out_byte(0xA539, level);
 	}
 	else
 	{
@@ -68,7 +68,7 @@ uint8 sm_read_byte(void)
    }

    return retme;
-} 
+}

 int sm_get_ack(void)
 {
@@ -106,36 +106,36 @@ void sm_send_stop(void)

 int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
 {
-    // S Addr Wr
+    /* S Addr Wr */
    sm_write_mode();
    sm_send_start();
    sm_write_byte((addr<<1));
-    
-    // [A]
+
+    /* [A] */
    sm_read_mode();
    if (sm_get_ack() == FALSE) return FALSE;

-    // Comm
+    /* Comm */
    sm_write_mode();
    sm_write_byte(reg);
-    
-    // [A]
+
+    /* [A] */
    sm_read_mode();
    if (sm_get_ack() == FALSE) return FALSE;

-    // S Addr Rd
+    /* S Addr Rd */
    sm_write_mode();
    sm_send_start();
    sm_write_byte((addr<<1)|1);
-    
-    // [A]
+
+    /* [A] */
    sm_read_mode();
    if (sm_get_ack() == FALSE) return FALSE;

-    // [Data]
+    /* [Data] */
    *storage = sm_read_byte();
-    
-    // NA
+
+    /* NA */
    sm_write_mode();
    sm_write_nack();
    sm_send_stop();
@@ -144,10 +144,10 @@ int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
 }

 void sm_init(void)
-{  
+{
    /* Switch to PMC mode */
    pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
- 
+
    /* Set GPIO Base */
    pci_write_cfg_long(0, 0, 0x40, 0xa500);

@@ -155,12 +155,12 @@ void sm_init(void)
    pci_write_cfg_byte(0, 0, 0x44, 0x11);

    /* Set both GPIO 0 and 1 as output */
-    out_byte(0xA53A, 0x03); 
+    out_byte(0xA53A, 0x03);
 }


 void sm_term(void)
-{  
+{
    /* Switch to normal mode */
    pci_write_cfg_byte(0, 0, REG_GROUP, 0);
 }
@@ -173,7 +173,7 @@ int sm_get_data(uint8 *DataArray, int dimm_socket)
 #if 0
    /* Switch to PMC mode */
    pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER));
- 
+
    /* Set GPIO Base */
    pci_write_cfg_long(0, 0, 0x40, 0xa500);

@@ -181,7 +181,7 @@ int sm_get_data(uint8 *DataArray, int dimm_socket)
    pci_write_cfg_byte(0, 0, 0x44, 0x11);

    /* Set both GPIO 0 and 1 as output */
-    out_byte(0xA53A, 0x03); 
+    out_byte(0xA53A, 0x03);
 #endif

    sm_init();
--- a/board/MAI/AmigaOneG3SE/start.txt
+++ b/board/MAI/AmigaOneG3SE/start.txt
@@ -1,201 +1,198 @@
-
-	/*------------------------------------------------------*/
-        /*              TERON Articia / SDRAM Init              */
-        /*------------------------------------------------------*/
-
-*       XD_CTL  = 0x81000000			(0x74)
-
-*       HBUS_ACC_CTL_0 &= 0xFFFFFDFF		(0x5c)
-                       /* host bus access ctl reg 2(5e) */
-                       /* set - CPU read from memory data one clock after data is latched */
-
-*       GLOBL_INFO_0 |= 0x00004000		(0x50)
-                      /* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
-
-        PCI_1_SB_CONFIG_0 |= 0x00000400         (0x80d0)
-                        /* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
-
-        MEM_RAS_CTL_0 |= 0x3f000000		(0xcc)
-		      &= 0x3fffffff
-                      /* RAS park control reg 0(cc), park access enable is set */
-		      
-        HOST_RDBUF_CTL |= 0x10000000		(0x70)
-	               &= 0x10ffffff
-                      /* host read buffer control reg, enable prefetch for CPU read from DRAM control */
-
-        HBUS_ACC_CTL_0 |= 0x0100001f		(0x5c)
-		       &= 0xf1ffffff
-                      /* host bus access control register, enable CPU address bus pipe control	*/
-                      /* two outstanding requests,  *** changed to 2 from 3				*/
-                      /* enable line merge write control for CPU write to system memory, PCI 1	*/
-                      /* and PCI 0 bus memory; enable page merge write control for write to		*/
-                      /* PCI bus 0 & bus 1 memory							*/
-
-        SRAM_CTL |= 0x00004000			(0xc8)
-		 &= 0xffbff7ff
-                      /* DRAM detail timing control register 1 (ca), bit 3 set to 0	*/
-                      /* DRAM start access latency control - wait for one clock	*/
-                      /* ff9f changed to ffbf						*/
-    
-        DIM0_TIM_CTL_0 = 0x737d737d             (0xc9)
-                      /* DRAM timing control for dimm0 & dimm1; set wait one clock	*/
-                      /* cycle for next data access 					*/
-
-        DIM2_TIM_CTL_0 = 0x737d737d             (0xca)
-                      /* DRAM timing control for dimm2 & dimm3; set wait one clock	*/
-                      /* cycle for next data access 					*/
-
-        DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB    (0x90)
-	              /* set dimm0 bank0 for 128 MB	*/
-
-        DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB    (0x94)
-                      /* set dimm0 for  bank1		*/
-
-        DIM0_TIM_CTL_0 = 0xf3bf0000             (0xc9)
-                      /* dimm0 timing control register; RAS - CAS latency - 4 clock		*/
-                      /* CAS access latency - 3 wait; pre-charge latency - 3 wait		*/
-                      /* pre-charge command period control - 5 clock; wait one clock		*/
-                      /* cycle for next data access; read to write access latency control	*/
-                      /* - 2 clock cycles							*/
-
-        DRAM_GBL_CTL_0 |= 0x00000100            (0xc0)
-		       &= 0xffff01ff
-                      /* memory global control register - support buffer sdram on bank 0	*/
-
-        DRAM_ECC_CTL_0 |= 0x00260000		(0xc4)
-		       &= 0xff26ffff
-                      /* enable ECC; enable read, modify, write control	*/
- 
-        DRAM_REF_CTL_0 = DRAM_REF_DATA          (0xb8)
-		      /* set DRAM refresh parameters *** changed to 00940100	*/
-
-        nop
-        nop
-        nop
-        nop
-        nop
-
-        DRAM_ECC_CTL_0 |= 0x20243280		(0xc4)
-                      /* turn off ecc		*/
-                      /* for SDRAM bank 0	*/
-
-        DRAM_ECC_CTL_0 |= 0x20243290            (0xc4) ?
-                      /* for SDRAM bank 1	*/
- 
-
-/* Additional Stuff...*/
-
-        GLOBL_CTRL |= 0x20000b00		(0x54)
-
-        PCI_0_SB_CONFIG |= 0x04100007		(0xd0)
-                      /* PCI 0 Side band config reg*/
-
-        0x8000083c |= 0x00080000
-                      /* Disable VGA decode on PCI Bus 1 */
-
-
-/*End Additional Stuff..*/
-
-        /*--------------------------------------------------------------*/
-        /*              TERON serial port initialization code           */
-        /*--------------------------------------------------------------*/
-
-	0x84380080 |= 0x00030000
-                     /* enable super IO configuration VIA chip Register 85	*/
-		     /* Enable super I/O config mode */
-
-        0xfe0003f0 = 0xe2
-        bl delay1
-
-        0xfe0003f1 = 0x0f
-	bl delay1
-	            /* enable com1 & com2, parallel port disabled */ 
-	
-	0xfe0003f0 = 0xe7
-        bl delay1
-	            /* let's make com1 base as 0x3f8 */
-        
-        0xfe0003f1 = 0xfe
-        bl delay1
-
-        0xfe0003f0 = 0xe8
-        bl delay1           
-		    /* let's make com2 base as 0x2f8 */
-
-	0xfe0003f1 = 0xbe
-
-	0x84380080 &= 0xfffdffff
-                    /* closing super IO configuration VIA chip Register 85   */
-     
-
-/* -------------------------------*/
-
-        0xfe0003fb = 0x83
-	bl delay1
-                   /*latch enable word length -8 bit */         /* set mslab bit	*/
-        0xfe0003f8 = 0x0c
-	bl delay1
-                   /* set baud rate lsb for 9600 baud	*/
-        0xfe0003f9 = 0x0
-	bl delay1
-                   /* set baud rate msb for 9600 baud	*/
-        0xfe0003fb  = 0x03
-	bl delay1
-                      /* reset mslab	*/
-
-	/*--------------------------------------------------------------*/
-        /*              END TERON Serial Port Initialization Code       */
-        /*--------------------------------------------------------------*/
-
-   
-
-        /*--------------------------------------------------------------*/
-        /*      END TERON Articia / SDRAM Initialization code           */
-        /*--------------------------------------------------------------*/
-
-Proposed from Documentation:
-
-write dmem 0xfec00cf8 0x50000080
-write dmem 0xfee00cfc 0xc0305411
-
-      Writes to index 0x50-0x53. 
-      0x50: Global Information Register 0
-	    0xC0 = Little Endian CPU, Sequential order Burst
-      0x51: Global Information Register 1
-	    Read only, 0x30 = Provides PowerPC and X86 support
-      0x52: Global Information Register 2
-	    0x05 = 64/128 bit CPU bus support
-      0x53: Global Information Register 3
-	    0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted
-
-write dmem 0xfec00cf8 0x5c000080
-write dmem 0xfee00cfc 0xb300011F
-
-write dmem 0xfec00cf8 0xc8000080
-write dmem 0xfee00cfc 0x0020f100
-
-write dmem 0xfec00cf8 0x90000080
-write dmem 0xfee00cfc 0x007fe700
-
-write dmem 0xfec00cf8 0x9400080
-write dmem 0xfee00cfc 0x007fe700
-
-write dmem 0xfec00cf8 0xb0000080
-write dmem 0xfee00cfc 0x737d737d
-
-write dmem 0xfec00cf8 0xb4000080
-write dmem 0xfee00cfc 0x737d737d
-
-write dmem 0xfec00cf8 0xc0000080
-write dmem 0xfee00cfc 0x40005500
-
-write dmem 0xfec00cf8 0xb8000080
-write dmem 0xfee00cfc 0x00940100
-
-write dmem 0xfec00cf8 0xc4000080
-write dmem 0xfee00cfc 0x00003280
-
-write dmem 0xfec00cf8 0xc4000080
-write dmem 0xfee00cfc 0x00003290
-
-
+
+	/*------------------------------------------------------*/
+	/*              TERON Articia / SDRAM Init              */
+	/*------------------------------------------------------*/
+
+*       XD_CTL  = 0x81000000			(0x74)
+
+*       HBUS_ACC_CTL_0 &= 0xFFFFFDFF		(0x5c)
+		       /* host bus access ctl reg 2(5e) */
+		       /* set - CPU read from memory data one clock after data is latched */
+
+*       GLOBL_INFO_0 |= 0x00004000		(0x50)
+		      /* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
+
+	PCI_1_SB_CONFIG_0 |= 0x00000400         (0x80d0)
+			/* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
+
+	MEM_RAS_CTL_0 |= 0x3f000000		(0xcc)
+		      &= 0x3fffffff
+		      /* RAS park control reg 0(cc), park access enable is set */
+
+	HOST_RDBUF_CTL |= 0x10000000		(0x70)
+		       &= 0x10ffffff
+		      /* host read buffer control reg, enable prefetch for CPU read from DRAM control */
+
+	HBUS_ACC_CTL_0 |= 0x0100001f		(0x5c)
+		       &= 0xf1ffffff
+		      /* host bus access control register, enable CPU address bus pipe control	*/
+		      /* two outstanding requests,  *** changed to 2 from 3				*/
+		      /* enable line merge write control for CPU write to system memory, PCI 1	*/
+		      /* and PCI 0 bus memory; enable page merge write control for write to		*/
+		      /* PCI bus 0 & bus 1 memory							*/
+
+	SRAM_CTL |= 0x00004000			(0xc8)
+		 &= 0xffbff7ff
+		      /* DRAM detail timing control register 1 (ca), bit 3 set to 0	*/
+		      /* DRAM start access latency control - wait for one clock	*/
+		      /* ff9f changed to ffbf						*/
+
+	DIM0_TIM_CTL_0 = 0x737d737d             (0xc9)
+		      /* DRAM timing control for dimm0 & dimm1; set wait one clock	*/
+		      /* cycle for next data access 					*/
+
+	DIM2_TIM_CTL_0 = 0x737d737d             (0xca)
+		      /* DRAM timing control for dimm2 & dimm3; set wait one clock	*/
+		      /* cycle for next data access 					*/
+
+	DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB    (0x90)
+		      /* set dimm0 bank0 for 128 MB	*/
+
+	DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB    (0x94)
+		      /* set dimm0 for  bank1		*/
+
+	DIM0_TIM_CTL_0 = 0xf3bf0000             (0xc9)
+		      /* dimm0 timing control register; RAS - CAS latency - 4 clock		*/
+		      /* CAS access latency - 3 wait; pre-charge latency - 3 wait		*/
+		      /* pre-charge command period control - 5 clock; wait one clock		*/
+		      /* cycle for next data access; read to write access latency control	*/
+		      /* - 2 clock cycles							*/
+
+	DRAM_GBL_CTL_0 |= 0x00000100            (0xc0)
+		       &= 0xffff01ff
+		      /* memory global control register - support buffer sdram on bank 0	*/
+
+	DRAM_ECC_CTL_0 |= 0x00260000		(0xc4)
+		       &= 0xff26ffff
+		      /* enable ECC; enable read, modify, write control	*/
+
+	DRAM_REF_CTL_0 = DRAM_REF_DATA          (0xb8)
+		      /* set DRAM refresh parameters *** changed to 00940100	*/
+
+	nop
+	nop
+	nop
+	nop
+	nop
+
+	DRAM_ECC_CTL_0 |= 0x20243280		(0xc4)
+		      /* turn off ecc		*/
+		      /* for SDRAM bank 0	*/
+
+	DRAM_ECC_CTL_0 |= 0x20243290            (0xc4) ?
+		      /* for SDRAM bank 1	*/
+
+
+/* Additional Stuff...*/
+
+	GLOBL_CTRL |= 0x20000b00		(0x54)
+
+	PCI_0_SB_CONFIG |= 0x04100007		(0xd0)
+		      /* PCI 0 Side band config reg*/
+
+	0x8000083c |= 0x00080000
+		      /* Disable VGA decode on PCI Bus 1 */
+
+
+/*End Additional Stuff..*/
+
+	/*--------------------------------------------------------------*/
+	/*              TERON serial port initialization code           */
+	/*--------------------------------------------------------------*/
+
+	0x84380080 |= 0x00030000
+		     /* enable super IO configuration VIA chip Register 85	*/
+		     /* Enable super I/O config mode */
+
+	0xfe0003f0 = 0xe2
+	bl delay1
+
+	0xfe0003f1 = 0x0f
+	bl delay1
+		    /* enable com1 & com2, parallel port disabled */
+
+	0xfe0003f0 = 0xe7
+	bl delay1
+		    /* let's make com1 base as 0x3f8 */
+
+	0xfe0003f1 = 0xfe
+	bl delay1
+
+	0xfe0003f0 = 0xe8
+	bl delay1
+		    /* let's make com2 base as 0x2f8 */
+
+	0xfe0003f1 = 0xbe
+
+	0x84380080 &= 0xfffdffff
+		    /* closing super IO configuration VIA chip Register 85   */
+
+
+/* -------------------------------*/
+
+	0xfe0003fb = 0x83
+	bl delay1
+		   /*latch enable word length -8 bit */         /* set mslab bit	*/
+	0xfe0003f8 = 0x0c
+	bl delay1
+		   /* set baud rate lsb for 9600 baud	*/
+	0xfe0003f9 = 0x0
+	bl delay1
+		   /* set baud rate msb for 9600 baud	*/
+	0xfe0003fb  = 0x03
+	bl delay1
+		      /* reset mslab	*/
+
+	/*--------------------------------------------------------------*/
+	/*              END TERON Serial Port Initialization Code       */
+	/*--------------------------------------------------------------*/
+
+
+	/*--------------------------------------------------------------*/
+	/*      END TERON Articia / SDRAM Initialization code           */
+	/*--------------------------------------------------------------*/
+
+Proposed from Documentation:
+
+write dmem 0xfec00cf8 0x50000080
+write dmem 0xfee00cfc 0xc0305411
+
+      Writes to index 0x50-0x53.
+      0x50: Global Information Register 0
+	    0xC0 = Little Endian CPU, Sequential order Burst
+      0x51: Global Information Register 1
+	    Read only, 0x30 = Provides PowerPC and X86 support
+      0x52: Global Information Register 2
+	    0x05 = 64/128 bit CPU bus support
+      0x53: Global Information Register 3
+	    0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted
+
+write dmem 0xfec00cf8 0x5c000080
+write dmem 0xfee00cfc 0xb300011F
+
+write dmem 0xfec00cf8 0xc8000080
+write dmem 0xfee00cfc 0x0020f100
+
+write dmem 0xfec00cf8 0x90000080
+write dmem 0xfee00cfc 0x007fe700
+
+write dmem 0xfec00cf8 0x9400080
+write dmem 0xfee00cfc 0x007fe700
+
+write dmem 0xfec00cf8 0xb0000080
+write dmem 0xfee00cfc 0x737d737d
+
+write dmem 0xfec00cf8 0xb4000080
+write dmem 0xfee00cfc 0x737d737d
+
+write dmem 0xfec00cf8 0xc0000080
+write dmem 0xfee00cfc 0x40005500
+
+write dmem 0xfec00cf8 0xb8000080
+write dmem 0xfee00cfc 0x00940100
+
+write dmem 0xfec00cf8 0xc4000080
+write dmem 0xfee00cfc 0x00003280
+
+write dmem 0xfec00cf8 0xc4000080
+write dmem 0xfee00cfc 0x00003290
--- a/board/MAI/AmigaOneG3SE/u-boot.lds
+++ b/board/MAI/AmigaOneG3SE/u-boot.lds
@@ -63,7 +63,7 @@ SECTIONS
    cpu/74xx_7xx/start.o	(.text)
 /* store the environment in a seperate sector in the boot flash */
 /*    . = env_offset; */
-    common/environment.o(.text) 
+    common/environment.o(.text)

    *(.text)
    *(.fixup)
@@ -75,6 +75,7 @@ SECTIONS
  {
    *(.rodata)
    *(.rodata1)
+    *(.rodata.str1.4)
  }
  .fini      : { *(.fini)    } =0
  .ctors     : { *(.ctors)   }
@@ -86,7 +87,7 @@ SECTIONS
  PROVIDE (erotext = .);
  .reloc   :
  {
-    *(.got) 
+    *(.got)
    _GOT2_TABLE_ = .;
    *(.got2)
    _FIXUP_TABLE_ = .;
@@ -107,6 +108,11 @@ SECTIONS
  _edata  =  .;
  PROVIDE (edata = .);

+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
  __start___ex_table = .;
  __ex_table : { *(__ex_table) }
  __stop___ex_table = .;
--- a/board/MAI/AmigaOneG3SE/usb_uhci.c
+++ b/board/MAI/AmigaOneG3SE/usb_uhci.c
@@ -83,7 +83,7 @@
 #define USB_MAX_TEMP_INT_TD  32   /* number of temporary TDs for Interrupt transfers */


-//#define USB_UHCI_DEBUG
+/*#define USB_UHCI_DEBUG */

 #ifdef	USB_UHCI_DEBUG
 #define	USB_UHCI_PRINTF(fmt,args...)	printf (fmt ,##args)
@@ -599,7 +599,7 @@ int usb_lowlevel_init(void)
 		printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
 		return -1;
 	}
-	
+
 #if 1
 	s = getenv("usb_irq");
 	if (s)
@@ -1115,7 +1115,6 @@ static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)
 #endif


-
 #ifdef	USB_UHCI_DEBUG

 static int usb_display_td(uhci_td_t *td)
--- a/board/MAI/AmigaOneG3SE/usb_uhci.h
+++ b/board/MAI/AmigaOneG3SE/usb_uhci.h
@@ -190,5 +190,3 @@ struct virt_root_hub {


 #endif /* _USB_UHCI_H_ */
-
-
--- a/board/MAI/AmigaOneG3SE/via686.c
+++ b/board/MAI/AmigaOneG3SE/via686.c
@@ -211,18 +211,18 @@ void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_c

 __asm         ("    .globl via_calibrate_time_base \n"
 	       "via_calibrate_time_base: 	   \n"
-               "   lis     9, 0xfe00		   \n"
-               "   li      0, 0x00		   \n"
+	       "   lis     9, 0xfe00		   \n"
+	       "   li      0, 0x00		   \n"
 	       "   mttbu   0			   \n"
 	       "   mttbl   0			   \n"
 	       "ctb_loop:			   \n"
-               "   lbz     0, 0x61(9)		   \n"
-               "   eieio			   \n"
-               "   andi.   0, 0, 0x20		   \n"
-               "   beq     ctb_loop		   \n"
-               "ctb_done:			   \n"
-               "   mftb    3			   \n"
-               "   blr");
+	       "   lbz     0, 0x61(9)		   \n"
+	       "   eieio			   \n"
+	       "   andi.   0, 0, 0x20		   \n"
+	       "   beq     ctb_loop		   \n"
+	       "ctb_done:			   \n"
+	       "   mftb    3			   \n"
+	       "   blr");

 extern unsigned long via_calibrate_time_base(void);

--- a/board/MAI/AmigaOneG3SE/video.c
+++ b/board/MAI/AmigaOneG3SE/video.c
@@ -1,6 +1,6 @@
 /*
 * (C) Copyright 2002
- * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com 
+ * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
@@ -100,7 +100,7 @@ int drv_video_init(void)
    video_inited = 1;
    video_init();
    memset (&vgadev, 0, sizeof(vgadev));
-    
+
    strcpy(vgadev.name, VIDEO_NAME);
    vgadev.flags =  DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM;
    vgadev.putc = video_putc;
@@ -108,7 +108,7 @@ int drv_video_init(void)
    vgadev.getc = NULL;
    vgadev.tstc = NULL;
    vgadev.start = video_start;
-    
+
    error = device_register (&vgadev);

    if (error == 0)
@@ -129,11 +129,11 @@ int drv_video_init(void)

 int video_init(void)
 {
-    cursor_position = VIDEO_BASE; // Color text display base
+    cursor_position = VIDEO_BASE; /* Color text display base */
    cursor_row = 0;
    cursor_col = 0;
-    current_attr = video_get_attr(); // Currently selected value for attribute.
-//    video_test();
+    current_attr = video_get_attr(); /* Currently selected value for attribute. */
+/*    video_test(); */
    video_set_color(current_attr);

    return 0;
@@ -283,7 +283,7 @@ void video_bios_print_string(char *s, int x, int y, int attr, int count)

 void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h)
 {
-    unsigned char *fb, *fb2; 
+    unsigned char *fb, *fb2;
    unsigned char *st = (style == SINGLE_BOX)?video_single_box : video_double_box;
    unsigned char *ti = (style == SINGLE_BOX)?video_single_title : video_double_title;
    int i;
@@ -324,11 +324,11 @@ void video_draw_box(int style, int attr, char *title, int separate, int x, int y
 	*fb = st[3];
 	*(fb+1) = attr; fb += 2*VIDEO_COLS;

-	*fb2 = st[4]; 
+	*fb2 = st[4];
 	*(fb2+1) = attr; fb2 += 2*VIDEO_COLS;
    }
-    
-    // Draw title
+
+    /* Draw title */
    if (title)
    {
 	if (separate == 0)
@@ -370,7 +370,7 @@ void video_draw_box(int style, int attr, char *title, int separate, int x, int y
 		fb += 2;
 	    }
 	    fb = video_addr(x+2, y+1);
-	    
+
 	    while (*title)
 	    {
 		*fb = *title;
@@ -414,7 +414,7 @@ void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar,
 }

 void video_restore_rect(int x, int y, int w, int h, void *save_area)
-{   
+{
    unsigned char *save = (unsigned char *)save_area;
    unsigned char *fb = video_addr(x,y);
    int i,j;
@@ -484,7 +484,7 @@ void video_banner(void)
    int i;
    char *s;
    int maxdev;
-    
+

    if (video_inited == 0) return;
 #ifdef EASTEREGG
--- a/board/MAI/bios_emulator/bios.c
+++ b/board/MAI/bios_emulator/bios.c
@@ -130,14 +130,14 @@ static void X86API int1A(int intno)

    switch(M.x86.R_AX)
    {
-    case 0xB101: // PCI Bios Present?
+    case 0xB101: /* PCI Bios Present? */
 	M.x86.R_AL  = 0x00;
 	M.x86.R_EDX = 0x20494350;
 	M.x86.R_BX  = 0x0210;
 	M.x86.R_CL  = 3;
 	CLEAR_FLAG(F_CF);
 	break;
-    case 0xB102: // Find device
+    case 0xB102: /* Find device */
 	device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI);
 	if (device != -1)
 	{
@@ -151,52 +151,52 @@ static void X86API int1A(int intno)
 	}
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
 	break;
-    case 0xB103: // Find PCI class code
+    case 0xB103: /* Find PCI class code */
 	M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
-	//printf("Find by class not yet implmented");
+	/*printf("Find by class not yet implmented"); */
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
 	break;
-    case 0xB108: // read config byte
+    case 0xB108: /* read config byte */
 	M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
 	M.x86.R_AH = PCIBIOS_SUCCESSFUL;
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
-	//printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
-	//	    M.x86.R_CL);
+	/*printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
+	/*	    M.x86.R_CL); */
 	break;
-    case 0xB109: // read config word
+    case 0xB109: /* read config word */
 	M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
 	M.x86.R_AH = PCIBIOS_SUCCESSFUL;
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
-	//printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
-	//	    M.x86.R_CX);
+	/*printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
+	/*	    M.x86.R_CX); */
 	break;
-    case 0xB10A: // read config dword
+    case 0xB10A: /* read config dword */
 	M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
 	M.x86.R_AH = PCIBIOS_SUCCESSFUL;
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
-	//printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
-	//    M.x86.R_ECX);
+	/*printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
+	/*    M.x86.R_ECX); */
 	break;
-    case 0xB10B: // write config byte
+    case 0xB10B: /* write config byte */
 	mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL);
 	M.x86.R_AH = PCIBIOS_SUCCESSFUL;
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
-	//printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
-	//    M.x86.R_CL);
+	/*printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
+	/*    M.x86.R_CL); */
 	break;
-    case 0xB10C: // write config word
+    case 0xB10C: /* write config word */
 	mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX);
 	M.x86.R_AH = PCIBIOS_SUCCESSFUL;
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
-	//printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
-	//	    M.x86.R_CX);
+	/*printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
+	/*	    M.x86.R_CX); */
 	break;
-    case 0xB10D: // write config dword
+    case 0xB10D: /* write config dword */
 	mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX);
 	M.x86.R_AH = PCIBIOS_SUCCESSFUL;
 	CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
-	//printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
-	//	    M.x86.R_ECX);
+	/*printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
+	/*	    M.x86.R_ECX); */
 	break;
    default:
 	PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX);
@@ -208,7 +208,7 @@ void bios_init(void)
 {
    int i;
    X86EMU_intrFuncs bios_intr_tab[256];
-    
+
    for (i=0; i<256; i++)
    {
 	write_long_little(M.mem_base+i*4, BIOS_SEG<<16);
@@ -221,7 +221,7 @@ void bios_init(void)
    bios_intr_tab[0x15] = int15;

    bios_intr_tab[0x6D] = int42;
-    
+
    X86EMU_setupIntrFuncs(bios_intr_tab);
    video_init();
 }
@@ -252,14 +252,14 @@ unsigned char setup_bw[] =

 unsigned char * setup_modes[] =
 {
-    setup_40x25,     // mode 0: 40x25 bw text
-    setup_40x25,     // mode 1: 40x25 col text
-    setup_80x25,     // mode 2: 80x25 bw text
-    setup_80x25,     // mode 3: 80x25 col text
-    setup_graphics,  // mode 4: 320x200 col graphics
-    setup_graphics,  // mode 5: 320x200 bw graphics
-    setup_graphics,  // mode 6: 640x200 bw graphics
-    setup_bw         // mode 7: 80x25 mono text
+    setup_40x25,     /* mode 0: 40x25 bw text */
+    setup_40x25,     /* mode 1: 40x25 col text */
+    setup_80x25,     /* mode 2: 80x25 bw text */
+    setup_80x25,     /* mode 3: 80x25 col text */
+    setup_graphics,  /* mode 4: 320x200 col graphics */
+    setup_graphics,  /* mode 5: 320x200 bw graphics */
+    setup_graphics,  /* mode 6: 640x200 bw graphics */
+    setup_bw         /* mode 7: 80x25 mono text */
 };

 unsigned int setup_cols[] =
@@ -280,13 +280,13 @@ unsigned int setup_bufsize[] =
 void bios_set_mode(int mode)
 {
    int i;
-    unsigned char mode_set = setup_modesets[mode]; // Control register value
-    unsigned char *setup_regs = setup_modes[mode]; // Register 3D4 Array
+    unsigned char mode_set = setup_modesets[mode]; /* Control register value */
+    unsigned char *setup_regs = setup_modes[mode]; /* Register 3D4 Array */

-    // Switch video off
+    /* Switch video off */
    out_byte(0x3D8, mode_set & 0x37);

-    // Set up parameters at 3D4h
+    /* Set up parameters at 3D4h */
    for (i=0; i<16; i++)
    {
 	out_byte(0x3D4, (unsigned char)i);
@@ -294,10 +294,10 @@ void bios_set_mode(int mode)
 	setup_regs++;
    }

-    // Enable video
+    /* Enable video */
    out_byte(0x3D8, mode_set);

-    // Set overscan
+    /* Set overscan */
    if (mode == 6) out_byte(0x3D9, 0x3F);
    else           out_byte(0x3D9, 0x30);
 }
--- a/board/MAI/bios_emulator/glue.c
+++ b/board/MAI/bios_emulator/glue.c
@@ -401,7 +401,7 @@ int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
 {
    int i = 0;
    unsigned char *rom = (unsigned char *)rom_address;
-    /* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; // No bios rom this is, yes. */
+    /* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; /* No bios rom this is, yes. */ */

    for (;;)
    {
@@ -479,7 +479,6 @@ void show_bat_mapping(void)
 }


-
 void remove_init_data(void)
 {
    char *s;
@@ -497,19 +496,19 @@ void remove_init_data(void)
    }
    else if (s)
    {
-        if (strcmp(s, "dcache")==0)
-        {
-            dcache_enable();
-        }
-        else if (strcmp(s, "icache") == 0)
-        {
-            icache_enable();
-        }
-        else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
-        {
-            dcache_enable();
-            icache_enable();
-        }
+	if (strcmp(s, "dcache")==0)
+	{
+	    dcache_enable();
+	}
+	else if (strcmp(s, "icache") == 0)
+	{
+	    icache_enable();
+	}
+	else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
+	{
+	    dcache_enable();
+	    icache_enable();
+	}
    }

    /*   show_bat_mapping();*/
--- a/board/MAI/bios_emulator/scitech/include/biosemu.h
+++ b/board/MAI/bios_emulator/scitech/include/biosemu.h
@@ -152,4 +152,3 @@ void    PMAPI BE_exit(void);
 #endif

 #endif /* __BIOSEMU_H */
-
--- a/board/MAI/bios_emulator/scitech/include/event.h
+++ b/board/MAI/bios_emulator/scitech/include/event.h
@@ -201,9 +201,9 @@ keyboard), but the translated ASCII values may be different depending on
 the country code pages in use.

 NOTE:   Scan codes in the event library are not really hardware scan codes,
-        but rather virtual scan codes as generated by a low level keyboard
-        interface driver. All virtual codes begin with scan code 0x60 and
-        range up from there.
+	but rather virtual scan codes as generated by a low level keyboard
+	interface driver. All virtual codes begin with scan code 0x60 and
+	range up from there.

 HEADER:
 event.h
@@ -496,38 +496,38 @@ event.h

 MEMBERS:
 which       - Window identifier for message for use by high level window manager
-              code (i.e. MegaVision GUI or Windows API).
+	      code (i.e. MegaVision GUI or Windows API).
 what        - Type of event that occurred. Will be one of the values defined by
-              the EVT_eventType enumeration.
+	      the EVT_eventType enumeration.
 when        - Time that the event occurred in milliseconds since startup
 where_x     - X coordinate of the mouse cursor location at the time of the event
-              (in screen coordinates). For joystick events this represents
-              the position of the first joystick X axis.
+	      (in screen coordinates). For joystick events this represents
+	      the position of the first joystick X axis.
 where_y     - Y coordinate of the mouse cursor location at the time of the event
-              (in screen coordinates). For joystick events this represents
-              the position of the first joystick Y axis.
+	      (in screen coordinates). For joystick events this represents
+	      the position of the first joystick Y axis.
 relative_x  - Relative movement of the mouse cursor in the X direction (in
-              units of mickeys, or 1/200th of an inch). For joystick events
-              this represents the position of the second joystick X axis.
+	      units of mickeys, or 1/200th of an inch). For joystick events
+	      this represents the position of the second joystick X axis.
 relative_y  - Relative movement of the mouse cursor in the Y direction (in
-              units of mickeys, or 1/200th of an inch). For joystick events
-              this represents the position of the second joystick Y axis.
+	      units of mickeys, or 1/200th of an inch). For joystick events
+	      this represents the position of the second joystick Y axis.
 message     - Event specific message for the event. For use events this can be
-              any user specific information. For keyboard events this contains
-              the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
-              the character repeat count in bits 16-30. You can use the
-              EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
-              this information from the message field. For mouse events this
-              contains information about which button was pressed, and will be a
-              combination of the flags defined by the EVT_eventMouseMaskType
-              enumeration. For joystick events, this conatins information
-              about which buttons were pressed, and will be a combination of
-              the flags defined by the EVT_eventJoyMaskType enumeration.
+	      any user specific information. For keyboard events this contains
+	      the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
+	      the character repeat count in bits 16-30. You can use the
+	      EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
+	      this information from the message field. For mouse events this
+	      contains information about which button was pressed, and will be a
+	      combination of the flags defined by the EVT_eventMouseMaskType
+	      enumeration. For joystick events, this conatins information
+	      about which buttons were pressed, and will be a combination of
+	      the flags defined by the EVT_eventJoyMaskType enumeration.
 modifiers   - Contains additional information about the state of the keyboard
-              shift modifiers (Ctrl, Alt and Shift keys) when the event
-              occurred. For mouse events it will also contain the state of
-              the mouse buttons. Will be a combination of the values defined
-              by the EVT_eventModMaskType enumeration.
+	      shift modifiers (Ctrl, Alt and Shift keys) when the event
+	      occurred. For mouse events it will also contain the state of
+	      the mouse buttons. Will be a combination of the values defined
+	      by the EVT_eventModMaskType enumeration.
 next        - Internal use; do not use.
 prev        - Internal use; do not use.
 ****************************************************************************/
@@ -555,8 +555,8 @@ different code page translation table if you want to support keyboards
 other than the US English keyboard (the default).

 NOTE:   Entries in code page tables *must* be in ascending order for the
-        scan codes as we do a binary search on the tables for the ASCII
-        code equivalents.
+	scan codes as we do a binary search on the tables for the ASCII
+	code equivalents.

 HEADER:
 event.h
--- a/board/MAI/bios_emulator/scitech/include/pcilib.h
+++ b/board/MAI/bios_emulator/scitech/include/pcilib.h
@@ -103,14 +103,14 @@ typedef enum {

 typedef union {
    struct {
-        uint    Zero:2;
-        uint    Register:6;
-        uint    Function:3;
-        uint    Device:5;
-        uint    Bus:8;
-        uint    Reserved:7;
-        uint    Enable:1;
-        } p;
+	uint    Zero:2;
+	uint    Register:6;
+	uint    Function:3;
+	uint    Device:5;
+	uint    Bus:8;
+	uint    Reserved:7;
+	uint    Enable:1;
+	} p;
    ulong   i;
    } PCIslot;

@@ -194,9 +194,9 @@ typedef struct {
    uchar   SubordinateBus;
    uchar   SecondaryLatency;
    struct  {
-        ulong   Base;
-        ulong   Limit;
-        } Range[4];
+	ulong   Base;
+	ulong   Limit;
+	} Range[4];
    uchar   InterruptLine;
    uchar   InterruptPin;
    ushort  BridgeControl;
@@ -224,10 +224,10 @@ typedef struct {
    uchar               HeaderType;
    uchar               BIST;
    union {
-        PCIType0Info    type0;
-        PCIType1Info    type1;
-        PCIType2Info    type2;
-        } u;
+	PCIType0Info    type0;
+	PCIType1Info    type1;
+	PCIType2Info    type2;
+	} u;
    } PCIDeviceInfo;

 /* PCI Capability header structure. All PCI capabilities have the
@@ -411,4 +411,3 @@ ulong   _ASMAPI PCIBIOS_getEntry(void);
 #endif

 #endif  /* __PCILIB_H */
-
--- a/board/MAI/bios_emulator/scitech/include/pm_help.h
+++ b/board/MAI/bios_emulator/scitech/include/pm_help.h
@@ -164,4 +164,3 @@ typedef enum {
 #endif  /* !__OS2__ */

 #endif  /* __PMHELP_H */
-
--- a/board/MAI/bios_emulator/scitech/include/pm_wctl.h
+++ b/board/MAI/bios_emulator/scitech/include/pm_wctl.h
@@ -73,4 +73,3 @@ PMHELP_CTL_CODE(GASETLOCALPATH              ,0x002D),
 PMHELP_CTL_CODE(GAGETEXPORTS                ,0x002E),
 PMHELP_CTL_CODE(GATHUNK                     ,0x002F),
 PMHELP_CTL_CODE(SETNUCLEUSPATH              ,0x0030),
-
--- a/board/MAI/bios_emulator/scitech/include/pmapi.h
+++ b/board/MAI/bios_emulator/scitech/include/pmapi.h
@@ -1146,4 +1146,3 @@ int     PMAPI PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs);
 #endif

 #endif /* __PMAPI_H */
-
--- a/board/MAI/bios_emulator/scitech/include/pmimp.h
+++ b/board/MAI/bios_emulator/scitech/include/pmimp.h
@@ -191,4 +191,3 @@ PM_imports  _VARAPI _PM_imports = {
    NULL,
 #endif
    };
-
--- a/board/MAI/bios_emulator/scitech/include/scitech.h
+++ b/board/MAI/bios_emulator/scitech/include/scitech.h
@@ -80,7 +80,7 @@

 #ifdef  __GNUC__
 #ifdef  __cplusplus
-// G++ currently fucks this up!
+/* G++ currently fucks this up! */
 #define __cdecl
 #define __stdcall
 #else
@@ -605,18 +605,18 @@ void _ASMAPI DebugVxD(void);
 {                                   \
    static ibool firstTime = true;  \
    if (firstTime) {                \
-        firstTime = false;          \
-        DebugInt();                 \
-        }                           \
+	firstTime = false;          \
+	DebugInt();                 \
+	}                           \
 }

 #define DebugVxDOnce()              \
 {                                   \
    static ibool firstTime = true;  \
    if (firstTime) {                \
-        firstTime = false;          \
-        DebugVxD();                 \
-        }                           \
+	firstTime = false;          \
+	DebugVxD();                 \
+	}                           \
 }

 /* Macros for linux string compatibility functions */
@@ -636,10 +636,10 @@ void _ASMAPI DebugVxD(void);
 /* Get rid of some helaciously annoying Visual C++ warnings! */

 #if defined(_MSC_VER) && !defined(__MWERKS__) && !defined(__SC__)
-#pragma warning(disable:4761)   // integral size mismatch in argument; conversion supplied
-#pragma warning(disable:4244)   // conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
-#pragma warning(disable:4018)   // '<' : signed/unsigned mismatch
-#pragma warning(disable:4305)   // 'initializing' : truncation from 'const double' to 'float'
+#pragma warning(disable:4761)   /* integral size mismatch in argument; conversion supplied */
+#pragma warning(disable:4244)   /* conversion from 'unsigned short ' to 'unsigned char ', possible loss of data */
+#pragma warning(disable:4018)   /* '<' : signed/unsigned mismatch */
+#pragma warning(disable:4305)   /* 'initializing' : truncation from 'const double' to 'float' */
 #endif

 /*---------------------------------------------------------------------------
@@ -674,29 +674,29 @@ void _CHK_defaultFail(int fatal,const char *msg,const char *cond,const char *fil
 #       define  CHK(x)      x
 #if     CHECKED > 1
 #       define  CHECK(p)                                            \
-        ((p) ? (void)0 : DebugInt(),                                \
-            _CHK_fail(1,"Check failed: '%s', file %s, line %d\n",   \
-            #p, __FILE__, __LINE__))
+	((p) ? (void)0 : DebugInt(),                                \
+	    _CHK_fail(1,"Check failed: '%s', file %s, line %d\n",   \
+	    #p, __FILE__, __LINE__))
 #       define  WARN(p)                                             \
-        ((p) ? (void)0 : DebugInt(),                                \
-            _CHK_fail(0,"Warning: '%s', file %s, line %d\n",        \
-            #p, __FILE__, __LINE__))
+	((p) ? (void)0 : DebugInt(),                                \
+	    _CHK_fail(0,"Warning: '%s', file %s, line %d\n",        \
+	    #p, __FILE__, __LINE__))
 #else
 #       define  CHECK(p)                                            \
-        ((p) ? (void)0 :                                            \
-            _CHK_fail(1,"Check failed: '%s', file %s, line %d\n",   \
-            #p, __FILE__, __LINE__))
+	((p) ? (void)0 :                                            \
+	    _CHK_fail(1,"Check failed: '%s', file %s, line %d\n",   \
+	    #p, __FILE__, __LINE__))
 #       define  WARN(p)                                             \
-        ((p) ? (void)0 :                                            \
-            _CHK_fail(0,"Warning: '%s', file %s, line %d\n",        \
-            #p, __FILE__, __LINE__))
+	((p) ? (void)0 :                                            \
+	    _CHK_fail(0,"Warning: '%s', file %s, line %d\n",        \
+	    #p, __FILE__, __LINE__))
 #endif
 #       define  LOGFATAL(msg)                                       \
-            _CHK_fail(1,"Fatal error: '%s', file %s, line %d\n",    \
-            msg, __FILE__, __LINE__)
+	    _CHK_fail(1,"Fatal error: '%s', file %s, line %d\n",    \
+	    msg, __FILE__, __LINE__)
 #       define  LOGWARN(msg)                                        \
-            _CHK_fail(0,"Warning: '%s', file %s, line %d\n",        \
-            msg, __FILE__, __LINE__)
+	    _CHK_fail(0,"Warning: '%s', file %s, line %d\n",        \
+	    msg, __FILE__, __LINE__)
 #else
 #       define  CHK(x)
 #       define  CHECK(p)        ((void)0)
--- a/board/MAI/bios_emulator/scitech/include/x86emu/regs.h
+++ b/board/MAI/bios_emulator/scitech/include/x86emu/regs.h
@@ -105,7 +105,7 @@ struct i386_special_regs {
    u32 FLAGS;
    };

-/*  
+/*
 * Segment registers here represent the 16 bit quantities
 * CS, DS, ES, SS.
 */
@@ -183,8 +183,8 @@ struct i386_segment_regs {
 #define F_ALWAYS_ON  (0x0002)   /* flag bits always on */

 /*
- * Define a mask for only those flag bits we will ever pass back 
- * (via PUSHF) 
+ * Define a mask for only those flag bits we will ever pass back
+ * (via PUSHF)
 */
 #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)

@@ -235,21 +235,21 @@ struct i386_segment_regs {
 #define SYSMODE_HALTED          0x40000000

 #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS      | \
-                         SYSMODE_SEGOVR_CS      | \
-                         SYSMODE_SEGOVR_DS      | \
-                         SYSMODE_SEGOVR_ES      | \
-                         SYSMODE_SEGOVR_FS      | \
-                         SYSMODE_SEGOVR_GS      | \
-                         SYSMODE_SEGOVR_SS)
+			 SYSMODE_SEGOVR_CS      | \
+			 SYSMODE_SEGOVR_DS      | \
+			 SYSMODE_SEGOVR_ES      | \
+			 SYSMODE_SEGOVR_FS      | \
+			 SYSMODE_SEGOVR_GS      | \
+			 SYSMODE_SEGOVR_SS)
 #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS      | \
-                         SYSMODE_SEGOVR_CS      | \
-                         SYSMODE_SEGOVR_DS      | \
-                         SYSMODE_SEGOVR_ES      | \
-                         SYSMODE_SEGOVR_FS      | \
-                         SYSMODE_SEGOVR_GS      | \
-                         SYSMODE_SEGOVR_SS      | \
-                         SYSMODE_PREFIX_DATA    | \
-                         SYSMODE_PREFIX_ADDR)
+			 SYSMODE_SEGOVR_CS      | \
+			 SYSMODE_SEGOVR_DS      | \
+			 SYSMODE_SEGOVR_ES      | \
+			 SYSMODE_SEGOVR_FS      | \
+			 SYSMODE_SEGOVR_GS      | \
+			 SYSMODE_SEGOVR_SS      | \
+			 SYSMODE_PREFIX_DATA    | \
+			 SYSMODE_PREFIX_ADDR)

 #define  INTR_SYNCH           0x1
 #define  INTR_ASYNCH          0x2
@@ -266,8 +266,8 @@ typedef struct {
     *  Delayed flag set        3 bits  (zero, signed, parity)
     *  reserved                6 bits
     *  interrupt #             8 bits  instruction raised interrupt
-     *  BIOS video segregs      4 bits  
-     *  Interrupt Pending       1 bits  
+     *  BIOS video segregs      4 bits
+     *  Interrupt Pending       1 bits
     *  Extern interrupt        1 bits
     *  Halted                  1 bits
     */
@@ -317,12 +317,12 @@ extern "C" {                        /* Use "C" linkage when in C++ mode */

 extern    X86EMU_sysEnv _X86EMU_env;
 #define   M             _X86EMU_env
-        
+
 /*-------------------------- Function Prototypes --------------------------*/

 /* Function to log information at runtime */

-//void    printk(const char *fmt, ...);
+/*void    printk(const char *fmt, ...); */

 #ifdef  __cplusplus
 }                                   /* End of "C" linkage for C++       */
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt
+++ b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt
@@ -0,0 +1 @@
+This file is just to ensure that the directory is created.
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt
+++ b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt
@@ -0,0 +1 @@
+This file is just to ensure that the directory is created.
--- a/board/MAI/bios_emulator/scitech/makedefs/common.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/common.mk
@@ -178,4 +178,3 @@ ASFLAGS   	+= -d__SNAP__
 # Include file dependencies

 .INCLUDE .IGNORE: "makefile.dep"
-
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk
@@ -178,4 +178,3 @@ PMLIB           := -lpm
 # Define which file contains our rules

   RULES_MAK	:= gcc_linux.mk
-
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk
@@ -133,4 +133,3 @@ PMLIB           := -lpm
 # Define which file contains our rules

   RULES_MAK	:= gcc_win32.mk
-
--- a/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk
@@ -162,4 +162,3 @@ PMLIB           := -lpm
 # Define which file contains our rules

   RULES_MAK	:= qnx4.mk
-
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk
@@ -44,5 +44,4 @@ PMLIB :=
 %$L:     ; $(LIB) $(LIBFLAGS) $@ $&

 # Implicit rule for building an executable file
-%$E:     ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) 
-
+%$E:     ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB)
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk
@@ -91,4 +91,3 @@ LD	:= $(LDXX)
    @$(ECHO) ld $@
    @$(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
 .ENDIF
-
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk
@@ -88,4 +88,3 @@ LD	:= $(LDXX)
    @$(ECHO) ld $@
    @$(LD) $(LDFLAGS) -o $@ @$(mktmp $(&:s/\/\\) $(EXELIBS) $(PMLIB) -lm)
 .ENDIF
-
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk
@@ -69,14 +69,14 @@ PMLIB :=
 # Implicit rule for building an executable file using response file
 .IF $(USE_OS2GUI)
 %$E: ;
-        rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
+	rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
 .IF $(LXLITE)
-        lxlite $@
+	lxlite $@
 .ENDIF
 .ELSE
 %$E: ;
-        rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
+	rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
 .IF $(LXLITE)
-        lxlite $@
+	lxlite $@
 .ENDIF
 .ENDIF
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk
@@ -66,14 +66,14 @@ PMLIB :=
 # Implicit rule for building an executable file using response file
 .IF $(USE_OS2GUI)
 %$E: ;
-        rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
+	rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
 .IF $(LXLITE)
-        lxlite $@
+	lxlite $@
 .ENDIF
 .ELSE
 %$E: ;
-        rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
+	rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
 .IF $(LXLITE)
-        lxlite $@
+	lxlite $@
 .ENDIF
 .ENDIF
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk
@@ -109,7 +109,7 @@ LDFLAGS		+= OP PRIV=1
 	@gcpp -DNASM_ASSEMBLER -D__WATCOMC__ -EP $(<:s,/,\) > $(*:s,/,\).asm
 	nasm @$(mktmp -f obj -o $@) $(*:s,/,\).asm
 	@$(RM) -S $(mktmp $(*:s,/,\).asm)
-.ENDIF	
+.ENDIF

 # Special target to build dllstart.asm using Borland TASM
 dllstart.obj: dllstart.asm
@@ -126,26 +126,26 @@ dllstart.obj: dllstart.asm
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2 dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ELIF $(USE_WIN32)
 %$D: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt_dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ELSE
 %$D: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 	wbind $* -d -q -n
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ENDIF
 .ENDIF

@@ -171,18 +171,18 @@ dllstart.obj: dllstart.asm
 	$(LD) $(LDFLAGS) @$*.lnk
 	x32fix $@
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ELIF $(USE_OS232)
 .IF $(USE_OS2GUI)
 %$E: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2_pm\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .IF $(LXLITE)
 	lxlite $@
 .ENDIF
@@ -191,9 +191,9 @@ dllstart.obj: dllstart.asm
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .IF $(LXLITE)
 	lxlite $@
 .ENDIF
@@ -203,43 +203,43 @@ dllstart.obj: dllstart.asm
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(DEFLIBS)$(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ELIF $(USE_WIN32)
 .IF $(WIN32_GUI)
 %$E: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS win95\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ELSE
 %$E: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
 	rclink $(LD) $(RC) $@ $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ENDIF
 .ELIF $(USE_WIN386)
 %$E: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
 	rclink $(LD) wbind $*.rex $*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ELIF $(USE_TNT)
 %$E: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR dosx32.lib,tntapi.lib,$(PMLIB)$(EXELIBS:t",")) $*.lnk
 	$(LD) @$*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .IF $(DOSSTYLE)
 	@markphar $@
 .ENDIF
@@ -250,16 +250,15 @@ dllstart.obj: dllstart.asm
 	$(LD) @$*.lnk
 	@attrib +s $*.exe
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
+.ENDIF
 .ELSE
 %$E: ;
 	@trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
 	$(LD) @$*.lnk
 .IF $(LEAVE_LINKFILE)
-.ELSE	
+.ELSE
 	@$(RM) -S $(mktmp *.lnk)
-.ENDIF	
 .ENDIF
-
+.ENDIF
--- a/board/MAI/bios_emulator/scitech/makedefs/startup.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/startup.mk
@@ -159,4 +159,3 @@ __.SILENT       := $(.SILENT)

 # We dont use TABS in our makefiles
 .NOTABS         := yes
-
--- a/board/MAI/bios_emulator/scitech/makedefs/wc32.mk
+++ b/board/MAI/bios_emulator/scitech/makedefs/wc32.mk
@@ -351,4 +351,3 @@ LIB_BASE_DIR	:= $(SCITECH_LIB)\lib\release
 # Define which file contains our rules

   RULES_MAK	:= wc32.mk
-
--- a/board/MAI/bios_emulator/scitech/src/biosemu/besys.c
+++ b/board/MAI/bios_emulator/scitech/src/biosemu/besys.c
@@ -77,20 +77,20 @@ u8 X86API BE_rdb(
    u8 val = 0;

    if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-        val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
-        }
+	val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
+	}
    else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-        val = readb(_BE_env.busmem_base, addr - 0xA0000);
-        }
+	val = readb(_BE_env.busmem_base, addr - 0xA0000);
+	}
    else if (addr > M.mem_size - 1) {
 DB(     printk("mem_read: address %#lx out of range!\n", addr);)
-        HALT_SYS();
-        }
+	HALT_SYS();
+	}
    else {
-        val = *(u8*)(M.mem_base + addr);
-        }
+	val = *(u8*)(M.mem_base + addr);
+	}
 DB( if (DEBUG_MEM())
-        printk("%#08x 1 -> %#x\n", addr, val);)
+	printk("%#08x 1 -> %#x\n", addr, val);)
    return val;
 }

@@ -112,42 +112,42 @@ u16 X86API BE_rdw(

    if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            addr -= 0xC0000;
-            val = ( *(u8*)(_BE_env.biosmem_base + addr) |
-                   (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
-            }
-        else
+	if (addr & 0x1) {
+	    addr -= 0xC0000;
+	    val = ( *(u8*)(_BE_env.biosmem_base + addr) |
+		   (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
+	    }
+	else
 #endif
-            val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
-        }
+	    val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
+	}
    else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            addr -= 0xA0000;
-            val = ( readb(_BE_env.busmem_base, addr) |
-                   (readb(_BE_env.busmem_base, addr + 1) << 8));
-            }
-        else
+	if (addr & 0x1) {
+	    addr -= 0xA0000;
+	    val = ( readb(_BE_env.busmem_base, addr) |
+		   (readb(_BE_env.busmem_base, addr + 1) << 8));
+	    }
+	else
 #endif
-            val = readw(_BE_env.busmem_base, addr - 0xA0000);
-        }
+	    val = readw(_BE_env.busmem_base, addr - 0xA0000);
+	}
    else if (addr > M.mem_size - 2) {
 DB(     printk("mem_read: address %#lx out of range!\n", addr);)
-        HALT_SYS();
-        }
+	HALT_SYS();
+	}
    else {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            val = ( *(u8*)(M.mem_base + addr) |
-                   (*(u8*)(M.mem_base + addr + 1) << 8));
-            }
-        else
+	if (addr & 0x1) {
+	    val = ( *(u8*)(M.mem_base + addr) |
+		   (*(u8*)(M.mem_base + addr + 1) << 8));
+	    }
+	else
 #endif
-            val = *(u16*)(M.mem_base + addr);
-        }
+	    val = *(u16*)(M.mem_base + addr);
+	}
 DB( if (DEBUG_MEM())
-        printk("%#08x 2 -> %#x\n", addr, val);)
+	printk("%#08x 2 -> %#x\n", addr, val);)
    return val;
 }

@@ -169,48 +169,48 @@ u32 X86API BE_rdl(

    if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x3) {
-            addr -= 0xC0000;
-            val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
-                   (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
-                   (*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
-                   (*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
-            }
-        else
+	if (addr & 0x3) {
+	    addr -= 0xC0000;
+	    val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
+		   (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
+		   (*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
+		   (*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
+	    }
+	else
 #endif
-            val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
-        }
+	    val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
+	}
    else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x3) {
-            addr -= 0xA0000;
-            val = ( readb(_BE_env.busmem_base, addr) |
-                   (readb(_BE_env.busmem_base, addr + 1) <<  8) |
-                   (readb(_BE_env.busmem_base, addr + 2) << 16) |
-                   (readb(_BE_env.busmem_base, addr + 3) << 24));
-            }
-        else
+	if (addr & 0x3) {
+	    addr -= 0xA0000;
+	    val = ( readb(_BE_env.busmem_base, addr) |
+		   (readb(_BE_env.busmem_base, addr + 1) <<  8) |
+		   (readb(_BE_env.busmem_base, addr + 2) << 16) |
+		   (readb(_BE_env.busmem_base, addr + 3) << 24));
+	    }
+	else
 #endif
-            val = readl(_BE_env.busmem_base, addr - 0xA0000);
-        }
+	    val = readl(_BE_env.busmem_base, addr - 0xA0000);
+	}
    else if (addr > M.mem_size - 4) {
 DB(     printk("mem_read: address %#lx out of range!\n", addr);)
-        HALT_SYS();
-        }
+	HALT_SYS();
+	}
    else {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x3) {
-            val = ( *(u8*)(M.mem_base + addr + 0) |
-                   (*(u8*)(M.mem_base + addr + 1) << 8) |
-                   (*(u8*)(M.mem_base + addr + 2) << 16) |
-                   (*(u8*)(M.mem_base + addr + 3) << 24));
-            }
-        else
+	if (addr & 0x3) {
+	    val = ( *(u8*)(M.mem_base + addr + 0) |
+		   (*(u8*)(M.mem_base + addr + 1) << 8) |
+		   (*(u8*)(M.mem_base + addr + 2) << 16) |
+		   (*(u8*)(M.mem_base + addr + 3) << 24));
+	    }
+	else
 #endif
-            val = *(u32*)(M.mem_base + addr);
-        }
+	    val = *(u32*)(M.mem_base + addr);
+	}
 DB( if (DEBUG_MEM())
-        printk("%#08x 4 -> %#x\n", addr, val);)
+	printk("%#08x 4 -> %#x\n", addr, val);)
    return val;
 }

@@ -228,20 +228,20 @@ void X86API BE_wrb(
    u8 val)
 {
 DB( if (DEBUG_MEM())
-        printk("%#08x 1 <- %#x\n", addr, val);)
+	printk("%#08x 1 <- %#x\n", addr, val);)
    if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-        *(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
-        }
+	*(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
+	}
    else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-        writeb(val, _BE_env.busmem_base, addr - 0xA0000);
-        }
+	writeb(val, _BE_env.busmem_base, addr - 0xA0000);
+	}
    else if (addr > M.mem_size-1) {
 DB(     printk("mem_write: address %#lx out of range!\n", addr);)
-        HALT_SYS();
-        }
+	HALT_SYS();
+	}
    else {
-        *(u8*)(M.mem_base + addr) = val;
-        }
+	*(u8*)(M.mem_base + addr) = val;
+	}
 }

 /****************************************************************************
@@ -258,43 +258,43 @@ void X86API BE_wrw(
    u16 val)
 {
 DB( if (DEBUG_MEM())
-        printk("%#08x 2 <- %#x\n", addr, val);)
+	printk("%#08x 2 <- %#x\n", addr, val);)
    if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            addr -= 0xC0000;
-            *(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
-            *(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
-            }
-        else
+	if (addr & 0x1) {
+	    addr -= 0xC0000;
+	    *(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
+	    *(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
+	    }
+	else
 #endif
-            *(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
-        }
+	    *(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
+	}
    else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            addr -= 0xA0000;
-            writeb(val >> 0, _BE_env.busmem_base, addr);
-            writeb(val >> 8, _BE_env.busmem_base, addr + 1);
-            }
-        else
+	if (addr & 0x1) {
+	    addr -= 0xA0000;
+	    writeb(val >> 0, _BE_env.busmem_base, addr);
+	    writeb(val >> 8, _BE_env.busmem_base, addr + 1);
+	    }
+	else
 #endif
-            writew(val, _BE_env.busmem_base, addr - 0xA0000);
-        }
+	    writew(val, _BE_env.busmem_base, addr - 0xA0000);
+	}
    else if (addr > M.mem_size-2) {
 DB(     printk("mem_write: address %#lx out of range!\n", addr);)
-        HALT_SYS();
-        }
+	HALT_SYS();
+	}
    else {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
-            *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
-            }
-        else
+	if (addr & 0x1) {
+	    *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
+	    *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
+	    }
+	else
 #endif
-            *(u16*)(M.mem_base + addr) = val;
-        }
+	    *(u16*)(M.mem_base + addr) = val;
+	}
 }

 /****************************************************************************
@@ -311,49 +311,49 @@ void X86API BE_wrl(
    u32 val)
 {
 DB( if (DEBUG_MEM())
-        printk("%#08x 4 <- %#x\n", addr, val);)
+	printk("%#08x 4 <- %#x\n", addr, val);)
    if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            addr -= 0xC0000;
-            *(u8*)(M.mem_base + addr + 0) = (val >>  0) & 0xff;
-            *(u8*)(M.mem_base + addr + 1) = (val >>  8) & 0xff;
-            *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
-            *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
-            }
-        else
+	if (addr & 0x1) {
+	    addr -= 0xC0000;
+	    *(u8*)(M.mem_base + addr + 0) = (val >>  0) & 0xff;
+	    *(u8*)(M.mem_base + addr + 1) = (val >>  8) & 0xff;
+	    *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
+	    *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
+	    }
+	else
 #endif
-            *(u32*)(M.mem_base + addr - 0xC0000) = val;
-        }
+	    *(u32*)(M.mem_base + addr - 0xC0000) = val;
+	}
    else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x3) {
-            addr -= 0xA0000;
-            writeb(val >>  0, _BE_env.busmem_base, addr);
-            writeb(val >>  8, _BE_env.busmem_base, addr + 1);
-            writeb(val >> 16, _BE_env.busmem_base, addr + 1);
-            writeb(val >> 24, _BE_env.busmem_base, addr + 1);
-            }
-        else
+	if (addr & 0x3) {
+	    addr -= 0xA0000;
+	    writeb(val >>  0, _BE_env.busmem_base, addr);
+	    writeb(val >>  8, _BE_env.busmem_base, addr + 1);
+	    writeb(val >> 16, _BE_env.busmem_base, addr + 1);
+	    writeb(val >> 24, _BE_env.busmem_base, addr + 1);
+	    }
+	else
 #endif
-            writel(val, _BE_env.busmem_base, addr - 0xA0000);
-        }
+	    writel(val, _BE_env.busmem_base, addr - 0xA0000);
+	}
    else if (addr > M.mem_size-4) {
 DB(     printk("mem_write: address %#lx out of range!\n", addr);)
-        HALT_SYS();
-        }
+	HALT_SYS();
+	}
    else {
 #ifdef __BIG_ENDIAN__
-        if (addr & 0x1) {
-            *(u8*)(M.mem_base + addr + 0) = (val >>  0) & 0xff;
-            *(u8*)(M.mem_base + addr + 1) = (val >>  8) & 0xff;
-            *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
-            *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
-            }
-        else
+	if (addr & 0x1) {
+	    *(u8*)(M.mem_base + addr + 0) = (val >>  0) & 0xff;
+	    *(u8*)(M.mem_base + addr + 1) = (val >>  8) & 0xff;
+	    *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
+	    *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
+	    }
+	else
 #endif
-            *(u32*)(M.mem_base + addr) = val;
-        }
+	    *(u32*)(M.mem_base + addr) = val;
+	}
 }

 /* Debug functions to do ISA/PCI bus port I/O */
@@ -365,7 +365,7 @@ u8 X86API BE_inb(int port)
 {
    u8 val = PM_inpb(port);
    if (DEBUG_IO())
-        printk("%04X:%04X:  inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
+	printk("%04X:%04X:  inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
    return val;
 }

@@ -373,7 +373,7 @@ u16 X86API BE_inw(int port)
 {
    u16 val = PM_inpw(port);
    if (DEBUG_IO())
-        printk("%04X:%04X:  inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
+	printk("%04X:%04X:  inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
    return val;
 }

@@ -381,28 +381,28 @@ u32 X86API BE_inl(int port)
 {
    u32 val = PM_inpd(port);
    if (DEBUG_IO())
-        printk("%04X:%04X:  inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
+	printk("%04X:%04X:  inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
    return val;
 }

 void X86API BE_outb(int port, u8 val)
 {
    if (DEBUG_IO())
-        printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
+	printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
    PM_outpb(port,val);
 }

 void X86API BE_outw(int port, u16 val)
 {
    if (DEBUG_IO())
-        printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
+	printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
    PM_outpw(port,val);
 }

 void X86API BE_outl(int port, u32 val)
 {
    if (DEBUG_IO())
-        printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
+	printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
    PM_outpd(port,val);
 }
 #endif
--- a/board/MAI/bios_emulator/scitech/src/biosemu/bios.c
+++ b/board/MAI/bios_emulator/scitech/src/biosemu/bios.c
@@ -50,9 +50,9 @@ static void X86API undefined_intr(
    int intno)
 {
    if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
-        printk("biosEmu: undefined interrupt %xh called!\n",intno);
+	printk("biosEmu: undefined interrupt %xh called!\n",intno);
    else
-        X86EMU_prepareForInt(intno);
+	X86EMU_prepareForInt(intno);
 }

 /****************************************************************************
@@ -68,26 +68,26 @@ static void X86API int42(
    int intno)
 {
    if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
-        if (M.x86.R_AL == 0) {
-            /* Enable CPU accesses to video memory */
-            PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
-            return;
-            }
-        else if (M.x86.R_AL == 1) {
-            /* Disable CPU accesses to video memory */
-            PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
-            return;
-            }
+	if (M.x86.R_AL == 0) {
+	    /* Enable CPU accesses to video memory */
+	    PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
+	    return;
+	    }
+	else if (M.x86.R_AL == 1) {
+	    /* Disable CPU accesses to video memory */
+	    PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
+	    return;
+	    }
 #ifdef  DEBUG
-        else {
-            printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
-            }
+	else {
+	    printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
+	    }
 #endif
-        }
+	}
 #ifdef  DEBUG
    else {
-        printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
-        }
+	printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
+	}
 #endif
 }

@@ -106,9 +106,9 @@ static void X86API int10(
    int intno)
 {
    if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
-        int42(intno);
+	int42(intno);
    else
-        X86EMU_prepareForInt(intno);
+	X86EMU_prepareForInt(intno);
 }

 /* Result codes returned by the PCI BIOS */
@@ -142,87 +142,87 @@ static void X86API int1A(

    /* Fail if no PCI device information has been registered */
    if (!_BE_env.vgaInfo.pciInfo)
-        return;
+	return;
    pciSlot = (u16)(_BE_env.vgaInfo.pciInfo->slot.i >> 8);
    switch (M.x86.R_AX) {
-        case 0xB101:                    /* PCI bios present? */
-            M.x86.R_AL  = 0x00;         /* no config space/special cycle generation support */
-            M.x86.R_EDX = 0x20494350;   /* " ICP" */
-            M.x86.R_BX  = 0x0210;       /* Version 2.10 */
-            M.x86.R_CL  = 0;            /* Max bus number in system */
-            CLEAR_FLAG(F_CF);
-            break;
-        case 0xB102:                    /* Find PCI device */
-            M.x86.R_AH = DEVICE_NOT_FOUND;
-            if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
-                    M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
-                    M.x86.R_SI == 0) {
-                M.x86.R_AH = SUCCESSFUL;
-                M.x86.R_BX = pciSlot;
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        case 0xB103:                    /* Find PCI class code */
-            M.x86.R_AH = DEVICE_NOT_FOUND;
-            if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
-                    M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
-                    (u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
-                M.x86.R_AH = SUCCESSFUL;
-                M.x86.R_BX = pciSlot;
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        case 0xB108:                    /* Read configuration byte */
-            M.x86.R_AH = BAD_REGISTER_NUMBER;
-            if (M.x86.R_BX == pciSlot) {
-                M.x86.R_AH = SUCCESSFUL;
-                M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        case 0xB109:                    /* Read configuration word */
-            M.x86.R_AH = BAD_REGISTER_NUMBER;
-            if (M.x86.R_BX == pciSlot) {
-                M.x86.R_AH = SUCCESSFUL;
-                M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        case 0xB10A:                    /* Read configuration dword */
-            M.x86.R_AH = BAD_REGISTER_NUMBER;
-            if (M.x86.R_BX == pciSlot) {
-                M.x86.R_AH = SUCCESSFUL;
-                M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        case 0xB10B:                    /* Write configuration byte */
-            M.x86.R_AH = BAD_REGISTER_NUMBER;
-            if (M.x86.R_BX == pciSlot) {
-                M.x86.R_AH = SUCCESSFUL;
-                PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        case 0xB10C:                    /* Write configuration word */
-            M.x86.R_AH = BAD_REGISTER_NUMBER;
-            if (M.x86.R_BX == pciSlot) {
-                M.x86.R_AH = SUCCESSFUL;
-                PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        case 0xB10D:                    /* Write configuration dword */
-            M.x86.R_AH = BAD_REGISTER_NUMBER;
-            if (M.x86.R_BX == pciSlot) {
-                M.x86.R_AH = SUCCESSFUL;
-                PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
-                }
-            CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
-            break;
-        default:
-            printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
-        }
+	case 0xB101:                    /* PCI bios present? */
+	    M.x86.R_AL  = 0x00;         /* no config space/special cycle generation support */
+	    M.x86.R_EDX = 0x20494350;   /* " ICP" */
+	    M.x86.R_BX  = 0x0210;       /* Version 2.10 */
+	    M.x86.R_CL  = 0;            /* Max bus number in system */
+	    CLEAR_FLAG(F_CF);
+	    break;
+	case 0xB102:                    /* Find PCI device */
+	    M.x86.R_AH = DEVICE_NOT_FOUND;
+	    if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
+		    M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
+		    M.x86.R_SI == 0) {
+		M.x86.R_AH = SUCCESSFUL;
+		M.x86.R_BX = pciSlot;
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	case 0xB103:                    /* Find PCI class code */
+	    M.x86.R_AH = DEVICE_NOT_FOUND;
+	    if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
+		    M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
+		    (u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
+		M.x86.R_AH = SUCCESSFUL;
+		M.x86.R_BX = pciSlot;
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	case 0xB108:                    /* Read configuration byte */
+	    M.x86.R_AH = BAD_REGISTER_NUMBER;
+	    if (M.x86.R_BX == pciSlot) {
+		M.x86.R_AH = SUCCESSFUL;
+		M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	case 0xB109:                    /* Read configuration word */
+	    M.x86.R_AH = BAD_REGISTER_NUMBER;
+	    if (M.x86.R_BX == pciSlot) {
+		M.x86.R_AH = SUCCESSFUL;
+		M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	case 0xB10A:                    /* Read configuration dword */
+	    M.x86.R_AH = BAD_REGISTER_NUMBER;
+	    if (M.x86.R_BX == pciSlot) {
+		M.x86.R_AH = SUCCESSFUL;
+		M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	case 0xB10B:                    /* Write configuration byte */
+	    M.x86.R_AH = BAD_REGISTER_NUMBER;
+	    if (M.x86.R_BX == pciSlot) {
+		M.x86.R_AH = SUCCESSFUL;
+		PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	case 0xB10C:                    /* Write configuration word */
+	    M.x86.R_AH = BAD_REGISTER_NUMBER;
+	    if (M.x86.R_BX == pciSlot) {
+		M.x86.R_AH = SUCCESSFUL;
+		PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	case 0xB10D:                    /* Write configuration dword */
+	    M.x86.R_AH = BAD_REGISTER_NUMBER;
+	    if (M.x86.R_BX == pciSlot) {
+		M.x86.R_AH = SUCCESSFUL;
+		PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
+		}
+	    CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+	    break;
+	default:
+	    printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
+	}
 }

 /****************************************************************************
@@ -240,9 +240,9 @@ void _BE_bios_init(
    X86EMU_intrFuncs    bios_intr_tab[256];

    for (i = 0; i < 256; ++i) {
-        intrTab[i] = BIOS_SEG << 16;
-        bios_intr_tab[i] = undefined_intr;
-        }
+	intrTab[i] = BIOS_SEG << 16;
+	bios_intr_tab[i] = undefined_intr;
+	}
    bios_intr_tab[0x10] = int10;
    bios_intr_tab[0x1A] = int1A;
    bios_intr_tab[0x42] = int42;
--- a/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c
+++ b/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c
@@ -100,9 +100,9 @@ ibool PMAPI BE_init(
 #endif
    memset(&M,0,sizeof(M));
    if (memSize < 20480)
-        PM_fatalError("Emulator requires at least 20Kb of memory!\n");
+	PM_fatalError("Emulator requires at least 20Kb of memory!\n");
    if ((M.mem_base = (unsigned long)malloc(memSize)) == NULL)
-        PM_fatalError("Out of memory!");
+	PM_fatalError("Out of memory!");
    M.mem_size = memSize;
    _BE_env.busmem_base = (ulong)PM_mapPhysicalAddr(0xA0000,0x5FFFF,true);
    M.x86.debug = debugFlags;
@@ -144,15 +144,15 @@ void PMAPI BE_setVGA(
    _BE_env.vgaInfo.pciInfo = info->pciInfo;
    _BE_env.vgaInfo.BIOSImage = info->BIOSImage;
    if (info->BIOSImage) {
-        _BE_env.biosmem_base = (ulong)info->BIOSImage;
-        _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
-        }
+	_BE_env.biosmem_base = (ulong)info->BIOSImage;
+	_BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
+	}
    else {
-        _BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
-        _BE_env.biosmem_limit = 0xC7FFF;
-        }
+	_BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
+	_BE_env.biosmem_limit = 0xC7FFF;
+	}
    if (*((u32*)info->LowMem) == 0)
-        _BE_bios_init((u32*)info->LowMem);
+	_BE_bios_init((u32*)info->LowMem);
    memcpy((u8*)M.mem_base,info->LowMem,sizeof(info->LowMem));
 }

@@ -182,8 +182,8 @@ This function maps a real mode pointer in the emulator memory to a protected
 mode pointer that can be used to directly access the memory.

 NOTE:   The memory is *always* in little endian format, son on non-x86
-        systems you will need to do endian translations to access this
-        memory.
+	systems you will need to do endian translations to access this
+	memory.
 ****************************************************************************/
 void * PMAPI BE_mapRealPointer(
    uint r_seg,
@@ -192,11 +192,11 @@ void * PMAPI BE_mapRealPointer(
    u32 addr = ((u32)r_seg << 4) + r_off;

    if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-        return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
-        }
+	return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
+	}
    else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-        return (void*)(_BE_env.busmem_base + addr - 0xA0000);
-        }
+	return (void*)(_BE_env.busmem_base + addr - 0xA0000);
+	}
    return (void*)(M.mem_base + addr);
 }

@@ -213,8 +213,8 @@ and located at 15Kb into the start of the real mode memory (16Kb is where
 we put the real mode code we execute for issuing interrupts).

 NOTE:   The memory is *always* in little endian format, son on non-x86
-        systems you will need to do endian translations to access this
-        memory.
+	systems you will need to do endian translations to access this
+	memory.
 ****************************************************************************/
 void * PMAPI BE_getVESABuf(
    uint *len,
@@ -416,28 +416,28 @@ BE_exports * _CEXPORT BE_initLibrary(
    PM_imports *pmImp)
 {
    static BE_exports _BE_exports = {
-        sizeof(BE_exports),
-        BE_init,
-        BE_setVGA,
-        BE_getVGA,
-        BE_mapRealPointer,
-        BE_getVESABuf,
-        BE_callRealMode,
-        BE_int86,
-        BE_int86x,
-        NULL,
-        BE_exit,
-        };
+	sizeof(BE_exports),
+	BE_init,
+	BE_setVGA,
+	BE_getVGA,
+	BE_mapRealPointer,
+	BE_getVESABuf,
+	BE_callRealMode,
+	BE_int86,
+	BE_int86x,
+	NULL,
+	BE_exit,
+	};
    int     i,max;
    ulong   *p;

-    // Initialize all default imports to point to fatal error handler
-    // for upwards compatibility.
+    /* Initialize all default imports to point to fatal error handler */
+    /* for upwards compatibility. */
    max = sizeof(_PM_imports)/sizeof(BE_initLibrary_t);
    for (i = 0,p = (ulong*)&_PM_imports; i < max; i++)
-        *p++ = (ulong)_PM_fatalErrorHandler;
+	*p++ = (ulong)_PM_fatalErrorHandler;

-    // Now copy all our imported functions
+    /* Now copy all our imported functions */
    memcpy(&_PM_imports,pmImp,MIN(sizeof(_PM_imports),pmImp->dwSize));
    return &_BE_exports;
 }
--- a/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c
+++ b/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c
@@ -112,16 +112,16 @@ static ulong PCI_findBIOSAddr(
    int     bar;

    for (bar = 0x10; bar <= 0x14; bar++) {
-        base = PCI_readPCIRegL(bar,device) & ~0xFF;
-        if (!(base & 0x1)) {
-            PCI_writePCIRegL(bar,0xFFFFFFFF,device);
-            size = PCI_readPCIRegL(bar,device) & ~0xFF;
-            size = ~size+1;
-            PCI_writePCIRegL(bar,0,device);
-            if (size >= MAX_BIOSLEN)
-                return base;
-            }
-        }
+	base = PCI_readPCIRegL(bar,device) & ~0xFF;
+	if (!(base & 0x1)) {
+	    PCI_writePCIRegL(bar,0xFFFFFFFF,device);
+	    size = PCI_readPCIRegL(bar,device) & ~0xFF;
+	    size = ~size+1;
+	    PCI_writePCIRegL(bar,0,device);
+	    if (size >= MAX_BIOSLEN)
+		return base;
+	    }
+	}
    return 0;
 }

@@ -138,13 +138,13 @@ static void _PCI_fixupSecondaryBARs(void)
    int i;

    for (i = 0; i < NumDevices; i++) {
-        PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
-        PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
-        PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
-        PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
-        PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
-        PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
-        }
+	PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
+	PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
+	PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
+	PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
+	PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
+	PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
+	}
 }

 /****************************************************************************
@@ -165,29 +165,29 @@ static void PCI_doBIOSPOST(
    RMREGS          regs;
    RMSREGS         sregs;

-    // Determine the value to store in AX for BIOS POST
+    /* Determine the value to store in AX for BIOS POST */
    regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
    if (useV86) {
-        // Post the BIOS using the PM functions (ie: v86 mode on Linux)
-        if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
-            // If the PM function fails, this probably means are we are on
-            // DOS and can't re-map the real mode 0xC0000 region. In thise
-            // case if the device is the primary, we can use the real
-            // BIOS at 0xC0000 directly.
-            if (device == 0)
-                PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
-            }
-        }
+	/* Post the BIOS using the PM functions (ie: v86 mode on Linux) */
+	if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
+	    /* If the PM function fails, this probably means are we are on */
+	    /* DOS and can't re-map the real mode 0xC0000 region. In thise */
+	    /* case if the device is the primary, we can use the real */
+	    /* BIOS at 0xC0000 directly. */
+	    if (device == 0)
+		PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
+	    }
+	}
    else {
-        // Setup the X86 emulator for the VGA BIOS
-        BE_setVGA(&VGAInfo[device]);
+	/* Setup the X86 emulator for the VGA BIOS */
+	BE_setVGA(&VGAInfo[device]);

-        // Execute the BIOS POST code
-        BE_callRealMode(0xC000,0x0003,&regs,&sregs);
+	/* Execute the BIOS POST code */
+	BE_callRealMode(0xC000,0x0003,&regs,&sregs);

-        // Cleanup and exit
-        BE_getVGA(&VGAInfo[device]);
-        }
+	/* Cleanup and exit */
+	BE_getVGA(&VGAInfo[device]);
+	}
 }

 /****************************************************************************
@@ -206,113 +206,113 @@ static ibool PCI_postControllers(void)
    char    filename[_MAX_PATH];
    FILE    *f;

-    // Disable the primary display controller and AGP VGA pass-through
+    /* Disable the primary display controller and AGP VGA pass-through */
    DISABLE_DEVICE(0);
    if (AGPBridge)
-        DISABLE_AGP_VGA();
+	DISABLE_AGP_VGA();

-    // Now POST all the secondary controllers
+    /* Now POST all the secondary controllers */
    for (device = 0; device < NumDevices; device++) {
-        // Skip the device if it is not enabled (probably an ISA device)
-        if (DeviceIndex[device] == -1)
-            continue;
+	/* Skip the device if it is not enabled (probably an ISA device) */
+	if (DeviceIndex[device] == -1)
+	    continue;

-        // Enable secondary display controller. If the secondary controller
-        // is on the AGP bus, then enable VGA resources for the AGP device.
-        ENABLE_DEVICE(device);
-        if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
-            ENABLE_AGP_VGA();
+	/* Enable secondary display controller. If the secondary controller */
+	/* is on the AGP bus, then enable VGA resources for the AGP device. */
+	ENABLE_DEVICE(device);
+	if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
+	    ENABLE_AGP_VGA();

-        // Check if the controller has already been POST'ed
-        if (VGA_NOT_ACTIVE()) {
-            // Find a viable place to map the secondary PCI BIOS image and map it
-            printk("Device %d not enabled, so attempting warm boot it\n", device);
+	/* Check if the controller has already been POST'ed */
+	if (VGA_NOT_ACTIVE()) {
+	    /* Find a viable place to map the secondary PCI BIOS image and map it */
+	    printk("Device %d not enabled, so attempting warm boot it\n", device);

-            // For AGP devices (and PCI devices that do have the ROM base
-            // address zero'ed out) we have to map the BIOS to a location
-            // that is passed by the AGP bridge to the bus. Some AGP devices
-            // have the ROM base address already set up for us, and some
-            // do not (we map to one of the existing BAR locations in
-            // this case).
-            mappedBIOS = NULL;
-            if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
-                mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
-            else
-                mappedBIOSPhys = PCI_findBIOSAddr(device);
-            printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
-            mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
-            PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
-            BIOSImageLen = mappedBIOS[2] * 512;
-            if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
-                return false;
-            memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
-            PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
+	    /* For AGP devices (and PCI devices that do have the ROM base */
+	    /* address zero'ed out) we have to map the BIOS to a location */
+	    /* that is passed by the AGP bridge to the bus. Some AGP devices */
+	    /* have the ROM base address already set up for us, and some */
+	    /* do not (we map to one of the existing BAR locations in */
+	    /* this case). */
+	    mappedBIOS = NULL;
+	    if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
+		mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
+	    else
+		mappedBIOSPhys = PCI_findBIOSAddr(device);
+	    printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
+	    mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
+	    PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
+	    BIOSImageLen = mappedBIOS[2] * 512;
+	    if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
+		return false;
+	    memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
+	    PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);

-            // Allocate memory to store copy of BIOS from secondary controllers
-            VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
-            VGAInfo[device].BIOSImage = copyOfBIOS;
-            VGAInfo[device].BIOSImageLen = BIOSImageLen;
+	    /* Allocate memory to store copy of BIOS from secondary controllers */
+	    VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
+	    VGAInfo[device].BIOSImage = copyOfBIOS;
+	    VGAInfo[device].BIOSImageLen = BIOSImageLen;

-            // Restore device mappings
-            PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
-            PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
-            PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
+	    /* Restore device mappings */
+	    PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
+	    PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
+	    PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);

-            // Now execute the BIOS POST for the device
-            if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
-                printk("Executing BIOS POST for controller.\n");
-                PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
-                }
+	    /* Now execute the BIOS POST for the device */
+	    if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
+		printk("Executing BIOS POST for controller.\n");
+		PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
+		}

-            // Reset the size of the BIOS image to the final size
-            VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
+	    /* Reset the size of the BIOS image to the final size */
+	    VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;

-            // Save the BIOS and interrupt vector information to disk
-            sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
-            if ((f = fopen(filename,"wb")) != NULL) {
-                fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
-                fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
-                fclose(f);
-                }
-            }
-        else {
-            // Allocate memory to store copy of BIOS from secondary controllers
-            if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
-                return false;
-            VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
-            VGAInfo[device].BIOSImage = copyOfBIOS;
-            VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
+	    /* Save the BIOS and interrupt vector information to disk */
+	    sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
+	    if ((f = fopen(filename,"wb")) != NULL) {
+		fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
+		fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
+		fclose(f);
+		}
+	    }
+	else {
+	    /* Allocate memory to store copy of BIOS from secondary controllers */
+	    if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
+		return false;
+	    VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
+	    VGAInfo[device].BIOSImage = copyOfBIOS;
+	    VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;

-            // Load the BIOS and interrupt vector information from disk
-            sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
-            if ((f = fopen(filename,"rb")) != NULL) {
-                fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
-                fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
-                fclose(f);
-                }
-            }
+	    /* Load the BIOS and interrupt vector information from disk */
+	    sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
+	    if ((f = fopen(filename,"rb")) != NULL) {
+		fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
+		fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
+		fclose(f);
+		}
+	    }

-        // Fix up all the secondary PCI base address registers
-        // (restores them all from the values we read previously)
-        _PCI_fixupSecondaryBARs();
+	/* Fix up all the secondary PCI base address registers */
+	/* (restores them all from the values we read previously) */
+	_PCI_fixupSecondaryBARs();

-        // Disable the secondary controller and AGP VGA pass-through
-        DISABLE_DEVICE(device);
-        if (AGPBridge)
-            DISABLE_AGP_VGA();
-        }
+	/* Disable the secondary controller and AGP VGA pass-through */
+	DISABLE_DEVICE(device);
+	if (AGPBridge)
+	    DISABLE_AGP_VGA();
+	}

-    // Reenable primary display controller and reset AGP bridge control
+    /* Reenable primary display controller and reset AGP bridge control */
    if (AGPBridge)
-        RESTORE_AGP_VGA();
+	RESTORE_AGP_VGA();
    ENABLE_DEVICE(0);

-    // Free physical BIOS image mapping
+    /* Free physical BIOS image mapping */
    PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);

-    // Restore the X86 emulator BIOS info to primary controller
+    /* Restore the X86 emulator BIOS info to primary controller */
    if (!useV86)
-        BE_setVGA(&VGAInfo[0]);
+	BE_setVGA(&VGAInfo[0]);
    return true;
 }

@@ -327,123 +327,123 @@ static void EnumeratePCI(void)
    PCIBridgeInfo   *info;

    printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
-        NumPCI, NumDevices);
+	NumPCI, NumDevices);
    for (index = 0; index < NumDevices; index++)
-        printk("  Display device %d is PCI device %d\n",index,DeviceIndex[index]);
+	printk("  Display device %d is PCI device %d\n",index,DeviceIndex[index]);
    printk("\n");
    printk("Bus Slot Fnc DeviceID  SubSystem Rev Class IRQ Int Cmd\n");
    for (i = 0; i < NumPCI; i++) {
-        printk("%2d   %2d  %2d  %04X:%04X %04X:%04X %02X  %02X:%02X %02X  %02X  %04X   ",
-            PCI[i].slot.p.Bus,
-            PCI[i].slot.p.Device,
-            PCI[i].slot.p.Function,
-            PCI[i].VendorID,
-            PCI[i].DeviceID,
-            PCI[i].SubSystemVendorID,
-            PCI[i].SubSystemID,
-            PCI[i].RevID,
-            PCI[i].BaseClass,
-            PCI[i].SubClass,
-            PCI[i].InterruptLine,
-            PCI[i].InterruptPin,
-            PCI[i].Command);
-        for (index = 0; index < NumDevices; index++) {
-            if (DeviceIndex[index] == i)
-                break;
-            }
-        if (index < NumDevices)
-            printk("<- %d\n", index);
-        else
-            printk("\n");
-        }
+	printk("%2d   %2d  %2d  %04X:%04X %04X:%04X %02X  %02X:%02X %02X  %02X  %04X   ",
+	    PCI[i].slot.p.Bus,
+	    PCI[i].slot.p.Device,
+	    PCI[i].slot.p.Function,
+	    PCI[i].VendorID,
+	    PCI[i].DeviceID,
+	    PCI[i].SubSystemVendorID,
+	    PCI[i].SubSystemID,
+	    PCI[i].RevID,
+	    PCI[i].BaseClass,
+	    PCI[i].SubClass,
+	    PCI[i].InterruptLine,
+	    PCI[i].InterruptPin,
+	    PCI[i].Command);
+	for (index = 0; index < NumDevices; index++) {
+	    if (DeviceIndex[index] == i)
+		break;
+	    }
+	if (index < NumDevices)
+	    printk("<- %d\n", index);
+	else
+	    printk("\n");
+	}
    printk("\n");
    printk("DeviceID  Stat Ifc Cch Lat Hdr BIST\n");
    for (i = 0; i < NumPCI; i++) {
-        printk("%04X:%04X %04X  %02X  %02X  %02X  %02X  %02X   ",
-            PCI[i].VendorID,
-            PCI[i].DeviceID,
-            PCI[i].Status,
-            PCI[i].Interface,
-            PCI[i].CacheLineSize,
-            PCI[i].LatencyTimer,
-            PCI[i].HeaderType,
-            PCI[i].BIST);
-        for (index = 0; index < NumDevices; index++) {
-            if (DeviceIndex[index] == i)
-                break;
-            }
-        if (index < NumDevices)
-            printk("<- %d\n", index);
-        else
-            printk("\n");
-        }
+	printk("%04X:%04X %04X  %02X  %02X  %02X  %02X  %02X   ",
+	    PCI[i].VendorID,
+	    PCI[i].DeviceID,
+	    PCI[i].Status,
+	    PCI[i].Interface,
+	    PCI[i].CacheLineSize,
+	    PCI[i].LatencyTimer,
+	    PCI[i].HeaderType,
+	    PCI[i].BIST);
+	for (index = 0; index < NumDevices; index++) {
+	    if (DeviceIndex[index] == i)
+		break;
+	    }
+	if (index < NumDevices)
+	    printk("<- %d\n", index);
+	else
+	    printk("\n");
+	}
    printk("\n");
    printk("DeviceID  Base10h  Base14h  Base18h  Base1Ch  Base20h  Base24h  ROMBase\n");
    for (i = 0; i < NumPCI; i++) {
-        printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
-            PCI[i].VendorID,
-            PCI[i].DeviceID,
-            PCI[i].BaseAddress10,
-            PCI[i].BaseAddress14,
-            PCI[i].BaseAddress18,
-            PCI[i].BaseAddress1C,
-            PCI[i].BaseAddress20,
-            PCI[i].BaseAddress24,
-            PCI[i].ROMBaseAddress);
-        for (index = 0; index < NumDevices; index++) {
-            if (DeviceIndex[index] == i)
-                break;
-            }
-        if (index < NumDevices)
-            printk("<- %d\n", index);
-        else
-            printk("\n");
-        }
+	printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
+	    PCI[i].VendorID,
+	    PCI[i].DeviceID,
+	    PCI[i].BaseAddress10,
+	    PCI[i].BaseAddress14,
+	    PCI[i].BaseAddress18,
+	    PCI[i].BaseAddress1C,
+	    PCI[i].BaseAddress20,
+	    PCI[i].BaseAddress24,
+	    PCI[i].ROMBaseAddress);
+	for (index = 0; index < NumDevices; index++) {
+	    if (DeviceIndex[index] == i)
+		break;
+	    }
+	if (index < NumDevices)
+	    printk("<- %d\n", index);
+	else
+	    printk("\n");
+	}
    printk("\n");
    printk("DeviceID  BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
    for (i = 0; i < NumPCI; i++) {
-        printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
-            PCI[i].VendorID,
-            PCI[i].DeviceID,
-            PCI[i].BaseAddress10Len,
-            PCI[i].BaseAddress14Len,
-            PCI[i].BaseAddress18Len,
-            PCI[i].BaseAddress1CLen,
-            PCI[i].BaseAddress20Len,
-            PCI[i].BaseAddress24Len,
-            PCI[i].ROMBaseAddressLen);
-        for (index = 0; index < NumDevices; index++) {
-            if (DeviceIndex[index] == i)
-                break;
-            }
-        if (index < NumDevices)
-            printk("<- %d\n", index);
-        else
-            printk("\n");
-        }
+	printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
+	    PCI[i].VendorID,
+	    PCI[i].DeviceID,
+	    PCI[i].BaseAddress10Len,
+	    PCI[i].BaseAddress14Len,
+	    PCI[i].BaseAddress18Len,
+	    PCI[i].BaseAddress1CLen,
+	    PCI[i].BaseAddress20Len,
+	    PCI[i].BaseAddress24Len,
+	    PCI[i].ROMBaseAddressLen);
+	for (index = 0; index < NumDevices; index++) {
+	    if (DeviceIndex[index] == i)
+		break;
+	    }
+	if (index < NumDevices)
+	    printk("<- %d\n", index);
+	else
+	    printk("\n");
+	}
    printk("\n");
    printk("Displaying enumeration of %d bridge devices\n",NumBridges);
    printk("\n");
    printk("DeviceID  P# S# B# IOB  IOL  MemBase  MemLimit PreBase  PreLimit Ctrl\n");
    for (i = 0; i < NumBridges; i++) {
-        info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
-        printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
-            info->VendorID,
-            info->DeviceID,
-            info->PrimaryBusNumber,
-            info->SecondayBusNumber,
-            info->SubordinateBusNumber,
-            ((u16)info->IOBase << 8) & 0xF000,
-            info->IOLimit ?
-                ((u16)info->IOLimit << 8) | 0xFFF : 0,
-            ((u32)info->MemoryBase << 16) & 0xFFF00000,
-            info->MemoryLimit ?
-                ((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
-            ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
-            info->PrefetchableMemoryLimit ?
-                ((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
-            info->BridgeControl);
-        }
+	info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
+	printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
+	    info->VendorID,
+	    info->DeviceID,
+	    info->PrimaryBusNumber,
+	    info->SecondayBusNumber,
+	    info->SubordinateBusNumber,
+	    ((u16)info->IOBase << 8) & 0xF000,
+	    info->IOLimit ?
+		((u16)info->IOLimit << 8) | 0xFFF : 0,
+	    ((u32)info->MemoryBase << 16) & 0xFFF00000,
+	    info->MemoryLimit ?
+		((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
+	    ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
+	    info->PrefetchableMemoryLimit ?
+		((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
+	    info->BridgeControl);
+	}
    printk("\n");
 }

@@ -460,51 +460,51 @@ static int PCI_enumerateDevices(void)
    int             i,j;
    PCIBridgeInfo   *info;

-    // If this is the first time we have been called, enumerate all
-    // devices on the PCI bus.
+    /* If this is the first time we have been called, enumerate all */
+    /* devices on the PCI bus. */
    if (NumPCI == -1) {
-        for (i = 0; i < MAX_PCI_DEVICES; i++)
-            PCI[i].dwSize = sizeof(PCI[i]);
-        if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
-            return -1;
+	for (i = 0; i < MAX_PCI_DEVICES; i++)
+	    PCI[i].dwSize = sizeof(PCI[i]);
+	if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
+	    return -1;

-        // Build a list of all PCI bridge devices
-        for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
-            if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
-                if (NumBridges < MAX_PCI_DEVICES)
-                    BridgeIndex[NumBridges++] = i;
-                }
-            }
+	/* Build a list of all PCI bridge devices */
+	for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
+	    if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
+		if (NumBridges < MAX_PCI_DEVICES)
+		    BridgeIndex[NumBridges++] = i;
+		}
+	    }

-        // Now build a list of all display class devices
-        for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
-            if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
-                if ((PCI[i].Command & 0x3) == 0x3) {
-                    DeviceIndex[0] = i;
-                    }
-                else {
-                    if (NumDevices < MAX_PCI_DEVICES)
-                        DeviceIndex[NumDevices++] = i;
-                    }
-                if (PCI[i].slot.p.Bus != 0) {
-                    // This device is on a different bus than the primary
-                    // PCI bus, so it is probably an AGP device. Find the
-                    // AGP bus device that controls that bus so we can
-                    // control it.
-                    for (j = 0; j < NumBridges; j++) {
-                        info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
-                        if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
-                            AGPBridge = info;
-                            break;
-                            }
-                        }
-                    }
-                }
-            }
+	/* Now build a list of all display class devices */
+	for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
+	    if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
+		if ((PCI[i].Command & 0x3) == 0x3) {
+		    DeviceIndex[0] = i;
+		    }
+		else {
+		    if (NumDevices < MAX_PCI_DEVICES)
+			DeviceIndex[NumDevices++] = i;
+		    }
+		if (PCI[i].slot.p.Bus != 0) {
+		    /* This device is on a different bus than the primary */
+		    /* PCI bus, so it is probably an AGP device. Find the */
+		    /* AGP bus device that controls that bus so we can */
+		    /* control it. */
+		    for (j = 0; j < NumBridges; j++) {
+			info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
+			if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
+			    AGPBridge = info;
+			    break;
+			    }
+			}
+		    }
+		}
+	    }

-        // Enumerate all PCI and bridge devices to log file
-        EnumeratePCI();
-        }
+	/* Enumerate all PCI and bridge devices to log file */
+	EnumeratePCI();
+	}
    return NumDevices;
 }

@@ -522,48 +522,48 @@ void printk(const char *fmt, ...)
 int main(int argc,char *argv[])
 {
    while (argc > 1) {
-        if (stricmp(argv[1],"-usev86") == 0) {
-            useV86 = true;
-            }
-        else if (stricmp(argv[1],"-force") == 0) {
-            forcePost = true;
-            }
+	if (stricmp(argv[1],"-usev86") == 0) {
+	    useV86 = true;
+	    }
+	else if (stricmp(argv[1],"-force") == 0) {
+	    forcePost = true;
+	    }
 #ifdef  DEBUG
-        else if (stricmp(argv[1],"-decode") == 0) {
-            debugFlags |= DEBUG_DECODE_F;
-            }
-        else if (stricmp(argv[1],"-iotrace") == 0) {
-            debugFlags |= DEBUG_IO_TRACE_F;
-            }
+	else if (stricmp(argv[1],"-decode") == 0) {
+	    debugFlags |= DEBUG_DECODE_F;
+	    }
+	else if (stricmp(argv[1],"-iotrace") == 0) {
+	    debugFlags |= DEBUG_IO_TRACE_F;
+	    }
 #endif
-        else {
-            printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
-            exit(-1);
-            }
-        argc--;
-        argv++;
-        }
+	else {
+	    printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
+	    exit(-1);
+	    }
+	argc--;
+	argv++;
+	}
    if ((logfile = fopen("warmboot.log","w")) == NULL)
-        exit(1);
+	exit(1);

    PM_init();
    if (!useV86) {
-        // Initialise the x86 BIOS emulator
-        BE_init(false,debugFlags,65536,&VGAInfo[0]);
-        }
+	/* Initialise the x86 BIOS emulator */
+	BE_init(false,debugFlags,65536,&VGAInfo[0]);
+	}

-    // Enumerate all devices (which POST's them at the same time)
+    /* Enumerate all devices (which POST's them at the same time) */
    if (PCI_enumerateDevices() < 1) {
-        printk("No PCI display devices found!\n");
-        return -1;
-        }
+	printk("No PCI display devices found!\n");
+	return -1;
+	}

-    // Post all the display controller BIOS'es
+    /* Post all the display controller BIOS'es */
    PCI_postControllers();

-    // Cleanup and exit the emulator
+    /* Cleanup and exit the emulator */
    if (!useV86)
-        BE_exit();
+	BE_exit();
    fclose(logfile);
    return 0;
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aabeos.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aabeos.c
@@ -70,7 +70,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -82,11 +82,11 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else {
-        struct timeval t;
-        gettimeofday(&t, NULL);
-        value->low = t.tv_sec*1000000 + t.tv_usec;
-        value->high = 0;
-        }
+	struct timeval t;
+	gettimeofday(&t, NULL);
+	value->low = t.tv_sec*1000000 + t.tv_usec;
+	value->high = 0;
+	}
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aados.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aados.c
@@ -49,7 +49,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        return true;
+	return true;
    return false;
 }

--- a/board/MAI/bios_emulator/scitech/src/common/aalib.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aalib.c
@@ -100,35 +100,35 @@ static ibool LoadDriver(void)

    /* Check if we have already loaded the driver */
    if (loaded)
-        return true;
+	return true;
    PM_init();
    _AA_exports.dwSize = sizeof(_AA_exports);

    /* Open the BPD file */
    if (!PM_findBPD(DLL_NAME,bpdpath))
-        return false;
+	return false;
    strcpy(filename,bpdpath);
    strcat(filename,DLL_NAME);
    if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
-        return false;
+	return false;
    if ((AA_initLibrary = (AA_initLibrary_t)PE_getProcAddress(hModBPD,"_AA_initLibrary")) == NULL)
-        return false;
+	return false;
    bpdpath[strlen(bpdpath)-1] = 0;
    if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
-        strcpy(bpdpath,PM_getNucleusConfigPath());
+	strcpy(bpdpath,PM_getNucleusConfigPath());
    else {
-        PM_backslash(bpdpath);
-        strcat(bpdpath,"config");
-        }
+	PM_backslash(bpdpath);
+	strcat(bpdpath,"config");
+	}
    if ((aaExp = AA_initLibrary(bpdpath,filename,&_PM_imports,&_N_imports,&_AA_imports)) == NULL)
-        PM_fatalError("AA_initLibrary failed!\n");
+	PM_fatalError("AA_initLibrary failed!\n");

    /* Initialize all default imports to point to fatal error handler
     * for upwards compatibility, and copy the exported functions.
     */
    max = sizeof(_AA_exports)/sizeof(AA_initLibrary_t);
    for (i = 0,p = (ulong*)&_AA_exports; i < max; i++)
-        *p++ = (ulong)_AA_fatalErrorHandler;
+	*p++ = (ulong)_AA_fatalErrorHandler;
    memcpy(&_AA_exports,aaExp,MIN(sizeof(_AA_exports),aaExp->dwSize));
    loaded = true;
    return true;
@@ -143,7 +143,7 @@ static ibool LoadDriver(void)
 int NAPI AA_status(void)
 {
    if (!loaded)
-        return nDriverNotFound;
+	return nDriverNotFound;
    return _AA_exports.AA_status();
 }

@@ -152,7 +152,7 @@ const char * NAPI AA_errorMsg(
    N_int32 status)
 {
    if (!loaded)
-        return "Unable to load Nucleus device driver!";
+	return "Unable to load Nucleus device driver!";
    return _AA_exports.AA_errorMsg(status);
 }

@@ -160,7 +160,7 @@ const char * NAPI AA_errorMsg(
 int NAPI AA_getDaysLeft(void)
 {
    if (!LoadDriver())
-        return -1;
+	return -1;
    return _AA_exports.AA_getDaysLeft();
 }

@@ -168,7 +168,7 @@ int NAPI AA_getDaysLeft(void)
 int NAPI AA_registerLicense(uchar *license)
 {
    if (!LoadDriver())
-        return 0;
+	return 0;
    return _AA_exports.AA_registerLicense(license);
 }

@@ -176,7 +176,7 @@ int NAPI AA_registerLicense(uchar *license)
 int NAPI AA_enumerateDevices(void)
 {
    if (!LoadDriver())
-        return 0;
+	return 0;
    return _AA_exports.AA_enumerateDevices();
 }

@@ -184,7 +184,7 @@ int NAPI AA_enumerateDevices(void)
 AA_devCtx * NAPI AA_loadDriver(N_int32 deviceIndex)
 {
    if (!LoadDriver())
-        return NULL;
+	return NULL;
    return _AA_exports.AA_loadDriver(deviceIndex);
 }
 #endif
@@ -211,15 +211,15 @@ void NAPI _OS_delay(
    LZTimerObject   tm;

    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        if (!inited) {
-            ZTimerInit();
-            inited = true;
-            }
-        LZTimerOnExt(&tm);
-        while (LZTimerLapExt(&tm) < microSeconds)
-            ;
-        LZTimerOnExt(&tm);
-        }
+	if (!inited) {
+	    ZTimerInit();
+	    inited = true;
+	    }
+	LZTimerOnExt(&tm);
+	while (LZTimerLapExt(&tm) < microSeconds)
+	    ;
+	LZTimerOnExt(&tm);
+	}
    else
-        _OS_delay8253(microSeconds);
+	_OS_delay8253(microSeconds);
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aalinux.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aalinux.c
@@ -72,7 +72,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -84,11 +84,11 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else {
-        struct timeval t;
-        gettimeofday(&t, NULL);
-        value->low = t.tv_sec*1000000 + t.tv_usec;
-        value->high = 0;
-        }
+	struct timeval t;
+	gettimeofday(&t, NULL);
+	value->low = t.tv_sec*1000000 + t.tv_usec;
+	value->high = 0;
+	}
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aaos2.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aaos2.c
@@ -65,25 +65,25 @@ GA_sharedInfo * NAPI GA_getSharedInfo(

    /* Open our helper device driver */
    if (DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
-            FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
-            NULL))
-        PM_fatalError("Unable to open SDDHELP$ helper device driver!");
+	    FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
+	    NULL))
+	PM_fatalError("Unable to open SDDHELP$ helper device driver!");
    outLen = sizeof(result);
    DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,PMHELP_GETSHAREDINFO,
-        NULL, 0, NULL,
-        &result, outLen, &outLen);
+	NULL, 0, NULL,
+	&result, outLen, &outLen);
    DosClose(hSDDHelp);
    if (result) {
-        /* We have found the shared Nucleus packet. Because not all processes
-         * map to SDDPMI.DLL, we need to ensure that we connect to this
-         * DLL so that it gets mapped into our address space (that is
-         * where the shared Nucleus packet is located). Simply doing a
-         * DosLoadModule on it is enough for this.
-         */
-        HMODULE hModSDDPMI;
-        char    buf[80];
-        DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
-        }
+	/* We have found the shared Nucleus packet. Because not all processes
+	 * map to SDDPMI.DLL, we need to ensure that we connect to this
+	 * DLL so that it gets mapped into our address space (that is
+	 * where the shared Nucleus packet is located). Simply doing a
+	 * DosLoadModule on it is enough for this.
+	 */
+	HMODULE hModSDDPMI;
+	char    buf[80];
+	DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
+	}
    return (GA_sharedInfo*)result;
 }

@@ -106,7 +106,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -118,7 +118,7 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else
-        DosTmrQueryTime((QWORD*)value);
+	DosTmrQueryTime((QWORD*)value);
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aaqnx.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aaqnx.c
@@ -72,7 +72,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -84,12 +84,12 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else {
-        struct timespec ts;
+	struct timespec ts;

-        clock_gettime(CLOCK_REALTIME, &ts);
-        value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
-        value->high = 0;
-        }
+	clock_gettime(CLOCK_REALTIME, &ts);
+	value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
+	value->high = 0;
+	}
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aartt.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aartt.c
@@ -71,9 +71,9 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        haveRDTSC = true;
-        return true;
-        }
+	haveRDTSC = true;
+	return true;
+	}
    return false;
 }

@@ -85,5 +85,5 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aasmx.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aasmx.c
@@ -68,7 +68,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        return true;
+	return true;
    return false;
 }

--- a/board/MAI/bios_emulator/scitech/src/common/aavxd.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aavxd.c
@@ -71,8 +71,8 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        haveRDTSC = true;
-        }
+	haveRDTSC = true;
+	}
    return true;
 }

@@ -84,7 +84,7 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else
-        VTD_Get_Real_Time(&value->high,&value->low);
+	VTD_Get_Real_Time(&value->high,&value->low);
 }
--- a/board/MAI/bios_emulator/scitech/src/common/aawin32.c
+++ b/board/MAI/bios_emulator/scitech/src/common/aawin32.c
@@ -75,9 +75,9 @@ GA_sharedInfo * NAPI GA_getSharedInfo(
    PM_init();
    inBuf[0] = device;
    if (DeviceIoControl(_PM_hDevice, PMHELP_GETSHAREDINFO32, inBuf, sizeof(inBuf),
-            outBuf, sizeof(outBuf), &count, NULL)) {
-        return (GA_sharedInfo*)outBuf[0];
-        }
+	    outBuf, sizeof(outBuf), &count, NULL)) {
+	return (GA_sharedInfo*)outBuf[0];
+	}
    return NULL;
 }

@@ -102,16 +102,16 @@ static ibool NAPI _GA_softStereoInit(
    GA_devCtx *dc)
 {
    if (_PM_hDevice) {
-        DWORD   inBuf[1];   /* Buffer to send data to VxD       */
-        DWORD   outBuf[1];  /* Buffer to receive data from VxD  */
-        DWORD   count;      /* Count of bytes returned from VxD */
+	DWORD   inBuf[1];   /* Buffer to send data to VxD       */
+	DWORD   outBuf[1];  /* Buffer to receive data from VxD  */
+	DWORD   count;      /* Count of bytes returned from VxD */

-        inBuf[0] = (ulong)dc;
-        if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
-                outBuf, sizeof(outBuf), &count, NULL)) {
-            return outBuf[0];
-            }
-        }
+	inBuf[0] = (ulong)dc;
+	if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
+		outBuf, sizeof(outBuf), &count, NULL)) {
+	    return outBuf[0];
+	    }
+	}
    return false;
 }

@@ -122,9 +122,9 @@ This function turns on software stereo mode, either directly or via the VxD.
 static void NAPI _GA_softStereoOn(void)
 {
    if (_PM_hDevice) {
-        DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
-            NULL, 0, NULL, NULL);
-        }
+	DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
+	    NULL, 0, NULL, NULL);
+	}
 }

 /****************************************************************************
@@ -137,14 +137,14 @@ static void NAPI _GA_softStereoScheduleFlip(
    N_uint32 rightAddr)
 {
    if (_PM_hDevice) {
-        DWORD   inBuf[2];   /* Buffer to send data to VxD       */
-        DWORD   count;      /* Count of bytes returned from VxD */
+	DWORD   inBuf[2];   /* Buffer to send data to VxD       */
+	DWORD   count;      /* Count of bytes returned from VxD */

-        inBuf[0] = (ulong)leftAddr;
-        inBuf[1] = (ulong)rightAddr;
-        DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
-            NULL, 0, &count, NULL);
-        }
+	inBuf[0] = (ulong)leftAddr;
+	inBuf[1] = (ulong)rightAddr;
+	DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
+	    NULL, 0, &count, NULL);
+	}
 }

 /****************************************************************************
@@ -154,14 +154,14 @@ This function turns off software stereo mode, either directly or via the VxD.
 static N_int32 NAPI _GA_softStereoGetFlipStatus(void)
 {
    if (_PM_hDevice) {
-        DWORD   outBuf[1];  /* Buffer to receive data from VxD  */
-        DWORD   count;      /* Count of bytes returned from VxD */
+	DWORD   outBuf[1];  /* Buffer to receive data from VxD  */
+	DWORD   count;      /* Count of bytes returned from VxD */

-        if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
-                outBuf, sizeof(outBuf), &count, NULL)) {
-            return outBuf[0];
-            }
-        }
+	if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
+		outBuf, sizeof(outBuf), &count, NULL)) {
+	    return outBuf[0];
+	    }
+	}
    return 0;
 }

@@ -172,7 +172,7 @@ This function turns off software stereo mode, either directly or via the VxD.
 static void NAPI _GA_softStereoWaitTillFlipped(void)
 {
    while (!_GA_softStereoGetFlipStatus())
-        ;
+	;
 }

 /****************************************************************************
@@ -182,9 +182,9 @@ This function turns off software stereo mode, either directly or via the VxD.
 static void NAPI _GA_softStereoOff(void)
 {
    if (_PM_hDevice) {
-        DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
-            NULL, 0, NULL, NULL);
-        }
+	DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
+	    NULL, 0, NULL, NULL);
+	}
 }

 /****************************************************************************
@@ -195,9 +195,9 @@ the VxD.
 static void NAPI _GA_softStereoExit(void)
 {
    if (_PM_hDevice) {
-        DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
-            NULL, 0, NULL, NULL);
-        }
+	DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
+	    NULL, 0, NULL, NULL);
+	}
 }

 /****************************************************************************
@@ -217,14 +217,14 @@ static GA_devCtx * NAPI _GA_loadDriver(
    N_int32     totalMemory = 0,oldIOPL;

    if (deviceIndex >= GA_MAX_DEVICES)
-        PM_fatalError("DeviceIndex too large in GA_loadDriver!");
+	PM_fatalError("DeviceIndex too large in GA_loadDriver!");
    PM_init();
    inBuf[0] = deviceIndex;
    if (DeviceIoControl(_PM_hDevice, PMHELP_GETMEMSIZE32,
-            inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
-        totalMemory = outBuf[0];
+	    inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
+	totalMemory = outBuf[0];
    if (totalMemory == 0)
-        totalMemory = 8192;
+	totalMemory = 8192;
    _GA_exports.GA_forceMemSize(totalMemory,shared);
    oldIOPL = PM_setIOPL(3);
    dc = ORG_GA_loadDriver(deviceIndex,shared);
@@ -240,13 +240,13 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        haveRDTSC = true;
-        return true;
-        }
+	haveRDTSC = true;
+	return true;
+	}
    else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
-        haveRDTSC = false;
-        return true;
-        }
+	haveRDTSC = false;
+	return true;
+	}
    return false;
 }

@@ -258,7 +258,7 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else
-        QueryPerformanceCounter((LARGE_INTEGER*)value);
+	QueryPerformanceCounter((LARGE_INTEGER*)value);
 }
--- a/board/MAI/bios_emulator/scitech/src/common/agplib.c
+++ b/board/MAI/bios_emulator/scitech/src/common/agplib.c
@@ -88,31 +88,31 @@ static ibool LoadDriver(void)

    /* Check if we have already loaded the driver */
    if (loaded)
-        return true;
+	return true;
    PM_init();

    /* Open the BPD file */
    if (!PM_findBPD(DLL_NAME,bpdpath))
-        return false;
+	return false;
    strcpy(filename,bpdpath);
    strcat(filename,DLL_NAME);
    if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
-        return false;
+	return false;
    if ((AGP_initLibrary = (AGP_initLibrary_t)PE_getProcAddress(hModBPD,"_AGP_initLibrary")) == NULL)
-        return false;
+	return false;
    bpdpath[strlen(bpdpath)-1] = 0;
    if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
-        strcpy(bpdpath,PM_getNucleusConfigPath());
+	strcpy(bpdpath,PM_getNucleusConfigPath());
    else {
-        PM_backslash(bpdpath);
-        strcat(bpdpath,"config");
-        }
+	PM_backslash(bpdpath);
+	strcat(bpdpath,"config");
+	}
    if ((agpExp = AGP_initLibrary(bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_AGP_imports)) == NULL)
-        PM_fatalError("AGP_initLibrary failed!\n");
+	PM_fatalError("AGP_initLibrary failed!\n");
    _AGP_exports.dwSize = sizeof(_AGP_exports);
    max = sizeof(_AGP_exports)/sizeof(AGP_initLibrary_t);
    for (i = 0,p = (ulong*)&_AGP_exports; i < max; i++)
-        *p++ = (ulong)_AGP_fatalErrorHandler;
+	*p++ = (ulong)_AGP_fatalErrorHandler;
    memcpy(&_AGP_exports,agpExp,MIN(sizeof(_AGP_exports),agpExp->dwSize));
    loaded = true;
    return true;
@@ -127,7 +127,7 @@ static ibool LoadDriver(void)
 int NAPI AGP_status(void)
 {
    if (!loaded)
-        return nDriverNotFound;
+	return nDriverNotFound;
    return _AGP_exports.AGP_status();
 }

@@ -136,7 +136,7 @@ const char * NAPI AGP_errorMsg(
    N_int32 status)
 {
    if (!loaded)
-        return "Unable to load Nucleus device driver!";
+	return "Unable to load Nucleus device driver!";
    return _AGP_exports.AGP_errorMsg(status);
 }

@@ -144,7 +144,7 @@ const char * NAPI AGP_errorMsg(
 AGP_devCtx * NAPI AGP_loadDriver(N_int32 deviceIndex)
 {
    if (!LoadDriver())
-        return NULL;
+	return NULL;
    return _AGP_exports.AGP_loadDriver(deviceIndex);
 }

@@ -153,7 +153,7 @@ void NAPI AGP_unloadDriver(
    AGP_devCtx *dc)
 {
    if (loaded)
-        _AGP_exports.AGP_unloadDriver(dc);
+	_AGP_exports.AGP_unloadDriver(dc);
 }

 /* {secret} */
@@ -161,7 +161,7 @@ void NAPI AGP_getGlobalOptions(
    AGP_globalOptions *options)
 {
    if (LoadDriver())
-        _AGP_exports.AGP_getGlobalOptions(options);
+	_AGP_exports.AGP_getGlobalOptions(options);
 }

 /* {secret} */
@@ -169,7 +169,7 @@ void NAPI AGP_setGlobalOptions(
    AGP_globalOptions *options)
 {
    if (LoadDriver())
-        _AGP_exports.AGP_setGlobalOptions(options);
+	_AGP_exports.AGP_setGlobalOptions(options);
 }

 /* {secret} */
@@ -177,7 +177,7 @@ void NAPI AGP_saveGlobalOptions(
    AGP_globalOptions *options)
 {
    if (loaded)
-        _AGP_exports.AGP_saveGlobalOptions(options);
+	_AGP_exports.AGP_saveGlobalOptions(options);
 }
 #endif

@@ -197,24 +197,23 @@ void NAPI _OS_delay(

    if (!inited) {
 #ifndef __WIN32_VXD__
-        // This has been causing problems in VxD's for some reason, so for now
-        // we avoid using it.
-        if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-            ZTimerInit();
-            haveRDTSC = true;
-            }
-        else
+	/* This has been causing problems in VxD's for some reason, so for now */
+	/* we avoid using it. */
+	if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
+	    ZTimerInit();
+	    haveRDTSC = true;
+	    }
+	else
 #endif
-            haveRDTSC = false;
-        inited = true;
-        }
+	    haveRDTSC = false;
+	inited = true;
+	}
    if (haveRDTSC) {
-        LZTimerOnExt(&tm);
-        while (LZTimerLapExt(&tm) < microSeconds)
-            ;
-        LZTimerOnExt(&tm);
-        }
+	LZTimerOnExt(&tm);
+	while (LZTimerLapExt(&tm) < microSeconds)
+	    ;
+	LZTimerOnExt(&tm);
+	}
    else
-        _OS_delay8253(microSeconds);
+	_OS_delay8253(microSeconds);
 }
-
--- a/board/MAI/bios_emulator/scitech/src/common/center.c
+++ b/board/MAI/bios_emulator/scitech/src/common/center.c
@@ -60,19 +60,19 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
    CenterY = ((RectParent.bottom - RectParent.top) - Height) / 2;

    if ((CenterX < 0) || (CenterY < 0)) {
-        /* The Center Window is smaller than the parent window. */
-        if (hWndParent != GetDesktopWindow()) {
-            /* If the parent window is not the desktop use the desktop size. */
-            CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
-            CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
-            }
-        CenterX = (CenterX < 0) ? 0: CenterX;
-        CenterY = (CenterY < 0) ? 0: CenterY;
-        }
+	/* The Center Window is smaller than the parent window. */
+	if (hWndParent != GetDesktopWindow()) {
+	    /* If the parent window is not the desktop use the desktop size. */
+	    CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
+	    CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
+	    }
+	CenterX = (CenterX < 0) ? 0: CenterX;
+	CenterY = (CenterY < 0) ? 0: CenterY;
+	}
    else {
-        CenterX += RectParent.left;
-        CenterY += RectParent.top;
-        }
+	CenterX += RectParent.left;
+	CenterY += RectParent.top;
+	}

    /* Copy the values into RectCenter */
    RectCenter.left = CenterX;
@@ -82,8 +82,8 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)

    /* Move the window to the new location */
    MoveWindow(hWndCenter, RectCenter.left, RectCenter.top,
-            (RectCenter.right - RectCenter.left),
-            (RectCenter.bottom - RectCenter.top), repaint);
+	    (RectCenter.right - RectCenter.left),
+	    (RectCenter.bottom - RectCenter.top), repaint);
 }

 void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
@@ -117,7 +117,6 @@ void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)

    /* Move the window to the new location */
    MoveWindow(hWndLogo, RectCenter.left, RectCenter.top,
-            (RectCenter.right - RectCenter.left),
-            (RectCenter.bottom - RectCenter.top), false);
+	    (RectCenter.right - RectCenter.left),
+	    (RectCenter.bottom - RectCenter.top), false);
 }
-
--- a/board/MAI/bios_emulator/scitech/src/common/cmdline.c
+++ b/board/MAI/bios_emulator/scitech/src/common/cmdline.c
@@ -106,49 +106,49 @@ int getcmdopt(
    char    *formatchar;

    if (argc > nextargv) {
-        if (nextchar == NULL) {
-            nextchar = argv[nextargv];      /* Index next argument      */
-            if (nextchar == NULL) {
-                nextargv++;
-                return ALLDONE;             /* No more options          */
-                }
-            if (IS_NOT_SWITCH_CHAR(*nextchar)) {
-                nextchar = NULL;
-                return PARAMETER;           /* We have a parameter      */
-                }
-            nextchar++;                     /* Move past switch operator */
-            if (IS_SWITCH_CHAR(*nextchar)) {
-                nextchar = NULL;
-                return INVALID;             /* Ignore rest of line      */
-                }
-            }
-        if ((ch = *(nextchar++)) == 0) {
-            nextchar = NULL;
-            return INVALID;                 /* No options on line       */
-            }
+	if (nextchar == NULL) {
+	    nextchar = argv[nextargv];      /* Index next argument      */
+	    if (nextchar == NULL) {
+		nextargv++;
+		return ALLDONE;             /* No more options          */
+		}
+	    if (IS_NOT_SWITCH_CHAR(*nextchar)) {
+		nextchar = NULL;
+		return PARAMETER;           /* We have a parameter      */
+		}
+	    nextchar++;                     /* Move past switch operator */
+	    if (IS_SWITCH_CHAR(*nextchar)) {
+		nextchar = NULL;
+		return INVALID;             /* Ignore rest of line      */
+		}
+	    }
+	if ((ch = *(nextchar++)) == 0) {
+	    nextchar = NULL;
+	    return INVALID;                 /* No options on line       */
+	    }

-        if (ch == ':' ||  (formatchar = strchr(format, ch)) == NULL)
-            return INVALID;
+	if (ch == ':' ||  (formatchar = strchr(format, ch)) == NULL)
+	    return INVALID;

-        if (*(++formatchar) == ':') {   /* Expect an argument after option */
-            nextargv++;
-            if (*nextchar == 0) {
-                if (argc <= nextargv)
-                    return INVALID;
-                nextchar = argv[nextargv++];
-                }
-            *argument = nextchar;
-            nextchar = NULL;
-            }
-        else {                      /* We have a switch style option    */
-            if (*nextchar == 0) {
-                nextargv++;
-                nextchar = NULL;
-                }
-            *argument = NULL;
-            }
-        return ch;                  /* return the option specifier      */
-        }
+	if (*(++formatchar) == ':') {   /* Expect an argument after option */
+	    nextargv++;
+	    if (*nextchar == 0) {
+		if (argc <= nextargv)
+		    return INVALID;
+		nextchar = argv[nextargv++];
+		}
+	    *argument = nextchar;
+	    nextchar = NULL;
+	    }
+	else {                      /* We have a switch style option    */
+	    if (*nextchar == 0) {
+		nextargv++;
+		nextchar = NULL;
+		}
+	    *argument = NULL;
+	    }
+	return ch;                  /* return the option specifier      */
+	}
    nextchar = NULL;
    nextargv++;
    return ALLDONE;                 /* no arguments on command line     */
@@ -174,51 +174,51 @@ static int parse_option(
    int     num_read;

    switch ((int)(optarr->type)) {
-        case OPT_INTEGER:
-            num_read = sscanf(argument,"%d",(int*)optarr->arg);
-            break;
-        case OPT_HEX:
-            num_read = sscanf(argument,"%x",(int*)optarr->arg);
-            break;
-        case OPT_OCTAL:
-            num_read = sscanf(argument,"%o",(int*)optarr->arg);
-            break;
-        case OPT_UNSIGNED:
-            num_read = sscanf(argument,"%u",(uint*)optarr->arg);
-            break;
-        case OPT_LINTEGER:
-            num_read = sscanf(argument,"%ld",(long*)optarr->arg);
-            break;
-        case OPT_LHEX:
-            num_read = sscanf(argument,"%lx",(long*)optarr->arg);
-            break;
-        case OPT_LOCTAL:
-            num_read = sscanf(argument,"%lo",(long*)optarr->arg);
-            break;
-        case OPT_LUNSIGNED:
-            num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
-            break;
-        case OPT_FLOAT:
-            num_read = sscanf(argument,"%f",(float*)optarr->arg);
-            break;
-        case OPT_DOUBLE:
-            num_read = sscanf(argument,"%lf",(double*)optarr->arg);
-            break;
-        case OPT_LDOUBLE:
-            num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
-            break;
-        case OPT_STRING:
-            num_read = 1;           /* This always works    */
-            *((char**)optarr->arg) = argument;
-            break;
-        default:
-            return INVALID;
-        }
+	case OPT_INTEGER:
+	    num_read = sscanf(argument,"%d",(int*)optarr->arg);
+	    break;
+	case OPT_HEX:
+	    num_read = sscanf(argument,"%x",(int*)optarr->arg);
+	    break;
+	case OPT_OCTAL:
+	    num_read = sscanf(argument,"%o",(int*)optarr->arg);
+	    break;
+	case OPT_UNSIGNED:
+	    num_read = sscanf(argument,"%u",(uint*)optarr->arg);
+	    break;
+	case OPT_LINTEGER:
+	    num_read = sscanf(argument,"%ld",(long*)optarr->arg);
+	    break;
+	case OPT_LHEX:
+	    num_read = sscanf(argument,"%lx",(long*)optarr->arg);
+	    break;
+	case OPT_LOCTAL:
+	    num_read = sscanf(argument,"%lo",(long*)optarr->arg);
+	    break;
+	case OPT_LUNSIGNED:
+	    num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
+	    break;
+	case OPT_FLOAT:
+	    num_read = sscanf(argument,"%f",(float*)optarr->arg);
+	    break;
+	case OPT_DOUBLE:
+	    num_read = sscanf(argument,"%lf",(double*)optarr->arg);
+	    break;
+	case OPT_LDOUBLE:
+	    num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
+	    break;
+	case OPT_STRING:
+	    num_read = 1;           /* This always works    */
+	    *((char**)optarr->arg) = argument;
+	    break;
+	default:
+	    return INVALID;
+	}

    if (num_read == 0)
-        return INVALID;
+	return INVALID;
    else
-        return ALLDONE;
+	return ALLDONE;
 }

 /****************************************************************************
@@ -261,8 +261,8 @@ int getargs(
    int num_opt,
    Option optarr[],
    int (*do_param)(
-        char *param,
-        int num))
+	char *param,
+	int num))
 {
    int     i,opt;
    char    *argument;
@@ -273,51 +273,51 @@ int getargs(

    strcpy(cmdstr,"hH?");
    for (i = 0,opt = 3; i < num_opt; i++,opt++) {
-        cmdstr[opt] = optarr[i].opt;
-        if (optarr[i].type != OPT_SWITCH) {
-            cmdstr[++opt] = ':';
-            }
-        }
+	cmdstr[opt] = optarr[i].opt;
+	if (optarr[i].type != OPT_SWITCH) {
+	    cmdstr[++opt] = ':';
+	    }
+	}
    cmdstr[opt] = '\0';

    for (;;) {
-        opt = getcmdopt(argc,argv,cmdstr,&argument);
-        switch (opt) {
-            case 'H':
-            case 'h':
-            case '?':
-                return HELP;
-            case ALLDONE:
-                return ALLDONE;
-            case INVALID:
-                return INVALID;
-            case PARAMETER:
-                if (do_param == NULL)
-                    return INVALID;
-                if (do_param(argv[nextargv],param_num) == INVALID)
-                    return INVALID;
-                nextargv++;
-                param_num++;
-                break;
-            default:
+	opt = getcmdopt(argc,argv,cmdstr,&argument);
+	switch (opt) {
+	    case 'H':
+	    case 'h':
+	    case '?':
+		return HELP;
+	    case ALLDONE:
+		return ALLDONE;
+	    case INVALID:
+		return INVALID;
+	    case PARAMETER:
+		if (do_param == NULL)
+		    return INVALID;
+		if (do_param(argv[nextargv],param_num) == INVALID)
+		    return INVALID;
+		nextargv++;
+		param_num++;
+		break;
+	    default:

-                /* Search for the option in the option array. We are
-                 * guaranteed to find it.
-                 */
+		/* Search for the option in the option array. We are
+		 * guaranteed to find it.
+		 */

-                for (i = 0; i < num_opt; i++) {
-                    if (optarr[i].opt == opt)
-                        break;
-                    }
-                if (optarr[i].type == OPT_SWITCH)
-                    *((ibool*)optarr[i].arg) = true;
-                else {
-                    if (parse_option(&optarr[i],argument) == INVALID)
-                        return INVALID;
-                    }
-                break;
-            }
-        }
+		for (i = 0; i < num_opt; i++) {
+		    if (optarr[i].opt == opt)
+			break;
+		    }
+		if (optarr[i].type == OPT_SWITCH)
+		    *((ibool*)optarr[i].arg) = true;
+		else {
+		    if (parse_option(&optarr[i],argument) == INVALID)
+			return INVALID;
+		    }
+		break;
+	    }
+	}
 }

 /****************************************************************************
@@ -340,11 +340,11 @@ void print_desc(
    int     i;

    for (i = 0; i < num_opt; i++) {
-        if (optarr[i].type == OPT_SWITCH)
-            printf("  -%c       %s\n",optarr[i].opt,optarr[i].desc);
-        else
-            printf("  -%c<arg>  %s\n",optarr[i].opt,optarr[i].desc);
-        }
+	if (optarr[i].type == OPT_SWITCH)
+	    printf("  -%c       %s\n",optarr[i].opt,optarr[i].desc);
+	else
+	    printf("  -%c<arg>  %s\n",optarr[i].opt,optarr[i].desc);
+	}
 }

 /****************************************************************************
@@ -382,45 +382,45 @@ int parse_commandline(
    argv[argc++] = filename;
    cmdLine = strncpy(str, cmdLine, sizeof(str)-1);
    while (*cmdLine) {
-        switch (*cmdLine) {
-            case '"' :
-                if (prevWord != NULL) {
-                    if (inQuote) {
-                        if (!noStrip)
-                            *cmdLine = '\0';
-                        argv [argc++] = prevWord;
-                        prevWord = NULL;
-                        }
-                    else
-                        noStrip = TRUE;
-                    }
-                inQuote = !inQuote;
-                break;
-            case ' ' :
-            case '\t' :
-                if (!inQuote) {
-                    if (prevWord != NULL) {
-                        *cmdLine = '\0';
-                        argv [argc++] = prevWord;
-                        prevWord = NULL;
-                        noStrip = FALSE;
-                        }
-                    }
-                break;
-            default :
-                if (prevWord == NULL)
-                    prevWord = cmdLine;
-                break;
-                }
-        if (argc >= maxArgv - 1)
-            break;
-        cmdLine++;
-        }
+	switch (*cmdLine) {
+	    case '"' :
+		if (prevWord != NULL) {
+		    if (inQuote) {
+			if (!noStrip)
+			    *cmdLine = '\0';
+			argv [argc++] = prevWord;
+			prevWord = NULL;
+			}
+		    else
+			noStrip = TRUE;
+		    }
+		inQuote = !inQuote;
+		break;
+	    case ' ' :
+	    case '\t' :
+		if (!inQuote) {
+		    if (prevWord != NULL) {
+			*cmdLine = '\0';
+			argv [argc++] = prevWord;
+			prevWord = NULL;
+			noStrip = FALSE;
+			}
+		    }
+		break;
+	    default :
+		if (prevWord == NULL)
+		    prevWord = cmdLine;
+		break;
+		}
+	if (argc >= maxArgv - 1)
+	    break;
+	cmdLine++;
+	}

    if ((prevWord != NULL || (inQuote && prevWord != NULL)) && argc < maxArgv - 1) {
-        *cmdLine = '\0';
-        argv [argc++] = prevWord;
-        }
+	*cmdLine = '\0';
+	argv [argc++] = prevWord;
+	}
    argv[argc] = NULL;

    /* Return updated parameters */
--- a/board/MAI/bios_emulator/scitech/src/common/gabeos.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gabeos.c
@@ -70,10 +70,10 @@ library is used with the application local version of Nucleus.
 ****************************************************************************/
 PM_imports * NAPI GA_getSystemPMImports(void)
 {
-    // TODO: We may very well want to provide a system shared library
-    //       that eports the PM functions required by the Nucleus library
-    //       for BeOS here. That will eliminate fatal errors loading new
-    //       drivers on BeOS!
+    /* TODO: We may very well want to provide a system shared library */
+    /*       that eports the PM functions required by the Nucleus library */
+    /*       for BeOS here. That will eliminate fatal errors loading new */
+    /*       drivers on BeOS! */
    return &_PM_imports;
 }

@@ -124,7 +124,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -136,11 +136,11 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else {
-        struct timeval t;
-        gettimeofday(&t, NULL);
-        value->low = t.tv_sec*1000000 + t.tv_usec;
-        value->high = 0;
-        }
+	struct timeval t;
+	gettimeofday(&t, NULL);
+	value->low = t.tv_sec*1000000 + t.tv_usec;
+	value->high = 0;
+	}
 }
--- a/board/MAI/bios_emulator/scitech/src/common/gados.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gados.c
@@ -120,7 +120,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        return true;
+	return true;
    return false;
 }

@@ -133,4 +133,3 @@ void NAPI GA_TimerRead(
 {
    _GA_readTimeStamp(value);
 }
-
--- a/board/MAI/bios_emulator/scitech/src/common/galib.c
+++ b/board/MAI/bios_emulator/scitech/src/common/galib.c
@@ -107,7 +107,7 @@ static ibool LoadDriver(

    /* Check if we have already loaded the driver */
    if (loaded)
-        return true;
+	return true;
    PM_init();

    /* First try to see if we can find the system wide shared exports
@@ -116,33 +116,33 @@ static ibool LoadDriver(
     */
    __GA_exports.dwSize = sizeof(__GA_exports);
    if (GA_getSharedExports(&__GA_exports,shared))
-        return loaded = true;
+	return loaded = true;

    /* Open the BPD file */
    if (!PM_findBPD(DLL_NAME,bpdpath))
-        return false;
+	return false;
    strcpy(filename,bpdpath);
    strcat(filename,DLL_NAME);
    if ((hModBPD = PE_loadLibrary(filename,shared)) == NULL)
-        return false;
+	return false;
    if ((GA_initLibrary = (GA_initLibrary_t)PE_getProcAddress(hModBPD,"_GA_initLibrary")) == NULL)
-        return false;
+	return false;
    bpdpath[strlen(bpdpath)-1] = 0;
    if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
-        strcpy(bpdpath,PM_getNucleusConfigPath());
+	strcpy(bpdpath,PM_getNucleusConfigPath());
    else {
-        PM_backslash(bpdpath);
-        strcat(bpdpath,"config");
-        }
+	PM_backslash(bpdpath);
+	strcat(bpdpath,"config");
+	}
    if ((gaExp = GA_initLibrary(shared,bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_GA_imports)) == NULL)
-        PM_fatalError("GA_initLibrary failed!\n");
+	PM_fatalError("GA_initLibrary failed!\n");

    /* Initialize all default imports to point to fatal error handler
     * for upwards compatibility, and copy the exported functions.
     */
    max = sizeof(__GA_exports)/sizeof(GA_initLibrary_t);
    for (i = 0,p = (ulong*)&__GA_exports; i < max; i++)
-        *p++ = (ulong)_GA_fatalErrorHandler;
+	*p++ = (ulong)_GA_fatalErrorHandler;
    memcpy(&__GA_exports,gaExp,MIN(sizeof(__GA_exports),gaExp->dwSize));
    loaded = true;
    return true;
@@ -157,7 +157,7 @@ static ibool LoadDriver(
 int NAPI GA_status(void)
 {
    if (!loaded)
-        return nDriverNotFound;
+	return nDriverNotFound;
    return __GA_exports.GA_status();
 }

@@ -166,7 +166,7 @@ const char * NAPI GA_errorMsg(
    N_int32 status)
 {
    if (!loaded)
-        return "Unable to load Nucleus device driver!";
+	return "Unable to load Nucleus device driver!";
    return __GA_exports.GA_errorMsg(status);
 }

@@ -174,7 +174,7 @@ const char * NAPI GA_errorMsg(
 int NAPI GA_getDaysLeft(N_int32 shared)
 {
    if (!LoadDriver(shared))
-        return -1;
+	return -1;
    return __GA_exports.GA_getDaysLeft(shared);
 }

@@ -182,7 +182,7 @@ int NAPI GA_getDaysLeft(N_int32 shared)
 int NAPI GA_registerLicense(uchar *license,N_int32 shared)
 {
    if (!LoadDriver(shared))
-        return 0;
+	return 0;
    return __GA_exports.GA_registerLicense(license,shared);
 }

@@ -190,7 +190,7 @@ int NAPI GA_registerLicense(uchar *license,N_int32 shared)
 ibool NAPI GA_loadInGUI(N_int32 shared)
 {
    if (!LoadDriver(shared))
-        return false;
+	return false;
    return __GA_exports.GA_loadInGUI(shared);
 }

@@ -198,7 +198,7 @@ ibool NAPI GA_loadInGUI(N_int32 shared)
 int NAPI GA_enumerateDevices(N_int32 shared)
 {
    if (!LoadDriver(shared))
-        return 0;
+	return 0;
    return __GA_exports.GA_enumerateDevices(shared);
 }

@@ -206,7 +206,7 @@ int NAPI GA_enumerateDevices(N_int32 shared)
 GA_devCtx * NAPI GA_loadDriver(N_int32 deviceIndex,N_int32 shared)
 {
    if (!LoadDriver(shared))
-        return NULL;
+	return NULL;
    return __GA_exports.GA_loadDriver(deviceIndex,shared);
 }

@@ -216,7 +216,7 @@ void NAPI GA_getGlobalOptions(
    ibool shared)
 {
    if (LoadDriver(shared))
-        __GA_exports.GA_getGlobalOptions(options,shared);
+	__GA_exports.GA_getGlobalOptions(options,shared);
 }

 /* {secret} */
@@ -226,7 +226,7 @@ PE_MODULE * NAPI GA_loadLibrary(
    ibool shared)
 {
    if (!LoadDriver(shared))
-        return NULL;
+	return NULL;
    return __GA_exports.GA_loadLibrary(szBPDName,size,shared);
 }

@@ -236,7 +236,7 @@ GA_devCtx * NAPI GA_getCurrentDriver(
 {
    /* Bail for older drivers that didn't export this function! */
    if (!__GA_exports.GA_getCurrentDriver)
-        return NULL;
+	return NULL;
    return __GA_exports.GA_getCurrentDriver(deviceIndex);
 }

@@ -246,7 +246,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
 {
    /* Bail for older drivers that didn't export this function! */
    if (!__GA_exports.GA_getCurrentRef2d)
-        return NULL;
+	return NULL;
    return __GA_exports.GA_getCurrentRef2d(deviceIndex);
 }

@@ -254,7 +254,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
 int NAPI GA_isOEMVersion(ibool shared)
 {
    if (!LoadDriver(shared))
-        return 0;
+	return 0;
    return __GA_exports.GA_isOEMVersion(shared);
 }

@@ -262,8 +262,7 @@ int NAPI GA_isOEMVersion(ibool shared)
 N_uint32 * NAPI GA_getLicensedDevices(ibool shared)
 {
    if (!LoadDriver(shared))
-        return 0;
+	return 0;
    return __GA_exports.GA_getLicensedDevices(shared);
 }
 #endif
-
--- a/board/MAI/bios_emulator/scitech/src/common/galinux.c
+++ b/board/MAI/bios_emulator/scitech/src/common/galinux.c
@@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
 ****************************************************************************/
 PM_imports * NAPI GA_getSystemPMImports(void)
 {
-    // TODO: We may very well want to provide a system shared library
-    //       that eports the PM functions required by the Nucleus library
-    //       for Linux here. That will eliminate fatal errors loading new
-    //       drivers on Linux!
+    /* TODO: We may very well want to provide a system shared library */
+    /*       that eports the PM functions required by the Nucleus library */
+    /*       for Linux here. That will eliminate fatal errors loading new */
+    /*       drivers on Linux! */
    return &_PM_imports;
 }

@@ -126,7 +126,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -138,11 +138,11 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else {
-        struct timeval t;
-        gettimeofday(&t, NULL);
-        value->low = t.tv_sec*1000000 + t.tv_usec;
-        value->high = 0;
-        }
+	struct timeval t;
+	gettimeofday(&t, NULL);
+	value->low = t.tv_sec*1000000 + t.tv_usec;
+	value->high = 0;
+	}
 }
--- a/board/MAI/bios_emulator/scitech/src/common/gantdrv.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gantdrv.c
@@ -117,8 +117,8 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        haveRDTSC = true;
-        }
+	haveRDTSC = true;
+	}
    return true;
 }

@@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else
-        KeQuerySystemTime((LARGE_INTEGER*)value);
+	KeQuerySystemTime((LARGE_INTEGER*)value);
 }
-
--- a/board/MAI/bios_emulator/scitech/src/common/gaos2.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gaos2.c
@@ -83,11 +83,11 @@ static ulong CallSDDHelp(
     * can't fail here.
     */
    DosOpen(PMHELP_NAME,&hSDDHelp,&result[0],0,0,
-            FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
-            NULL);
+	    FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
+	    NULL);
    DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
-             &parms, inLen = sizeof(parms), &inLen,
-            &result, outLen = sizeof(result), &outLen);
+	     &parms, inLen = sizeof(parms), &inLen,
+	    &result, outLen = sizeof(result), &outLen);
    DosClose(hSDDHelp);
    return result[0];
 }
@@ -147,17 +147,17 @@ ibool NAPI GA_getSharedExports(
    /* Initialise the PM library and connect to our runtime DLL's */
    PM_init();
    if (CallSDDHelp(PMHELP_GETSHAREDEXP) != 0) {
-        /* We have found the shared Nucleus exports. Because not all processes
-         * map to SDDPMI.DLL, we need to ensure that we connect to this
-         * DLL so that it gets mapped into our address space (that is
-         * where the shared Nucleus loader code is located). Simply doing a
-         * DosLoadModule on it is enough for this.
-         */
-        DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
-        exp = (GA_exports*)result[0];
-        memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
-        return true;
-        }
+	/* We have found the shared Nucleus exports. Because not all processes
+	 * map to SDDPMI.DLL, we need to ensure that we connect to this
+	 * DLL so that it gets mapped into our address space (that is
+	 * where the shared Nucleus loader code is located). Simply doing a
+	 * DosLoadModule on it is enough for this.
+	 */
+	DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
+	exp = (GA_exports*)result[0];
+	memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
+	return true;
+	}
 #endif
    (void)shared;
    return false;
@@ -197,7 +197,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -209,9 +209,9 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else
-        DosTmrQueryTime((QWORD*)value);
+	DosTmrQueryTime((QWORD*)value);
 }

 /****************************************************************************
--- a/board/MAI/bios_emulator/scitech/src/common/gaqnx.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gaqnx.c
@@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
 ****************************************************************************/
 PM_imports * NAPI GA_getSystemPMImports(void)
 {
-    // TODO: We may very well want to provide a system shared library
-    //       that eports the PM functions required by the Nucleus library
-    //       for QNX here. That will eliminate fatal errors loading new
-    //       drivers on QNX!
+    /* TODO: We may very well want to provide a system shared library */
+    /*       that eports the PM functions required by the Nucleus library */
+    /*       for QNX here. That will eliminate fatal errors loading new */
+    /*       drivers on QNX! */
    return &_PM_imports;
 }

@@ -126,7 +126,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        haveRDTSC = true;
+	haveRDTSC = true;
    return true;
 }

@@ -138,12 +138,12 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else {
-        struct timespec ts;
+	struct timespec ts;

-        clock_gettime(CLOCK_REALTIME, &ts);
-        value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
-        value->high = 0;
-        }
+	clock_gettime(CLOCK_REALTIME, &ts);
+	value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
+	value->high = 0;
+	}
 }
--- a/board/MAI/bios_emulator/scitech/src/common/gartt.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gartt.c
@@ -121,9 +121,9 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        haveRDTSC = true;
-        return true;
-        }
+	haveRDTSC = true;
+	return true;
+	}
    return false;
 }

@@ -135,5 +135,5 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
 }
--- a/board/MAI/bios_emulator/scitech/src/common/gasmx.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gasmx.c
@@ -118,7 +118,7 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
-        return true;
+	return true;
    return false;
 }

--- a/board/MAI/bios_emulator/scitech/src/common/gavxd.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gavxd.c
@@ -117,8 +117,8 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        haveRDTSC = true;
-        }
+	haveRDTSC = true;
+	}
    return true;
 }

@@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else
-        VTD_Get_Real_Time(&value->high,&value->low);
+	VTD_Get_Real_Time(&value->high,&value->low);
 }
-
--- a/board/MAI/bios_emulator/scitech/src/common/gawin32.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gawin32.c
@@ -67,16 +67,16 @@ static ibool LoadSharedDLL(void)

    /* Check if we have already loaded the DLL */
    if (hModDLL)
-        return true;
+	return true;
    PM_init();

    /* Open the DLL file */
    if (!PM_findBPD(DLL_NAME,bpdpath))
-        return false;
+	return false;
    strcpy(filename,bpdpath);
    strcat(filename,DLL_NAME);
    if ((hModDLL = LoadLibrary(filename)) == NULL)
-        return false;
+	return false;
    return true;
 }

@@ -103,10 +103,10 @@ void NAPI GA_setLocalPath(

    PM_setLocalBPDPath(path);
    if (_PM_hDevice != INVALID_HANDLE_VALUE) {
-        inBuf[0] = (DWORD)path;
-        DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
-            inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
-        }
+	inBuf[0] = (DWORD)path;
+	DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
+	    inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
+	}
 }

 /****************************************************************************
@@ -126,18 +126,18 @@ PM_imports * NAPI GA_getSystemPMImports(void)
    PM_imports * (NAPIP _GA_getSystemPMImports)(void);

    if (LoadSharedDLL()) {
-        /* Note that Visual C++ build DLL's with only a single underscore in front
-         * of the exported name while Watcom C provides two of them. We check for
-         * both to allow working with either compiled DLL.
-         */
-        if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
-            if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
-                pmImp = _GA_getSystemPMImports();
-                memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
-                return pmImp;
-                }
-            }
-        }
+	/* Note that Visual C++ build DLL's with only a single underscore in front
+	 * of the exported name while Watcom C provides two of them. We check for
+	 * both to allow working with either compiled DLL.
+	 */
+	if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
+	    if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
+		pmImp = _GA_getSystemPMImports();
+		memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
+		return pmImp;
+		}
+	    }
+	}
    return &_PM_imports;
 }

@@ -162,16 +162,16 @@ ibool NAPI GA_getSharedExports(

    useRing0Driver = false;
    if (shared) {
-        if (!LoadSharedDLL())
-            PM_fatalError("Unable to load " DLL_NAME "!");
-        if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
-            if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
-                PM_fatalError("Unable to load " DLL_NAME "!");
-        exp = _GA_getSystemGAExports();
-        memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
-        useRing0Driver = true;
-        return true;
-        }
+	if (!LoadSharedDLL())
+	    PM_fatalError("Unable to load " DLL_NAME "!");
+	if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
+	    if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
+		PM_fatalError("Unable to load " DLL_NAME "!");
+	exp = _GA_getSystemGAExports();
+	memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
+	useRing0Driver = true;
+	return true;
+	}
    return false;
 }

@@ -188,14 +188,14 @@ ibool NAPI GA_queryFunctions(
    static ibool (NAPIP _GA_queryFunctions)(GA_devCtx *dc,N_uint32 id,void _FAR_ *funcs) = NULL;

    if (useRing0Driver) {
-        // Call the version in nga_w32.dll if it is loaded
-        if (!_GA_queryFunctions) {
-            if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
-                if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
-                    PM_fatalError("Unable to get exports from " DLL_NAME "!");
-            }
-        return _GA_queryFunctions(dc,id,funcs);
-        }
+	/* Call the version in nga_w32.dll if it is loaded */
+	if (!_GA_queryFunctions) {
+	    if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
+		if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
+		    PM_fatalError("Unable to get exports from " DLL_NAME "!");
+	    }
+	return _GA_queryFunctions(dc,id,funcs);
+	}
    return __GA_exports.GA_queryFunctions(dc,id,funcs);
 }

@@ -211,14 +211,14 @@ ibool NAPI REF2D_queryFunctions(
    static ibool (NAPIP _REF2D_queryFunctions)(REF2D_driver *ref2d,N_uint32 id,void _FAR_ *funcs) = NULL;

    if (useRing0Driver) {
-        // Call the version in nga_w32.dll if it is loaded
-        if (!_REF2D_queryFunctions) {
-            if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
-                if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
-                    PM_fatalError("Unable to get exports from " DLL_NAME "!");
-            }
-        return _REF2D_queryFunctions(ref2d,id,funcs);
-        }
+	/* Call the version in nga_w32.dll if it is loaded */
+	if (!_REF2D_queryFunctions) {
+	    if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
+		if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
+		    PM_fatalError("Unable to get exports from " DLL_NAME "!");
+	    }
+	return _REF2D_queryFunctions(ref2d,id,funcs);
+	}
    return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
 }
 #endif
@@ -231,13 +231,13 @@ Nucleus loader library.
 ibool NAPI GA_TimerInit(void)
 {
    if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
-        haveRDTSC = true;
-        return true;
-        }
+	haveRDTSC = true;
+	return true;
+	}
    else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
-        haveRDTSC = false;
-        return true;
-        }
+	haveRDTSC = false;
+	return true;
+	}
    return false;
 }

@@ -249,8 +249,7 @@ void NAPI GA_TimerRead(
    GA_largeInteger *value)
 {
    if (haveRDTSC)
-        _GA_readTimeStamp(value);
+	_GA_readTimeStamp(value);
    else
-        QueryPerformanceCounter((LARGE_INTEGER*)value);
+	QueryPerformanceCounter((LARGE_INTEGER*)value);
 }
-
--- a/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c
+++ b/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c
@@ -107,9 +107,9 @@ static void GetInternalConstants(GTF_constants *c)
    c->hSync = GC.hSync;
    c->minVSyncBP = GC.minVSyncBP;
    if (GC.k == 0)
-        c->k = 0.001;
+	c->k = 0.001;
    else
-        c->k = GC.k;
+	c->k = GC.k;
    c->m = (c->k / 256) * GC.m;
    c->c = (GC.c - GC.j) * (c->k / 256) + GC.j;
    c->j = GC.j;
@@ -165,89 +165,89 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
    vFieldRate = vFreq;
    interlace = 0;
    if (wantInterlace)
-        dotClock *= 2;
+	dotClock *= 2;

    /* Determine the lines for margins */
    if (wantMargins) {
-        topMarginLines = round(c.margin / 100 * vLines);
-        botMarginLines = round(c.margin / 100 * vLines);
-        }
+	topMarginLines = round(c.margin / 100 * vLines);
+	botMarginLines = round(c.margin / 100 * vLines);
+	}
    else {
-        topMarginLines = 0;
-        botMarginLines = 0;
-        }
+	topMarginLines = 0;
+	botMarginLines = 0;
+	}

    if (type != GTF_lockPF) {
-        if (type == GTF_lockVF) {
-            /* Estimate the horizontal period */
-            hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
-                (vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
+	if (type == GTF_lockVF) {
+	    /* Estimate the horizontal period */
+	    hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
+		(vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;

-            /* Find the number of lines in vSync + back porch */
-            vSyncBP = round(c.minVSyncBP / hPeriodEst);
-            }
-        else if (type == GTF_lockHF) {
-            /* Find the number of lines in vSync + back porch */
-            vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
-            }
+	    /* Find the number of lines in vSync + back porch */
+	    vSyncBP = round(c.minVSyncBP / hPeriodEst);
+	    }
+	else if (type == GTF_lockHF) {
+	    /* Find the number of lines in vSync + back porch */
+	    vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
+	    }

-        /* Find the number of lines in the V back porch alone */
-        vBackPorch = vSyncBP - c.vSyncRqd;
+	/* Find the number of lines in the V back porch alone */
+	vBackPorch = vSyncBP - c.vSyncRqd;

-        /* Find the total number of lines in the vertical period */
-        vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
-            + interlace + c.minPorch;
+	/* Find the total number of lines in the vertical period */
+	vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+	    + interlace + c.minPorch;

-        if (type == GTF_lockVF) {
-            /* Estimate the vertical frequency */
-            vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
+	if (type == GTF_lockVF) {
+	    /* Estimate the vertical frequency */
+	    vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);

-            /* Find the actual horizontal period */
-            hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
+	    /* Find the actual horizontal period */
+	    hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;

-            /* Find the actual vertical field frequency */
-            vFieldRate = 1000000 / (hPeriod * vTotalLines);
-            }
-        else if (type == GTF_lockHF) {
-            /* Find the actual vertical field frequency */
-            vFieldRate = (hFreq / vTotalLines) * 1000;
-            }
-        }
+	    /* Find the actual vertical field frequency */
+	    vFieldRate = 1000000 / (hPeriod * vTotalLines);
+	    }
+	else if (type == GTF_lockHF) {
+	    /* Find the actual vertical field frequency */
+	    vFieldRate = (hFreq / vTotalLines) * 1000;
+	    }
+	}

    /* Find the number of pixels in the left and right margins */
    if (wantMargins) {
-        leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
-        rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
-        }
+	leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
+	rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
+	}
    else {
-        leftMarginPixels = 0;
-        rightMarginPixels = 0;
-        }
+	leftMarginPixels = 0;
+	rightMarginPixels = 0;
+	}

    /* Find the total number of active pixels in image + margins */
    hTotalActivePixels = hPixels + leftMarginPixels + rightMarginPixels;

    if (type == GTF_lockVF) {
-        /* Find the ideal blanking duty cycle */
-        idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
-        }
+	/* Find the ideal blanking duty cycle */
+	idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
+	}
    else if (type == GTF_lockHF) {
-        /* Find the ideal blanking duty cycle */
-        idealDutyCycle = c.c - (c.m / hFreq);
-        }
+	/* Find the ideal blanking duty cycle */
+	idealDutyCycle = c.c - (c.m / hFreq);
+	}
    else if (type == GTF_lockPF) {
-        /* Find ideal horizontal period from blanking duty cycle formula */
-        idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
-            (0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
-            leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
+	/* Find ideal horizontal period from blanking duty cycle formula */
+	idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
+	    (0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
+	    leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;

-        /* Find the ideal blanking duty cycle */
-        idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
-        }
+	/* Find the ideal blanking duty cycle */
+	idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
+	}

    /* Find the number of pixels in blanking time */
    hBlankPixels = round((hTotalActivePixels * idealDutyCycle) /
-        ((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
+	((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;

    /* Find the total number of pixels */
    hTotalPixels = hTotalActivePixels + hBlankPixels;
@@ -262,35 +262,35 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
    hSyncBP = hBackPorch + hSyncWidth;

    if (type == GTF_lockPF) {
-        /* Find the horizontal frequency */
-        hFreq = (dotClock / hTotalPixels) * 1000;
+	/* Find the horizontal frequency */
+	hFreq = (dotClock / hTotalPixels) * 1000;

-        /* Find the number of lines in vSync + back porch */
-        vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
+	/* Find the number of lines in vSync + back porch */
+	vSyncBP = round((c.minVSyncBP * hFreq) / 1000);

-        /* Find the number of lines in the V back porch alone */
-        vBackPorch = vSyncBP - c.vSyncRqd;
+	/* Find the number of lines in the V back porch alone */
+	vBackPorch = vSyncBP - c.vSyncRqd;

-        /* Find the total number of lines in the vertical period */
-        vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
-            + interlace + c.minPorch;
+	/* Find the total number of lines in the vertical period */
+	vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+	    + interlace + c.minPorch;

-        /* Find the actual vertical field frequency */
-        vFieldRate = (hFreq / vTotalLines) * 1000;
-        }
+	/* Find the actual vertical field frequency */
+	vFieldRate = (hFreq / vTotalLines) * 1000;
+	}
    else {
-        if (type == GTF_lockVF) {
-            /* Find the horizontal frequency */
-            hFreq = 1000 / hPeriod;
-            }
-        else if (type == GTF_lockHF) {
-            /* Find the horizontal frequency */
-            hPeriod = 1000 / hFreq;
-            }
+	if (type == GTF_lockVF) {
+	    /* Find the horizontal frequency */
+	    hFreq = 1000 / hPeriod;
+	    }
+	else if (type == GTF_lockHF) {
+	    /* Find the horizontal frequency */
+	    hPeriod = 1000 / hFreq;
+	    }

-        /* Find the pixel clock frequency */
-        dotClock = hTotalPixels / hPeriod;
-        }
+	/* Find the pixel clock frequency */
+	dotClock = hTotalPixels / hPeriod;
+	}

    /* Return the computed frequencies */
    t->vFreq = vFieldRate;
@@ -315,16 +315,16 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
    t->v.vSyncWidth = (int)c.vSyncRqd;
    t->v.vBackPorch = (int)vBackPorch;
    if (wantInterlace) {
-        /* Halve the timings for interlaced modes */
-        t->v.vTotal /= 2;
-        t->v.vDisp /= 2;
-        t->v.vSyncStart /= 2;
-        t->v.vSyncEnd /= 2;
-        t->v.vFrontPorch /= 2;
-        t->v.vSyncWidth /= 2;
-        t->v.vBackPorch /= 2;
-        t->dotClock /= 2;
-        }
+	/* Halve the timings for interlaced modes */
+	t->v.vTotal /= 2;
+	t->v.vDisp /= 2;
+	t->v.vSyncStart /= 2;
+	t->v.vSyncEnd /= 2;
+	t->v.vFrontPorch /= 2;
+	t->v.vSyncWidth /= 2;
+	t->v.vBackPorch /= 2;
+	t->dotClock /= 2;
+	}

    /* Mark as GTF timing using the sync polarities */
    t->interlace = (wantInterlace) ? 'I' : 'N';
@@ -348,30 +348,30 @@ void main(int argc,char *argv[])
    GTF_timings t;

    if (argc != 5 && argc != 6) {
-        printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
-        printf("\n");
-        printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
-        printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
-        printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
-        printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
-        printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
-        printf("\n");
-        printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
-        printf("\n");
-        printf("    GTFCALC 640 480 60 Hz\n");
-        printf("\n");
-        printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
-        printf("\n");
-        printf("    GTFCALC 640 480 31.5 KHz\n");
-        printf("\n");
-        printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
-        printf("\n");
-        printf("    GTFCALC 640 480 25.175 MHz\n");
-        printf("\n");
-        printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
-        printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
-        exit(1);
-        }
+	printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
+	printf("\n");
+	printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
+	printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
+	printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
+	printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
+	printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
+	printf("\n");
+	printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
+	printf("\n");
+	printf("    GTFCALC 640 480 60 Hz\n");
+	printf("\n");
+	printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
+	printf("\n");
+	printf("    GTFCALC 640 480 31.5 KHz\n");
+	printf("\n");
+	printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
+	printf("\n");
+	printf("    GTFCALC 640 480 25.175 MHz\n");
+	printf("\n");
+	printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
+	printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
+	exit(1);
+	}

    /* Get values from command line */
    xPixels = atof(argv[1]);
@@ -381,33 +381,33 @@ void main(int argc,char *argv[])

    /* Compute the CRTC timings */
    if (toupper(argv[4][0]) == 'H')
-        GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
+	GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
    else if (toupper(argv[4][0]) == 'K')
-        GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
+	GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
    else if (toupper(argv[4][0]) == 'M')
-        GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
+	GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
    else {
-        printf("Unknown command line!\n");
-        exit(1);
-        }
+	printf("Unknown command line!\n");
+	exit(1);
+	}

    /* Dump summary info to standard output */
    printf("CRTC values for %.0fx%.0f @ %.2f %s\n", xPixels, yPixels, freq, argv[4]);
    printf("\n");
    printf("  hTotal      = %-4d    vTotal      = %-4d\n",
-        t.h.hTotal, t.v.vTotal);
+	t.h.hTotal, t.v.vTotal);
    printf("  hDisp       = %-4d    vDisp       = %-4d\n",
-        t.h.hDisp, t.v.vDisp);
+	t.h.hDisp, t.v.vDisp);
    printf("  hSyncStart  = %-4d    vSyncStart  = %-4d\n",
-        t.h.hSyncStart, t.v.vSyncStart);
+	t.h.hSyncStart, t.v.vSyncStart);
    printf("  hSyncEnd    = %-4d    vSyncEnd    = %-4d\n",
-        t.h.hSyncEnd, t.v.vSyncEnd);
+	t.h.hSyncEnd, t.v.vSyncEnd);
    printf("  hFrontPorch = %-4d    vFrontPorch = %-4d\n",
-        t.h.hFrontPorch, t.v.vFrontPorch);
+	t.h.hFrontPorch, t.v.vFrontPorch);
    printf("  hSyncWidth  = %-4d    vSyncWidth  = %-4d\n",
-        t.h.hSyncWidth, t.v.vSyncWidth);
+	t.h.hSyncWidth, t.v.vSyncWidth);
    printf("  hBackPorch  = %-4d    vBackPorch  = %-4d\n",
-        t.h.hBackPorch, t.v.vBackPorch);
+	t.h.hBackPorch, t.v.vBackPorch);
    printf("\n");
    printf("  Interlaced  = %s\n", (t.interlace == 'I') ? "Yes" : "No");
    printf("  H sync pol  = %c\n", t.hSyncPol);
@@ -419,18 +419,18 @@ void main(int argc,char *argv[])

    /* Dump to file in format used by SciTech Display Doctor */
    if ((f = fopen("UVCONFIG.CRT","w")) != NULL) {
-        fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
-        fprintf(f, "%d %d %d %d '%c' %s\n",
-            t.h.hTotal, t.h.hDisp,
-            t.h.hSyncStart, t.h.hSyncEnd,
-            t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
-        fprintf(f, "%d %d %d %d '%c'\n",
-            t.v.vTotal, t.v.vDisp,
-            t.v.vSyncStart, t.v.vSyncEnd,
-            t.vSyncPol);
-        fprintf(f, "%.2f\n", t.dotClock);
-        fclose(f);
-        }
+	fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
+	fprintf(f, "%d %d %d %d '%c' %s\n",
+	    t.h.hTotal, t.h.hDisp,
+	    t.h.hSyncStart, t.h.hSyncEnd,
+	    t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
+	fprintf(f, "%d %d %d %d '%c'\n",
+	    t.v.vTotal, t.v.vDisp,
+	    t.v.vSyncStart, t.v.vSyncEnd,
+	    t.vSyncPol);
+	fprintf(f, "%.2f\n", t.dotClock);
+	fclose(f);
+	}
 }

 #endif  /* TESTING */
--- a/board/MAI/bios_emulator/scitech/src/common/libcimp.c
+++ b/board/MAI/bios_emulator/scitech/src/common/libcimp.c
@@ -270,27 +270,27 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)

    /* Find an empty file handle to use */
    for (i = 3; i < MAX_FILES; i++) {
-        if (!openHandles[i])
-            break;
-        }
+	if (!openHandles[i])
+	    break;
+	}
    if (openHandles[i])
-        return -1;
+	return -1;

    /* Find the open flags to use */
    if (_oflag & ___O_TRUNC)
-        strcpy(mode,"w");
+	strcpy(mode,"w");
    else if (_oflag & ___O_CREAT)
-        strcpy(mode,"a");
+	strcpy(mode,"a");
    else
-        strcpy(mode,"r");
+	strcpy(mode,"r");
    if (_oflag & ___O_BINARY)
-        strcat(mode,"b");
+	strcat(mode,"b");
    if (_oflag & ___O_TEXT)
-        strcat(mode,"t");
+	strcat(mode,"t");

    /* Open the file and store the file handle */
    if ((openHandles[i] = fopen(_path,mode)) == NULL)
-        return -1;
+	return -1;
    return i;
 }

@@ -300,25 +300,25 @@ int _CDECL stub_access(const char *_path, int _amode)
 int _CDECL stub_close(int _fildes)
 {
    if (_fildes >= 3 && openHandles[_fildes]) {
-        fclose(openHandles[_fildes]);
-        openHandles[_fildes] = NULL;
-        }
+	fclose(openHandles[_fildes]);
+	openHandles[_fildes] = NULL;
+	}
    return 0;
 }

 off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
 {
    if (_fildes >= 3) {
-        fseek(openHandles[_fildes],_offset,_whence);
-        return ftell(openHandles[_fildes]);
-        }
+	fseek(openHandles[_fildes],_offset,_whence);
+	return ftell(openHandles[_fildes]);
+	}
    return 0;
 }

 size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
 {
    if (_fildes >= 3)
-        return fread(_buf,1,_nbyte,openHandles[_fildes]);
+	return fread(_buf,1,_nbyte,openHandles[_fildes]);
    return 0;
 }

@@ -327,18 +327,18 @@ int _CDECL stub_unlink(const char *_path)
    WORD error;

    if (initComplete) {
-        if (R0_DeleteFile((char*)_path,0,&error))
-            return 0;
-        return -1;
-        }
+	if (R0_DeleteFile((char*)_path,0,&error))
+	    return 0;
+	return -1;
+	}
    else
-        return i_remove(_path);
+	return i_remove(_path);
 }

 size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
 {
    if (_fildes >= 3)
-        return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
+	return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
    return _nbyte;
 }

@@ -356,7 +356,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
 {
    WORD error;
    if (initComplete)
-        R0_SetFileAttributes((char*)filename,attrib,&error);
+	R0_SetFileAttributes((char*)filename,attrib,&error);
 }

 /* Return the current date in days since 1/1/1980 */
@@ -380,59 +380,59 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)

    /* Find an empty file handle to use */
    for (i = 3; i < MAX_FILES; i++) {
-        if (!openHandles[i])
-            break;
-        }
+	if (!openHandles[i])
+	    break;
+	}
    if (openHandles[i])
-        return -1;
+	return -1;

    /* Find the open flags to use */
    if (_oflag & ___O_TRUNC)
-        strcpy(mode,"w");
+	strcpy(mode,"w");
    else if (_oflag & ___O_CREAT)
-        strcpy(mode,"a");
+	strcpy(mode,"a");
    else
-        strcpy(mode,"r");
+	strcpy(mode,"r");
    if (_oflag & ___O_BINARY)
-        strcat(mode,"b");
+	strcat(mode,"b");
    if (_oflag & ___O_TEXT)
-        strcat(mode,"t");
+	strcat(mode,"t");

    /* Open the file and store the file handle */
    if ((openHandles[i] = fopen(_path,mode)) == NULL)
-        return -1;
+	return -1;
    return i;
 }

 int _CDECL stub_close(int _fildes)
 {
    if (_fildes >= 3 && openHandles[_fildes]) {
-        fclose(openHandles[_fildes]);
-        openHandles[_fildes] = NULL;
-        }
+	fclose(openHandles[_fildes]);
+	openHandles[_fildes] = NULL;
+	}
    return 0;
 }

 off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
 {
    if (_fildes >= 3) {
-        fseek(openHandles[_fildes],_offset,_whence);
-        return ftell(openHandles[_fildes]);
-        }
+	fseek(openHandles[_fildes],_offset,_whence);
+	return ftell(openHandles[_fildes]);
+	}
    return 0;
 }

 size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
 {
    if (_fildes >= 3)
-        return fread(_buf,1,_nbyte,openHandles[_fildes]);
+	return fread(_buf,1,_nbyte,openHandles[_fildes]);
    return 0;
 }

 size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
 {
    if (_fildes >= 3)
-        return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
+	return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
    return _nbyte;
 }

@@ -444,7 +444,7 @@ int _CDECL stub_isatty(int _fildes)

 int _CDECL stub_unlink(const char *_path)
 {
-    // TODO: Implement this!
+    /* TODO: Implement this! */
    return -1;
 }

@@ -454,7 +454,7 @@ int _CDECL stub_remove(const char *_filename)

 int _CDECL stub_rename(const char *_old, const char *_new)
 {
-    // TODO: Implement this!
+    /* TODO: Implement this! */
    return -1;
 }

@@ -462,11 +462,11 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
 {
    uint _attr = 0;
    if (attrib & __A_RDONLY)
-        _attr |= FILE_ATTRIBUTE_READONLY;
+	_attr |= FILE_ATTRIBUTE_READONLY;
    if (attrib & __A_HIDDEN)
-        _attr |= FILE_ATTRIBUTE_HIDDEN;
+	_attr |= FILE_ATTRIBUTE_HIDDEN;
    if (attrib & __A_SYSTEM)
-        _attr |= FILE_ATTRIBUTE_SYSTEM;
+	_attr |= FILE_ATTRIBUTE_SYSTEM;
    PM_setFileAttr(filename,_attr);
 }

@@ -506,7 +506,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
 {
    FILESTATUS3 s;
    if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
-        return;
+	return;
    s.attrFile = attrib;
    DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
 }
@@ -528,25 +528,25 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)

    /* Determine open flags */
    if (_oflag & ___O_CREAT) {
-        if (_oflag & ___O_EXCL)
-            openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
-        else if (_oflag & ___O_TRUNC)
-            openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
-        else
-            openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
-        }
+	if (_oflag & ___O_EXCL)
+	    openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
+	else if (_oflag & ___O_TRUNC)
+	    openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
+	else
+	    openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
+	}
    else if (_oflag & ___O_TRUNC)
-        openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
+	openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
    else
-        openflag = OPEN_ACTION_OPEN_IF_EXISTS;
+	openflag = OPEN_ACTION_OPEN_IF_EXISTS;

    /* Determine open mode flags */
    if (_oflag & ___O_RDONLY)
-        openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
+	openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
    else if (_oflag & ___O_WRONLY)
-        openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
+	openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
    else
-        openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
+	openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;

    /* Copy the path to a variable on the stack. We need to do this
     * for OS/2 as when the drivers are loaded into shared kernel
@@ -555,14 +555,14 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
     */
    strcpy(path,_path);
    if (DosOpen(path, &handle, &actiontaken, 0, FILE_NORMAL,
-            openflag, openmode, NULL) != NO_ERROR)
-        return -1;
+	    openflag, openmode, NULL) != NO_ERROR)
+	return -1;

    /* Handle append mode of operation */
    if (_oflag & ___O_APPEND) {
-        if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
-            return -1;
-        }
+	if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
+	    return -1;
+	}
    return handle;
 }

@@ -578,16 +578,16 @@ int _CDECL stub_access(const char *_path, int _amode)
     */
    strcpy(path,_path);
    if (DosQueryPathInfo(path, FIL_STANDARD, &fs, sizeof(fs)) != NO_ERROR)
-        return -1;
+	return -1;
    if ((_amode & W_OK) && (fs.attrFile & FILE_READONLY))
-        return -1;
+	return -1;
    return 0;
 }

 int _CDECL stub_close(int _fildes)
 {
    if (DosClose(_fildes) != NO_ERROR)
-        return -1;
+	return -1;
    return 0;
 }

@@ -596,17 +596,17 @@ off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
    ULONG  cbActual, origin;

    switch (_whence) {
-        case SEEK_CUR:
-            origin = FILE_CURRENT;
-            break;
-        case SEEK_END:
-            origin = FILE_END;
-            break;
-        default:
-            origin = FILE_BEGIN;
-        }
+	case SEEK_CUR:
+	    origin = FILE_CURRENT;
+	    break;
+	case SEEK_END:
+	    origin = FILE_END;
+	    break;
+	default:
+	    origin = FILE_BEGIN;
+	}
    if (DosSetFilePtr(_fildes, _offset, origin, &cbActual) != NO_ERROR)
-        return -1;
+	return -1;
    return cbActual;
 }

@@ -621,19 +621,19 @@ size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
     * in kernel space and will cause DosRead to bail internally.
     */
    while (_nbyte > BUF_SIZE) {
-        if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
-            return -1;
-        cbActual += cbRead;
-        memcpy(p,file_io_buf,BUF_SIZE);
-        p += BUF_SIZE;
-        _nbyte -= BUF_SIZE;
-        }
+	if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
+	    return -1;
+	cbActual += cbRead;
+	memcpy(p,file_io_buf,BUF_SIZE);
+	p += BUF_SIZE;
+	_nbyte -= BUF_SIZE;
+	}
    if (_nbyte) {
-        if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
-            return -1;
-        cbActual += cbRead;
-        memcpy(p,file_io_buf,_nbyte);
-        }
+	if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
+	    return -1;
+	cbActual += cbRead;
+	memcpy(p,file_io_buf,_nbyte);
+	}
    return cbActual;
 }

@@ -648,19 +648,19 @@ size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
     * in kernel space and will cause DosWrite to bail internally.
     */
    while (_nbyte > BUF_SIZE) {
-        memcpy(file_io_buf,p,BUF_SIZE);
-        if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
-            return -1;
-        cbActual += cbWrite;
-        p += BUF_SIZE;
-        _nbyte -= BUF_SIZE;
-        }
+	memcpy(file_io_buf,p,BUF_SIZE);
+	if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
+	    return -1;
+	cbActual += cbWrite;
+	p += BUF_SIZE;
+	_nbyte -= BUF_SIZE;
+	}
    if (_nbyte) {
-        memcpy(file_io_buf,p,_nbyte);
-        if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
-            return -1;
-        cbActual += cbWrite;
-        }
+	memcpy(file_io_buf,p,_nbyte);
+	if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
+	    return -1;
+	cbActual += cbWrite;
+	}
    return cbActual;
 }

@@ -675,7 +675,7 @@ int _CDECL stub_unlink(const char *_path)
     */
    strcpy(path,_path);
    if (DosDelete(path) != NO_ERROR)
-        return -1;
+	return -1;
    return 0;
 }

@@ -684,7 +684,7 @@ int _CDECL stub_isatty(int _fildes)
    ULONG  htype, flags;

    if (DosQueryHType(_fildes, &htype, &flags) != NO_ERROR)
-        return 0;
+	return 0;
    return ((htype & 0xFF) == HANDTYPE_DEVICE);
 }

@@ -700,7 +700,7 @@ int _CDECL stub_remove(const char *_path)
     */
    strcpy(path,_path);
    if (DosDelete(path) != NO_ERROR)
-        return -1;
+	return -1;
    return 0;
 }

@@ -717,7 +717,7 @@ int _CDECL stub_rename(const char *_old, const char *_new)
    strcpy(old,_old);
    strcpy(new,_new);
    if (DosMove(old, new) != NO_ERROR)
-        return -1;
+	return -1;
    return 0;
 }

@@ -734,23 +734,23 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
 int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
 {
    int oflag_tab[] = {
-        ___O_RDONLY,    O_RDONLY,
-        ___O_WRONLY,    O_WRONLY,
-        ___O_RDWR,      O_RDWR,
-        ___O_BINARY,    O_BINARY,
-        ___O_TEXT,      O_TEXT,
-        ___O_CREAT,     O_CREAT,
-        ___O_EXCL,      O_EXCL,
-        ___O_TRUNC,     O_TRUNC,
-        ___O_APPEND,    O_APPEND,
-        };
+	___O_RDONLY,    O_RDONLY,
+	___O_WRONLY,    O_WRONLY,
+	___O_RDWR,      O_RDWR,
+	___O_BINARY,    O_BINARY,
+	___O_TEXT,      O_TEXT,
+	___O_CREAT,     O_CREAT,
+	___O_EXCL,      O_EXCL,
+	___O_TRUNC,     O_TRUNC,
+	___O_APPEND,    O_APPEND,
+	};
    int i,oflag = 0;

    /* Translate the oflag's to the OS dependent versions */
    for (i = 0; i < sizeof(oflag_tab) / sizeof(int); i += 2) {
-        if (_oflag & oflag_tab[i])
-            oflag |= oflag_tab[i+1];
-        }
+	if (_oflag & oflag_tab[i])
+	    oflag |= oflag_tab[i+1];
+	}
    return open(_path,oflag,_mode);
 }

@@ -825,4 +825,3 @@ void * _CDECL stub_signal(int sig, void *handler)
    return (void*)signal(sig,(__code_ptr)handler);
 #endif
 }
-
--- a/Show More
+++ b/Show More
				`@@ -190,5 +190,3 @@ struct virt_root_hub {`


				`#endif /* _USB_UHCI_H_ */`
				`@@ -0,0 +1 @@`
				`This file is just to ensure that the directory is created.`