* Patch by Steven Scholz, 18 Oct 2003:
Fix AT91RM9200 ethernet driver * Patch by Nye Liu, 17 Oct 2003: Fix typo in include/mpc8xx.h * Patch by Richard Woodruff, 16 Oct 03: Fixes for cpu/arm925/interrupt.c - Initialize timestamp & lastdec vars. - fix timestamp overflows. - fix lastdec overflow. - smarter normalization to allow udelay() below 1ms to work. * Patch by Scott McNutt, 16 Oct add networking support for the Altera Nios Development Kit, Cyclone Edition (DK-1C20) * Patch by Jon Diekema, 14 Oct 2003: add hint about doc/README.silent to README file
This commit is contained in:
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20
CHANGELOG
20
CHANGELOG
@ -2,6 +2,26 @@
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Changes for U-Boot 1.0.0:
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======================================================================
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* Patch by Steven Scholz, 18 Oct 2003:
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Fix AT91RM9200 ethernet driver
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* Patch by Nye Liu, 17 Oct 2003:
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Fix typo in include/mpc8xx.h
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* Patch by Richard Woodruff, 16 Oct 03:
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Fixes for cpu/arm925/interrupt.c
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- Initialize timestamp & lastdec vars.
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- fix timestamp overflows.
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- fix lastdec overflow.
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- smarter normalization to allow udelay() below 1ms to work.
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* Patch by Scott McNutt, 16 Oct
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add networking support for the Altera Nios Development Kit,
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Cyclone Edition (DK-1C20)
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* Patch by Jon Diekema, 14 Oct 2003:
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add hint about doc/README.silent to README file
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* Add CompactFlash support for NSCU
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* Fix PCI problems on PPChameleonEVB
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5
README
5
README
@ -487,6 +487,11 @@ The following options need to be configured:
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default i/o. Serial console can be forced with
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environment 'console=serial'.
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When CONFIG_SILENT_CONSOLE is defined, all console
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messages (by U-Boot and Linux!) can be silenced with
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the "silent" environment variable. See
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doc/README.silent for more information.
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- Console Baudrate:
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CONFIG_BAUDRATE - in bps
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Select one of the baudrates listed in
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@ -185,9 +185,14 @@ int interrupt_init (void)
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{
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int32_t val;
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/* Start the decrementer ticking down from 0xffffffff */
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*((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
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val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
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*((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
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/* init the timestamp and lastdec value */
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reset_timer_masked();
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return (0);
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}
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@ -210,7 +215,7 @@ void set_timer (ulong t)
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timestamp = t;
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}
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/* very rough timer... */
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/* delay x useconds AND perserve advance timstamp value */
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void udelay (unsigned long usec)
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{
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#ifdef CONFIG_INNOVATOROMAP1510
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@ -220,16 +225,24 @@ void udelay (unsigned long usec)
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for (i = time_remaining; i > 0; i--) {
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}
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#else
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ulong tmo, tmp;
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ulong tmo;
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if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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}else{ /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CFG_HZ;
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tmo /= (1000*1000);
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}
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tmo = usec / 1000;
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tmo *= CFG_HZ;
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tmo /= 1000;
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tmp = get_timer (0); /* get current timestamp */
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if( (tmo + tmp) < tmp ) /* if setting this fordward will roll time stamp */
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reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
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else
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tmo += tmp; /* else, set advancing stamp wake up time */
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tmo += get_timer (0);
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while (get_timer_masked () < tmo)
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while (get_timer_masked () < tmo)/* loop till event */
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/*NOP*/;
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#endif
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}
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@ -237,19 +250,23 @@ void udelay (unsigned long usec)
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void reset_timer_masked (void)
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{
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/* reset time */
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lastdec = READ_TIMER;
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timestamp = 0;
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lastdec = READ_TIMER; /* capure current decrementer value time */
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timestamp = 0; /* start "advancing" time stamp from 0 */
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}
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ulong get_timer_masked (void)
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{
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ulong now = READ_TIMER; /* current tick value */
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ulong now = READ_TIMER; /* current tick value */
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if (lastdec >= now) { /* did I roll (rem decrementer) */
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if (lastdec >= now) { /* normal mode (non roll) */
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/* normal mode */
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timestamp += lastdec - now; /* record amount of time since last check */
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} else {
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/* we have an overflow ... */
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timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
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} else { /* we have overflow of the count down timer */
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/* nts = ts + ld + (TLV - now)
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* ts=old stamp, ld=time that passed before passing through -1
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* (TLV-now) amount of time after passing though -1
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* nts = new "advancing time stamp"...it could also roll and cause problems.
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*/
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timestamp += lastdec + TIMER_LOAD_VAL - now;
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}
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lastdec = now;
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@ -257,6 +274,7 @@ ulong get_timer_masked (void)
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return timestamp;
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}
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/* waits specified delay value and resets timestamp */
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void udelay_masked (unsigned long usec)
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{
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#ifdef CONFIG_INNOVATOROMAP1510
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@ -265,15 +283,20 @@ void udelay_masked (unsigned long usec)
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for (i=time_remaining; i>0; i--) { }
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#else
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ulong tmo;
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ulong tmo, tmp;
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tmo = usec / 1000;
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tmo *= CFG_HZ;
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tmo /= 1000;
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if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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}else{ /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CFG_HZ;
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tmo /= (1000*1000);
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}
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reset_timer_masked ();
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reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */
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while (get_timer_masked () < tmo)
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while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
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/*NOP*/;
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#endif
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}
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@ -292,7 +315,7 @@ unsigned long long get_ticks(void)
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk (void)
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{ /* poor timer, may need to improve especiall for bootp. */
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{
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ulong tbclk;
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tbclk = CFG_HZ;
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* TRUE - if data read successfully
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*/
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static UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac,
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unsigned char RegisterAddress,
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unsigned short *pOutput)
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unsigned char RegisterAddress,
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unsigned short *pOutput)
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{
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p_mac->EMAC_MAN = (AT91C_EMAC_HIGH & ~AT91C_EMAC_LOW) |
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AT91C_EMAC_CODE_802_3 | AT91C_EMAC_RW_W |
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(RegisterAddress << 18);
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(RegisterAddress << 18) | *pOutput;
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udelay (10000);
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@ -2,7 +2,7 @@
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Nios Development Kit
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Cyclone Editions
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Last Update: October 4, 2003
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Last Update: October 15, 2003
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====================================================================
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This file contains information regarding U-Boot and the Altera
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@ -34,7 +34,10 @@ The hello_world example works fine.
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Programming U-Boot into FLASH with GERMS
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-----------------------------------------
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The current version of the DK-1C20 port occupies less than
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60 KByte. So everything will fit into a single Flash sector.
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60 KByte with network support disabled. So everything will fit
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into a single flash sector. With network support (e.g. bootp,
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tftpboot, ping, etc) the flash footprint is about 77K.
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To program U-Boot into the DK-1C20 flash using GERMS do the
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following:
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@ -1,7 +1,7 @@
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U-Boot for Nios-32
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Last Update: October 4, 2003
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Last Update: October 15, 2003
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====================================================================
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This file contains information regarding U-Boot and the Altera
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@ -173,8 +173,6 @@ BTW, thats a 'zero' ... not the letter 'O'.
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There are plenty of areas where help is needed. Here's are some ideas
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for those interested in contributing:
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-SMC 91C111 support. E.g. add in tftpboot, etc.
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-CompactFlash. Port & test CF/FAT.
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-ASMI support. Use ASMI for environment, etc.
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})
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#endif
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#if defined(CONFIG_SMC_USE_32_BIT)
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#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
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#define SMC_insl(r,b,l) ({ int __i ; \
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dword *__b2; \
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__b2 = (dword *) b; \
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for (__i = 0; __i < l; __i++) { \
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*(__b2 + __i) = SMC_inl(r); \
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SMC_inl(0); \
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}; \
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})
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#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
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#define SMC_outsl(r,b,l) ({ int __i; \
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dword *__b2; \
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__b2 = (dword *) b; \
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for (__i = 0; __i < l; __i++) { \
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SMC_outl( *(__b2 + __i), r); \
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} \
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})
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#endif /* CONFIG_SMC_USE_32_BIT */
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#endif
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/*---------------------------------------------------------------
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/*------------------------------------------------------------------------
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* Ethernet -- needs work!
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*----------------------------------------------------------------------*/
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#if 0
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#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
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#define CONFIG_SMC91111_BASE 0x00910000 /* Base address */
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#undef CONFIG_SMC91111_EXT_PHY /* No external PHY */
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#define CONFIG_SMC_USE_32_BIT 1 /* 32-bit i/f */
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#endif
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#define CONFIG_SMC91111_BASE 0x00910300 /* Base address */
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#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
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#define CONFIG_SMC_USE_32_BIT /* 32-bit data rd/wr */
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#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
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#define CONFIG_NETMASK 255.255.255.0
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@ -131,7 +129,6 @@
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CFG_CMD_JFFS2 | \
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CFG_CMD_KGDB | \
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CFG_CMD_NAND | \
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CFG_CMD_NET | \
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CFG_CMD_MMC | \
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CFG_CMD_MII | \
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CFG_CMD_PCI | \
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#define PLPRCR_MF_MSK 0xffff001e /* Multiplication factor + PDF bits */
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#define PLPRCR_MFN_MSK 0xf8000000 /* Multiplication factor numerator bits */
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#define PLPRCR_MFN_SHIFT 0x0000001b /* Multiplication factor numerator shift*/
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#define PLPRCR_MFD_MSK 0x03c00000 /* Multiplication factor denominator bits */
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#define PLPRCR_MFD_MSK 0x07c00000 /* Multiplication factor denominator bits */
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#define PLPRCR_MFD_SHIFT 0x00000017 /* Multiplication factor denominator shift*/
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#define PLPRCR_S_MSK 0x00300000 /* Multiplication factor integer bits */
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#define PLPRCR_S_SHIFT 0x00000014 /* Multiplication factor integer shift */
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#include <common.h>
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#include <devices.h>
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#include <watchdog.h>
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#include <net.h>
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/*
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@ -107,6 +108,8 @@ void board_init (void)
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bd_t *bd;
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init_fnc_t **init_fnc_ptr;
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char *s, *e;
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int i;
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/* Pointer is writable since we allocated a register for it.
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* Nios treats CFG_GBL_DATA_OFFSET as an address.
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@ -129,6 +132,12 @@ void board_init (void)
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bd->bi_sramstart= CFG_SRAM_BASE;
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bd->bi_sramsize = CFG_SRAM_SIZE;
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bd->bi_baudrate = CONFIG_BAUDRATE;
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bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
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s = getenv ("ethaddr");
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for (i = 0; i < 6; ++i) {
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bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
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if (s) s = (*e) ? e + 1 : e;
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}
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for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
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if ((*init_fnc_ptr) () != 0) {
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@ -164,3 +173,4 @@ void hang (void)
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puts("### ERROR ### Please reset board ###\n");
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for (;;);
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}
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