* Patch by Martin Krause, 09 Oct 2003:
Fixes for TRAB board - /board/trab/rs485.c: correct baudrate - /board/trab/cmd_trab.c: bug fix for problem with timer overflow in udelay(); fix some timing problems with adc controller - /board/trab/trab_fkt.c: add new commands: gain, eeprom and power; modify commands: touch and buzzer * Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE (quick & dirty workaround for rogue pointer problem in get_vfatname()); Use direct function calls for auto_update instead of hush commands
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12
CHANGELOG
12
CHANGELOG
@ -2,6 +2,18 @@
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Changes for U-Boot 1.0.0:
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======================================================================
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* Patch by Martin Krause, 09 Oct 2003:
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Fixes for TRAB board
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- /board/trab/rs485.c: correct baudrate
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- /board/trab/cmd_trab.c: bug fix for problem with timer overflow in
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udelay(); fix some timing problems with adc controller
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- /board/trab/trab_fkt.c: add new commands: gain, eeprom and power;
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modify commands: touch and buzzer
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* Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE
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(quick & dirty workaround for rogue pointer problem in get_vfatname());
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Use direct function calls for auto_update instead of hush commands
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* Patch by Scott McNutt, 04 Oct 2003:
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- add support for Altera Nios-32 CPU
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- add support for Nios Cyclone Development Kit (DK-1C20)
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@ -183,9 +183,7 @@ struct flash_layout aufl_layout[AU_MAXFILES - 3] = { \
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#define FIDX_TO_LIDX(idx) ((idx) - 2)
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/* where to load files into memory */
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#define LOAD_ADDR ((unsigned char *)0x0C100100)
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/* where to build strings in memory - 256 bytes should be enough */
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#define STRING_ADDR ((char *)0x0C100000)
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#define LOAD_ADDR ((unsigned char *)0x0C100000)
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/* the app is the largest image */
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#define MAX_LOADSZ ausize[IDX_APP]
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@ -199,6 +197,9 @@ extern int i2c_write (uchar, uint, int , uchar* , int);
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extern int trab_vfd (ulong);
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extern int transfer_pic(unsigned char, unsigned char *, int, int);
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#endif
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extern int flash_sect_erase(ulong, ulong);
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extern int flash_sect_protect (int, ulong, ulong);
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extern int flash_write (uchar *, ulong, ulong);
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/* change char* to void* to shutup the compiler */
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extern int i2c_write_multiple (uchar, uint, int, void *, int);
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extern int i2c_read_multiple (uchar, uint, int, void *, int);
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@ -305,13 +306,12 @@ au_check_valid(int idx, long nbytes)
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#define POWER_OFF (1 << 1)
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int
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au_do_update(int idx, long sz, int repeat)
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au_do_update(int idx, long sz)
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{
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image_header_t *hdr;
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char *addr;
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long start, end;
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char *strbuf = STRING_ADDR;
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int off;
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int off, rc;
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uint nbytes;
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hdr = (image_header_t *)LOAD_ADDR;
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@ -342,20 +342,14 @@ au_do_update(int idx, long sz, int repeat)
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start = aufl_layout[1].start;
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end = aufl_layout[1].end;
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#endif
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debug ("protect off %lx %lx\n", start, end);
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sprintf(strbuf, "protect off %lx %lx\n", start, end);
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parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
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flash_sect_protect(0, start, end);
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}
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/*
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* erase the address range. Multiple erases seem to cause
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* problems.
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* erase the address range.
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*/
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if (repeat == 0) {
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debug ("erase %lx %lx\n", start, end);
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sprintf(strbuf, "erase %lx %lx\n", start, end);
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parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
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}
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debug ("flash_sect_erase(%lx, %lx);\n", start, end);
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flash_sect_erase(start, end);
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wait_ms(100);
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/* strip the header - except for the kernel and app */
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if (idx == IDX_FIRMWARE || idx == IDX_DISK) {
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@ -374,9 +368,12 @@ au_do_update(int idx, long sz, int repeat)
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}
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/* copy the data from RAM to FLASH */
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debug ("cp.b %p %lx %x\n", addr, start, nbytes);
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sprintf(strbuf, "cp.b %p %lx %x\n", addr, start, nbytes);
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parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
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debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
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rc = flash_write(addr, start, nbytes);
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if (rc != 0) {
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printf("Flashing failed due to error %d\n", rc);
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return -1;
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}
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/* check the dcrc of the copy */
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if (crc32 (0, (char *)(start + off), ntohl(hdr->ih_size)) != ntohl(hdr->ih_dcrc)) {
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@ -386,11 +383,8 @@ au_do_update(int idx, long sz, int repeat)
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/* protect the address range */
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/* this assumes that ONLY the firmware is protected! */
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if (idx == IDX_FIRMWARE) {
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debug ("protect on %lx %lx\n", start, end);
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sprintf(strbuf, "protect on %lx %lx\n", start, end);
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parse_string_outer(strbuf, FLAG_PARSE_SEMICOLON);
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}
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if (idx == IDX_FIRMWARE)
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flash_sect_protect(1, start, end);
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return 0;
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}
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@ -587,7 +581,7 @@ do_auto_update(void)
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cnt = 0;
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got_ctrlc = 0;
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do {
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res = au_do_update(i, sz, cnt);
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res = au_do_update(i, sz);
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/* let the user break out of the loop */
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if (ctrlc() || had_ctrlc()) {
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clear_ctrlc();
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File diff suppressed because it is too large
Load Diff
@ -47,8 +47,8 @@ static void rs485_setbrg (void)
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unsigned int reg = 0;
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/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
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/* reg = (33000000 / (16 * gd->baudrate)) - 1; */
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reg = (33000000 / (16 * 38.400)) - 1;
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/* reg = (33000000 / (16 * gd->baudrate)) - 1; */
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reg = (33000000 / (16 * 38400)) - 1;
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/* FIFO enable, Tx/Rx FIFO clear */
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uart->UFCON = 0x07;
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@ -67,18 +67,18 @@ static void rs485_setbrg (void)
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static void rs485_cfgio (void)
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{
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S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
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S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
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gpio->PFCON &= ~(0x3 << 2);
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gpio->PFCON |= (0x2 << 2); /* configure GPF1 as RXD1 */
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gpio->PFCON &= ~(0x3 << 2);
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gpio->PFCON |= (0x2 << 2); /* configure GPF1 as RXD1 */
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gpio->PFCON &= ~(0x3 << 6);
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gpio->PFCON |= (0x2 << 6); /* configure GPF3 as TXD1 */
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gpio->PFCON &= ~(0x3 << 6);
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gpio->PFCON |= (0x2 << 6); /* configure GPF3 as TXD1 */
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gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
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gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
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gpio->PFUP |= (1 << 1); /* disable pullup on GPF1 */
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gpio->PFUP |= (1 << 3); /* disable pullup on GPF3 */
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gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
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gpio->PACON &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
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}
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/*
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@ -88,8 +88,8 @@ static void rs485_cfgio (void)
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*/
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int rs485_init (void)
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{
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rs485_cfgio ();
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rs485_setbrg ();
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rs485_cfgio ();
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rs485_setbrg ();
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return (0);
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}
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@ -168,13 +168,13 @@ static void set_rs485re(unsigned char rs485re_state)
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static void set_rs485de(unsigned char rs485de_state)
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{
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S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
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S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
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/* This is on PORT A bit 11 */
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if(rs485de_state)
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gpio->PADAT |= (1 << 11);
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else
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gpio->PADAT &= ~(1 << 11);
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/* This is on PORT A bit 11 */
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if(rs485de_state)
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gpio->PADAT |= (1 << 11);
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else
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gpio->PADAT &= ~(1 << 11);
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}
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File diff suppressed because it is too large
Load Diff
@ -33,6 +33,11 @@
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#if (CONFIG_COMMANDS & CFG_CMD_FAT)
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#ifdef CONFIG_AUTO_UPDATE
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/* the VFAT code has a bug which breaks auto update */
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#undef CONFIG_SUPPORT_VFAT
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#endif
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/*
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* Convert a string to lowercase.
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*/
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@ -182,7 +182,7 @@
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#define CONFIG_IPADDR 192.168.3.68
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#define CONFIG_HOSTNAME trab
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#define CONFIG_SERVERIP 192.168.3.1
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#define CONFIG_BOOTCOMMAND "run flash_nfs"
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#define CONFIG_BOOTCOMMAND "burn_in"
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#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
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#ifdef CFG_HUSH_PARSER
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@ -331,9 +331,13 @@
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#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
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/*-----------------------------------------------------------------------
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* burn-in test stuff
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* burn-in test stuff.
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*
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* BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
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* Because the burn-in test itself causes also an delay of about 4 seconds,
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* this time must be subtracted from the desired overall burn-in cycle time.
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*/
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#define BURN_IN_CYCLE_DELAY 20 /* delay in sec between burn-in test cycles */
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#define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
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/*-----------------------------------------------------------------------
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* Stack sizes
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