* Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board * Patch by Richard Woodruff, 19 June 03: - Enabled standard u-boot device abstraction for ARM - Enabled console device for ARM - Initilized bi_baudrate for ARM * Patch by Bill Hargen, 23 Apr 2003: fix byte order for 824x I2C addresses (write op)
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wdenk
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3595ac4979
11
CHANGELOG
11
CHANGELOG
@ -2,6 +2,17 @@
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Changes since U-Boot 0.3.1:
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======================================================================
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* Patch by Rune Torgersen, 4 Jun 2003:
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add large memory support for MPC8266ADS board
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* Patch by Richard Woodruff, 19 June 03:
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- Enabled standard u-boot device abstraction for ARM
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- Enabled console device for ARM
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- Initilized bi_baudrate for ARM
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* Patch by Bill Hargen, 23 Apr 2003:
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fix byte order for 824x I2C addresses (write op)
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* Patch by Murray Jensen, 20 Jun 2003:
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- hymod update
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- cleanup (especially for gcc-3.x compilers)
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@ -46,7 +46,7 @@
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* PSDMR_BUFCMD adds a clock
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* 0 no extra clock
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*/
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#define CONFIG_PBI 0
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#define CONFIG_PBI PSDMR_PBI
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#define PESSIMISTIC_SDRAM 0
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#define EAMUX 0 /* EST requires EAMUX */
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#define BUFCMD 0
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@ -379,6 +379,25 @@ long int initdram(int board_type)
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sdram_size = 1 << (rows + cols + banks + width);
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/* hack for high density memory (512MB per CS) */
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/* !!!!! Will ONLY work with Page Based Interleave !!!!!
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( PSDMR[PBI] = 1 )
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*/
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/* mamory actually has 11 column addresses, but the memory controller
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doesn't really care.
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the calculations that follow will however move the rows so that
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they are muxed one bit off if you use 11 bit columns.
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The solution is to tell the memory controller the correct size of the memory
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but change the number of columns to 10 afterwards.
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The 11th column addre will still be mucxed correctly onto the bus.
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Also be aware that the MPC8266ADS board Rev B has not connected
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Row addres 13 to anything.
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The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126)
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*/
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if (cols > 10)
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cols = 10;
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#if(CONFIG_PBI == 0) /* bank-based interleaving */
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rowst = ((32 - 6) - (rows + cols + width)) * 2;
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@ -160,14 +160,16 @@ int devices_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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int i;
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#ifndef CONFIG_ARM /* already relocated for current ARM implementation */
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ulong relocation_offset = gd->reloc_off;
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int i;
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/* relocate device name pointers */
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for (i = 0; i < (sizeof (stdio_names) / sizeof (char *)); ++i) {
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stdio_names[i] = (char *) (((ulong) stdio_names[i]) +
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relocation_offset);
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}
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#endif
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/* Initialize the list */
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devlist = ListCreate (sizeof (device_t));
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@ -125,10 +125,10 @@ I2C_Status I2C_Initialize (unsigned char addr,
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* len is the length of data to send or receive
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* buffer is the address of the data buffer
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* stop = I2C_NO_STOP, don't signal STOP at end of transaction
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* I2C_STOP, signal STOP at end of transaction
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* I2C_STOP, signal STOP at end of transaction
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* retry is the timeout retry value, currently ignored
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* rsta = I2C_NO_RESTART, this is not continuation of existing transaction
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* I2C_RESTART, this is a continuation of existing transaction
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* I2C_RESTART, this is a continuation of existing transaction
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*/
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I2C_Status I2C_do_transaction ( I2C_INTERRUPT_MODE en_int,
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I2C_TRANSACTION_MODE act,
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@ -191,12 +191,12 @@ I2C_Status I2C_do_transaction ( I2C_INTERRUPT_MODE en_int,
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}
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/*
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* We first have to contact the slave device and transmit the
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* data address. Be careful about the STOP and restart stuff.
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* We don't want to signal STOP after sending the data
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* address, but this could be a continuation if the
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* application didn't release the bus after the previous
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* transaction, by not sending a STOP after it.
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* We first have to contact the slave device and transmit the
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* data address. Be careful about the STOP and restart stuff.
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* We don't want to signal STOP after sending the data
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* address, but this could be a continuation if the
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* application didn't release the bus after the previous
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* transaction, by not sending a STOP after it.
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*/
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status = I2C_do_buffer (en_int, I2C_MASTER_XMIT, i2c_addr, 1,
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data_addr_buffer, I2C_NO_STOP, retry, rsta);
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@ -231,10 +231,10 @@ I2C_Status I2C_do_transaction ( I2C_INTERRUPT_MODE en_int,
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* len is the length of data to send or receive
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* buffer is the address of the data buffer
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* stop = I2C_NO_STOP, don't signal STOP at end of transaction
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* I2C_STOP, signal STOP at end of transaction
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* I2C_STOP, signal STOP at end of transaction
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* retry is the timeout retry value, currently ignored
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* rsta = I2C_NO_RESTART, this is not continuation of existing transaction
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* I2C_RESTART, this is a continuation of existing transaction
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* I2C_RESTART, this is a continuation of existing transaction
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*/
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static I2C_Status I2C_do_buffer (I2C_INTERRUPT_MODE en_int,
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I2C_TRANSACTION_MODE act,
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@ -518,9 +518,9 @@ static I2CStatus I2C_Timer_Event (unsigned int eumbbar,
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* function: I2C_Start
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*
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* description: Generate a START signal in the desired mode.
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* I2C is the master.
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* I2C is the master.
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*
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* Return I2CSUCCESS if no error.
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* Return I2CSUCCESS if no error.
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*
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* note:
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****************************************************/
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@ -594,8 +594,8 @@ static I2CStatus I2C_Start (unsigned int eumbbar, unsigned char slave_addr, /* a
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* function: I2c_Stop
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*
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* description: Generate a STOP signal to terminate the master
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* transaction.
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* return I2CSUCCESS
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* transaction.
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* return I2CSUCCESS
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*
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**********************************************************/
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static I2CStatus I2C_Stop (unsigned int eumbbar)
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@ -621,10 +621,10 @@ static I2CStatus I2C_Stop (unsigned int eumbbar)
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* function: I2C_Master_Xmit
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*
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* description: Master sends one byte of data to
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* slave target
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* slave target
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*
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* return I2CSUCCESS if the byte transmitted.
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* Otherwise no-zero
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* return I2CSUCCESS if the byte transmitted.
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* Otherwise no-zero
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*
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* Note: condition must meet when this function is called:
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* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 && I2CSR(RXAK) == 0
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@ -669,9 +669,9 @@ static I2CStatus I2C_Master_Xmit (unsigned int eumbbar)
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* function: I2C_Master_Rcv
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*
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* description: master reads one byte data
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* from slave source
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* from slave source
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*
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* return I2CSUCCESS if no error
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* return I2CSUCCESS if no error
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*
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* Note: condition must meet when this function is called:
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* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 &&
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@ -736,10 +736,10 @@ static I2CStatus I2C_Master_Rcv (unsigned int eumbbar)
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* function: I2C_Slave_Xmit
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*
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* description: Slave sends one byte of data to
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* requesting destination
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* requesting destination
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*
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* return SUCCESS if the byte transmitted. Otherwise
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* No-zero
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* return SUCCESS if the byte transmitted. Otherwise
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* No-zero
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*
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* Note: condition must meet when this function is called:
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* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 && I2CSR(RXAK) = 0
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@ -757,12 +757,12 @@ static I2CStatus I2C_Slave_Xmit (unsigned int eumbbar)
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ByteToXmit = 0;
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/*
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* do not toggle I2CCR(MTX). Doing so will
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* cause bus-hung since current Kahlua design
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* does not give master a way to detect slave
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* stop. It is always a good idea for master
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* to use timer to prevent the long long
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* delays
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* do not toggle I2CCR(MTX). Doing so will
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* cause bus-hung since current Kahlua design
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* does not give master a way to detect slave
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* stop. It is always a good idea for master
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* to use timer to prevent the long long
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* delays
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*/
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return I2CBUFFEMPTY;
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@ -787,9 +787,9 @@ static I2CStatus I2C_Slave_Xmit (unsigned int eumbbar)
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* function: I2C_Slave_Rcv
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*
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* description: slave reads one byte data
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* from master source
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* from master source
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*
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* return I2CSUCCESS if no error otherwise non-zero
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* return I2CSUCCESS if no error otherwise non-zero
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*
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* Note: condition must meet when this function is called:
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* I2CSR(MIF) == 1 && I2CSR(MCF) == 1 &&
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@ -834,8 +834,8 @@ static I2CStatus I2C_Slave_Rcv (unsigned int eumbbar)
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* function: I2C_Init
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*
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* description: Initialize I2C unit with desired frequency divider,
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* master's listening address, with interrupt enabled
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* or disabled.
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* master's listening address, with interrupt enabled
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* or disabled.
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*
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* note:
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********************************************************/
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@ -912,7 +912,7 @@ static I2C_STAT I2C_Get_Stat (unsigned int eumbbar)
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* function: I2c_Set_Ctrl
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*
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* description: Change I2C Control bits,
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* i.e., write to I2CCR
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* i.e., write to I2CCR
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*
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********************************************/
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static void I2C_Set_Ctrl (unsigned int eumbbar, I2C_CTRL ctrl)
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@ -937,7 +937,7 @@ static void I2C_Set_Ctrl (unsigned int eumbbar, I2C_CTRL ctrl)
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* function: I2C_Get_Ctrl
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*
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* description: Query I2C Control bits,
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* i.e., read I2CCR
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* i.e., read I2CCR
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*****************************************/
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static I2C_CTRL I2C_Get_Ctrl (unsigned int eumbbar)
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{
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@ -959,7 +959,7 @@ static I2C_CTRL I2C_Get_Ctrl (unsigned int eumbbar)
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* function: I2C_Slave_Addr
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*
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* description: Process slave address phase.
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* return I2CSUCCESS if no error
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* return I2CSUCCESS if no error
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*
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* note: Precondition for calling this function:
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* I2CSR(MIF) == 1 &&
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@ -1193,14 +1193,17 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
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int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
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{
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I2CStatus status;
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unsigned char dummy_buffer[I2C_RXTX_LEN + 2];
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uchar dummy_buffer[I2C_RXTX_LEN + 2];
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uchar *p;
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int i;
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dummy_buffer[0] = addr & 0xFF;
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if (alen == 2)
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dummy_buffer[1] = (addr >> 8) & 0xFF;
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for (i = 0; i < len; i++)
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dummy_buffer[i + alen] = buffer[i];
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p = dummy_buffer;
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/* fill in address in big endian order */
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for (i=0; i<alen; ++i)
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*p++ = (addr >> (i * 8)) & 0xFF;
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/* fill in data */
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for (i=0; i<len; ++i)
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*p++ = *buffer;
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status = I2C_do_buffer (0, I2C_MASTER_XMIT, chip, alen + len,
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dummy_buffer, I2C_STOP, 1, I2C_NO_RESTART);
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@ -27,7 +27,9 @@
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <devices.h>
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#include <syscall.h>
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#include <version.h>
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#include <net.h>
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@ -101,8 +103,7 @@ static int init_baudrate (void)
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uchar tmp[64]; /* long enough for environment variables */
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int i = getenv_r ("baudrate", tmp, sizeof (tmp));
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gd->baudrate = (i > 0)
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gd->bd->bi_baudrate = gd->baudrate = (i > 0)
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? (int) simple_strtoul (tmp, NULL, 10)
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: CONFIG_BAUDRATE;
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@ -186,6 +187,7 @@ init_fnc_t *init_sequence[] = {
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env_init, /* initialize environment */
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init_baudrate, /* initialze baudrate settings */
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serial_init, /* serial communications setup */
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console_init_f, /* stage 1 init of console */
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display_banner, /* say that we are here */
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dram_init, /* configure available RAM banks */
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display_dram_config,
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@ -283,6 +285,15 @@ void start_armboot (void)
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}
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}
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devices_init (); /* get the devices list going. */
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/* Syscalls are not implemented for ARM. But allocating
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* this allows the console_init routines to work without #ifdefs
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*/
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syscall_tbl = (void **) malloc (NR_SYSCALLS * sizeof (void *));
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console_init_r (); /* fully init console as a device */
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#if defined(CONFIG_MISC_INIT_R)
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/* miscellaneous platform dependent initialisations */
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misc_init_r ();
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