* Patch by Devin Crumb, 02 Apr 2003:
Fix clock divider rounding problem in drivers/serial.c * Patch by Ken Chou, 19 June 2003: Added support for A3000 SBC board (Artis Microsystems Inc.)
This commit is contained in:
wdenk
parent
0b97ab144f
commit
0332990b85
10
CHANGELOG
10
CHANGELOG
@ -2,11 +2,15 @@
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Changes since U-Boot 0.3.1:
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======================================================================
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* * Patch by Richard Woodruff, 19 June 03:
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- Fixed smc91c111 driver to sync with the u-boot environment (driver/smc91c111.c).
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* Patch by Devin Crumb, 02 Apr 2003:
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Fix clock divider rounding problem in drivers/serial.c
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* Patch by Richard Woodruff, 19 June 03:
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- Fixed smc91c111 driver to sync with the u-boot environment
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(driver/smc91c111.c).
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- Added eth_init error return check in NetLoop (net/net.c).
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* Patch by Ken Chou, 17 June 2003:
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* Patch by Ken Chou, 19 June 2003:
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Added support for A3000 SBC board (Artis Microsystems Inc.)
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* Patches by Murray Jensen, 17 Jun 2003:
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8
MAKEALL
8
MAKEALL
@ -58,11 +58,11 @@ LIST_4xx=" \
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#########################################################################
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LIST_824x=" \
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BMW CPC45 CU824 MOUSSE \
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MUSENKI OXC PN62 Sandpoint8240 \
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Sandpoint8245 utx8245 \
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A3000 BMW CPC45 CU824 \
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MOUSSE MUSENKI OXC PN62 \
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Sandpoint8240 Sandpoint8245 utx8245 \
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"
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x
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#########################################################################
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## MPC8260 Systems (includes 8250, 8255 etc.)
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#########################################################################
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3
Makefile
3
Makefile
@ -490,6 +490,9 @@ WALNUT405_config:unconfig
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#########################################################################
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xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
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A3000_config: unconfig
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@./mkconfig $(@:_config=) ppc mpc824x a3000
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BMW_config: unconfig
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@./mkconfig $(@:_config=) ppc mpc824x bmw
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40
board/a3000/Makefile
Normal file
40
board/a3000/Makefile
Normal file
@ -0,0 +1,40 @@
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#
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# (C) Copyright 2001
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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||||
# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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$(LIB): .depend $(OBJS)
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$(AR) crv $@ $^
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#########################################################################
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.depend: Makefile $(OBJS:.o=.c)
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$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
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sinclude .depend
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#########################################################################
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18
board/a3000/README
Normal file
18
board/a3000/README
Normal file
@ -0,0 +1,18 @@
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U-Boot for Artis SBC-A3000
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---------------------------
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Artis SBC-A3000 has one flash socket that the user uses Intel 28F128J3A (16MB)
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or 28F064J3A (8MB) chips.
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In board's notation, bank 0 is the one at the address of 0xFF000000.
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bank 1 is the one at the address of 0xFF800000
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On power-up the processor jumps to the address of 0xFFF00100, the last
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megabyte of the bank 0 of flash.
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Thus, U-Boot is configured to reside in flash starting at the address of
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0xFFF00000. The environment space is located in flash separately from
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U-Boot, at the address of 0xFFFE0000.
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There is a National ns83815 10/100M ethernet controller on-board.
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144
board/a3000/a3000.c
Normal file
144
board/a3000/a3000.c
Normal file
@ -0,0 +1,144 @@
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/*
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* (C) Copyright 2001
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc824x.h>
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#include <pci.h>
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int checkboard (void)
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{
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ulong busfreq = get_bus_freq(0);
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char buf[32];
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printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
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return 0;
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}
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long int initdram (int board_type)
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{
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int i, cnt;
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volatile uchar * base= CFG_SDRAM_BASE;
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volatile ulong * addr;
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ulong save[32];
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ulong val, ret = 0;
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for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
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addr = (volatile ulong *)base + cnt;
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save[i++] = *addr;
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*addr = ~cnt;
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}
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addr = (volatile ulong *)base;
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save[i] = *addr;
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*addr = 0;
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if (*addr != 0) {
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*addr = save[i];
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goto Done;
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}
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for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
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addr = (volatile ulong *)base + cnt;
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val = *addr;
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*addr = save[--i];
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if (val != ~cnt) {
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ulong new_bank0_end = cnt * sizeof(long) - 1;
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ulong mear1 = mpc824x_mpc107_getreg(MEAR1);
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ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
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mear1 = (mear1 & 0xFFFFFF00) |
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((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
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emear1 = (emear1 & 0xFFFFFF00) |
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((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
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mpc824x_mpc107_setreg(MEAR1, mear1);
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mpc824x_mpc107_setreg(EMEAR1, emear1);
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ret = cnt * sizeof(long);
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goto Done;
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}
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}
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ret = CFG_MAX_RAM_SIZE;
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Done:
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return ret;
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}
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/*
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* Initialize PCI Devices
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*/
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#if 1
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#ifndef CONFIG_PCI_PNP
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static struct pci_config_table pci_a3000_config_table[] = {
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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0x0, 0x0, 0x0, /* unknown eth0 divice */
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pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
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PCI_ENET0_MEMADDR,
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PCI_COMMAND_IO |
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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0x0, 0x0, 0x0, /* unknown eth1 device */
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pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
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PCI_ENET1_MEMADDR,
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PCI_COMMAND_IO |
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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0x0, 0x0, 0x0, /* unknown eth1 device */
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pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
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PCI_ENET2_MEMADDR,
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PCI_COMMAND_IO |
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER }},
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{ }
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};
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#endif
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#else
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#ifndef CONFIG_PCI_PNP
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static struct pci_config_table pci_a3000_config_table[] = {
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
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pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
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PCI_ENET0_MEMADDR,
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x10, PCI_ANY_ID,
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pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
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PCI_ENET1_MEMADDR,
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PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
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{ }
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};
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#endif
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#endif
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struct pci_controller hose = {
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#ifndef CONFIG_PCI_PNP
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config_table: pci_a3000_config_table,
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#endif
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};
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void pci_init_board(void)
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{
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pci_mpc824x_init(&hose);
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}
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30
board/a3000/config.mk
Normal file
30
board/a3000/config.mk
Normal file
@ -0,0 +1,30 @@
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#
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# (C) Copyright 2000, 2001
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
|
||||
# project.
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#
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# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
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# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
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#
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#
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# Artis A-3000 boards
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#
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TEXT_BASE = 0xFFF00000
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PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
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454
board/a3000/flash.c
Normal file
454
board/a3000/flash.c
Normal file
@ -0,0 +1,454 @@
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/*
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||||
* (C) Copyright 2001
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#include <common.h>
|
||||
#include <mpc824x.h>
|
||||
|
||||
#if defined(CFG_ENV_IS_IN_FLASH)
|
||||
# ifndef CFG_ENV_ADDR
|
||||
# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
|
||||
# endif
|
||||
# ifndef CFG_ENV_SIZE
|
||||
# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
|
||||
# endif
|
||||
# ifndef CFG_ENV_SECT_SIZE
|
||||
# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
||||
/*---------------------------------------------------------------------*/
|
||||
#define DEBUG_FLASH
|
||||
|
||||
#ifdef DEBUG_FLASH
|
||||
#define DEBUGF(fmt,args...) printf(fmt ,##args)
|
||||
#else
|
||||
#define DEBUGF(fmt,args...)
|
||||
#endif
|
||||
/*---------------------------------------------------------------------*/
|
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions
|
||||
*/
|
||||
static ulong flash_get_size (vu_char *addr, flash_info_t *info);
|
||||
static int write_data (flash_info_t *info, uchar *dest, uchar data);
|
||||
static void flash_get_offsets (ulong base, flash_info_t *info);
|
||||
|
||||
#define BS(b) (b)
|
||||
#define BYTEME(x) ((x) & 0xFF)
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
unsigned long flash_init (void)
|
||||
{
|
||||
unsigned long flash_banks[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS;
|
||||
unsigned long size, size_b[CFG_MAX_FLASH_BANKS];
|
||||
|
||||
int i;
|
||||
|
||||
/* Init: no FLASHes known */
|
||||
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
|
||||
{
|
||||
flash_info[i].flash_id = FLASH_UNKNOWN;
|
||||
|
||||
DEBUGF("Get flash bank %d @ 0x%08lx\n", i, flash_banks[i]);
|
||||
/*
|
||||
size_b[i] = flash_get_size((vu_char *)flash_banks[i], &flash_info[i]);
|
||||
*/
|
||||
size_b[i] = flash_get_size((vu_char *) 0xff800000 , &flash_info[i]);
|
||||
|
||||
if (flash_info[i].flash_id == FLASH_UNKNOWN)
|
||||
{
|
||||
printf ("## Unknown FLASH on Bank %d: "
|
||||
"ID 0x%lx, Size = 0x%08lx = %ld MB\n",
|
||||
i, flash_info[i].flash_id,
|
||||
size_b[i], size_b[i]<<20);
|
||||
}
|
||||
else
|
||||
{
|
||||
DEBUGF("## Flash bank %d at 0x%08lx sizes: 0x%08lx \n",
|
||||
i, flash_banks[i], size_b[i]);
|
||||
|
||||
flash_get_offsets (flash_banks[i], &flash_info[i]);
|
||||
flash_info[i].size = size_b[i];
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
|
||||
DEBUGF("protect monitor %x @ %x\n", CFG_MONITOR_BASE, CFG_MONITOR_LEN);
|
||||
/* monitor protection ON by default */
|
||||
flash_protect(FLAG_PROTECT_SET,
|
||||
CFG_MONITOR_BASE,
|
||||
CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
|
||||
&flash_info[0]);
|
||||
#endif
|
||||
|
||||
#ifdef CFG_ENV_IS_IN_FLASH
|
||||
/* ENV protection ON by default */
|
||||
DEBUGF("protect environtment %x @ %x\n", CFG_ENV_ADDR, CFG_ENV_SECT_SIZE);
|
||||
flash_protect(FLAG_PROTECT_SET,
|
||||
CFG_ENV_ADDR,
|
||||
CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
|
||||
&flash_info[0]);
|
||||
#endif
|
||||
|
||||
size = 0;
|
||||
DEBUGF("## Final Flash bank sizes: ");
|
||||
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
|
||||
{
|
||||
DEBUGF("%08lx ", size_b[i]);
|
||||
size += size_b[i];
|
||||
}
|
||||
DEBUGF("\n");
|
||||
return (size);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
static void flash_get_offsets (ulong base, flash_info_t *info)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
return;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) {
|
||||
case FLASH_MAN_INTEL:
|
||||
for (i = 0; i < info->sector_count; i++) {
|
||||
info->start[i] = base;
|
||||
base += 0x00020000; /* 128k per bank */
|
||||
}
|
||||
return;
|
||||
|
||||
default:
|
||||
printf ("Don't know sector ofsets for flash type 0x%lx\n", info->flash_id);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
void flash_print_info (flash_info_t *info)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("missing or unknown FLASH type\n");
|
||||
return;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) {
|
||||
case FLASH_MAN_AMD: printf ("AMD "); break;
|
||||
case FLASH_MAN_FUJ: printf ("Fujitsu "); break;
|
||||
case FLASH_MAN_SST: printf ("SST "); break;
|
||||
case FLASH_MAN_STM: printf ("STM "); break;
|
||||
case FLASH_MAN_INTEL: printf ("Intel "); break;
|
||||
case FLASH_MAN_MT: printf ("MT "); break;
|
||||
default: printf ("Unknown Vendor "); break;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) {
|
||||
case FLASH_28F320J3A:
|
||||
printf ("28F320J3A (32Mbit = 128K x 32)\n");
|
||||
break;
|
||||
case FLASH_28F640J3A:
|
||||
printf ("28F640J3A (64Mbit = 128K x 64)\n");
|
||||
break;
|
||||
case FLASH_28F128J3A:
|
||||
printf ("28F128J3A (128Mbit = 128K x 128)\n");
|
||||
break;
|
||||
default:
|
||||
printf ("Unknown Chip Type\n");
|
||||
break;
|
||||
}
|
||||
|
||||
#if 1
|
||||
if (info->size >= (1 << 20)) {
|
||||
i = 20;
|
||||
} else {
|
||||
i = 10;
|
||||
}
|
||||
printf (" Size: %ld %cB in %d Sectors\n",
|
||||
info->size >> i,
|
||||
(i == 20) ? 'M' : 'k',
|
||||
info->sector_count);
|
||||
|
||||
printf (" Sector Start Addresses:");
|
||||
for (i=0; i<info->sector_count; ++i) {
|
||||
if ((i % 5) == 0)
|
||||
printf ("\n ");
|
||||
printf (" %08lX%s",
|
||||
info->start[i],
|
||||
info->protect[i] ? " (RO)" : " "
|
||||
);
|
||||
}
|
||||
printf ("\n");
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
* The following code cannot be run from FLASH!
|
||||
*/
|
||||
static ulong flash_get_size (vu_char *addr, flash_info_t *info)
|
||||
{
|
||||
vu_char manuf, device;
|
||||
|
||||
addr[0] = BS(0x90);
|
||||
manuf = BS(addr[0]);
|
||||
DEBUGF("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, manuf);
|
||||
|
||||
switch (manuf) {
|
||||
case BYTEME(AMD_MANUFACT):
|
||||
info->flash_id = FLASH_MAN_AMD;
|
||||
break;
|
||||
case BYTEME(FUJ_MANUFACT):
|
||||
info->flash_id = FLASH_MAN_FUJ;
|
||||
break;
|
||||
case BYTEME(SST_MANUFACT):
|
||||
info->flash_id = FLASH_MAN_SST;
|
||||
break;
|
||||
case BYTEME(STM_MANUFACT):
|
||||
info->flash_id = FLASH_MAN_STM;
|
||||
break;
|
||||
case BYTEME(INTEL_MANUFACT):
|
||||
info->flash_id = FLASH_MAN_INTEL;
|
||||
break;
|
||||
default:
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
info->sector_count = 0;
|
||||
info->size = 0;
|
||||
addr[0] = BS(0xFF); /* restore read mode, (yes, BS is a NOP) */
|
||||
return 0; /* no or unknown flash */
|
||||
}
|
||||
|
||||
device = BS(addr[2]); /* device ID */
|
||||
|
||||
DEBUGF("Device ID @ 0x%08lx: 0x%08x\n", (ulong)(&addr[1]), device);
|
||||
|
||||
switch (device) {
|
||||
case BYTEME(INTEL_ID_28F320J3A):
|
||||
info->flash_id += FLASH_28F320J3A;
|
||||
info->sector_count = 32;
|
||||
info->size = 0x00400000;
|
||||
break; /* => 4 MB */
|
||||
|
||||
case BYTEME(INTEL_ID_28F640J3A):
|
||||
info->flash_id += FLASH_28F640J3A;
|
||||
info->sector_count = 64;
|
||||
info->size = 0x00800000;
|
||||
break; /* => 8 MB */
|
||||
|
||||
case BYTEME(INTEL_ID_28F128J3A):
|
||||
info->flash_id += FLASH_28F128J3A;
|
||||
info->sector_count = 128;
|
||||
info->size = 0x01000000;
|
||||
break; /* => 16 MB */
|
||||
|
||||
default:
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
addr[0] = BS(0xFF); /* restore read mode (yes, a NOP) */
|
||||
return 0; /* => no or unknown flash */
|
||||
|
||||
}
|
||||
|
||||
if (info->sector_count > CFG_MAX_FLASH_SECT) {
|
||||
printf ("** ERROR: sector count %d > max (%d) **\n",
|
||||
info->sector_count, CFG_MAX_FLASH_SECT);
|
||||
info->sector_count = CFG_MAX_FLASH_SECT;
|
||||
}
|
||||
|
||||
addr[0] = BS(0xFF); /* restore read mode */
|
||||
|
||||
return (info->size);
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
int flash_erase (flash_info_t *info, int s_first, int s_last)
|
||||
{
|
||||
int flag, prot, sect;
|
||||
ulong start, now, last;
|
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) {
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("- missing\n");
|
||||
} else {
|
||||
printf ("- no sectors to erase\n");
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) {
|
||||
printf ("Can erase only Intel flash types - aborted\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
prot = 0;
|
||||
for (sect=s_first; sect<=s_last; ++sect) {
|
||||
if (info->protect[sect]) {
|
||||
prot++;
|
||||
}
|
||||
}
|
||||
|
||||
if (prot) {
|
||||
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
|
||||
} else {
|
||||
printf ("\n");
|
||||
}
|
||||
|
||||
start = get_timer (0);
|
||||
last = start;
|
||||
/* Start erase on unprotected sectors */
|
||||
for (sect = s_first; sect<=s_last; sect++) {
|
||||
if (info->protect[sect] == 0) { /* not protected */
|
||||
vu_char *addr = (vu_char *)(info->start[sect]);
|
||||
unsigned long status;
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts();
|
||||
|
||||
*addr = BS(0x50); /* clear status register */
|
||||
*addr = BS(0x20); /* erase setup */
|
||||
*addr = BS(0xD0); /* erase confirm */
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag) {
|
||||
enable_interrupts();
|
||||
}
|
||||
|
||||
/* wait at least 80us - let's wait 1 ms */
|
||||
udelay (1000);
|
||||
|
||||
while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
|
||||
if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
|
||||
printf ("Timeout\n");
|
||||
*addr = BS(0xB0); /* suspend erase */
|
||||
*addr = BS(0xFF); /* reset to read mode */
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* show that we're waiting */
|
||||
if ((now - last) > 1000) { /* every second */
|
||||
putc ('.');
|
||||
last = now;
|
||||
}
|
||||
}
|
||||
|
||||
*addr = BS(0xFF); /* reset to read mode */
|
||||
}
|
||||
}
|
||||
printf (" done\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
* 4 - Flash not identified
|
||||
*/
|
||||
|
||||
#define FLASH_WIDTH 1 /* flash bus width in bytes */
|
||||
|
||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
||||
{
|
||||
uchar *wp = (uchar *)addr;
|
||||
int rc;
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
return 4;
|
||||
}
|
||||
|
||||
while (cnt > 0) {
|
||||
if ((rc = write_data(info, wp, *src)) != 0) {
|
||||
return rc;
|
||||
}
|
||||
wp++;
|
||||
src++;
|
||||
cnt--;
|
||||
}
|
||||
|
||||
return cnt;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_data (flash_info_t *info, uchar *dest, uchar data)
|
||||
{
|
||||
vu_char *addr = (vu_char *)dest;
|
||||
ulong status;
|
||||
ulong start;
|
||||
int flag;
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((BS(*addr) & data) != data) {
|
||||
return 2;
|
||||
}
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts();
|
||||
|
||||
*addr = BS(0x40); /* write setup */
|
||||
*addr = data;
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag) {
|
||||
enable_interrupts();
|
||||
}
|
||||
|
||||
start = get_timer (0);
|
||||
|
||||
while (((status = BS(*addr)) & BYTEME(0x00800080)) != BYTEME(0x00800080)) {
|
||||
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
|
||||
*addr = BS(0xFF); /* restore read mode */
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
*addr = BS(0xFF); /* restore read mode */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
128
board/a3000/u-boot.lds
Normal file
128
board/a3000/u-boot.lds
Normal file
@ -0,0 +1,128 @@
|
||||
/*
|
||||
* (C) Copyright 2001
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
|
||||
/* Do we need any of these for elf?
|
||||
__DYNAMIC = 0; */
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
.dynsym : { *(.dynsym) }
|
||||
.dynstr : { *(.dynstr) }
|
||||
.rel.text : { *(.rel.text) }
|
||||
.rela.text : { *(.rela.text) }
|
||||
.rel.data : { *(.rel.data) }
|
||||
.rela.data : { *(.rela.data) }
|
||||
.rel.rodata : { *(.rel.rodata) }
|
||||
.rela.rodata : { *(.rela.rodata) }
|
||||
.rel.got : { *(.rel.got) }
|
||||
.rela.got : { *(.rela.got) }
|
||||
.rel.ctors : { *(.rel.ctors) }
|
||||
.rela.ctors : { *(.rela.ctors) }
|
||||
.rel.dtors : { *(.rel.dtors) }
|
||||
.rela.dtors : { *(.rela.dtors) }
|
||||
.rel.bss : { *(.rel.bss) }
|
||||
.rela.bss : { *(.rela.bss) }
|
||||
.rel.plt : { *(.rel.plt) }
|
||||
.rela.plt : { *(.rela.plt) }
|
||||
.init : { *(.init) }
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
cpu/mpc824x/start.o (.text)
|
||||
lib_ppc/board.o (.text)
|
||||
lib_ppc/ppcstring.o (.text)
|
||||
lib_generic/vsprintf.o (.text)
|
||||
lib_generic/crc32.o (.text)
|
||||
lib_generic/zlib.o (.text)
|
||||
|
||||
. = DEFINED(env_offset) ? env_offset : .;
|
||||
common/environment.o (.text)
|
||||
|
||||
*(.text)
|
||||
|
||||
*(.fixup)
|
||||
*(.got1)
|
||||
. = ALIGN(16);
|
||||
*(.rodata)
|
||||
*(.rodata1)
|
||||
}
|
||||
.fini : { *(.fini) } =0
|
||||
.ctors : { *(.ctors) }
|
||||
.dtors : { *(.dtors) }
|
||||
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = (. + 0x0FFF) & 0xFFFFF000;
|
||||
_erotext = .;
|
||||
PROVIDE (erotext = .);
|
||||
.reloc :
|
||||
{
|
||||
*(.got)
|
||||
_GOT2_TABLE_ = .;
|
||||
*(.got2)
|
||||
_FIXUP_TABLE_ = .;
|
||||
*(.fixup)
|
||||
}
|
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
|
||||
__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata2)
|
||||
*(.dynamic)
|
||||
CONSTRUCTORS
|
||||
}
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
__start___ex_table = .;
|
||||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(4096);
|
||||
__init_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.sbss) *(.scommon)
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
}
|
||||
|
||||
_end = . ;
|
||||
PROVIDE (end = .);
|
||||
}
|
||||
|
||||
@ -46,7 +46,8 @@ int serial_init (void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int clock_divisor = CFG_NS16550_CLK / 16 / gd->baudrate;
|
||||
int clock_divisor = (CFG_NS16550_CLK + gd->baudrate * 8 )
|
||||
/ (gd->baudrate * 16);
|
||||
|
||||
#ifdef CFG_NS87308
|
||||
initialise_ns87308();
|
||||
|
||||
@ -59,7 +59,9 @@ typedef struct global_data {
|
||||
#if defined(CONFIG_EVB64260)
|
||||
unsigned int mirror_hack[16];
|
||||
#endif
|
||||
#if defined(CONFIG_SANDPOINT) || defined(CONFIG_MUSENKI)
|
||||
#if defined(CONFIG_SANDPOINT) || \
|
||||
defined(CONFIG_MUSENKI) || \
|
||||
defined(CONFIG_A3000)
|
||||
void * console_addr;
|
||||
#endif
|
||||
#ifdef CONFIG_AMIGAONEG3SE
|
||||
|
||||
324
include/configs/A3000.h
Normal file
324
include/configs/A3000.h
Normal file
@ -0,0 +1,324 @@
|
||||
/*
|
||||
* (C) Copyright 2001, 2002, 2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Configuration settings for the A-3000 board (Artis Microsystems Inc.).
|
||||
* http://artismicro.com
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* board/config.h - configuration options, board specific
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
|
||||
#define CONFIG_MPC824X 1
|
||||
#define CONFIG_MPC8245 1
|
||||
#define CONFIG_A3000 1
|
||||
|
||||
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 9600
|
||||
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
#define CONFIG_BOOTDELAY 5
|
||||
|
||||
#if 0
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
|
||||
CFG_CMD_BEDBUG | \
|
||||
CFG_CMD_BSP | \
|
||||
CFG_CMD_ELF | \
|
||||
CFG_CMD_I2C | \
|
||||
CFG_CMD_FLASH | \
|
||||
CFG_CMD_BEDBUG | \
|
||||
CFG_CMD_NET | \
|
||||
CFG_CMD_PCI )
|
||||
#endif
|
||||
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL )
|
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
|
||||
|
||||
#include <cmd_confdefs.h>
|
||||
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#undef CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_PROMPT "A3000> " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
|
||||
/* Print Buffer Size
|
||||
*/
|
||||
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
|
||||
#define CFG_MAXARGS 8 /* Max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CFG_LOAD_ADDR 0x00400000 /* Default load address */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_PCI /* include pci support */
|
||||
#undef CONFIG_PCI_PNP
|
||||
#define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
|
||||
|
||||
#define CONFIG_NET_MULTI /* Multi ethernet cards support */
|
||||
|
||||
/* #define CONFIG_TULIP */
|
||||
/* #define CONFIG_EEPRO100 */
|
||||
#define CONFIG_NATSEMI
|
||||
|
||||
#define PCI_ENET0_IOADDR 0x80000000
|
||||
#define PCI_ENET0_MEMADDR 0x80000000
|
||||
#define PCI_ENET1_IOADDR 0x81000000
|
||||
#define PCI_ENET1_MEMADDR 0x81000000
|
||||
#define PCI_ENET2_IOADDR 0x82000000
|
||||
#define PCI_ENET2_MEMADDR 0x82000000
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration
|
||||
* (Set up by the startup code)
|
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
|
||||
#define CFG_FLASH_BASE0_PRELIM 0xFF000000 /* FLASH bank on RCS#0 */
|
||||
#define CFG_FLASH_BASE1_PRELIM 0xFF000000 /* FLASH bank on RCS#1 */
|
||||
#define CFG_FLASH_BASE CFG_FLASH_BASE0_PRELIM
|
||||
#define CFG_FLASH_BANKS { CFG_FLASH_BASE0_PRELIM }
|
||||
|
||||
/* even though FLASHP_BASE is FF800000, with 4MB is RCS0, the
|
||||
* reset vector is actually located at FFB00100, but the 8245
|
||||
* takes care of us.
|
||||
*/
|
||||
#define CFG_RESET_ADDRESS 0xFFF00100
|
||||
|
||||
#define CFG_EUMB_ADDR 0xFC000000
|
||||
|
||||
#define CFG_MONITOR_BASE TEXT_BASE
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
|
||||
|
||||
#define CFG_MEMTEST_START 0x00004000 /* memtest works on */
|
||||
#define CFG_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */
|
||||
|
||||
/* Maximum amount of RAM.
|
||||
*/
|
||||
#define CFG_MAX_RAM_SIZE 0x04000000 /* 0 .. 128 MB of (S)DRAM */
|
||||
|
||||
|
||||
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
|
||||
#undef CFG_RAMBOOT
|
||||
#else
|
||||
#define CFG_RAMBOOT
|
||||
#endif
|
||||
|
||||
/*
|
||||
* NS16550 Configuration
|
||||
*/
|
||||
#define CFG_NS16550
|
||||
#define CFG_NS16550_SERIAL
|
||||
|
||||
#define CFG_NS16550_REG_SIZE 1
|
||||
|
||||
#define CFG_NS16550_CLK get_bus_freq(0)
|
||||
|
||||
#define CFG_NS16550_COM1 (CFG_EUMB_ADDR + 0x4500)
|
||||
#define CFG_NS16550_COM2 (CFG_EUMB_ADDR + 0x4600)
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area
|
||||
*/
|
||||
|
||||
/* #define CFG_MONITOR_BASE TEXT_BASE */
|
||||
/*#define CFG_GBL_DATA_SIZE 256*/
|
||||
#define CFG_GBL_DATA_SIZE 128
|
||||
#define CFG_INIT_RAM_ADDR 0x40000000
|
||||
#define CFG_INIT_RAM_END 0x1000
|
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
|
||||
|
||||
|
||||
/*
|
||||
* Low Level Configuration Settings
|
||||
* (address mappings, register initial values, etc.)
|
||||
* You should know what you are doing if you make changes here.
|
||||
* For the detail description refer to the MPC8240 user's manual.
|
||||
*/
|
||||
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
|
||||
#define CFG_HZ 1000
|
||||
|
||||
/* Bit-field values for MCCR1.
|
||||
*/
|
||||
#define CFG_ROMNAL 7
|
||||
#define CFG_ROMFAL 11
|
||||
#define CFG_DBUS_SIZE 0x3
|
||||
|
||||
/* Bit-field values for MCCR2.
|
||||
*/
|
||||
#define CFG_TSWAIT 0x5 /* Transaction Start Wait States timer */
|
||||
#define CFG_REFINT 0x400 /* Refresh interval FIXME: was 0t430 */
|
||||
|
||||
/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.
|
||||
*/
|
||||
#define CFG_BSTOPRE 121
|
||||
|
||||
/* Bit-field values for MCCR3.
|
||||
*/
|
||||
#define CFG_REFREC 8 /* Refresh to activate interval */
|
||||
|
||||
/* Bit-field values for MCCR4.
|
||||
*/
|
||||
#define CFG_PRETOACT 3 /* Precharge to activate interval FIXME: was 2 */
|
||||
#define CFG_ACTTOPRE 5 /* Activate to Precharge interval FIXME: was 5 */
|
||||
#define CFG_ACTORW 3 /* FIXME was 2 */
|
||||
#define CFG_SDMODE_CAS_LAT 3 /* SDMODE CAS latancy */
|
||||
#define CFG_SDMODE_WRAP 0 /* SDMODE wrap type */
|
||||
#define CFG_REGISTERD_TYPE_BUFFER 1
|
||||
#define CFG_EXTROM 1
|
||||
#define CFG_REGDIMM 0
|
||||
|
||||
#define CFG_PGMAX 0x32 /* how long the 8240 reatins the currently accessed page in memory FIXME: was 0x32*/
|
||||
|
||||
#define CFG_SDRAM_DSCD 0x20 /* SDRAM data in sample clock delay - note bottom 3 bits MUST be 0 */
|
||||
|
||||
/* Memory bank settings.
|
||||
* Only bits 20-29 are actually used from these vales to set the
|
||||
* start/end addresses. The upper two bits will always be 0, and the lower
|
||||
* 20 bits will be 0x00000 for a start address, or 0xfffff for an end
|
||||
* address. Refer to the MPC8240 book.
|
||||
*/
|
||||
|
||||
#define CFG_BANK0_START 0x00000000
|
||||
#define CFG_BANK0_END (CFG_MAX_RAM_SIZE - 1)
|
||||
#define CFG_BANK0_ENABLE 1
|
||||
#define CFG_BANK1_START 0x3ff00000
|
||||
#define CFG_BANK1_END 0x3fffffff
|
||||
#define CFG_BANK1_ENABLE 0
|
||||
#define CFG_BANK2_START 0x3ff00000
|
||||
#define CFG_BANK2_END 0x3fffffff
|
||||
#define CFG_BANK2_ENABLE 0
|
||||
#define CFG_BANK3_START 0x3ff00000
|
||||
#define CFG_BANK3_END 0x3fffffff
|
||||
#define CFG_BANK3_ENABLE 0
|
||||
#define CFG_BANK4_START 0x3ff00000
|
||||
#define CFG_BANK4_END 0x3fffffff
|
||||
#define CFG_BANK4_ENABLE 0
|
||||
#define CFG_BANK5_START 0x3ff00000
|
||||
#define CFG_BANK5_END 0x3fffffff
|
||||
#define CFG_BANK5_ENABLE 0
|
||||
#define CFG_BANK6_START 0x3ff00000
|
||||
#define CFG_BANK6_END 0x3fffffff
|
||||
#define CFG_BANK6_ENABLE 0
|
||||
#define CFG_BANK7_START 0x3ff00000
|
||||
#define CFG_BANK7_END 0x3fffffff
|
||||
#define CFG_BANK7_ENABLE 0
|
||||
|
||||
#define CFG_ODCR 0xff
|
||||
|
||||
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
|
||||
#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_IBAT1L (CFG_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
|
||||
#define CFG_IBAT1U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
|
||||
#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
|
||||
#define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_DBAT0L CFG_IBAT0L
|
||||
#define CFG_DBAT0U CFG_IBAT0U
|
||||
#define CFG_DBAT1L CFG_IBAT1L
|
||||
#define CFG_DBAT1U CFG_IBAT1U
|
||||
#define CFG_DBAT2L CFG_IBAT2L
|
||||
#define CFG_DBAT2U CFG_IBAT2U
|
||||
#define CFG_DBAT3L CFG_IBAT3L
|
||||
#define CFG_DBAT3U CFG_IBAT3U
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
|
||||
#define CFG_MAX_FLASH_SECT 128 /* Max number of sectors per flash */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
|
||||
|
||||
/* Warining: environment is not EMBEDDED in the U-Boot code.
|
||||
* It's stored in flash separately.
|
||||
*/
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_ADDR 0xFFFE0000
|
||||
#define CFG_ENV_SIZE 0x00020000 /* Size of the Environment */
|
||||
#define CFG_ENV_SECT_SIZE 0x00020000 /* Size of the Environment Sector */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration
|
||||
*/
|
||||
#define CFG_CACHELINE_SIZE 32
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Internal Definitions
|
||||
*
|
||||
* Boot Flags
|
||||
*/
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||
|
||||
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue
Block a user