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671 Commits

Author SHA1 Message Date
stroese
cd5b2b9941 * Patch by Stefan Roese, 5 Jul 2005:
Update uc100 board PHY setup
2005-07-05 11:35:27 +00:00
wdenk
88804d19e2 * Patch by Detlev Zundel, 30 Jun 2005:
Fix LCD logo for lwmon board which got lost in the merge of 8xx and PXA LCD code
2005-07-04 00:03:16 +00:00
stroese
3c71f3e8aa * Patch by Stefan Roese, 1 Jul 2005:
Fix PHY address for CATcenter board (now correct!)
2005-07-01 15:53:57 +00:00
stroese
bf41886f9d * Patch by Stefan Roese, 30 Jun 2005:
Fix PHY addresses for PPChameleon and CATcenter boards
  Change MAINTAINER for most esd boards
2005-06-30 13:06:07 +00:00
wdenk
342717f72a * Fix baudrate calculation problem on MPC5200 systems
* Add MPC8220 boards to MAKEALL script

* Add EEPROM and RTC support for HMI1001 board

* Patch by Detlev Zundel, 20 Jun 2005:
  Fix initialization of low active GPIO pins on inka4x0 board
2005-06-27 13:30:03 +00:00
wdenk
024447b186 Enable redundant environment, disable HW flash protection of HMI1001 board 2005-06-20 10:28:38 +00:00
wdenk
b2532eff87 * Patch by Travis Sawyer, 10 Jun 2005:
Initialize allocated dev and private hw structures
  after their respective allocation in 440gx_enet.c

* Patch by Steven Scholz, 10 Jun 2005:
  Fix byteorder problems with second argument of "bootm" with
  standalone images;
2005-06-20 10:17:34 +00:00
wdenk
a87589da74 * Add support for HMI1001 board
* Disable "date" and "sntp" commands on TQM866M which has no RTC
2005-06-10 10:00:19 +00:00
wdenk
51152c173d Fix watchdog reset problems on LWMON board 2005-06-05 20:30:43 +00:00
wdenk
ba91e26a19 Patch by Juergen Selent, 17 May 2005:
Add support for Funkwerk VoVPN gateway module.
2005-05-30 23:55:42 +00:00
wdenk
2eab48f511 * Extend burst mode RAM test program to take a loop count
(0 = infinite)

* Use CONFIG_DRIVER_KS8695ETH to enable KS8695 ethernet driver on
  those boards that use it.
2005-05-23 10:49:50 +00:00
wdenk
16b013e750 Patch by Greg Ungerer, 19 May 2005:
add support for the OpenGear CM4008 board
2005-05-19 22:46:33 +00:00
wdenk
121fc64022 Patch by Greg Ungerer, 19 May 2005:
add support for the OpenGear CM4008 board
2005-05-19 22:46:33 +00:00
wdenk
3a574cbe72 * Patch by Greg Ungerer, 19 May 2005:
add support for the KS8695P (ARM 922 based) CPU

* Patch by Steven Scholz, 19 May 2005:
  Add support for CONFIG_SERIAL_TAG on ARM boards
2005-05-19 22:39:42 +00:00
wdenk
7680c140af Add PCI support for Sorcery board.
Code cleanup (especially Sorcery / Alaska / Yukon serial driver).
2005-05-16 15:23:22 +00:00
wdenk
c01766307c Fix compile problems caused by new burst mode SDRAM test;
make port pins to trigger logic analyzer configurable
2005-05-16 14:19:49 +00:00
wdenk
343117bf12 Fix timer handling on MPC85xx systems 2005-05-13 22:49:36 +00:00
wdenk
9dd41a7b0c * Fix debug code in omap5912osk flash driver
* Add support for MPC8247 based "IDS8247" board.
2005-05-12 22:48:09 +00:00
wdenk
d44e14b5fc Add support for 2 x TSEC interfaces on the TQM8540 board. 2005-05-10 15:51:35 +00:00
wdenk
ed16fefcba On LWMON we must use the watchdog to reset the board as the CPU
genereated HRESET pulse is too short to reset the external circuitry.
2005-05-09 10:17:32 +00:00
wdenk
931da93e0f Add test tool to exercise SDRAM accesses in burst mode
(as standalone program, MPC8xx/PowerPC only)
2005-05-07 19:06:32 +00:00
wdenk
412babe304 It's better to handle LZO and LZARI compression mdoes for JFFS2 with
a single #define.
2005-05-05 09:51:44 +00:00
wdenk
60fc6cbbb7 Increase CFG_MONITOR_LEN for Rattler board to match actual code size. 2005-05-05 09:13:21 +00:00
wdenk
07cc099941 Major upate of JFFS2 code; now in sync with snapshot of MTD CVS of
March 13, 2005); new configuration options CONFIG_JFFS2_LZO and
CONFIG_JFFS2_LZARI are added. Both are undefined by default.
2005-05-05 00:04:14 +00:00
wdenk
cf8bc5773c Fix problem with symbolic links in JFFS2 code. 2005-05-04 23:50:54 +00:00
wdenk
a710d4be80 Use linker ASSERT statement to prevent undetected overlapping of
sections on PPChameleon board; other boards might use this, too.
2005-05-04 23:44:59 +00:00
wdenk
90dc67049d README: add explanation about patch policy
net/net.c: fix indentation
2005-05-03 14:12:25 +00:00
stroese
434cf850a4 * Patch by Stefan Roese, 03 May 2005:
Update for P3G4
  Fix problems in cmd_universe.c

* Patch by Matthias Fuchs, 03 May 2005:
  Added missing variable declaration in cmd_nand.c
  Modified CFG_PCI_PTM1MS in configs/PLU405.h to map 128MB ram
2005-05-03 06:19:57 +00:00
stroese
81b83c9ecc * Patch by Matthias Fuchs, 03 May 2005:
Added missing variable declaration in cmd_nand.c
  Modified CFG_PCI_PTM1MS in configs/PLU405.h to map 128MB ram
2005-05-03 06:12:20 +00:00
stroese
dcb2f95a60 * Patch by Stefan Roese, 03 May 2005:
Update for P3G4
  Fix problems in cmd_universe.c
2005-05-03 06:06:41 +00:00
wdenk
9f709b6cee Fix INKA4x0: use CS1 as gpio_wkup_6 output 2005-04-22 15:09:09 +00:00
wdenk
a63109281a Fix bug in the SDRAM initialization code for canmb, IceCube and
PM520 boards.

Fix PHY address for canmb board.
2005-04-21 21:10:22 +00:00
wdenk
7cc1438d43 get rid of obsolete CFG_AT91C_BRGR_DIVISOR definition 2005-04-20 14:38:59 +00:00
wdenk
ec0ca73190 Cleanup serial console baudrate calculation on AT91RM9200 2005-04-20 12:36:05 +00:00
wdenk
b2323ea6f9 Auto-size RAM on canmb board.
Cleanup.
2005-04-20 09:28:54 +00:00
stroese
fddae7b811 * Patch by Matthias Fuchs, 18 Apr 2005:
Make PCI target address spaces on PMC405 and CPCI405 boards
  configurable via environment variables
2005-04-20 06:52:40 +00:00
wdenk
5e5f9ed254 Add support for canmb board 2005-04-13 23:15:10 +00:00
stroese
4c2a366db3 * Patch by Stefan Roese, 13 Apr 2005:
Update for esd apc405
2005-04-13 10:08:39 +00:00
stroese
04e93ec979 Update for esd apc405 2005-04-13 10:06:07 +00:00
wdenk
2a8af18738 * Fixes for TQM8560 board:
- fix clock rates
  - remove debug messages
  - fix flash sector protection

* Patch by Steven Scholz, 07 Apr 2005:
  Fix warning in cpu/arm920t/at91rm9200/i2c.c
2005-04-13 10:02:42 +00:00
wdenk
e694e08a8b Cleanup 2005-04-07 22:41:05 +00:00
wdenk
b77fad3b25 * Patch by Steven Scholz, 07 Apr 2005:
Add i2c_reg_write() and i2c_reg_write() for at91rm9200 I2C

* Patch by Steven Scholz, 07 Apr 2005:
  Fix compiler warning in altera.c

* Patch by Ladislav Michl, 06 Apr 2005:
  Fix voiceblue configuration.
2005-04-07 22:36:40 +00:00
stroese
7ec2550238 * Patch by Stefan Roese, 06 Apr 2005:
Updates for OCOTEA board:
  - Changed U-Boot size from 512kByte to 256kByte
  - Fixed flash driver to support boot from soldered user flash
  - Added README for switch from PIBS firmware to U-Boot
2005-04-07 05:35:12 +00:00
stroese
0a7c5391a0 Add PPC440GX Revision C 2005-04-07 05:33:41 +00:00
stroese
68e0236f7e * Patch by Travis Sawyer, 05 Apr 2005:
- Change timer frequency for ppc 440 from 10 ms to 1 ms.
    Problem found by Andrew Wozniak.
2005-04-07 05:32:44 +00:00
wdenk
a85f9f21aa Patch by Steven Scholz, 06 Apr 2005:
- creating SoC subdir for Atmel AT91RM9200 cpu/arm920t/at91rm9200
- moving code out of cpu/at91rm9200 into cpu/arm920t/at91rm9200
2005-04-06 13:52:31 +00:00
wdenk
20787e23b8 * Patches by Robert Whaley, 29 Nov 2004:
- update the pxa-regs.h file for PXA27x chips
  - add PXA27x based ADSVIX board
  - add support for MMC on PXA27x processors

* Patch by Andrew E. Mileski, 28 Nov 2004:
  Fix PPC4xx SPD SDRAM detection bug

* Patch by Hiroshi Ito, 26 Nov 2004:
  Fix logic of "test -z" and "test -n" commands
2005-04-06 00:04:16 +00:00
wdenk
3c2b3d454d * Patch by Ladislav Michl, 05 Apr 2005:
Add support for VoiceBlue board.

* Patch by Ladislav Michl, 05 Apr 2005:
  Fix netboot_common() prototypes.

* Cleanup.
2005-04-05 23:32:21 +00:00
wdenk
b304c96871 Patches by Steven Scholz, 05 Apr 2005:
- Use i.MX watchdog timer for reset_cpu()
- Move reset_cpu() out of cpu/arm920t/start.S into the SoC specific
  subdirectories cpu/arm920t/imx/ and cpu/arm920t/s3c24x0/
  (now in interupts.c)
2005-04-05 22:30:50 +00:00
wdenk
12b43d515c Add support for MPC8220 based "sorcery" board. 2005-04-05 21:57:18 +00:00
wdenk
f5c5ef4a1f Add support for TQM8560 board 2005-04-05 16:26:47 +00:00
wdenk
3dd7f0f0ca * Add FEC support for TQM8540 board.
Interfaces are named as follows: "ENET1" - TSEC2, "ENET2" - FEC

* Patch by Martin Krause, 04 Apr 2005:
  Update default configuration for CMC_PU2 board.
2005-04-04 23:43:44 +00:00
wdenk
8aa1a2d115 Patch by Steven Scholz, 4 Apr 2005:
- remove all references to CONFIG_INIT_CRITICAL for ARM based boards
- introduce two new configuration options instead:
  CONFIG_SKIP_LOWLEVEL_INIT and CONFIG_SKIP_RELOCATE_UBOOT
2005-04-04 12:44:11 +00:00
wdenk
986ef4340e Use the same name (lowlevel_init) for all (ARM) boards 2005-04-04 12:36:04 +00:00
wdenk
ba83a30765 Patch by Steven Scholz, 04 Apr 2005:
Make sure that MDIO clock does not exceed 2.5 MHz on AT91
2005-04-04 12:23:03 +00:00
wdenk
101e8dfa2a Fix timer code for ARM systems: make sure that udelay() does not
reset timers so it's save to use udelay() in timeout code.
2005-04-04 12:08:28 +00:00
wdenk
50712ba16e * Patch by Mathias Kster, 23 Nov 2004:
add udelay support for the mcf5282 cpu

* Patch by Tolunay Orkun, 16 November 2004:
  fix incorrect onboard Xilinx CPLD base address
2005-04-03 23:35:57 +00:00
wdenk
901787d6e8 Patch by Jerry Van Baren, 08 Nov 2004:
- Add low-boot option for MPC8260ADS board (if lowboot is selected,
  the jumper for the HRCW source should select flash. If lowboot is
  not selected, the jumper for the HRCW source should select the
  BCSR.
- change default load base address to 0x00400000
2005-04-03 23:22:21 +00:00
wdenk
8b0bfc6804 * Patch by Yuli Barcohen, 08 Nov 2004:
Add support for Analogue & Micro Rattler boards.
  Tested on Rattler8248.

* Patch by Andre Renaud, 08 Nov 2004:
  Fix watchdog support in common/lcd.c

* Patch by Marc Leeman, 05 Nov 2003:
  Enable all 4 PCMBRW buffers for the MPC8245 processor since the CPU
  bug only affects the XPC8245 processors
2005-04-03 23:11:38 +00:00
wdenk
384cc68744 Patches by Josef Wagner, 29 Oct 2004:
- Add support for MicroSys CPU87 board
- Add support for MicroSys PM854 board
2005-04-03 22:35:21 +00:00
wdenk
c1a11c19ec * Patch by Scott McNutt, 01 Nov 2004:
Add missing NIOS/NIOS2 support for "iminfo" command

* Patch by Detlev Zundel, 29 Oct 2004:
  Add missing NIOS/NIOS2 support for "mkimage" tool.
2005-04-03 21:11:16 +00:00
wdenk
6315349202 Patch by David Adair, 27 Oct 2004:
Add missing 440GX SDRAM Controller reset
2005-04-03 20:55:38 +00:00
wdenk
3ec924a3cb Patch by Steven Scholz, 25 Oct 2004:
Declare reset_cpu() in include/common.h instead locally
2005-04-03 17:23:39 +00:00
wdenk
756f586a73 * Patch by Yusdi Santoso, 22 Oct 2004:
- Add support for HIDDEN_DRAGON board
  - fix endianess problem in driver/rtl1839.c

* Patch by Allen Curtis, 21 Oct 2004:
  support multiple serial ports
2005-04-03 15:51:42 +00:00
wdenk
b1bf6f2c9b * Patch by Richard Klingler, 03 Apr 2005:
Add call to eth_halt() in net/net.c when called functions fail
  after eth_init() has been called.

* Patch by Sam Song, 3 April 2005:
  - Update README.Netconsole
  - Update README
2005-04-03 14:52:59 +00:00
wdenk
86c9888207 Patch by Steven Scholz, 03 Apr 2005:
- create SoC specific directories include/asm-arm/arch-imx and
  include/asm-arm/arch-s3c24x0
2005-04-03 14:26:46 +00:00
wdenk
59acc296d9 Minor cleanup 2005-04-03 14:18:51 +00:00
wdenk
400558b561 Prepare for SoC rework of ARM code:
- rename CONFIG_BOOTBINFUNC into  CONFIG_INIT_CRITICAL
- rename memsetup into lowlevel_init (function name and source files)
2005-04-02 23:52:25 +00:00
wdenk
414eec35e3 Fix problems with SNTP support;
enable SNTP support in some boards.
2005-04-02 22:37:54 +00:00
wdenk
be6b6e4e2d Patch by Martin Krause, 01 Apr 2005:
Add automatic HW detection for CMC_PU2 and CMC_BASIC
2005-04-01 15:18:44 +00:00
wdenk
e6ba3c92ce Patch by Martin Krause, 01 Apr 2005:
Fix flash erase timeout on CMC_PU2
2005-04-01 09:29:14 +00:00
wdenk
f50cc09b61 Patch by Steven Scholz, 13 March 2005:
fix cache enabling for AT91RM9200
2005-04-01 09:14:58 +00:00
wdenk
ea287debe1 * Patch by Masami Komiya, 30 Mar 2005:
add SNTP support and expand time server and time offset fields of
  DHCP support. See doc/README.SNTP

* Patch by Steven Scholz, 13 Dec 2004:
  Fix bug in at91rm920 ethernet driver
2005-04-01 00:25:43 +00:00
wdenk
ef2807c667 Patch by Steven Scholz, 13 Dec 2004:
Remove duplicated code by merging memsetup.S files for
at91rm9200 boards into one cpu/at91rm9200/lowlevel.S
2005-03-31 23:44:33 +00:00
wdenk
83e40ba75d * Patch by Detlev Zundel, 31 Mar 2005:
Cleanup duplicate definition of overwrite_console()

* Update TQM5200 configuration;
  prepare for Rev. 200 starter kit boards
2005-03-31 18:42:15 +00:00
wdenk
0c1c117cf1 * Patch by Scott McNutt, 21 Oct 2004:
Add support for Nios-II EPCS Controller core.

* Patch by Scott McNutt, 20 Oct 2004:
  Nios-II cleanups:
  - Add sysid command (Nios-II only).
  - Locate default exception trampoline at proper offset.
  - Implement I/O routines (readb, writeb, etc)
  - Implement do_bootm_linux
2005-03-30 23:28:18 +00:00
wdenk
8f0b7cbe80 Patches by Martin Krause, 22 Mar 2005:
- use TQM5200_auto as MAKEALL target for TQM5200 systems
- add support for SM501 graphics controller
- add support for graphic console on TQM5200
- add support for TQM5200 Rev 200
- cleanup, fix typo in include/configs/TQM5200.h
2005-03-27 23:41:39 +00:00
wdenk
256d31c046 Patch by Manfred Baral, 17 Mar 2005:
Fix typo
2005-03-20 22:33:46 +00:00
wdenk
e632515387 * Fix RTC configuration for PPChameleon board
* Cleanup, fix typo in include/configs/TQM5200.h
2005-03-17 16:43:10 +00:00
stroese
4d00eb0290 Update for esd auto_update and hh405 board 2005-03-17 15:41:17 +00:00
stroese
acdcd10c9a Update for esd auto_update and hh405 board 2005-03-16 20:58:31 +00:00
wdenk
89c02e2c57 Adapt for U-Boot image size (new features enabled) on TQM5200 2005-03-16 16:32:26 +00:00
wdenk
6c9e789e9e Update code for TQM8540 board (and 85xx in general):
- Change the name of the Ethernet driver: MOTO ENET -> ENET
- Reformat boot messages
- Enable redundant environment
- Replace the -O2 optimization flag with -mno-string
2005-03-15 22:56:53 +00:00
wdenk
911d08f6ae Tune TQM8540 default configuration. 2005-03-15 00:26:31 +00:00
wdenk
bf7019c570 Add TQM8540 to MAKEALL lists 2005-03-15 00:03:03 +00:00
wdenk
9d46ea4a55 * Patch by David Brownell, 10 Mar 2005:
Restore copyright statements in OHCI drivers.

* Add support for TQM8540 board
2005-03-14 23:56:42 +00:00
wdenk
c3fafecff1 Patch by Detlev Zundel, 14 Mar 2005:
NC650: changed NAND flash addressing to using UPMB
2005-03-14 23:01:03 +00:00
wdenk
a0bdf49e39 INKA4x0: Allow initialization of LCD backlight dimming from
"brightness" environment variable.
2005-03-14 13:14:58 +00:00
stroese
e9684a536a Update for esd voh405 fpga image 2005-03-14 12:56:21 +00:00
wdenk
f4733a0764 Add port initialization for digital I/O on INKA4x0 2005-03-06 01:21:30 +00:00
wdenk
b05dcb58fe * Fix get_partition_info() parameter error in all other calls
(common/cmd_ide.c, common/cmd_reiser.c, common/cmd_scsi.c).

* Enable USB and IDE support for INKA4x0 board

* Patch by Andrew Dyer, 28 February 2005:
  fix ext2load passing an incorrect pointer to get_partition_info()
  resulting in load failure for devices other than 0
2005-03-04 11:27:31 +00:00
stroese
47b1e3d77f Update for esd boards dp405 and hub405 2005-03-01 17:26:39 +00:00
wdenk
e58cf2a0cf Add support for SRAM and 2 x Quad UARTs on INKA4x0 board 2005-02-27 23:46:58 +00:00
wdenk
1968e615d4 Cleanup USB and partition defines 2005-02-24 23:23:29 +00:00
wdenk
151ab83a93 * Add support for ext2 filesystems and image timestamps to TQM5200 board
* Add reset code for Coral-P on INKA4x0 board

* Patch by Martin Krause, 28 Jun 2004:
  Update for TRAB board.

* Fix some missing "volatile"s in MPC5xxx FEC driver
2005-02-24 22:44:16 +00:00
wdenk
b9649854f6 Fix yet another recently introduced bug. 2005-02-08 15:29:01 +00:00
wdenk
e799d3755e Fix cirrus voltage detection (for CPC45) 2005-02-07 19:44:17 +00:00
wdenk
2f916943c9 Fix for incomplete byteorder fix in cmd_scsi.c and cmd_usb.c 2005-02-04 21:33:05 +00:00
wdenk
f8883cb101 Fix byteorder problem in usbboot and scsiboot commands. 2005-02-04 15:38:08 +00:00
wdenk
20a80418f9 * Patch by Cajus Hahn, 04 Feb 2005:
- don't insist on leading '/' for filename in ext2load
  - set default partition to useful value (1) in ext2load

* Patch by Andrew Dyer, 08 Jan 2005:
  fix wrong return codes in ext2 code
2005-02-04 15:02:06 +00:00
wdenk
1a344f298d * Removed '--no-warn-mismatch' option from Makefile. This option
makes 'ld' to overlook binary objects compatibility.

* Moved $(PLATFORM_LIBS) from the library group (--start-group ...
  --end-group) outside of the group. This will make 'ld' to do
  _multiple_ search in the library group when resolving symbol
  references and do only a _single_ seach in libgcc.a after the group
  search.

* Fix stability problems on CPC45 board again.

* Make image detection for diskboot / usbboot / scsiboot more robust
  (also check header checksum)
2005-02-03 23:00:49 +00:00
wdenk
436be29cad * Update CPC45 board configuration.
* Add USB and PCI support for INKA4x0 board
2005-01-31 22:09:11 +00:00
wdenk
cd172b7108 Fix IDE stability problems on CPC45 board. 2005-01-22 18:26:04 +00:00
wdenk
c3d2b4b48a Code cleanup. 2005-01-22 18:13:04 +00:00
wdenk
5a95f6fbd2 * Patch by Robin Getz, 13 Oct 2004:
Add standalone application to change SMC91C111 MAC addresses,
  see examples/README.smc91111_eeprom

* Patch by Xiaogeng (Shawn) Jin, 12 Oct 2004:
  Fix Flash support for ARM Integrator CP.
2005-01-12 00:38:03 +00:00
wdenk
289f932c5f * Some Cleanup.
* Patch by Richard Woodruff, 10 Jan 2005:
  Update support for OMAP2420 (ARM11) and H4 board:
  o clean up and add new types to H4 memory probe code.
  o fix to work with internal boot.
  o added PRCM config III operation.
  o fix marginal flash timings.
  o add revison ATAG usage.
  o enable voltage scaling at power chip.
  o fix compile error for i2c.

* Fix network problem (error when receiving multiple ARP packets)
2005-01-12 00:15:14 +00:00
wdenk
082acfd484 Coding Style cleanup 2005-01-10 00:01:04 +00:00
wdenk
652a10c096 * Patch by Daniel Poirot, 10 Oct 2004:
Add support for Wind River sbc405 board

* Patch by Rainer Brestan, 12 Oct 2004:
  Make examples/Makefile more robust
2005-01-09 23:48:14 +00:00
wdenk
6225c5db6c * Patch by Sam Song, 11 October 2004:
- Add RESET/PREBOOT/AUTOBOOT support for RPXlite_DW board
  - Adjust CPU:BUS frequency ratio 1:1 when core frequency
    less than 50MHz

* Patch by Sam Song, 10 Oct 2004:
  Fix a parameter error in run_command() in main.c
2005-01-09 23:33:49 +00:00
wdenk
8ed9604613 * Patches by Richard Woodruff, 01 Oct 2004:
add support for the TI OMAP2420 processor and its H4 reference
  board

* Patch by Christian Pellegrin, 24 Sep 2004:
  Added support for NE2000 compatible (DP8390, DP83902) NICs.
2005-01-09 23:16:25 +00:00
wdenk
ff36fd8591 * Patch by Leif Lindholm, 23 Sep 2004:
add support for the AMD db1550 board

* Patch by Travis Sawyer, 15 Sep 2004:
  Add CONFIG_SERIAL_MULTI support for ppc4xx,
  update README.serial_multi
2005-01-09 22:28:56 +00:00
wdenk
6310eb9da7 Patches by David Snowdon, 07 Sep 2004:
- add u-boot.hex target in the top level Makefile
- add support for the UNSW/NICTA PLEB 2 board (pleb2)
- use -mtune=xscale and -march=armv5 options for PXA
2005-01-09 21:28:15 +00:00
wdenk
a562e1bd9d Patch by Florian Schlote, 08 Sep 2004:
Add support for SenTec-COBRA5272-board (Coldfire).
2005-01-09 18:21:42 +00:00
wdenk
30ce5ab043 * Patch by Gleb Natapov, 07 Sep 2004:
mpc824x: set PCI latency timer to a sane value
  (is 0 after reset).

* Patch by Kurt Stremerch, 03 Sep 2004:
  Add bitstream configuration option for fpga command (Xilinx only).
2005-01-09 18:12:51 +00:00
wdenk
9dd611b8c1 * Patch by Kurt Stremerch, 03 Sep 2004:
Add Xilinx Spartan2E family FPGA support

* Patch by Jeff Angielski, 02 Sep 2004:
  Add Added support for H2 revision of the EP8260 board.
  Fixed formatting for some of the EP8260 related source files.
2005-01-09 17:19:34 +00:00
wdenk
a1191902ca * Patch by Jon Loeliger, 02 Sep 2004:
Reset monitor size back to 256 so environment can be written
  to flash on MPC85xx ADS and CDS releases.

* Patch by Paolo Broggini, 02 Sep 2004:
  Make BSS clearing on ARM systems more robust

* Patch by Yue Hu and Joe, 01 Sep 2004:
  - add PCI support for ixp425;
  - add EEPRO100 suppor tfor ixdp425 board.

* Fix problem with protected sector detection in driver/cfi_flash.c
2005-01-09 17:12:27 +00:00
wdenk
15c7a8efd2 Release U-Boot 1.1.2 2005-01-02 17:02:54 +00:00
wdenk
e2ffd59b4d * Code cleanup, mostly for GCC-3.3.x
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
  pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
  additional ethernet addresses.

* Cleanup drivers/i82365.c - avoid duplication of code

* Fix bogus "cannot span across banks" flash error message

* Add support for CompactFlash for the CPC45 Board.
2004-12-31 09:32:47 +00:00
wdenk
400ab719c6 Fix problems with CMC_PU2 flash driver. 2004-12-20 11:18:07 +00:00
wdenk
08f272787a * Fix problems with CMC_PU2 flash driver.
* Adjust INKA 4x0 default settings
2004-12-19 21:39:27 +00:00
wdenk
bff96b0e6b Renamed UC100 => uc100 2004-12-19 10:09:07 +00:00
wdenk
ec0aee7b68 Cleanup: avoid trigraph warning in fs/ext2/ext2fs.c; rename UC100 -> uc100 2004-12-19 09:58:11 +00:00
wdenk
f7d1572bf5 Add support for UC100 board 2004-12-18 22:35:43 +00:00
stroese
8e6b47a89b One more code cleanup. 2004-12-17 09:13:49 +00:00
wdenk
efe2a4d5cf Code cleanup. 2004-12-16 21:44:03 +00:00
stroese
bea8e84b52 PCI405 board update 2004-12-16 19:10:22 +00:00
stroese
917b8cc41c AR405 board update 2004-12-16 19:00:32 +00:00
stroese
8cba1907b8 Patch by Stefan Roese, 16 Dez 2004 2004-12-16 18:47:58 +00:00
stroese
7b46664147 CONFIG_MX_CYCLIC description added 2004-12-16 18:46:55 +00:00
stroese
c419d1d6d0 some new esd boards added 2004-12-16 18:44:40 +00:00
stroese
0621f6f9d3 esd common update 2004-12-16 18:43:13 +00:00
stroese
cd5396fa12 VOH405 board update 2004-12-16 18:41:27 +00:00
stroese
4510a7b736 PMC405 board update 2004-12-16 18:40:02 +00:00
stroese
12537cc5a9 PLU405 board update 2004-12-16 18:39:03 +00:00
stroese
c2642d14c9 PCI405 board update 2004-12-16 18:38:22 +00:00
stroese
25215ee2b0 OCRTC board update 2004-12-16 18:37:41 +00:00
stroese
31193c2cca HUB405 board update 2004-12-16 18:37:08 +00:00
stroese
ab379df353 DU405 board update 2004-12-16 18:36:28 +00:00
stroese
f2dfe44fd6 DP405 board update 2004-12-16 18:35:58 +00:00
stroese
20aacbf018 CPCIISER4 board update 2004-12-16 18:35:14 +00:00
stroese
7acd6c2168 CPCI440 board update 2004-12-16 18:34:28 +00:00
stroese
c491b442cc CANBT board update 2004-12-16 18:33:45 +00:00
stroese
86cf82e07f ASH405 board update 2004-12-16 18:33:12 +00:00
stroese
8d3efe4e9a AR405 board update 2004-12-16 18:30:36 +00:00
stroese
e399e4c670 ADCIOP board update 2004-12-16 18:27:51 +00:00
stroese
87663b1cbc CPCI405 board update 2004-12-16 18:27:05 +00:00
stroese
6cfb1f0da6 WUH405 board support added 2004-12-16 18:25:40 +00:00
stroese
809ac5e7b0 VOM405 board support added 2004-12-16 18:24:54 +00:00
stroese
8d8f894b51 TASREG board support added 2004-12-16 18:24:06 +00:00
stroese
1f54ce6df8 HH405 board support added 2004-12-16 18:23:14 +00:00
stroese
771e05be07 CPCI750 board support added 2004-12-16 18:21:17 +00:00
stroese
1bc0f14143 APC405 board support added 2004-12-16 18:20:14 +00:00
stroese
aee2fa27d9 G2000 board support added 2004-12-16 18:17:50 +00:00
stroese
5e746fce05 PMC405 board support added 2004-12-16 18:15:52 +00:00
stroese
b39392a98b CPU speed calculation updated (fixed a rounding problem) 2004-12-16 18:13:53 +00:00
stroese
0912e483eb CPCI750 board support added 2004-12-16 18:10:54 +00:00
stroese
8c725b9364 Coldfire MCF5249 support added 2004-12-16 18:09:49 +00:00
stroese
a20b27a36b esd config files updated 2004-12-16 18:05:42 +00:00
stroese
44acc8d334 new 405ep defines added 2004-12-16 18:03:44 +00:00
stroese
4d535b51e1 new SST and EXCEL devices add 2004-12-16 18:01:48 +00:00
stroese
3d936fd992 - ext2fs support added
- Tundra universe support added
2004-12-16 17:59:53 +00:00
stroese
20cc00ddac "static" from "do_fat_read" removed 2004-12-16 17:57:26 +00:00
stroese
cd42deebd2 Coldfire MCF5249 support added 2004-12-16 17:56:09 +00:00
stroese
e2c22d780e I2C added 2004-12-16 17:55:22 +00:00
stroese
b7eaad8134 use same spacing for "NAND:" puts 2004-12-16 17:53:17 +00:00
stroese
946c2185dd CPCI750 board support added 2004-12-16 17:49:38 +00:00
stroese
6bb992ba9d added CONFIG_PCI_CONFIG_HOST_BRIDGE to enable host bridge configuration 2004-12-16 17:48:41 +00:00
stroese
a842a6d23c added ".i" same as ".jffs2s" for compatibility with older units (CFG_NAND_SKIP_BAD_DOT_I) 2004-12-16 17:45:46 +00:00
stroese
4aaf29b2f5 memory commands "mdc" and "mwc" added for cyclic read/write 2004-12-16 17:42:39 +00:00
stroese
fa838874cf remove "static" from "ide_dev_desc" to use it from external code 2004-12-16 17:40:30 +00:00
stroese
1cdf5d92cf code cleanup: use CFG_VXWORKS_MAC_PTR instead of multiple board defines 2004-12-16 17:37:54 +00:00
stroese
1740618202 - ext2fs support added
- Tundra universe support added
2004-12-16 17:35:57 +00:00
stroese
256e4be814 Tundra universe support added 2004-12-16 17:33:38 +00:00
stroese
bcd0be5cf1 ext2fs support added 2004-12-16 17:33:10 +00:00
stroese
2b9187127f ext2fs support added 2004-12-16 17:26:24 +00:00
wdenk
138ff60c1e Add support for INKA4X0 board 2004-12-16 15:52:40 +00:00
wdenk
45ea3fca4a Cleanup for CMC_PU2 board 2004-12-14 23:28:24 +00:00
wdenk
96085e347d Fix problem introduced by previous patch. 2004-12-13 09:49:01 +00:00
wdenk
689aec1b05 Patch by Steven Scholz, 12 Dec 2004:
Fix typo in AT91 memory setup.
2004-12-13 00:18:44 +00:00
wdenk
7e6bf358d8 Patch by Martin Krause, 27 Oct 2004:
- add support for "STK52xx" board (including PS/2 multiplexer)
- add hardware detection for TQM5200
2004-12-12 22:06:17 +00:00
wdenk
25d6712a81 * Clean up CMC PU2 flash driver
* Update MAINTAINERS file

* Fix bug in MPC823 LCD driver
2004-12-10 11:40:40 +00:00
wdenk
ed54e62125 * Fix udelay() on AT91RM9200 for delays < 1 ms.
* Enable long help on CMC PU2 board;
  fix reset issue;
  increase CPU speed from 179 to 207 MHz.
2004-11-24 23:35:19 +00:00
wdenk
bb310d462b Fix smc91111 ethernet driver for Xaeniax board (need to handle
unaligned tail part specially).
2004-11-22 22:20:07 +00:00
wdenk
9d5028c2f7 * Update for AT91RM9200DK and CMC_PU2 boards:
- Enable booting directly from flash
  - fix CMC_PU2 flash driver

* Fix mkimage usage message
2004-11-21 00:06:33 +00:00
wdenk
cacfab588a Map SRAM on NC650 board 2004-11-17 20:44:20 +00:00
wdenk
1f6d4258c2 Work around for Ethernet problems on Xaeniax board 2004-11-02 13:00:33 +00:00
wdenk
983fda8391 Patch by TsiChung Liew, 23 Sep 2004:
- add support for MPC8220 CPU
- Add support for Alaska and Yukon boards
2004-10-28 00:09:35 +00:00
wdenk
e3c9b9f928 * Fix configuration for ERIC board (needs more room)
* Adjust MIPS compiler options at run-time depending on tools version
  ("-march=4kc -mtune=4kc -Wa,-mips_allow_branch_to_undefined" for new,
  "-mcpu=4kc" for old tools)
2004-10-24 23:54:40 +00:00
wdenk
14699a22cf Add passing of the command line and memory size information to the
kernel on xaeniax board.
2004-10-19 22:17:51 +00:00
wdenk
e86e5a0748 Code cleanup for GCC-3.3.x compilers 2004-10-17 21:12:06 +00:00
wdenk
8b74bf31fe Cleanup 2004-10-11 23:10:30 +00:00
wdenk
4cfaf55e5c * Enable NAND flash support for NC650 board.
* Patch by Thomas Lange 07 Oct 2004:
  Updated README for DBAu1x00 boards to match current status
2004-10-11 23:03:10 +00:00
wdenk
d407bf52b5 * Patch by Philippe Robin, 28 Sept 2004:
Fix Flash support for Versatile.

* Patch by Roger Blofeld, 16 Sep 2004:
  Fix timeout for DHCP command retry
2004-10-11 22:51:13 +00:00
wdenk
2ee665339b * Patch by Pantelis Antoniou, 14 Sep 2004:
Fix early serial hang when CONFIG_SERIAL_MULTI is defined.

* Patch by Pantelis Antoniou, 14 Sep 2004:
  Kick watchdog when bz-decompressing
2004-10-11 22:43:02 +00:00
wdenk
9455b7f39c Fix CFG_HZ problems on AT91RM9200 systems
[Remember: CFG_HZ should be 1000 on ALL systems!]
2004-10-11 22:25:49 +00:00
wdenk
e1599e83d6 * Patch by Gridish Shlomi, 30 Aug 2004:
- Add support to revA version of PQ27 and PQ27E.
  - Reverted MPC8260ADS baudrate back to original 115200

* Patch by Hojin, 17 Sep 2004:
  Fix typo in cfi_flash.c

* Patch by Mark Jonas, 09 September 2004:
  mtest's data line test (with CFG_ALT_MEMTEST set) returned a wrong
  error message

* Patch by Mark Jonas, 31 August 2004:
  Added option CFG_XLB_PIPELINING to enable XLB pipelining. This
  improves FTP performance for MPC5200 systems. Enabled for IceCube
  by default.
2004-10-10 23:27:33 +00:00
wdenk
c15f3120ec * Patch by Michael Bendzick, 30 Aug 2004:
- Improve platform.S code for omap1510inn that detects whether code
    is running from SDRAM or not. Patch allows SDRAM to be configured
    if code is running out of SRAM at 0x20000000.

* Patch by Frederick Klatt, 30 Aug 2004:
  Add support for the Wind River SBC8540/SBC8560 boards
2004-10-10 22:44:24 +00:00
wdenk
656658dd15 * Configure SX1 board to use drivers/cfi_flash.c
* Patches by Michael Bendzick, 30 Aug 2004:
  - Configure omap1510inn board to use drivers/cfi_flash.c
  - Make drivers/cfi_flash.c protect environment and redundant
    environment.

* Patch by Steven Scholz, 23 Jun 2004:
  - Add script (tools/img2brec.sh) to programm U-Boot into
    (Synch)Flash using the Bootstrap Mode of the MC9328MX1/L
2004-10-10 22:16:06 +00:00
wdenk
5c952cf024 Patches by Scott McNutt, 24 Aug 2004:
- Add support for Altera Nios-II processors.
- Add support for Psyent PCI-5441 board.
- Add support for Psyent PK1C20 board.
2004-10-10 21:27:30 +00:00
wdenk
03f5c55021 Patches by Jon Loeliger, 24 Aug 2004:
- Add support for the MPC8541 and MPC8555 CDS boards
- Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
2004-10-10 21:21:55 +00:00
wdenk
cf33678e51 * Patch by Jon Loeliger, 24 Aug 2004:
- Fix PCI window on MPC85xx; remove unneeded PCI initialization
    from board_early_init_f()
  - Provide SW workaround for PCI initialization on 85xx CDS
  - Convert MPC85xxADS to use common CFI flash driver

* Cleanup: avoid compiler warnings

* Add CMC PU2 board to MAKEALL script
2004-10-10 20:23:57 +00:00
wdenk
08b6aa6154 Patches by George G. Davis, 24 Aug 2004:
- Enable ramdisk/initrd tagged param support for omap1610h2_config
- Remove static network setup defaults from mx1ads_config
2004-10-10 18:49:14 +00:00
wdenk
731215ebde Patch by George G. Davis, 24 Aug 2004:
- update ARM boards to use constants from mach-types.h
2004-10-10 18:41:04 +00:00
wdenk
b65085130a Code Cleanup
Patch by Gary Jennejohn, 04 Oct 2004:
- fix I2C on at91rm9200
- add support for Ricoh RS5C372A RTC
2004-10-10 18:03:33 +00:00
wdenk
2cbe571a56 * Patch by Gary Jennejohn, 01 Oct 2004:
- add support for CMC PU2 board
  - add support for I2C on at91rm9200

* Patch by Gary Jennejohn, 28 Sep 2004:
  fix baudrate handling on at91rm9200
2004-10-10 17:05:18 +00:00
wdenk
659883c298 Patch by Yuli Barcohen, 22 Aug 2004:
- remove ZPC.1900 board-specific flash driver;
  switch the port to generic CFI driver;
- port clean-up
2004-10-09 23:33:42 +00:00
wdenk
f325e18beb Patch by Hinko Kocevar, 21 Aug 2004:
Add calc_fbsize() function used with VIDEOLFB_TAG on TRAB
2004-10-09 23:28:40 +00:00
wdenk
8655b6f860 * Clean up tools/bmp_logo.c to not add trailing white space
* Patch by Hinko Kocevar, 21 Aug 2004:
  - Group common framebuffer functions in common/lcd.c
  - Group common framebuffer macros and #defines in include/lcd.h
  - Provide calc_fbsize() for video ATAG
2004-10-09 23:25:58 +00:00
wdenk
30d56fae23 Patch by Sam Song, 21 August 2004:
- Fix a typo in README
- Align "(RO)" output for "flinfo" after "protect on"
- Add RESET support for RPXlite_DW board; adjust CPU:BUS frequency
  ratio 1:1 when core frequency less than 50MHz
2004-10-09 22:44:59 +00:00
wdenk
63cfcbb4e2 Patches by himba, 21 Aug 2004:
- fix some "use of label at end of compound statement" warnings
- Define type of LCD panel on lubbock board if CONFIG_LCD is used
2004-10-09 22:32:26 +00:00
wdenk
1d9f410500 Patch by Steven Scholz, 16 Aug 2004:
- Introducing the concept of SoCs "./cpu/$(CPU)/$(SOC)"
- creating subdirs for SoCs ./cpu/arm920t/imx and ./cpu/arm920t/s3c24x0
- moving SoC specific code out of cpu/arm920t/ into cpu/arm920t/$(SOC)/
- moving drivers/s3c24x0_i2c.c and drivers/serial_imx.c out of drivers/
  into cpu/arm920t/$(SOC)/
2004-10-09 22:21:29 +00:00
wdenk
3e01d75ff2 Patch by Andreas Engel, 16 Aug 2004:
parameter type cleanup for NetSetTimeout()
2004-10-09 21:56:21 +00:00
wdenk
a5bbcc3c53 * Patches by Sean Chang, 09 Aug 2004:
- Added support for both 8 and 16 bit mode access to System ACE CF
    through MPU.
  - Fixed missing System ACE CF device during get FAT partition info
    in fat_register_device function.
  - Enabled System ACE CF support on ML300.

* Patch by Sean Chang, 09 Aug 2004:
  Synch defines for saveenv and do_saveenv functions so they get
  compiled under the same statement.
2004-09-29 22:55:14 +00:00
wdenk
a06752e36b * Patch by Sean Chang, 9 Aug 2004:
- Added I2C support for ML300.
  - Added support for ML300 to read out its environment information
    stored on the EEPROM.
  - Added support to use board specific parameters as part of
    U-Boot's environment information.
  - Updated MLD files to support configuration for new features
    above.

* Patches by Travis Sawyer, 5 Aug 2004:
  - Remove incorrect bridge settings for eth group 6
  - Add call to setup bridge in ppc_440x_eth_initialize
  - Fix ppc_440x_eth_init to reset the phy only if its the
    first time through, otherwise, just check the phy for the
    autonegotiated speed/duplex.  This allows the use of netconsole
  - only print the speed/duplex the first time the phy is reset.
2004-09-29 22:43:59 +00:00
wdenk
da93ed8147 * Patch by Shlomo Kut, 29 Mar 2004:
Add support for MKS Instruments "Quantum" board

* Fix build problem with Cogent boards;
  avoid using <asm/byteorder.h> when using the host compiler
2004-09-29 11:02:56 +00:00
wdenk
a5725fabc0 * Patch by Ganapathi C, 04 Aug 2004:
Fix NFS timeout issue
2004-09-28 21:51:42 +00:00
wdenk
e1a3f6b39b * Patch by Yuli Barcohen, 19 Jul 2004:
- Fix host tools building in Cygwin environment
  - Fix header files search order for host tools

* Patch by Tom Armistead, 19 Jul 2004:
  Fix kgdb.S support for 74xx_75x cpu
2004-09-28 21:39:45 +00:00
wdenk
c65fdc74aa * Patch by Jon Loeliger, 15 Jul 2004:
Fix MPC85xx I2C driver
2004-09-28 21:26:26 +00:00
wdenk
64f70bede3 Fix problems with CDROM drive as slave device on Lite5200 IDE bus. 2004-09-28 20:34:50 +00:00
wdenk
cce625e557 * Patch by Stephen Williams, 15 July 2004
Set the PCI class code for JSE board as part of PCI interface setup

* Patch by Michael Bendzick, 15 Jul 2004:
  Fix problem with writes with odd sizes in drivers/cfi_flash.c when
  CFG_FLASH_USE_BUFFER_WRITE is set
2004-09-28 19:00:19 +00:00
wdenk
66ca92a5ba * Patch by Yuli Barcohen, 13 Jul 2004:
Allow clock setting on MPC866/MPC885 series chips according to
  environment variable `cpuclk'

* Patch by Yuli Barcohen, 20 Apr 2004:
  Remove unnecessary redefine of CPM_DATAONLY_SIZE for MPC826x
2004-09-28 17:59:53 +00:00
wdenk
4ec3a7f0fd Patch by Vincent Dubey, 24 Sep 2004:
Add support for xaeniax board
2004-09-28 16:44:41 +00:00
wdenk
79536a6eb0 * Add comment about non-GPL character of standalone applications to
COPYING file

* Fix FEC ethernet problem on NSCU board.
2004-09-27 20:20:11 +00:00
wdenk
4734cb78d8 Patch by Gary Jennejohn, 09 Sep 2004:
allow to use USART1 as console port on at91rm9200dk boards
2004-09-21 23:33:32 +00:00
wdenk
a9c37d561d Fix [noeol] problem in board/esd/ar405/fpgadata_xl30.c 2004-09-16 12:57:35 +00:00
stroese
c354839349 Patch by Stefan Roese, 16 Sep 2004 2004-09-16 12:37:13 +00:00
stroese
8b1ccd8693 Update AR405 board. 2004-09-16 12:34:51 +00:00
stroese
e623a1a394 esd misc file esd common routines added. 2004-09-16 12:33:54 +00:00
wdenk
1d6f97209e Fix SysClk handling for PPChameleon and CATcenter boards 2004-09-09 17:44:35 +00:00
wdenk
eedcd078fe * Patch by Detlev Zundel, 08 Sep 2004:
Update etags build target

* Improve NetConsole support: add support for broadcast destination
  address and buffered input.

* Cleanup compiler warnings for GCC 3.3.x and later

* Fix problem in cmd_jffs2.c introduced by CFG_JFFS_SINGLE_PART patch
2004-09-08 22:03:11 +00:00
wdenk
7ca202f566 Add support for IDS "NC650" board 2004-08-28 22:45:57 +00:00
wdenk
31a649234e * Add automatic update support for LWMON board
* Enable MSDOS/VFAT filesystem support for LWMON board

* Clear Block Lock-Bits when erasing flash on LWMON board.

* Fix return code of "fatload" command

* Disable debugging for TQM5200 board
2004-08-28 21:09:14 +00:00
wdenk
89394047ba * Patch by Martin Krause, 03 Aug 2004:
change timing for SM501 graphics controller on TQM5200 module

* Patch by Mark Jonas, 13 July 2004:
  - Total5200 LCD now run in little endian mode. Endianess conversion
    is done in hardware.
  - Removed last reference to "console" environment variable.
2004-08-04 21:56:49 +00:00
wdenk
429168ea88 Patches by Lars Munch, 12 Jul 2004:
- move at45.c to board/at91rm9200dk/ since this is at91rm9200dk
  board specific
- split out the LXT971A PHY from ns_9750_eth.h
- split the dm9161 phy part out of at91rm9200_ether.c
2004-08-02 23:39:03 +00:00
wdenk
6705d81e90 * Patch by Andreas Engel, 12 Jul 2004:
Replaced hardcoded PL011 clock frequency with config variable.
  Fixed wrong CONFIG_CMD_DFL doc.

* Patch by Thomas Viehweger, 09 Jun 2004:
  make it possible to remove chpart when there is only one partition
2004-08-02 23:22:59 +00:00
wdenk
68ceb29e71 Add support for console over UDP (compatible to Ingo Molnar's
netconsole patch under Linux)
2004-08-02 21:11:11 +00:00
wdenk
9aea95307f Patch by Jon Loeliger, 16 Jul 2004:
- support larger DDR memories up to 2G on the PC8540/8560ADS and
  STXGP3 boards
- Made MPC8540/8560ADS be 33Mhz PCI by default.
- Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16
  and CONFIG_L2_INIT_RAM options.
- Refactor Local Bus initialization out of SDRAM setup.
- Re-implement new version of LBC11/DDR11 errata workarounds.
- Moved board specific PCI init parts out of CPU directory.
- Added TLB entry for PCI-1 IO Memory
- Updated README.mpc85xxads
2004-08-01 23:02:45 +00:00
wdenk
281e00a3be * Code cleanup
* Patch by Sascha Hauer, 28 Jun:
  - add generic support for Motorola i.MX architecture
  - add support for mx1ads, mx1fs2 and scb9328 boards

* Patches by Marc Leeman, 23 Jul 2004:
  - Add define for the PCI/Memory Buffer Configuration Register
  - corrected comments in cpu/mpc824x/cpu_init.c

* Add support for multiple serial interfaces
  (for example to allow modem dial-in / dial-out)
2004-08-01 22:48:16 +00:00
wdenk
cfca5e604d * Fix NSCU config; add ethernet wakeup code.
* Add link for preloader for Motorola Coldfire to RAEDME.m68k
2004-08-01 13:09:47 +00:00
stroese
45eeb8983c Patch by Stefan Roese, 15 Jul 2004 2004-07-15 14:41:43 +00:00
stroese
de8d5a3600 cpu/ppc4xx/sdram.c rewritten now using get_ram_size() 2004-07-15 14:41:13 +00:00
wdenk
75b1fa7864 Patch by Michael Bendzick, 12 Jul 2004:
fix output formatting in drivers/cfi_flash.c
2004-07-12 22:34:51 +00:00
wdenk
07cba3514b Patch by Mark Jonas, 02 Jul 2004:
Fix lowboot (again) on MPC5xxx
2004-07-12 14:37:59 +00:00
wdenk
b8c8318160 Add cerf250 to MAINTAINERS and README 2004-07-11 22:37:59 +00:00
wdenk
cdc7fea173 Patch by Curt Brune, 07 Jul 2004:
relocate exception vectors on arm720t if needed
2004-07-11 22:27:55 +00:00
wdenk
a1f4a3dd05 * Patch by George G. Davis, 06 Jul 2004:
- update mach-types.h to latest arm.linux.org.uk master list
  - Set correct OMAP1610 bi_arch_number for build target

* Patch by Curt Brune, 06 Jul 2004:
  evb4510: add support for timer interrupt; cleanup
2004-07-11 22:19:26 +00:00
wdenk
b9283e2dbe * Patch by Dan Poirot, 06 Jul 2004:
Fix sbc8260 environment variables

* Cleanup redundand "console" environment variable
2004-07-11 21:49:42 +00:00
wdenk
810509266f * Cleanup
* Patch by Mark Jonas, 05 Jul 2004:
  add support for the Total5100's and Total5200's LCD screen

* Patches by Dan Eisenhut, 01 Jul 2004:
  - README fixes.
  - Move doc2000.h include to prevent compiler warning on some boards
2004-07-11 20:04:51 +00:00
wdenk
6c7a14084a Patch by Mark Jonas, 01 Jul 2004:
Added support for Total5100 and Total5200 (Rev.1 and Rev.2)
MGT5100 and MPC5200 based Freescale platforms.
2004-07-11 19:17:20 +00:00
wdenk
bc54f309a1 * Patch by Philippe Robin, 01 Jul 2004:
Add initialization for Integrator and versatile board files.

* Patch by Hinko Kocevar, 01 Jun 2004:
  Fix VFD FB allocation, add LCD FB allocation on ARM
2004-07-11 18:10:30 +00:00
wdenk
56523f1283 * Patch by Martin Krause, 30 Jun 2004:
Add support for TQM5200 board

* Patch by Martin Krause, 29 Jun 2004:
  Add loopw command: infinite write loop on address range
2004-07-11 17:40:54 +00:00
wdenk
857cad37a4 Patches by Yasushi Shoji, 29 Jun 2004:
- add empty include/asm-microblaze/processor.h
- add to CREDITS and MAINTAINERS
- add gd initialization
- add MicroBlaze and SUZAKU board to MAKEALL script
- add reset support for SUZAKU
- add flush_cache() for MicroBlaze
- add CFG_FLASH_SIZE to include/configs/suzaku.h since we have fixed
  size flash memory on SUZAKU
2004-07-10 23:48:41 +00:00
wdenk
fabd46acff * Patch by Prakash Kumar, 27 Jun 2004:
Add support for the PXA250 based Intrinsyc Cerf board.

* Patch by Yasushi Shoji, 27 Jun 2004:
  fix comment in include/common.h
2004-07-10 23:11:10 +00:00
wdenk
10a36a98c4 Fix swapped config files. 2004-07-10 23:02:23 +00:00
wdenk
466b74108f * Rename SBC8560 into sbc8560 for consistency
* Patch by Daniel Poirot, 24 Jun 2004:
  Add support for Wind River's sbc8240 board

* Patches by Yasushi Shoji, 26 Jun 2004:
  - drivers/serial_xuartlite.c: fix "return 0" in void function
  - add microblaze support to mkimage tool
2004-07-10 22:35:59 +00:00
wdenk
8b07a1103d * Patch by Fred Klatt, 25 Jun 2004:
Add support for WindRiver's SBC8560 board

* Patch by Nicolas Lacressonniere, 24 Jun 2004
  Small Bugs fixes for "at91rm9200dk" board:
  - Timing modifications for SPI DataFlash access
  - Fix NAND flash detection bug

* Patch by Nicolas Lacressonniere, 24 Jun 2004:
  Add Support for Flash AT49BV6416 for AT91RM9200DK board
2004-07-10 21:45:47 +00:00
wdenk
0ac6f8b749 Patch by Jon Loeliger, 17 June 2004:
Completion of the 8540ADS/8560ADS updates:
Fix some PCI and Rapid I/O memory maps,
Initialize both TSEC 1 and 2,
Initialize SDRAM
Update MAINTAINER for 85xx boards and README.mpc85xxads
2004-07-09 23:27:13 +00:00
wdenk
262381329b * Patch by Yuli Barcohen, 16 Jun 2004:
Remove obsolete AdderII port which was superseded by unified
  AdderII/Adder87x port

* Patch by Ladislav Michl, 16 Jun 2004:
  Fix gcc-3.3.3 warnings for smc91111.c
2004-07-09 22:51:01 +00:00
stroese
ede130229c Patch by Stefan Roese, 02 Jul 2004 2004-07-02 14:38:26 +00:00
stroese
2c96baa2a4 Fix problem in 405 i2c driver; don't try to print without console! 2004-07-02 14:37:04 +00:00
stroese
18f71f27ae Fix bug in 405 ethernet driver; allocated data not cleared! 2004-07-02 14:36:35 +00:00
wdenk
78953f2f93 Patch by Paul Ruhland, 11 Jun 2004:
Remove debug code from 'board/lpd7a40x/flash.c'
2004-07-01 22:02:29 +00:00
wdenk
e55ca7e262 Patch by Andrea Marson, 11 Jun 2004:
Update for PPChameleon board:
- support for SysClk @ 25MHz
- support for Silicon Motion SM712 VGA controller
- some clean ups
2004-07-01 21:40:08 +00:00
wdenk
93f6a6771b * Patches by Richard Woodruff, 10 Jun 2004:
- fix problems with examples/stubs.c for GCC >= 3.4
  - fix problems with gd initialization

* Enable FAT filesystem support for HMI10 board
2004-07-01 20:28:03 +00:00
wdenk
39539887ea * Code cleanup (ARM mostly)
* Patch by Curt Brune, 17 May 2004:
  - Add support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
  - Add support for ESPD-Inc. EVB4510 Board
2004-07-01 16:30:44 +00:00
wdenk
e94d2cd9d1 * Fix "cls" command when used with splash screen
* Increase NFS download timeout (now 1 min - 10 sec is to short for a
  slow download of a big image)
2004-06-30 22:59:18 +00:00
wdenk
c3f4d17e05 Add "cls" function to MPC823 LCD driver so we can reinitialize the
display even after showing a bitmap
2004-06-25 23:35:58 +00:00
wdenk
021bfcd3c6 Add MicroSys maintainer. 2004-06-24 15:54:37 +00:00
wdenk
49822e23a0 Patch by Josef Wagner, 04 Jun 2004:
- DDR Ram support for PM520 (MPC5200)
- support for different flash types (PM520)
- USB / IDE / CF-Card / DiskOnChip support for PM520
- 8 bit boot rom support for PM520/CE520
- Add auto SDRAM module detection for MicroSys CPC45 board (MPC8245)
- I2C and RTC support for CPC45
- support of new flash type (28F160C3T) for CPC45
2004-06-19 21:19:10 +00:00
wdenk
46a414dc12 * Fix flash parameters passed to Linux for PPChameleon board
* Remove eth_init() from lib_arm/board.c; it's done in net.net.c.
2004-06-17 18:50:45 +00:00
wdenk
f832d8a143 * Patch by Paul Ruhland, 10 Jun 2004:
fix support for Logic SDK-LH7A404 board and clean up the
  LH7A404 register macros.

* Patch by Matthew McClintock, 10 Jun 2004:
  Modify code to select correct serial clock on Sandpoint8245
2004-06-10 21:55:33 +00:00
wdenk
b54d32b40d * Patch by Robert Schwebel, 10 Jun 2004:
Add support for Intel K3 strata flash.

* Some cleanup

* Patch by Thomas Brand, 10 Jun 2004:
  Fix "loads" command on DK1S10 board
2004-06-10 21:34:36 +00:00
wdenk
681334540d Remove duplicate entry 2004-06-09 22:52:57 +00:00
wdenk
99edcfb29e Patch by Yuli Barcohen, 09 Jun 2004:
Add support for 8MB flash SIMM and JFFS2 file system on
Motorola FADS board and its derivatives (MPC86xADS, MPC885ADS).
2004-06-09 21:54:22 +00:00
wdenk
2d24a3a787 * Patch by Yuli Barcohen, 09 Jun 2004:
Add support for Analogue&Micro Adder87x and the older AdderII board.

* Patch by Ming-Len Wu, 09 Jun 2004:
  Add suppport for MC9328 (Dargonball) CPU and Motorola MX1ADS board
2004-06-09 21:50:45 +00:00
wdenk
e63c8ee3dc Patch by Sam Song, 09 Jun 2004:
- Add support for RPXlite_DW board
- Update FLASH driver for 4*AM29DL323DB90VI
- Add option configuration of CFG_ENV_IS_IN_NVRAM on RPXlite_DW board
2004-06-09 21:04:48 +00:00
wdenk
36c728774e * Patch by Mark Jonas, 08 June 2004:
- Make MPC5200 boards evaluate the SVR to print processor name and
    version in checkcpu() (cpu/mpc5xxx/cpu.c).

* Patch by Kai-Uwe Bloem, 06 May 2004:
  Fix endianess problem in cramfs code
2004-06-09 17:45:32 +00:00
wdenk
4c0d4c3b78 * Patch by Tom Armistead, 04 Jun 2004:
Add support for MAX6900 RTC

* Patches by Ladislav Michl, 03 Jun 2004:
  - fix cfi_flash.c on LE systems
  - let 'make mrproper' delete u-boot.img as well
  - turn printf into debug in cfi_flash.c
2004-06-09 17:34:58 +00:00
wdenk
ca0e774894 Patch by Kurt Stremerch, 28 May 2004:
Add support for Exys XSEngine board

Some code cleanup.
2004-06-09 15:37:23 +00:00
wdenk
697037fe9b * Patch by Martin Krause, 27 May 2004:
Fix a MPC5xxx I2C timing issue in i2c_probe().

* Patch by Leif Lindholm, 27 May 2004:
  Fix board_init_f() for dbau1x00 board.
2004-06-09 15:29:49 +00:00
wdenk
3ff02c27d5 * Patch by Imre Deak, 26 May 2004:
On OMAP1610 platforms check if booting from RAM(CS0) or flash(CS3).
  Set flash base accordingly, and decide whether to do or skip board
  specific setup steps.

* Patch by Josef Baumgartner, 26 May 2004:
  Add missing define in include/asm-m68k/global_data.h
2004-06-09 15:25:53 +00:00
wdenk
70f05ac34e * Patch by Josef Baumgartner, 25 May 2004:
Add missing functions get_ticks() and get_tbclk() in lib_m68k/time.c

* Patch by Paul Ruhland, 24 May 2004:
  fix SDRAM initialization for LPD7A400 board.
2004-06-09 15:24:18 +00:00
wdenk
13a5695b7c Patch by Jian Zhang, 20 May 2004:
add support for environment in NAND flash
2004-06-09 14:58:14 +00:00
wdenk
c3c7f861ae Patch by Yuli Barcohen, 20 May 2004:
Add support for Interphase iSPAN boards.
2004-06-09 14:47:54 +00:00
wdenk
f39748ae8e * Patch by Paul Ruhland, 17 May 2004:
- Add support for the Logic Zoom LH7A40x based SDK board(s),
    specifically the LPD7A400.

* Patches by Robert Schwebel, 15 May 2004:
  - call MAC address reading code also for SMSC91C111;
  - make SMSC91C111 timeout configurable, remove duplicate code
  - fix get_timer() for PXA
  - update doc/README.JFFS2
  - use "bootfile" env variable also for jffs2
2004-06-09 13:37:52 +00:00
wdenk
aa24509041 Patch by Tolunay Orkun, 14 May 2004:
Add support for Cogent CSB472 board (8MB Flash Rev)
2004-06-09 12:47:02 +00:00
wdenk
aa5590b66f Patch by Thomas Viehweger, 14 May 2004:
- flash.h: more flash types added
- immap_8260.h: some bits added (useful for RMII)
- cmd_coninfo.c: typo corrected, printf -> puts
- reduced size by replacing spaces with tab
2004-06-09 12:42:26 +00:00
wdenk
48abe7bfab Patch by Robert Schwebel, 13 May 2004:
Add 'imgextract' command: extract one part of a multi file image.
2004-06-09 10:15:00 +00:00
wdenk
547b4cb25e Patches by Jon Loeliger, 11 May 2004:
(partially, as they contained a lot of crap)
2004-06-09 00:51:50 +00:00
wdenk
97d80fc391 Patches Part 1 by Jon Loeliger, 11 May 2004:
Dynamically handle REV1 and REV2 MPC85xx parts.
  (Jon Loeliger, 10-May-2004).
New consistent memory map and Local Access Window across MPC85xx line.
New CCSRBAR at 0xE000_0000 now.
Add RAPID I/O memory map.
New memory map in README.MPC85xxads
  (Kumar Gala, 10-May-2004)
Better board and CPU identification on MPC85xx boards at boot.
  (Jon Loeliger, 10-May-2004)
SDRAM clock control fixes on MPC8540ADS & MPC8560 boards.
Some configuration options for MPC8540ADS & MPC8560ADS cleaned up.
  (Jim Robertson, 10-May-2004)
Rewrite of the MPC85xx Three Speed Ethernet Controller (TSEC) driver.
Supports multiple PHYs.
  (Andy Fleming, 10-May-2004)
Some README.MPC85xxads updates.
  (Kumar Gala, 10-May-2004)
Copyright updates for "Freescale"
  (Andy Fleming, 10-May-2004)
2004-06-09 00:34:46 +00:00
wdenk
6bdd1377af Patch by Stephen Williams, 11 May 2004:
Add flash support for ST M29W040B
Reduce JSE specific flash.c to remove dead code.
2004-06-09 00:15:33 +00:00
wdenk
356a0d9f31 Patch by Markus Pietrek, 04 May 2004:
Fix clear_bss code for ARM systems (all except s3c44b0 which
doesn't clear BSS at all?)
2004-06-09 00:10:59 +00:00
wdenk
1eaeb58e3c * Patch by Rishi Bhattacharya, 08 May 2004:
Add support for TI OMAP5912 OSK Board

* Patch by Sam Song May, 07 May 2004:
  Fix typo of UPM table for rmu board
2004-06-08 00:22:43 +00:00
wdenk
79fa88f3ed Patch by Pantelis Antoniou, 5 May 2004:
- Intracom board update.
- Add Codec POST.
2004-06-07 23:46:25 +00:00
wdenk
cea655a224 Add support for the second Ethernet interface for the 'PPChameleon' board. 2004-06-06 23:53:59 +00:00
wdenk
a56bd92289 * Patch by Dave Peverley, 30 Apr 2004:
Add support for OMAP730 Perseus2 Development board

* Patch by Alan J. Luse, 29 Apr 2004:
  Fix flash chip-select (OR0) option register setting on FADS boards.

* Patch by Alan J. Luse, 29 Apr 2004:
  Report MII network speed and duplex setting properly when
  auto-negotiate is not enabled.

* Patch by Jarrett Redd, 29 Apr 2004:
  Fix hang on reset on Ocotea board due to flash in wrong mode.
2004-06-06 23:13:55 +00:00
wdenk
5ca2679933 Patch by Dave Peverley, 29 Apr 2004:
add MAC address detection to smc91111 driver
2004-06-06 22:11:41 +00:00
wdenk
17ea117743 Patch by Tolunay Orkun, 20 Apr 2004:
- README update: add CONFIG_CSB272 and csb272_config
- add descriptions for some MII/PHY options, CONFIG_I2CFAST, and
  i2cfast environment variable
2004-06-06 21:51:03 +00:00
wdenk
1114257c9d Patch by Yuli Barcohen, 19 Apr 2004:
- Rename DUET_ADS to MPC885ADS
- Rename CONFIG_DUET to CONFIG_MPC885_FAMILY
- Rename CONFIG_866_et_al to CONFIG_MPC866_FAMILY
- Clean up FADS family port to use the new defines
2004-06-06 21:35:06 +00:00
wdenk
d7a04603ae Fix text alignment 2004-06-01 21:15:28 +00:00
wdenk
979bdbc70e Fix PCI support on CPC45 board 2004-06-01 21:08:17 +00:00
wdenk
6945979126 Fix CONFIG_ETH*ADDR for Ocotea board.
Sort Makefile.
Update docs.
2004-05-29 16:53:29 +00:00
wdenk
e4cc71aa44 Patch by Scott McNutt, 25 Apr 2004:
Add Nios GDB/JTAG Console support:
- Add stubs to support gdb via JTAG.
- Add support for console over JTAG.
- Minor cleanup.
2004-05-19 21:33:14 +00:00
wdenk
10767ccb86 Add support for CATcenter board (based on PPChameleon ME module) 2004-05-13 13:23:58 +00:00
wdenk
02b11f8e09 Patch by Klaus Heydeck, 12 May 2004:
Using external watchdog for KUP4 boards in mpc8xx/cpu.c;
load_sernum_ethaddr() for KUP4 boards in lib_ppc/board.c;
various changes to KUP4 board specific files
2004-05-12 22:54:36 +00:00
wdenk
6c1362cf63 Fix minor network problem on MPC5200 2004-05-12 22:18:31 +00:00
wdenk
953e2062c0 Fix handling of low-speed devices with SL811 USB controller (again). 2004-05-12 13:20:19 +00:00
wdenk
9d9e283790 Add some limited support for low-speed devices to SL811 USB controller
(at least "usb reset" now passes successfully and "usb info" displays
correct information)
2004-05-11 21:53:55 +00:00
wdenk
baac607c13 Change init sequence for multiple network interfaces: initialize
on-chip interfaces before external cards.
2004-05-08 20:33:20 +00:00
wdenk
32877d66aa * Fix memory leak in the NAND-specific JFFS2 code
* Fix SL811 USB controller when attached to a USB hub
2004-05-05 19:44:41 +00:00
wdenk
62b4ac98a4 * Fix config option spelling in PM520 config file
* Fix PHY discovery problem in cpu/mpc8xx/fec.c (introduced by
  patches by Pantelis Antoniou, 30 Mar 2004)
2004-05-05 08:31:53 +00:00
wdenk
2729af9d54 * Fix minor NAND JFFS2 related issue
* Fixes for SL811 USB controller:
  - implement workaround for broken memory stick
  - improve error handling

* Increase packet send timeout to 10 ms in cpu/mpc8xx/scc.c to better
  cope with congested networks.
2004-05-03 20:45:30 +00:00
wdenk
08f1080c9c Make compile clean. 2004-04-25 16:40:11 +00:00
wdenk
fc1cfcdb12 * Back out Patch by Christian Hohnstaedt, 23 Apr 2004:
(JFFS2 speed enhancements) because of using non-public
  data (PHYS_FLASH_SECT_SIZE)

* Patch by Travis Sawyer, 23 Apr 2004:
  Fix VSC/CIS 8201 phy descrambler interoperability timing due to
  errata from Vitesse Semiconductor.
2004-04-25 15:41:35 +00:00
wdenk
0b8fa03b6d * Patch by Christian Hohnstaedt, 23 Apr 2004:
JFFS2 speed enhancements:
  - repair header CRC calculation in jffs2_1pass.c
  - add eraseblock size to the partition information to skip empty
    eraseblocks if we find more then 4k of free space.
  - The JFFS2 scanner is now fast enough to remove the spinning wheel
    so #ifdef-ed out.
  - add watchdog calls in long running loops

* Patch by Philippe Robin, 22 Apr 2004:
  Fix ethernet configuration for "versatile" board

* Patch by Kshitij Gupta, 21 Apr 2004:
  Remove busy loop and use MPU timer fr usleep() on OMAP1510/1610 boards

* Patch by Steven Scholz, 24 Feb 2004:
  Fix a bug in AT91RM9200 ethernet driver:
  The MII interface is now initialized before accessing the PHY.

* Cleanup PCI ID's
2004-04-25 14:37:29 +00:00
wdenk
b9711de102 * Patch by John Kerl, 19 Apr 2004:
Use U-boot's miiphy.h for PHY register names, rather than
  introducing a new header file.

* Update pci_ids.h from linux-2.4.26

* Patch by Masami Komiya, 19 Apr 2004:
  Fix problem cause by VLAN function on little endian architecture
  without VLAN environment
2004-04-25 13:18:40 +00:00
wdenk
e9132ea94c Clean up the TQM8xx_YYMHz configurations; allow to use the same
binary image for all clock frequencies. Implement run-time
optimization of flash access timing based on the actual bus
frequency.
2004-04-24 23:23:30 +00:00
wdenk
5cf91d6bdc * Modify KUP4X board configuration to use SL811 driver for USB memory
sticks (including FAT / VFAT filesystem support)

* Add SL811 Host Controller Interface driver for USB

* Add CFG_I2C_EEPROM_ADDR_OVERFLOW desription to README

* Patch by Pantelis Antoniou, 19 Apr 2004:
  Allow to use shell style syntax (i. e. ${var} ) with standard parser.
  Minor patches for Intracom boards.

* Patch by Christian Pell, 19 Apr 2004:
  cleanup support for CF/IDE on PCMCIA for PXA25X
2004-04-23 20:32:05 +00:00
wdenk
e35745bb64 * Temporarily disabled John Kerl's extended MII command code because
"miivals.h" is missing

* Patches by Mark Jonas, 13 Apr 2004:
  - Remove CS0 chip select timing setting from cpu/mpc5xxx/start.S
  - Add sync instructions to IceCube SDRAM init code
  - Move SDRAM chip constants into seperate include files
  - Unify DDR and SDR initialization code
  - Unify all IceCube (Lite5xxx) target names
2004-04-18 23:32:11 +00:00
wdenk
2471111d35 * Patch by John Kerl, 16 Apr 2004:
Enable ranges in mii command, e.g. mii read 0-1f 0 or
  mii read 4-7 18-1a.  Also add mii dump subcommand for
  pretty-printing standard regs 0-5.

* Patch by  Stephen Williams, 16 April 2004:
  fix typo in JSE.h; update MAINTAINERS
2004-04-18 22:57:51 +00:00
wdenk
498b8db7f5 * Patch by Matthew S. McClintock, 14 Apr 2004:
fix initdram function for utx8245 board

* Patch by Markus Pietrek, 14 Apr 2004:
  use ATAG_INITRD2 instead of deprecated ATAG_INITRD tag

* Patch by Reinhard Meyer, 18 Apr 2004:
  provide the IDE Reset Function for EMK 5200 boards

* Patch by Masami Komiya, 12 Apr 2004:
  fix pci_hose_write_config_{byte,word}_via_dword problems
2004-04-18 22:26:17 +00:00
wdenk
a8bd82de46 * Patch by Sangmoon Kim, 12 Apr 2004:
Update max RAM size for debris board

* Patch by Travis Sawyer, 08 Apr 2004:
  Add TLB entry for second DIMM slot on ocotea

* Patch by Masami Komiya, 08 Apr 2004:
  add RTL8169 network driver
2004-04-18 22:03:42 +00:00
wdenk
7abf0c5886 * Patch by Dan Malek, 07 Apr 2004:
- Add support for RPC/STx GP3, Motorola 8560 board
  - Update 85xx TSEC driver so it searches MII for first available PHY
    and uses that one.
  - Add functions to support console MII commands.

* Patch by Tolunay Orkun, 07 Apr 2004:
  Move  initialization of bi_iic_fast[]
  from board_init_f() to board_init_r()

* Patch by Yasushi Shoji, 07 Apr 2004:
  Cleanup microblaze port

* Patch by Sangmoon Kim, 07 Apr 2004:
  Add auto SDRAM module detection for Debris board
2004-04-18 21:45:42 +00:00
wdenk
d4326aca18 * Add missing microblaze header files
* Patch by Rune Torgersen, 06 Apr 2004:
  - Fix some PCI problems on the MPC8266ADS board
  - Fix the location of some PCI entries in the immap structure
2004-04-18 21:17:30 +00:00
wdenk
507bbe3e80 * Patch by Yasushi Shoji, 07 Apr 2004:
- add support for microblaze processors
  - add support for AtmarkTechno "suzaku" board
2004-04-18 21:13:41 +00:00
wdenk
998eaaecd4 * Configure PPChameleon board to use redundand environment in flash
* Configure PPChameleon board to use JFFS2 NAND support.

* Added support for JFFS2 filesystem (read-only) on top of NAND flash
2004-04-18 19:43:36 +00:00
wdenk
6e5923851e * Cleanup, minor fixes
* Patch by Rune Torgersen, 16 Apr 2004:
  LBA48 fixes

* Patches by Pantelis Antoniou, 16 Apr 2004:
  - Fix some compile problems;
    add "once" functionality for the netretry variable
2004-04-18 17:39:38 +00:00
wdenk
c26e454dfc Patches by Pantelis Antoniou, 16 Apr 2004:
- add support for a new version of an Intracom board and fix
  various other things on others.
- add verify support to the crc32 command (define
  CONFIG_CRC32_VERIFY to enable it)
- fix FEC driver for MPC8xx systems:
  1. fix compilation problems for boards that use dynamic
     allocation of DPRAM
  2. shut down FEC after network transfers
- HUSH parser fixes:
  1. A new test command was added. This is a simplified version of
     the one in the bourne shell.
  2. A new exit command was added which terminates the current
     executing script.
  3. Fixed handing of $? (exit code of last executed command)
2004-04-18 10:13:26 +00:00
wdenk
ea66bc8804 * Patch by George G. Davis, 02 Apr 2004:
add support for Intel Assabet board
2004-04-15 23:23:39 +00:00
wdenk
db01a2ea99 * Patch by Stephen Williams, 01 Apr 2004:
Add support for Picture Elements JSE board

* Patch by Christian Pell, 01 Apr 2004:
  Add CompactFlash support for PXA systems.
2004-04-15 23:14:49 +00:00
wdenk
bda6c8aece Patches by Pantelis Antoniou, 30 Mar 2004:
- some minor patches / cleanup
2004-04-15 21:58:11 +00:00
wdenk
a3d991bd0d Patches by Pantelis Antoniou, 30 Mar 2004:
add networking support for VLANs (802.1q), and CDP (Cisco Discovery Protocol)
2004-04-15 21:48:45 +00:00
wdenk
a6ab4bf978 Patches by Pantelis Antoniou, 30 Mar 2004:
Improve and fix various things in the MPC8xx FEC driver:
1. The new 87x and 88x series of processors have two FECs,
   and the new driver supports them both.
2. Another change in the 87x/88x series is support for
   the RMII (Reduced MII) interface. However numerous
   changes are needed to make it work since the PHYs
   are connected to the same lines. That means that
   you have to address them correctly over the MII
   interface.
2004-04-15 21:31:56 +00:00
wdenk
5a8c51cd5e * Patches by Pantelis Antoniou, 30 Mar 2004:
- add support for the Epson 156x series of graphical displays
    (These displays are serial and not suitable for using a normal
    framebuffer console on them)
  - add infrastructure needed in order to POST any DSPs in a board
2004-04-15 21:16:42 +00:00
wdenk
04a85b3b36 * Patches by Pantelis Antoniou, 30 Mar 2004:
- add auto-complete support to the U-Boot CLI
  - add support for NETTA and NETPHONE boards; fix NETVIA board

* Patch by Yuli Barcohen, 28 Mar 2004:
  - Add support for MPC8272 family including MPC8247/8248/8271/8272
  - Add support for MPC8272ADS evaluation board (another flavour of MPC8260ADS)
  - Change configuration method for MPC8260ADS family
2004-04-15 18:22:41 +00:00
wdenk
d716b12671 Add startup code to clear the BSS of standalone applications 2004-04-12 16:12:49 +00:00
wdenk
56b86bf0cd Fix if / elif handling bug in HUSH shell 2004-04-12 14:31:43 +00:00
wdenk
f525c8a147 Release version 1.1.0 2004-04-10 20:44:51 +00:00
wdenk
17d704eb95 Cleanup for release 1.1.0 2004-04-10 20:43:50 +00:00
wdenk
7e780369e4 * Patch by Mark Jonas: Remove config.tmp files only when
unconfiguring the board

* Adapt RMU board for bigger flash memory

* Test fix for ethernet problems on MPC5200
2004-04-08 22:31:29 +00:00
wdenk
0608e04da9 * Patch by Klaus Heydeck, 13 Mar 2003:
Add support for KUP4X Board
2004-03-25 19:29:38 +00:00
wdenk
b79a11cc2b Code cleanup 2004-03-25 15:14:43 +00:00
wdenk
518e2e1ae3 * Patch by Pavel Bartusek, 21 Mar 2004
Add Reiserfs support

* Patch by Hinko Kocevar, 20 Mar 2004
  - Add auto-release for SMSC LAN91c111 driver
  - Add save/restore of PTR and PNR regs as suggested in datasheet
2004-03-25 14:59:05 +00:00
wdenk
6fb6af6dc9 * Patch by Stephen Williams, 19 March 2004
Increase speed of sector reads from SystemACE,
  shorten poll timeout and remove a useless reset

* Patch by Tolunay Orkun, 19 Mar 2004:
  Make GigE PHY 1000Mbps Speed/Duplex detection conditional
  (CONFIG_PHY_GIGE)

* Patch by Brad Kemp, 18 Mar 2004:
  prevent machine checks during a PCI scan

* Patch by Pierre Aubert, 18 Mar 2004:
  Fix string cleaning in IDE identification
2004-03-23 23:20:24 +00:00
wdenk
eeb1b77b7d * Patch by Pierre Aubert, 18 Mar 2004:
- Unify video mode handling for Chips & Technologies 69000 Video
    chip and Silicon Motion SMI 712/710/810 Video chip
  - Add selection of the video output (CRT or LCD) via 'videoout'
    environment variable for the Silicon Motion
  - README update

* Patch by Pierre Aubert, 18 Mar 2004:
  include/common.h typo fix

* Patches by Tolunay Orkun, 17 Mar 2004:
  - Add support for bd->bi_iic_fast[] initialization via environment
    variable "i2cfast" (CONFIG_I2CFAST)
  - Add "i2cfast" u-boot environment variable support for csb272
2004-03-23 22:53:55 +00:00
wdenk
27aa818670 * Patch by Carl Riechers, 17 Mar 2004:
Ignore '\0' characters in console input for use with telnet and
  telco pads.

* Patch by Leon Kukovec, 17 Mar 2004:
  typo fix for strswab prototype #ifdef
2004-03-23 22:37:33 +00:00
wdenk
4b9206ed51 * Patches by Thomas Viehweger, 16 Mar 2004:
- show PCI clock frequency on MPC8260 systems
  - add FCC_PSMR_RMII flag for HiP7 processors
  - in do_jffs2_fsload(), take load address from load_addr if not set
    explicit, update load_addr otherwise
  - replaced printf by putc/puts when no formatting is needed
    (smaller code size, faster execution)
2004-03-23 22:14:11 +00:00
wdenk
109c0e3ad3 * Patch by Phillippe Robin, 16 Mar 2004:
avoid dereferencing NULL pointer in lib_arm/armlinux.c

* Patch by Stephen Williams, 15 Mar 2004:
  Fix CONFIG_SERIAL_SOFTWARE_FIFO documentation

* Patch by Tolunay Orkun, 15 Mar 2004:
  Initialize bi_opbfreq to real OPB frequency via get_OPB_freq()

* Patch by Travis Sawyer, 15 Mar 2004:
  Update CREDITS & MAINTAINERS files for PPC440GX & Ocotea port
2004-03-23 21:43:07 +00:00
wdenk
efa329cb89 * Add start-up delay to make sure power has stabilized before
attempting to switch on USB on SX1 board.

* Patch by Josef Wagner, 18 Mar 2004:
  - Add support for MicroSys XM250 board (PXA255)
  - Add support for MicroSys PM828 board (MPC8280)
  - Add support for 32 MB Flash on PM825/826
  - new SDRAM refresh rate for PM825/PM826
  - added support for MicroSys PM520 (MPC5200)
  - replaced Query by Identify command in CPU86/flash.c
    to support 28F160F3B

* Fix wrap around problem with udelay() on ARM920T

* Add support for Macronix flash on TRAB board
2004-03-23 20:18:25 +00:00
wdenk
7d7ce4125f Patch by Pierre Aubert, 15 Mar 2004:
Fix buffer overflow in IDE identification
2004-03-17 01:13:07 +00:00
wdenk
d9df1f4e66 * Patch by Steven Scholz, 27 Feb 2004:
- Adding get_ticks() and get_tbclk() for AT91RM9200
  - Many white space fixes in cpu/at91rm9200/interrupts.c

* Patches by Steven Scholz, 20 Feb 2004:
  some cleanup in AT91RM9200 related code
2004-03-15 09:00:01 +00:00
wdenk
42dfe7a184 Code cleanup; make several boards compile & link. 2004-03-14 22:25:36 +00:00
wdenk
855a496fe9 * Patches by Travis Sawyer, 12 Mar 2004:
- Fix Gigabit Ethernet support for 440GX
  - Add Gigabit Ethernet Support to MII PHY utilities

* Patch by Brad Kemp, 12 Mar 2004:
  Fixes for drivers/cfi_flash.c:
  - Better support for x8/x16 implementations
  - Added failure for AMD chips attempting to use CFG_FLASH_USE_BUFFER_WRITE
  - Added defines for AMD command and address constants

* Patch by Leon Kukovec, 12 Mar 2004:
  Fix get_dentfromdir() to correctly handle deleted dentries

* Patch by George G. Davis, 11 Mar 2004:
  Remove hard coded network settings in TI OMAP1610 H2
  default board config

* Patch by George G. Davis, 11 Mar 2004:
  add support for ADS GraphicsClient+ board.
2004-03-14 18:23:55 +00:00
wdenk
4b248f3f71 * Patch by Pierre Aubert, 11 Mar 2004:
- add bitmap command and splash screen support in cfb console
  - add [optional] origin in the bitmap display command

* Patch by Travis Sawyer, 11 Mar 2004:
  Fix ocotea board early init interrupt setup.

* Patch by Thomas Viehweger, 11 Mar 2004:
  Remove redundand code; add  PCI-specific bits to include/mpc8260.h
2004-03-14 16:51:43 +00:00
wdenk
aaf224ab4e * Patch by Stephan Linz, 09 Mar 2004
- Add support for the SSV ADNP/ESC1 (Nios Softcore)

* Patch by George G. Davis, 9 Mar 2004:
  fix recent build failure for SA1100 target

* Patch by Travis Sawyer, 09 Mar 2004:
  Support native interrupt mode for the IBM440GX.
  Previously it was running in 440GP compatibility mode.
2004-03-14 15:20:55 +00:00
wdenk
3d3befa754 * Patch by Philippe Robin, 09 Mar 2004:
Added ARM Integrator AP, CP and Versatile PB926EJ-S Reference
  Platform support.

* Patch by Masami Komiya, 08 Mar 2004:
  Don't overwrite server IP address or boot file name
  when the boot server does not return values

* Patch by listmember@orkun.us, 5 Mar 2004:
  Removed compile time restriction on CFG_I2C_SPEED for DS1338 RTC
2004-03-14 15:06:13 +00:00
wdenk
4d13cbad1c * Patch by Tolunay Orkun, 5 Mar 2004:
Fix early board initialization for Cogent CSB272 board

* Patch by Ed Okerson, 3 Mar 2004:
  fix CFI flash writes for little endian systems

* Patch by Reinhard Meyer, 01 Mar 2004:
  generalize USB and IDE support for MPC5200 with according
  changes to IceCube.h and TOP5200.h
  add Am29LV256 256 MBit FLASH support for TOP5200 boards
  add info about USB and IDE to README
2004-03-14 14:09:05 +00:00
wdenk
c3f9d4939a * Patch by Yuli Barcohen, 4 Mar 2004:
Fix problems with GCC 3.3.x which changed handling of global
  variables explicitly initialized to zero (now in .bss instead of
  .data as before).

* Patch by Leon Kukovec, 02 Mar 2004:
  add strswab() to fix IDE LBA capacity, firmware and model numbers
  on little endian machines

* Patch by Masami Komiya, 02 Mar 2004:
  - Remove get_ticks() from NFS code
  - Add verification of RPC transaction ID

* Patch by Pierre Aubert, 02 Mar 2004:
  cleanup for IDE and USB drivers for MPC5200
2004-03-14 00:59:59 +00:00
wdenk
0e6d798cb3 * Patch by Travis Sawyer, 01 Mar 2004:
Ocotea:
  - Add IBM PPC440GX Ref Platform support (Ocotea)
    Original code by Paul Reynolds <PaulReynolds@lhsolutions.com>
    Adapted to U-Boot and 440GX port
  440gx_enet.c:
  - Add gracious handling of all Ethernet Pin Selections for 440GX
  - Add RGMII selection for Cicada CIS8201 Gigabit PHY
  ppc440.h:
  - Add needed bit definitions
  - Fix formatting

* Patch by Carl Riechers, 1 Mar 2004:
  Add PPC440GX prbdv0 divider to fix memory clock calculation.

* Patch by Stephan Linz, 27 Feb 2004
  - avoid problems for targets without NFS download support
2004-03-14 00:07:33 +00:00
wdenk
c40b295682 * Patch by Rune Torgersen, 27 Feb 2004:
- Added LBA48 support (CONFIG_LBA48 & CFG_64BIT_LBA)
  - Added support for 64bit printing in vsprintf (CFG_64BIT_VSPRINTF)
  - Added support for 64bit strtoul (CFG_64BIT_STRTOUL)

* Patch by Masami Komiya, 27 Feb 2004:
  Fix rarpboot: add autoload by NFS

* Patch by Dan Eisenhut, 26 Feb 2004:
  fix flash_write return value in saveenv

* Patch by Stephan Linz, 11 Dec 2003
  expand config.mk to avoid trigraph warnings on NIOS

* Rename "BMS2003" board into "HMI10"
2004-03-13 23:29:43 +00:00
wdenk
6629d2f22b SX1 patches: use "serial#" for USB serial #;
use redundand environment storage;
auto-set console on USB port (using preboot command)
2004-03-12 15:38:25 +00:00
wdenk
bdda519d3c Cleanup. 2004-03-12 13:47:56 +00:00
wdenk
232c150a25 Add support for Siemens SX1 mobile phone;
add support for USB-based console
(enable with "setenv stdout usbtty; setenv stdin usbtty")
2004-03-12 00:14:09 +00:00
wdenk
79d696fc55 Fix LOWBOOT configuration for MPC5200 with DDR memory 2004-03-11 22:46:36 +00:00
wdenk
f8d813e34f * Fix SDRAM timings for LITE5200 / IceCube board
* Handle Auti-MDIX / connection status for INCA-IP

* Fix USB problems when attempting to read 0 bytes
2004-03-02 14:05:39 +00:00
wdenk
e7c85689bb * Patch by Travis Sawyer, 26 Feb 2004:
Fix broken compile for XPEDITE1K target.

* Patch by Stephan Linz, 26 Feb 2004:
  Bug fix for NFS code on NIOS targets

* Patch by Stephen Williams, 26 Feb 2004:
  Break up SystemACE reads of large block counts
2004-02-27 08:21:54 +00:00
wdenk
132ba5fdc5 * Patch by Pierre Aubert, 26 Feb 2004
add IDE support for MPC5200

* Patch by Masami Komiya, 26 Feb 2004:
  add autoload via NFS

* Patch by Stephen Williams
  Use of CONFIG_SERIAL_SOFTWARE_FIFO in board.c consistent with uses
  elsewhere in the source.
2004-02-27 08:20:54 +00:00
wdenk
11dadd547c * Patch by Steven Scholz, 25 Feb 2004:
- Timeouts in FPGA code should be based on CFG_HZ
  - Minor cleanup in code for Altera FPGA ACEX1K

* Patch by Steven Scholz, 25 Feb 2004:
  Changed "Directory Hierarchy" section in README

* Patch by Masami Komiya, 25 Feb 2004:
  Reduce copy count in nfs_read_reply() of NFS code
2004-02-27 00:07:27 +00:00
wdenk
80885a9d52 * Patch by Markus Pietrek, 24 Feb 2004:
NS9750 DevBoard added

* Patch by Pierre AUBERT, 24 Feb 2004
  add USB support for MPC5200

* Patch by Steven Scholz, 24 Feb 2004:
  - fix MII commands to use values from last command

* Patch by Torsten Demke, 24 Feb 2004:
  Add support for the eXalion platform (SPSW-8240, F-30, F-300)
2004-02-26 23:46:20 +00:00
wdenk
0c852a2886 * Patch by Rahul Shanbhag, 19 Feb 2004:
Fixes for for OMAP1610 board:
  - shift some IRQ specific code to platform.S file
  - remove duplicatewatchdog reset code from start.S

* Make Auto-MDIX Support configurable on INCA-IP board

* Fix license for mkimage tool
2004-02-26 23:01:04 +00:00
wdenk
a084f7da88 * Patch by Masami Komiya, 24 Feb 2004:
Update NetBootFileXferSize in NFS code

* Patch by Scott McNutt, 24 Feb 2004:
  fix packet length in NFS code
2004-02-24 22:33:21 +00:00
wdenk
5cfbab3d82 Add missing board/dave/B2/B2.c file. 2004-02-24 02:01:43 +00:00
wdenk
cbd8a35c6d * Patch by Masami Komiy, 22 Feb 2004:
Add support for NFS for file download

* Minor code cleanup
2004-02-24 02:00:03 +00:00
wdenk
074cff0d28 * Patch by Andrea Scian, 17 Feb 2004:
Add support for S3C44B0 processor and DAVE B2 board

* Patch by Steven Scholz, 20 Feb 2004:
  - Add support for MII commands on AT91RM9200 boards
  - some cleanup in AT91RM9200 ethernet code
2004-02-24 00:16:43 +00:00
wdenk
028ab6b598 * Patch by Peter Ryser, 20 Feb 2004:
Add support for the Xilinx ML300 platform

* Patch by Stephan Linz, 17 Feb 2004:
  Fix watchdog support for NIOS

* Patch by Josh Fryman, 16 Feb 2004:
  Fix byte-swapping for cfi_flash.c for different bus widths

* Patch by Jon Diekema, 14 Jeb 2004:
  Remove duplicate "FPGA Support" notes from the README file
2004-02-23 23:54:43 +00:00
wdenk
63e73c9a8e * Patches by Reinhard Meyer, 14 Feb 2004:
- update board/emk tree; use common flash driver
  - Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c
    [adapted for other PPC CPUs -- wd]
  - Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c

* Patch by Jon Diekema, 13 Feb 2004:
  Call show_boot_progress() whenever POST "FAILED" is printed.

* Patch by Nishant Kamat, 13 Feb 2004:
  Add support for TI OMAP1610 H2 Board
  Fixes for cpu/arm926ejs/interrupt.c
       (based on Richard Woodruff's patch for arm925, 16 Oct 03)
  Fix for a timer bug in OMAP1610 Innovator
  Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2

* Patches by Stephan Linz, 12 Feb 2004:
  - add support for NIOS timer with variable period preload counter value
  - prepare POST framework support for NIOS targets

* Patch by Denis Peter, 11 Feb 2004:
  add POST support for the MIP405 board
2004-02-23 22:22:28 +00:00
wdenk
cd0a9de68b * Patch by Laurent Mohin, 10 Feb 2004:
Fix buffer overflow in common/usb.c

* Patch by Tolunay Orkun, 10 Feb 2004:
  Add support for Cogent CSB272 board

* Code cleanup
2004-02-23 20:48:38 +00:00
wdenk
2d1a537d87 * Patch by Thomas Elste, 10 Feb 2004:
Add support for NET+50 CPU and ModNET50 board

* Patch by Sam Song, 10 Feb 2004:
  Fix typos in cfi_flash.c

* Patch by Leon Kukovec, 10 Feb 2004
  Fixed long dir entry slot id calculation in get_vfatname

* Patch by Robin Gilks, 10 Feb 2004:
  add "itest" command (operators: -eq, -ne, -lt, -gt, -le, -ge, ==,
  !=, <>, <, >, <=, >=)
2004-02-23 19:30:57 +00:00
wdenk
3f85ce2785 * CVS add missing files
* Cleanup compiler warnings

* Fix problem with side effects in macros in include/usb.h

* Patch by David Benson, 13 Nov 2003:
  bug 841358 - fix TFTP download size limit

* Fixing bug 850768:
  improper flush_cache() in load_serial()

* Fixing bug 834943:
  MPC8540 - missing volatile declarations

* Patch by Stephen Williams, 09 Feb 2004:
  Add support for Xilinx SystemACE chip:
  - New files common/cmd_ace.c and include/systemace.h
  - Hook systemace support into cmd_fat and the partition manager

* Patch by Travis Sawyer, 09 Feb 2004:
  Add bi_opbfreq & bi_iic_fast to 440GX bd_info as needed for Linux
2004-02-23 16:11:30 +00:00
wdenk
3c74e32a98 * Patch by Travis Sawyer, 09 Feb 2004:
o 440GX:
    - Fix PCI Indirect access for type 1 config cycles with ppc440.
    - Add phymode for 440 enet
    - fix pci pre init
  o XPedite1K:
    - Change board_pre_init to board_early_init_f
    - Add user flash to bus controller setup
    - Fix pci pre init
    - Fix is_pci_host to check GPIO for monarch bit
    - Force xpedite1k to pci conventional mode (via #define option)

* Patch by Brad Kemp, 4 Feb 2004:
  - handle the machine check that is generated during the PCI scans
    on 82xx processors.
  - define the registers used in the IMMR by the PCI subsystem.

* Patch by Pierre Aubert, 03 Feb 2004:
  cpu/mpc5xxx/start.S: copy MBAR into SPR311

* Patch by Jeff Angielski, 03 Feb 2004:
  Fix copy & paste error in cpu/mpc8260/pci.c

* Patch by Reinhard Meyer, 24 Jan 2004:
  Fix typo in cpu/mpc5xxx/pci_mpc5200.c
2004-02-22 23:46:08 +00:00
wdenk
cf56e11019 Add Auto-MDIX support for INCA-IP 2004-02-20 22:02:48 +00:00
wdenk
198ea9e294 Last minute fixes / cleanup. 2004-02-12 15:11:57 +00:00
wdenk
b2daeb8e0f Fix typo.
Release version 1.0.2
2004-02-12 14:09:38 +00:00
wdenk
bf9e3b38f7 * Some code cleanup
* Patch by Josef Baumgartner, 10 Feb 2004:
  Fixes for Coldfire port

* Patch by Brad Kemp, 11 Feb 2004:
  Fix CFI flash driver problems
2004-02-12 00:47:09 +00:00
wdenk
a2d18bb7d3 * Make sure to use a bus clock divider of 2 only when running TQM8xxM
modules at CPU clock frequencies above 66 MHz.

* Optimize flash programming speed for LWMON (by another 100% :-)
2004-02-11 21:35:18 +00:00
wdenk
cd37d9e6e5 * Patch by Jian Zhang, 3 Feb 2004:
- Changed the incorrect FAT12BUFSIZE
  - data_begin in fsdata can be negative. Changed it to be short.
* Code cleanup
2004-02-10 00:03:41 +00:00
wdenk
ec4c544bed Patches by Stephan Linz, 30 Jan 2004:
1: - board/altera/common/flash.c:flash_erase():
     o allow interrupts befor get_timer() call
     o check-up each erased sector and avoid unexpected timeouts
   - board/altera/dk1c20/dk1s10.c:board_early_init_f():
     o enclose sevenseg_set() in cpp condition
   - remove the ASMI configuration for DK1S10_standard_32 (never present)
   - fix some typed in mistakes in the NIOS documentation
2: - split DK1C20 configuration into several header files:
     o two new files for each NIOS CPU description
     o U-Boot related part is remaining in DK1C20.h
3: - split DK1S10 configuration into several header files:
     o two new files for each NIOS CPU description
     o U-Boot related part is remaining in DK1S10.h
4: - Add support for the Microtronix Linux Development Kit
     NIOS CPU configuration at the Altera Nios Development Kit,
     Stratix Edition (DK-1S10)
5: - Add documentation for the Altera Nios Development Kit,
     Stratix Edition (DK-1S10)
6: - Add support for the Nios Serial Peripharel Interface (SPI)
     (master only)
7: - Add support for the common U-Boot SPI framework at
     RTC driver DS1306
2004-02-09 23:12:24 +00:00
wdenk
b98fff1d6a * Patch by Rahul Shanbhag, 28 Jan 2004:
Fix flash protection/locking handling for OMAP1610 innovator board.

* Patch by Rolf Peukert, 28 Jan 2004:
  fix flash write problems on CSB226 board (write with 32 bit bus width)

* Patches by Mark Jonas, 16 Jan 2004:
  - fix rounding error when calculating baudrates for MPC5200 PSCs
  - make sure CFG_RAMBOOT and CFG_LOWBOOT are not enabled at the same
    time which is not supported
2004-02-09 20:51:26 +00:00
wdenk
5653fc335a * Patch by Yuli Barcohen, 26 Jan 2004:
Allow bzip2 compression for small memory footprint boards

* Patch by Brad Kemp, 21 Jan 2004:
  Add support for CFI flash driver for both the Intel and the AMD
  command sets.

* Patch by Travis Sawyer, 20 Jan 2004:
  Fix pci bridge auto enumeration of sibling p2p bridges.

* Patch by Tolunay Orkun, 12 Jan 2004:
  Add some delays as needed for Intel LXT971A PHY support

* Patches by Stephan Linz, 09 Jan 2004:
  - avoid warning: unused variable `piop' in board/altera/common/sevenseg.c
  - make DK1C20 board configuration related to ASMI conform to
    documentation
2004-02-08 22:55:38 +00:00
wdenk
f6e20fc6ca Patch by Anders Larsen, 09 Jan 2004:
ARM memory layout fixes: the abort-stack is now set up in the
correct RAM area, and the BSS is zeroed out as it should be.

Furthermore, the magic variables 'armboot_end' and 'armboot_end_data'
of the linker scripts are replaced by '__bss_start' and '_end',
resp., which is a further step to eliminate unnecessary differences
between the implementation of the CPU architectures.
2004-02-08 19:38:38 +00:00
wdenk
f4863a7aec * Patch by liang a lei, 9 Jan 2004:
Fix Intel 28F128J3 ID in include/flash.h

* Patch by Masami Komiya, 09 Jan 2004:
  add support for TB0229 board (NEC VR4131 MIPS processor)

* Patch by Leon Kukovec, 12 Dec 2003:
  changed extern __inline__ into static __inline__ in
  include/linux/byteorder/swab.h
2004-02-07 01:27:10 +00:00
wdenk
ba56f62576 Patch by Travis Sawyer, 30 Dec 2003:
Add support for IBM PPC440GX. Multiple EMAC Ethernet devices,
select MDI port based on enabled EMAC device.
Add support for XES Inc <http://www.xes-inc.com> XPedite1000 440GX
base PrPMC board.
2004-02-06 23:19:44 +00:00
wdenk
a6cccaea5a * Patch by Wolter Kamphuis, 15 Dec 2003:
made CONFIG_SILENT_CONSOLE usable on all architectures

* Disable date command on TQM866M - there is no RTC on MPC866
2004-02-06 21:48:22 +00:00
wdenk
5e4be00fb0 Fix bootfile default settings for TQM boards 2004-01-31 20:13:31 +00:00
wdenk
75d1ea7f6a Fix variable CPU clock for MPC859/866 systems for low CPU clocks 2004-01-31 20:06:54 +00:00
wdenk
6876609446 * Implement adaptive SDRAM timing configuration based on actual CPU
clock frequency for INCA-IP; fix problem with board hanging when
  switching from 150MHz to 100MHz

* Add PCMCIA CS support for BMS2003 board
2004-01-29 09:22:58 +00:00
wdenk
c178d3da6f * Add variable CPU clock for MPC859/866 systems (so far only TQM866M):
see doc/README.MPC866 for details;
  implement workaround for "SIU4" and "SIU9" silicon bugs on MPC866;
  calculate CPU clock frequency from PLL register values.

* Add support for 128 MB RAM on TQM8xxL/M modules
2004-01-24 20:25:54 +00:00
wdenk
ef978730dc * Fix PS/2 keyboard problem caused by statically initialized variable
pointing to a location in flash

* Fix INCA-IP clock calculation: 400/3 = 133.3 MHz, not 130.
2004-01-21 20:46:28 +00:00
wdenk
c837dcb1a3 * The PS/2 mux on the BMS2003 board needs 450 ms after power on
before we can access it; add delay in case we are faster (with no
  CF card inserted)

* Cleanup of some init functions

* Make sure SCC Ethernet is always stopped by the time we boot Linux
  to avoid Linux crashes by early packets coming in.

* Accelerate flash accesses on LWMON board by using buffered writes
2004-01-20 23:12:12 +00:00
wdenk
b0aef11c9f Fix typo in Makefile;
fix problem with PARTNUM detection
2004-01-18 18:21:54 +00:00
wdenk
1c43771ba8 [Strange. I _did_ check these in before. Seems SF restored an old
version of the repository???]

* Patch by Reinhard Meyer, 09 Jan 2004:
  - add RTC support for MPC5200 based boards (requires RTC_XTAL)

* Add support for IDE LED on BMS2003 board
  (exclusive with status LED!)

* Add support for PS/2 keyboard (used with PS/2 multiplexor on
  BMS2003 board)

* Patches by Reinhard Meyer, 4 Jan 2004 + 7 Jan 2004:
  Add common files for "emk" boards
2004-01-16 00:30:56 +00:00
wdenk
c83bf6a2d0 Add a common get_ram_size() function and modify the the
board-specific files to invoke that common implementation.
2004-01-06 22:38:14 +00:00
wdenk
b299e41a0d Fix comment. 2004-01-06 11:32:21 +00:00
wdenk
b34ff81d9b Set default clock for INCA-IP to 150 MHz
Prepare for 1.0.1 release
2004-01-06 11:13:56 +00:00
wdenk
a522fa0e7c * Make BMS2003 use a separate config file to avoid #ifdef mess;
add I2C support; add support for DS1337 RTC

* Add CompactFlash support  for BMS2003 board

* Add support for status LED on BMS2003 board
2004-01-04 22:51:12 +00:00
wdenk
180d3f74e4 * Fix problems caused by Robert Schwebel's cramfs patch
* Patch by Scott McNutt, 02 Jan 2004:
  Add support for the Nios Active Serial Memory Interface (ASMI)
  on Cyclone devices

* Patch by Andrea Marson, 16 Dec 2003:
  Add support for the PPChameleon ME and HI modules

* Patch by Yuli Barcohen, 22 Dec 2003:
  Add support for Motorola DUET ADS board (MPC87x/88x)
2004-01-04 16:28:35 +00:00
wdenk
dd875c767e * Patch by Robert Schwebel, 15 Dec 2003:
add support for cramfs (uses JFFS2 command interface)
2004-01-03 21:24:46 +00:00
wdenk
c935d3bd8b Patches by Stephan Linz, 11 Dec 2003:
- more documentation for NIOS port
- new struct nios_pio_t, struct nios_spi_t
- Reconfiguration for NIOS Development Kit DK1C20:
  o move board related code from board/dk1c20
    to board/altera/dk1c20
  o create a new common source path board/altera/common
    and move generic flash access stuff into it
  o change/expand configuration file DK1C20.h
- Add support for NIOS Development Kit DK1S10
- Add status LED support for NIOS systems
- Add dual 7-segment LED support for Altera NIOS DevKits
2004-01-03 19:43:48 +00:00
wdenk
3a473b2a65 * Patch by Ronen Shitrit, 10 Dec 2003:
Add support for the Marvell DB64360 / DB64460 development boards

* Patch by Detlev Zundel, 10 Dec 2003:
  fix dependency problem in examples/Makefile
2004-01-03 00:43:19 +00:00
wdenk
b6e4c4033c * Patch by Denis Peter, 8 Dec 2003
- add support for the PATI board (MPC555)
  - add SPI support for the MPC5xx

* Patch by Anders Larsen, 08 Dec 2003:
  add configuration options CONFIG_SERIAL_TAG and CONFIG_REVISION_TAG
  to pass ATAG_SERIAL and ATAG_REVISION, resp., to the ARM target;
  cleanup some redundand #defines
2004-01-02 16:05:07 +00:00
wdenk
63f3491242 * Patch by Andr Schwarz, 8 Dec 2003:
fixes for Davicom DM9102A Ethernet Chip (#define CONFIG_TULIP_FIX_DAVICOM):
  - TX and RX deskriptors must be quad-word aligned
  - does not work with only one TX deskriptor
  - standard reset method does not work

* Patch by Masami Komiya, 08 Dec 2003:
  add RTL8139 ethernet driver

* Patches by Ed Okerson, 07 Dec 2003:
  - fix ethernet for the AU1x00 processors in little-endian mode.
  - extend memsetup.S for the AU1x00 processors in BE and LE modes
2004-01-02 15:01:32 +00:00
wdenk
d4ca31c40e * Cleanup lowboot code for MPC5200
* Minor code cleanup (coding style)

* Patch by Reinhard Meyer, 30 Dec 2003:
  - cpu/mpc5xxx/fec.c: added CONFIG_PHY_ADDR, added CONFIG_PHY_TYPE,
  - added CONFIG_PHY_ADDR to include/configs/IceCube.h,
  - turned debug print of PHY registers into a function (called in two places)
  - added support for EMK MPC5200 based modules

* Fix MPC8xx PLPRCR_MFD_SHIFT typo

* Add support for TQM866M modules

* Fixes for TQM855M with 4 MB flash (Am29DL163 = _no_ mirror bit flash)

* Fix a few compiler warnings
2004-01-02 14:00:00 +00:00
wdenk
c18960049f Patch by Reinhard Meyer, 28 Dec 2003:
Add initial support for TOP5200 board
2003-12-28 11:44:59 +00:00
wdenk
a2f34be7dd Cleanup 2003-12-27 19:29:48 +00:00
wdenk
7cb22f97ee * Make CPU clock on ICA-IP board controllable by a "cpuclk"
environment variable which can set to "100", "133", or "150". The
  CPU clock will be configured accordingly upon next reboot. Other
  values are ignored. In case of an invalid or undefined "cpuclk"
  value, the compile-time default CPU clock speed will be used.

* Enable Quad-UART on BMS2003 board (initialize the PCMCIA memory
  window that is used to access the UART registers by the Linux driver)

* Patch by Reinhard Meyer, 20 Dec 2003:
  Fix clock calculation for the MPC5200 for higher clock frequencies
  (above 2**32 / 10 = 429.5 MHz).
2003-12-27 19:24:54 +00:00
wdenk
b2001f273f * Fix IceCube CLKIN configuration (it's 33.000000MHz)
* Add new configuration for IceCube board with DDR memory

* Update TRAB memory configurations
2003-12-20 22:45:10 +00:00
wdenk
5c745d2613 Add JFFS2 support for INCA-IP board 2003-12-12 00:02:26 +00:00
wdenk
50015ab3e1 Minor reformatting 2003-12-09 20:22:16 +00:00
stroese
d4f58f785d Patch by Bill Hargen, 09 Dec 2003. 2003-12-09 15:04:55 +00:00
stroese
510ca13b15 BUBINGA405EP added. 2003-12-09 15:04:00 +00:00
stroese
e075fbe66c Updated for PPC405EP boards. 2003-12-09 14:59:11 +00:00
stroese
abcac8725f Fix output for "Unprotecting". 2003-12-09 14:58:22 +00:00
stroese
38a951956b Debug printf's removed. 2003-12-09 14:57:03 +00:00
stroese
939403bca9 Updated for PPC405EP boards (2 banks only). 2003-12-09 14:56:24 +00:00
stroese
b828dda657 BUBINGA405EP port fixed. 2003-12-09 14:54:43 +00:00
wdenk
4e5ca3eb67 * Patch by Bernhard Kuhn, 28 Nov 2003:
add support for Coldfire CPU
  add support for Motorola M5272C3 and M5282EVB boards
2003-12-08 01:34:36 +00:00
wdenk
9fd5e31fe0 * Patch by Pierre Aubert, 24 Nov 2003:
- add a return value for the fpga command
  - add ide_preinit() function called in ide_init if CONFIG_IDE_PREINIT
    is defined. If ide_preinit fails, ide_init is aborted.
  - fix an endianess problem in fat.h
2003-12-07 23:55:12 +00:00
wdenk
3bbc899fc0 Patch by Wolter Kamphuis, 05 Dec 2003:
Add support for SNMC's QS850/QS823/QS860T boards
2003-12-07 22:27:15 +00:00
wdenk
b028f71513 * Patch by Yuli Barcohen, 3 Dec 2003:
"revive" U-Boot support for old Motorola MPC860ADS board

* Patch by Cam(ilo?), 03 Dec 2003:
  make examples build even with broken Montavista objcopy

* Patch by Pavel Bartusek, 27 Nov 2003:
  fix conversion problem with "bootretry" evironment variable
2003-12-07 21:39:28 +00:00
wdenk
b4676a25e2 * Patch by Andre Schwarz, 24 Nov 2003:
add support for mvblue (mvBlueLYNX and mvBlueBOX) boards

* Patch by Pavel Bartusek, 21 Nov 2003:
  set ZMII bridge speed on 440

* Patch by Anders Larsen, 17 Nov 2003:
  Fix mismatched #ifdef / #endif in include/asm-arm/arch-pxa/hardware.h
2003-12-07 19:24:00 +00:00
wdenk
a2663ea4fc * Patches by David Mller, 14 Nov 2003:
- board/mpl/common/common_util.c
    * implement support for BZIP2 compressed images
    * various cleanups (printf -> puts, ...)
  - board/mpl/common/flash.c
    * report correct errors to upper layers
    * check the erase fail and VPP low bits in status reg
  - board/mpl/vcma9/cmd_vcma9.c
  - board/mpl/vcma9/flash.c
    * various cleanups (printf -> puts, ...)
  - common/cmd_usb.c
    * fix typo in comment
  - cpu/arm920t/usb_ohci.c
    * support for S3C2410 is missing in #if line
  - drivers/cs8900.c
    * reinit some registers in case of error (cable missing, ...)
  - fs/fat/fat.c
    * support for USB/MMC devices is missing in #if line
  - include/configs/MIP405.h
  - include/configs/PIP405.h
    * enable BZIP2 support
    * enlarge malloc space to 1MiB because of BZIP2 support
  - include/configs/VCMA9.h
    * enable BZIP2 support
    * enlarge malloc space to 1MiB because of BZIP2 support
    * enable USB support
  - lib_arm/armlinux.c
    * change calling convention of ARM Linux kernel as
      described on http://www.arm.linux.org.uk/developer/booting.php

* Patch by Thomas Lange, 14 Nov 2003:
  Split dbau1x00 into dbau1000, dbau1100 and dbau1500 configs to
  support all these AMD boards.

* Patch by Thomas Lange, 14 Nov 2003:
  Workaround for mips au1x00 physical memory accesses (the au1x00
  uses a 36 bit bus internally and cannot access physical memory
  directly. Use the uncached SDRAM address instead of the physical
  one.)
2003-12-07 18:32:37 +00:00
wdenk
ef5a9672c7 * Patch by Xue Ligong (Joe), 13 Nov 2003:
add Realtek 8019 ethernet driver

* Patch by Yuli Barcohen, 13 Nov 2003:
  MPC826xADS/PQ2FADS  cleanup

* Patch by Anders Larsen, 12 Nov 2003:
  Update README to mark the PORTIO commands non-standard
2003-12-07 00:46:27 +00:00
wdenk
5779d8d985 * Patch by Nicolas Lacressonnire, 12 Nov 2003:
update for for Atmel AT91RM9200DK development kit:
  - support for environment variables in DataFlash
  - Atmel DataFlash AT45DB1282 support

* Patch by Jeff Carr, 11 Nov 2003:
  add support for new version of 8270 processors

* Patches by George G. Davis, 05 Nov 2003:
  - only pass the ARM linux initrd tag to the kernel when an initrd
    is actually present
  - update omap1510inn configuration file
2003-12-06 23:55:10 +00:00
wdenk
8bf3b005dd * Patches by Stephan Linz, 3 Nov 2003:
- more endianess fixes for LAN91C111 driver
  - CFG_HZ configuration patch for NIOS Cyclone board

* Patch by Stephan Linz, 28 Oct 2003:
  fix PHY_INT_REG vs. PHY_MASK_REG bug in drivers/smc91111.c

* Patch by Steven Scholz, 20 Oct 2003:
  - make "mii info <addr>" show infor for PHY at "addr" only
  - Endian fix for miiphy_info()
2003-12-06 23:20:41 +00:00
wdenk
a8c7c708a9 * Patch by Gleb Natapov, 19 Sep 2003:
Move most of the timer interrupt related PPC code to ppc_lib/interrupts.c

* Patch by Anders Larsen, 17 Sep 2003:
  Bring ARM memory layout in sync with the documentation:
  stack and malloc-heap are now located _below_ the U-Boot code
2003-12-06 19:49:23 +00:00
wdenk
fa1399ed12 Accelerate booting on TRAB board: read and check autoupdate image
headers first instead of always reading the whole images.
2003-12-06 11:20:01 +00:00
wdenk
b96619a117 Fix typo in MPC5XXX code (pointed out by Victor Wren) 2003-12-05 21:08:38 +00:00
wdenk
af6d1dfc7f * Enabled password check on RMU board
* Fix configuration problem with IceCube in LOWBOOT configuration:
  environment got embedded, corrupting the image layout.
2003-12-03 23:53:42 +00:00
wdenk
fd3103bb8e Add support for BMS2003 board
(featuring a NEC NL6448BC33-54. 10.4", 640x480 TFT display).
Fix NEC display names (it's 6440 [for 640x480], not 6640).
2003-11-25 16:55:19 +00:00
wdenk
b4757cee52 Fix flash driver for TRAB board (must use Unlock Bypass Reset command
to exit Unlock Bypass Mode); adjust timings for flash, SRAM and CPLD
2003-11-17 21:45:27 +00:00
wdenk
5bb226e821 * Use "-fPIC" instead of "-mrelocatable" to prevent problems with
recent tools

* Add checksum verification to 'imls' command

* Add bd_info fields needed for 4xx Linux I2C driver

* Patch by Martin Krause, 4 Nov. 2003:
  Fix error in cmd_vfd.c (TRAB board: "vfd /1" shows now only one Bitmap)

* Print used network interface when CONFIG_NET_MULTI is set
2003-11-17 21:14:37 +00:00
wdenk
5cf9da4821 * Patch by Bernhard Kuhn, 28 Oct 2003:
Add low boot support for MPC5200

* Fix problem with dual PCMCIA support (NSCU)

* Fix MPC5200 I2C initialization function
2003-11-07 13:42:26 +00:00
wdenk
b13fb01a62 * Fix parameter passing to standalone images with bootm command
* Patch by Kyle Harris, 30 Oct 2003:
  Fix build errors for ixdp425 board

* Patch by David M. Horn, 29 Oct 2003:
  Fixes to build under CYGWIN

* Get IceCube MGT5100 working (again)
2003-10-30 21:49:38 +00:00
wdenk
5fa66df63a * Prepare for release
* Fix problems in memory test on some boards (which was not
  non-destructive as intended)

* Patch by Gary Jennejohn, 28 Oct 2003:
  Change fs/fat/fat.c to put I/O buffers in BSS instead on the stack
  to prevent stack overflow on ARM systems
2003-10-29 23:18:55 +00:00
wdenk
a0f2fe524c * Patch by Stephan Linz, 28 Oct 2003:
fix init sequence error for NIOS port

* Allow lowercase spelling for IceCube_5200; support MPC5200LITE name

* Add CONFIG_VERSION_VARIABLE to TRAB configuration
2003-10-28 09:14:21 +00:00
wdenk
a57a496f4d * Patch by Xiao Xianghua, 23 Oct 2003:
small patch for mpc85xx

* Fix small problem in MPC5200 I2C driver

* Fix FCC3 support on ATC board
2003-10-26 22:52:58 +00:00
dzu
8cb8143ef7 * Correct header printing for multi-image files in do_bootm()
* Make CONFIG_SILENT_CONSOLE work with CONFIG_AUTOBOOT_KEYED
2003-10-24 13:14:45 +00:00
wdenk
4654af27b8 Fix PCI problems on PPChameleon board 2003-10-22 09:00:28 +00:00
wdenk
a3ad8e26a4 * Patch by Steven Scholz, 18 Oct 2003:
Fix AT91RM9200 ethernet driver

* Patch by Nye Liu, 17 Oct 2003:
  Fix typo in include/mpc8xx.h

* Patch by Richard Woodruff, 16 Oct 03:
  Fixes for cpu/arm925/interrupt.c
  - Initialize timestamp & lastdec vars.
  - fix timestamp overflows.
  - fix lastdec overflow.
  - smarter normalization to allow udelay() below 1ms to work.

* Patch by Scott McNutt, 16 Oct
  add networking support for the Altera Nios Development Kit,
  Cyclone Edition (DK-1C20)

* Patch by Jon Diekema, 14 Oct 2003:
  add hint about doc/README.silent to README file
2003-10-19 23:22:11 +00:00
wdenk
d7281f4109 * Fix PCI problems on PPChameleonEVB
* TRAB auto-update: image type patch by Martin Krause, 17 Oct 2003
2003-10-19 22:30:08 +00:00
dzu
e7df029f1a Add CompactFlash support for NSCU 2003-10-19 21:43:26 +00:00
wdenk
3d1e8a9d4e TRAB auto-update: Base decision if we have to strip the image
header on image type as encoded in the header
2003-10-16 12:53:35 +00:00
wdenk
42d1f0394b * Patches by Xianghua Xiao, 15 Oct 2003:
- Added Motorola CPU 8540/8560 support (cpu/85xx)
  - Added Motorola MPC8540ADS board support (board/mpc8540ads)
  - Added Motorola MPC8560ADS board support (board/mpc8560ads)

* Minor code cleanup
2003-10-15 23:53:47 +00:00
wdenk
2d5b561e2b * Make sure HUSH is initialized for running auto-update scripts
* Make 5200 reset command _really_ reset the board, without running
  any other code after it

* Fix flash mapping and display on P3G4 board

* Patch by Kyle Harris, 15 Jul 2003:
  - add support for Intel IXP425 CPU
  - add support for IXDP425 eval board
2003-10-14 19:43:55 +00:00
wdenk
f72da3406b Added config option CONFIG_SILENT_CONSOLE. See doc/README.silent
for more information
2003-10-10 10:05:42 +00:00
wdenk
5da627a424 * Patch by Steven Scholz, 10 Oct 2003
- Add support for Altera FPGA ACEX1K

* Patches by Thomas Lange, 09 Oct 2003:
  - Endian swap ATA identity for all big endian CPUs, not just PPC
  - MIPS only: New option CONFIG_MEMSIZE_IN_BYTES for passing memsize
    args to linux
  - add support for dbau1x00 board (MIPS32)
2003-10-09 20:09:04 +00:00
wdenk
15647dc7fd * Patches by Thomas Lange, 09 Oct 2003:
- fix cmd_ide.c for non ppc boards (read/write functions did not
    add ATA base address)
  - fix for shannon board
  - #ifdef CONFIG_IDE_8xx_DIRECT some otherwise unused code

* Patch by Sangmoon Kim, 07 Oct 2003:
  add support for debris board
2003-10-09 19:00:25 +00:00
wdenk
a0ff7f2eda * Patch by Martin Krause, 09 Oct 2003:
Fixes for TRAB board
  - /board/trab/rs485.c: correct baudrate
  - /board/trab/cmd_trab.c: bug fix for problem with timer overflow in
    udelay(); fix some timing problems with adc controller
  - /board/trab/trab_fkt.c: add new commands: gain, eeprom and power;
    modify commands: touch and buzzer

* Disable CONFIG_SUPPORT_VFAT when used with CONFIG_AUTO_UPDATE
  (quick & dirty workaround for rogue pointer problem in get_vfatname());
  Use direct function calls for auto_update instead of hush commands
2003-10-09 13:16:55 +00:00
wdenk
4a5517094d * Patch by Scott McNutt, 04 Oct 2003:
- add support for Altera Nios-32 CPU
  - add support for Nios Cyclone Development Kit (DK-1C20)

* Patch by Steven Scholz, 29 Sep 2003:
  - A second parameter for bootm overwrites the load address for
    "Standalone Application" images.
  - bootm sets environment variable "filesize" to the resulting
    (uncompressed) data length for "Standalone Application" images
    when autostart is set to "no". Now you can do something like
       if bootm $fpgadata $some_free_ram ; then
               fpga load 0 $some_free_ram $filesize
       fi

* Patch by Denis Peter, 25 Sept 2003:
  add support for the MIP405 Rev. C board
2003-10-08 23:26:14 +00:00
wdenk
54387ac931 * Patch by Yuli Barcohen, 25 Sep 2003:
add support for Zephyr Engineering ZPC.1900 board

* Patch by Anders Larsen, 23 Sep 2003:
  add CMD_PORTIO to CFG_CMD_NONSTD (commands in question are only
  implemented for the x86 architecture)
2003-10-08 22:45:44 +00:00
wdenk
fc3e2165ef * Patch by Sangmoon Kim, 23 Sep 2003:
fix pll_pci_to_mem_multiplier table for MPC8245

* Patch by Anders Larsen, 22 Sep 2003:
  enable timed autoboot on PXA

* Patch by David Mller, 22 Sep 2003:

  - add $(CFLAGS) to "-print-libgcc-filename" so compiler driver
    returns correct libgcc file path
  - "latency" reduction of busy-loop waiting to improve "U-Boot" boot
    time on s3c24x0 systems

* Patch by Jon Diekema, 19 Sep 2003:
  - Add CFG_FAULT_ECHO_LINK_DOWN option to echo the inverted Ethernet
    link state to the fault LED.
  - In NetLoop, make the Fault LED reflect the link status.  The link
    status gets updated on entry, and on timeouts.
2003-10-08 22:33:00 +00:00
wdenk
ef1464cc01 * Patch by Anders Larsen, 18 Sep 2003:
allow mkimage to build and run on Cygwin-hosted systems

* Patch by Frank Mller, 18 Sep 2003:
  use bi_intfreq instead of bi_busfreq to compute fec_mii_speed in
  cpu/mpc8xx/fec.c

* Patch by Pantelis Antoniou, 16 Sep 2003:
  add tool to compute fileds in the PLPRCR register for MPC86x
2003-10-08 22:14:02 +00:00
wdenk
d9a405aaf6 Use IH_TYPE_FILESYSTEM for TRAB "disk" images. 2003-10-07 20:01:55 +00:00
wdenk
147031aef1 Fix build problems under FreeBSD 2003-10-07 10:33:38 +00:00
wdenk
887b372f5d Add generic filesystem image type 2003-10-06 22:00:45 +00:00
wdenk
fbe4b5cbde * Update TRAB auto update code
* Make fatload set filesize environment variable
  fix potential buffer overlow problem

* enable basic / medium / high-end configurations for PPChameleonEVB
  board; fix NAND code

* enable TFTP client code to specify to the server the desired
  timeout value (see RFC-2349)
2003-10-06 21:55:32 +00:00
dzu
bb65a31267 Improve SDRAM setup for TRAB board 2003-09-30 15:22:12 +00:00
dzu
88a1bfa8b8 Suppress all output with splashscreen configured only if "splashimage"
is set
2003-09-30 15:11:43 +00:00
dzu
cad07371fc * Fix problems with I2C support for mpc5200 2003-09-30 14:36:51 +00:00
dzu
ab209d5107 Fix problems with I2C support for mpc5200 2003-09-30 14:08:43 +00:00
dzu
87970ebeb5 Suppress all output with splashscreen configured only if "splashimage"
is set
2003-09-29 21:55:54 +00:00
dzu
8a42eac744 * Adapt TRAB configuration and auto_update to new memory layout 2003-09-29 21:55:54 +00:00
dzu
91e940d9bc Add configuration for wtk board 2003-09-25 22:32:40 +00:00
dzu
29127b6a23 Add support for the Sharp LQ065T9DR51U LCD display 2003-09-25 22:30:12 +00:00
wdenk
1d70468b03 "start" may be legitimately 0x0000 2003-09-19 08:29:25 +00:00
wdenk
c3d98ed9ca Update MPC5200 port pin configuration for Linux CAN drivers. 2003-09-18 20:10:12 +00:00
wdenk
80369866a4 Work on TRAB's auto_update feature.
Cleanup for submitted patches.
2003-09-18 18:55:25 +00:00
wdenk
65bd0e284b * Patch by Rune Torgersen, 17 Sep 2003:
- Fixes for MPC8266 default config
  - Allow eth_loopback_test() on 8260 to use a subset of the FCC's
2003-09-18 10:45:21 +00:00
wdenk
206c60cbea * Patches by Jon Diekema, 17 Sep 2003:
- update README (SHOW_BOOT_PROGRESS values for cmd_nand.c and
    env_common.c)
  - sbc8260 tweaks
  - adjust "help" output
2003-09-18 10:02:25 +00:00
wdenk
5f535fe170 * Patches by Anders Larsen, 17 Sep 2003:
- fix spelling errors
  - set GD_FLG_DEVINIT flag only after device function pointers
    are valid
  - Allow CFG_ALT_MEMTEST on systems where address zero isn't
    writeable
  - enable 3.rd UART (ST-UART) on PXA(XScale) CPUs
  - trigger watchdog while waiting in serial driver
2003-09-18 09:21:33 +00:00
wdenk
b0639ca332 Support new configuration of TRAB board with more memory
Minor cleanup of comments
2003-09-17 22:48:07 +00:00
wdenk
f54ebdfa28 Add auto-update code for TRAB board using USB memory sticks 2003-09-17 15:10:32 +00:00
wdenk
34b3049a60 Code cleanup 2003-09-16 21:07:28 +00:00
wdenk
ef709e9230 * Disable MPC5200 bus pipelining as workaround for bus contention 2003-09-16 17:35:37 +00:00
wdenk
a57106fcb3 * Fix timeout problems with 1st packet on MPC5200 2003-09-16 17:29:31 +00:00
wdenk
373e6bec13 Disable MPC5200 bus pipelining as workaround for bus contention 2003-09-16 17:20:34 +00:00
wdenk
4aeb251f90 * Modify XLB arbiter priorities on MPC5200 so all devices use same
priority; configure critical interrupts to be handled like external
  interrupts
2003-09-16 17:06:05 +00:00
wdenk
acf98e7f30 Make IPB clock on MGT5100/MPC5200 configurable in board config file;
go back to 66 MHz for stability
2003-09-16 11:39:10 +00:00
wdenk
b56ddc636d Cleanup of code, output formatting, and indentation. 2003-09-15 21:14:37 +00:00
wdenk
78137c3c93 * Patches by Jon Diekema, 15 Sep 2003:
- add description for missing CFG_CMD_* entries in the README file
  - sacsng tweaks:
   include/configs/sacsng.h:
       + Support extra bootp options like: 2nd DNS and send hostname
       + Enabling ping and irq command
       + Adding defines for a bunch of misc configrabled options
         (patches for these options will be coming)
       + Adding watchdog support, but it isn't enabled yet.

   board/sacsng/sacsng.c:

       + Suppressing unneeded output when the quiet environment
	 is non-zero.
       + show_boot_progress() now accepts any negative number as a
	 failure code.
       + show_boot_progress() flashes the error code 5 times, and
         then resets the board to retry the boot from the top

* Patch by Gleb Natapov, 14 Sep 2003:
  enable watchdog support for all MPC824x boards that have a watchdog
2003-09-15 18:00:00 +00:00
wdenk
35656de729 * Patch by Gleb Natapov, 14 Sep 2003:
enable watchdog support for all MPC824x boards that have a watchdog

* On MPC5200, restrict FEC to a maximum of 10 Mbps to work around the
  "Non-octet Aligned Frame" errors we see at 100 Mbps

* Patch by Sharad Gupta, 14 Sep 2003:
  fix SPR numbers for upper BAT register ([ID]BAT[4-7][UL])
2003-09-14 19:08:39 +00:00
wdenk
200f8c7a4c * Patch by llandre, 11 Sep 2003:
update configuration for PPChameleonEVB board
2003-09-13 19:13:29 +00:00
wdenk
531716e171 * Patch by David Mller, 13 Sep 2003:
various changes to VCMA9 board specific files

* Add I2C support for MGT5100 / MPC5200
2003-09-13 19:01:12 +00:00
wdenk
b70e7a00c8 * Patch by Rune Torgersen, 11 Sep 2003:
Changed default memory option on MPC8266ADS to NOT be Page Based
  Interleave, since this doesn't work very well with the standard
  16MB DIMM

* Patch by George G. Davis, 12 Sep 2003:
  fix Makefile settings for sk98 driver
2003-09-12 20:09:09 +00:00
wdenk
f5300ab241 Move TRAB burn-in tests to TRAB board directory 2003-09-12 15:35:15 +00:00
stroese
68ce8957e5 Patch by Stefan Roese, 12 Sep 2003 2003-09-12 08:57:52 +00:00
stroese
72cd5aa703 New boards DP405, HUB405, PLU405, VOH405 added. 2003-09-12 08:57:15 +00:00
stroese
13fdf8a6ba New board config file added. 2003-09-12 08:55:18 +00:00
stroese
2853d29b52 Update configuration. 2003-09-12 08:53:54 +00:00
stroese
428c563938 PPC405EP: set vendor id. 2003-09-12 08:52:09 +00:00
stroese
342f551bc9 Disable memory controller before setting first values. 2003-09-12 08:49:58 +00:00
stroese
ef9e86854e PMC405 update. 2003-09-12 08:46:58 +00:00
stroese
09433a781b PCI405 update. 2003-09-12 08:46:10 +00:00
stroese
1b554406cc CPCI405(AB) update. 2003-09-12 08:44:46 +00:00
stroese
895af12a21 ASH405 update. 2003-09-12 08:43:46 +00:00
stroese
9a2dd74032 Xilinx jtag tool added. 2003-09-12 08:42:58 +00:00
stroese
22a40b0a88 Board VOH405 added. 2003-09-12 08:42:13 +00:00
stroese
b318262a71 Board PLU405 added. 2003-09-12 08:41:56 +00:00
stroese
a65cb68237 Board HUB405 added. 2003-09-12 08:41:39 +00:00
stroese
5ce08eea97 Board DP405 added. 2003-09-12 08:41:24 +00:00
wdenk
4f7cb08ee7 * Patch by Martin Krause, 11 Sep 2003:
add burn-in tests for TRAB board

* Enable instruction cache on MPC5200 board
2003-09-11 23:06:34 +00:00
wdenk
a43278a43d * Patch by Gary Jennejohn, 11 Sep 2003:
- allow for longer timeouts for USB mass storage devices

* Patch by Denis Peter, 11 Sep 2003:
  - fix USB data pointer assignment for bulk only transfer.
  - prevent to display erased directories in FAT filesystem.

* Change output format for NAND flash - make it look like for other
  memory, too
2003-09-11 19:48:06 +00:00
wdenk
7205e4075d * Patches by Denis Peter, 9 Sep 2003:
add FAT support for IDE, SCSI and USB

* Patches by Gleb Natapov, 2 Sep 2003:
  - cleanup of POST code for unsupported architectures
  - MPC824x locks way0 of data cache for use as initial RAM;
    this patch unlocks it after relocation to RAM and invalidates
    the locked entries.

* Patch by Gleb Natapov, 30 Aug 2003:
  new I2C driver for mpc107 bridge. Now works from flash.

* Patch by Dave Ellis, 11 Aug 2003:
  - JFFS2: fix typo in common/cmd_jffs2.c
  - JFFS2: fix CFG_JFFS2_SORT_FRAGMENTS option
  - JFFS2: remove node version 0 warning
  - JFFS2: accept JFFS2 PADDING nodes
  - SXNI855T: add AM29LV800 support
  - SXNI855T: move environment from EEPROM to flash
  - SXNI855T: boot from JFFS2 in NOR or NAND flash

* Patch by Bill Hargen, 11 Aug 2003:
  fixes for I2C on MPC8240
  - fix i2c_write routine
  - fix iprobe command
  - eliminates use of global variables, plus dead code, cleanup.
2003-09-10 22:30:53 +00:00
wdenk
149dded2b1 * Add support for USB Mass Storage Devices (BBB)
(tested with USB memory sticks only)

* Avoid flicker on TRAB's VFD
2003-09-10 18:20:28 +00:00
wdenk
7152b1d0b3 * Add support for SK98xx driver
* Add PCI support for SL8245 board

* Support IceCube board configurations with 1 x AMD AM29LV065 (8 MB)
  or 1 x AM29LV652 (two LV065 in one chip = 16 MB);
  Run IPB at 133 Mhz; adjust the MII clock frequency accordingly

* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16  MHz)
  to allow for more accurate baudrate settings
  (error now 0.7% at 115 kbps, instead of 3.5% before)

* Patch by Andreas Mohr, 4 Sep 2003:
  Fix a lot of spelling errors
2003-09-05 23:19:14 +00:00
wdenk
4d816774f1 Adjustments / cleanup for PPChameleon EVB board 2003-09-03 14:03:26 +00:00
wdenk
093ae273da Fix compile problem 2003-09-02 23:08:13 +00:00
wdenk
12f34241cb * Add support for PPChameleon Eval Board
* Add support for P3G4 board

* Fix problem with MGT5100 FEC driver: add "early" MAC address
  initialization
2003-09-02 22:48:03 +00:00
wdenk
326428cc8b Patch by Yuli Barcohen, 7 Aug 2003:
According to the MPC8260 User's Manual, PCI_MODE signal should be
reflected in SCCR register, and local bus pins configuration is taken
from HRCW and appears in SIUMCR. For some reason it does not work
this way, so the only possibility to detect if the board is
configured in PCI mode is to check the BCSR. This patch sets SCCR and
SIUMCR according to the BCSR.
2003-08-31 18:37:54 +00:00
wdenk
0cb61d7ddd Patch by Raghu Krishnaprasad, 7 Aug 2003:
add support for Adder II MPC852T module
2003-08-30 00:05:50 +00:00
wdenk
6f21347d49 * Patch by George G. Davis, 19 Aug 2003:
fix TI Innovator/OMAP1510 pin configs

* Patches by Kshitij, 18 Aug 2003
  - add support for arm926ejs cpu core
  - add support for TI OMAP 1610 Innovator Board
2003-08-29 22:00:43 +00:00
wdenk
c29fdfc1d8 Patch by Yuli Barcohen, 14 Aug 2003:
add support for bzip2 uncompression
2003-08-29 20:57:53 +00:00
wdenk
ca75added1 Add I2C and RTC support for RMU board using software I2C driver
(because of better response to iprobe command); fix problem with
"reset" command
2003-08-29 10:05:53 +00:00
stroese
437ce07b8a Patch from Matthias Fuchs. 2003-08-28 14:24:37 +00:00
stroese
fe389a82c9 - Added CONFIG_BOOTP_DNS2 and CONFIG_BOOTP_SEND_HOSTNAME to CONFIG_BOOTP_MASK. 2003-08-28 14:17:32 +00:00
wdenk
d94f92cbd7 * Fix ICU862 environment problem
* Fix RAM size detection for RMU board

* Implement "reset" for MGT5100/MPC5200 systems
2003-08-28 09:41:22 +00:00
wdenk
e0ac62d798 * Make Ethernet autonegotiation on INCA-IP work for all clock rates;
allow selection of clock frequency as "make" target

* Implement memory autosizing code for IceCube boards

* Configure network port on INCA-IP for autonegotiation

* Fix overflow problem in network timeout code

* Patch by Richard Woodruff, 8 Aug 2003:
  Allow crc32 to be used at address 0x000 (crc32_no_comp, too).
2003-08-17 18:55:18 +00:00
wdenk
ae3af05ec9 Update for TQM board defaults:
disable clocks_in_mhz, enable boot count limit
2003-08-07 22:18:11 +00:00
dzu
9374fa287b Removed tools/gdb from "make all" target. Added make target "gdbtools"
in toplevel directory instead.  Removed astest.c from tools/gdb because
it is no longer relevant.
2003-08-07 15:04:48 +00:00
wdenk
013dc8d9b9 Disable debug print for normal use.
Fix MPC5200 FEC driver
2003-08-07 14:52:18 +00:00
dzu
d41e5e6994 Removed the file tools/gdb/astest.c 2003-08-07 14:22:10 +00:00
dzu
8f713fdfeb Removed tools/gdb from "make all" target. Added make target "gdbtools"
in toplevel directory instead.  Removed astest.c from tools/gdb because
it is no longer relevant.
2003-08-07 14:20:31 +00:00
wdenk
96e48cf6c1 * Fix PCI support for MPC5200 / IceCube Board 2003-08-05 18:22:44 +00:00
wdenk
bdccc4fedc * Map ISP1362 USB OTG controller for NSCU board
* Patch by Brad Parker, 02 Aug 2003:
  fix sc520_cdp problems

* Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements)

* Allow erase command to cross flash bank boundaries
2003-08-05 17:43:17 +00:00
wdenk
96dd9af4c7 Must enable timebase earlier on MPC5200 2003-07-31 22:56:30 +00:00
wdenk
1f4bb37d6b * Patch by Scott McNutt, 21 Jul 2003:
Add support for LynuxWorks Kernel Downloadable Images (KDIs).
  Both LynxOS and BlueCat linux KDIs are supported.

* Patch by Richard Woodruff, 25 Jul 2003:
  use more reliable reset for OMAP/925T

* Patch by Nye Liu, 25 Jul 2003:
  fix typo in mpc8xx.h

* Patch by Richard Woodruff, 24 Jul 2003:
  Fixes for cmd_nand.c:
  - Fixed null dereferece which could result in incorrect ECC values.
  - Added support for devices with no Ready/Busy signal hooked up.
  - Added OMAP1510 read/write protect handling.
  - Fixed nand.h's ECCPOS. A conflict existed with POS5 and badblock
    for non-JFFS2.
  - Switched default ECC to be JFFS2.
2003-07-27 00:21:01 +00:00
wdenk
7784674852 * Allow crc32 to be used at address 0x000
* Provide consistent interface to standalone applications to access
  the 'global_data' structure
  Provide a doc/README.standalone more useful to users/developers.

* Make IceCube MGT5100 FEC driver work
2003-07-26 08:08:08 +00:00
wdenk
27b207fd0a * Implement new mechanism to export U-Boot's functions to standalone
applications: instead of using (PPC-specific) system calls we now
  use a jump table; please see doc/README.standalone for details

* Patch by Dave Westwood, 24 Jul 2003:
  added support for Unity OS (a proprietary OS)
2003-07-24 23:38:38 +00:00
wdenk
2535d60277 * Patch by Martin Krause, 17 Jul 2003:
add delay to get I2C working with "imm" command and s3c24x0_i2c.c

* Patch by Richard Woodruff, 17 July 03:
  - Fixed bug in OMAP1510 baud rate divisor settings.

* Patch by Nye Liu, 16 July 2003:
  MPC860FADS fixes:
  - add MPC86xADS support (uses MPC86xADS.h)
  - add 866P/T core support (also MPC859T/MPC859DSL/MPC852T)
    o PLPRCR changes
    o BRG changes (EXTAL/XTAL restricted to 10MHz)
    o don't trust gclk() software measurement by default, depend on
      CONFIG_8xx_GCLK_FREQ
  - add DRAM SIMM not installed detection
  - use more "correct" SDRAM initialization sequence
  - allow different SDRAM sizes (8xxADS has 8M)
  - default DER is 0
  - remove unused MAMR defines from FADS860T.h (all done in fads.c)
  - rename MAMR/MBMR defines to be more consistent. Should eventually
    be merged into MxMR to better reflect the PowerQUICC datasheet.

* Patch by Yuli Barcohen, 16 Jul 2003:
  support new Motorola PQ2FADS-ZU evaluation board which replaced
  MPC8260ADS and MPC8266ADS
2003-07-17 23:16:40 +00:00
wdenk
945af8d723 * Add support for IceCube board (with MGT5100 and MPC5200 CPUs)
* Add support for MGT5100 and MPC5200 processors
2003-07-16 21:53:01 +00:00
wdenk
cb4dbb7bbc Incorporate Patch by Lutz Dennig, 15 Jul 2003. 2003-07-16 16:40:22 +00:00
wdenk
ad12965db5 Mode modem init support to F3+F4 key combination 2003-07-15 22:00:22 +00:00
wdenk
667122af2d Avoid unnecessary call to post_word_load();
make logbuf compile without POST
2003-07-15 21:50:34 +00:00
wdenk
2960b65add Adapt log driver to latest POST changes (POST_SLOWTEST) 2003-07-15 21:08:26 +00:00
wdenk
2e5983d2ea Patches by Kshitij, 04 Jul 2003
- added support for arm925t cpu core
- added support for TI OMAP 1510 Innovator Board
2003-07-15 20:04:06 +00:00
wdenk
6dff552972 * Patches by Martin Krause, 14 Jul 2003:
- add I2C support for s3c2400 systems (trab board)
  - (re-) add "ping" to command table

* Fix handling of "slow" POST routines
2003-07-15 07:45:49 +00:00
wdenk
8564acf936 * Patches by Yuli Barcohen, 13 Jul 2003:
- Correct flash and JFFS2 support for MPC8260ADS
  - fix PVR values and clock generation for PowerQUICC II family
    (8270/8275/8280)

* Patch by Bernhard Kuhn, 08 Jul 2003:
  - add support for M68K targets

* Patch by Ken Chou, 3 Jul:
  - Fix PCI config table for A3000
  - Fix iobase for natsemi.c
    (PCI_BASE_ADDRESS_0 is the IO base register for DP83815)

* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
2003-07-14 22:13:32 +00:00
stroese
5702923e23 - Patch by Stefan Roese, 11 Jul 2003 2003-07-11 08:23:12 +00:00
stroese
5b8b652519 - Fixed interrupt polarity. 2003-07-11 08:20:33 +00:00
stroese
2e533c373d - FPGA updated. 2003-07-11 08:17:26 +00:00
stroese
b762b9f4fc - BSP command added. 2003-07-11 08:14:14 +00:00
stroese
c5d2290642 - AR405 config updated. 2003-07-11 08:13:25 +00:00
stroese
155cb0104a - Fix bug in CONFIG_VERSION_VARIABLE. 2003-07-11 08:00:33 +00:00
wdenk
f12e568ca4 * Add support for NSCU board
* Add support for TQM823M, TQM850M, TQM855M and TQM860M modules

* Add support for Am29LV160ML, Am29LV320ML, and Am29LV640ML
  mirror bit flash on TQM8xxM modules
2003-07-07 20:07:54 +00:00
wdenk
0d4983930a Patch by Kenneth Johansson, 30 Jun 2003:
get rid of MK_CMD_ENTRY macro; update doc/README.command
2003-07-01 21:06:45 +00:00
wdenk
b37c7e5e5c * Patch by Seb James, 30 Jun 2003:
Improve documentation of I2C configuration in README

* Fix problems with previous log buffer "fixes"

* Fix minor help text issues

* "log append" did not append a newline
2003-06-30 16:24:52 +00:00
wdenk
b0fce99bfc Fix some missing commands, cleanup header files
(autoscript, bmp, bsp, fat, mmc, nand, portio, ...)
2003-06-29 21:03:46 +00:00
wdenk
eeacb89cb3 help text cleanup 2003-06-28 23:18:28 +00:00
wdenk
3d96ede975 Fix duplicate command entry. 2003-06-28 23:13:56 +00:00
wdenk
9d2b18a0f9 Rewrite command lookup and help command (fix problems with bubble
sort when sorting command name list). Minor cleanup here and there.
2003-06-28 23:11:04 +00:00
wdenk
d1cbe85b08 Merge from "stable branch", tag LABEL_2003_06_28_1800-stable:
- Allow to call sysmon function interactively
- PIC on LWMON board needs delay after power-on
- Add missing RSR definitions for MPC8xx
- Improve log buffer handling: guarantee clean reset after power-on
- Add support for EXBITGEN board
- Add support for SL8245 board
2003-06-28 17:24:46 +00:00
wdenk
8bde7f776c * Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)
2003-06-27 21:31:46 +00:00
wdenk
993cad9364 * Patches by Robert Schwebel, 26 Jun 2003:
- logdl
  - csb226
  - innokom

* Patch by Pantelis Antoniou, 25 Jun 2003:
  update NetVia with V2 board support
2003-06-26 22:04:09 +00:00
wdenk
b783edaee8 * Header file cleanup for ARM
* Patch by Murray Jensen, 24 Jun 2003:
  - make sure to use only U-boot provided header files
  - fix problems with ".rodata.str1.4" section as used by GCC-3.x
2003-06-25 22:26:29 +00:00
stroese
a300d83cb8 Patch from Stefan Roese. 2003-06-24 14:32:24 +00:00
stroese
a6457f7971 - Remove EEPROM command. 2003-06-24 14:31:16 +00:00
stroese
a0e135b493 - Add ping support. 2003-06-24 14:30:28 +00:00
stroese
e118e233a8 - Update NAND FLASH support. 2003-06-24 14:27:27 +00:00
stroese
95aeb34580 - Update new fpga file. 2003-06-24 14:26:41 +00:00
wdenk
cceb871fff * Patch by Yuli Barcohen, 23 Jun 2003:
Update for MPC8260ADS board

* Patch by Murray Jensen, 23 Jun 2003:
  - cleanup of GCC 3.x compiler warnings
2003-06-23 18:12:28 +00:00
wdenk
3595ac4979 * Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board

* Patch by Richard Woodruff, 19 June 03:
  - Enabled standard u-boot device abstraction for ARM
  - Enabled console device for ARM
  - Initilized bi_baudrate for ARM

* Patch by Bill Hargen, 23 Apr 2003:
  fix byte order for 824x I2C addresses (write op)
2003-06-22 17:18:28 +00:00
wdenk
9a0e21a3a8 Had to move the RTC area for ATC board to upper addresses
(0xf5000000, to be specific). The reason is that the RTC first gets
accessed before MMU is initialized and, consequently, it needs to be
placed at physical addresses which are later mapped to the same
virtual addresses (like 0xf5000000 physical is mapped to 0xf5000000
virtual).
2003-06-22 10:30:54 +00:00
wdenk
592c5cabe7 Patch by Murray Jensen, 20 Jun 2003:
- hymod update
- cleanup (especially for gcc-3.x compilers)
2003-06-21 00:17:24 +00:00
wdenk
72755c7137 Patch by Tom Guilliams, 20 Jun 2003:
added CONFIG_750FX support for IBM 750FX processors
2003-06-20 23:10:58 +00:00
wdenk
0332990b85 * Patch by Devin Crumb, 02 Apr 2003:
Fix clock divider rounding problem in drivers/serial.c

* Patch by Ken Chou, 19 June 2003:
  Added support for A3000 SBC board (Artis Microsystems Inc.)
2003-06-20 22:36:30 +00:00
wdenk
0b97ab144f * Patch by Richard Woodruff, 19 June 03:
- Fixed smc91c111 driver to sync with the u-boot environment (driver/smc91c111.c).
- Added eth_init error return check in NetLoop (net/net.c).
2003-06-19 23:58:30 +00:00
wdenk
6dd652fa4d Patches by Murray Jensen, 17 Jun 2003:
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
  "common/main.c" can use the "reset_cmd_timeout()" function before
  entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
  slightly different. see include/configs/hymod.h for an example
  (requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
  CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
  behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
  function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
  after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
  config.mk to allow board configurations to override the GNU
  linker script, selected via the LDSCRIPT, make variable, and to
  give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
  o correctly extends the timeout depending on the size of all
    queued messages for both transmit and receive
  o will not continue with receive if transmit times out
  o ensures that the error callback is done for all queued tx
    and rx messages
  o correctly detects both tx and rx timeouts, only delivers one to
    the callback, and does not overwrite an earlier error
  o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
  technically correct
- many Hymod board changes
2003-06-19 23:40:20 +00:00
wdenk
52f52c1494 Patches by Robert Schwebel, 14 Jun 2003:
- add support for Logotronic DL datalogger board
- cleanup serial line after kermit binary download
- add debugX macro (debug level support)
- update mach-types.h to latest arm.linux.org.uk master list.
2003-06-19 23:04:19 +00:00
wdenk
48b42616e9 * Patches by David Mller, 12 Jun 2003:
- rewrite of the S3C24X0 register definitions stuff
  - "driver" for the built-in S3C24X0 RTC

* Patches by Yuli Barcohen, 12 Jun 2003:
  - Add MII support and Ethernet PHY initialization for MPC8260ADS board
  - Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
    configuration word supplied by FPGA on some MPC8260ADS boards

* Patch by Pantelis Antoniou, 10 Jun 2003:
  Unify status LED interface
2003-06-19 23:01:32 +00:00
wdenk
15ef8a5d17 Add support for DS12887 RTC; add RTC support for ATC board 2003-06-18 20:22:24 +00:00
wdenk
2abbe07547 * Patch by Nicolas Lacressonniere, 11 Jun 2003:
Modifications for Atmel AT91RM9200DK ARM920T based development kit
  - Add Atmel DataFlash support for reading and writing.
  - Add possibility to boot a Linux from DataFlash with BOOTM command.
  - Add Flash detection on Atmel AT91RM9200DK
    (between Atmel AT49BV1614 and AT49BV1614A flashes)
  - Replace old Ethernet PHY layer functions
  - Change link address

* Patch by Frank Smith, 9 Jun 2003:
  use CRIT_EXCEPTION for machine check on 4xx

* Patch by Detlev Zundel, 13 Jun 2003:
  added implementation of the "carinfo" command in cmd_immap.c
2003-06-16 23:50:08 +00:00
wdenk
71f9511803 * Fix CONFIG_NET_MULTI support in include/net.h
* Patches by Kyle Harris, 13 Mar 2003:
  - Add FAT partition support
  - Add command support for FAT
  - Add command support for MMC
  ----
  - Add Intel PXA support for video
  - Add Intel PXA support for MMC
  ----
  - Enable MMC and FAT for lubbock board
  - Other misc changes for lubbock board
2003-06-15 22:40:42 +00:00
wdenk
487778b781 Patch by Robert Schwebel, April 02, 2003:
fix for SMSC91111 driver
2003-06-06 11:20:01 +00:00
stroese
8b601449e8 - Update new fpga file. 2003-06-06 09:44:40 +00:00
stroese
e58dc13283 - Fix compile bug (PPC4xx). 2003-06-06 09:43:42 +00:00
wdenk
a3ed3996cd * Patch by Vladimir Gurevich, 04 Jun 2003:
make ppc405 ethernet driver compatible with CONFIG_NET_MULTI option
2003-06-05 19:37:36 +00:00
wdenk
73a8b27c57 * Add support for RMU board
* Add support for TQM862L at 100/50 MHz

* Patch by Pantelis Antoniou, 02 Jun 2003:
  major reconstruction of networking code;
  add "ping" support (outgoing only!)
2003-06-05 19:27:42 +00:00
stroese
08eaea9c9f Patch from Stefan Roese. 2003-06-05 15:44:37 +00:00
stroese
53cf9435cc - CFG_RX_ETH_BUFFER added. 2003-06-05 15:39:44 +00:00
stroese
c602883592 - CFG_ETH_RX_BUFFER added. 2003-06-05 15:38:29 +00:00
stroese
3720878599 - Fix bug for initial stack in data cache as pointed out by Thomas Schaefer (tschaefer@giga-stream.de). Now inital stack in data cache can be used even if the chip select is in use. 2003-06-05 15:35:20 +00:00
wdenk
f3e0de60a6 * Patch by Denis Peter, 04 June 2003:
add support for the MIP405T board
2003-06-04 15:05:30 +00:00
wdenk
682011ff69 * Patches by Udi Finkelstein, 2 June 2003:
- Added support for custom keyboards, initialized by defining a
    board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
  - Added support for the RBC823 board.
  - cpu/mpc8xx/lcd.c now automatically calculates the
    Horizontal Pixel Count field.

* Fix alignment problem in BOOTP (dhcp_leasetime option)
  [pointed out by Nicolas Lacressonnire, 2 Jun 2003]

* Patch by Mark Rakes, 14 May 2003:
  add support for Intel e1000 gig cards.

* Patch by Nye Liu, 3 Jun 2003:
  fix critical typo in MAMR definition (include/mpc8xx.h)

* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.

* Patch by Klaus Heydeck, 2 Jun 2003
  Minor changes for KUP4K configuration
2003-06-03 23:54:09 +00:00
wdenk
7a8e9bed17 * Patch by Marc Singer, 29 May 2003:
Fixed rarp boot method for IA32 and other little-endian CPUs.

* Patch by Marc Singer, 28 May 2003:
  Added port I/O commands.

* Patch by Matthew McClintock, 28 May 2003
  - cpu/mpc824x/start.S: fix relocation code when booting from RAM
  - minor patches for utx8245

* Patch by Daniel Engstrm, 28 May 2003:
  x86 update

* Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
  add nand flash support to SXNI855T configuration
  fix/extend nand flash support:
  - fix 'nand erase' command so does not erase bad blocks
  - fix 'nand write' command so does not write to bad blocks
  - fix nand_probe() so handles no flash detected properly
  - add doc/README.nand
  - add .jffs2 and .oob options to nand read/write
  - add 'nand bad' command to list bad blocks
  - add 'clean' option to 'nand erase' to write JFFS2 clean markers
  - make NAND read/write faster

* Patch by Rune Torgersen, 23 May 2003:
  Update for MPC8266ADS board
2003-05-31 18:35:21 +00:00
wdenk
3b57fe0a70 * Get (mostly) rid of CFG_MONITOR_LEN definition; compute real length
instead CFG_MONITOR_LEN is now only used to determine  _at_compile_
  _time_  (!) if the environment is embedded within the U-Boot image,
  or in a separate flash sector.

* Cleanup CFG_DER #defines in config files (wd maintained only)
2003-05-30 12:48:29 +00:00
wdenk
f07771cc28 * Fix data abort exception handling for arm920t CPU
* Fix alignment problems with flash driver for TRAB board

* Patch by Donald White, 21 May 2003:
  fix calculation of base address in pci_hose_config_device()

* Fix bug in command line parsing: "cmd1;cmd2" is supposed to always
  execute "cmd2", even if "cmd1" fails. Note that this is different
  to "run var1 var2" where the contents of "var2" will NOT be
  executed when a command in "var1" fails.
2003-05-28 08:06:31 +00:00
wdenk
38b99261c1 Add zero-copy ramdisk support (requires corresponding kernel support!) 2003-05-23 23:18:21 +00:00
wdenk
4c3b21a5f9 Patch by Kyle Harris, 20 May 2003:
In preparation for an ixp port, rename cpu/xscale and arch-xscale
into cpu/pxa and arch-pxa.
2003-05-23 12:36:20 +00:00
stroese
d9ff6e84e4 Patch from Stefan Roese. 2003-05-23 11:49:24 +00:00
stroese
e1e89324ad - ASH405 board added (PPC405EP based).
- CPCI4052 added (PPC405GP based).
- CPCI405AB added (PPC405GP based).
- PCI405 added (PPC405GP based).
- PMC405 added (PPC405GP based).
2003-05-23 11:43:00 +00:00
stroese
549826eaa0 - ASH405 board added (PPC405EP based).
- BUBINGA405EP added (PPC405EP based).
- CPCI405AB added (PPC405GP based).
- PMC405 added (PPC405GP based).
2003-05-23 11:41:44 +00:00
stroese
1d49b1f365 CONFIG_UART1_CONSOLE added. 2003-05-23 11:39:05 +00:00
wdenk
33149b8812 Patch by Denis Peter, 19 Mai 2003:
add support for the MIP405-3 board
2003-05-23 11:38:58 +00:00
stroese
9919f13cc1 DHCP support added. 2003-05-23 11:38:22 +00:00
stroese
071d897c96 PMC405 board added. 2003-05-23 11:35:47 +00:00
stroese
3871842529 Code cleanup. 2003-05-23 11:35:09 +00:00
stroese
b6d9e4f5af New FPGA image with 527 support. 2003-05-23 11:34:40 +00:00
stroese
1545ad35c5 Local Bus Timeout increased. 2003-05-23 11:33:57 +00:00
stroese
c231d00f4e Code reworked for PPC405EP support. 2003-05-23 11:32:53 +00:00
stroese
d4629c8c8d CPCI405AB (special version of esd CPCI405) board added. 2003-05-23 11:30:39 +00:00
stroese
46578cc018 BUBINGA405EP board added (IBM PPC405EP Eval Board). 2003-05-23 11:28:55 +00:00
stroese
c93f70962b ASH405 board added (PPC405EP based). 2003-05-23 11:27:18 +00:00
stroese
8749cfb44e - PPC405EP support added.
- CONFIG_UART1_CONSOLE added (see README).
2003-05-23 11:25:57 +00:00
stroese
b867d705b6 PPC405EP support added. 2003-05-23 11:18:02 +00:00
stroese
bedc497029 - PPC405EP support added.
- "nand_init" (NAND FLASH) added.
2003-05-23 11:16:49 +00:00
wdenk
5d232d0e7e * Patch by Dave Ellis, 22 May 2003:
Fix problem with only partially cleared .bss segment

* Patch by Rune Torgersen, 12 May 2003:
  get PCI to work on a MPC8266ADS board; incorporate change to
  cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
2003-05-22 22:52:13 +00:00
wdenk
c8c3a8be2d Add support for arbitrary bitmaps for TRAB's VFD command;
allow to pass boot bitmap addresses in environment variables;
allow for zero boot delay
2003-05-21 20:26:20 +00:00
wdenk
82226bf4d2 * Add support for arbitrary bitmaps for TRAB's VFD command
* Patch by Christian Geiinger, 19 May 2002:
  On TRAB: wait until the dummy byte has been completely sent
2003-05-20 20:49:01 +00:00
wdenk
7f70e85309 * Patch by David Updegraff, 22 Apr 2003:
update for CrayL1 board

* Patch by Pantelis Antoniou, 21 Apr 2003:
  add boot support for ARTOS (a proprietary OS)

* Patch by Steven Scholz, 11 Apr 2003:
  Add support for RTC DS1338

* Patch by Rod Boyce, 24 Jan 2003:
  Fix counting of extended partitions in diskboot command
2003-05-20 14:25:27 +00:00
wdenk
59de2ed6b5 Patch by Christophe Lindheimer, 20 May 2003:
allow the use of CFG_LOADS when CFG_NO_FLASH is set
2003-05-20 10:58:04 +00:00
wdenk
86d82762f6 Fix SDRAM timing on Purple board 2003-05-20 10:39:44 +00:00
wdenk
66fd3d1ce7 Add support for CompactFlash on ATC board
(includes support for Intel 82365 and compatible PC Card controllers,
and Yenta-compatible PCI-to-CardBus controllers)
2003-05-18 11:30:09 +00:00
wdenk
45219c4660 Patch by Mathijs Haarman, 08 May 2003:
Add lan91c96 driver (tested on Lubbock and custom PXA250 board only)
2003-05-12 21:50:16 +00:00
wdenk
f7de16ae25 Fix SDRAM initialization 2003-05-12 09:51:52 +00:00
wdenk
d6815435c0 Add default switch settings. 2003-05-12 09:51:00 +00:00
wdenk
e600962991 Fix ATC board configuration and flash driver 2003-05-05 17:09:41 +00:00
wdenk
9c62cc58b8 Fix problem with usage of "true" (undefined in current versions of bfd.h) 2003-05-03 23:33:47 +00:00
wdenk
7aa7861471 * Add support for Promess ATC board
* Patch by Keith Outwater, 28 Apr 2003:
  - Miscellaneous corrections and additions to GEN860T board specific code.
  - Added GEN860_SC variant to GEN860T.
  - Miscellaneous corrections to GEN860T documentation.
  - Correct duplicate entry in U-Boot CREDITS file.
  - Add GEN860T_SC entry in MAINTAINERS file.
  - Update CREDITS file with GEN860T_SC info.

* Update Smiths Aerospace addresses in MAINTAINERS file

* Fix error handling in hush's version of "run" command
2003-05-03 15:50:43 +00:00
wdenk
4532cb696e * LWMON extensions:
- Splashscreen support
  - modem support
  - sysmon support
  - temperature dependend enabling of LCD

* Allow booting from old "PPCBoot" disk partitions

* Add support for TQM8255 Board / MPC8255 CPU
2003-04-27 22:52:51 +00:00
wdenk
02c9bed451 *** empty log message *** 2003-04-20 17:41:25 +00:00
wdenk
53cad435bb Make compile clean 2003-04-20 17:26:01 +00:00
wdenk
059ae173e9 Add files needed for bitmap load support 2003-04-20 16:52:09 +00:00
wdenk
824a1ebffe Compile fixes 2003-04-20 16:49:37 +00:00
wdenk
d791b1dc3e * Make sure Block Lock Bits get cleared in R360MPI flash driver
* MPC823 LCD driver: Fill color map backwards, to allow for steady
  display when Linux takes over

* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS (this time for real).

* Add support for "bmp info" and "bmp display" commands to load
  bitmap images; this can be used (for example in a "preboot"
  command) to display a splash screen very quickly after poweron.

* Add support for 133 MHz clock on INCA-IP board
2003-04-20 14:04:18 +00:00
wdenk
4a6fd34b26 * Patch by Lutz Dennig, 10 Apr 2003:
Update for R360MPI board

* Add new meaning to "autostart" environment variable:
  If set to "no", a standalone image passed to the
  "bootm" command will be copied to the load address
  (and eventually uncompressed), but NOT be started.
  This can be used to load and uncompress arbitrary
  data.

* Set max brightness for MN11236 displays on TRAB board
2003-04-12 23:38:12 +00:00
stroese
69f8f827d5 Patch from Stefan Roese. 2003-04-10 13:30:28 +00:00
stroese
759a51b4f3 Changed DHCP client to use ip address from server option field #54 from the OFFER-paket in the server option field #54 in the REQUEST-paket. This fixes a problem using a Windows 2000 DHCP server, where the DHCP-server is not the TFTP-server. 2003-04-10 13:26:44 +00:00
wdenk
d126bfbdbd Add support for TQM862L modules 2003-04-10 11:18:18 +00:00
wdenk
60fbe25424 Prepare for 0.3.0 release
* Add support for Purple Board (MIPS64 5Kc)

* Add support for MIPS64 5Kc CPUs
2003-04-08 23:25:21 +00:00
wdenk
3e38691e8f * Patch by Arun Dharankar, 4 Apr 2003:
Add IDMA example code (tested on 8260 only)

* Add support for Purple Board (MIPS64 5Kc)

* Add support for MIPS64 5Kc CPUs

* Fix missing setting of "loadaddr" and "bootfile" on ARM and MIPS

* Patch by Denis Peter, 04 Apr 2003:
  - update MIP405-4 board

* Patches by Denis Peter, 03 April 2003:
  - fix PCI IRQs on MPL boards
  - fix two more un-relocated pointer problems

* Fix behaviour of "run" command:
  - print error message iv variable does not exist
  - terminate processing of arguments in case of error

* Patches by Peter Figuli, 10 Mar 2003
  - Add support for BTUART on PXA platform
  - Add support for WEP EP250 (PXA) board

* Fix flash problems on INCA-IP; add tool to allow bruning images  to
  flash using a BDI2000

* Implement fix for I2C Edge Conditions problem for all boards that
  use the bit-banging driver (common/soft_i2c.c)

* Add patches by Robert Schwebel, 31 Mar 2003:
  - csb226 board: bring in sync with innokom/memsetup.S
  - csb226 board: fix MDREFR handling
  - misc doc fixes / extensions
  - innokom board: cleanup, MDREFR fix in memsetup.S, config update
  - add BOOT_PROGRESS to armlinux.c
2003-04-05 00:53:31 +00:00
stroese
36c05a80ec Patch from Stefan Roese. 2003-04-04 16:55:30 +00:00
stroese
afcc4a7404 Changed CPCI405 to use CTS instead of DSR on PPC405 UART1. 2003-04-04 16:52:57 +00:00
stroese
9e7d5ebea9 U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE). 2003-04-04 16:48:07 +00:00
stroese
baa3d528fe Changed PPC405GPr version from A to B. 2003-04-04 16:00:33 +00:00
stroese
c1551ea817 U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE). 2003-04-04 15:53:41 +00:00
stroese
0587597ca3 U-Boot version environment variable "ver" added (CONFIG_VERSION_VARIABLE). 2003-04-04 15:44:49 +00:00
wdenk
0db5bca807 * Patch by Martin Winistoerfer, 23 Mar 2003
- Add port to MPC555/556 microcontrollers
  - Add support for cmi customer board with
    Intel 28F128J3A, 28F320J3A or 28F640J3A flash.

* Patch by Rick Bronson, 28 Mar 2003:
  - fix common/cmd_nand.c
2003-03-31 17:27:09 +00:00
wdenk
85ec0bcc1b * Patch by Arun Dharankar, 24 Mar 2003:
- add threads / scheduler example code

* Add patches by Robert Schwebel, 31 Mar 2003:
  - add ctrl-c support for kermit download
  - align bdinfo output on ARM

* Add CPU ID, version, and clock speed for INCA-IP
2003-03-31 16:34:49 +00:00
wdenk
506f044131 Patches by Dave Ellis, 18 Mar 2003 for SXNI855T board:
- fix SRAM and SDRAM memory sizing
- add status LED support
- add MAC address for second (SCC1) ethernet port

Update default environment for TQM8260 board
2003-03-28 14:40:36 +00:00
wdenk
cdd8a0f151 Fix MIPS build problem 2003-03-27 18:00:16 +00:00
wdenk
c021880ac5 * Add support for MIPS32 4Kc CPUs
* Add support for INCA-IP Board
2003-03-27 12:09:35 +00:00
wdenk
ac6dbb85b7 Make compile clean, fix the usual small problems. 2003-03-26 11:42:53 +00:00
stroese
2a46cabd77 esd PCI405 updated. 2003-03-26 10:36:12 +00:00
wdenk
dc7c9a1a52 * Patch by Rick Bronson, 16 Mar 2003:
Add support for Atmel AT91RM9200DK w/NAND

* Patches by Robert Schwebel, 19 Mar 2003:
  - use arm-linux-gcc as default compiler for ARM
  - fix i2c fixup code
  - fix missing baudrate setting
  - added $loadaddr / CFG_LOAD_ADDR support to loadb
  - moved "ignoring trailing characters" _before_ u-boot wants to
    print out diagnostics messages; removes bogus characters at the
    end of transmission

* Patch by John Zhan, 18 Mar 2003:
  Add support for SinoVee Microsystems SC8xx boards

* Patch by Rolf Offermanns, 21 Mar 2003:
  ported the dnp1110 related changes from the current armboot cvs to
  current u-boot cvs. smc91111 does not work. problem marked in
  smc91111.c, grep for "FIXME".

* Patch by Brian Auld, 25 Mar 2003:
  Add support for STM flash chips on ebony board

 * Add PCI support for MPC8250 Boards (PM825 module)

 * Patch by Stefan Roese, 25 Mar 2003:
2003-03-26 06:55:25 +00:00
wdenk
10f670178c *** empty log message *** 2003-03-25 18:06:06 +00:00
wdenk
4d75a504d0 Add PCI support for MPC8250 Boards (PM825 module) 2003-03-25 16:50:56 +00:00
stroese
44e5c5c4f1 Patch by Stefan Roese , 25 Mar 2003. 2003-03-25 14:44:48 +00:00
stroese
a02ab7d184 BSP-Command for esd PCI405 added. 2003-03-25 14:43:01 +00:00
stroese
d69b100e70 esd PCI405 updated. 2003-03-25 14:41:35 +00:00
stroese
5d5d44e717 Patch by Stefan Roese , 20 Mar 2003. 2003-03-20 15:32:59 +00:00
stroese
6f4474e87b CPCI4052 update (support for revision 3). 2003-03-20 15:31:19 +00:00
stroese
97a43d641d Added edge conditioning register (ecr) for PPC405GPr. 2003-03-20 15:27:41 +00:00
stroese
7e11d8269e Clip udiv to 5 bits on PPC405 (serial.c). 2003-03-20 15:25:59 +00:00
stroese
38daa27d21 Set edge conditioning circuitry on PPC405GPr for compatibility to existing PPC405GP designs. 2003-03-20 15:21:50 +00:00
wdenk
1957dd29d9 Add files that were forgotten 2003-03-14 21:34:25 +00:00
wdenk
06d01dbe00 * Avoid flicker on the TRAB's VFD by synchronizing the enable with
the HSYNC/VSYNC. Requires new CPLD code (Version 101 for Rev. 100
  boards, version 153 for Rev. 200 boards).

* Patch by Vladimir Gurevich, 12 Mar 2003:
  Fix relocation problem of statically initialized string pointers
  in common/cmd_pci.c

* Patch by Kai-Uwe Blm, 12 Mar 2003:
  Cleanup & bug fixes for JFFS2 code:
  - the memory mangement was broken. It caused havoc on malloc by
    writing beyond the block boundaries.
  - the length calculation for files was wrong, sometimes resulting
    in short file reads.
  - data copying now optionally takes fragment version numbers into
    account, to avoid copying from older data.
  See doc/README.JFFS2 for details.
2003-03-14 20:47:52 +00:00
wdenk
09127c6096 Cleanup compiler warning 2003-03-12 10:43:01 +00:00
wdenk
3bac351370 * Patch by Josef Wagner, 12 Mar 2003:
- 16/32 MB and 50/80 MHz support with auto-detection for IP860
  - ETH05 and BEDBUG support for CU824
  - added support for MicroSys CPC45
  - new BOOTROM/FLASH0 and DOC base for PM826

* Patch by Robert Schwebel, 12 Mar 2003:
  Fix the chpart command on innokom board

* Name cleanup:
  mv include/asm-i386/ppcboot-i386.h include/asm-i386/u-boot-i386.h
  s/PPCBoot/U-Boot/ in some files
  s/pImage/uImage/  in some files

* Patch by Detlev Zundel, 15 Jan 2003:
  Fix '' command line quoting

* Patch by The LEOX team, 19 Jan 2003:
  - add support for the ELPT860 board
  - add support for Dallas ds164x RTC
2003-03-12 10:41:04 +00:00
wdenk
1cb8e980c4 * Patches by David Mller, 31 Jan 2003:
- minimal setup for CardBus bridges
  - add EEPROM read/write support in the CS8900 driver
  - add support for the builtin I2C controller in the Samsung s3c24x0 chips
  - add support for  MPL's VCMA9 (Samsung s3c2410 based) board

* Patch by Steven Scholz, 04 Feb 2003:
  add support for RTC DS1307

* Patch by Reinhard Meyer, 5 Feb 2003:
  fix PLPRCR/SCCR init sequence on 8xx to allow for
  changes of EBDF by software

* Patch by Vladimir Gurevich, 07 Feb 2003:
  "API-compatibility patch" for 4xx I2C driver
2003-03-06 21:55:29 +00:00
wdenk
500545cc6b Fix problem with default #defines
Cleanup compiler warning
2003-03-06 14:23:06 +00:00
wdenk
47cd00fa70 * Patches by Robert Schwebel, 06 Mar 2003:
- fix bug in BOOTP code (must use NetCopyIP)
  - update of CSB226 port
  - clear BSS segment on XScale
  - added support for i2c_init_board() function
  - update to the Innokom plattform

* Extend support for redundand environments for configurations where
  environment size < sector size
2003-03-06 13:39:27 +00:00
3072 changed files with 563349 additions and 84087 deletions

3332
CHANGELOG

File diff suppressed because it is too large Load Diff

11
COPYING
View File

@@ -1,3 +1,14 @@
NOTE! This copyright does *not* cover the so-called "standalone"
applications that use U-Boot services by means of the jump table
provided by U-Boot exactly for this purpose - this is merely
considered normal use of U-Boot, and does *not* fall under the
heading of "derived work". Also note that the GPL below is
copyrighted by the Free Software Foundation, but the instance of code
that it refers to (the U-Boot source code) is copyrighted by me and
others who actually wrote it. -- Wolfgang Denk
=======================================================================
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991

192
CREDITS
View File

@@ -18,22 +18,40 @@ N: Dr. Bruno Achauer
E: bruno@exet-ag.de
D: Support for NetBSD (both as host and target system)
N: Guillaume Alexandre
E: guillaume.alexandre@gespac.ch
D: Add PCIPPC6 configuration
N: Swen Anderson
E: sand@peppercon.de
D: ERIC Support
N: Guillaume Alexandre
E: guillaume.alexandre@gespac.ch
D: Add PCIPPC6 configuration
N: Pantelis Antoniou
E: panto@intracom.gr
D: NETVIA & NETPHONE board support, ARTOS support.
N: Pierre Aubert
E: <p.aubert@staubli.com>
D: Support for RPXClassic board
N: Yuli Barcohen
E: yuli@arabellasw.com
D: Unified support for Motorola MPC826xADS/MPC8272ADS/PQ2FADS boards.
D: Support for Zephyr Engineering ZPC.1900 board.
D: Support for Interphase iSPAN boards.
D: Support for Analogue&Micro Adder boards.
D: Support for Analogue&Micro Rattler boards.
W: http://www.arabellasw.com
N: Jerry van Baren
E: <vanbaren@cideas.com>
D: BedBug port to 603e core (MPC82xx). Code for enhanced memory test.
N: Pavel Bartusek
E: <pba@sysgo.com>
D: Reiserfs support
W: http://www.elinos.com
N: Andre Beaudin
E: <andre.beaudin@colubris.com>
D: PCMCIA, Ethernet, TFTP
@@ -46,6 +64,10 @@ N: Raphael Bossek
E: raphael.bossek@solutions4linux.de
D: 8xxrom-0.3.0
N: Rick Bronson
E: rick@efn.org
D: Atmel AT91RM9200DK and NAND support
N: David Brown
E: DBrown03@harris.com
D: Extensions to 8xxrom-0.3.0
@@ -54,18 +76,36 @@ N: Oliver Brown
E: obrown@adventnetworks.com
D: Port to the gw8260 board
N: Curt Brune
E: curt@cucy.com
D: Added support for Samsung S3C4510B CPU (ARM7tdmi based SoC)
D: Added support for ESPD-Inc. EVB4510 Board
W: http://www.cucy.com
N: Jonathan De Bruyne
E: jonathan.debruyne@siemens.atea.be
D: Port to Siemens IAD210 board
N: Ken Chou
E: kchou@ieee.org
D: Support for A3000 SBC board
N: Conn Clark
E: clark@esteem.com
D: ESTEEM192E support
N: Magnus Damm
E: eramdam@kieray1.p.y.ki.era.ericsson.se
E: damm@opensource.se
D: 8xxrom
N: George G. Davis
E: gdavis@mvista.com
D: Board ports for ADS GraphicsClient+ and Intel Assabet
N: Arun Dharankar
E: ADharankar@ATTBI.Com
D: threads / scheduler example code
N: K<>ri Dav<61><76>sson
E: kd@flaga.is
D: FLAGA DM Support
@@ -87,6 +127,11 @@ N: Dave Ellis
E: DGE@sixnetio.com
D: EEPROM Speedup, SXNI855T port
N: Thomas Elste
E: info@elste.org
D: Port for the ModNET50 Board, NET+50 CPU Port
W: http://www.imms.de
N: Daniel Engstr<74>m
E: daniel@omicron.se
D: x86 port, Support for sc520_cdp board
@@ -96,6 +141,10 @@ E: wg@denx.de
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
W: www.denx.de
N: Peter Figuli
E: peposh@etc.sk
D: Support for WEP EP250 (PXA) board
N: Thomas Frieden
E: ThomasF@hyperion-entertainment.com
D: Support for AmigaOne
@@ -126,6 +175,10 @@ N: Andreas Heppel
E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
N: August Hoeraendl
E: august.hoerandl@gmx.at
D: Support for the logodl board (PXA2xx)
N: Josh Huber
E: huber@alum.wpi.edu
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
@@ -154,17 +207,62 @@ N: Yoo. Jonghoon
E: yooth@ipone.co.kr
D: Added port to the RPXlite board
N: Mark Jonas
E: mark.jonas@freescale.com
D: Support for Freescale Total5200 platform
W: http://www.mobilegt.com/
N: Sam Song
E: samsongshu@yahoo.com.cn
D: Port to the RPXlite_DW board
N: Brad Kemp
E: Brad.Kemp@seranoa.com
D: Port to Windriver ppmc8260 board
N: Sangmoon Kim
E: dogoil@etinsys.com
D: Support for debris board
N: Frederick W. Klatt
E: fred.klatt@windriver.com
D: Support for Wind River SBC8540/SBC8560 boards
N: Thomas Koeller
E: tkoeller@gmx.net
D: Port to Motorola Sandpoint 3 (MPC8240)
N: Raghu Krishnaprasad
E: Raghu.Krishnaprasad@fci.com
D: Support for Adder-II MPC852T evaluation board
W: http://www.forcecomputers.com
N: Bernhard Kuhn
E: bkuhn@metrowerks.com
D Support for Coldfire CPU; Support for Motorola M5272C3 and M5282EVB boards
N: Prakash Kumar
E: prakash@embedx.com
D Support for Intrinsyc CERF PXA250 board.
N: Thomas Lange
E: thomas@corelatus.com
D: Support for GTH board; lots of PCMCIA fixes
E: thomas@corelatus.se
D: Support for GTH and dbau1x00 boards; lots of PCMCIA fixes
N: The LEOX team
E: team@leox.org
D: Support for LEOX boards, DS164x RTC
W: http://www.leox.org
N: Leif Lindholm
E: leif.lindholm@i3micro.com
D: Support for AMD dbau1550 board.
N: Stephan Linz
E: linz@li-pro.net
D: Support for Nios Stratix Development Kit (DK-1S10)
D: Support for SSV ADNP/ESC1 (Nios Cyclone)
W: http://www.li-pro.net
N: Raymond Lo
E: lo@routefree.com
@@ -174,6 +272,11 @@ N: Dan Malek
E: dan@netx4.com
D: FADSROM, the grandfather of all of this
N: Andrea "llandre" Marson
E: andrea.marson@dave-tech.it
D: Port to PPChameleonEVB board
W: www.dave-tech.it
N: Reinhard Meyer
E: r.meyer@emk-elektronik.de
D: Port to EMK TOP860 Module
@@ -190,18 +293,25 @@ N: David M
E: d.mueller@elsoft.ch
D: Support for Samsung ARM920T SMDK2410 eval board
N: Scott McNutt
E: smcnutt@psyent.com
D: Support for Altera Nios-32 CPU
D: Support for Altera Nios-II CPU
D: Support for Nios Cyclone Development Kit (DK-1C20)
W: http://www.psyent.com
N: Rolf Offermanns
E: rof@sysgo.de
D: Initial support for SSV-DNP1110, SMC91111 driver
W: www.elinos.com
N: Keith Outwater
E: Keith_Outwater@mvis.com
D: Support for GEN860T board
N: Tolunay Orkun
E: torkun@nextio.com
D: Support for Cogent CSB272 & CSB472 boards
N: Keith Outwater
E: keith_outwater@mvis.com
D: Support for generic/custom MPC860T board (GEN860T)
D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)
N: Frank Panno
E: fpanno@delphintech.com
@@ -213,25 +323,60 @@ D: Support for 4xx SCSI, floppy, CDROM, CT69000 video, ...
D: Support for PIP405 board
D: Support for MIP405 board
N: Dave Peverley
E: dpeverley@mpc-data.co.uk
W: http://www.mpc-data.co.uk
D: OMAP730 P2 board support
N: Bill Pitts
E: wlp@mindspring.com
D: BedBug embedded debugger code
N: Daniel Poirot
E: dan.poirot@windriver.com
D: Support for the Wind River sbc405, sbc8240 board
W: http://www.windriver.com
N: Stefan Roese
E: stefan.roese@esd-electronics.com
D: IBM PPC401/403/405GP Support; Windows environment support
N: Erwin Rol
E: erwin@muffin.org
D: boot support for RTEMS
N: Paul Ruhland
E: pruhland@rochester.rr.com
D: Port to Logic Zoom LH7A40x SDK board(s)
N: Neil Russell
E: caret@c-side.com
D: Author of LiMon-1.4.2, which contributed some ideas
N: Travis B. Sawyer
E: travis.sawyer@sandburst.com
D: Support for IBM PPC440GX, XES XPedite1000 440GX PrPMC board. IBM 440gx Ref Platform (Ocotea)
N: Paolo Scaffardi
E: arsenio@tin.it
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots more
N: Robert Schwebel
E: r.schwebel@pengutronix.de
D: Support for csb226 and innokom boards (xscale)
D: Support for csb226, logodl and innokom boards (PXA2xx)
N: Yasushi Shoji
E: yashi@atmark-techno.com
D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board
N: Kurt Stremerch
E: kurt@exys.be
D: Support for Exys XSEngine board
N: Andrea Scian
E: andrea.scian@dave-tech.it
D: Port to B2 board
W: www.dave-tech.it
N: Rob Taylor
E: robt@flyingpig.com
@@ -249,6 +394,10 @@ N: Rune Torgersen
E: <runet@innovsys.com>
D: Support for Motorola MPC8266ADS board
N: Greg Ungerer
E: greg.ungerer@opengear.com
D: Support for ks8695 CPU, and OpenGear cmXXXX boards
N: David Updegraff
E: dave@cray.com
D: Port to Cray L1 board; DHCP vendor extensions
@@ -257,6 +406,27 @@ N: Christian Vejlbo
E: christian.vejlbo@tellabs.com
D: FADS860T ethernet support
N: Robert Whaley
E: rwhaley@applieddata.net
D: Port to ARM PXA27x adsvix SBC
N: Martin Winistoerfer
E: martinwinistoerfer@gmx.ch
D: Port to MPC555/556 microcontrollers and support for cmi board
N: Ming-Len Wu
E: minglen_wu@techware.com.tw
D: Motorola MX1ADS board support
W: http://www.techware.com.tw/
N: Xianghua Xiao
E: x.xiao@motorola.com
D: Support for Motorola 85xx(PowerQUICC III) chip, MPC8540ADS and MPC8560ADS boards.
N: John Zhan
E: zhanz@sinovee.com
D: Support for SinoVee Microsystems SC8xx SBC
N: Alex Zuepke
E: azu@sysgo.de
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM

View File

@@ -3,10 +3,7 @@
# Regular Maintainers for U-Boot board support: #
# #
# For any board without permanent maintainer, please contact #
# for PowerPC systems: #
# Wolfgang Denk <wd@denx.de> #
# for ARM systems: #
# Marius Gr<47>ger <mag@sysgo.de> #
# and Cc: the <U-Boot-Users@lists.sourceforge.net> mailing lists. #
# #
# Note: lists sorted by Maintainer Name #
@@ -28,10 +25,26 @@ Pantelis Antoniou <panto@intracom.gr>
NETVIA MPC8xx
Jerry Van Baren <vanbaren_gerald@si.com>
Reinhard Arlt <reinhard.arlt@esd-electronics.com>
CPCI750 PPC750FX/GX
Yuli Barcohen <yuli@arabellasw.com>
Adder MPC87x/MPC852T
ISPAN MPC8260
MPC8260ADS MPC826x/MPC827x/MPC8280
Rattler MPC8248
ZPC1900 MPC8265
Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
sacsng MPC8260
Rick Bronson <rick@efn.org>
AT91RM9200DK at91rm9200
Oliver Brown <obrown@adventnetworks.com>
gw8260 MPC8260
@@ -44,8 +57,15 @@ K
FLAGADM MPC823
Torsten Demke <torsten.demke@fci.com>
eXalion MPC824x
Wolfgang Denk <wd@denx.de>
IceCube_5100 MGT5100
IceCube_5200 MPC5200
AMX860 MPC860
ETX094 MPC850
FPS850L MPC850
@@ -59,6 +79,10 @@ Wolfgang Denk <wd@denx.de>
IVMS8_128 MPC860
IVMS8_256 MPC860
LANTEC MPC850
LWMON MPC823
NC650 MPC852
R360MPI MPC823
RMU MPC850
RRvision MPC823
SM850 MPC850
SPD823TS MPC823
@@ -75,15 +99,25 @@ Wolfgang Denk <wd@denx.de>
CU824 MPC8240
Sandpoint8240 MPC8240
SL8245 MPC8245
ATC MPC8250
PM825 MPC8250
TQM8255 MPC8255
CPU86 MPC8260
PM826 MPC8260
TQM8260 MPC8260
P3G4 MPC7410
PCIPPC2 MPC750
PCIPPC6 MPC750
Jon Diekema <diekema_jon@si.com>
EXBITGEN PPC405GP
Jon Diekema <jon.diekema@smiths-aerospace.com>
sbc8260 MPC8260
@@ -114,9 +148,14 @@ Howard Gray <mvsensor@matrix-vision.de>
MVS1 MPC823
Bill Hargen <Bill_Hargen@Jabil.com>
BUBINGA405EP PPC405EP
Klaus Heydeck <heydeck@kieback-peter.de>
KUP4K MPC855
KUP4X MPC859
Murray Jensen <Murray.Jensen@cmst.csiro.au>
@@ -129,51 +168,100 @@ Brad Kemp <Brad.Kemp@seranoa.com>
ppmc8260 MPC8260
Sangmoon Kim <dogoil@etinsys.com>
debris MPC8245
Nye Liu <nyet@zumanetworks.com>
ZUMA MPC7xx_74xx
Thomas Lange <thomas@corelatus.com>
Thomas Lange <thomas@corelatus.se>
GTH MPC860
The LEOX team <team@leox.org>
ELPT860 MPC860T
Eran Man <eran@nbase.co.il>
EVB64260_750CX MPC750CX
Andrea "llandre" Marson <andrea.marson@dave-tech.it>
PPChameleonEVB PPC405EP
Reinhard Meyer <r.meyer@emk-elektronik.de>
TOP860 MPC860
TOP860 MPC860T
TOP5200 MPC5200
Scott McNutt <smcnutt@artesyncp.com>
EBONY PPC440GP
Tolunay Orkun <torkun@nextio.com>
csb272 PPC405GP
csb472 PPC405GP
Keith Outwater <Keith_Outwater@mvis.com>
GEN860T MPC860T
GEN860T_SC MPC860T
Frank Panno <fpanno@delphintech.com>
ep8260 MPC8260
Peter Pearse <peter.pearse@arm.com>
Integrator/AP CM 926EJ-S, CM7x0T, CM9x0T
Integrator/CP CM 926EJ-S CM920T, CM940T, CM922T-XA10
Versatile/AB ARM926EJ-S
Versatile/PB ARM926EJ-S
Denis Peter <d.peter@mpl.ch>
MIP405 PPC4xx
PIP405 PPC4xx
Stefan Roese <stefan.roese@esd-electronics.com>
Daniel Poirot <dan.poirot@windriver.com>
sbc8240 MPC8240
sbc405 PPC405GP
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
ADCIOP IOP480 (PPC401)
APC405 PPC405GP
AR405 PPC405GP
ASH405 PPC405EP
CANBT PPC405CR
CPCI405 PPC405GP
CPCI4052 PPC405GP
CPCI405AB PPC405GP
CPCI405DT PPC405GP
CPCI440 PPC440GP
CPCIISER4 PPC405GP
DASA_SIM IOP480 (PPC401)
DP405 PPC405EP
DU405 PPC405GP
G2000 PPC405EP
HH405 PPC405EP
HUB405 PPC405EP
OCRTC PPC405GP
ORSG PPC405GP
PCI405 PPC405GP
PLU405 PPC405EP
PMC405 PPC405GP
VOH405 PPC405EP
VOM405 PPC405EP
WUH405 PPC405EP
Travis Sawyer (travis.sawyer@sandburst.com>
XPEDITE1K PPC440GX
OCOTEA PPC440GX
Peter De Schrijver <p2@mind.be>
@@ -193,6 +281,34 @@ Rune Torgersen <runet@innovsys.com>
MPC8266ADS MPC8266
Josef Wagner <Wagner@Microsys.de>
CPC45 MPC8245
PM520 MPC5200
Stephen Williams <steve@icarus.com>
JSE PPC405GPr
John Zhan <zhanz@sinovee.com>
svm_sc8xx MPC8xx
Jon Loeliger <jdl@freescale.com>
MPC8540ADS MPC8540
MPC8560ADS MPC8560
MPC8541CDS MPC8541
MPC8555CDS MPC8555
Dan Malek <dan@embeddededge.com>
STxGP3 MPC85xx
Yusdi Santoso <yusdi_santoso@adaptec.com>
HIDDEN_DRAGON MPC8241/MPC8245
-------------------------------------------------------------------------
Unknown / orphaned boards:
@@ -215,7 +331,6 @@ Unknown / orphaned boards:
MOUSSE MPC824x
MPC8260ADS MPC8260
RPXsuper MPC8260
rsdproto MPC8260
@@ -229,6 +344,19 @@ Unknown / orphaned boards:
# Board CPU #
#########################################################################
George G. Davis <gdavis@mvista.com>
assabet SA1100
gcplus SA1100
Thomas Elste <info@elste.org>
modnet50 ARM720T (NET+50)
Peter Figuli <peposh@etc.sk>
wepep250 xscale
Marius Gr<47>ger <mag@sysgo.de>
impa7 ARM720T (EP7211)
@@ -238,15 +366,41 @@ Kyle Harris <kharris@nexus-tech.net>
lubbock xscale
cradle xscale
ixdp425 xscale
Gary Jennejohn <gj@denx.de>
smdk2400 ARM920T
trab ARM920T
Prakash Kumar <prakash@embedx.com>
cerf250 xscale
Kshitij Gupta <kshitij@ti.com>
omap1510inn ARM925T
omap1610inn ARM926EJS
Dave Peverley <dpeverley@mpc-data.co.uk>
omap730p2 ARM926EJS
Nishant Kamat <nskamat@ti.com>
omap1610h2 ARM926EJS
Rishi Bhattacharya <rishi@ti.com>
omap5912osk ARM926EJS
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
David M<>ller <d.mueller@elsoft.ch>
smdk2410 ARM920T
VCMA9 ARM920T
Rolf Offermanns <rof@sysgo.de>
@@ -257,6 +411,16 @@ Robert Schwebel <r.schwebel@pengutronix.de>
csb226 xscale
innokom xscale
Andrea Scian <andrea.scian@dave-tech.it>
B2 ARM7TDMI (S3C44B0X)
Greg Ungerer <greg.ungerer@opengear.com>
cm4008 ks8695p
cm4116 ks8695p
cm4148 ks8695p
Alex Z<>pke <azu@sysgo.de>
lart SA1100
@@ -283,6 +447,60 @@ Daniel Engstr
Wolfgang Denk <wd@denx.de>
incaip MIPS32 4Kc
purple MIPS64 5Kc
Thomas Lange <thomas@corelatus.se>
dbau1x00 MIPS32 Au1000
#########################################################################
# Nios-32 Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Stephan Linz <linz@li-pro.net>
DK1S10 Nios-32
ADNPESC1 Nios-32
Scott McNutt <smcnutt@psyent.com>
DK1C20 Nios-32
#########################################################################
# Nios-II Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Scott McNutt <smcnutt@psyent.com>
PCI5441 Nios-II
PK1C20 Nios-II
#########################################################################
# MicroBlaze Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Yasushi Shoji <yashi@atmark-techno.com>
SUZAKU MicroBlaze
#########################################################################
# Coldfire Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
TASREG MCF5249
#########################################################################
# End of MAINTAINERS list #

203
MAKEALL
View File

@@ -1,5 +1,7 @@
#!/bin/sh
: ${JOBS:=}
if [ "${CROSS_COMPILE}" ] ; then
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
else
@@ -10,24 +12,47 @@ fi
LIST=""
#########################################################################
## MPC5xx Systems
#########################################################################
LIST_5xx=" \
cmi_mpc5xx \
"
#########################################################################
## MPC5xxx Systems
#########################################################################
LIST_5xxx=" \
icecube_5100 icecube_5200 EVAL5200 PM520 \
Total5100 Total5200 Total5200_Rev2 TQM5200_auto \
"
#########################################################################
## MPC8xx Systems
#########################################################################
LIST_8xx=" \
ADS860 AMX860 c2mon CCM \
cogent_mpc8xx ESTEEM192E ETX094 FADS823 \
FADS850SAR FADS860T FLAGADM FPS850L \
GEN860T GENIETV GTH hermes \
IAD210 ICU862_100MHz IP860 IVML24 \
IVML24_128 IVML24_256 IVMS8 IVMS8_128 \
IVMS8_256 KUP4K LANTEC lwmon \
MBX MBX860T MHPC MVS1 \
NETVIA NX823 pcu_e R360MPI \
RPXClassic RPXlite RRvision SM850 \
SPD823TS SXNI855T TOP860 TQM823L \
TQM823L_LCD TQM850L TQM855L TQM860L \
TQM860L_FEC TTTech v37 \
Adder87x GENIETV MBX860T R360MPI \
AdderII GTH MHPC RBC823 \
ADS860 hermes MPC86xADS rmu \
AMX860 IAD210 MPC885ADS RPXClassic \
c2mon ICU862_100MHz MVS1 RPXlite \
CCM IP860 NETPHONE RPXlite_DW \
cogent_mpc8xx IVML24 NETTA RRvision \
ELPT860 IVML24_128 NETTA2 SM850 \
ESTEEM192E IVML24_256 NETTA_ISDN SPD823TS \
ETX094 IVMS8 NETVIA svm_sc8xx \
FADS823 IVMS8_128 NETVIA_V2 SXNI855T \
FADS850SAR IVMS8_256 NX823 TOP860 \
FADS860T KUP4K pcu_e TQM823L \
FLAGADM KUP4X QS823 TQM823L_LCD \
FPS850L LANTEC QS850 TQM850L \
GEN860T lwmon QS860T TQM855L \
GEN860T_SC MBX quantum TQM860L \
uc100 \
v37 \
"
#########################################################################
@@ -35,12 +60,24 @@ LIST_8xx=" \
#########################################################################
LIST_4xx=" \
ADCIOP AR405 CANBT CPCI405 \
CPCI4052 CPCI440 CPCIISER4 CRAYL1 \
DASA_SIM DU405 EBONY ERIC \
MIP405 ML2 OCRTC ORSG \
PCI405 PIP405 W7OLMC W7OLMG \
WALNUT405 \
ADCIOP AR405 ASH405 BUBINGA405EP \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 csb272 \
csb472 DASA_SIM DP405 DU405 \
EBONY ERIC EXBITGEN HUB405 \
JSE MIP405 MIP405T ML2 \
ml300 OCOTEA OCRTC ORSG \
PCI405 PIP405 PLU405 PMC405 \
PPChameleonEVB VOH405 W7OLMC W7OLMG \
WALNUT405 WUH405 XPEDITE1K \
"
#########################################################################
## MPC8220 Systems
#########################################################################
LIST_8220=" \
Alaska8220 Yukon8220 \
"
#########################################################################
@@ -48,20 +85,35 @@ LIST_4xx=" \
#########################################################################
LIST_824x=" \
BMW CU824 MOUSSE MUSENKI \
OXC PN62 Sandpoint8240 Sandpoint8245 \
utx8245 \
A3000 BMW CPC45 CU824 \
debris eXalion HIDDEN_DRAGON MOUSSE \
MUSENKI MVBLUE OXC PN62 \
Sandpoint8240 Sandpoint8245 SL8245 utx8245 \
sbc8240 \
"
#########################################################################
## MPC8260 Systems
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
LIST_8260=" \
cogent_mpc8260 CPU86 ep8260 gw8260 \
hymod IPHASE4539 MPC8260ADS MPC8266ADS \
PM826 ppmc8260 RPXsuper rsdproto \
sacsng sbc8260 SCM TQM8260 \
atc cogent_mpc8260 CPU86 CPU87 \
ep8260 gw8260 hymod IPHASE4539 \
ISPAN MPC8260ADS MPC8266ADS MPC8272ADS \
PM826 PM828 ppmc8260 Rattler8248 \
RPXsuper rsdproto sacsng sbc8260 \
SCM TQM8260_AC TQM8260_AD TQM8260_AE \
ZPC1900 \
"
#########################################################################
## MPC85xx Systems (includes 8540, 8560 etc.)
#########################################################################
LIST_85xx=" \
MPC8540ADS MPC8541CDS MPC8555CDS MPC8560ADS \
PM854 sbc8540 sbc8560 stxgp3 \
TQM8540 \
"
#########################################################################
@@ -69,43 +121,113 @@ LIST_8260=" \
#########################################################################
LIST_74xx=" \
EVB64260 PCIPPC2 PCIPPC6 ZUMA \
DB64360 DB64460 EVB64260 P3G4 \
PCIPPC2 PCIPPC6 ZUMA \
"
LIST_7xx=" \
BAB7xx ELPPC \
BAB7xx CPCI750 ELPPC \
"
LIST_ppc="${LIST_8xx} ${LIST_824x} ${LIST_8260} \
${LIST_4xx} ${LIST_74xx} ${LIST_7xx}"
LIST_ppc="${LIST_5xx} ${LIST_5xxx} \
${LIST_8xx} \
${LIST_8220} ${LIST_824x} ${LIST_8260} \
${LIST_85xx} \
${LIST_4xx} \
${LIST_74xx} ${LIST_7xx}"
#########################################################################
## StrongARM Systems
#########################################################################
LIST_SA="lart shannon dnp1110"
LIST_SA="assabet dnp1110 gcplus lart shannon"
#########################################################################
## ARM7 Systems
#########################################################################
LIST_ARM7="impa7 ep7312"
LIST_ARM7="B2 ep7312 evb4510 impa7 modnet50"
#########################################################################
## ARM9 Systems
#########################################################################
LIST_ARM9="smdk2400 smdk2410 trab"
LIST_ARM9=" \
at91rm9200dk cmc_pu2 integratorcp integratorap \
lpd7a400 mx1ads mx1fs2 omap1510inn \
omap1610h2 omap1610inn omap730p2 scb9328 \
smdk2400 smdk2410 trab VCMA9 \
versatile voiceblue \
"
#########################################################################
## ARM11 Systems
#########################################################################
LIST_ARM11="omap2420h4"
#########################################################################
## Xscale Systems
#########################################################################
LIST_xscale="lubbock cradle csb226 innokom"
LIST_pxa=" \
adsvix cerf250 cradle csb226 \
innokom lubbock wepep250 xaeniax \
xm250 xsengine \
"
LIST_ixp="ixdp425"
LIST_arm="${LIST_SA} ${LIST_ARM7} ${LIST_ARM9} ${LIST_xscale}"
LIST_arm=" \
${LIST_SA} \
${LIST_ARM7} ${LIST_ARM9} ${LIST_ARM11} \
${LIST_pxa} ${LIST_ixp} \
"
#########################################################################
## MIPS Systems
#########################################################################
LIST_mips4kc="incaip"
LIST_mips5kc="purple"
LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el"
LIST_mips="${LIST_mips4kc} ${LIST_mips5kc} ${LIST_au1xx0}"
#########################################################################
## i386 Systems
#########################################################################
LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
LIST_x86="${LIST_I486}"
#########################################################################
## NIOS Systems
#########################################################################
LIST_nios=" \
ADNPESC1 ADNPESC1_base_32 \
ADNPESC1_DNPEVA2_base_32 \
DK1C20 DK1C20_standard_32 \
DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20 \
"
#########################################################################
## Nios-II Systems
#########################################################################
LIST_nios2="PCI5441 PK1C20"
#########################################################################
## MicroBlaze Systems
#########################################################################
LIST_microblaze="suzaku"
#-----------------------------------------------------------------------
#----- for now, just run PPC by default -----
[ $# = 0 ] && set $LIST_ppc
@@ -117,7 +239,7 @@ build_target() {
${MAKE} distclean >/dev/null
${MAKE} ${target}_config
${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
${MAKE} ${JOBS} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
${CROSS_COMPILE:-ppc_8xx-}size u-boot | tee -a LOG/$target.MAKELOG
}
@@ -127,7 +249,12 @@ build_target() {
for arg in $@
do
case "$arg" in
8xx|824x|8260|4xx|7xx|74xx|SA|ARM7|ARM9|ppc|arm|xscale)
ppc|5xx|5xxx|8xx|8220|824x|8260|85xx|4xx|7xx|74xx| \
arm|SA|ARM7|ARM9|ARM11|pxa|ixp| \
microblaze| \
mips| \
nios|nios2| \
x86|I486)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}

1315
Makefile

File diff suppressed because it is too large Load Diff

1419
README

File diff suppressed because it is too large Load Diff

View File

@@ -1,5 +1,5 @@
#
# (C) Copyright 2000-2002
# (C) Copyright 2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -28,7 +28,7 @@ LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
$(AR) crv $@ $(OBJS)
#########################################################################

View File

@@ -0,0 +1,29 @@
#
# (C) Copyright 2004 Atmark Techno, Inc.
#
# Yasushi SHOJI <yashi@atmark-techno.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
TEXT_BASE = 0x80F00000
PLATFORM_CPPFLAGS += -mno-xl-soft-mul
PLATFORM_CPPFLAGS += -mno-xl-soft-div
PLATFORM_CPPFLAGS += -mxl-barrel-shift

View File

@@ -0,0 +1,46 @@
/*
* (C) Copyright 2004 Atmark Techno, Inc.
*
* Yasushi SHOJI <yashi@atmark-techno.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
unsigned long flash_init(void)
{
return 0;
}
void flash_print_info(flash_info_t *info)
{
}
int flash_erase(flash_info_t *info, int s_first, int s_last)
{
return 0;
}
int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
return 0;
}

View File

@@ -0,0 +1,32 @@
/*
* (C) Copyright 2004 Atmark Techno, Inc.
*
* Yasushi SHOJI <yashi@atmark-techno.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/* This is a board specific file. It's OK to include board specific
* header files */
#include <asm/suzaku.h>
void do_reset(void)
{
*((unsigned long *)(MICROBLAZE_SYSREG_BASE_ADDR)) = MICROBLAZE_SYSREG_RECONFIGURE;
}

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@@ -0,0 +1,65 @@
/*
* (C) Copyright 2004 Atmark Techno, Inc.
*
* Yasushi SHOJI <yashi@atmark-techno.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(microblaze)
ENTRY(_start)
SECTIONS
{
.text ALIGN(0x4):
{
__text_start = .;
cpu/microblaze/start.o (.text)
*(.text)
__text_end = .;
}
.rodata ALIGN(0x4):
{
__rodata_start = .;
*(.rodata)
__rodata_end = .;
}
.data ALIGN(0x4):
{
__data_start = .;
*(.data)
__data_end = .;
}
.u_boot_cmd ALIGN(0x4):
{
__u_boot_cmd_start = .;
*(.u_boot_cmd)
__u_boot_cmd_end = .;
}
.bss ALIGN(0x4):
{
__bss_start = .;
*(.bss)
__bss_start = .;
}
}

View File

@@ -0,0 +1,48 @@
#######################################################################
#
# Copyright (C) 2000, 2001, 2002, 2003
# The LEOX team <team@leox.org>, http://www.leox.org
#
# LEOX.org is about the development of free hardware and software resources
# for system on chip.
#
# Description: U-Boot port on the LEOX's ELPT860 CPU board
# ~~~~~~~~~~~
#
#######################################################################
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#######################################################################
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
sinclude .depend
#########################################################################

View File

@@ -0,0 +1,424 @@
=============================================================================
U-Boot port on the LEOX's ELPT860 CPU board
-------------------------------------------
LEOX.org is about the development of free hardware and software resources
for system on chip.
For more information, contact The LEOX team <team@leox.org>
References:
~~~~~~~~~~
1) Get the last stable release from denx.de:
o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
2) Get the current CVS snapshot:
o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
=============================================================================
The ELPT860 CPU board has the following features:
Processor: - MPC860T @ 50MHz
- PowerPC Core
- 65 MIPS
- Caches: D->4KB, I->4KB
- CPM: 4 SCCs, 2 SMCs
- Ethernet 10/100
- SPI, I2C, PCMCIA, Parallel
CPU board: - DRAM: 16 MB
- FLASH: 512 KB + (2 * 4 MB)
- NVRAM: 128 KB
- 1 Serial link
- 2 Ethernet 10 BaseT Channels
On power-up the processor jumps to the address of 0x02000100
Thus, U-Boot is configured to reside in flash starting at the address of
0x02001000. The environment space is located in NVRAM separately from
U-Boot, at the address of 0x03000000.
=============================================================================
U-Boot test results
=============================================================================
##################################################
# Operation on the serial console (SMC1)
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: help
askenv - get environment variables from stdin
autoscr - run script from memory
base - print or set address offset
bdinfo - print Board Info structure
bootm - boot application image from memory
bootp - boot image via network using BootP/TFTP protocol
bootd - boot default, i.e., run 'bootcmd'
cmp - memory compare
coninfo - print console devices and informations
cp - memory copy
crc32 - checksum calculation
echo - echo args to console
erase - erase FLASH memory
flinfo - print FLASH memory information
go - start application at address 'addr'
help - print online help
iminfo - print header information for application image
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line
loop - infinite loop on address range
md - memory display
mm - memory modify (auto-incrementing)
mtest - simple RAM test
mw - memory write (fill)
nm - memory modify (constant address)
printenv- print environment variables
protect - enable or disable FLASH write protection
rarpboot- boot image via network using RARP/TFTP protocol
reset - Perform RESET of the CPU
run - run commands in an environment variable
saveenv - save environment variables to persistent storage
setenv - set environment variables
sleep - delay execution for some time
tftpboot- boot image via network using TFTP protocol
and env variables ipaddr and serverip
version - print monitor version
? - alias for 'help'
##################################################
# Environment Variables (CFG_ENV_IS_IN_NVRAM)
##############################
LEOX_elpt860: printenv
bootdelay=5
loads_echo=1
baudrate=9600
stdin=serial
stdout=serial
stderr=serial
ethaddr=00:03:ca:00:64:df
ipaddr=192.168.0.30
netmask=255.255.255.0
serverip=192.168.0.1
nfsserverip=192.168.0.1
preboot=echo;echo Type "run nfsboot" to mount root filesystem over NFS;echo
gatewayip=192.168.0.1
ramargs=setenv bootargs root=/dev/ram rw
rootargs=setenv rootpath /tftp/$(ipaddr)
nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(nfsserverip):$(rootpath)
addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(nfsserverip):$(gatewayip):$(netmask):$(hostname):eth0:
ramboot=tftp 400000 /home/leox/pMulti;run ramargs;bootm
nfsboot=tftp 400000 /home/leox/uImage;run rootargs;run nfsargs;run addip;bootm
bootcmd=run ramboot
clocks_in_mhz=1
Environment size: 730/16380 bytes
##################################################
# Flash Memory Information
##############################
LEOX_elpt860: flinfo
Bank # 1: AMD AM29F040 (4 Mbits)
Size: 512 KB in 8 Sectors
Sector Start Addresses:
02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000
02050000 02060000 02070000
##################################################
# Board Information Structure
##############################
LEOX_elpt860: bdinfo
memstart = 0x00000000
memsize = 0x01000000
flashstart = 0x02000000
flashsize = 0x00080000
flashoffset = 0x00030000
sramstart = 0x00000000
sramsize = 0x00000000
immr_base = 0xFF000000
bootflags = 0x00000001
intfreq = 50 MHz
busfreq = 50 MHz
ethaddr = 00:03:ca:00:64:df
IP addr = 192.168.0.30
baudrate = 9600 bps
##################################################
# Image Download and run over serial port
# hello_world (S-Record image)
# ===> 1) Enter "loads" command into U-Boot monitor
# ===> 2) From TeraTerm's bar menu, Select 'File/Send file...'
# Then select 'hello_world.srec' with the file browser
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: loads
## Ready for S-Record download ...
S804040004F3050154000501709905014C000501388D
## First Load Addr = 0x00040000
## Last Load Addr = 0x0005018B
## Total Size = 0x0001018C = 65932 Bytes
## Start Addr = 0x00040004
LEOX_elpt860: go 40004 This is a test !!!
## Starting application at 0x00040004 ...
Hello World
argc = 6
argv[0] = "40004"
argv[1] = "This"
argv[2] = "is"
argv[3] = "a"
argv[4] = "test"
argv[5] = "!!!"
argv[6] = "<NULL>"
Hit any key to exit ...
## Application terminated, rc = 0x0
##################################################
# Image download and run over ethernet interface
# Linux-2.4.4 (uImage) + Root filesystem mounted over NFS
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: run nfsboot
ARP broadcast 1
TFTP from server 192.168.0.1; our IP address is 192.168.0.30
Filename '/home/leox/uImage'.
Load address: 0x400000
Loading: #################################################################
#############################
done
Bytes transferred = 477294 (7486e hex)
## Booting image at 00400000 ...
Image Name: Linux-2.4.4
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 477230 Bytes = 466 kB = 0 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
On node 0 totalpages: 4096
zone(0): 4096 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/nfs rw nfsroot=192.168.0.1:/tftp/192.168.0.30 ip=192.168.0.30:192.168.0.1:192.168.0.1:255.255.255.0::eth0:
rtsched version <20010618.1050.24>
Decrementer Frequency: 3125000
Warning: real time clock seems stuck!
Calibrating delay loop... 49.76 BogoMIPS
Memory: 14720k available (928k kernel code, 384k data, 44k init, 0k highmem)
Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
CPM UART driver version 0.03
ttyS0 on SMC1 at 0x0280, BRG1
block: queued sectors max/low 9701kB/3233kB, 64 slots per queue
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 1024 bind 1024)
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
Looking up port of RPC 100003/2 on 192.168.0.1
Looking up port of RPC 100005/2 on 192.168.0.1
VFS: Mounted root (nfs filesystem).
Freeing unused kernel memory: 44k init
INIT: version 2.78 booting
Welcome to DENX Embedded Linux Environment
Press 'I' to enter interactive startup.
Mounting proc filesystem: [ OK ]
Configuring kernel parameters: [ OK ]
Cannot access the Hardware Clock via any known method.
Use the --debug option to see the details of our search for an access method.
Setting clock : Wed Dec 31 19:00:11 EST 1969 [ OK ]
Activating swap partitions: [ OK ]
Setting hostname 192.168.0.30: [ OK ]
Finding module dependencies:
[ OK ]
Checking filesystems
Checking all file systems.
[ OK ]
Mounting local filesystems: [ OK ]
Enabling swap space: [ OK ]
INIT: Entering runlevel: 3
Entering non-interactive startup
Starting system logger: [ OK ]
Starting kernel logger: [ OK ]
Starting xinetd: [ OK ]
192 login: root
Last login: Wed Dec 31 19:00:41 on ttyS0
bash-2.04#
##################################################
# Image download and run over ethernet interface
# Linux-2.4.4 + Root filesystem mounted from RAM (pMulti)
##############################
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
In: serial
Out: serial
Err: serial
Net: SCC ETHERNET
Type "run nfsboot" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
LEOX_elpt860: run ramboot
ARP broadcast 1
TFTP from server 192.168.0.1; our IP address is 192.168.0.30
Filename '/home/leox/pMulti'.
Load address: 0x400000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
#################################################################
########################################################
done
Bytes transferred = 1947816 (1db8a8 hex)
## Booting image at 00400000 ...
Image Name: linux-2.4.4-2002-03-21 Multiboot
Image Type: PowerPC Linux Multi-File Image (gzip compressed)
Data Size: 1947752 Bytes = 1902 kB = 1 MB
Load Address: 00000000
Entry Point: 00000000
Contents:
Image 0: 477230 Bytes = 466 kB = 0 MB
Image 1: 1470508 Bytes = 1436 kB = 1 MB
Verifying Checksum ... OK
Uncompressing Multi-File Image ... OK
Loading Ramdisk to 00e44000, end 00fab02c ... OK
Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
On node 0 totalpages: 4096
zone(0): 4096 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/ram rw
rtsched version <20010618.1050.24>
Decrementer Frequency: 3125000
Warning: real time clock seems stuck!
Calibrating delay loop... 49.76 BogoMIPS
Memory: 13280k available (928k kernel code, 384k data, 44k init, 0k highmem)
Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Starting kswapd v1.8
CPM UART driver version 0.03
ttyS0 on SMC1 at 0x0280, BRG1
block: queued sectors max/low 8741kB/2913kB, 64 slots per queue
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
RAMDISK: Compressed image found at block 0
Freeing initrd memory: 1436k freed
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 1024 bind 1024)
IP-Config: Incomplete network configuration information.
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
VFS: Mounted root (ext2 filesystem).
Freeing unused kernel memory: 44k in<69>
init started: BusyBox v0.60.2 (2002.07.01-12:06+0000) multi-call Configuring hostname
Configuring lo...
Configuring eth0...
Configuring Gateway...
Please press Enter to activate this console.
ELPT860 login: root
Password:
Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz)
a8888b.
d888888b.
8P"YP"Y88
_ _ 8|o||o|88
| | |_| 8' .88
| | _ ____ _ _ _ _ 8`._.' Y8.
| | | | _ \| | | |\ \/ / d/ `8b.
| |___ | | | | | |_| |/ \ .dP . Y8b.
|_____||_|_| |_|\____|\_/\_/ d8:' " `::88b.
d8" `Y88b
:8P ' :888
8a. : _a88P
._/"Yaa_ : .| 88P|
\ YP" `| 8P `.
/ \._____.d| .'
`--..__)888888P`._.'
login[21]: root login on `ttyS0'
BusyBox v0.60.3 (2002.07.20-10:39+0000) Built-in shell (ash)
Enter 'help' for a list of built-in commands.
root@ELPT860:~ #

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@@ -0,0 +1,36 @@
#######################################################################
#
# Copyright (C) 2000, 2001, 2002, 2003
# The LEOX team <team@leox.org>, http://www.leox.org
#
# LEOX.org is about the development of free hardware and software resources
# for system on chip.
#
# Description: U-Boot port on the LEOX's ELPT860 CPU board
# ~~~~~~~~~~~
#
#######################################################################
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#######################################################################
#
# ELPT860 board
#
TEXT_BASE = 0x02000000
#TEXT_BASE = 0x00FB0000

View File

@@ -0,0 +1,348 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
/*
** Note 1: In this file, you have to provide the following functions:
** ------
** int board_early_init_f(void)
** int checkboard(void)
** long int initdram(int board_type)
** called from 'board_init_f()' into 'common/board.c'
**
** void reset_phy(void)
** called from 'board_init_r()' into 'common/board.c'
*/
#include <common.h>
#include <mpc8xx.h>
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
/* ------------------------------------------------------------------------- */
#define _NOT_USED_ 0xFFFFFFFF
const uint init_sdram_table[] = {
/*
* Single Read. (Offset 0 in UPMA RAM)
*/
0x0FFCCC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,
0xFFFFFC04, /* last */
/*
* SDRAM Initialization (offset 5 in UPMA RAM)
*
* This is no UPM entry point. The following definition uses
* the remaining space to establish an initialization
* sequence, which is executed by a RUN command.
*
*/
0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, /* last */
/*
* Burst Read. (Offset 8 in UPMA RAM)
*/
0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, /* last */
/*
* Single Write. (Offset 18 in UPMA RAM)
*/
0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,
0xFFFFFC04, 0xFFFFFC04, 0x0FFFFC04, 0xFFFFFC04, /* last */
/*
* Burst Write. (Offset 20 in UPMA RAM)
*/
0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC34, 0x0FAC0C34,
0xFFFFFC05, 0xFFFFFC04, 0x0FFCFC04, 0xFFFFFC05, /* last */
};
const uint sdram_table[] = {
/*
* Single Read. (Offset 0 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
0xFF0FFC00, /* last */
/*
* SDRAM Initialization (offset 5 in UPMA RAM)
*
* This is no UPM entry point. The following definition uses
* the remaining space to establish an initialization
* sequence, which is executed by a RUN command.
*
*/
0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC05, /* last */
/*
* Burst Read. (Offset 8 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
0xF00FFC00, 0xF00FFC00, 0xF00FFC00, 0xFF0FFC00,
0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
/*
* Single Write. (Offset 18 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00,
0xFF0FFC04, 0x0FFCCC04, 0xFFAFFC05, /* last */
_NOT_USED_,
/*
* Burst Write. (Offset 20 in UPMA RAM)
*/
0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00,
0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04,
0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
/*
* Refresh (Offset 30 in UPMA RAM)
*/
0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_,
0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */
/*
* Exception. (Offset 3c in UPMA RAM)
*/
0x0FFFFC34, 0x0FAC0C34, 0xFFFFFC05, 0xFFAFFC04, /* last */
};
/* ------------------------------------------------------------------------- */
#define CFG_PC4 0x0800
#define CFG_DS1 CFG_PC4
/*
* Very early board init code (fpga boot, etc.)
*/
int board_early_init_f (void)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
/*
* Light up the red led on ELPT860 pcb (DS1) (PCDAT)
*/
immr->im_ioport.iop_pcdat &= ~CFG_DS1; /* PCDAT (DS1 = 0) */
immr->im_ioport.iop_pcpar &= ~CFG_DS1; /* PCPAR (0=general purpose I/O) */
immr->im_ioport.iop_pcdir |= CFG_DS1; /* PCDIR (I/O: 0=input, 1=output) */
return (0); /* success */
}
/*
* Check Board Identity:
*
* Test ELPT860 ID string
*
* Return 1 if no second DRAM bank, otherwise returns 0
*/
int checkboard (void)
{
unsigned char *s = getenv ("serial#");
if (!s || strncmp (s, "ELPT860", 7))
printf ("### No HW ID - assuming ELPT860\n");
return (0); /* success */
}
/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size8, size9;
long int size_b0 = 0;
/*
* This sequence initializes SDRAM chips on ELPT860 board
*/
upmconfig (UPMA, (uint *) init_sdram_table,
sizeof (init_sdram_table) / sizeof (uint));
memctl->memc_mptpr = 0x0200;
memctl->memc_mamr = 0x18002111;
memctl->memc_mar = 0x00000088;
memctl->memc_mcr = 0x80002000; /* CS1: SDRAM bank 0 */
upmconfig (UPMA, (uint *) sdram_table,
sizeof (sdram_table) / sizeof (uint));
/*
* Preliminary prescaler for refresh (depends on number of
* banks): This value is selected for four cycles every 62.4 us
* with two SDRAM banks or four cycles every 31.2 us with one
* bank. It will be adjusted after memory sizing.
*/
memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
/*
* The following value is used as an address (i.e. opcode) for
* the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
* the port size is 32bit the SDRAM does NOT "see" the lower two
* address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
* MICRON SDRAMs:
* -> 0 00 010 0 010
* | | | | +- Burst Length = 4
* | | | +----- Burst Type = Sequential
* | | +------- CAS Latency = 2
* | +----------- Operating Mode = Standard
* +-------------- Write Burst Mode = Programmed Burst Length
*/
memctl->memc_mar = 0x00000088;
/*
* Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
* preliminary addresses - these have to be modified after the
* SDRAM size has been determined.
*/
memctl->memc_or1 = CFG_OR1_PRELIM;
memctl->memc_br1 = CFG_BR1_PRELIM;
memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
udelay (200);
/* perform SDRAM initializsation sequence */
memctl->memc_mcr = 0x80002105; /* CS1: SDRAM bank 0 */
udelay (1);
memctl->memc_mcr = 0x80002230; /* CS1: SDRAM bank 0 - execute twice */
udelay (1);
memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */
udelay (1000);
/*
* Check Bank 0 Memory Size for re-configuration
*
* try 8 column mode
*/
size8 = dram_size (CFG_MAMR_8COL,
(ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
udelay (1000);
/*
* try 9 column mode
*/
size9 = dram_size (CFG_MAMR_9COL,
(ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
if (size8 < size9) { /* leave configuration at 9 columns */
size_b0 = size9;
/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
} else { /* back to 8 columns */
size_b0 = size8;
memctl->memc_mamr = CFG_MAMR_8COL;
udelay (500);
/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
}
udelay (1000);
/*
* Adjust refresh rate depending on SDRAM type, both banks
* For types > 128 MBit leave it at the current (fast) rate
*/
if (size_b0 < 0x02000000) {
/* reduce to 15.6 us (62.4 us / quad) */
memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
udelay (1000);
}
/*
* Final mapping: map bigger bank first
*/
memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
{
unsigned long reg;
/* adjust refresh rate depending on SDRAM type, one bank */
reg = memctl->memc_mptpr;
reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
memctl->memc_mptpr = reg;
}
udelay (10000);
return (size_b0);
}
/* ------------------------------------------------------------------------- */
/*
* Check memory range for valid RAM. A simple memory test determines
* the actually available RAM size between addresses `base' and
* `base + maxsize'. Some (not all) hardware errors are detected:
* - short between address lines
* - short between data lines
*/
static long int
dram_size (long int mamr_value, long int *base, long int maxsize)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
memctl->memc_mamr = mamr_value;
return (get_ram_size (base, maxsize));
}
/* ------------------------------------------------------------------------- */
#define CFG_PA1 0x4000
#define CFG_PA2 0x2000
#define CFG_LBKs (CFG_PA2 | CFG_PA1)
void reset_phy (void)
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
/*
* Ensure LBK LXT901 ethernet 1 & 2 = 0 ... for normal loopback in effect
* and no AUI loopback
*/
immr->im_ioport.iop_padat &= ~CFG_LBKs; /* PADAT (LBK eth 1&2 = 0) */
immr->im_ioport.iop_papar &= ~CFG_LBKs; /* PAPAR (0=general purpose I/O) */
immr->im_ioport.iop_padir |= CFG_LBKs; /* PADIR (I/O: 0=input, 1=output) */
}

615
board/LEOX/elpt860/flash.c Normal file
View File

@@ -0,0 +1,615 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
/*
** Note 1: In this file, you have to provide the following variable:
** ------
** flash_info_t flash_info[CFG_MAX_FLASH_BANKS]
** 'flash_info_t' structure is defined into 'include/flash.h'
** and defined as extern into 'common/cmd_flash.c'
**
** Note 2: In this file, you have to provide the following functions:
** ------
** unsigned long flash_init(void)
** called from 'board_init_r()' into 'common/board.c'
**
** void flash_print_info(flash_info_t *info)
** called from 'do_flinfo()' into 'common/cmd_flash.c'
**
** int flash_erase(flash_info_t *info,
** int s_first,
** int s_last)
** called from 'do_flerase()' & 'flash_sect_erase()' into 'common/cmd_flash.c'
**
** int write_buff (flash_info_t *info,
** uchar *src,
** ulong addr,
** ulong cnt)
** called from 'flash_write()' into 'common/cmd_flash.c'
*/
#include <common.h>
#include <mpc8xx.h>
#ifndef CFG_ENV_ADDR
# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
#endif
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
* Internal Functions
*/
static void flash_get_offsets (ulong base, flash_info_t *info);
static ulong flash_get_size (volatile unsigned char *addr, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
static int write_byte (flash_info_t *info, ulong dest, uchar data);
/*-----------------------------------------------------------------------
*/
unsigned long
flash_init (void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
unsigned long size_b0;
int i;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i)
{
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 = flash_get_size ((volatile unsigned char *)FLASH_BASE0_PRELIM,
&flash_info[0]);
if ( flash_info[0].flash_id == FLASH_UNKNOWN )
{
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
}
/* Remap FLASH according to real size */
memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_PS_8 | BR_V;
/* Re-do sizing to get full correct info */
size_b0 = flash_get_size ((volatile unsigned char *)CFG_FLASH_BASE,
&flash_info[0]);
flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]);
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
/* monitor protection ON by default */
flash_protect (FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE + monitor_flash_len-1,
&flash_info[0]);
#endif
#ifdef CFG_ENV_IS_IN_FLASH
/* ENV protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE-1,
&flash_info[0]);
#endif
flash_info[0].size = size_b0;
return (size_b0);
}
/*-----------------------------------------------------------------------
*/
static void
flash_get_offsets (ulong base,
flash_info_t *info)
{
int i;
#define SECTOR_64KB 0x00010000
/* set up sector start adress table */
for (i = 0; i < info->sector_count; i++)
{
info->start[i] = base + (i * SECTOR_64KB);
}
}
/*-----------------------------------------------------------------------
*/
void
flash_print_info (flash_info_t *info)
{
int i;
if ( info->flash_id == FLASH_UNKNOWN )
{
printf ("missing or unknown FLASH type\n");
return;
}
switch ( info->flash_id & FLASH_VENDMASK )
{
case FLASH_MAN_AMD: printf ("AMD "); break;
case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
case FLASH_MAN_STM: printf ("STM (Thomson) "); break;
default: printf ("Unknown Vendor "); break;
}
switch ( info->flash_id & FLASH_TYPEMASK )
{
case FLASH_AM040: printf ("AM29F040 (4 Mbits)\n");
break;
default: printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld KB in %d Sectors\n",
info->size >> 10, info->sector_count);
printf (" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i)
{
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
}
printf ("\n");
return;
}
/*-----------------------------------------------------------------------
*/
/*-----------------------------------------------------------------------
*/
/*
* The following code cannot be run from FLASH!
*/
static ulong
flash_get_size (volatile unsigned char *addr,
flash_info_t *info)
{
short i;
uchar value;
ulong base = (ulong)addr;
/* Write auto select command: read Manufacturer ID */
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
addr[0x0555] = 0x90;
value = addr[0];
switch ( value )
{
/* case AMD_MANUFACT: */
case 0x01:
info->flash_id = FLASH_MAN_AMD;
break;
/* case FUJ_MANUFACT: */
case 0x04:
info->flash_id = FLASH_MAN_FUJ;
break;
/* case STM_MANUFACT: */
case 0x20:
info->flash_id = FLASH_MAN_STM;
break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
return (0); /* no or unknown flash */
}
value = addr[1]; /* device ID */
switch ( value )
{
case STM_ID_F040B:
case AMD_ID_F040B:
info->flash_id += FLASH_AM040; /* 4 Mbits = 512k * 8 */
info->sector_count = 8;
info->size = 0x00080000;
break;
default:
info->flash_id = FLASH_UNKNOWN;
return (0); /* => no or unknown flash */
}
/* set up sector start adress table */
for (i = 0; i < info->sector_count; i++)
{
info->start[i] = base + (i * 0x00010000);
}
/* check for protected sectors */
for (i = 0; i < info->sector_count; i++)
{
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
/* D0 = 1 if protected */
addr = (volatile unsigned char *)(info->start[i]);
info->protect[i] = addr[2] & 1;
}
/*
* Prevent writes to uninitialized FLASH.
*/
if ( info->flash_id != FLASH_UNKNOWN )
{
addr = (volatile unsigned char *)info->start[0];
*addr = 0xF0; /* reset bank */
}
return (info->size);
}
/*-----------------------------------------------------------------------
*/
int
flash_erase (flash_info_t *info,
int s_first,
int s_last)
{
volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
int flag, prot, sect, l_sect;
ulong start, now, last;
if ( (s_first < 0) || (s_first > s_last) )
{
if ( info->flash_id == FLASH_UNKNOWN )
{
printf ("- missing\n");
}
else
{
printf ("- no sectors to erase\n");
}
return ( 1 );
}
if ( (info->flash_id == FLASH_UNKNOWN) ||
(info->flash_id > FLASH_AMD_COMP) )
{
printf ("Can't erase unknown flash type %08lx - aborted\n",
info->flash_id);
return ( 1 );
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect)
{
if ( info->protect[sect] )
{
prot++;
}
}
if ( prot )
{
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
}
else
{
printf ("\n");
}
l_sect = -1;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
addr[0x0555] = 0x80;
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last; sect++)
{
if (info->protect[sect] == 0) /* not protected */
{
addr = (volatile unsigned char *)(info->start[sect]);
addr[0] = 0x30;
l_sect = sect;
}
}
/* re-enable interrupts if necessary */
if ( flag )
enable_interrupts();
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
/*
* We wait for the last triggered sector
*/
if ( l_sect < 0 )
goto DONE;
start = get_timer (0);
last = start;
addr = (volatile unsigned char *)(info->start[l_sect]);
while ( (addr[0] & 0x80) != 0x80 )
{
if ( (now = get_timer(start)) > CFG_FLASH_ERASE_TOUT )
{
printf ("Timeout\n");
return ( 1 );
}
/* show that we're waiting */
if ( (now - last) > 1000 ) /* every second */
{
putc ('.');
last = now;
}
}
DONE:
/* reset to read mode */
addr = (volatile unsigned char *)info->start[0];
addr[0] = 0xF0; /* reset bank */
printf (" done\n");
return ( 0 );
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
int
write_buff (flash_info_t *info,
uchar *src,
ulong addr,
ulong cnt)
{
ulong cp, wp, data;
uchar bdata;
int i, l, rc;
if ( (info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 )
{
/* Width of the data bus: 8 bits */
wp = addr;
while ( cnt )
{
bdata = *src++;
if ( (rc = write_byte(info, wp, bdata)) != 0 )
{
return (rc);
}
++wp;
--cnt;
}
return ( 0 );
}
else
{
/* Width of the data bus: 32 bits */
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ( (l = addr - wp) != 0 )
{
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp)
{
data = (data << 8) | (*(uchar *)cp);
}
for (; i<4 && cnt>0; ++i)
{
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp)
{
data = (data << 8) | (*(uchar *)cp);
}
if ( (rc = write_word(info, wp, data)) != 0 )
{
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while ( cnt >= 4 )
{
data = 0;
for (i=0; i<4; ++i)
{
data = (data << 8) | *src++;
}
if ( (rc = write_word(info, wp, data)) != 0 )
{
return (rc);
}
wp += 4;
cnt -= 4;
}
if ( cnt == 0 )
{
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp)
{
data = (data << 8) | *src++;
--cnt;
}
for (; i<4; ++i, ++cp)
{
data = (data << 8) | (*(uchar *)cp);
}
return (write_word(info, wp, data));
}
}
/*-----------------------------------------------------------------------
* Write a word to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int
write_word (flash_info_t *info,
ulong dest,
ulong data)
{
vu_long *addr = (vu_long*)(info->start[0]);
ulong start;
int flag;
/* Check if Flash is (sufficiently) erased */
if ( (*((vu_long *)dest) & data) != data )
{
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0x00AA00AA;
addr[0x02AA] = 0x00550055;
addr[0x0555] = 0x00A000A0;
*((vu_long *)dest) = data;
/* re-enable interrupts if necessary */
if ( flag )
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) )
{
if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
{
return (1);
}
}
return (0);
}
/*-----------------------------------------------------------------------
* Write a byte to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int
write_byte (flash_info_t *info,
ulong dest,
uchar data)
{
volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
ulong start;
int flag;
/* Check if Flash is (sufficiently) erased */
if ( (*((volatile unsigned char *)dest) & data) != data )
{
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts();
addr[0x0555] = 0xAA;
addr[0x02AA] = 0x55;
addr[0x0555] = 0xA0;
*((volatile unsigned char *)dest) = data;
/* re-enable interrupts if necessary */
if ( flag )
enable_interrupts();
/* data polling for D7 */
start = get_timer (0);
while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) )
{
if ( get_timer(start) > CFG_FLASH_WRITE_TOUT )
{
return (1);
}
}
return (0);
}
/*-----------------------------------------------------------------------
*/

View File

@@ -0,0 +1,151 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
lib_ppc/ppcstring.o (.text)
lib_generic/vsprintf.o (.text)
lib_generic/crc32.o (.text)
lib_generic/zlib.o (.text)
lib_generic/string.o (.text)
lib_ppc/cache.o (.text)
lib_ppc/extable.o (.text)
lib_ppc/time.o (.text)
lib_ppc/ticks.o (.text)
. = env_offset;
common/environment.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -0,0 +1,139 @@
/*
**=====================================================================
**
** Copyright (C) 2000, 2001, 2002, 2003
** The LEOX team <team@leox.org>, http://www.leox.org
**
** LEOX.org is about the development of free hardware and software resources
** for system on chip.
**
** Description: U-Boot port on the LEOX's ELPT860 CPU board
** ~~~~~~~~~~~
**
**=====================================================================
**
** This program is free software; you can redistribute it and/or
** modify it under the terms of the GNU General Public License as
** published by the Free Software Foundation; either version 2 of
** the License, or (at your option) any later version.
**
** This program is distributed in the hope that it will be useful,
** but WITHOUT ANY WARRANTY; without even the implied warranty of
** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
** GNU General Public License for more details.
**
** You should have received a copy of the GNU General Public License
** along with this program; if not, write to the Free Software
** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
** MA 02111-1307 USA
**
**=====================================================================
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
lib_generic/vsprintf.o (.text)
lib_generic/crc32.o (.text)
. = env_offset;
common/environment.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x0FFF) & 0xFFFFF000;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4096);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4096);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -30,47 +30,47 @@
#include "via686.h"
__asm(" .globl send_kb \n
send_kb: \n
lis r9, 0xfe00 \n
\n
li r4, 0x10 # retries \n
mtctr r4 \n
\n
idle: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x02 \n
bne idle \n
\n
ready: \n
stb r3, 0x60(r9) \n
\n
check: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x01 \n
beq check \n
\n
lbz r4, 0x60(r9) \n
cmpwi r4, 0xfa \n
beq done \n
\n
bdnz idle \n
\n
li r3, 0 \n
blr \n
\n
done: \n
li r3, 1 \n
blr \n
\n
.globl test_kb \n
test_kb: \n
mflr r10 \n
li r3, 0xed \n
bl send_kb \n
li r3, 0x01 \n
bl send_kb \n
mtlr r10 \n
blr \n
send_kb: \n
lis r9, 0xfe00 \n
\n
li r4, 0x10 # retries \n
mtctr r4 \n
\n
idle: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x02 \n
bne idle \n
\n
ready: \n
stb r3, 0x60(r9) \n
\n
check: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x01 \n
beq check \n
\n
lbz r4, 0x60(r9) \n
cmpwi r4, 0xfa \n
beq done \n
\n
bdnz idle \n
\n
li r3, 0 \n
blr \n
\n
done: \n
li r3, 1 \n
blr \n
\n
.globl test_kb \n
test_kb: \n
mflr r10 \n
li r3, 0xed \n
bl send_kb \n
li r3, 0x01 \n
bl send_kb \n
mtlr r10 \n
blr \n
");
@@ -86,7 +86,6 @@ long initdram (int board_type)
}
void after_reloc (ulong dest_addr, gd_t *gd)
{
/* HJF: DECLARE_GLOBAL_DATA_PTR; */

View File

@@ -675,7 +675,7 @@ static __inline__ void set_msr (unsigned long msr)
asm volatile ("mtmsr %0"::"r" (msr));
}
int board_pre_init (void)
int board_early_init_f (void)
{
unsigned char c_value = 0;
unsigned long msr;

View File

@@ -134,7 +134,6 @@
#define ARTICIAS_ISAIO_PHYS 0xfe002000
/* Prototypes */
long articiaS_ram_init(void);
void articiaS_pci_init(void);

View File

@@ -123,14 +123,14 @@ struct pci_irq_fixup_table fixuptab [] =
{
{ 0, 0, 0, 0xff}, /* Articia S host bridge */
{ 0, 1, 0, 0xff}, /* Articia S AGP bridge */
// { 0, 6, 0, 0x05}, /* 3COM ethernet */
/* { 0, 6, 0, 0x05}, /###* 3COM ethernet */
{ 0, 7, 0, 0xff}, /* VIA southbridge */
{ 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */
// { 0, 7, 2, 0x05}, /* First USB controller */
// { 0, 7, 3, 0x0c}, /* Second USB controller (shares interrupt with ethernet) */
/* { 0, 7, 2, 0x05}, /###* First USB controller */
/* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */
{ 0, 7, 4, 0xff}, /* ACPI Power Management */
// { 0, 7, 5, 0x08}, /* AC97 */
// { 0, 7, 6, 0x08}, /* MC97 */
/* { 0, 7, 5, 0x08}, /###* AC97 */
/* { 0, 7, 6, 0x08}, /###* MC97 */
{ 0xff, 0xff, 0xff, 0xff}
};
@@ -287,7 +287,7 @@ void articiaS_pci_init (void)
PRINTF("atriciaS_pci_init\n");
// Why aren't these relocated??
/* Why aren't these relocated?? */
for (i=0; config_table[i].config_device; i++)
{
switch((int)config_table[i].config_device)
@@ -335,7 +335,6 @@ void articiaS_pci_init (void)
PCI_REGION_IO);
articiaS_hose.region_count = 4;
pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
@@ -410,8 +409,8 @@ pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_c
pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
class = c1<<8 | c2;
//printf("At %02x:%02x:%02x: class %x\n",
// PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class);
/*printf("At %02x:%02x:%02x: class %x\n", */
/* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
if (class == find_class)
{
if (index == 0)
@@ -441,7 +440,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
if (hose == NULL) hose = &articiaS_hose;
if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; // Not in range
if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */
/*
* The bridge must be on a lower bus number
@@ -467,7 +466,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
if (!PCI_FUNC(dev))
found_multi = header_type & 0x80;
if (header_type == 1) // Bridge device header
if (header_type == 1) /* Bridge device header */
{
pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
if ((int)secondary_bus == busnr) return dev;

View File

@@ -1,5 +1,4 @@
#include "macros.h"
#include "macros.h"
#define GLOBALINFO0 0x50

View File

@@ -1,6 +1,5 @@
#include <common.h>
#include <command.h>
#include <cmd_boota.h>
#include "../disk/part_amiga.h"
#include <asm/cache.h>
@@ -121,3 +120,10 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
return 0;
}
#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
U_BOOT_CMD(
boota, 3, 1, do_boota,
"boota - boot an Amiga kernel\n",
"address disk"
);
#endif /* _CMD_BOOTA_H */

View File

@@ -30,4 +30,3 @@ X86EMU = -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86e
TEXT_BASE = 0xfff00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG

View File

@@ -36,7 +36,7 @@
/* 3Com Ethernet PCI definitions*/
// #define PCI_VENDOR_ID_3COM 0x10B7
/* #define PCI_VENDOR_ID_3COM 0x10B7 */
#define PCI_DEVICE_ID_3COM_3C905C 0x9200
/* 3Com Commands, top 5 bits are command and bottom 11 bits are parameters */
@@ -148,11 +148,11 @@
#define Wn3_Options 8
#define BFEXT(value, offset, bitcount) \
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
#define BFINS(lhs, rhs, offset, bitcount) \
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
#define RAM_SIZE(v) BFEXT(v, 0, 3)
#define RAM_WIDTH(v) BFEXT(v, 3, 1)
@@ -196,10 +196,10 @@
#define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
struct rx_desc_3com {
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
};
/* Values for the Rx status entry. */
@@ -214,10 +214,10 @@ struct rx_desc_3com {
#define UDPChksumValid (1<<31)
struct tx_desc_3com {
u32 next; /* Last entry points to 0 */
u32 status; /* bits 0:12 length, others see below */
u32 addr;
u32 length;
u32 next; /* Last entry points to 0 */
u32 status; /* bits 0:12 length, others see below */
u32 addr;
u32 length;
};
/* Values for the Tx status entry. */
@@ -243,10 +243,10 @@ struct tx_desc_3com {
#define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
struct descriptor { /* A generic descriptor. */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
};
/* Misc. definitions */
@@ -348,24 +348,24 @@ static inline void ETH_CMD(struct eth_device* dev, int command)
static int issue_and_wait(struct eth_device* dev, int command)
{
int i, status;
int i, status;
ETH_CMD(dev, command);
for (i = 0; i < 2000; i++) {
status = ETH_STATUS(dev);
//printf ("Issue: status 0x%4x.\n", status);
for (i = 0; i < 2000; i++) {
status = ETH_STATUS(dev);
/*printf ("Issue: status 0x%4x.\n", status); */
if (!(status & CmdInProgress))
return 1;
}
return 1;
}
/* OK, that didn't work. Do it the slow way. One second */
for (i = 0; i < 100000; i++) {
status = ETH_STATUS(dev);
//printf ("Issue: status 0x%4x.\n", status);
return 1;
udelay(10);
}
PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
/* OK, that didn't work. Do it the slow way. One second */
for (i = 0; i < 100000; i++) {
status = ETH_STATUS(dev);
/*printf ("Issue: status 0x%4x.\n", status); */
return 1;
udelay(10);
}
PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
return 0;
}
@@ -378,7 +378,7 @@ static int auto_negotiate(struct eth_device* dev)
EL3WINDOW(dev, 1);
// Wait for Auto negotiation to complete
/* Wait for Auto negotiation to complete */
for (i = 0; i <= 1000; i++)
{
if (ETH_INW(dev, 2) & 0x04)
@@ -393,7 +393,6 @@ static int auto_negotiate(struct eth_device* dev)
}
return 1;
}
@@ -430,10 +429,10 @@ void eth_interrupt(struct eth_device *dev)
int eth_3com_initialize(bd_t *bis)
{
u32 eth_iobase = 0, status;
int card_number = 0, ret;
struct eth_device* dev;
pci_dev_t devno;
u32 eth_iobase = 0, status;
int card_number = 0, ret;
struct eth_device* dev;
pci_dev_t devno;
char *s;
s = getenv("3com_base");
@@ -453,7 +452,7 @@ int eth_3com_initialize(bd_t *bis)
}
ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &eth_iobase);
eth_iobase &= ~0xf;
eth_iobase &= ~0xf;
PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
@@ -481,17 +480,17 @@ int eth_3com_initialize(bd_t *bis)
goto Done;
}
dev = (struct eth_device*) malloc(sizeof(*dev)); //struct eth_device));
dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */
sprintf(dev->name, "3Com 3c920c#%d", card_number);
dev->iobase = eth_iobase;
dev->priv = (void*) devno;
dev->init = eth_3com_init;
dev->halt = eth_3com_halt;
dev->send = eth_3com_send;
dev->recv = eth_3com_recv;
sprintf(dev->name, "3Com 3c920c#%d", card_number);
dev->iobase = eth_iobase;
dev->priv = (void*) devno;
dev->init = eth_3com_init;
dev->halt = eth_3com_halt;
dev->send = eth_3com_send;
dev->recv = eth_3com_recv;
eth_register(dev);
eth_register(dev);
/* { */
/* char interrupt; */
@@ -502,7 +501,7 @@ int eth_3com_initialize(bd_t *bis)
/* irq_install_handler(interrupt, eth_interrupt, dev); */
/* } */
card_number++;
card_number++;
/* Set the latency timer for value */
s = getenv("3com_latency");
@@ -560,43 +559,43 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
goto Done;
}
issue_and_wait(dev, TxReset);
issue_and_wait(dev, RxReset|0x04);
issue_and_wait(dev, TxReset);
issue_and_wait(dev, RxReset|0x04);
/* Switch to register set 7 for normal use. */
EL3WINDOW(dev, 7);
/* Switch to register set 7 for normal use. */
EL3WINDOW(dev, 7);
/* Initialize Rx and Tx rings */
init_rx_ring(dev);
purge_tx_ring(dev);
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
issue_and_wait(dev,SetTxStart|0x07ff);
issue_and_wait(dev,SetTxStart|0x07ff);
/* Below sets which indication bits to be seen. */
/* Below sets which indication bits to be seen. */
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
ETH_CMD(dev, status_enable);
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
ETH_CMD(dev, status_enable);
/* Below sets no bits are to cause an interrupt since this is just polling */
intr_enable = SetIntrEnb;
// intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6);
ETH_CMD(dev, intr_enable);
intr_enable = SetIntrEnb;
/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
ETH_CMD(dev, intr_enable);
ETH_OUTB(dev, 127, UpPoll);
/* Ack all pending events, and set active indicator mask */
/* Ack all pending events, and set active indicator mask */
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD(dev, intr_enable);
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD(dev, intr_enable);
/* Tell the adapter where the RX ring is located */
issue_and_wait(dev,UpStall); /* Stall and set the UplistPtr */
ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
issue_and_wait(dev,UpUnstall);
/* Send the Individual Address Setup frame */
@@ -612,7 +611,7 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
/* Tell the adapter where the TX ring is located */
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
issue_and_wait(dev, DownStall); /* Stall and set the DownListPtr. */
ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
issue_and_wait(dev, DownUnstall);
@@ -627,8 +626,8 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
}
@@ -673,8 +672,8 @@ int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
}
@@ -758,8 +757,8 @@ void eth_3com_halt(struct eth_device* dev)
issue_and_wait(dev, RxDisable);
issue_and_wait(dev, TxDisable);
// free(tx_ring); /* release memory allocated to the DPD and UPD rings */
// free(rx_ring);
/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
/* free(rx_ring); */
Done:
return;
@@ -806,32 +805,32 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
unsigned int checksum = 0;
int i, j, timer;
/* Read the station address from the EEPROM. */
/* Read the station address from the EEPROM. */
EL3WINDOW(dev, 0);
EL3WINDOW(dev, 0);
for (i = 0; i < 0x40; i++)
{
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
{
udelay(162);
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
break;
}
eeprom[i] = ETH_INW(dev, Wn0EepromData);
}
udelay(162);
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
break;
}
eeprom[i] = ETH_INW(dev, Wn0EepromData);
}
/* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
for (i = 0; i < 0x21; i++)
checksum ^= eeprom[i];
checksum = (checksum ^ (checksum >> 8)) & 0xff;
for (i = 0; i < 0x21; i++)
checksum ^= eeprom[i];
checksum = (checksum ^ (checksum >> 8)) & 0xff;
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
for (i = 0, j = 0; i < 3; i++)
for (i = 0, j = 0; i < 3; i++)
{
hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
@@ -839,9 +838,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
/* MAC Address is in window 2, write value from EEPROM to window 2 */
EL3WINDOW(dev, 2);
for (i = 0; i < 6; i++)
ETH_OUTB(dev, hw_addr[i], i);
EL3WINDOW(dev, 2);
for (i = 0; i < 6; i++)
ETH_OUTB(dev, hw_addr[i], i);
for (j = 0; j < ETH_ALEN; j+=2)
{
@@ -883,4 +882,3 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
Done:
return;
}

View File

@@ -31,7 +31,6 @@
/*---------------------------------------------------------------------*/
#undef DEBUG_FLASH
//#define DEBUG_FLASH
#ifdef DEBUG_FLASH
#define DEBUGF(fmt,args...) printf(fmt ,##args)
@@ -120,7 +119,7 @@ unsigned long flash_init (void)
/* monitor protection ON by default */
flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
CFG_MONITOR_BASE + monitor_flash_len - 1,
&flash_info[0]);
#endif
@@ -327,7 +326,7 @@ static int flash_get_offsets (ulong base, flash_info_t *info)
/* set sector offsets for uniform sector type */
for (i = 0; i < info->sector_count; i++) {
info->start[i] = base + i * info->size /
info->sector_count;
info->sector_count;
}
break;
default:
@@ -478,7 +477,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
}
if ((rc = write_word(info, wp, data)) != 0) {
flash_to_mem();
flash_to_mem();
return (rc);
}
wp += 4;
@@ -493,7 +492,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
data = (data << 8) | *src++;
}
if ((rc = write_word(info, wp, data)) != 0) {
flash_to_mem();
flash_to_mem();
return (rc);
}
wp += 4;
@@ -582,7 +581,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
*/
static void flash_reset (ulong addr)
{
flash_to_xd();
flash_to_xd();
out8(addr, 0xF0); /* reset bank */
iobarrier_rw();
flash_to_mem();
@@ -633,10 +632,10 @@ void flash_print_info (flash_info_t *info)
info->size / 0x100000, info->sector_count);
} else if (info->size % 0x400 == 0) {
printf (" Size: %ld KB in %d Sectors\n",
info->size / 0x400, info->sector_count);
info->size / 0x400, info->sector_count);
} else {
printf (" Size: %ld B in %d Sectors\n",
info->size, info->sector_count);
info->size, info->sector_count);
}
printf (" Sector Start Addresses:");

View File

@@ -75,16 +75,16 @@ void i8259_init(void)
char dummy;
PRINTF("Initializing Interrupt controller\n");
/* init master interrupt controller */
out8(0x20, 0x11); //0x19); // was: 0x11); /* Start init sequence */
out8(0x20, 0x11); /* 0x19); /###* Start init sequence */
out8(0x21, 0x00); /* Vector base */
out8(0x21, 0x04); /* edge tiggered, Cascade (slave) on IRQ2 */
out8(0x21, 0x11); // was: 0x01); /* Select 8086 mode */
out8(0x21, 0x11); /* was: 0x01); /###* Select 8086 mode */
/* init slave interrupt controller */
out8(0xA0, 0x11); //0x19); // was: 0x11); /* Start init sequence */
out8(0xA0, 0x11); /* 0x19); /###* Start init sequence */
out8(0xA1, 0x08); /* Vector base */
out8(0xA1, 0x02); /* edge triggered, Cascade (slave) on IRQ2 */
out8(0xA1, 0x11); // was: 0x01); /* Select 8086 mode */
out8(0xA1, 0x11); /* was: 0x01); /###* Select 8086 mode */
/* always read ISR */
out8(0x20, 0x0B);

View File

@@ -167,8 +167,8 @@ external_interrupt(struct pt_regs *regs)
int irq, unmask = 1;
irq = i8259_irq(); //i8259_get_irq(regs);
// printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000);
irq = i8259_irq(); /*i8259_get_irq(regs); */
/* printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); */
i8259_mask_and_ack(irq);
if (irq_handlers[irq].handler != NULL)
@@ -264,5 +264,3 @@ do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
puts("IRQ related functions are unimplemented currently.\n");
}

View File

@@ -5,10 +5,10 @@
/*
** Load a long integer into a register
*/
.macro liw reg, value
lis \reg, \value@h
ori \reg, \reg, \value@l
.endm
.macro liw reg, value
lis \reg, \value@h
ori \reg, \reg, \value@l
.endm
/*
@@ -45,40 +45,40 @@
/*
** Write a byte value to an output port
*/
.macro outb port, value
lis r2, 0xfe00
li r0, \value
stb r0, \port(r2)
.endm
.macro outb port, value
lis r2, 0xfe00
li r0, \value
stb r0, \port(r2)
.endm
/*
** Write a register byte value to an output port
*/
.macro outbr port, value
lis r2, 0xfe00
stb \value, \port(r2)
.endm
.macro outbr port, value
lis r2, 0xfe00
stb \value, \port(r2)
.endm
/*
** Read a byte value from a port into a specified register
*/
.macro inb reg, port
lis r2, 0xfe00
lbz \reg, \port(r2)
.endm
.macro inb reg, port
lis r2, 0xfe00
lbz \reg, \port(r2)
.endm
/*
** Write a byte to the SuperIO config area
*/
.macro siowb offset, value
li r3, 0
li r4, (7<<3)
li r5, \offset
li r6, \value
bl pci_write_cfg_byte
.endm
.macro siowb offset, value
li r3, 0
li r4, (7<<3)
li r5, \offset
li r6, \value
bl pci_write_cfg_byte
.endm
#endif

View File

@@ -1,7 +1,6 @@
#include "macros.h"
.globl pci_read_cfg_byte
pci_read_cfg_byte:
@@ -13,7 +12,6 @@ pci_read_cfg_byte:
blr
.globl pci_write_cfg_byte
pci_write_cfg_byte:
@@ -25,7 +23,6 @@ pci_write_cfg_byte:
blr
.globl pci_read_cfg_word
pci_read_cfg_word:
@@ -37,7 +34,6 @@ pci_read_cfg_word:
blr
.globl pci_write_cfg_word
pci_write_cfg_word:
@@ -49,7 +45,6 @@ pci_write_cfg_word:
blr
.globl pci_read_cfg_long
pci_read_cfg_long:
@@ -61,7 +56,6 @@ pci_read_cfg_long:
blr
.globl pci_write_cfg_long
pci_write_cfg_long:
@@ -71,4 +65,3 @@ pci_write_cfg_long:
eieio
sync
blr

View File

@@ -97,8 +97,8 @@ static inline void write_long_big(volatile uint32 *to, uint32 x)
#define CONFIG_ADDR(bus, devfn, offset) \
write_long_big((uint32 *)0xFEC00CF8, \
((offset & 0xFC)<<24) | (devfn << 16) \
| (bus<<8) | 0x80);
((offset & 0xFC)<<24) | (devfn << 16) \
| (bus<<8) | 0x80);
#define CONFIG_DATA(offset,mask) ((void *)(0xFEE00CFC+(offset & mask)))

View File

@@ -34,4 +34,3 @@ void disable_nvram(void)
{
pci_write_cfg_byte(0, 0, 0x56, 0x0);
}

View File

@@ -48,7 +48,6 @@ void i8259_unmask_irq(unsigned int irq);
#undef KBG_DEBUG
//#define KBG_DEBUG
#ifdef KBG_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@@ -143,8 +142,6 @@ void i8259_unmask_irq(unsigned int irq);
#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
static volatile char kbd_buffer[KBD_BUFFER_LEN];
static volatile int in_pointer = 0;
static volatile int out_pointer = 0;
@@ -494,7 +491,6 @@ unsigned char handle_kbd_event(void)
}
/******************************************************************************
* Lowlevel Part of keyboard section
*/
@@ -692,8 +688,3 @@ void kbd_interrupt(void)
{
handle_kbd_event();
}
/* eof */

View File

@@ -34,7 +34,7 @@ void sm_write_byte(uint8 writeme)
for (i=0; i<8; i++)
{
if ((writeme & 0x80) == (level<<7))
{
{
/* Bit did not change, rewrite strobe */
out_byte(0xA539, level | 0x02);
out_byte(0xA539, level);
@@ -106,36 +106,36 @@ void sm_send_stop(void)
int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
{
// S Addr Wr
/* S Addr Wr */
sm_write_mode();
sm_send_start();
sm_write_byte((addr<<1));
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// Comm
/* Comm */
sm_write_mode();
sm_write_byte(reg);
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// S Addr Rd
/* S Addr Rd */
sm_write_mode();
sm_send_start();
sm_write_byte((addr<<1)|1);
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// [Data]
/* [Data] */
*storage = sm_read_byte();
// NA
/* NA */
sm_write_mode();
sm_write_nack();
sm_send_stop();

View File

@@ -1,157 +1,156 @@
/*------------------------------------------------------*/
/* TERON Articia / SDRAM Init */
/*------------------------------------------------------*/
/* TERON Articia / SDRAM Init */
/*------------------------------------------------------*/
* XD_CTL = 0x81000000 (0x74)
* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c)
/* host bus access ctl reg 2(5e) */
/* set - CPU read from memory data one clock after data is latched */
/* host bus access ctl reg 2(5e) */
/* set - CPU read from memory data one clock after data is latched */
* GLOBL_INFO_0 |= 0x00004000 (0x50)
/* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
/* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
/* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
/* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
&= 0x3fffffff
/* RAS park control reg 0(cc), park access enable is set */
/* RAS park control reg 0(cc), park access enable is set */
HOST_RDBUF_CTL |= 0x10000000 (0x70)
&= 0x10ffffff
/* host read buffer control reg, enable prefetch for CPU read from DRAM control */
HOST_RDBUF_CTL |= 0x10000000 (0x70)
&= 0x10ffffff
/* host read buffer control reg, enable prefetch for CPU read from DRAM control */
HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
&= 0xf1ffffff
/* host bus access control register, enable CPU address bus pipe control */
/* two outstanding requests, *** changed to 2 from 3 */
/* enable line merge write control for CPU write to system memory, PCI 1 */
/* and PCI 0 bus memory; enable page merge write control for write to */
/* PCI bus 0 & bus 1 memory */
/* host bus access control register, enable CPU address bus pipe control */
/* two outstanding requests, *** changed to 2 from 3 */
/* enable line merge write control for CPU write to system memory, PCI 1 */
/* and PCI 0 bus memory; enable page merge write control for write to */
/* PCI bus 0 & bus 1 memory */
SRAM_CTL |= 0x00004000 (0xc8)
SRAM_CTL |= 0x00004000 (0xc8)
&= 0xffbff7ff
/* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
/* DRAM start access latency control - wait for one clock */
/* ff9f changed to ffbf */
/* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
/* DRAM start access latency control - wait for one clock */
/* ff9f changed to ffbf */
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
/* cycle for next data access */
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
/* cycle for next data access */
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
/* cycle for next data access */
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
/* cycle for next data access */
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
/* set dimm0 bank0 for 128 MB */
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
/* set dimm0 bank0 for 128 MB */
DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
/* set dimm0 for bank1 */
DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
/* set dimm0 for bank1 */
DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
/* dimm0 timing control register; RAS - CAS latency - 4 clock */
/* CAS access latency - 3 wait; pre-charge latency - 3 wait */
/* pre-charge command period control - 5 clock; wait one clock */
/* cycle for next data access; read to write access latency control */
/* - 2 clock cycles */
DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
/* dimm0 timing control register; RAS - CAS latency - 4 clock */
/* CAS access latency - 3 wait; pre-charge latency - 3 wait */
/* pre-charge command period control - 5 clock; wait one clock */
/* cycle for next data access; read to write access latency control */
/* - 2 clock cycles */
DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
&= 0xffff01ff
/* memory global control register - support buffer sdram on bank 0 */
/* memory global control register - support buffer sdram on bank 0 */
DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
&= 0xff26ffff
/* enable ECC; enable read, modify, write control */
/* enable ECC; enable read, modify, write control */
DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
/* set DRAM refresh parameters *** changed to 00940100 */
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
/* turn off ecc */
/* for SDRAM bank 0 */
DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
/* turn off ecc */
/* for SDRAM bank 0 */
DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
/* for SDRAM bank 1 */
DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
/* for SDRAM bank 1 */
/* Additional Stuff...*/
GLOBL_CTRL |= 0x20000b00 (0x54)
GLOBL_CTRL |= 0x20000b00 (0x54)
PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
/* PCI 0 Side band config reg*/
PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
/* PCI 0 Side band config reg*/
0x8000083c |= 0x00080000
/* Disable VGA decode on PCI Bus 1 */
0x8000083c |= 0x00080000
/* Disable VGA decode on PCI Bus 1 */
/*End Additional Stuff..*/
/*--------------------------------------------------------------*/
/* TERON serial port initialization code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* TERON serial port initialization code */
/*--------------------------------------------------------------*/
0x84380080 |= 0x00030000
/* enable super IO configuration VIA chip Register 85 */
/* enable super IO configuration VIA chip Register 85 */
/* Enable super I/O config mode */
0xfe0003f0 = 0xe2
bl delay1
0xfe0003f1 = 0x0f
0xfe0003f0 = 0xe2
bl delay1
/* enable com1 & com2, parallel port disabled */
0xfe0003f1 = 0x0f
bl delay1
/* enable com1 & com2, parallel port disabled */
0xfe0003f0 = 0xe7
bl delay1
/* let's make com1 base as 0x3f8 */
bl delay1
/* let's make com1 base as 0x3f8 */
0xfe0003f1 = 0xfe
bl delay1
0xfe0003f1 = 0xfe
bl delay1
0xfe0003f0 = 0xe8
bl delay1
0xfe0003f0 = 0xe8
bl delay1
/* let's make com2 base as 0x2f8 */
0xfe0003f1 = 0xbe
0x84380080 &= 0xfffdffff
/* closing super IO configuration VIA chip Register 85 */
/* closing super IO configuration VIA chip Register 85 */
/* -------------------------------*/
0xfe0003fb = 0x83
0xfe0003fb = 0x83
bl delay1
/*latch enable word length -8 bit */ /* set mslab bit */
0xfe0003f8 = 0x0c
/*latch enable word length -8 bit */ /* set mslab bit */
0xfe0003f8 = 0x0c
bl delay1
/* set baud rate lsb for 9600 baud */
0xfe0003f9 = 0x0
/* set baud rate lsb for 9600 baud */
0xfe0003f9 = 0x0
bl delay1
/* set baud rate msb for 9600 baud */
0xfe0003fb = 0x03
/* set baud rate msb for 9600 baud */
0xfe0003fb = 0x03
bl delay1
/* reset mslab */
/* reset mslab */
/*--------------------------------------------------------------*/
/* END TERON Serial Port Initialization Code */
/*--------------------------------------------------------------*/
/* END TERON Serial Port Initialization Code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* END TERON Articia / SDRAM Initialization code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* END TERON Articia / SDRAM Initialization code */
/*--------------------------------------------------------------*/
Proposed from Documentation:
@@ -197,5 +196,3 @@ write dmem 0xfee00cfc 0x00003280
write dmem 0xfec00cf8 0xc4000080
write dmem 0xfee00cfc 0x00003290

View File

@@ -75,6 +75,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
@@ -107,6 +108,11 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;

View File

@@ -83,7 +83,7 @@
#define USB_MAX_TEMP_INT_TD 32 /* number of temporary TDs for Interrupt transfers */
//#define USB_UHCI_DEBUG
/*#define USB_UHCI_DEBUG */
#ifdef USB_UHCI_DEBUG
#define USB_UHCI_PRINTF(fmt,args...) printf (fmt ,##args)
@@ -1115,7 +1115,6 @@ static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)
#endif
#ifdef USB_UHCI_DEBUG
static int usb_display_td(uhci_td_t *td)

View File

@@ -190,5 +190,3 @@ struct virt_root_hub {
#endif /* _USB_UHCI_H_ */

View File

@@ -211,18 +211,18 @@ void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_c
__asm (" .globl via_calibrate_time_base \n"
"via_calibrate_time_base: \n"
" lis 9, 0xfe00 \n"
" li 0, 0x00 \n"
" lis 9, 0xfe00 \n"
" li 0, 0x00 \n"
" mttbu 0 \n"
" mttbl 0 \n"
"ctb_loop: \n"
" lbz 0, 0x61(9) \n"
" eieio \n"
" andi. 0, 0, 0x20 \n"
" beq ctb_loop \n"
"ctb_done: \n"
" mftb 3 \n"
" blr");
" lbz 0, 0x61(9) \n"
" eieio \n"
" andi. 0, 0, 0x20 \n"
" beq ctb_loop \n"
"ctb_done: \n"
" mftb 3 \n"
" blr");
extern unsigned long via_calibrate_time_base(void);

View File

@@ -129,11 +129,11 @@ int drv_video_init(void)
int video_init(void)
{
cursor_position = VIDEO_BASE; // Color text display base
cursor_position = VIDEO_BASE; /* Color text display base */
cursor_row = 0;
cursor_col = 0;
current_attr = video_get_attr(); // Currently selected value for attribute.
// video_test();
current_attr = video_get_attr(); /* Currently selected value for attribute. */
/* video_test(); */
video_set_color(current_attr);
return 0;
@@ -328,7 +328,7 @@ void video_draw_box(int style, int attr, char *title, int separate, int x, int y
*(fb2+1) = attr; fb2 += 2*VIDEO_COLS;
}
// Draw title
/* Draw title */
if (title)
{
if (separate == 0)

View File

@@ -130,14 +130,14 @@ static void X86API int1A(int intno)
switch(M.x86.R_AX)
{
case 0xB101: // PCI Bios Present?
case 0xB101: /* PCI Bios Present? */
M.x86.R_AL = 0x00;
M.x86.R_EDX = 0x20494350;
M.x86.R_BX = 0x0210;
M.x86.R_CL = 3;
CLEAR_FLAG(F_CF);
break;
case 0xB102: // Find device
case 0xB102: /* Find device */
device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI);
if (device != -1)
{
@@ -151,52 +151,52 @@ static void X86API int1A(int intno)
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
break;
case 0xB103: // Find PCI class code
case 0xB103: /* Find PCI class code */
M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
//printf("Find by class not yet implmented");
/*printf("Find by class not yet implmented"); */
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
break;
case 0xB108: // read config byte
case 0xB108: /* read config byte */
M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CL);
/*printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CL); */
break;
case 0xB109: // read config word
case 0xB109: /* read config word */
M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CX);
/*printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CX); */
break;
case 0xB10A: // read config dword
case 0xB10A: /* read config dword */
M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_ECX);
/*printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_ECX); */
break;
case 0xB10B: // write config byte
case 0xB10B: /* write config byte */
mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CL);
/*printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CL); */
break;
case 0xB10C: // write config word
case 0xB10C: /* write config word */
mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CX);
/*printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CX); */
break;
case 0xB10D: // write config dword
case 0xB10D: /* write config dword */
mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_ECX);
/*printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_ECX); */
break;
default:
PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX);
@@ -252,14 +252,14 @@ unsigned char setup_bw[] =
unsigned char * setup_modes[] =
{
setup_40x25, // mode 0: 40x25 bw text
setup_40x25, // mode 1: 40x25 col text
setup_80x25, // mode 2: 80x25 bw text
setup_80x25, // mode 3: 80x25 col text
setup_graphics, // mode 4: 320x200 col graphics
setup_graphics, // mode 5: 320x200 bw graphics
setup_graphics, // mode 6: 640x200 bw graphics
setup_bw // mode 7: 80x25 mono text
setup_40x25, /* mode 0: 40x25 bw text */
setup_40x25, /* mode 1: 40x25 col text */
setup_80x25, /* mode 2: 80x25 bw text */
setup_80x25, /* mode 3: 80x25 col text */
setup_graphics, /* mode 4: 320x200 col graphics */
setup_graphics, /* mode 5: 320x200 bw graphics */
setup_graphics, /* mode 6: 640x200 bw graphics */
setup_bw /* mode 7: 80x25 mono text */
};
unsigned int setup_cols[] =
@@ -280,13 +280,13 @@ unsigned int setup_bufsize[] =
void bios_set_mode(int mode)
{
int i;
unsigned char mode_set = setup_modesets[mode]; // Control register value
unsigned char *setup_regs = setup_modes[mode]; // Register 3D4 Array
unsigned char mode_set = setup_modesets[mode]; /* Control register value */
unsigned char *setup_regs = setup_modes[mode]; /* Register 3D4 Array */
// Switch video off
/* Switch video off */
out_byte(0x3D8, mode_set & 0x37);
// Set up parameters at 3D4h
/* Set up parameters at 3D4h */
for (i=0; i<16; i++)
{
out_byte(0x3D4, (unsigned char)i);
@@ -294,10 +294,10 @@ void bios_set_mode(int mode)
setup_regs++;
}
// Enable video
/* Enable video */
out_byte(0x3D8, mode_set);
// Set overscan
/* Set overscan */
if (mode == 6) out_byte(0x3D9, 0x3F);
else out_byte(0x3D9, 0x30);
}

View File

@@ -401,7 +401,7 @@ int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
{
int i = 0;
unsigned char *rom = (unsigned char *)rom_address;
/* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; // No bios rom this is, yes. */
/* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; /* No bios rom this is, yes. */ */
for (;;)
{
@@ -479,7 +479,6 @@ void show_bat_mapping(void)
}
void remove_init_data(void)
{
char *s;
@@ -497,19 +496,19 @@ void remove_init_data(void)
}
else if (s)
{
if (strcmp(s, "dcache")==0)
{
dcache_enable();
}
else if (strcmp(s, "icache") == 0)
{
icache_enable();
}
else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
{
dcache_enable();
icache_enable();
}
if (strcmp(s, "dcache")==0)
{
dcache_enable();
}
else if (strcmp(s, "icache") == 0)
{
icache_enable();
}
else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
{
dcache_enable();
icache_enable();
}
}
/* show_bat_mapping();*/

View File

@@ -152,4 +152,3 @@ void PMAPI BE_exit(void);
#endif
#endif /* __BIOSEMU_H */

View File

@@ -201,9 +201,9 @@ keyboard), but the translated ASCII values may be different depending on
the country code pages in use.
NOTE: Scan codes in the event library are not really hardware scan codes,
but rather virtual scan codes as generated by a low level keyboard
interface driver. All virtual codes begin with scan code 0x60 and
range up from there.
but rather virtual scan codes as generated by a low level keyboard
interface driver. All virtual codes begin with scan code 0x60 and
range up from there.
HEADER:
event.h
@@ -496,38 +496,38 @@ event.h
MEMBERS:
which - Window identifier for message for use by high level window manager
code (i.e. MegaVision GUI or Windows API).
code (i.e. MegaVision GUI or Windows API).
what - Type of event that occurred. Will be one of the values defined by
the EVT_eventType enumeration.
the EVT_eventType enumeration.
when - Time that the event occurred in milliseconds since startup
where_x - X coordinate of the mouse cursor location at the time of the event
(in screen coordinates). For joystick events this represents
the position of the first joystick X axis.
(in screen coordinates). For joystick events this represents
the position of the first joystick X axis.
where_y - Y coordinate of the mouse cursor location at the time of the event
(in screen coordinates). For joystick events this represents
the position of the first joystick Y axis.
(in screen coordinates). For joystick events this represents
the position of the first joystick Y axis.
relative_x - Relative movement of the mouse cursor in the X direction (in
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick X axis.
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick X axis.
relative_y - Relative movement of the mouse cursor in the Y direction (in
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick Y axis.
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick Y axis.
message - Event specific message for the event. For use events this can be
any user specific information. For keyboard events this contains
the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
the character repeat count in bits 16-30. You can use the
EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
this information from the message field. For mouse events this
contains information about which button was pressed, and will be a
combination of the flags defined by the EVT_eventMouseMaskType
enumeration. For joystick events, this conatins information
about which buttons were pressed, and will be a combination of
the flags defined by the EVT_eventJoyMaskType enumeration.
any user specific information. For keyboard events this contains
the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
the character repeat count in bits 16-30. You can use the
EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
this information from the message field. For mouse events this
contains information about which button was pressed, and will be a
combination of the flags defined by the EVT_eventMouseMaskType
enumeration. For joystick events, this conatins information
about which buttons were pressed, and will be a combination of
the flags defined by the EVT_eventJoyMaskType enumeration.
modifiers - Contains additional information about the state of the keyboard
shift modifiers (Ctrl, Alt and Shift keys) when the event
occurred. For mouse events it will also contain the state of
the mouse buttons. Will be a combination of the values defined
by the EVT_eventModMaskType enumeration.
shift modifiers (Ctrl, Alt and Shift keys) when the event
occurred. For mouse events it will also contain the state of
the mouse buttons. Will be a combination of the values defined
by the EVT_eventModMaskType enumeration.
next - Internal use; do not use.
prev - Internal use; do not use.
****************************************************************************/
@@ -555,8 +555,8 @@ different code page translation table if you want to support keyboards
other than the US English keyboard (the default).
NOTE: Entries in code page tables *must* be in ascending order for the
scan codes as we do a binary search on the tables for the ASCII
code equivalents.
scan codes as we do a binary search on the tables for the ASCII
code equivalents.
HEADER:
event.h

View File

@@ -103,14 +103,14 @@ typedef enum {
typedef union {
struct {
uint Zero:2;
uint Register:6;
uint Function:3;
uint Device:5;
uint Bus:8;
uint Reserved:7;
uint Enable:1;
} p;
uint Zero:2;
uint Register:6;
uint Function:3;
uint Device:5;
uint Bus:8;
uint Reserved:7;
uint Enable:1;
} p;
ulong i;
} PCIslot;
@@ -194,9 +194,9 @@ typedef struct {
uchar SubordinateBus;
uchar SecondaryLatency;
struct {
ulong Base;
ulong Limit;
} Range[4];
ulong Base;
ulong Limit;
} Range[4];
uchar InterruptLine;
uchar InterruptPin;
ushort BridgeControl;
@@ -224,10 +224,10 @@ typedef struct {
uchar HeaderType;
uchar BIST;
union {
PCIType0Info type0;
PCIType1Info type1;
PCIType2Info type2;
} u;
PCIType0Info type0;
PCIType1Info type1;
PCIType2Info type2;
} u;
} PCIDeviceInfo;
/* PCI Capability header structure. All PCI capabilities have the
@@ -411,4 +411,3 @@ ulong _ASMAPI PCIBIOS_getEntry(void);
#endif
#endif /* __PCILIB_H */

View File

@@ -164,4 +164,3 @@ typedef enum {
#endif /* !__OS2__ */
#endif /* __PMHELP_H */

View File

@@ -73,4 +73,3 @@ PMHELP_CTL_CODE(GASETLOCALPATH ,0x002D),
PMHELP_CTL_CODE(GAGETEXPORTS ,0x002E),
PMHELP_CTL_CODE(GATHUNK ,0x002F),
PMHELP_CTL_CODE(SETNUCLEUSPATH ,0x0030),

View File

@@ -1146,4 +1146,3 @@ int PMAPI PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs);
#endif
#endif /* __PMAPI_H */

View File

@@ -191,4 +191,3 @@ PM_imports _VARAPI _PM_imports = {
NULL,
#endif
};

View File

@@ -80,7 +80,7 @@
#ifdef __GNUC__
#ifdef __cplusplus
// G++ currently fucks this up!
/* G++ currently fucks this up! */
#define __cdecl
#define __stdcall
#else
@@ -605,18 +605,18 @@ void _ASMAPI DebugVxD(void);
{ \
static ibool firstTime = true; \
if (firstTime) { \
firstTime = false; \
DebugInt(); \
} \
firstTime = false; \
DebugInt(); \
} \
}
#define DebugVxDOnce() \
{ \
static ibool firstTime = true; \
if (firstTime) { \
firstTime = false; \
DebugVxD(); \
} \
firstTime = false; \
DebugVxD(); \
} \
}
/* Macros for linux string compatibility functions */
@@ -636,10 +636,10 @@ void _ASMAPI DebugVxD(void);
/* Get rid of some helaciously annoying Visual C++ warnings! */
#if defined(_MSC_VER) && !defined(__MWERKS__) && !defined(__SC__)
#pragma warning(disable:4761) // integral size mismatch in argument; conversion supplied
#pragma warning(disable:4244) // conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
#pragma warning(disable:4018) // '<' : signed/unsigned mismatch
#pragma warning(disable:4305) // 'initializing' : truncation from 'const double' to 'float'
#pragma warning(disable:4761) /* integral size mismatch in argument; conversion supplied */
#pragma warning(disable:4244) /* conversion from 'unsigned short ' to 'unsigned char ', possible loss of data */
#pragma warning(disable:4018) /* '<' : signed/unsigned mismatch */
#pragma warning(disable:4305) /* 'initializing' : truncation from 'const double' to 'float' */
#endif
/*---------------------------------------------------------------------------
@@ -674,29 +674,29 @@ void _CHK_defaultFail(int fatal,const char *msg,const char *cond,const char *fil
# define CHK(x) x
#if CHECKED > 1
# define CHECK(p) \
((p) ? (void)0 : DebugInt(), \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : DebugInt(), \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
# define WARN(p) \
((p) ? (void)0 : DebugInt(), \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : DebugInt(), \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
#else
# define CHECK(p) \
((p) ? (void)0 : \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
# define WARN(p) \
((p) ? (void)0 : \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
#endif
# define LOGFATAL(msg) \
_CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
_CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
# define LOGWARN(msg) \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
#else
# define CHK(x)
# define CHECK(p) ((void)0)

View File

@@ -235,21 +235,21 @@ struct i386_segment_regs {
#define SYSMODE_HALTED 0x40000000
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
#define INTR_SYNCH 0x1
#define INTR_ASYNCH 0x2
@@ -322,7 +322,7 @@ extern X86EMU_sysEnv _X86EMU_env;
/* Function to log information at runtime */
//void printk(const char *fmt, ...);
/*void printk(const char *fmt, ...); */
#ifdef __cplusplus
} /* End of "C" linkage for C++ */

View File

@@ -0,0 +1 @@
This file is just to ensure that the directory is created.

View File

@@ -0,0 +1 @@
This file is just to ensure that the directory is created.

View File

@@ -178,4 +178,3 @@ ASFLAGS += -d__SNAP__
# Include file dependencies
.INCLUDE .IGNORE: "makefile.dep"

View File

@@ -178,4 +178,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := gcc_linux.mk

View File

@@ -133,4 +133,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := gcc_win32.mk

View File

@@ -162,4 +162,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := qnx4.mk

View File

@@ -45,4 +45,3 @@ PMLIB :=
# Implicit rule for building an executable file
%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB)

View File

@@ -91,4 +91,3 @@ LD := $(LDXX)
@$(ECHO) ld $@
@$(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
.ENDIF

View File

@@ -88,4 +88,3 @@ LD := $(LDXX)
@$(ECHO) ld $@
@$(LD) $(LDFLAGS) -o $@ @$(mktmp $(&:s/\/\\) $(EXELIBS) $(PMLIB) -lm)
.ENDIF

View File

@@ -69,14 +69,14 @@ PMLIB :=
# Implicit rule for building an executable file using response file
.IF $(USE_OS2GUI)
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ELSE
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ENDIF

View File

@@ -66,14 +66,14 @@ PMLIB :=
# Implicit rule for building an executable file using response file
.IF $(USE_OS2GUI)
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ELSE
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ENDIF

View File

@@ -262,4 +262,3 @@ dllstart.obj: dllstart.asm
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF

View File

@@ -159,4 +159,3 @@ __.SILENT := $(.SILENT)
# We dont use TABS in our makefiles
.NOTABS := yes

View File

@@ -351,4 +351,3 @@ LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
# Define which file contains our rules
RULES_MAK := wc32.mk

View File

@@ -77,20 +77,20 @@ u8 X86API BE_rdb(
u8 val = 0;
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
val = readb(_BE_env.busmem_base, addr - 0xA0000);
}
val = readb(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 1) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
val = *(u8*)(M.mem_base + addr);
}
val = *(u8*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 1 -> %#x\n", addr, val);)
printk("%#08x 1 -> %#x\n", addr, val);)
return val;
}
@@ -112,42 +112,42 @@ u16 X86API BE_rdw(
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
}
else
if (addr & 0x1) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
}
else
#endif
val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8));
}
else
if (addr & 0x1) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8));
}
else
#endif
val = readw(_BE_env.busmem_base, addr - 0xA0000);
}
val = readw(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 2) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
val = ( *(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
if (addr & 0x1) {
val = ( *(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
#endif
val = *(u16*)(M.mem_base + addr);
}
val = *(u16*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 2 -> %#x\n", addr, val);)
printk("%#08x 2 -> %#x\n", addr, val);)
return val;
}
@@ -169,48 +169,48 @@ u32 X86API BE_rdl(
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
(*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
(*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
}
else
if (addr & 0x3) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
(*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
(*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
}
else
#endif
val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8) |
(readb(_BE_env.busmem_base, addr + 2) << 16) |
(readb(_BE_env.busmem_base, addr + 3) << 24));
}
else
if (addr & 0x3) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8) |
(readb(_BE_env.busmem_base, addr + 2) << 16) |
(readb(_BE_env.busmem_base, addr + 3) << 24));
}
else
#endif
val = readl(_BE_env.busmem_base, addr - 0xA0000);
}
val = readl(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 4) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
val = ( *(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
if (addr & 0x3) {
val = ( *(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
#endif
val = *(u32*)(M.mem_base + addr);
}
val = *(u32*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 4 -> %#x\n", addr, val);)
printk("%#08x 4 -> %#x\n", addr, val);)
return val;
}
@@ -228,20 +228,20 @@ void X86API BE_wrb(
u8 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 1 <- %#x\n", addr, val);)
printk("%#08x 1 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
*(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
*(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
writeb(val, _BE_env.busmem_base, addr - 0xA0000);
}
writeb(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-1) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
*(u8*)(M.mem_base + addr) = val;
}
*(u8*)(M.mem_base + addr) = val;
}
}
/****************************************************************************
@@ -258,43 +258,43 @@ void X86API BE_wrw(
u16 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 2 <- %#x\n", addr, val);)
printk("%#08x 2 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
}
else
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
}
else
#endif
*(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
*(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
}
else
if (addr & 0x1) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
}
else
#endif
writew(val, _BE_env.busmem_base, addr - 0xA0000);
}
writew(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-2) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
}
else
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
}
else
#endif
*(u16*)(M.mem_base + addr) = val;
}
*(u16*)(M.mem_base + addr) = val;
}
}
/****************************************************************************
@@ -311,49 +311,49 @@ void X86API BE_wrl(
u32 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 4 <- %#x\n", addr, val);)
printk("%#08x 4 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
#endif
*(u32*)(M.mem_base + addr - 0xC0000) = val;
}
*(u32*)(M.mem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
writeb(val >> 16, _BE_env.busmem_base, addr + 1);
writeb(val >> 24, _BE_env.busmem_base, addr + 1);
}
else
if (addr & 0x3) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
writeb(val >> 16, _BE_env.busmem_base, addr + 1);
writeb(val >> 24, _BE_env.busmem_base, addr + 1);
}
else
#endif
writel(val, _BE_env.busmem_base, addr - 0xA0000);
}
writel(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-4) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
#endif
*(u32*)(M.mem_base + addr) = val;
}
*(u32*)(M.mem_base + addr) = val;
}
}
/* Debug functions to do ISA/PCI bus port I/O */
@@ -365,7 +365,7 @@ u8 X86API BE_inb(int port)
{
u8 val = PM_inpb(port);
if (DEBUG_IO())
printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
@@ -373,7 +373,7 @@ u16 X86API BE_inw(int port)
{
u16 val = PM_inpw(port);
if (DEBUG_IO())
printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
@@ -381,28 +381,28 @@ u32 X86API BE_inl(int port)
{
u32 val = PM_inpd(port);
if (DEBUG_IO())
printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
void X86API BE_outb(int port, u8 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpb(port,val);
}
void X86API BE_outw(int port, u16 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpw(port,val);
}
void X86API BE_outl(int port, u32 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpd(port,val);
}
#endif

View File

@@ -50,9 +50,9 @@ static void X86API undefined_intr(
int intno)
{
if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
printk("biosEmu: undefined interrupt %xh called!\n",intno);
printk("biosEmu: undefined interrupt %xh called!\n",intno);
else
X86EMU_prepareForInt(intno);
X86EMU_prepareForInt(intno);
}
/****************************************************************************
@@ -68,26 +68,26 @@ static void X86API int42(
int intno)
{
if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
if (M.x86.R_AL == 0) {
/* Enable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
return;
}
else if (M.x86.R_AL == 1) {
/* Disable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
return;
}
if (M.x86.R_AL == 0) {
/* Enable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
return;
}
else if (M.x86.R_AL == 1) {
/* Disable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
return;
}
#ifdef DEBUG
else {
printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
}
else {
printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
}
#endif
}
}
#ifdef DEBUG
else {
printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
}
printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
}
#endif
}
@@ -106,9 +106,9 @@ static void X86API int10(
int intno)
{
if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
int42(intno);
int42(intno);
else
X86EMU_prepareForInt(intno);
X86EMU_prepareForInt(intno);
}
/* Result codes returned by the PCI BIOS */
@@ -142,87 +142,87 @@ static void X86API int1A(
/* Fail if no PCI device information has been registered */
if (!_BE_env.vgaInfo.pciInfo)
return;
return;
pciSlot = (u16)(_BE_env.vgaInfo.pciInfo->slot.i >> 8);
switch (M.x86.R_AX) {
case 0xB101: /* PCI bios present? */
M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
M.x86.R_EDX = 0x20494350; /* " ICP" */
M.x86.R_BX = 0x0210; /* Version 2.10 */
M.x86.R_CL = 0; /* Max bus number in system */
CLEAR_FLAG(F_CF);
break;
case 0xB102: /* Find PCI device */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
M.x86.R_SI == 0) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB103: /* Find PCI class code */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
(u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB108: /* Read configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB109: /* Read configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10A: /* Read configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10B: /* Write configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10C: /* Write configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10D: /* Write configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
default:
printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
}
case 0xB101: /* PCI bios present? */
M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
M.x86.R_EDX = 0x20494350; /* " ICP" */
M.x86.R_BX = 0x0210; /* Version 2.10 */
M.x86.R_CL = 0; /* Max bus number in system */
CLEAR_FLAG(F_CF);
break;
case 0xB102: /* Find PCI device */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
M.x86.R_SI == 0) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB103: /* Find PCI class code */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
(u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB108: /* Read configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB109: /* Read configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10A: /* Read configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10B: /* Write configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10C: /* Write configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10D: /* Write configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
default:
printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
}
}
/****************************************************************************
@@ -240,9 +240,9 @@ void _BE_bios_init(
X86EMU_intrFuncs bios_intr_tab[256];
for (i = 0; i < 256; ++i) {
intrTab[i] = BIOS_SEG << 16;
bios_intr_tab[i] = undefined_intr;
}
intrTab[i] = BIOS_SEG << 16;
bios_intr_tab[i] = undefined_intr;
}
bios_intr_tab[0x10] = int10;
bios_intr_tab[0x1A] = int1A;
bios_intr_tab[0x42] = int42;

View File

@@ -100,9 +100,9 @@ ibool PMAPI BE_init(
#endif
memset(&M,0,sizeof(M));
if (memSize < 20480)
PM_fatalError("Emulator requires at least 20Kb of memory!\n");
PM_fatalError("Emulator requires at least 20Kb of memory!\n");
if ((M.mem_base = (unsigned long)malloc(memSize)) == NULL)
PM_fatalError("Out of memory!");
PM_fatalError("Out of memory!");
M.mem_size = memSize;
_BE_env.busmem_base = (ulong)PM_mapPhysicalAddr(0xA0000,0x5FFFF,true);
M.x86.debug = debugFlags;
@@ -144,15 +144,15 @@ void PMAPI BE_setVGA(
_BE_env.vgaInfo.pciInfo = info->pciInfo;
_BE_env.vgaInfo.BIOSImage = info->BIOSImage;
if (info->BIOSImage) {
_BE_env.biosmem_base = (ulong)info->BIOSImage;
_BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
}
_BE_env.biosmem_base = (ulong)info->BIOSImage;
_BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
}
else {
_BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
_BE_env.biosmem_limit = 0xC7FFF;
}
_BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
_BE_env.biosmem_limit = 0xC7FFF;
}
if (*((u32*)info->LowMem) == 0)
_BE_bios_init((u32*)info->LowMem);
_BE_bios_init((u32*)info->LowMem);
memcpy((u8*)M.mem_base,info->LowMem,sizeof(info->LowMem));
}
@@ -182,8 +182,8 @@ This function maps a real mode pointer in the emulator memory to a protected
mode pointer that can be used to directly access the memory.
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void * PMAPI BE_mapRealPointer(
uint r_seg,
@@ -192,11 +192,11 @@ void * PMAPI BE_mapRealPointer(
u32 addr = ((u32)r_seg << 4) + r_off;
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
}
return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
return (void*)(_BE_env.busmem_base + addr - 0xA0000);
}
return (void*)(_BE_env.busmem_base + addr - 0xA0000);
}
return (void*)(M.mem_base + addr);
}
@@ -213,8 +213,8 @@ and located at 15Kb into the start of the real mode memory (16Kb is where
we put the real mode code we execute for issuing interrupts).
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void * PMAPI BE_getVESABuf(
uint *len,
@@ -416,28 +416,28 @@ BE_exports * _CEXPORT BE_initLibrary(
PM_imports *pmImp)
{
static BE_exports _BE_exports = {
sizeof(BE_exports),
BE_init,
BE_setVGA,
BE_getVGA,
BE_mapRealPointer,
BE_getVESABuf,
BE_callRealMode,
BE_int86,
BE_int86x,
NULL,
BE_exit,
};
sizeof(BE_exports),
BE_init,
BE_setVGA,
BE_getVGA,
BE_mapRealPointer,
BE_getVESABuf,
BE_callRealMode,
BE_int86,
BE_int86x,
NULL,
BE_exit,
};
int i,max;
ulong *p;
// Initialize all default imports to point to fatal error handler
// for upwards compatibility.
/* Initialize all default imports to point to fatal error handler */
/* for upwards compatibility. */
max = sizeof(_PM_imports)/sizeof(BE_initLibrary_t);
for (i = 0,p = (ulong*)&_PM_imports; i < max; i++)
*p++ = (ulong)_PM_fatalErrorHandler;
*p++ = (ulong)_PM_fatalErrorHandler;
// Now copy all our imported functions
/* Now copy all our imported functions */
memcpy(&_PM_imports,pmImp,MIN(sizeof(_PM_imports),pmImp->dwSize));
return &_BE_exports;
}

View File

@@ -112,16 +112,16 @@ static ulong PCI_findBIOSAddr(
int bar;
for (bar = 0x10; bar <= 0x14; bar++) {
base = PCI_readPCIRegL(bar,device) & ~0xFF;
if (!(base & 0x1)) {
PCI_writePCIRegL(bar,0xFFFFFFFF,device);
size = PCI_readPCIRegL(bar,device) & ~0xFF;
size = ~size+1;
PCI_writePCIRegL(bar,0,device);
if (size >= MAX_BIOSLEN)
return base;
}
}
base = PCI_readPCIRegL(bar,device) & ~0xFF;
if (!(base & 0x1)) {
PCI_writePCIRegL(bar,0xFFFFFFFF,device);
size = PCI_readPCIRegL(bar,device) & ~0xFF;
size = ~size+1;
PCI_writePCIRegL(bar,0,device);
if (size >= MAX_BIOSLEN)
return base;
}
}
return 0;
}
@@ -138,13 +138,13 @@ static void _PCI_fixupSecondaryBARs(void)
int i;
for (i = 0; i < NumDevices; i++) {
PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
}
PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
}
}
/****************************************************************************
@@ -165,29 +165,29 @@ static void PCI_doBIOSPOST(
RMREGS regs;
RMSREGS sregs;
// Determine the value to store in AX for BIOS POST
/* Determine the value to store in AX for BIOS POST */
regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
if (useV86) {
// Post the BIOS using the PM functions (ie: v86 mode on Linux)
if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
// If the PM function fails, this probably means are we are on
// DOS and can't re-map the real mode 0xC0000 region. In thise
// case if the device is the primary, we can use the real
// BIOS at 0xC0000 directly.
if (device == 0)
PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
}
}
/* Post the BIOS using the PM functions (ie: v86 mode on Linux) */
if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
/* If the PM function fails, this probably means are we are on */
/* DOS and can't re-map the real mode 0xC0000 region. In thise */
/* case if the device is the primary, we can use the real */
/* BIOS at 0xC0000 directly. */
if (device == 0)
PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
}
}
else {
// Setup the X86 emulator for the VGA BIOS
BE_setVGA(&VGAInfo[device]);
/* Setup the X86 emulator for the VGA BIOS */
BE_setVGA(&VGAInfo[device]);
// Execute the BIOS POST code
BE_callRealMode(0xC000,0x0003,&regs,&sregs);
/* Execute the BIOS POST code */
BE_callRealMode(0xC000,0x0003,&regs,&sregs);
// Cleanup and exit
BE_getVGA(&VGAInfo[device]);
}
/* Cleanup and exit */
BE_getVGA(&VGAInfo[device]);
}
}
/****************************************************************************
@@ -206,113 +206,113 @@ static ibool PCI_postControllers(void)
char filename[_MAX_PATH];
FILE *f;
// Disable the primary display controller and AGP VGA pass-through
/* Disable the primary display controller and AGP VGA pass-through */
DISABLE_DEVICE(0);
if (AGPBridge)
DISABLE_AGP_VGA();
DISABLE_AGP_VGA();
// Now POST all the secondary controllers
/* Now POST all the secondary controllers */
for (device = 0; device < NumDevices; device++) {
// Skip the device if it is not enabled (probably an ISA device)
if (DeviceIndex[device] == -1)
continue;
/* Skip the device if it is not enabled (probably an ISA device) */
if (DeviceIndex[device] == -1)
continue;
// Enable secondary display controller. If the secondary controller
// is on the AGP bus, then enable VGA resources for the AGP device.
ENABLE_DEVICE(device);
if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
ENABLE_AGP_VGA();
/* Enable secondary display controller. If the secondary controller */
/* is on the AGP bus, then enable VGA resources for the AGP device. */
ENABLE_DEVICE(device);
if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
ENABLE_AGP_VGA();
// Check if the controller has already been POST'ed
if (VGA_NOT_ACTIVE()) {
// Find a viable place to map the secondary PCI BIOS image and map it
printk("Device %d not enabled, so attempting warm boot it\n", device);
/* Check if the controller has already been POST'ed */
if (VGA_NOT_ACTIVE()) {
/* Find a viable place to map the secondary PCI BIOS image and map it */
printk("Device %d not enabled, so attempting warm boot it\n", device);
// For AGP devices (and PCI devices that do have the ROM base
// address zero'ed out) we have to map the BIOS to a location
// that is passed by the AGP bridge to the bus. Some AGP devices
// have the ROM base address already set up for us, and some
// do not (we map to one of the existing BAR locations in
// this case).
mappedBIOS = NULL;
if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
else
mappedBIOSPhys = PCI_findBIOSAddr(device);
printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
BIOSImageLen = mappedBIOS[2] * 512;
if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
return false;
memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
/* For AGP devices (and PCI devices that do have the ROM base */
/* address zero'ed out) we have to map the BIOS to a location */
/* that is passed by the AGP bridge to the bus. Some AGP devices */
/* have the ROM base address already set up for us, and some */
/* do not (we map to one of the existing BAR locations in */
/* this case). */
mappedBIOS = NULL;
if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
else
mappedBIOSPhys = PCI_findBIOSAddr(device);
printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
BIOSImageLen = mappedBIOS[2] * 512;
if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
return false;
memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
// Allocate memory to store copy of BIOS from secondary controllers
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = BIOSImageLen;
/* Allocate memory to store copy of BIOS from secondary controllers */
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = BIOSImageLen;
// Restore device mappings
PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
/* Restore device mappings */
PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
// Now execute the BIOS POST for the device
if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
printk("Executing BIOS POST for controller.\n");
PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
}
/* Now execute the BIOS POST for the device */
if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
printk("Executing BIOS POST for controller.\n");
PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
}
// Reset the size of the BIOS image to the final size
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
/* Reset the size of the BIOS image to the final size */
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
// Save the BIOS and interrupt vector information to disk
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"wb")) != NULL) {
fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
else {
// Allocate memory to store copy of BIOS from secondary controllers
if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
return false;
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
/* Save the BIOS and interrupt vector information to disk */
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"wb")) != NULL) {
fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
else {
/* Allocate memory to store copy of BIOS from secondary controllers */
if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
return false;
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
// Load the BIOS and interrupt vector information from disk
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"rb")) != NULL) {
fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
/* Load the BIOS and interrupt vector information from disk */
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"rb")) != NULL) {
fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
// Fix up all the secondary PCI base address registers
// (restores them all from the values we read previously)
_PCI_fixupSecondaryBARs();
/* Fix up all the secondary PCI base address registers */
/* (restores them all from the values we read previously) */
_PCI_fixupSecondaryBARs();
// Disable the secondary controller and AGP VGA pass-through
DISABLE_DEVICE(device);
if (AGPBridge)
DISABLE_AGP_VGA();
}
/* Disable the secondary controller and AGP VGA pass-through */
DISABLE_DEVICE(device);
if (AGPBridge)
DISABLE_AGP_VGA();
}
// Reenable primary display controller and reset AGP bridge control
/* Reenable primary display controller and reset AGP bridge control */
if (AGPBridge)
RESTORE_AGP_VGA();
RESTORE_AGP_VGA();
ENABLE_DEVICE(0);
// Free physical BIOS image mapping
/* Free physical BIOS image mapping */
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
// Restore the X86 emulator BIOS info to primary controller
/* Restore the X86 emulator BIOS info to primary controller */
if (!useV86)
BE_setVGA(&VGAInfo[0]);
BE_setVGA(&VGAInfo[0]);
return true;
}
@@ -327,123 +327,123 @@ static void EnumeratePCI(void)
PCIBridgeInfo *info;
printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
NumPCI, NumDevices);
NumPCI, NumDevices);
for (index = 0; index < NumDevices; index++)
printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
printk("\n");
printk("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
for (i = 0; i < NumPCI; i++) {
printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
PCI[i].slot.p.Bus,
PCI[i].slot.p.Device,
PCI[i].slot.p.Function,
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].SubSystemVendorID,
PCI[i].SubSystemID,
PCI[i].RevID,
PCI[i].BaseClass,
PCI[i].SubClass,
PCI[i].InterruptLine,
PCI[i].InterruptPin,
PCI[i].Command);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
PCI[i].slot.p.Bus,
PCI[i].slot.p.Device,
PCI[i].slot.p.Function,
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].SubSystemVendorID,
PCI[i].SubSystemID,
PCI[i].RevID,
PCI[i].BaseClass,
PCI[i].SubClass,
PCI[i].InterruptLine,
PCI[i].InterruptPin,
PCI[i].Command);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].Status,
PCI[i].Interface,
PCI[i].CacheLineSize,
PCI[i].LatencyTimer,
PCI[i].HeaderType,
PCI[i].BIST);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].Status,
PCI[i].Interface,
PCI[i].CacheLineSize,
PCI[i].LatencyTimer,
PCI[i].HeaderType,
PCI[i].BIST);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10,
PCI[i].BaseAddress14,
PCI[i].BaseAddress18,
PCI[i].BaseAddress1C,
PCI[i].BaseAddress20,
PCI[i].BaseAddress24,
PCI[i].ROMBaseAddress);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10,
PCI[i].BaseAddress14,
PCI[i].BaseAddress18,
PCI[i].BaseAddress1C,
PCI[i].BaseAddress20,
PCI[i].BaseAddress24,
PCI[i].ROMBaseAddress);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10Len,
PCI[i].BaseAddress14Len,
PCI[i].BaseAddress18Len,
PCI[i].BaseAddress1CLen,
PCI[i].BaseAddress20Len,
PCI[i].BaseAddress24Len,
PCI[i].ROMBaseAddressLen);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10Len,
PCI[i].BaseAddress14Len,
PCI[i].BaseAddress18Len,
PCI[i].BaseAddress1CLen,
PCI[i].BaseAddress20Len,
PCI[i].BaseAddress24Len,
PCI[i].ROMBaseAddressLen);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("Displaying enumeration of %d bridge devices\n",NumBridges);
printk("\n");
printk("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
for (i = 0; i < NumBridges; i++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
info->VendorID,
info->DeviceID,
info->PrimaryBusNumber,
info->SecondayBusNumber,
info->SubordinateBusNumber,
((u16)info->IOBase << 8) & 0xF000,
info->IOLimit ?
((u16)info->IOLimit << 8) | 0xFFF : 0,
((u32)info->MemoryBase << 16) & 0xFFF00000,
info->MemoryLimit ?
((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
info->PrefetchableMemoryLimit ?
((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
info->BridgeControl);
}
info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
info->VendorID,
info->DeviceID,
info->PrimaryBusNumber,
info->SecondayBusNumber,
info->SubordinateBusNumber,
((u16)info->IOBase << 8) & 0xF000,
info->IOLimit ?
((u16)info->IOLimit << 8) | 0xFFF : 0,
((u32)info->MemoryBase << 16) & 0xFFF00000,
info->MemoryLimit ?
((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
info->PrefetchableMemoryLimit ?
((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
info->BridgeControl);
}
printk("\n");
}
@@ -460,51 +460,51 @@ static int PCI_enumerateDevices(void)
int i,j;
PCIBridgeInfo *info;
// If this is the first time we have been called, enumerate all
// devices on the PCI bus.
/* If this is the first time we have been called, enumerate all */
/* devices on the PCI bus. */
if (NumPCI == -1) {
for (i = 0; i < MAX_PCI_DEVICES; i++)
PCI[i].dwSize = sizeof(PCI[i]);
if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
return -1;
for (i = 0; i < MAX_PCI_DEVICES; i++)
PCI[i].dwSize = sizeof(PCI[i]);
if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
return -1;
// Build a list of all PCI bridge devices
for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
if (NumBridges < MAX_PCI_DEVICES)
BridgeIndex[NumBridges++] = i;
}
}
/* Build a list of all PCI bridge devices */
for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
if (NumBridges < MAX_PCI_DEVICES)
BridgeIndex[NumBridges++] = i;
}
}
// Now build a list of all display class devices
for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
if ((PCI[i].Command & 0x3) == 0x3) {
DeviceIndex[0] = i;
}
else {
if (NumDevices < MAX_PCI_DEVICES)
DeviceIndex[NumDevices++] = i;
}
if (PCI[i].slot.p.Bus != 0) {
// This device is on a different bus than the primary
// PCI bus, so it is probably an AGP device. Find the
// AGP bus device that controls that bus so we can
// control it.
for (j = 0; j < NumBridges; j++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
AGPBridge = info;
break;
}
}
}
}
}
/* Now build a list of all display class devices */
for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
if ((PCI[i].Command & 0x3) == 0x3) {
DeviceIndex[0] = i;
}
else {
if (NumDevices < MAX_PCI_DEVICES)
DeviceIndex[NumDevices++] = i;
}
if (PCI[i].slot.p.Bus != 0) {
/* This device is on a different bus than the primary */
/* PCI bus, so it is probably an AGP device. Find the */
/* AGP bus device that controls that bus so we can */
/* control it. */
for (j = 0; j < NumBridges; j++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
AGPBridge = info;
break;
}
}
}
}
}
// Enumerate all PCI and bridge devices to log file
EnumeratePCI();
}
/* Enumerate all PCI and bridge devices to log file */
EnumeratePCI();
}
return NumDevices;
}
@@ -522,48 +522,48 @@ void printk(const char *fmt, ...)
int main(int argc,char *argv[])
{
while (argc > 1) {
if (stricmp(argv[1],"-usev86") == 0) {
useV86 = true;
}
else if (stricmp(argv[1],"-force") == 0) {
forcePost = true;
}
if (stricmp(argv[1],"-usev86") == 0) {
useV86 = true;
}
else if (stricmp(argv[1],"-force") == 0) {
forcePost = true;
}
#ifdef DEBUG
else if (stricmp(argv[1],"-decode") == 0) {
debugFlags |= DEBUG_DECODE_F;
}
else if (stricmp(argv[1],"-iotrace") == 0) {
debugFlags |= DEBUG_IO_TRACE_F;
}
else if (stricmp(argv[1],"-decode") == 0) {
debugFlags |= DEBUG_DECODE_F;
}
else if (stricmp(argv[1],"-iotrace") == 0) {
debugFlags |= DEBUG_IO_TRACE_F;
}
#endif
else {
printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
exit(-1);
}
argc--;
argv++;
}
else {
printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
exit(-1);
}
argc--;
argv++;
}
if ((logfile = fopen("warmboot.log","w")) == NULL)
exit(1);
exit(1);
PM_init();
if (!useV86) {
// Initialise the x86 BIOS emulator
BE_init(false,debugFlags,65536,&VGAInfo[0]);
}
/* Initialise the x86 BIOS emulator */
BE_init(false,debugFlags,65536,&VGAInfo[0]);
}
// Enumerate all devices (which POST's them at the same time)
/* Enumerate all devices (which POST's them at the same time) */
if (PCI_enumerateDevices() < 1) {
printk("No PCI display devices found!\n");
return -1;
}
printk("No PCI display devices found!\n");
return -1;
}
// Post all the display controller BIOS'es
/* Post all the display controller BIOS'es */
PCI_postControllers();
// Cleanup and exit the emulator
/* Cleanup and exit the emulator */
if (!useV86)
BE_exit();
BE_exit();
fclose(logfile);
return 0;
}

View File

@@ -70,7 +70,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -82,11 +82,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -49,7 +49,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

View File

@@ -100,35 +100,35 @@ static ibool LoadDriver(void)
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
_AA_exports.dwSize = sizeof(_AA_exports);
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
return false;
return false;
if ((AA_initLibrary = (AA_initLibrary_t)PE_getProcAddress(hModBPD,"_AA_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((aaExp = AA_initLibrary(bpdpath,filename,&_PM_imports,&_N_imports,&_AA_imports)) == NULL)
PM_fatalError("AA_initLibrary failed!\n");
PM_fatalError("AA_initLibrary failed!\n");
/* Initialize all default imports to point to fatal error handler
* for upwards compatibility, and copy the exported functions.
*/
max = sizeof(_AA_exports)/sizeof(AA_initLibrary_t);
for (i = 0,p = (ulong*)&_AA_exports; i < max; i++)
*p++ = (ulong)_AA_fatalErrorHandler;
*p++ = (ulong)_AA_fatalErrorHandler;
memcpy(&_AA_exports,aaExp,MIN(sizeof(_AA_exports),aaExp->dwSize));
loaded = true;
return true;
@@ -143,7 +143,7 @@ static ibool LoadDriver(void)
int NAPI AA_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return _AA_exports.AA_status();
}
@@ -152,7 +152,7 @@ const char * NAPI AA_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return _AA_exports.AA_errorMsg(status);
}
@@ -160,7 +160,7 @@ const char * NAPI AA_errorMsg(
int NAPI AA_getDaysLeft(void)
{
if (!LoadDriver())
return -1;
return -1;
return _AA_exports.AA_getDaysLeft();
}
@@ -168,7 +168,7 @@ int NAPI AA_getDaysLeft(void)
int NAPI AA_registerLicense(uchar *license)
{
if (!LoadDriver())
return 0;
return 0;
return _AA_exports.AA_registerLicense(license);
}
@@ -176,7 +176,7 @@ int NAPI AA_registerLicense(uchar *license)
int NAPI AA_enumerateDevices(void)
{
if (!LoadDriver())
return 0;
return 0;
return _AA_exports.AA_enumerateDevices();
}
@@ -184,7 +184,7 @@ int NAPI AA_enumerateDevices(void)
AA_devCtx * NAPI AA_loadDriver(N_int32 deviceIndex)
{
if (!LoadDriver())
return NULL;
return NULL;
return _AA_exports.AA_loadDriver(deviceIndex);
}
#endif
@@ -211,15 +211,15 @@ void NAPI _OS_delay(
LZTimerObject tm;
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
if (!inited) {
ZTimerInit();
inited = true;
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
if (!inited) {
ZTimerInit();
inited = true;
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
else
_OS_delay8253(microSeconds);
_OS_delay8253(microSeconds);
}

View File

@@ -72,7 +72,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -84,11 +84,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -65,25 +65,25 @@ GA_sharedInfo * NAPI GA_getSharedInfo(
/* Open our helper device driver */
if (DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL))
PM_fatalError("Unable to open SDDHELP$ helper device driver!");
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL))
PM_fatalError("Unable to open SDDHELP$ helper device driver!");
outLen = sizeof(result);
DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,PMHELP_GETSHAREDINFO,
NULL, 0, NULL,
&result, outLen, &outLen);
NULL, 0, NULL,
&result, outLen, &outLen);
DosClose(hSDDHelp);
if (result) {
/* We have found the shared Nucleus packet. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus packet is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
HMODULE hModSDDPMI;
char buf[80];
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
}
/* We have found the shared Nucleus packet. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus packet is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
HMODULE hModSDDPMI;
char buf[80];
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
}
return (GA_sharedInfo*)result;
}
@@ -106,7 +106,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -118,7 +118,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
DosTmrQueryTime((QWORD*)value);
DosTmrQueryTime((QWORD*)value);
}

View File

@@ -72,7 +72,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -84,12 +84,12 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timespec ts;
struct timespec ts;
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
}

View File

@@ -71,9 +71,9 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
return false;
}
@@ -85,5 +85,5 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
}

View File

@@ -68,7 +68,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

View File

@@ -71,8 +71,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@@ -84,7 +84,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
VTD_Get_Real_Time(&value->high,&value->low);
VTD_Get_Real_Time(&value->high,&value->low);
}

View File

@@ -75,9 +75,9 @@ GA_sharedInfo * NAPI GA_getSharedInfo(
PM_init();
inBuf[0] = device;
if (DeviceIoControl(_PM_hDevice, PMHELP_GETSHAREDINFO32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return (GA_sharedInfo*)outBuf[0];
}
outBuf, sizeof(outBuf), &count, NULL)) {
return (GA_sharedInfo*)outBuf[0];
}
return NULL;
}
@@ -102,16 +102,16 @@ static ibool NAPI _GA_softStereoInit(
GA_devCtx *dc)
{
if (_PM_hDevice) {
DWORD inBuf[1]; /* Buffer to send data to VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD inBuf[1]; /* Buffer to send data to VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
inBuf[0] = (ulong)dc;
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
inBuf[0] = (ulong)dc;
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
return false;
}
@@ -122,9 +122,9 @@ This function turns on software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoOn(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@@ -137,14 +137,14 @@ static void NAPI _GA_softStereoScheduleFlip(
N_uint32 rightAddr)
{
if (_PM_hDevice) {
DWORD inBuf[2]; /* Buffer to send data to VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD inBuf[2]; /* Buffer to send data to VxD */
DWORD count; /* Count of bytes returned from VxD */
inBuf[0] = (ulong)leftAddr;
inBuf[1] = (ulong)rightAddr;
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
NULL, 0, &count, NULL);
}
inBuf[0] = (ulong)leftAddr;
inBuf[1] = (ulong)rightAddr;
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
NULL, 0, &count, NULL);
}
}
/****************************************************************************
@@ -154,14 +154,14 @@ This function turns off software stereo mode, either directly or via the VxD.
static N_int32 NAPI _GA_softStereoGetFlipStatus(void)
{
if (_PM_hDevice) {
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
return 0;
}
@@ -172,7 +172,7 @@ This function turns off software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoWaitTillFlipped(void)
{
while (!_GA_softStereoGetFlipStatus())
;
;
}
/****************************************************************************
@@ -182,9 +182,9 @@ This function turns off software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoOff(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@@ -195,9 +195,9 @@ the VxD.
static void NAPI _GA_softStereoExit(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@@ -217,14 +217,14 @@ static GA_devCtx * NAPI _GA_loadDriver(
N_int32 totalMemory = 0,oldIOPL;
if (deviceIndex >= GA_MAX_DEVICES)
PM_fatalError("DeviceIndex too large in GA_loadDriver!");
PM_fatalError("DeviceIndex too large in GA_loadDriver!");
PM_init();
inBuf[0] = deviceIndex;
if (DeviceIoControl(_PM_hDevice, PMHELP_GETMEMSIZE32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
totalMemory = outBuf[0];
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
totalMemory = outBuf[0];
if (totalMemory == 0)
totalMemory = 8192;
totalMemory = 8192;
_GA_exports.GA_forceMemSize(totalMemory,shared);
oldIOPL = PM_setIOPL(3);
dc = ORG_GA_loadDriver(deviceIndex,shared);
@@ -240,13 +240,13 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
haveRDTSC = false;
return true;
}
haveRDTSC = false;
return true;
}
return false;
}
@@ -258,7 +258,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
QueryPerformanceCounter((LARGE_INTEGER*)value);
QueryPerformanceCounter((LARGE_INTEGER*)value);
}

View File

@@ -88,31 +88,31 @@ static ibool LoadDriver(void)
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
return false;
return false;
if ((AGP_initLibrary = (AGP_initLibrary_t)PE_getProcAddress(hModBPD,"_AGP_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((agpExp = AGP_initLibrary(bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_AGP_imports)) == NULL)
PM_fatalError("AGP_initLibrary failed!\n");
PM_fatalError("AGP_initLibrary failed!\n");
_AGP_exports.dwSize = sizeof(_AGP_exports);
max = sizeof(_AGP_exports)/sizeof(AGP_initLibrary_t);
for (i = 0,p = (ulong*)&_AGP_exports; i < max; i++)
*p++ = (ulong)_AGP_fatalErrorHandler;
*p++ = (ulong)_AGP_fatalErrorHandler;
memcpy(&_AGP_exports,agpExp,MIN(sizeof(_AGP_exports),agpExp->dwSize));
loaded = true;
return true;
@@ -127,7 +127,7 @@ static ibool LoadDriver(void)
int NAPI AGP_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return _AGP_exports.AGP_status();
}
@@ -136,7 +136,7 @@ const char * NAPI AGP_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return _AGP_exports.AGP_errorMsg(status);
}
@@ -144,7 +144,7 @@ const char * NAPI AGP_errorMsg(
AGP_devCtx * NAPI AGP_loadDriver(N_int32 deviceIndex)
{
if (!LoadDriver())
return NULL;
return NULL;
return _AGP_exports.AGP_loadDriver(deviceIndex);
}
@@ -153,7 +153,7 @@ void NAPI AGP_unloadDriver(
AGP_devCtx *dc)
{
if (loaded)
_AGP_exports.AGP_unloadDriver(dc);
_AGP_exports.AGP_unloadDriver(dc);
}
/* {secret} */
@@ -161,7 +161,7 @@ void NAPI AGP_getGlobalOptions(
AGP_globalOptions *options)
{
if (LoadDriver())
_AGP_exports.AGP_getGlobalOptions(options);
_AGP_exports.AGP_getGlobalOptions(options);
}
/* {secret} */
@@ -169,7 +169,7 @@ void NAPI AGP_setGlobalOptions(
AGP_globalOptions *options)
{
if (LoadDriver())
_AGP_exports.AGP_setGlobalOptions(options);
_AGP_exports.AGP_setGlobalOptions(options);
}
/* {secret} */
@@ -177,7 +177,7 @@ void NAPI AGP_saveGlobalOptions(
AGP_globalOptions *options)
{
if (loaded)
_AGP_exports.AGP_saveGlobalOptions(options);
_AGP_exports.AGP_saveGlobalOptions(options);
}
#endif
@@ -197,24 +197,23 @@ void NAPI _OS_delay(
if (!inited) {
#ifndef __WIN32_VXD__
// This has been causing problems in VxD's for some reason, so for now
// we avoid using it.
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
ZTimerInit();
haveRDTSC = true;
}
else
/* This has been causing problems in VxD's for some reason, so for now */
/* we avoid using it. */
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
ZTimerInit();
haveRDTSC = true;
}
else
#endif
haveRDTSC = false;
inited = true;
}
haveRDTSC = false;
inited = true;
}
if (haveRDTSC) {
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
else
_OS_delay8253(microSeconds);
_OS_delay8253(microSeconds);
}

View File

@@ -60,19 +60,19 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
CenterY = ((RectParent.bottom - RectParent.top) - Height) / 2;
if ((CenterX < 0) || (CenterY < 0)) {
/* The Center Window is smaller than the parent window. */
if (hWndParent != GetDesktopWindow()) {
/* If the parent window is not the desktop use the desktop size. */
CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
}
CenterX = (CenterX < 0) ? 0: CenterX;
CenterY = (CenterY < 0) ? 0: CenterY;
}
/* The Center Window is smaller than the parent window. */
if (hWndParent != GetDesktopWindow()) {
/* If the parent window is not the desktop use the desktop size. */
CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
}
CenterX = (CenterX < 0) ? 0: CenterX;
CenterY = (CenterY < 0) ? 0: CenterY;
}
else {
CenterX += RectParent.left;
CenterY += RectParent.top;
}
CenterX += RectParent.left;
CenterY += RectParent.top;
}
/* Copy the values into RectCenter */
RectCenter.left = CenterX;
@@ -82,8 +82,8 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
/* Move the window to the new location */
MoveWindow(hWndCenter, RectCenter.left, RectCenter.top,
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), repaint);
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), repaint);
}
void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
@@ -117,7 +117,6 @@ void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
/* Move the window to the new location */
MoveWindow(hWndLogo, RectCenter.left, RectCenter.top,
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), false);
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), false);
}

View File

@@ -106,49 +106,49 @@ int getcmdopt(
char *formatchar;
if (argc > nextargv) {
if (nextchar == NULL) {
nextchar = argv[nextargv]; /* Index next argument */
if (nextchar == NULL) {
nextargv++;
return ALLDONE; /* No more options */
}
if (IS_NOT_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return PARAMETER; /* We have a parameter */
}
nextchar++; /* Move past switch operator */
if (IS_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return INVALID; /* Ignore rest of line */
}
}
if ((ch = *(nextchar++)) == 0) {
nextchar = NULL;
return INVALID; /* No options on line */
}
if (nextchar == NULL) {
nextchar = argv[nextargv]; /* Index next argument */
if (nextchar == NULL) {
nextargv++;
return ALLDONE; /* No more options */
}
if (IS_NOT_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return PARAMETER; /* We have a parameter */
}
nextchar++; /* Move past switch operator */
if (IS_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return INVALID; /* Ignore rest of line */
}
}
if ((ch = *(nextchar++)) == 0) {
nextchar = NULL;
return INVALID; /* No options on line */
}
if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
return INVALID;
if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
return INVALID;
if (*(++formatchar) == ':') { /* Expect an argument after option */
nextargv++;
if (*nextchar == 0) {
if (argc <= nextargv)
return INVALID;
nextchar = argv[nextargv++];
}
*argument = nextchar;
nextchar = NULL;
}
else { /* We have a switch style option */
if (*nextchar == 0) {
nextargv++;
nextchar = NULL;
}
*argument = NULL;
}
return ch; /* return the option specifier */
}
if (*(++formatchar) == ':') { /* Expect an argument after option */
nextargv++;
if (*nextchar == 0) {
if (argc <= nextargv)
return INVALID;
nextchar = argv[nextargv++];
}
*argument = nextchar;
nextchar = NULL;
}
else { /* We have a switch style option */
if (*nextchar == 0) {
nextargv++;
nextchar = NULL;
}
*argument = NULL;
}
return ch; /* return the option specifier */
}
nextchar = NULL;
nextargv++;
return ALLDONE; /* no arguments on command line */
@@ -174,51 +174,51 @@ static int parse_option(
int num_read;
switch ((int)(optarr->type)) {
case OPT_INTEGER:
num_read = sscanf(argument,"%d",(int*)optarr->arg);
break;
case OPT_HEX:
num_read = sscanf(argument,"%x",(int*)optarr->arg);
break;
case OPT_OCTAL:
num_read = sscanf(argument,"%o",(int*)optarr->arg);
break;
case OPT_UNSIGNED:
num_read = sscanf(argument,"%u",(uint*)optarr->arg);
break;
case OPT_LINTEGER:
num_read = sscanf(argument,"%ld",(long*)optarr->arg);
break;
case OPT_LHEX:
num_read = sscanf(argument,"%lx",(long*)optarr->arg);
break;
case OPT_LOCTAL:
num_read = sscanf(argument,"%lo",(long*)optarr->arg);
break;
case OPT_LUNSIGNED:
num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
break;
case OPT_FLOAT:
num_read = sscanf(argument,"%f",(float*)optarr->arg);
break;
case OPT_DOUBLE:
num_read = sscanf(argument,"%lf",(double*)optarr->arg);
break;
case OPT_LDOUBLE:
num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
break;
case OPT_STRING:
num_read = 1; /* This always works */
*((char**)optarr->arg) = argument;
break;
default:
return INVALID;
}
case OPT_INTEGER:
num_read = sscanf(argument,"%d",(int*)optarr->arg);
break;
case OPT_HEX:
num_read = sscanf(argument,"%x",(int*)optarr->arg);
break;
case OPT_OCTAL:
num_read = sscanf(argument,"%o",(int*)optarr->arg);
break;
case OPT_UNSIGNED:
num_read = sscanf(argument,"%u",(uint*)optarr->arg);
break;
case OPT_LINTEGER:
num_read = sscanf(argument,"%ld",(long*)optarr->arg);
break;
case OPT_LHEX:
num_read = sscanf(argument,"%lx",(long*)optarr->arg);
break;
case OPT_LOCTAL:
num_read = sscanf(argument,"%lo",(long*)optarr->arg);
break;
case OPT_LUNSIGNED:
num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
break;
case OPT_FLOAT:
num_read = sscanf(argument,"%f",(float*)optarr->arg);
break;
case OPT_DOUBLE:
num_read = sscanf(argument,"%lf",(double*)optarr->arg);
break;
case OPT_LDOUBLE:
num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
break;
case OPT_STRING:
num_read = 1; /* This always works */
*((char**)optarr->arg) = argument;
break;
default:
return INVALID;
}
if (num_read == 0)
return INVALID;
return INVALID;
else
return ALLDONE;
return ALLDONE;
}
/****************************************************************************
@@ -261,8 +261,8 @@ int getargs(
int num_opt,
Option optarr[],
int (*do_param)(
char *param,
int num))
char *param,
int num))
{
int i,opt;
char *argument;
@@ -273,51 +273,51 @@ int getargs(
strcpy(cmdstr,"hH?");
for (i = 0,opt = 3; i < num_opt; i++,opt++) {
cmdstr[opt] = optarr[i].opt;
if (optarr[i].type != OPT_SWITCH) {
cmdstr[++opt] = ':';
}
}
cmdstr[opt] = optarr[i].opt;
if (optarr[i].type != OPT_SWITCH) {
cmdstr[++opt] = ':';
}
}
cmdstr[opt] = '\0';
for (;;) {
opt = getcmdopt(argc,argv,cmdstr,&argument);
switch (opt) {
case 'H':
case 'h':
case '?':
return HELP;
case ALLDONE:
return ALLDONE;
case INVALID:
return INVALID;
case PARAMETER:
if (do_param == NULL)
return INVALID;
if (do_param(argv[nextargv],param_num) == INVALID)
return INVALID;
nextargv++;
param_num++;
break;
default:
opt = getcmdopt(argc,argv,cmdstr,&argument);
switch (opt) {
case 'H':
case 'h':
case '?':
return HELP;
case ALLDONE:
return ALLDONE;
case INVALID:
return INVALID;
case PARAMETER:
if (do_param == NULL)
return INVALID;
if (do_param(argv[nextargv],param_num) == INVALID)
return INVALID;
nextargv++;
param_num++;
break;
default:
/* Search for the option in the option array. We are
* guaranteed to find it.
*/
/* Search for the option in the option array. We are
* guaranteed to find it.
*/
for (i = 0; i < num_opt; i++) {
if (optarr[i].opt == opt)
break;
}
if (optarr[i].type == OPT_SWITCH)
*((ibool*)optarr[i].arg) = true;
else {
if (parse_option(&optarr[i],argument) == INVALID)
return INVALID;
}
break;
}
}
for (i = 0; i < num_opt; i++) {
if (optarr[i].opt == opt)
break;
}
if (optarr[i].type == OPT_SWITCH)
*((ibool*)optarr[i].arg) = true;
else {
if (parse_option(&optarr[i],argument) == INVALID)
return INVALID;
}
break;
}
}
}
/****************************************************************************
@@ -340,11 +340,11 @@ void print_desc(
int i;
for (i = 0; i < num_opt; i++) {
if (optarr[i].type == OPT_SWITCH)
printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
else
printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
}
if (optarr[i].type == OPT_SWITCH)
printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
else
printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
}
}
/****************************************************************************
@@ -382,45 +382,45 @@ int parse_commandline(
argv[argc++] = filename;
cmdLine = strncpy(str, cmdLine, sizeof(str)-1);
while (*cmdLine) {
switch (*cmdLine) {
case '"' :
if (prevWord != NULL) {
if (inQuote) {
if (!noStrip)
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
}
else
noStrip = TRUE;
}
inQuote = !inQuote;
break;
case ' ' :
case '\t' :
if (!inQuote) {
if (prevWord != NULL) {
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
noStrip = FALSE;
}
}
break;
default :
if (prevWord == NULL)
prevWord = cmdLine;
break;
}
if (argc >= maxArgv - 1)
break;
cmdLine++;
}
switch (*cmdLine) {
case '"' :
if (prevWord != NULL) {
if (inQuote) {
if (!noStrip)
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
}
else
noStrip = TRUE;
}
inQuote = !inQuote;
break;
case ' ' :
case '\t' :
if (!inQuote) {
if (prevWord != NULL) {
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
noStrip = FALSE;
}
}
break;
default :
if (prevWord == NULL)
prevWord = cmdLine;
break;
}
if (argc >= maxArgv - 1)
break;
cmdLine++;
}
if ((prevWord != NULL || (inQuote && prevWord != NULL)) && argc < maxArgv - 1) {
*cmdLine = '\0';
argv [argc++] = prevWord;
}
*cmdLine = '\0';
argv [argc++] = prevWord;
}
argv[argc] = NULL;
/* Return updated parameters */

View File

@@ -70,10 +70,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for BeOS here. That will eliminate fatal errors loading new
// drivers on BeOS!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for BeOS here. That will eliminate fatal errors loading new */
/* drivers on BeOS! */
return &_PM_imports;
}
@@ -124,7 +124,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -136,11 +136,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -120,7 +120,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}
@@ -133,4 +133,3 @@ void NAPI GA_TimerRead(
{
_GA_readTimeStamp(value);
}

View File

@@ -107,7 +107,7 @@ static ibool LoadDriver(
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
/* First try to see if we can find the system wide shared exports
@@ -116,33 +116,33 @@ static ibool LoadDriver(
*/
__GA_exports.dwSize = sizeof(__GA_exports);
if (GA_getSharedExports(&__GA_exports,shared))
return loaded = true;
return loaded = true;
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,shared)) == NULL)
return false;
return false;
if ((GA_initLibrary = (GA_initLibrary_t)PE_getProcAddress(hModBPD,"_GA_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((gaExp = GA_initLibrary(shared,bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_GA_imports)) == NULL)
PM_fatalError("GA_initLibrary failed!\n");
PM_fatalError("GA_initLibrary failed!\n");
/* Initialize all default imports to point to fatal error handler
* for upwards compatibility, and copy the exported functions.
*/
max = sizeof(__GA_exports)/sizeof(GA_initLibrary_t);
for (i = 0,p = (ulong*)&__GA_exports; i < max; i++)
*p++ = (ulong)_GA_fatalErrorHandler;
*p++ = (ulong)_GA_fatalErrorHandler;
memcpy(&__GA_exports,gaExp,MIN(sizeof(__GA_exports),gaExp->dwSize));
loaded = true;
return true;
@@ -157,7 +157,7 @@ static ibool LoadDriver(
int NAPI GA_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return __GA_exports.GA_status();
}
@@ -166,7 +166,7 @@ const char * NAPI GA_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return __GA_exports.GA_errorMsg(status);
}
@@ -174,7 +174,7 @@ const char * NAPI GA_errorMsg(
int NAPI GA_getDaysLeft(N_int32 shared)
{
if (!LoadDriver(shared))
return -1;
return -1;
return __GA_exports.GA_getDaysLeft(shared);
}
@@ -182,7 +182,7 @@ int NAPI GA_getDaysLeft(N_int32 shared)
int NAPI GA_registerLicense(uchar *license,N_int32 shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_registerLicense(license,shared);
}
@@ -190,7 +190,7 @@ int NAPI GA_registerLicense(uchar *license,N_int32 shared)
ibool NAPI GA_loadInGUI(N_int32 shared)
{
if (!LoadDriver(shared))
return false;
return false;
return __GA_exports.GA_loadInGUI(shared);
}
@@ -198,7 +198,7 @@ ibool NAPI GA_loadInGUI(N_int32 shared)
int NAPI GA_enumerateDevices(N_int32 shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_enumerateDevices(shared);
}
@@ -206,7 +206,7 @@ int NAPI GA_enumerateDevices(N_int32 shared)
GA_devCtx * NAPI GA_loadDriver(N_int32 deviceIndex,N_int32 shared)
{
if (!LoadDriver(shared))
return NULL;
return NULL;
return __GA_exports.GA_loadDriver(deviceIndex,shared);
}
@@ -216,7 +216,7 @@ void NAPI GA_getGlobalOptions(
ibool shared)
{
if (LoadDriver(shared))
__GA_exports.GA_getGlobalOptions(options,shared);
__GA_exports.GA_getGlobalOptions(options,shared);
}
/* {secret} */
@@ -226,7 +226,7 @@ PE_MODULE * NAPI GA_loadLibrary(
ibool shared)
{
if (!LoadDriver(shared))
return NULL;
return NULL;
return __GA_exports.GA_loadLibrary(szBPDName,size,shared);
}
@@ -236,7 +236,7 @@ GA_devCtx * NAPI GA_getCurrentDriver(
{
/* Bail for older drivers that didn't export this function! */
if (!__GA_exports.GA_getCurrentDriver)
return NULL;
return NULL;
return __GA_exports.GA_getCurrentDriver(deviceIndex);
}
@@ -246,7 +246,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
{
/* Bail for older drivers that didn't export this function! */
if (!__GA_exports.GA_getCurrentRef2d)
return NULL;
return NULL;
return __GA_exports.GA_getCurrentRef2d(deviceIndex);
}
@@ -254,7 +254,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
int NAPI GA_isOEMVersion(ibool shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_isOEMVersion(shared);
}
@@ -262,8 +262,7 @@ int NAPI GA_isOEMVersion(ibool shared)
N_uint32 * NAPI GA_getLicensedDevices(ibool shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_getLicensedDevices(shared);
}
#endif

View File

@@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for Linux here. That will eliminate fatal errors loading new
// drivers on Linux!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for Linux here. That will eliminate fatal errors loading new */
/* drivers on Linux! */
return &_PM_imports;
}
@@ -126,7 +126,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -138,11 +138,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

View File

@@ -117,8 +117,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
KeQuerySystemTime((LARGE_INTEGER*)value);
KeQuerySystemTime((LARGE_INTEGER*)value);
}

View File

@@ -83,11 +83,11 @@ static ulong CallSDDHelp(
* can't fail here.
*/
DosOpen(PMHELP_NAME,&hSDDHelp,&result[0],0,0,
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL);
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL);
DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
&parms, inLen = sizeof(parms), &inLen,
&result, outLen = sizeof(result), &outLen);
&parms, inLen = sizeof(parms), &inLen,
&result, outLen = sizeof(result), &outLen);
DosClose(hSDDHelp);
return result[0];
}
@@ -147,17 +147,17 @@ ibool NAPI GA_getSharedExports(
/* Initialise the PM library and connect to our runtime DLL's */
PM_init();
if (CallSDDHelp(PMHELP_GETSHAREDEXP) != 0) {
/* We have found the shared Nucleus exports. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus loader code is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
exp = (GA_exports*)result[0];
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
return true;
}
/* We have found the shared Nucleus exports. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus loader code is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
exp = (GA_exports*)result[0];
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
return true;
}
#endif
(void)shared;
return false;
@@ -197,7 +197,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -209,9 +209,9 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
DosTmrQueryTime((QWORD*)value);
DosTmrQueryTime((QWORD*)value);
}
/****************************************************************************

View File

@@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for QNX here. That will eliminate fatal errors loading new
// drivers on QNX!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for QNX here. That will eliminate fatal errors loading new */
/* drivers on QNX! */
return &_PM_imports;
}
@@ -126,7 +126,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@@ -138,12 +138,12 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timespec ts;
struct timespec ts;
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
}

View File

@@ -121,9 +121,9 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
return false;
}
@@ -135,5 +135,5 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
}

View File

@@ -118,7 +118,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

View File

@@ -117,8 +117,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
VTD_Get_Real_Time(&value->high,&value->low);
VTD_Get_Real_Time(&value->high,&value->low);
}

View File

@@ -67,16 +67,16 @@ static ibool LoadSharedDLL(void)
/* Check if we have already loaded the DLL */
if (hModDLL)
return true;
return true;
PM_init();
/* Open the DLL file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModDLL = LoadLibrary(filename)) == NULL)
return false;
return false;
return true;
}
@@ -103,10 +103,10 @@ void NAPI GA_setLocalPath(
PM_setLocalBPDPath(path);
if (_PM_hDevice != INVALID_HANDLE_VALUE) {
inBuf[0] = (DWORD)path;
DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
}
inBuf[0] = (DWORD)path;
DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
}
}
/****************************************************************************
@@ -126,18 +126,18 @@ PM_imports * NAPI GA_getSystemPMImports(void)
PM_imports * (NAPIP _GA_getSystemPMImports)(void);
if (LoadSharedDLL()) {
/* Note that Visual C++ build DLL's with only a single underscore in front
* of the exported name while Watcom C provides two of them. We check for
* both to allow working with either compiled DLL.
*/
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
pmImp = _GA_getSystemPMImports();
memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
return pmImp;
}
}
}
/* Note that Visual C++ build DLL's with only a single underscore in front
* of the exported name while Watcom C provides two of them. We check for
* both to allow working with either compiled DLL.
*/
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
pmImp = _GA_getSystemPMImports();
memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
return pmImp;
}
}
}
return &_PM_imports;
}
@@ -162,16 +162,16 @@ ibool NAPI GA_getSharedExports(
useRing0Driver = false;
if (shared) {
if (!LoadSharedDLL())
PM_fatalError("Unable to load " DLL_NAME "!");
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
PM_fatalError("Unable to load " DLL_NAME "!");
exp = _GA_getSystemGAExports();
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
useRing0Driver = true;
return true;
}
if (!LoadSharedDLL())
PM_fatalError("Unable to load " DLL_NAME "!");
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
PM_fatalError("Unable to load " DLL_NAME "!");
exp = _GA_getSystemGAExports();
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
useRing0Driver = true;
return true;
}
return false;
}
@@ -188,14 +188,14 @@ ibool NAPI GA_queryFunctions(
static ibool (NAPIP _GA_queryFunctions)(GA_devCtx *dc,N_uint32 id,void _FAR_ *funcs) = NULL;
if (useRing0Driver) {
// Call the version in nga_w32.dll if it is loaded
if (!_GA_queryFunctions) {
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _GA_queryFunctions(dc,id,funcs);
}
/* Call the version in nga_w32.dll if it is loaded */
if (!_GA_queryFunctions) {
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _GA_queryFunctions(dc,id,funcs);
}
return __GA_exports.GA_queryFunctions(dc,id,funcs);
}
@@ -211,14 +211,14 @@ ibool NAPI REF2D_queryFunctions(
static ibool (NAPIP _REF2D_queryFunctions)(REF2D_driver *ref2d,N_uint32 id,void _FAR_ *funcs) = NULL;
if (useRing0Driver) {
// Call the version in nga_w32.dll if it is loaded
if (!_REF2D_queryFunctions) {
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _REF2D_queryFunctions(ref2d,id,funcs);
}
/* Call the version in nga_w32.dll if it is loaded */
if (!_REF2D_queryFunctions) {
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _REF2D_queryFunctions(ref2d,id,funcs);
}
return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
}
#endif
@@ -231,13 +231,13 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
haveRDTSC = false;
return true;
}
haveRDTSC = false;
return true;
}
return false;
}
@@ -249,8 +249,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
QueryPerformanceCounter((LARGE_INTEGER*)value);
QueryPerformanceCounter((LARGE_INTEGER*)value);
}

View File

@@ -107,9 +107,9 @@ static void GetInternalConstants(GTF_constants *c)
c->hSync = GC.hSync;
c->minVSyncBP = GC.minVSyncBP;
if (GC.k == 0)
c->k = 0.001;
c->k = 0.001;
else
c->k = GC.k;
c->k = GC.k;
c->m = (c->k / 256) * GC.m;
c->c = (GC.c - GC.j) * (c->k / 256) + GC.j;
c->j = GC.j;
@@ -165,89 +165,89 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
vFieldRate = vFreq;
interlace = 0;
if (wantInterlace)
dotClock *= 2;
dotClock *= 2;
/* Determine the lines for margins */
if (wantMargins) {
topMarginLines = round(c.margin / 100 * vLines);
botMarginLines = round(c.margin / 100 * vLines);
}
topMarginLines = round(c.margin / 100 * vLines);
botMarginLines = round(c.margin / 100 * vLines);
}
else {
topMarginLines = 0;
botMarginLines = 0;
}
topMarginLines = 0;
botMarginLines = 0;
}
if (type != GTF_lockPF) {
if (type == GTF_lockVF) {
/* Estimate the horizontal period */
hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
(vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
if (type == GTF_lockVF) {
/* Estimate the horizontal period */
hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
(vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
/* Find the number of lines in vSync + back porch */
vSyncBP = round(c.minVSyncBP / hPeriodEst);
}
else if (type == GTF_lockHF) {
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
}
/* Find the number of lines in vSync + back porch */
vSyncBP = round(c.minVSyncBP / hPeriodEst);
}
else if (type == GTF_lockHF) {
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
}
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
if (type == GTF_lockVF) {
/* Estimate the vertical frequency */
vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
if (type == GTF_lockVF) {
/* Estimate the vertical frequency */
vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
/* Find the actual horizontal period */
hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
/* Find the actual horizontal period */
hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
/* Find the actual vertical field frequency */
vFieldRate = 1000000 / (hPeriod * vTotalLines);
}
else if (type == GTF_lockHF) {
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
}
/* Find the actual vertical field frequency */
vFieldRate = 1000000 / (hPeriod * vTotalLines);
}
else if (type == GTF_lockHF) {
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
}
/* Find the number of pixels in the left and right margins */
if (wantMargins) {
leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
}
leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
}
else {
leftMarginPixels = 0;
rightMarginPixels = 0;
}
leftMarginPixels = 0;
rightMarginPixels = 0;
}
/* Find the total number of active pixels in image + margins */
hTotalActivePixels = hPixels + leftMarginPixels + rightMarginPixels;
if (type == GTF_lockVF) {
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
}
else if (type == GTF_lockHF) {
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - (c.m / hFreq);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - (c.m / hFreq);
}
else if (type == GTF_lockPF) {
/* Find ideal horizontal period from blanking duty cycle formula */
idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
(0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
/* Find ideal horizontal period from blanking duty cycle formula */
idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
(0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
}
/* Find the number of pixels in blanking time */
hBlankPixels = round((hTotalActivePixels * idealDutyCycle) /
((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
/* Find the total number of pixels */
hTotalPixels = hTotalActivePixels + hBlankPixels;
@@ -262,35 +262,35 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
hSyncBP = hBackPorch + hSyncWidth;
if (type == GTF_lockPF) {
/* Find the horizontal frequency */
hFreq = (dotClock / hTotalPixels) * 1000;
/* Find the horizontal frequency */
hFreq = (dotClock / hTotalPixels) * 1000;
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
else {
if (type == GTF_lockVF) {
/* Find the horizontal frequency */
hFreq = 1000 / hPeriod;
}
else if (type == GTF_lockHF) {
/* Find the horizontal frequency */
hPeriod = 1000 / hFreq;
}
if (type == GTF_lockVF) {
/* Find the horizontal frequency */
hFreq = 1000 / hPeriod;
}
else if (type == GTF_lockHF) {
/* Find the horizontal frequency */
hPeriod = 1000 / hFreq;
}
/* Find the pixel clock frequency */
dotClock = hTotalPixels / hPeriod;
}
/* Find the pixel clock frequency */
dotClock = hTotalPixels / hPeriod;
}
/* Return the computed frequencies */
t->vFreq = vFieldRate;
@@ -315,16 +315,16 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
t->v.vSyncWidth = (int)c.vSyncRqd;
t->v.vBackPorch = (int)vBackPorch;
if (wantInterlace) {
/* Halve the timings for interlaced modes */
t->v.vTotal /= 2;
t->v.vDisp /= 2;
t->v.vSyncStart /= 2;
t->v.vSyncEnd /= 2;
t->v.vFrontPorch /= 2;
t->v.vSyncWidth /= 2;
t->v.vBackPorch /= 2;
t->dotClock /= 2;
}
/* Halve the timings for interlaced modes */
t->v.vTotal /= 2;
t->v.vDisp /= 2;
t->v.vSyncStart /= 2;
t->v.vSyncEnd /= 2;
t->v.vFrontPorch /= 2;
t->v.vSyncWidth /= 2;
t->v.vBackPorch /= 2;
t->dotClock /= 2;
}
/* Mark as GTF timing using the sync polarities */
t->interlace = (wantInterlace) ? 'I' : 'N';
@@ -348,30 +348,30 @@ void main(int argc,char *argv[])
GTF_timings t;
if (argc != 5 && argc != 6) {
printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
printf("\n");
printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
printf("\n");
printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
printf("\n");
printf(" GTFCALC 640 480 60 Hz\n");
printf("\n");
printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
printf("\n");
printf(" GTFCALC 640 480 31.5 KHz\n");
printf("\n");
printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
printf("\n");
printf(" GTFCALC 640 480 25.175 MHz\n");
printf("\n");
printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
exit(1);
}
printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
printf("\n");
printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
printf("\n");
printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
printf("\n");
printf(" GTFCALC 640 480 60 Hz\n");
printf("\n");
printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
printf("\n");
printf(" GTFCALC 640 480 31.5 KHz\n");
printf("\n");
printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
printf("\n");
printf(" GTFCALC 640 480 25.175 MHz\n");
printf("\n");
printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
exit(1);
}
/* Get values from command line */
xPixels = atof(argv[1]);
@@ -381,33 +381,33 @@ void main(int argc,char *argv[])
/* Compute the CRTC timings */
if (toupper(argv[4][0]) == 'H')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
else if (toupper(argv[4][0]) == 'K')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
else if (toupper(argv[4][0]) == 'M')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
else {
printf("Unknown command line!\n");
exit(1);
}
printf("Unknown command line!\n");
exit(1);
}
/* Dump summary info to standard output */
printf("CRTC values for %.0fx%.0f @ %.2f %s\n", xPixels, yPixels, freq, argv[4]);
printf("\n");
printf(" hTotal = %-4d vTotal = %-4d\n",
t.h.hTotal, t.v.vTotal);
t.h.hTotal, t.v.vTotal);
printf(" hDisp = %-4d vDisp = %-4d\n",
t.h.hDisp, t.v.vDisp);
t.h.hDisp, t.v.vDisp);
printf(" hSyncStart = %-4d vSyncStart = %-4d\n",
t.h.hSyncStart, t.v.vSyncStart);
t.h.hSyncStart, t.v.vSyncStart);
printf(" hSyncEnd = %-4d vSyncEnd = %-4d\n",
t.h.hSyncEnd, t.v.vSyncEnd);
t.h.hSyncEnd, t.v.vSyncEnd);
printf(" hFrontPorch = %-4d vFrontPorch = %-4d\n",
t.h.hFrontPorch, t.v.vFrontPorch);
t.h.hFrontPorch, t.v.vFrontPorch);
printf(" hSyncWidth = %-4d vSyncWidth = %-4d\n",
t.h.hSyncWidth, t.v.vSyncWidth);
t.h.hSyncWidth, t.v.vSyncWidth);
printf(" hBackPorch = %-4d vBackPorch = %-4d\n",
t.h.hBackPorch, t.v.vBackPorch);
t.h.hBackPorch, t.v.vBackPorch);
printf("\n");
printf(" Interlaced = %s\n", (t.interlace == 'I') ? "Yes" : "No");
printf(" H sync pol = %c\n", t.hSyncPol);
@@ -419,18 +419,18 @@ void main(int argc,char *argv[])
/* Dump to file in format used by SciTech Display Doctor */
if ((f = fopen("UVCONFIG.CRT","w")) != NULL) {
fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
fprintf(f, "%d %d %d %d '%c' %s\n",
t.h.hTotal, t.h.hDisp,
t.h.hSyncStart, t.h.hSyncEnd,
t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
fprintf(f, "%d %d %d %d '%c'\n",
t.v.vTotal, t.v.vDisp,
t.v.vSyncStart, t.v.vSyncEnd,
t.vSyncPol);
fprintf(f, "%.2f\n", t.dotClock);
fclose(f);
}
fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
fprintf(f, "%d %d %d %d '%c' %s\n",
t.h.hTotal, t.h.hDisp,
t.h.hSyncStart, t.h.hSyncEnd,
t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
fprintf(f, "%d %d %d %d '%c'\n",
t.v.vTotal, t.v.vDisp,
t.v.vSyncStart, t.v.vSyncEnd,
t.vSyncPol);
fprintf(f, "%.2f\n", t.dotClock);
fclose(f);
}
}
#endif /* TESTING */

View File

@@ -270,27 +270,27 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Find an empty file handle to use */
for (i = 3; i < MAX_FILES; i++) {
if (!openHandles[i])
break;
}
if (!openHandles[i])
break;
}
if (openHandles[i])
return -1;
return -1;
/* Find the open flags to use */
if (_oflag & ___O_TRUNC)
strcpy(mode,"w");
strcpy(mode,"w");
else if (_oflag & ___O_CREAT)
strcpy(mode,"a");
strcpy(mode,"a");
else
strcpy(mode,"r");
strcpy(mode,"r");
if (_oflag & ___O_BINARY)
strcat(mode,"b");
strcat(mode,"b");
if (_oflag & ___O_TEXT)
strcat(mode,"t");
strcat(mode,"t");
/* Open the file and store the file handle */
if ((openHandles[i] = fopen(_path,mode)) == NULL)
return -1;
return -1;
return i;
}
@@ -300,25 +300,25 @@ int _CDECL stub_access(const char *_path, int _amode)
int _CDECL stub_close(int _fildes)
{
if (_fildes >= 3 && openHandles[_fildes]) {
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
return 0;
}
off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
{
if (_fildes >= 3) {
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
return 0;
}
size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return 0;
}
@@ -327,18 +327,18 @@ int _CDECL stub_unlink(const char *_path)
WORD error;
if (initComplete) {
if (R0_DeleteFile((char*)_path,0,&error))
return 0;
return -1;
}
if (R0_DeleteFile((char*)_path,0,&error))
return 0;
return -1;
}
else
return i_remove(_path);
return i_remove(_path);
}
size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return _nbyte;
}
@@ -356,7 +356,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
WORD error;
if (initComplete)
R0_SetFileAttributes((char*)filename,attrib,&error);
R0_SetFileAttributes((char*)filename,attrib,&error);
}
/* Return the current date in days since 1/1/1980 */
@@ -380,59 +380,59 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Find an empty file handle to use */
for (i = 3; i < MAX_FILES; i++) {
if (!openHandles[i])
break;
}
if (!openHandles[i])
break;
}
if (openHandles[i])
return -1;
return -1;
/* Find the open flags to use */
if (_oflag & ___O_TRUNC)
strcpy(mode,"w");
strcpy(mode,"w");
else if (_oflag & ___O_CREAT)
strcpy(mode,"a");
strcpy(mode,"a");
else
strcpy(mode,"r");
strcpy(mode,"r");
if (_oflag & ___O_BINARY)
strcat(mode,"b");
strcat(mode,"b");
if (_oflag & ___O_TEXT)
strcat(mode,"t");
strcat(mode,"t");
/* Open the file and store the file handle */
if ((openHandles[i] = fopen(_path,mode)) == NULL)
return -1;
return -1;
return i;
}
int _CDECL stub_close(int _fildes)
{
if (_fildes >= 3 && openHandles[_fildes]) {
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
return 0;
}
off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
{
if (_fildes >= 3) {
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
return 0;
}
size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return 0;
}
size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return _nbyte;
}
@@ -444,7 +444,7 @@ int _CDECL stub_isatty(int _fildes)
int _CDECL stub_unlink(const char *_path)
{
// TODO: Implement this!
/* TODO: Implement this! */
return -1;
}
@@ -454,7 +454,7 @@ int _CDECL stub_remove(const char *_filename)
int _CDECL stub_rename(const char *_old, const char *_new)
{
// TODO: Implement this!
/* TODO: Implement this! */
return -1;
}
@@ -462,11 +462,11 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
uint _attr = 0;
if (attrib & __A_RDONLY)
_attr |= FILE_ATTRIBUTE_READONLY;
_attr |= FILE_ATTRIBUTE_READONLY;
if (attrib & __A_HIDDEN)
_attr |= FILE_ATTRIBUTE_HIDDEN;
_attr |= FILE_ATTRIBUTE_HIDDEN;
if (attrib & __A_SYSTEM)
_attr |= FILE_ATTRIBUTE_SYSTEM;
_attr |= FILE_ATTRIBUTE_SYSTEM;
PM_setFileAttr(filename,_attr);
}
@@ -506,7 +506,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
FILESTATUS3 s;
if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
return;
return;
s.attrFile = attrib;
DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
}
@@ -528,25 +528,25 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Determine open flags */
if (_oflag & ___O_CREAT) {
if (_oflag & ___O_EXCL)
openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
}
if (_oflag & ___O_EXCL)
openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
}
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS;
openflag = OPEN_ACTION_OPEN_IF_EXISTS;
/* Determine open mode flags */
if (_oflag & ___O_RDONLY)
openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
else if (_oflag & ___O_WRONLY)
openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
else
openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
/* Copy the path to a variable on the stack. We need to do this
* for OS/2 as when the drivers are loaded into shared kernel
@@ -555,14 +555,14 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
*/
strcpy(path,_path);
if (DosOpen(path, &handle, &actiontaken, 0, FILE_NORMAL,
openflag, openmode, NULL) != NO_ERROR)
return -1;
openflag, openmode, NULL) != NO_ERROR)
return -1;
/* Handle append mode of operation */
if (_oflag & ___O_APPEND) {
if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
return -1;
}
if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
return -1;
}
return handle;
}
@@ -578,16 +578,16 @@ int _CDECL stub_access(const char *_path, int _amode)
*/
strcpy(path,_path);
if (DosQueryPathInfo(path, FIL_STANDARD, &fs, sizeof(fs)) != NO_ERROR)
return -1;
return -1;
if ((_amode & W_OK) && (fs.attrFile & FILE_READONLY))
return -1;
return -1;
return 0;
}
int _CDECL stub_close(int _fildes)
{
if (DosClose(_fildes) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -596,17 +596,17 @@ off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
ULONG cbActual, origin;
switch (_whence) {
case SEEK_CUR:
origin = FILE_CURRENT;
break;
case SEEK_END:
origin = FILE_END;
break;
default:
origin = FILE_BEGIN;
}
case SEEK_CUR:
origin = FILE_CURRENT;
break;
case SEEK_END:
origin = FILE_END;
break;
default:
origin = FILE_BEGIN;
}
if (DosSetFilePtr(_fildes, _offset, origin, &cbActual) != NO_ERROR)
return -1;
return -1;
return cbActual;
}
@@ -621,19 +621,19 @@ size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
* in kernel space and will cause DosRead to bail internally.
*/
while (_nbyte > BUF_SIZE) {
if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,BUF_SIZE);
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,BUF_SIZE);
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (_nbyte) {
if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,_nbyte);
}
if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,_nbyte);
}
return cbActual;
}
@@ -648,19 +648,19 @@ size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
* in kernel space and will cause DosWrite to bail internally.
*/
while (_nbyte > BUF_SIZE) {
memcpy(file_io_buf,p,BUF_SIZE);
if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
memcpy(file_io_buf,p,BUF_SIZE);
if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (_nbyte) {
memcpy(file_io_buf,p,_nbyte);
if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
}
memcpy(file_io_buf,p,_nbyte);
if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
}
return cbActual;
}
@@ -675,7 +675,7 @@ int _CDECL stub_unlink(const char *_path)
*/
strcpy(path,_path);
if (DosDelete(path) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -684,7 +684,7 @@ int _CDECL stub_isatty(int _fildes)
ULONG htype, flags;
if (DosQueryHType(_fildes, &htype, &flags) != NO_ERROR)
return 0;
return 0;
return ((htype & 0xFF) == HANDTYPE_DEVICE);
}
@@ -700,7 +700,7 @@ int _CDECL stub_remove(const char *_path)
*/
strcpy(path,_path);
if (DosDelete(path) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -717,7 +717,7 @@ int _CDECL stub_rename(const char *_old, const char *_new)
strcpy(old,_old);
strcpy(new,_new);
if (DosMove(old, new) != NO_ERROR)
return -1;
return -1;
return 0;
}
@@ -734,23 +734,23 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
{
int oflag_tab[] = {
___O_RDONLY, O_RDONLY,
___O_WRONLY, O_WRONLY,
___O_RDWR, O_RDWR,
___O_BINARY, O_BINARY,
___O_TEXT, O_TEXT,
___O_CREAT, O_CREAT,
___O_EXCL, O_EXCL,
___O_TRUNC, O_TRUNC,
___O_APPEND, O_APPEND,
};
___O_RDONLY, O_RDONLY,
___O_WRONLY, O_WRONLY,
___O_RDWR, O_RDWR,
___O_BINARY, O_BINARY,
___O_TEXT, O_TEXT,
___O_CREAT, O_CREAT,
___O_EXCL, O_EXCL,
___O_TRUNC, O_TRUNC,
___O_APPEND, O_APPEND,
};
int i,oflag = 0;
/* Translate the oflag's to the OS dependent versions */
for (i = 0; i < sizeof(oflag_tab) / sizeof(int); i += 2) {
if (_oflag & oflag_tab[i])
oflag |= oflag_tab[i+1];
}
if (_oflag & oflag_tab[i])
oflag |= oflag_tab[i+1];
}
return open(_path,oflag,_mode);
}
@@ -825,4 +825,3 @@ void * _CDECL stub_signal(int sig, void *handler)
return (void*)signal(sig,(__code_ptr)handler);
#endif
}

View File

@@ -79,35 +79,35 @@ static int PE_readHeader(
result = PE_invalidDLLImage;
fseek(f, startOffset, SEEK_SET);
if (fread(&exehdr, 1, sizeof(exehdr), f) != sizeof(exehdr))
return false;
return false;
if (exehdr.signature != 0x5A4D)
return false;
return false;
/* Now seek to the start of the PE header defined at offset 0x3C
* in the MS-DOS EXE header, and read the signature and check it.
*/
fseek(f, startOffset+0x3C, SEEK_SET);
if (fread(&offset, 1, sizeof(offset), f) != sizeof(offset))
return false;
return false;
fseek(f, startOffset+offset, SEEK_SET);
if (fread(&signature, 1, sizeof(signature), f) != sizeof(signature))
return false;
return false;
if (signature != 0x00004550)
return false;
return false;
/* Now read the PE file header and check that it is correct */
if (fread(filehdr, 1, sizeof(*filehdr), f) != sizeof(*filehdr))
return false;
return false;
if (filehdr->Machine != IMAGE_FILE_MACHINE_I386)
return false;
return false;
if (!(filehdr->Characteristics & IMAGE_FILE_32BIT_MACHINE))
return false;
return false;
if (!(filehdr->Characteristics & IMAGE_FILE_DLL))
return false;
return false;
if (fread(opthdr, 1, sizeof(*opthdr), f) != sizeof(*opthdr))
return false;
return false;
if (opthdr->Magic != 0x10B)
return false;
return false;
/* Success, so return true! */
return true;
@@ -138,15 +138,15 @@ ulong PEAPI PE_getFileSize(
/* Read the PE file headers from disk */
if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
return 0xFFFFFFFF;
return 0xFFFFFFFF;
/* Scan all the section headers summing up the total size */
size = opthdr.SizeOfHeaders;
for (i = 0; i < filehdr.NumberOfSections; i++) {
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
return 0xFFFFFFFF;
size += secthdr.SizeOfRawData;
}
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
return 0xFFFFFFFF;
size += secthdr.SizeOfRawData;
}
return size;
}
@@ -199,7 +199,7 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
/* Read the PE file headers from disk */
if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
return NULL;
return NULL;
/* Scan all the section headers and find the necessary sections */
text_off = data_off = reloc_off = export_off = 0;
@@ -208,56 +208,56 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
export_addr = export_size = export_end = 0;
reloc_size = 0;
for (i = 0; i < filehdr.NumberOfSections; i++) {
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
goto Error;
if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
/* Exports section */
export_off = secthdr.PointerToRawData;
export_addr = secthdr.VirtualAddress;
export_size = secthdr.SizeOfRawData;
export_end = export_addr + export_size;
}
else if (strcmp(secthdr.Name, ".idata") == 0) {
/* Imports section, ignore */
}
else if (strcmp(secthdr.Name, ".reloc") == 0) {
/* Relocations section */
reloc_off = secthdr.PointerToRawData;
reloc_size = secthdr.SizeOfRawData;
}
else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
/* Code section */
text_off = secthdr.PointerToRawData;
text_addr = secthdr.VirtualAddress;
text_size = secthdr.SizeOfRawData;
}
else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
/* Data section */
data_off = secthdr.PointerToRawData;
data_addr = secthdr.VirtualAddress;
data_size = secthdr.SizeOfRawData;
data_end = data_addr + data_size;
}
}
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
goto Error;
if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
/* Exports section */
export_off = secthdr.PointerToRawData;
export_addr = secthdr.VirtualAddress;
export_size = secthdr.SizeOfRawData;
export_end = export_addr + export_size;
}
else if (strcmp(secthdr.Name, ".idata") == 0) {
/* Imports section, ignore */
}
else if (strcmp(secthdr.Name, ".reloc") == 0) {
/* Relocations section */
reloc_off = secthdr.PointerToRawData;
reloc_size = secthdr.SizeOfRawData;
}
else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
/* Code section */
text_off = secthdr.PointerToRawData;
text_addr = secthdr.VirtualAddress;
text_size = secthdr.SizeOfRawData;
}
else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
/* Data section */
data_off = secthdr.PointerToRawData;
data_addr = secthdr.VirtualAddress;
data_size = secthdr.SizeOfRawData;
data_end = data_addr + data_size;
}
}
/* Check to make sure that we have all the sections we need */
if (!text_off || !data_off || !export_off || !reloc_off) {
result = PE_invalidDLLImage;
goto Error;
}
result = PE_invalidDLLImage;
goto Error;
}
/* Find the size of the image to load allocate memory for it */
image_size = MAX(export_end,data_end) - text_addr;
*size = sizeof(PE_MODULE) + image_size + 4096;
if (shared)
hMod = PM_mallocShared(*size);
hMod = PM_mallocShared(*size);
else
hMod = PM_malloc(*size);
hMod = PM_malloc(*size);
reloc = PM_malloc(reloc_size);
if (!hMod || !reloc) {
result = PE_outOfMemory;
goto Error;
}
result = PE_outOfMemory;
goto Error;
}
hMod->text = (uchar*)ROUND_4K((ulong)hMod + sizeof(PE_MODULE));
hMod->data = (uchar*)((ulong)hMod->text + (data_addr - text_addr));
@@ -272,48 +272,48 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
result = PE_invalidDLLImage;
fseek(f, startOffset+text_off, SEEK_SET);
if (fread(hMod->text, 1, text_size, f) != text_size)
goto Error;
goto Error;
fseek(f, startOffset+data_off, SEEK_SET);
if (fread(hMod->data, 1, data_size, f) != data_size)
goto Error;
goto Error;
fseek(f, startOffset+export_off, SEEK_SET);
if (fread(hMod->export, 1, export_size, f) != export_size)
goto Error;
goto Error;
fseek(f, startOffset+reloc_off, SEEK_SET);
if (fread(reloc, 1, reloc_size, f) != reloc_size)
goto Error;
goto Error;
/* Now perform relocations on all sections in the image */
delta = (ulong)hMod->text - opthdr.ImageBase - text_addr;
baseReloc = (BASE_RELOCATION*)reloc;
for (;;) {
/* Check for termination condition */
if (!baseReloc->PageRVA || !baseReloc->BlockSize)
break;
/* Check for termination condition */
if (!baseReloc->PageRVA || !baseReloc->BlockSize)
break;
/* Do fixups */
pageOffset = baseReloc->PageRVA - hMod->textBase;
numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
fixup = (ushort*)(baseReloc + 1);
for (i = 0; i < numFixups; i++) {
relocType = *fixup >> 12;
if (relocType) {
offset = pageOffset + (*fixup & 0x0FFF);
*(ulong*)(hMod->text + offset) += delta;
}
fixup++;
}
/* Do fixups */
pageOffset = baseReloc->PageRVA - hMod->textBase;
numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
fixup = (ushort*)(baseReloc + 1);
for (i = 0; i < numFixups; i++) {
relocType = *fixup >> 12;
if (relocType) {
offset = pageOffset + (*fixup & 0x0FFF);
*(ulong*)(hMod->text + offset) += delta;
}
fixup++;
}
/* Move to next relocation block */
baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
}
/* Move to next relocation block */
baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
}
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (InitLibC_t)PE_getProcAddress(hMod,"_InitLibC")) == NULL)
goto Error;
goto Error;
if (!InitLibC(&___imports,PM_getOSType()))
goto Error;
goto Error;
/* Clean up, close the file and return the loaded module handle */
PM_free(reloc);
@@ -322,9 +322,9 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
Error:
if (shared)
PM_freeShared(hMod);
PM_freeShared(hMod);
else
PM_free(hMod);
PM_free(hMod);
PM_free(reloc);
return NULL;
}
@@ -360,53 +360,53 @@ PE_MODULE * PEAPI PE_loadLibrary(
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (!shared) {
PM_MODULE hInst;
InitLibC_t InitLibC;
PM_MODULE hInst;
InitLibC_t InitLibC;
/* For Win32 if are building checked libraries for debugging, we use
* the real Win32 DLL functions so that we can debug the resulting DLL
* files with the Win32 debuggers. Note that we can't do this if
* we need to load the files into a shared memory context.
*/
if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
result = PE_fileNotFound;
return NULL;
}
/* For Win32 if are building checked libraries for debugging, we use
* the real Win32 DLL functions so that we can debug the resulting DLL
* files with the Win32 debuggers. Note that we can't do this if
* we need to load the files into a shared memory context.
*/
if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
result = PE_fileNotFound;
return NULL;
}
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
return NULL;
if (!InitLibC(&___imports,PM_getOSType()))
return NULL;
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
return NULL;
if (!InitLibC(&___imports,PM_getOSType()))
return NULL;
/* Allocate the PE_MODULE structure */
if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
return NULL;
hMod->text = (void*)hInst;
hMod->shared = -1;
/* Allocate the PE_MODULE structure */
if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
return NULL;
hMod->text = (void*)hInst;
hMod->shared = -1;
/* DLL loaded successfully so return module handle */
result = PE_ok;
return hMod;
}
/* DLL loaded successfully so return module handle */
result = PE_ok;
return hMod;
}
else
#endif
{
FILE *f;
ulong size;
{
FILE *f;
ulong size;
/* Attempt to open the file on disk */
if (shared < 0)
shared = 0;
if ((f = fopen(szDLLName,"rb")) == NULL) {
result = PE_fileNotFound;
return NULL;
}
hMod = PE_loadLibraryExt(f,0,&size,shared);
fclose(f);
return hMod;
}
/* Attempt to open the file on disk */
if (shared < 0)
shared = 0;
if ((f = fopen(szDLLName,"rb")) == NULL) {
result = PE_fileNotFound;
return NULL;
}
hMod = PE_loadLibraryExt(f,0,&size,shared);
fclose(f);
return hMod;
}
}
/****************************************************************************
@@ -445,14 +445,14 @@ PE_MODULE * PEAPI PE_loadLibraryMGL(
*/
#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
if (getenv("MGL_ROOT")) {
strcpy(path,getenv("MGL_ROOT"));
PM_backslash(path);
}
strcpy(path,getenv("MGL_ROOT"));
PM_backslash(path);
}
strcat(path,"drivers");
PM_backslash(path);
strcat(path,szDLLName);
if ((hMod = PE_loadLibrary(path,shared)) != NULL)
return hMod;
return hMod;
#endif
strcpy(path,"drivers");
PM_backslash(path);
@@ -488,39 +488,39 @@ void * PEAPI PE_getProcAddress(
{
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (hModule->shared == -1)
return (void*)PM_getProcAddress(hModule->text,szProcName);
return (void*)PM_getProcAddress(hModule->text,szProcName);
else
#endif
{
uint i;
EXPORT_DIRECTORY *exports;
ulong funcOffset;
ulong *AddressTable;
ulong *NameTable;
ushort *OrdinalTable;
char *name;
{
uint i;
EXPORT_DIRECTORY *exports;
ulong funcOffset;
ulong *AddressTable;
ulong *NameTable;
ushort *OrdinalTable;
char *name;
/* Find the address of the export tables from the export section */
if (!hModule)
return NULL;
exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
/* Find the address of the export tables from the export section */
if (!hModule)
return NULL;
exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
/* Search the export name table to find the function name */
for (i = 0; i < exports->NumberOfNamePointers; i++) {
name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
if (strcmp(name,szProcName) == 0)
break;
}
if (i == exports->NumberOfNamePointers)
return NULL;
funcOffset = AddressTable[OrdinalTable[i]];
if (!funcOffset)
return NULL;
return (void*)(hModule->text + funcOffset - hModule->textBase);
}
/* Search the export name table to find the function name */
for (i = 0; i < exports->NumberOfNamePointers; i++) {
name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
if (strcmp(name,szProcName) == 0)
break;
}
if (i == exports->NumberOfNamePointers)
return NULL;
funcOffset = AddressTable[OrdinalTable[i]];
if (!funcOffset)
return NULL;
return (void*)(hModule->text + funcOffset - hModule->textBase);
}
}
/****************************************************************************
@@ -546,25 +546,25 @@ void PEAPI PE_freeLibrary(
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (hModule->shared == -1) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
TerminateLibC();
PM_freeLibrary(hModule->text);
PM_free(hModule);
}
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
TerminateLibC();
PM_freeLibrary(hModule->text);
PM_free(hModule);
}
else
#endif
{
if (hModule) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
TerminateLibC();
if (hModule->shared)
PM_freeShared(hModule);
else
PM_free(hModule);
}
}
{
if (hModule) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
TerminateLibC();
if (hModule->shared)
PM_freeShared(hModule);
else
PM_free(hModule);
}
}
}
/****************************************************************************
@@ -584,4 +584,3 @@ int PEAPI PE_getError(void)
{
return result;
}

View File

@@ -73,10 +73,10 @@ void VBEAPI VBE_init(void)
****************************************************************************/
{
if (!state->VESABuf_ptr) {
/* Allocate a global buffer for communicating with the VESA VBE */
if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
}
/* Allocate a global buffer for communicating with the VESA VBE */
if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
}
}
void * VBEAPI VBE_getRMBuf(uint *len,uint *rseg,uint *roff)
@@ -129,7 +129,7 @@ void VBEAPI VBE_callESDI(RMREGS *regs, void *buffer, int size)
RMSREGS sregs;
if (!state->VESABuf_ptr)
PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
sregs.es = (ushort)state->VESABuf_rseg;
regs->x.di = (ushort)state->VESABuf_roff;
memcpy(state->VESABuf_ptr, buffer, size);
@@ -157,7 +157,7 @@ static char *VBE_copyStrToLocal(char *p,char *realPtr,char *max)
v = PM_mapRealPointer((uint)((ulong)realPtr >> 16), (uint)((ulong)realPtr & 0xFFFF));
while (*v != 0 && p < max)
*p++ = *v++;
*p++ = *v++;
*p++ = 0;
return p;
}
@@ -178,7 +178,7 @@ static void VBE_copyShortToLocal(ushort *p,ushort *realPtr)
v = PM_mapRealPointer((uint)((ulong)realPtr >> 16),(uint)((ulong)realPtr & 0xFFFF));
while (*v != 0xFFFF)
*p++ = *v++;
*p++ = *v++;
*p = 0xFFFF;
}
#endif
@@ -200,26 +200,26 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
regs.x.ax = 0x4F00; /* Get SuperVGA information */
if (forceUniVBE) {
regs.x.bx = 0x1234;
regs.x.cx = 0x4321;
}
regs.x.bx = 0x1234;
regs.x.cx = 0x4321;
}
else {
regs.x.bx = 0;
regs.x.cx = 0;
}
regs.x.bx = 0;
regs.x.cx = 0;
}
strncpy(vgaInfo->VESASignature,"VBE2",4);
VBE_callESDI(&regs, vgaInfo, sizeof(*vgaInfo));
if (regs.x.ax != VBE_SUCCESS)
return 0;
return 0;
if (strncmp(vgaInfo->VESASignature,"VESA",4) != 0)
return 0;
return 0;
/* Check for bogus BIOSes that return a VBE version number that is
* not correct, and fix it up. We also check the OemVendorNamePtr for a
* valid value, and if it is invalid then we also reset to VBE 1.2.
*/
if (vgaInfo->VESAVersion >= 0x200 && vgaInfo->OemVendorNamePtr == 0)
vgaInfo->VESAVersion = 0x102;
vgaInfo->VESAVersion = 0x102;
#ifndef REALMODE
/* Relocate all the indirect information (mode tables, OEM strings
* etc) from the low 1Mb memory region into a static buffer in
@@ -227,23 +227,23 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
* from mapping the strings from real mode to protected mode.
*/
{
char *p,*p2;
char *p,*p2;
p2 = VBE_copyStrToLocal(localBuf,vgaInfo->OemStringPtr,MAX_LOCAL_BUF);
vgaInfo->OemStringPtr = localBuf;
if (vgaInfo->VESAVersion >= 0x200) {
p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemVendorNamePtr = p2;
p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemProductNamePtr = p;
p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
vgaInfo->OemProductRevPtr = p2;
VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p;
}
p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemVendorNamePtr = p2;
p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemProductNamePtr = p;
p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
vgaInfo->OemProductRevPtr = p2;
VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p;
}
else {
VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p2;
}
VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p2;
}
}
#endif
state->VBEMemory = vgaInfo->TotalMemory * 64;
@@ -253,17 +253,17 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
*/
haveRiva128 = false;
if (vgaInfo->VESAVersion >= 0x300 &&
(strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
haveRiva128 = true;
}
(strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
haveRiva128 = true;
}
/* Check for Matrox G400 cards which claim to be VBE 3.0
* compliant yet they don't implement the refresh rate control
* functions.
*/
if (vgaInfo->VESAVersion >= 0x300 && (strcmp(vgaInfo->OemProductNamePtr,"Matrox G400") == 0))
vgaInfo->VESAVersion = 0x200;
vgaInfo->VESAVersion = 0x200;
return (state->VBEVersion = vgaInfo->VESAVersion);
}
@@ -305,70 +305,70 @@ ibool VBEAPI VBE_getModeInfo(int mode,VBE_modeInfo *modeInfo)
regs.x.cx = (ushort)mode;
VBE_callESDI(&regs, modeInfo, sizeof(*modeInfo));
if (regs.x.ax != VBE_SUCCESS)
return false;
return false;
if ((modeInfo->ModeAttributes & vbeMdAvailable) == 0)
return false;
return false;
/* Map out triple buffer and stereo flags for NVidia Riva128
* chips.
*/
if (haveRiva128) {
modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
modeInfo->ModeAttributes &= ~vbeMdStereo;
}
modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
modeInfo->ModeAttributes &= ~vbeMdStereo;
}
/* Support old style RGB definitions for VBE 1.1 BIOSes */
bits = modeInfo->BitsPerPixel;
if (modeInfo->MemoryModel == vbeMemPK && bits > 8) {
modeInfo->MemoryModel = vbeMemRGB;
switch (bits) {
case 15:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 10;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
break;
case 16:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 11;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
case 24:
modeInfo->RedMaskSize = 8;
modeInfo->RedFieldPosition = 16;
modeInfo->GreenMaskSize = 8;
modeInfo->GreenFieldPosition = 8;
modeInfo->BlueMaskSize = 8;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
}
}
modeInfo->MemoryModel = vbeMemRGB;
switch (bits) {
case 15:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 10;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
break;
case 16:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 11;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
case 24:
modeInfo->RedMaskSize = 8;
modeInfo->RedFieldPosition = 16;
modeInfo->GreenMaskSize = 8;
modeInfo->GreenFieldPosition = 8;
modeInfo->BlueMaskSize = 8;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
}
}
/* Convert the 32k direct color modes of VBE 1.2+ BIOSes to
* be recognised as 15 bits per pixel modes.
*/
if (bits == 16 && modeInfo->RsvdMaskSize == 1)
modeInfo->BitsPerPixel = 15;
modeInfo->BitsPerPixel = 15;
/* Fix up bogus BIOS'es that report incorrect reserved pixel masks
* for 32K color modes. Quite a number of BIOS'es have this problem,
* and this affects our OS/2 drivers in VBE fallback mode.
*/
if (bits == 15 && (modeInfo->RsvdMaskSize != 1 || modeInfo->RsvdFieldPosition != 15)) {
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
}
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
}
return true;
}
@@ -391,20 +391,20 @@ long VBEAPI VBE_getPageSize(VBE_modeInfo *mi)
size = (long)mi->BytesPerScanLine * (long)mi->YResolution;
if (mi->BitsPerPixel == 4) {
/* We have a 16 color video mode, so round up the page size to
* 8k, 16k, 32k or 64k boundaries depending on how large it is.
*/
/* We have a 16 color video mode, so round up the page size to
* 8k, 16k, 32k or 64k boundaries depending on how large it is.
*/
size = (size + 0x1FFFL) & 0xFFFFE000L;
if (size != 0x2000) {
size = (size + 0x3FFFL) & 0xFFFFC000L;
if (size != 0x4000) {
size = (size + 0x7FFFL) & 0xFFFF8000L;
if (size != 0x8000)
size = (size + 0xFFFFL) & 0xFFFF0000L;
}
}
}
size = (size + 0x1FFFL) & 0xFFFFE000L;
if (size != 0x2000) {
size = (size + 0x3FFFL) & 0xFFFFC000L;
if (size != 0x4000) {
size = (size + 0x7FFFL) & 0xFFFF8000L;
if (size != 0x8000)
size = (size + 0xFFFFL) & 0xFFFF0000L;
}
}
}
else size = (size + 0xFFFFL) & 0xFFFF0000L;
return size;
}
@@ -425,26 +425,26 @@ ibool VBEAPI VBE_setVideoModeExt(int mode,VBE_CRTCInfo *crtc)
RMREGS regs;
if (state->VBEVersion < 0x200 && mode < 0x100) {
/* Some VBE implementations barf terribly if you try to set non-VBE
* video modes with the VBE set mode call. VBE 2.0 implementations
* must be able to handle this.
*/
regs.h.al = (ushort)mode;
regs.h.ah = 0;
PM_int86(0x10,&regs,&regs);
}
/* Some VBE implementations barf terribly if you try to set non-VBE
* video modes with the VBE set mode call. VBE 2.0 implementations
* must be able to handle this.
*/
regs.h.al = (ushort)mode;
regs.h.ah = 0;
PM_int86(0x10,&regs,&regs);
}
else {
if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
return false;
regs.x.ax = 0x4F02;
regs.x.bx = (ushort)mode;
if ((mode & vbeRefreshCtrl) && crtc)
VBE_callESDI(&regs, crtc, sizeof(*crtc));
else
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return false;
}
if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
return false;
regs.x.ax = 0x4F02;
regs.x.bx = (ushort)mode;
if ((mode & vbeRefreshCtrl) && crtc)
VBE_callESDI(&regs, crtc, sizeof(*crtc));
else
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return false;
}
return true;
}
@@ -475,7 +475,7 @@ int VBEAPI VBE_getVideoMode(void)
regs.x.ax = 0x4F03;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.x.bx;
}
@@ -515,7 +515,7 @@ int VBEAPI VBE_getBank(int window)
regs.h.bl = window;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.x.dx;
}
@@ -637,7 +637,7 @@ ibool VBEAPI VBE_setDisplayStart(int x,int y,ibool waitVRT)
regs.x.ax = 0x4F07;
if (waitVRT)
regs.x.bx = 0x80;
regs.x.bx = 0x80;
else regs.x.bx = 0x00;
regs.x.cx = x;
regs.x.dx = y;
@@ -685,12 +685,12 @@ ibool VBEAPI VBE_setDisplayStartAlt(ulong startAddr,ibool waitVRT)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x82 : 0x02;
regs.e.ecx = startAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x82 : 0x02;
regs.e.ecx = startAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -712,12 +712,12 @@ int VBEAPI VBE_getDisplayStartStatus(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0004;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return (regs.x.cx != 0);
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0004;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return (regs.x.cx != 0);
}
return -1;
}
@@ -738,11 +738,11 @@ ibool VBEAPI VBE_enableStereoMode(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0005;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0005;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -762,11 +762,11 @@ ibool VBEAPI VBE_disableStereoMode(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0006;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0006;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -793,13 +793,13 @@ ibool VBEAPI VBE_setStereoDisplayStart(ulong leftAddr,ulong rightAddr,
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x83 : 0x03;
regs.e.ecx = leftAddr;
regs.e.edx = rightAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x83 : 0x03;
regs.e.ecx = leftAddr;
regs.e.edx = rightAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@@ -832,14 +832,14 @@ ulong VBEAPI VBE_getClosestClock(ushort mode,ulong pixelClock)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F0B;
regs.h.bl = 0x00;
regs.e.ecx = pixelClock;
regs.x.dx = mode;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return regs.e.ecx;
}
regs.x.ax = 0x4F0B;
regs.h.bl = 0x00;
regs.e.ecx = pixelClock;
regs.x.dx = mode;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return regs.e.ecx;
}
return -1;
}
@@ -875,7 +875,7 @@ int VBEAPI VBE_getDACWidth(void)
regs.h.bl = 0x01;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.h.bh;
}
@@ -927,11 +927,11 @@ void * VBEAPI VBE_getBankedPointer(VBE_modeInfo *modeInfo)
*/
ulong seg = (ushort)modeInfo->WinASegment;
if (seg != 0) {
if (seg == 0xA000)
return (void*)PM_getA0000Pointer();
else
return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
}
if (seg == 0xA000)
return (void*)PM_getA0000Pointer();
else
return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
}
return NULL;
}
@@ -956,14 +956,14 @@ void * VBEAPI VBE_getLinearPointer(VBE_modeInfo *modeInfo)
/* Search for an already mapped pointer */
for (i = 0; i < numPtrs; i++) {
if (physPtr[i] == modeInfo->PhysBasePtr)
return linPtr[i];
}
if (physPtr[i] == modeInfo->PhysBasePtr)
return linPtr[i];
}
if (numPtrs < MAX_LIN_PTRS) {
physPtr[numPtrs] = modeInfo->PhysBasePtr;
linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
return linPtr[numPtrs++];
}
physPtr[numPtrs] = modeInfo->PhysBasePtr;
linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
return linPtr[numPtrs++];
}
return NULL;
}
@@ -989,56 +989,56 @@ static void InitPMCode(void)
int pmLen;
if (!state->pmInfo && state->VBEVersion >= 0x200) {
regs.x.ax = 0x4F0A;
regs.x.bx = 0;
PM_int86x(0x10,&regs,&regs,&sregs);
if (regs.x.ax != VBE_SUCCESS)
return;
if (VBE_shared)
state->pmInfo = PM_mallocShared(regs.x.cx);
else
state->pmInfo = PM_malloc(regs.x.cx);
if (state->pmInfo == NULL)
return;
state->pmInfo32 = state->pmInfo;
pmLen = regs.x.cx;
regs.x.ax = 0x4F0A;
regs.x.bx = 0;
PM_int86x(0x10,&regs,&regs,&sregs);
if (regs.x.ax != VBE_SUCCESS)
return;
if (VBE_shared)
state->pmInfo = PM_mallocShared(regs.x.cx);
else
state->pmInfo = PM_malloc(regs.x.cx);
if (state->pmInfo == NULL)
return;
state->pmInfo32 = state->pmInfo;
pmLen = regs.x.cx;
/* Relocate the block into our local data segment */
code = PM_mapRealPointer(sregs.es,regs.x.di);
memcpy(state->pmInfo,code,pmLen);
/* Relocate the block into our local data segment */
code = PM_mapRealPointer(sregs.es,regs.x.di);
memcpy(state->pmInfo,code,pmLen);
/* Now do a sanity check on the information we recieve to ensure
* that is is correct. Some BIOS return totally bogus information
* in here (Matrox is one)! Under DOS this works OK, but under OS/2
* we are screwed.
*/
if (state->pmInfo->setWindow >= pmLen ||
state->pmInfo->setDisplayStart >= pmLen ||
state->pmInfo->setPalette >= pmLen ||
state->pmInfo->IOPrivInfo >= pmLen) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo32 = state->pmInfo = NULL;
return;
}
/* Now do a sanity check on the information we recieve to ensure
* that is is correct. Some BIOS return totally bogus information
* in here (Matrox is one)! Under DOS this works OK, but under OS/2
* we are screwed.
*/
if (state->pmInfo->setWindow >= pmLen ||
state->pmInfo->setDisplayStart >= pmLen ||
state->pmInfo->setPalette >= pmLen ||
state->pmInfo->IOPrivInfo >= pmLen) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo32 = state->pmInfo = NULL;
return;
}
/* Read the IO priveledge info and determine if we need to
* pass a selector to MMIO registers to the bank switch code.
* Since we no longer support selector allocation, we no longer
* support this mechanism so we disable the protected mode
* interface in this case.
*/
if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
while (*p != 0xFFFF)
p++;
p++;
if (*p != 0xFFFF)
VBE_freePMCode();
}
}
/* Read the IO priveledge info and determine if we need to
* pass a selector to MMIO registers to the bank switch code.
* Since we no longer support selector allocation, we no longer
* support this mechanism so we disable the protected mode
* interface in this case.
*/
if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
while (*p != 0xFFFF)
p++;
p++;
if (*p != 0xFFFF)
VBE_freePMCode();
}
}
}
void * VBEAPI VBE_getSetBank(void)
@@ -1050,10 +1050,10 @@ void * VBEAPI VBE_getSetBank(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setWindow;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setWindow;
}
return NULL;
}
@@ -1066,10 +1066,10 @@ void * VBEAPI VBE_getSetDisplayStart(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
}
return NULL;
}
@@ -1082,10 +1082,10 @@ void * VBEAPI VBE_getSetPalette(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setPalette;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setPalette;
}
return NULL;
}
@@ -1104,13 +1104,13 @@ void VBEAPI VBE_freePMCode(void)
****************************************************************************/
{
if (state->pmInfo) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo = NULL;
state->pmInfo32 = NULL;
}
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo = NULL;
state->pmInfo32 = NULL;
}
}
void VBEAPI VBE_sharePMCode(void)
@@ -1183,31 +1183,31 @@ ibool VBEAPI VBE_getBankFunc32(int *codeLen,void **bankFunc,int dualBanks,
InitPMCode();
if (state->VBEVersion >= 0x200 && state->pmInfo32 && !state->MMIOSel) {
code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
len = state->pmInfo32->setWindowLen-1;
else {
/* We are running on a system without the UniVBE 5.2 extension.
* We do as best we can by scanning through the code for the
* ret function to determine the length. This is not foolproof,
* but is the best we can do.
*/
p = code;
while (*p != 0xC3)
p++;
len = p - code;
}
if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
PM_fatalError("32-bit bank switch function too long!");
copy(p,bankFunc32,VBE20A_bankFunc32_Start);
memcpy(p,code,len);
p += len;
copy(p,p,VBE20_bankFunc32_End);
*codeLen = p - bankFunc32;
bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
*bankFunc = bankFunc32;
return true;
}
code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
len = state->pmInfo32->setWindowLen-1;
else {
/* We are running on a system without the UniVBE 5.2 extension.
* We do as best we can by scanning through the code for the
* ret function to determine the length. This is not foolproof,
* but is the best we can do.
*/
p = code;
while (*p != 0xC3)
p++;
len = p - code;
}
if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
PM_fatalError("32-bit bank switch function too long!");
copy(p,bankFunc32,VBE20A_bankFunc32_Start);
memcpy(p,code,len);
p += len;
copy(p,p,VBE20_bankFunc32_End);
*codeLen = p - bankFunc32;
bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
*bankFunc = bankFunc32;
return true;
}
return false;
}

View File

@@ -64,8 +64,8 @@ Initialise the counter and return the frequency of the counter.
static void GetCounterFrequency(
CPU_largeInteger *freq)
{
// TODO: Return the frequency of the counter in here. You should try to
// normalise this value to be around 100,000 ticks per second.
/* TODO: Return the frequency of the counter in here. You should try to */
/* normalise this value to be around 100,000 ticks per second. */
freq->low = 1000000;
freq->high = 0;
}

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