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Author SHA1 Message Date
Wolfgang Denk
180a90abda Release v1.3.3
Update CHANGELOG for release.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-19 12:47:11 +02:00
Wolfgang Denk
a734c06bf7 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-05-19 09:42:38 +02:00
Stefan Roese
16bedc661d ppc4xx: Canyonlands: Disable PCIe0/SATA in dev-tree depending on selection
When SATA is selected (via jumper J6) we need to disable the first PCIe
node in the device tree, so that Linux doesn't initialize it. Otherwise
the Linux SATA driver will fail to detect the devices.

The same goes the other way around too. So if PCIe is selected we need
to disable the SATA node in the device tree.

This is because PCIe port 0 and SATA on 460EX share the same pins
(multiplexed) and we have to configure in U-Boot which peripheral is
enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-19 07:14:38 +02:00
Jean-Christophe PLAGNIOL-VILLARD
3cc27b426a i386: Fix multiple definitions of __show_boot_progress
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-19 00:59:20 +02:00
Jean-Christophe PLAGNIOL-VILLARD
311f344693 sc530_spunk: add missing SOBJS entry
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-19 00:57:39 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a559317143 sc520_spunk: Fix flash
flash.c:593: warning: dereferencing type-punned pointer will break strict-aliasing rules
flash.c:398: error: label at end of compound statement

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-19 00:56:49 +02:00
Jean-Christophe PLAGNIOL-VILLARD
91f221317a drivers/pcmcia: add missing i82365
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-19 00:40:08 +02:00
Jean-Christophe PLAGNIOL-VILLARD
dd22394413 i386/bootm: remove unused var
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-19 00:37:26 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a9da341df1 example/gitignore: update with all generated examples
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-19 00:29:35 +02:00
Wolfgang Denk
a38dc3ea86 TQM8272: fix out-of-tree building
...and add to MAKEALL script

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-15 00:42:45 +02:00
Wolfgang Denk
4f805c1e3a environment: fix bug introduced by commit a8409f4f1a
env_get_char is not a function, but a pointer to one.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-14 23:36:10 +02:00
Wolfgang Denk
35fca4c44d Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-05-14 14:05:49 +02:00
Wolfgang Denk
cda2a4a996 Fix config files for out-of-tree building
Several board/<...>/config.mk files include dynamically built (by
the Makefile) config files but used the wrong file name of
	$(TOPDIR)/board/$(BOARDDIR)/config.tmp
instead if the correct
	$(OBJTREE)/board/$(BOARDDIR)/config.tmp

The bug is nasty because the build result is correct for the (normal)
in-tree builds, and because 'sinclude' is used no errors get raised
even for out-of-tree build tests. But out-of-tree builds use an
incomplete and thus usually incorrect configuration...

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-14 14:02:14 +02:00
Stefan Roese
2dd7082e06 ppc4xx: Fix bogus Canyonlands config.mk
This patch fixes the canyonlands config.mk file to enable correct
out-of-tree builds. Thanks to Wolfgang Denk for spotting this.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-14 13:40:03 +02:00
Stefan Roese
fdd1247a66 ppc4xx: Individual handling of ddr2_fixed.c for canyonlands_nand build
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-14 12:26:16 +02:00
Wolfgang Denk
a8409f4f1a environment: cleanup prototype declarations of env functions.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-14 12:22:49 +02:00
Wolfgang Denk
cf39b07948 linkstation_HGLAN: Fix out of tree building.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-14 12:21:48 +02:00
Stefan Roese
085551c05c ppc4xx: Individual handling of ddr2_fixed.c for canyonlands_nand build
Canyonlands has a file ddr2_fixed.c which needs special treatment when
building in separate directory. It has to be linked to build directory
otherwise it is not seen.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-14 10:32:32 +02:00
Wolfgang Denk
1510b82d50 Makefile: fix "error: version_autogenerated.h: No such file or directory"
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-13 23:15:52 +02:00
Stefan Roese
70fab1908f ppc4xx: Add 405EX(r) revision C PVR definitions and detection code
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-13 20:22:01 +02:00
Wolfgang Denk
65dcfa7920 Revert "pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option"
This reverts commit 55774b512f
which broke many PowerPC boards.
2008-05-12 01:11:21 +02:00
Wolfgang Denk
5ddd67efa5 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-05-12 01:02:40 +02:00
Wolfgang Denk
ee0cfa7080 Revert "Avoid initrd and logbuffer area overlaps"
This reverts commit 1b5605ca57
which breaks building on all PPC boards that don't use a log buffer.
2008-05-12 00:56:28 +02:00
Nick Spence
02b9b22446 Fix offset calculation for multi-type legacy images.
Calculation of tail was incorrect when size % 4 == 0.

New code removes the conditional and does the same thing but with arithmetic

Signed-off-by: Nick Spence <nick.spence@freescale.com>
2008-05-12 00:44:24 +02:00
Wolfgang Denk
c9dca3c3f3 Revert "Change env_get_char from a global function ptr to a function."
This reverts commit c0559be371
which is known to break booting from dataflash and NAND.
2008-05-12 00:40:58 +02:00
Jean-Christophe PLAGNIOL-VILLARD
20e5ed1374 API: remove duplicate syscall check
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-12 00:23:58 +02:00
Markus Klotzbücher
79dd171268 ppc4xx: Kilauea: Add CONFIG_BOOTP_SUBNETMASK to Kilauea board config
When using dhcp/bootp the "netmask" environment variable is not set
because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is
desireable, so the following patch adds this this option to the board
config.

Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-10 10:37:37 +02:00
Stefan Roese
869d14b4cc ppc4xx: Update Makalu defconfig to use device-tree booting as default
This patch reworks the default environment on Makalu. Now "net_nfs" for
example uses the device-tree style booting formerly know as "net_nfs_fdt".
Also the addresses in RAM were changed because of the new image booting
support, which check for image overwriting. So the addresses needed to
get adjusted.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-10 10:30:36 +02:00
Becky Bruce
f3612a7b19 PPC: fix map_physmem build warning
map_physmem currently generates a warning when CONFIG_PHYS_64BIT is
enabled.  This quiets the warning.

Signed-off-by: Becky Bruce <Becky.Bruce@freescale.com>
2008-05-10 01:00:37 +02:00
Becky Bruce
36f32675f4 Update pci code to use phys_addr_t
Physical addrs need to be represented by phys_addr_t, not
unsigned long.  Otherwise, systems that use CONFIG_PHYS_64BIT
are going to fail mightily.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-05-10 00:59:57 +02:00
Nick Spence
91a616741f Support legacy multi-type images without FDT section.
This patch enables legacy multi-type images containing only a Linux kernel
and root file system to be loaded, maintaining compatibility with previous
versions of u-boot.

This is required when using old image files such as a Linux 2.4 kernel /
filesystem.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
2008-05-10 00:38:55 +02:00
Wolfgang Denk
881031d973 Update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-10 00:38:02 +02:00
Wolfgang Denk
e5e9d6c9c0 post/cpu/ppc4xx/Makefile: line length cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-10 00:36:09 +02:00
Wolfgang Denk
cfd60441d8 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-05-10 00:34:05 +02:00
Stelian Pop
cce9cfdabc Fix @ -> <at> substitution
When applying the AT91CAP9 patches upstream, something transformed
the '@' character into the ' <at> ' sequence.

The patch below restores the original form in all the places where
it has been modified (the AT91CAP9 files, the AT91SAM9260 files which
were copied from AT91CAP9, and a couple of other files where the
' <at> ' sequence was present).

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-05-10 00:30:22 +02:00
Stelian Pop
9606b3c81b Update origin and copyright information in arch-at91sam9 header files
When doing the AT91CAP9/AT91SAM9 port, a number of header files were
copied from the Linux kernel sources. This patch explicitly specifies
this origin for all the copied headers, and for those missing copyright
information, adds it.

Additionaly, the header file 'at91sam926x_mc.h' has been superceeded
in the latest kernel sources by 'at91sam9_smc.h'.

The copyright information has been confirmed by the AT91 Linux kernel
maintainer, Andrew Victor <avictor.za@gmail.com>.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-05-10 00:28:51 +02:00
Stelian Pop
ceb6b4fbe1 Add copyright information in Atmel boards partition.c
When Ulf did the dataflash.c cleanup, he didn't add his copyright on
the new created files. This patch fixes the problem.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-05-10 00:24:02 +02:00
Guennadi Liakhovetski
2ab02fd456 mx31ads: fix 32kHz clock handling
According to schematics and to RedBoot sources, the MX31ADS uses a 32768Hz
oscillator as a SKIL source. Fix previously wrongly assumed 32000Hz value.
Also fix a typo when verifying a jumper configuration. While at it, make
two needlessly global functions static.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-05-10 00:21:43 +02:00
Wolfgang Denk
f3f3175746 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-05-10 00:18:22 +02:00
Marian Balakowicz
1b5605ca57 Avoid initrd and logbuffer area overlaps
Add logbuffer to reserved LMB areas to prevent initrd allocation
from overlaping with it.

Make sure to use correct logbuffer base address.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-05-10 00:16:13 +02:00
Marian Balakowicz
c59518e159 ppc: Cleanup get_effective_memsize() use
Removed duplicated effective memory size calculation code.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-05-10 00:14:33 +02:00
Marian Balakowicz
273c37d843 Fix build errors when CONFIG_LOGBUFFER and CONFIG_FIT are enabled
Recent modifcations to LOGBUFFER handling code were incorrecly
introduced to fit_check_kernel() routine during
"Merge branch 'new-image' of git://www.denx.de/git/u-boot-testing",
commit 27f33e9f45.

This patch cleans up this merge issue.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-05-10 00:11:25 +02:00
Grant Erickson
bc11756daf Propagate Error Status to the Shell on fw_printenv Errors
Changed implementation such that fw_printenv returns failure status
when one or more specified variables do not exist or when incorrect
command syntax is used.

This aids scripting fw_printenv such that the script can key of the
return status rather than relying on standard error "scraping".

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-09 23:40:40 +02:00
Grant Erickson
f3b6d528e4 Fix Compilation Errors with 'tools/env/fw_printenv'
In the current top-of-tree, 1.3.3.-rc2, the optional tool
'tools/env/fw_printenv' fails to compile for two reasons:

1) The header watchdog.h cannot be found.
2) The header zlib.h is picked up from the tool chain rather than the
   project causing a prototype conflict for crc32.

This patch addresses both of these issues.

Platforms Tested On:
- AMCC "Kilauea"

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-05-09 23:04:41 +02:00
Wolfgang Denk
7ea8325b41 Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-05-09 22:19:29 +02:00
Wolfgang Denk
4604f552a9 Merge branch 'master' of /home/wd/git/u-boot/master/ 2008-05-09 22:19:16 +02:00
Wolfgang Denk
356cd17cc2 Merge branch 'master' of /home/wd/git/u-boot/master/ 2008-05-09 22:18:58 +02:00
James Yang
597f6c26a1 Fix readline_into_buffer() with CONFIG_CMDLINE_EDITING before relocating
When CONFIG_CMDLINE_EDITING is enabled, readline_into_buffer() doesn't
work before relocating to RAM because command history is written into
a global array that is not writable before relocation.  This patch
defers to the no-editing and no-history code in readline_into_buffer()
if it is called before relocation.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-05-09 22:18:15 +02:00
Detlev Zundel
726c0f1e5f cosmetic: Adjust coding style for switch statements to be consistent
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-05-09 21:26:38 +02:00
Detlev Zundel
574b319512 Fix disk type output in disk/part.c
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-05-09 21:26:34 +02:00
Vlad Lungu
045b4d2d71 Mail address change, documentation modified
Signed-off-by: Vlad Lungu <vlad.lungu@windrvier.com>
2008-05-09 21:13:26 +02:00
Michal Simek
4d49b28038 microblaze: Repare intc handling
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-05-09 21:11:02 +02:00
Jean-Christophe PLAGNIOL-VILLARD
878b3b1e19 include/gitignore: update to all architectures
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-09 20:59:21 +02:00
Marcel Ziswiler
1df368aed3 ide: Remove spurious second include of io.h
Removed the second include, with all the #ifdef around as suggested by Wolfgang.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-05-09 20:55:57 +02:00
Adrian Filipi
8fbc985bda Fix some typos
This patch fixes three typos.
The first is a repetition of CONFIG_CMD_BSP.
The second makes the #endif comment match its #if.
The third is a spelling error.

Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
2008-05-09 20:53:52 +02:00
Grant Erickson
e419e12d04 Recognize 'powerpc' As an Alias for IH_ARCH_PPC
Add support for the recognition of 'powerpc' as an alias for the PowerPC
architecture type since Linux is already trending in that direction,
preferring 'powerpc' to 'ppc'.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
2008-05-09 20:48:16 +02:00
Wheatley Travis
f5a2425919 7450 and 86xx L2 cache invalidate bug corrections
The 7610 and related parts have an L2IP bit in the L2CR that is
monitored to signal when the L2 cache invalidate is complete whereas the
7450 and related parts utilize L2I for this purpose. However, the
current code does not account for this difference. Additionally the 86xx
L2 cache invalidate code used an "andi" instruction where an "andis"
instruction should have been used.

This patch addresses both of these bugs.

Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
Acked-By: Jon Loeliger <jdl@freescale.com>
2008-05-09 20:46:48 +02:00
Wolfgang Denk
4d31cdc45d Avoid infinite loop "Generating include/autoconf.mk"
Fix a bogus circular dependency that caused an infinite loop of
"Generating include/autoconf.mk" again and again.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-09 10:16:13 +02:00
Stefan Roese
ef2642625c ppc4xx: Kilauea: Fix incorrect FPGA FIFO address
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 11:10:46 +02:00
Stefan Roese
a00eccfebc ppc4xx: Add fdt support to all remaining AMCC PPC4xx eval boards
This patch adds fdt (flattened device tree) support to all remaining AMCC
eval boards. Most newer boards already support device tree. With this patch,
all AMCC boards now enable device tree passing from U-Boot to Linux
arch/powerpc kernels.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 11:05:15 +02:00
Stefan Roese
cb5d88b961 ppc4xx: Add weak default ft_board_setup() routine
This patch adds a default ft_board_setup() routine to the 4xx fdt code.
This routine is defined as weak and can be overwritten by a board specific
one if needed.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 11:01:09 +02:00
Stefan Roese
d1c1ba85c7 ppc4xx: acadia: Add fdt support and fix section overlap problem
This patch adds fdt (flattened device tree) support to the AMCC
Acadia eval board. This increases the image size and it doesn't
fit anymore into 256kByte. Since we didn't want to remove features
from the configuration, we decided to increase the U-Boot image size
(add one flash sector).

Also changed the default environment definition to make it
independent of such changes.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 10:48:58 +02:00
Ira Snyder
4adb3023de ppc4xx: Add device tree support to AMCC Yosemite
Add support for booting with a device tree blob. This is needed to boot
ARCH=powerpc kernels. Also add support for setting the eth0 mac address
via the ethaddr variable.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 07:06:05 +02:00
Dave Mitchell
b9bbefce1a ppc4xx: Fix typos in 460GT/EX FBDV array
Corrected two typos in the 460GT/EX FBDV array.

Signed-off-by: Dave Mitchell <dmitchell@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 07:01:41 +02:00
Andy Fleming
66f5fa9263 85xx: Limit CPU2 workaround to parts that have the errata
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-05-07 16:54:31 -05:00
Lee Nipper
a5fe514e8a mpc83xx: system performance settings for MPC8349EMDS.
These same settings are used on MPC8349ITX, and
improve performance on MPC8349EMDS.

Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-05-06 13:22:25 -05:00
Shinya Kuribayashi
49387dba91 [MIPS] cpu/mips/cache.S: Fix build warning
Some old GNU assemblers, such as v2.14 (ELDK 3.1.1), v2.16 (ELDK 4.1.0),
warns illegal global symbol references by bal (and jal also) instruction.
This does not happen with the latest binutils v2.18.

Here's an example on gth2_config:

mips_4KC-gcc  -D__ASSEMBLY__ -g  -Os   -D__KERNEL__ -DTEXT_BASE=0x90000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isy
stem /opt/eldk311/usr/bin/../lib/gcc-lib/mips-linux/3.3.3/include -pipe  -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4k
c -EB -c -o cache.o cache.S
cache.S: Assembler messages:
cache.S:243: Warning: Pretending global symbol used as branch target is local.
cache.S:250: Warning: Pretending global symbol used as branch target is local.

In principle, gas might be sensitive to global symbol references in PIC
code because they should be processed through GOT (global offset table).
But if `bal' instruction is used, it results in PC-based offset jump.
This is the cause of this warning.

In practice, we know it doesn't matter whether PC-based reference or GOT-
based. As for this case, both will work before/after relocation. But let's
fix the code.

This patch explicitly sets up a target address, then jump there.
Here's an example of disassembled code with/without this patch.

 90000668:       1485ffef        bne     a0,a1,90000628 <mips_cache_reset+0x20>
 9000066c:       ac80fffc        sw      zero,-4(a0)
 90000670:       01402821        move    a1,t2
-90000674:       0411ffba        bal     90000560 <mips_init_icache>
-90000678:       01803021        move    a2,t4
-9000067c:       01602821        move    a1,t3
-90000680:       0411ffcc        bal     900005b4 <mips_init_dcache>
-90000684:       01a03021        move    a2,t5
-90000688:       03000008        jr      t8
-9000068c:       00000000        nop
+90000674:       01803021        move    a2,t4
+90000678:       8f8f83ec        lw      t7,-31764(gp)
+9000067c:       01e0f809        jalr    t7
+90000680:       00000000        nop
+90000684:       01602821        move    a1,t3
+90000688:       01a03021        move    a2,t5
+9000068c:       8f8f81e0        lw      t7,-32288(gp)
+90000690:       01e0f809        jalr    t7
+90000694:       00000000        nop
+90000698:       03000008        jr      t8
+9000069c:       00000000        nop

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-06 13:22:52 +09:00
Wolfgang Denk
908261f3fd Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-05-05 13:25:04 +02:00
Vlad Lungu
0f8c62a14b Allow building mips versions with ELDK 3.1.1
.gpword works only with local symbols on certain binutils versions

Signed-off-by: Vlad Lungu <vlad.lungu@windrvier.com>
2008-05-05 13:24:12 +02:00
Wolfgang Denk
12a67a9e51 MAKEALL: add inka4x0 board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-05 12:52:36 +02:00
Wolfgang Denk
b83dcc13ae kb9202 board: fix build problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-04 21:34:23 +02:00
Wolfgang Denk
6adf61dc4c Prepare for v1.3.3-rc3
Update ChNAGELOG, minor white space cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-04 12:10:33 +02:00
Wolfgang Denk
fb98f94fcb Merge branch 'master' of /home/wd/git/u-boot/master/ 2008-05-04 01:03:30 +02:00
Wolfgang Denk
7c0773fde6 drivers/net/tsec.c: Fix typo.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-04 00:35:15 +02:00
Mike Frysinger
aa737945e6 version_autogenerated.h: use printf rather than echo -n
Some systems are dumb and do not implement the -n flag to echo (like OS X).
Convert the Makefile to use printf as this should work everywhere.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-04 00:28:37 +02:00
Mike Frysinger
4acc2a108a fix building when saveenv is disabled in some setups
If you enable environment in the flash, but disable the embedded
option, and you disable the saveenv command, then the #if nested
logic will trigger a compile failure:
env_flash.c: In function 'env_relocate_spec':
env_flash.c:399: error: 'flash_addr' undeclared (first use in this function)
The fix is to add CMD_SAVEENV ifdef protection like everywhere else.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-05-04 00:22:45 +02:00
Jeremy McNicoll
ccf1ad535a SBC8548: fix address mask to allow 64M flash
Fix incorrect mask to enable all 64MB of onboard flash.
Previously U-Boot incorrectly mapped only 8MB of flash, this
patch correctly maps all the available flash.

Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
2008-05-04 00:18:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
3648085c46 qemu_mips: add README
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-04 00:18:15 +02:00
Wolfgang Denk
4a89b766bf Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-05-04 00:02:29 +02:00
Marcel Ziswiler
6fdd002689 Fix misspelled comment
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-05-04 00:01:08 +02:00
Mike Frysinger
fa956fde60 mkimage: make mmap() checks consistent
The mmap() related code is full of inconsistent casts/constants when
it comes to error checking, and may break when building on some
systems (like ones that do not implicitly define the caddr_t type).
Let's just avoid the whole mess by writing the code nice and clean in
the first place.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-05-03 23:33:43 +02:00
Marcel Ziswiler
8e90cd0447 Fix defined but not used build warning
- warning: 'srom' defined but not used

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-05-03 23:32:17 +02:00
Marcel Ziswiler
b71190f325 Fix implicit declaration build warnings
- warning: implicit declaration of function ‘serial_initialize’

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2008-05-03 23:30:21 +02:00
Andre Schwarz
9acde129cc TSEC: add config options for VSC8601 RGMII PHY
The Vitesse VSC8601 RGMII PHY has internal delay for both Rx
and Tx clock lines. They are configured using 2 bits in extended
register 0x17.
Therefore CFG_VSC8601_SKEW_TX and CFG_VSC8601_SKEW_RX have
been introduced with valid values 0-3 giving 0.0, 1.4,1.7 and 2.0ns delay.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
--

 drivers/net/tsec.c |    6 ++++++
 drivers/net/tsec.h |    3 +++
 2 files changed, 9 insertions(+), 0 deletions(-)
2008-05-03 23:27:04 +02:00
Wolfgang Denk
bd98ee60df Revert "ColdFire: Get information from the correct GCC"
This reverts commit b7166e05a5
(replaced by commit c4e5f52a58).
2008-05-03 23:07:15 +02:00
Wolfgang Denk
c4e5f52a58 config.mk: use correct (cross) compiler
Some config.mk files reference $(CC) to test for specific tool chain
features, so make sure $(CC) gets set before including any such
config files.

This patch replaces commit b7166e05a5 ("ColdFire: Get information from
the correct GCC").

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-03 23:06:59 +02:00
Jean-Christophe PLAGNIOL-VILLARD
27c38689d0 pxa: fix previous definition on cpu init
start.S:183:1: warning: "ICMR" redefined
In file included from start.S:33:
include/asm/arch/pxa-regs.h:935:1: warning: this is the location of the previous definition
start.S:187:1: warning: "RCSR" redefined
...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-03 20:56:22 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d12e697de pxa: fix pcmcia operation on 'i' may be undefined
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-03 20:53:12 +02:00
Kumar Gala
4d77f5102d MPC8610HPCD: Drop -O2 from the build flags
Make the flags use -Os like all other boards

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-05-03 20:49:10 +02:00
Wolfgang Denk
56bb37e4b9 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-05-03 20:46:40 +02:00
Stefan Roese
0072b78be2 RTC: Fix month offset by one problem in M41T62 RTC driver
This patch fixes a problem with the month being read and written
incorrectly (offset by one). This only gets visible by also using
the Linux driver (rtc-m41t80).

Tested on AMCC Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-03 20:44:54 +02:00
Shinya Kuribayashi
141ba1cad8 [MIPS] cpu/mips/config.mk: Fix GNU assembler minor version picker
Current trick to pick up GNU assembler minor version uses a dot(.) as a
delimiter, and take the second field to obtain minor version number. But
as can be expected, this doesn't work with a version string which has
dots more than needs.

Here's an example:

$ mips-linux-gnu-as --version | grep 'GNU assembler'
GNU assembler (Sourcery G++ Lite 4.2-129) 2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | cut -d. -f2
2-129) 2
$

This patch restricts the version format to 2.XX.XX... This will work
in most cases.

$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+'
2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2
18
$

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-05-03 13:51:44 +09:00
Shinya Kuribayashi
ea638951ac [MIPS] cpu/mips/cache.S: Add dcache_enable
Recent bootelf command fixes (017e9b7925,
"allow ports to override bootelf behavior") requires ports to have this
function.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-05-03 13:51:28 +09:00
Wolfgang Denk
50f93d30da Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-05-01 21:39:34 +02:00
Wolfgang Denk
d2c6fbec43 onenand: rename 16 bit memory copy into memcpy_16() to avoid conflicts
Onenand needs a version of memcpy() which performs 16 bit accesses
only; make sure the name does not conflict with the standard
function.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-01 21:30:16 +02:00
Wolfgang Denk
fed4de0135 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-04-30 23:04:51 +02:00
Jean-Christophe PLAGNIOL-VILLARD
12bc4e9425 cmd_nand: fix warning: str2long ncompatible pointer type
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-30 22:58:47 +02:00
Timur Tabi
1b9ed2574a Fix calculation of I2C clock for some 86xx chips
Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2.
There is no pattern that can be used to determine which chips use which
frequency, so the only way to determine is to look up the actual SOC
designation and use the right value for that SOC.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-04-30 22:52:35 +02:00
TsiChung Liew
f32f7fe7bd ColdFire: Fix ethernet hang issue for mcf547x_8x
The ethernet hang is caused by receiving buffer in DRAM is not
yet ready due to access cycles require longer time in DRAM.
Relocate DMA buffer descriptors from DRAM to internal SRAM.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-04-30 22:38:49 +02:00
TsiChung Liew
886d90176f ColdFire: Fix compilation issue caused by new changes in fsl_i2c.c
Signed-off-by: Luigi Comio Mantellini <luigi.mantellini@idf-hit.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-04-30 22:37:36 +02:00
TsiChung Liew
b7166e05a5 ColdFire: Get information from the correct GCC
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-04-30 22:35:13 +02:00
dirk.behme@googlemail.com
378e7ec95d Fix warning in env_nand.c if compiled for DaVinci Schmoogie
Fix warnings

nv_nand.c: In function 'saveenv':
env_nand.c:200: warning: passing argument 3 of 'nand_write' from incompatible pointer type
env_nand.c: In function 'env_relocate_spec':
env_nand.c:275: warning: passing argument 3 of 'nand_read' from incompatible pointer type

if compiled for davinci_schmoogie_config.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Ack by: Sergey Kubushyn <ksi@koi8.net>
2008-04-30 22:34:42 +02:00
Anatolij Gustschin
33a4a70d48 Fix warnings while compiling net/net.c for MPC8610HPCD board
MPC8610HPCD board adds -O2 gcc option to PLATFORM_CPPFLAGS
causing overriding default -Os option. New gcc (ver. 4.2.2)
produces warnings while compiling net/net.c file with -O2
option. The patch is an attempt to fix this.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-04-30 22:32:07 +02:00
Sascha Laue
58b575e575 lwmon5: fix offset error in sysmon0 POST
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-30 22:25:15 +02:00
Sascha Laue
e7419b243a lwmon5: fix manual merge error in POST
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
2008-04-30 21:54:32 +02:00
Wolfgang Denk
42ffcec3f9 cmd_nand.c: fix another 'incompatible pointer type' warning.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-30 17:46:26 +02:00
Wolfgang Denk
de109d9097 Makefile: fix parallel builds
This problem shows up with parallel builds only; it results in
somewhat cryptic error messages like

	$ JOBS=-j6 MAKEALL netstar
	Configuring for netstar board...
	arm-linux-ld: cannot find -lgeneric
	make[1]: *** [eeprom.srec] Error 1

A few boards (like netstar and voiceblue) need some libraries for
building; however, the board Makefile does not contain any such
dependencies which may cause problems with parallel builds. Adding
such dependencies is difficult as we would also have to provide build
rules, which already exist in the respective library Makefiles.

To solve this, we make sure that all libraries get built before the
board code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-30 17:25:07 +02:00
Stefan Roese
4f27098e5b ppc4xx: Adapt Canyonlands fixed DDR2 setup to new DIMM module
This patch changes the Canyonlands/Glacier fixed DDR2 controller setup
used for NAND booting to match the values needed for the new 512MB
DIMM modules shipped with the productions boards:

Crucial: CT6464AC667.8FB

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-30 14:51:36 +02:00
Stefan Roese
ea9202a659 ppc4xx: Fix problem with DIMMs with 8 banks in 44x_spd_ddr2.c
This patch fixes a problem with DIMMs that have 8 banks. Now the
MCIF0_MBxCF register will be setup correctly for this setup too.

This was noticed with the 512MB DIMM on Canyonlands/Glacier.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-30 14:50:04 +02:00
Wolfgang Denk
7661729935 Prepare v1.3.3-rc2, again.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-29 23:41:06 +02:00
Wolfgang Denk
ca9351280f Merge branch 'master' of git://www.denx.de/git/u-boot-net 2008-04-29 23:39:42 +02:00
Wolfgang Denk
b7fcc4c139 Prepare v1.3.3-rc2
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-29 23:35:24 +02:00
Wolfgang Denk
f7b16a0a4d common/env_nand.c: fix one more incompatible pointer type issue
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-29 23:32:20 +02:00
Wolfgang Denk
ea6f66894f post/board/lwmon5/sysmon.c: fix manual merge error.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-29 21:33:08 +02:00
Kumar Gala
70a0f81412 85xx: Add -mno-spe to e500/85xx builds
Newer gcc's might be configured to enable autovectorization by default.
If we happen to build with one of those compilers we will get SPE
instructions in random code.

-mno-spe disables the compiler for automatically generating SPE
instructions without our knowledge.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 20:08:43 +02:00
Wolfgang Denk
8466647684 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-29 20:06:42 +02:00
Wolfgang Denk
3a427fd2ec Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-04-29 20:04:56 +02:00
Kumar Gala
8ea08e5be6 Update .gitignore for zlib.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 20:02:51 +02:00
Kumar Gala
45239cf415 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
All the 85xx and 86xx UM describe the register as timing_cfg_3
not as ext_refrec.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 11:44:29 -05:00
Kumar Gala
ef7d30b143 85xx/86xx: Rename DDR init address and init extended address register
Rename init_addr and init_ext_addr to match the docs between
85xx and 86xx.  Both now use 'init_addr' and 'init_ext_addr'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 11:42:05 -05:00
Kumar Gala
cf6cc01427 85xx: Additional fixes and cleanup of MP code
* adjust __spin_table alignment to match ePAPR v0.94 spec
* loop over all cpus when determing who is up.  This fixes an issue if
  the "boot cpu" isn't core0.  The "boot cpu" will already be in the
  cpu_up_mask so there is no harm
* Added some protection in the code to ensure proper behavior.  These
  changes are explicitly needed but don't hurt:
  - Added eieio to ensure the "hot word" of the table is written after
    all other table updates have occurred.
  - Added isync to ensure we don't prefetch loading of table entries
    until we a released

These issues we raised by Dave Liu.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 09:42:19 -05:00
Wolfgang Denk
fd2d2d1025 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-04-29 16:11:33 +02:00
Yuri Tikhonov
b2d527a8b9 lwmon5: minor clean-up to include/configs/lwmon5.h
LWMON5 DSPIC POST uses the watch-dog scratch register. So, make
the CFG_DSPIC_TEST_ADDR definition more readable.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-04-29 16:10:38 +02:00
Stefan Roese
f4c4d21a88 ppc4xx: Fix CFG_MONITOR_LEN on Katmai failsave this time
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 16:08:05 +02:00
Wolfgang Denk
0e715a7a3f Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-04-29 14:52:18 +02:00
Yuri Tikhonov
138105efe1 ppc flush_cache: add watch-dog triggering into the loops.
Some boards (e.g. lwmon5) need rather a frequent watch-dog
kicking. Since the time it takes for the flush_cache() function
to complete its job depends on the size of data being flushed, one
may encounter watch-dog resets on such boards when, for example,
download big files over ethernet.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-04-29 14:48:50 +02:00
Stefan Roese
cab99d6f32 ppc4xx: Fix compilation warning in denali_spd_ddr2.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 14:44:54 +02:00
Stefan Roese
4ec9d78fe5 ppc4xx: Fix Katmai CFG_MONITOR_LEN
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 14:12:07 +02:00
Stefan Roese
85ad184b3b ppc4xx: Complete remove bogus dflush()
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().

Tested on Katmai with ECC DIMM.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 13:57:07 +02:00
Stefan Roese
135846d6ec ppc4xx: Change ECC initialization on lwmon5 to use clean_dcache_range()
As it seems the "old" ECC initialization routine by using dflush() didn't
write all lines in the dcache back to memory on lwmon5. This could lead
to ECC error upon Linux booting. This patch changes the program_ecc()
routine to now use clean_dcache_range() instead of dflush().
clean_dcache_range() uses dcbst which is exactly what we want in this
case.

Since dflush() is known is cause problems, this routine will be
removed completely and replaced by clean_dcache_range() with an
additional patch.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-29 13:36:51 +02:00
Wolfgang Denk
e037a4c272 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-04-29 13:15:20 +02:00
Yuri Tikhonov
18ec19e4aa POST: fix Makefiles for mpc8xx, lwmon, and netta POSTs.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-04-29 13:13:22 +02:00
Markus Brunner
eea5a743a2 ppc4xx: Fixup ebc clock in FDT for 405GP/EP
On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb
and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc
doesn't exist.

Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
2008-04-29 07:37:54 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2ef7503a59 NE2000: Fix regresssion introduced by e710185aae on non AX88796
Move non-inlied functions into specific drivers file
Set get_prom as weak

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-04-28 22:26:36 -07:00
Guennadi Liakhovetski
40cb90ee2b net: make ARP timeout configurable
Currently the timeout waiting for an ARP reply is hard set to 5 seconds.
On i.MX31ADS due to a hardware "strangeness" up to four first IP packets
to the boards get lost, which typically are ARP replies. By configuring
the timeout to a lower value we significantly improve the first network
transfer time on this board. The timeout is specified in milliseconds,
later internally it is converted to deciseconds, because it has to be
converted to hardware ticks, and CFG_HZ ranges from 900 to 27000000 on
different boards.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-04-28 22:23:21 -07:00
Guennadi Liakhovetski
13e0b8f7ca minor cs8900 driver clean up
Remove a redundant register definition, clean up some coding style
violations.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-04-28 22:22:34 -07:00
Wolfgang Denk
707fa917cc jffs2_1pass.c: fix incompatible pointer type warning
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 22:01:04 +02:00
Sascha Laue
6aee00f5e6 lwmon5: update dsPIC POST spezification
The specification for the lwmon5 board dsPIC POST got changed.
Also add defines for the temperatures  and voltages.

Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
2008-04-28 21:31:41 +02:00
Sascha Laue
3e4615ab7f Fix watchdog POST for lwmon5
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.

Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 21:15:46 +02:00
Guennadi Liakhovetski
dd5748bcd6 rtl8169: fix compiler warnings
Fix multiple compiler warnings related to argument type mismatch.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
2008-04-28 20:42:55 +02:00
Guennadi Liakhovetski
413bf58626 IDE: fix compiler warnings
The IDE driver can use 32-bit addresses in LBA mode, in which case it
spits multiple warnings during compilation. Fix them.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
2008-04-28 20:42:51 +02:00
Guennadi Liakhovetski
db9084de28 LinkStation: fix compiler warning, add a maintainer
out_8 wants a pointer to an unsigned as the first argument. Add a
maintainer for Linkstation boards.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
2008-04-28 20:42:46 +02:00
Wolfgang Denk
c71abba3cb cmd_nand.c: fix "differ in signedness" problem
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 14:55:12 +02:00
Wolfgang Denk
f2c288a353 pcnet.c: fix a merge issue
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 12:48:47 +02:00
Wolfgang Denk
4ca79f477e NAND: fix some strict-aliasing compiler warnings
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 12:08:18 +02:00
Wolfgang Denk
ff8a7aa24a Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-04-28 12:07:34 +02:00
Stefan Roese
5cd0130ecc ppc4xx: Fix compile warning of hcu4 board
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-28 12:07:15 +02:00
Wolfgang Denk
624ce3428a Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-04-28 11:34:34 +02:00
Wolfgang Denk
5379cd15dd MPC8323ERDB: fix implicit declaration of function 'mac_read_from_eeprom'
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 11:31:23 +02:00
Guennadi Liakhovetski
7602ed50a2 mx31ads: fix loadaddr environment variable define
Arithmetic expressions do not get evaluated under stringification. Remove
default network configuration, add DHCP command support. Thanks to Felix
Radensky for reporting.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-28 11:10:26 +02:00
Wolfgang Denk
144eec777a katmai: fix section overlap problem
Since we didn't want to remove features from the configuration, we
decided to increase the U-Boot image size (add one flash sector).

Also changed the default environment definition to make it
independent of such changes.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2008-04-28 11:10:12 +02:00
Wolfgang Denk
941d696d25 katmai: fix section overlap problem
Since we didn't want to remove features from the configuration, we
decided to increase the U-Boot image size (add one flash sector).

Also changed the default environment definition to make it
independent of such changes.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2008-04-28 11:00:14 +02:00
Kumar Gala
03c6cd39f9 post: Fix building with O=
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-28 00:55:04 +02:00
Wolfgang Denk
fd7531c1e9 Prepare v1.3.3-rc1
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-26 01:55:00 +02:00
Wolfgang Denk
19cf2ec90d post/Makefile: make sure to use the correct flags
ARFLAGS was not set, which caused "ppc_8xx-ar: creating libgenpost.a"
messages to be printed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-26 01:25:39 +02:00
Wolfgang Denk
7ed4011733 Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-26 00:34:42 +02:00
Magnus Lilja
f9204e1517 i.MX31: Enable SPI and MC13783/RTC support for the Litekit board
This patch enables SPI and MC13783/RTC support for the Litekit board.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-04-26 00:26:55 +02:00
Ed Swarthout
f97abbfb47 MPC8544DS: decode pcie3 end-point configuration correctly.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-26 00:25:30 +02:00
Roy Zang
292188e155 MPC8544DS: Removes the unknown flash message information
This patch removes the unknown flash message information:
'## Unknown FLASH on Bank 1 - Size = 0xdeadbeef = -286261248 MB'
This unknown flash message is caused by PromJet.
Some of the board user is unhappy with this information.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-26 00:22:59 +02:00
Wolfgang Denk
57533b881e Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-04-26 00:07:26 +02:00
Wolfgang Denk
fe06d43b50 Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-04-26 00:06:51 +02:00
Wolfgang Denk
1d907e66fd Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-26 00:06:13 +02:00
Kim Phillips
b211575740 mpc83xx: bump loadaddr over fdtaddr to 0x500000
this seems as a good compromise between human memory, typing,
and last but not least, to accommodate for current and future kernel bloat.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
2008-04-25 10:54:06 -05:00
Dave Liu
be5a719026 mpc83xx: clean up the readme for 83xx boards
1. correct the typo
2. correct the memory map for 837xerdb board

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-04-25 09:34:22 -05:00
Dave Liu
bcae52a681 mpc83xx: remove the unused CPM's stuff
The MPC83xx family never have CPM block, so remove it from 83xx.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-04-25 09:34:21 -05:00
Matthias Fuchs
c63ad6325a cfi-flash: Add CFG_FLASH_AUTOPROTECT_LIST
This patch adds a configurable flash auto protection list that can be used
to make U-Boot protect flash regions in flash_init().

The idea has been discussed on the u-boot mailing list starting
on Nov 18th, 2007.

Even this patch brings a new feature it is used as a bugfix for 4xx
platforms where flash_init() does not completely protect the
monitor's flash range in all situations.

U-Boot protects the flash range from CFG_MONITOR_BASE to
(CFG_MONITOR_BASE + monitor_flash_len  - 1) by default. This does not
include the reset vector at 0xfffffffc.

Example:
#define CFG_FLASH_AUTOPROTECT_LIST {{0xfff80000, 0x80000}}

This config option will auto protect the last 512k of flash that
contains the bootloader on board like APC405 and PMC405.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-25 15:52:14 +02:00
Stefan Roese
d0d91ae3ac ppc4xx: Remove double defines in lwmon5.h
introduced with latest lwmon5/POST merge

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-25 14:06:15 +02:00
Bartlomiej Sieka
7590378fb9 Use watchdog-aware functions when calculating hashes of images - take two
Some files didn't get updated properly with the "Use watchdog-aware
functions when calculating hashes of images" commit, this commit
fixes this.

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-25 14:05:21 +02:00
Matthias Fuchs
8e048c438e ppc4xx: Add bootcount limit handling for APC405 boards
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-25 13:37:14 +02:00
Bartlomiej Sieka
1de6b28be5 Use watchdog-aware functions when calculating hashes of images
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-04-25 13:10:29 +02:00
Wolfgang Denk
d00ce09040 USB: fix more GCC 4.2.x aliasing warnings
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
2008-04-25 12:44:08 +02:00
Wolfgang Denk
aff4f86448 lib_generic/crc32.c: add missing #include <watchdog.h>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-25 12:41:53 +02:00
Wolfgang Denk
03ccdbcd56 lib_generic/crc32.c: fix compile problem
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-25 11:52:21 +02:00
Stefan Roese
24bfedbd0b ppc4xx: Pass PCIe root-complex/endpoint configuration to Linux via the fdt
The PCIe root-complex/endpoint setup as configured via the "pcie_mode"
environment variable will now get passed to the Linux kernel by setting
the device_type property of the PCIe device tree node. For normal root-
complex configuration it will keep its defaults value of "pci" and for
endpoint configuration it will get changed to "pci-endpoint".

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-25 11:44:47 +02:00
Yuri Tikhonov
eb0615bf60 lwmon5: watchdog POST fix
Use the GPT0_MASKx registers as the temporary storage for watch-dog
timer POST test instead of GPT0_COMPx. The latter
(GPT0_COMP1..GPT0_COMP5) are used for the log-buffer header.

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-04-25 11:35:32 +02:00
Wolfgang Denk
4b7a6dd896 Merge branch 'master' of /home/wd/git/u-boot/lwmon5
Conflicts:

	common/cmd_bootm.c
	common/cmd_log.c
	include/common.h
	post/board/lwmon5/Makefile
	post/board/lwmon5/dsp.c
	post/board/lwmon5/dspic.c
	post/board/lwmon5/fpga.c
	post/board/lwmon5/gdc.c
	post/board/lwmon5/sysmon.c
	post/board/lwmon5/watchdog.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-25 11:32:01 +02:00
Wolfgang Denk
926662762e Merge branch 'master' of git://www.denx.de/git/u-boot-nand-flash 2008-04-25 11:10:17 +02:00
Wolfgang Denk
04a5b03d86 Merge branch 'master' of git://www.denx.de/git/u-boot-at91 2008-04-25 10:05:42 +02:00
Kim Phillips
78e4882988 lib_ppc: Revert "Make MPC83xx one step closer to full relocation."
This reverts commit 70431e8a73 which has
proven problematic getting right from the start at least on 83xx and
4xx.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-25 00:13:12 +02:00
Detlev Zundel
a99715b8eb Realining some header definitions.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-04-25 00:09:53 +02:00
Jean-Christophe PLAGNIOL-VILLARD
4acbc6c7f9 NE2000: coding style cleanup
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-25 00:08:32 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b4aff1ffaf qemu-mips.h: Add CFI support
CONFIG_ENV_OVERWRITE is also added.

This patch is originally created by Jean-Christophe PLAGNIOL-VILLARD.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-04-25 00:05:09 +02:00
Shinya Kuribayashi
4a1f11b45a doc/README.mips: Add MIPS notes
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-04-25 00:03:53 +02:00
Bartlomiej Sieka
215b01bba8 Add support for calculating hashes with watchdog triggering
Implement watchodg-aware variants of hash calculation functions:
- crc32_wd()
- md5_wd()
- sha1_csum_wd()
The above functions calculate the hash of the input buffer in chunks,
triggering the watchdog after processing each chunk. The chunk size
is given as a function call parameter.

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-04-25 00:01:06 +02:00
Shinya Kuribayashi
8875e3abab qemu-mips: Cleanup whitespace, indentation, etc.
No functional change.

This patch was originally submitted by Jean-Christophe PLAGNIOL-VILLARD.
Then I re-created from scratch, and changed more lines than the original.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-04-24 23:54:06 +02:00
Vlad Lungu
386563197e Fixed pcnet io_base
Bus and phys address are not always the same

Signed-off-by: Vlad Lungu <vlad@comsys.ro>
2008-04-24 23:49:00 +02:00
Wolfgang Denk
11ea26fd1c drivers/net/pcnet.c: Coding Style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-24 23:44:26 +02:00
Vlad Lungu
899ef7b845 Added Am79C970A chip id to pcnet
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
2008-04-24 23:43:10 +02:00
Magnus Lilja
17c9de6bb3 i.MX31: Fix architecture numbers for ADS and Litekit boards
Correct the Linux architecture number for i.MX31 Litekit and ADS boards.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-04-24 23:37:57 +02:00
Magnus Lilja
e7ae84d6c7 i.MX31: Use symbolic names for Litekit membases.
Use symbolic names instead of hard coded addresses for Litekit membases.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-04-24 23:35:23 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2ef1d9b603 Fix show_boot_progress prototype
in commit fad634071 "make show_boot_progress () weak."
show_boot_progress is supposed to be declared as weak but declared as
inline instead.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-24 23:22:52 +02:00
Bartlomiej Sieka
edbed247a1 Memory footprint optimizations
As suggested by Wolfgang Denk:
- image printing functions:
  - remove wrappers
  - remove indentation prefix from functions' signatures
- merge getenv_verify and getenv_autostart into one parametrized function

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-04-24 17:21:55 +02:00
Guennadi Liakhovetski
0a0b606faa MX31ADS environment variable update, spi and rtc support
Update MX31ADS default environment to better match the flash layout and
the memory map, support SPI and RTC.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-24 17:06:39 +02:00
Kumar Gala
022f121635 85xx: Round up frequency calculations to get reasonable output
eg. because of rounding error we can get 799Mhz instead of 800Mhz.

Introduced DIV_ROUND_UP and roundup taken from linux kernel.

Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-04-24 15:42:35 +02:00
Wolfgang Denk
0aa88c8266 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-04-24 15:28:05 +02:00
Kumar Gala
876b8f9789 fsl_pci: Only modify registers if we have them
pme_msg_det exists only on PCIe controllers only set it if we are a "bridge".

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-24 14:20:12 +02:00
Wolfgang Denk
be32bf20bc Merge branch 'master' of git://www.denx.de/git/u-boot-video 2008-04-24 14:00:54 +02:00
Markus Klotzbücher
83fe323343 USB: remove a cpu bug workaround for an unsupported architecture.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-04-24 13:34:35 +02:00
Markus Klotzbücher
f957576cb5 USB: fix those pesky aliasing warnings issued by gcc-4.2
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-04-24 13:30:56 +02:00
Mike Frysinger
89cdab788f crc32: use uint32_t rather than unsigned long
The envcrc.c does sizeof(unsigned long) when calculating the crc, but
this is done with the build toolchain instead of the target tool
chain, so if the build is a 64bit system but the target is 32bits,
the size will obviously be wrong. This converts all unsigned long
stuff related to crc32 to uint32_t types. Compile tested only: output
of ./tools/envcrc when run on a 32bit build system matches that of a
64bit build system.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-24 13:18:17 +02:00
Dirk Behme
80c40b765b ARM: Davinci: Fix DM644x timer overflow handling and cleanup
Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code.

Changes:

- Remove *_masked() functions as noted by Wolfgang

- Adapt register naming to recent TI spec (sprue26, March 2007)

- Fix reset_timer() handling

- As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this.

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179

- Remove software division of timer count value (DIV(x) macro) and do it in hardware (TIM_CLK_DIV).

Many thanks to Troy Kisky <troy.kisky@boundarydevices.com> and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for the hints & testing!

Patch is compile tested with davinci_dvevm & sonata & schmoogie configuration and tested by Pieter on DaVinci EVM hardware.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
2008-04-22 23:12:01 +02:00
Wolfgang Denk
58c5376ba6 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-22 17:21:24 +02:00
Sergei Poselenov
a6e6fc610e Added watchdog triggering calls in the "mtest" test function.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2008-04-22 15:21:37 +02:00
Yuri Tikhonov
d32a874b9b lwmon5 watchdog: limit trigger rate
Limit the rate of h/w watch-dog triggering on the LWMON5 board by
the CONFIG_WD_MAX_RATE value.

Note that an earlier version of this patch which used microseconds
instead of ticks dis not work. The problem was that we used
usec2ticks() to convert microseconds into ticks. usec2ticks() uses
get_tbclk(), which in turn calls get_sys_info(). It turns out that
this function does a lot of prolonged operations (like divisions)
which take too much time so we do not trigger the watchdog in time,
and it resets the system.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-04-22 15:21:15 +02:00
Yuri Tikhonov
2d2b994a30 POST: move CONFIG_POST to Makefiles
Introduce the new logical option CONFIG_HAS_POST which is set when the
platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles
to determine should the POST libs be compiled for the selected target
platform, or not.

To avoid breaking u-boot linking process, the empty post/libpost.a file is
created for platforms which do not have POSTs.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-22 14:40:19 +02:00
Yuri Tikhonov
0a51e9248e POST: preparations for moving CONFIG_POST to Makefiles
Remove CONFIG_POST ifdefs from the post/ source files.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-22 14:38:38 +02:00
Stefan Roese
5d40d4430d ppc4xx: Fix Canyonlands and Glacier default environment for fdt usage
This patch fixes the Canyonlands and Glacier default environment to better
fit to the arch/powerpc device-tree kernels. The variables dealing with
arch/ppc booting are removed, since these boards are supported only in
arch/powerpc. Glacier uses the same config file as Canyonlands.

Also, the Glacier now uses non-FPU rootpath, since 460GT has no FPU.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-22 14:14:20 +02:00
Stefan Roese
b789cb4a4c ppc4xx: Small coding style cleanup for the latest esd patches
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-22 14:06:42 +02:00
Matthias Fuchs
79941d63bc ppc4xx: Update CPU strapping for PMC440 boards
This patch removes the temporary 'test' strapping option
of the sbe command. The '667' strapping option now uses
a PLB/PCI divider of 3.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:48:54 +02:00
Matthias Fuchs
f00cf3193a ppc4xx: Remove unused APC405 strataflash driver
The APC405 board support has been migrated to use the common
CFI flash driver.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:48:32 +02:00
Matthias Fuchs
1c686676a8 ppc4xx: Update APC405 configuration
- enable esd's auto_update mechanism
- support alternative flash layout on rev. 1.8 boards
- update default environment
- use common CFI flash driver
- coding style cleanup

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:48:20 +02:00
Matthias Fuchs
0b9872515a ppc4xx: Update APC405 board support
- enable esd's auto_update mechanism
- fix LCD support on latest hardware revision (uses other LCD controller)
- support alternative flash layout on rev. 1.8 boards
- coding style cleanup

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:48:04 +02:00
Matthias Fuchs
83975d02e2 ppc4xx: update esd's common auto_update code for 405 boards
- Coding style cleanup (long lines)
- improve handling of protected flash regions
- remove dead code

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:47:49 +02:00
Matthias Fuchs
b9233fe5d5 ppc4xx: Update esd's common LCD code for 405 boards
- Coding style cleanup (long lines)
- Add s1d13505 support
- Make some functions return a result code instead of void

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:47:37 +02:00
Matthias Fuchs
dea6818942 ppc4xx: Update FPGA image for APC405 boards
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:45:51 +02:00
Matthias Fuchs
2a05b15292 ppc4xx: Update bootlogo for APC405 boards
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-22 13:45:36 +02:00
Stefan Roese
8deafdc6ad ppc4xx: Add dcache_enable() for 440
dcache_enable() was missing for 440 and the patch
017e9b7925 ["allow ports to override bootelf
"] behavior uses this function.

Note: Currently the cache handling functions like
d/icache_disable/enable() are NOP's on 440. This may be changed in the
future.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-22 12:26:33 +02:00
Matthias Fuchs
a49e0d177a video: Add missing free for logo memory
This patch adds two missing free()s.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-21 14:05:59 +02:00
Troy Kisky
84c01d3a05 PATCH - Fix oob data copied into supplied buffer
This patch correctly sets the oobavail variable
and fixes a bug where the oob data was not valid when
there where multiple groups in oobfree.

First segment fixes a typo
Second segment fixes a bug where oob data may be copied incorrectly.
Third segment adds an error message when exiting due to write protect.
Forth segment fixes a bug where oobavail may be set incorrectly.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2008-04-21 08:43:46 +02:00
Matthias Fuchs
e1d09680f6 ppc4xx: Fix sys_get_info() for 405GP(r)
This patch assigns the correct EBC clock for 405GP(r) CPUs
to PPC4xx_SYS_INFO structure. Without this patch U-Boot
uses an uninitialized EBC clock in its startup message.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-04-21 06:54:08 +02:00
Wolfgang Denk
dc7746d86d Makefile: remove nand_spl/System.map when cleaning up. 2008-04-20 15:39:38 -07:00
Wolfgang Denk
d9a42c0ace MAKEALL: sort entries / lists.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-20 15:35:52 -07:00
Kumar Gala
0878af169b 85xx: Fix size of cpu-release-addr property
The cpu-release-addr is defined as always being a 64-bit quanity regardless
if we are running on a 32-bit or 64-bit machine.
2008-04-18 17:44:50 -05:00
Timur Tabi
88353a9851 Fix calculation of I2C clock for some 85xx chips
Some 85xx chips use CCB as the base clock for the I2C.  Some use CCB/2, and
some use CCB/3.  There is no pattern that can be used to determine which
chips use which frequency, so the only way to determine is to look up the
actual SOC designation and use the right value for that SOC.

Update immap_85xx.h to include the GUTS PORDEVSR2 register.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-04-18 17:43:09 -05:00
Wolfgang Denk
1e01477aea Fix build breakage casued by commit c0559be371
Change env_get_char from a global function ptr to a function.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-18 11:44:27 -07:00
Wolfgang Denk
268a804d7e Coding Style cleanup, update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-18 10:53:41 -07:00
Mike Frysinger
92bad20ad7 Add support for u-boot in svn and localversion-* files
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-04-18 10:08:31 -07:00
Guennadi Liakhovetski
d23ff6827d MX31ADS network and flash updates
This patch allows U-Boot to use buffered writes to the Spansion NOR
flash installed on this board, and eliminates long delays in network
transfers after the board startup.

Also modify flash layout to embed main and redundant environment
blocks in the U-Boot image.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-18 10:06:50 -07:00
Guennadi Liakhovetski
b5dc9b304d Support for the MX31ADS evaluation board from Freescale
This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by
Freescale.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-18 10:05:14 -07:00
Stefan Roese
499e7831e1 ppc4xx: Change Canyonlands to support booting from 2k page NAND devices
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:30:49 +02:00
Stefan Roese
5e182dce04 ppc4xx: Adjust Canyonlands fixed DDR2 setup (NAND booting) to 512MB SODIMM
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:30:39 +02:00
Stefan Roese
fe7c0db6b2 ppc4xx: Add Glacier NAND booting target
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:30:34 +02:00
Stefan Roese
46f373838e nand_spl: Update nand_spl to support 2k page size NAND devices
This patch adds support for booting from 2k page sized NAND device
(e.g. Micron 29F2G08AAC).

Tested on AMCC Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-18 16:12:46 +02:00
Anatolij Gustschin
5e3dca577b Fix crash on sequoia in ppc_4xx_eth_init
Currently U-Boot crashes in ppc_4xx_eth_init on sequoia
with cache enabled (TLB Parity exeption). This patch
fixes the problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-04-18 00:48:27 -07:00
Anatolij Gustschin
accf735576 ppc4xx: Fix crash on sequoia with cache enabled
Currently U-Boot crashes on sequoia board in CPU POST if
cache is enabled (CONFIG_4xx_DCACHE defined). The cache
won't be disabled by change_tlb before CPU POST because
there is an insufficient adress range check since
CFG_MEM_TOP_HIDE was introduced. This patch tries to fix
this problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-04-18 00:48:02 -07:00
Shinya Kuribayashi
43c509254f Use jr as register jump instruction
Current assembler codes are inconsistent in the way of register jump
instruction usage; some use jr, some use j. Of course GNU as allows both
usages, but as can be expected from `Jump Register' the mnemonic `jr' is
more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
at all.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-04-18 00:47:29 -07:00
Guennadi Liakhovetski
7ce6370982 RTC driver for MC13783
MC13783 is a multifunction IS with an SPI interface to the host. This
driver handles the RTC controller in this chip.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-18 00:43:50 -07:00
Guennadi Liakhovetski
38254f45b0 New i.MX31 SPI driver
This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
only implemented and tested on i.MX31, can with a modified register layout
and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
controllers too.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-18 00:43:23 -07:00
Wolfgang Denk
248b7d984c Merge branch 'master' of git://www.denx.de/git/u-boot-net 2008-04-18 00:40:06 -07:00
Magnus Lilja
7064122c2e Fix name of i.MX31 boards in config file header
Correct the name of the i.MX31 Litekit and phyCORE boards in config files.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2008-04-18 00:33:10 -07:00
Mike Frysinger
a49864593e allow ports to override go behavior
Split the arch-specific logic out of the common go code and into a dedicated
weak function called do_go_exec() that lives in cpu directories.  This will
need review from i386/nios people to make sure I didn't break them.
2008-04-18 00:31:41 -07:00
Mike Frysinger
017e9b7925 allow ports to override bootelf behavior
Change the bootelf setup function into a dedicated weak function called
do_bootelf_exec.  This way ports can control the behavior however they
like before/after calling the ELF entry point.
2008-04-18 00:30:42 -07:00
Ulf Samuelsson
a4b46ed6b3 Reorder ARM boards in Makefile
Rearrange ARM boards in Makefile so that ARM926EJ-S boards
are no longer under ARM92xT header.

Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
Ack-By Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-18 00:25:47 -07:00
Ulf Samuelsson
c3a60cb3bd Clean up dataflash partitioning
This patch removes the board dependent parts from
"drivers/mtd/dataflash.c".
Each board relying on this, will have the appropriate
code in a new file, "partition.c" in the board directory.
board Makefiles updated to use the file.

The dataflash partitions are aligned on sector/page boundaries.

The CONFIG_NEW_DF_PARTITION was used to create named partitions
This is now the default operation, and the CONFIG variable is removed.

Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
2008-04-18 00:24:05 -07:00
Jean-Christophe PLAGNIOL-VILLARD
51ecde946f gitignore: udpate stgit generated and .patch file
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-18 00:22:08 -07:00
Wolfgang Denk
66e39818e9 Get rid of redundant copy of renamed header file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-18 00:15:36 -07:00
Vlad Lungu
c3aafd8cf8 Fix dependency generation for older gcc versions
With gcc 3.3.3 at least, compilation fails with

Generating include/autoconf.mk
gcc: compilation of header file requested
make: *** [include/autoconf.mk] Error 1

since commit 16fe77752e.

Signed-off-by: Vlad Lungu <vlad@comsys.ro>
2008-04-18 00:06:41 -07:00
Marian Balakowicz
cb1c489690 Restore the ability to continue booting after legacy image overwrite
Before new uImage code was merged, bootm code allowed for the kernel image to
get overwritten during decompresion. new uImage introduced a check for image
overwrites and refused to boot the image that got overwritten. This patch
restores the old behavior. It also adds a warning when the image overwriten is
a multi-image file, because in such case accessing componentes other than the
first one will fail.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-04-17 23:59:05 -07:00
Marian Balakowicz
de2b3216e6 ppc: Fix ftd_blob variable init when processing raw blob
Set fdt_blob variable before its value is printed out.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-04-17 23:58:22 -07:00
Jason Wessel
3d36be0300 Remove all the search paths from the .lds files.
The cross compiler is responsible for providing the correct libraries
and the logic to find the linking libraries.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
2008-04-17 23:57:32 -07:00
Bartlomiej Sieka
7d721e34ae Boot-related documentation update
- document 'bootm_low' and 'bootm_size' environment variables
- update inaccurate CFG_BOOTMAPSZ entry

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-04-17 23:35:23 -07:00
Guennadi Liakhovetski
a6f0bd9f2b Fix regression introduced by a typo in "Tidied other cpu/arm920t/start.S code"
Restore logic reverted by commit

commit 80767a6cea
Author: Peter Pearse <peter.pearse@arm.com>
Date:   Wed Sep 5 16:04:41 2007 +0100

    Changed API name to coloured_led.h
    Removed code using deprecated ifdef CONFIG_BOOTBINFUNC
    Tidied other cpu/arm920t/start.S code

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-17 23:33:20 -07:00
Mike Frysinger
e25cb8d3f4 Remove conflicting NAND ID
There are two NAND entries with ID 0xDC and this obviously causes problems.
In the kernel, they punted the first entry, so we should do the same.

See this upstream e-mail for more info:
http://lists.infradead.org/pipermail/linux-mtd/2007-July/018795.html

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-04-17 14:56:56 -07:00
Shinya Kuribayashi
188e94c370 cpu/mips/cpu.c: Fix flush_cache bug
Cache operations have to take line address (addr), not start_addr.
I noticed this bug when debugging ping failure.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
2008-04-17 14:54:23 -07:00
Martin Krause
8f2a68a07c TQM5200: fix default IDE reset level
Before the first call of ide_reset(), the level of the IDE reset
signal on the TQM5200 is low (reset asserted). This patch sets the
default value to high (reset not asserted).

Currently this patch fixes no real problem, but it is cleaner to
assert the reset signal only on demand, and not permanently.

Signed-off-by: Martin Krause <martin.krause@tqs.de>
2008-04-17 14:31:21 -07:00
Detlev Zundel
c61e033d6e mgcoge, mgsuv: realign CONFIG_EXTRA_ENV_SETTING
Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-04-17 14:29:28 -07:00
Detlev Zundel
f308572e19 mgcoge, mgsuv: rename 'addcon' to 'addcons'
The latter name with 13 users is already established, so we will use
that.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2008-04-17 14:28:24 -07:00
Martin Krause
e175eacc87 IDE: fix bug in reset sequence
According to the ata (ata5) specification the RESET- signal
shall be asserted for at least 25 us. Without this patch,
the RESET- signal is asserted on some boards for only < 1 us
(e. g. on the TQM5200). This patch adds a general delay of
25 us to the RESET- signal.

Without this patch a Platinum 4 GiB CF card is not recognised
properly on boards with a TQM5200 (STK52xx, TB5200).

Signed-off-by: Martin Krause <martin.krause@tqs.de>
2008-04-17 14:26:48 -07:00
Sascha Laue
813bea96a9 lwmon5: disable CONFIG_ZERO_BOOTDELAY
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
2008-04-17 14:25:15 -07:00
Jean-Christophe PLAGNIOL-VILLARD
53eec6f1d2 ds174x: Fix warning on return in rtc_get and rtc_set functions
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-17 14:11:18 -07:00
Jean-Christophe PLAGNIOL-VILLARD
a253b38bf5 cmd_log.c: Fix assignment differ in signedness
In function 'logbuff_init_ptrs':
cmd_log.c:79: warning: pointer targets in assignment differ in signedness

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-17 14:05:22 -07:00
Gururaja Hebbar K R
6c0e9a8f1c Remove duplicate #undef SHOW_INFO in drivers/usb/usb_ohci.c
Signed-off-by: gururaja hebbar <gururajakr@sanyo.co.in>
2008-04-17 14:03:16 -07:00
Jean-Christophe PLAGNIOL-VILLARD
478d5ec9ae s3c4510b_eth: fix 'packed' attribute ignored for fields of MACFrame
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-17 13:45:02 -07:00
Guennadi Liakhovetski
c08fb3ea36 Additional PCI IDs for IDE and network controllers
These PCI IDs are required by the Linkstation platforms.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
2008-04-17 13:37:57 -07:00
Joakim Tjernlund
c0559be371 Change env_get_char from a global function ptr to a function.
This avoids an early global data reference.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2008-04-17 13:20:14 -07:00
Guennadi Liakhovetski
3e0f331c05 Clean up smsc911x driver
Replace direct register address derefencing with accessor functions.
Restrict explicitly 32-bit bus-width, extend affected configurations
respectively.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-04-15 00:08:30 -04:00
Sascha Hauer
de1b686b76 This patch adds a driver for the following smsc network controllers:
LAN9115
LAN9116
LAN9117
LAN9215
LAN9216
LAN9217

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski<lg@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-04-15 00:08:20 -04:00
Sascha Laue
3dfd4aab92 Fix watchdog POST for lwmon5
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.

Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
2008-04-13 23:22:34 -07:00
Dave Liu
24b448448a ata: update the libata.h from ata.h of linux kernel
Current libata.h of u-boot is out of sync from linux kernel,
this patch make it be consistent with linux kernel.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Tor Krill <tor@excito.com>
2008-04-13 23:20:16 -07:00
Kumar Gala
f8f9dc9888 Allow use of ARCH=powerpc when building
The linux kernel is now mostly ARCH=powerpc, so to make life easier
allow use to use ARCH=powerpc and convert it to ARCH=ppc.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-13 23:18:21 -07:00
Kyungmin Park
8af657d2c6 Add apollon board MAINTAINERS entry
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-04-13 23:14:21 -07:00
Kyungmin Park
77e475cc0e Fix OneNAND read
It should access with 16-bit instead of 8-bit

Now it uses the generic memcpy with 8-bit access. It means it reads wrong data from OneNAND.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-04-13 23:11:16 -07:00
Kyungmin Park
a9da2b4107 Fix OneNAND erase command
It mis-calculates the block address.
Also fix DECLARE_GLOBAL_DATA_PTR in env_onenand.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-04-13 23:10:39 -07:00
Guennadi Liakhovetski
61525f2ffa Support for LinkStation / KuroBox HD and HG PPC models
This patch is based on the port by Mihai Georgian (see linkstation.c for
Copyright information) and implements support for LinkStation / KuroBox HD
and HG PPC models from Buffalo Technology, whereby HD is deactivated at
the moment, pending network driver fixing.

Notice to users: this is pretty much a barebone port. Support for network
on HG models is already in the U-Boot mainline, but you might also want
patches to switch fan / phy modes depending on the negotiated ethernet
parameters. This patch also doesn't support console switching, booting EM
mode, Buffalo specific ext2 magic number. So, if you want to use any of
those, you need additional patches. Otherwise this patche provides a fully
functional u-boot with a network console on your system.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-13 23:08:40 -07:00
TsiChung Liew
0f3ba7e978 Add CONFIG_MII_INIT support to related boards
Replace CONFIG_8xx and CONFIG_MCF532x to CONFIG_MII_INIT in
cmd_init.c. Add CONFIG_MII_INIT to board configuration files
that use mii_init() in cmd_init.c.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2008-04-13 23:03:02 -07:00
TsiChung Liew
f33fca22e7 Update CONFIG_PCIAUTO_SKIP_HOST_BRIDGE to related boards
Remove test for CONFIG_MPC5200 in drivers/pci/pci_auto.c and define
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE in related board configuration files.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-04-13 18:03:29 -07:00
Kumar Gala
e99ccb4881 Introduce phys_size_t and move phys_addr_t into asm/types.h
Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
that have larger physical addresses like 44x, 85xx, and 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-13 17:13:46 -07:00
Andy Fleming
20a14a42a2 Rename include/md5.h to include/u-boot/md5.h
Some systems have md5.h installed in /usr/include/. This isn't the
desired file (we want the one in include/md5.h). This will avoid the
conflict. This fixes the host tools building problem by creating a new
directory for U-Boot specific header files.

[Patch by Andy Fleming, modified to use separate directory by Wolfgang
Denk]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
2008-04-13 17:02:51 -07:00
Dave Liu
f297b7a1ec drivers: code clean up
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-04-13 14:57:46 -07:00
Dave Liu
0ff7cba4a2 drivers: clean up the ata_piix.h
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-04-13 14:57:39 -07:00
Dave Liu
e8f7ba404f doc: english polishing for README.sata
according to gvb's suggestion, polishing for the doc.

Signed-off-by: Jerry Van Baren <gerald.vanbaren@ge.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-04-13 14:56:51 -07:00
Kumar Gala
3e3f766a52 Fix warnings introduced by I2C bus speed setting patch
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-13 14:54:16 -07:00
eran liberty
3c735e7437 Altera Stratix II support
Adds Support for Altera's Stratix II.

Within your board specific init file you will have to call

1. fpga_init (/* relocated code offset. usually => */ gd->reloc_off);
2. fpga_add (fpga_altera, (Altera_desc*)&altera_desc);

Altera_desc* contines (for example):
	{
	 Altera_StratixII,	/* part type */
	 passive_serial,	/* interface type */
	 1,			/* bytes of data part can accept */
	 (void *)(&funcs),	/* interface function table */
	 0L,			/* base interface address */
	 0			/* implementation specific cookie */
	 }

funcs is the interface. It is of type altera_board_specific_func.
It looks like this:
altera_board_specific_func func = {
	pre_fn,
	config_fn,
	status_fn,
	done_fn,
	clk_fn,
	data_fn,
	abort_fn,
	post_fn,
};

you will have to implement these functions, which is usually bit
banging some gpio.

Signed-off-by: Eran Liberty <liberty@extricom.com>
2008-04-13 14:52:48 -07:00
Wolfgang Denk
5ece9ec9f6 Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 14:32:54 -07:00
Sascha Hauer
5ad862166a Phytec Phycore-i.MX31 support
This patch adds support for the Phytec Phycore-i.MX31 board

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-13 14:29:18 -07:00
Sascha Hauer
caebc95be3 mx31 litekit support
This patch adds support for the mx31 litekit board

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-13 14:28:24 -07:00
Sascha Hauer
cdace06612 add an i2c driver for mx31
This patch adds an i2c driver for Freescale i.MX processors

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-13 14:21:43 -07:00
Sascha Hauer
9b56f4f030 core support for Freescale mx31
This patch adds the core support for Freescale mx31

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-13 14:20:47 -07:00
Wolfgang Denk
7ec68862a2 Fix compile error
...as suggested by Peter Pearse

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 14:19:23 -07:00
Sascha Hauer
5252ed9520 Separate omap24xx specific code from arm1136
Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136
to cpu/arm1136/omap24xx.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-13 14:15:15 -07:00
Mike Frysinger
1f1d88dd40 disable caches before booting an app for Blackfin apps
It isn't generally save to execute applications outside of U-Boot with caches
enabled due to the way the Blackfin processor handles caches (requires
software assistance).  This patch disables caches before booting an ELF or
just booting raw code.  The previous discussion on the patch was that we
wanted to use weaks instead, but that proved to not be feasible when multiple
symbols are involved, which puts us back at the ifdef solution.  I've
minimized the ugliness by moving the setup step outside of the main function.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-04-13 13:53:45 -07:00
Wolfgang Denk
e6dfed705e ppc: Get rid of unused machine type definitions
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 10:03:54 -07:00
Wolfgang Denk
1aeed8d71a Coding Style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 09:59:26 -07:00
Wolfgang Denk
8c8428a576 Merge branch 'master' of /home/wd/git/u-boot/custodians 2008-04-13 09:42:35 -07:00
Wolfgang Denk
d6f98e76a0 Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-04-13 09:40:35 -07:00
Wolfgang Denk
8258b6e2f5 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-04-13 09:39:26 -07:00
Wolfgang Denk
643de569b2 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-04-13 09:38:13 -07:00
Wolfgang Denk
034a40f876 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-13 09:34:11 -07:00
Wolfgang Denk
7cc399c86b Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2008-04-13 09:30:26 -07:00
Wolfgang Denk
58a3cbbf24 Merge branch 'master' of git://www.denx.de/git/u-boot-sparc 2008-04-13 09:21:00 -07:00
Larry Johnson
7754f33c6f LM73 bug fix for negative temperatures and cleanup
When the LM73 temperature sensor measures a temperature below 0 C, the
current driver does not perform sign extension, so the result returned is
512 C too high.  This patch fixes the problem, and does general cleanup
of the code.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-04-13 08:58:36 -07:00
Guennadi Liakhovetski
96ef831f71 cfi_flash: Support buffered writes on non-standard Spansion NOR flash
Some NOR flash chip from Spansion, for example, the s29ws-n MirrorBit
series require different addresses for buffered write commands. Define a
configuration option to support buffered writes on those chips. A more
elegant solution would be to automatically detect those chips by parsing
their CFI records, but that would require introduction of a fixup table
into the cfi_flash driver.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-04-12 08:59:09 +02:00
Lee Nipper
3f9c542d3d mpc83xx: Update DIMM data bus width test to support 40-bit width
32-bit wide ECC memory modules report 40-bit width.
Changed the DIMM data bus width test to 'less than 64' instead of 'equal 32'.

Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:18 -05:00
Dave Liu
5fb5a689d8 mpc83xx: Fix the bug of serdes initialization
Currently the serdes will not be initializated due to the
partid's error.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:18 -05:00
Dave Liu
2000784818 mpc83xx: Fix the SATA clock setting of 837x targets
Currently the SATA controller clock is configured as CSB clock,
usually the CSB clock is 400/333/266MHz.

However, The SATA IP block is only guaranteed to operate up to
200 MHz as stated in the HW spec.

The bug is reported by Joe D'Abbraccio <ljd015@freescale.com>

This patch makes the SATA clock as half of CSB clock.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:17 -05:00
Jean-Christophe PLAGNIOL-VILLARD
1ac4f320bf mpc837xerdb: Fix warning: implicit declaration of function 'fdt_fixup_dr_usb'
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:17 -05:00
Kumar Gala
97b3ecb575 85xx: Fix detection of MP cpu spin up
We were looking at the wrong memory offset to determine of a secondary
cpu had been spun up or not.  Also added a warning message if the
all the secondary cpus we expect don't spin up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-11 17:32:56 -05:00
Kumar Gala
f3e04bdc3f 85xx: Use SVR_SOC_VER instead of SVR_VER
The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-11 17:32:51 -05:00
Eugene O'Brien
5b2052e5f5 ppc4xx: Fix power mgt definitions for PPC440
Corrected DCR addresses of PPC440EP power management registers.

Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
2008-04-11 16:27:58 +02:00
Wolfgang Denk
950a392464 Revert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18:
Reverting became necessary after it turned out that the patches in
the u-boot-arm repo were modified, and in some cases corrupted.

This reverts the following commits:

	066bebd635
	7a837b7310
	c88ae20580
	a147e56f03
	d6674e0e2a
	8c8463cce4
	c98b47ad24
	8bf69d8178
	8c16cb0d3b
	a574a73852
	1377b5583a
	1704dc2091

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-11 15:11:26 +02:00
Stefan Roese
64e541f4c1 ppc4xx: Update Kilauea defconfig to use device-tree booting as default
This patch reworks the default environment on Kilauea/Haleakala. Now
"net_nfs" for exmaple uses the device-tree style booting formerly know
as "net_nfs_fdt". Also the addresses in RAM were changed because of the
new image booting support, which check for image overwriting. So the
addresses needed togeet adjusted.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-11 07:02:29 +02:00
Stefan Roese
756f5dacda ppc4xx: Fix Canyonlands default environment to work with new image support
Since the new image support checks for image overwriting, the default
environment needs to get adjusted to use correct addresses.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-09 11:58:02 +02:00
Stefan Roese
dfc6c7b647 ppc: Revert patch 70431e8a that used _start instead of CFG_MONITOR_BASE
The patch 70431e8a73 (Make MPC83xx one step
closer to full relocation.) doesn't use CFG_MONITOR_BASE anymore. But
on 4xx systems _start currently cannot be used for this calculation.
So revert back to the original version for now.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-09 11:54:11 +02:00
Michal Simek
f91374f65e microblaze: Sort microblaze boards in MAKEALL script 2008-04-08 15:38:15 +02:00
Michal Simek
62032deb72 microblaze: clean microblaze_config.mk
FLAGS are generated by U-BOOT generator.
Board specific FLAGS are in board directory

Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:15 +02:00
Michal Simek
cf5c679ca0 microblaze: xupv2p fix config file for supporting FDT 2008-04-08 15:38:15 +02:00
Michal Simek
188dc16b18 microblaze: ml401 fix config file for supporting FDT
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Michal Simek
4c6a6f02e2 microblaze: ml401 - add ifdef for GPIO
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Michal Simek
af7ae1a411 microblaze: clean uart16550 and uartlite handling
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Michal Simek
0b20f25087 microblaze: Add Emaclite driver to Makefile
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Michal Simek
868cde5310 microblaze: Add Emac driver to Makefile
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Michal Simek
6f961b4f46 microblaze: add Emac ethernet driver 2008-04-08 15:38:14 +02:00
Michal Simek
89c53891b1 microblaze: add Emaclite ethernet driver 2008-04-08 15:38:14 +02:00
Michal Simek
e5845e2122 microblaze: ML401 and XUPV2P remove emac and emaclite reference
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Michal Simek
6bf3e982ae microblaze: remove old setting for emac driver
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Michal Simek
cd2b75efb9 microblaze: Clean Makefile from ancient emac driver
Signed-off-by: Michal Simek <monstr@monstr.eu>
2008-04-08 15:38:14 +02:00
Daniel Hellstrom
ab68f921d9 SPARC/LEON2: added support for Gaisler simulator GRSIM/TSIM for SPARC/LEON2 targets. See www.gaisler.com for information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:33 +00:00
Daniel Hellstrom
6ed8a43a19 SPARC/LEON3: added support for GR-CPCI-AX2000 FPGA AX board. The FPGA is exchangeable but a standard LEON3 design is assumed. See www.gaisler.com for information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:33 +00:00
Daniel Hellstrom
6940383d9e SPARC/LEON3: added support for Altera NIOS Development kit (STRATIX II Edition) with GRLIB template design. See www.gaisler.com for information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
823edd8a66 SPARC/LEON3: added support for Gaisler GRSIM/TSIM2 SPARC/LEON3 simulatorn. See www.gaisler.com for information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
71d7e4c048 SPARC/LEON3: added support for GR-XC3S-1500 board with GRLIB template design. See www.gaisler.com for board information.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
b330990c2f SPARC: Added support for SPARC LEON2 SOC Processor.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
2a2fa797e6 SPARC/LEON3: Added AMBA Bus Plug&Play information print command (ambapp). It can print available cores (type: AHB Master, AHB Slave, APB Slave), their address ranges, IRQ number and version.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
1e9a164e22 SPARC: Added support for SPARC LEON3 SOC processor.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
bf3d8b3116 SPARC: added SPARC support for new uimage in common code.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
00ab32c854 SPARC: added SPARC board information to the command bdinfo.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Daniel Hellstrom
c2f02da21a SPARC: Added generic support for SPARC architecture.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-04-08 07:58:32 +00:00
Wolfgang Denk
aeff6d503b Merge branch 'master' of git://www.denx.de/git/u-boot-fdt 2008-04-08 00:20:52 +02:00
Wolfgang Denk
a1b215e2a2 Merge branch 'master' of git://www.denx.de/git/u-boot-at91 2008-04-08 00:16:36 +02:00
Wolfgang Denk
f9eabcb357 Merge branch 'master' of git://www.denx.de/git/u-boot-net 2008-04-08 00:11:22 +02:00
Wolfgang Denk
2c78febd11 Merge branch 'master' of git://www.denx.de/git/u-boot-coldfire 2008-04-08 00:10:17 +02:00
Wolfgang Denk
34e6cb8d1d Merge branch 'master' of git://www.denx.de/git/u-boot-blackfin 2008-04-08 00:06:47 +02:00
Wolfgang Denk
62479b1814 Merge branch 'master' of git://www.denx.de/git/u-boot-arm 2008-04-08 00:05:42 +02:00
Wolfgang Denk
5c395393cc Merge branch 'master' of git://www.denx.de/git/u-boot-sh 2008-04-08 00:04:39 +02:00
Wolfgang Denk
e59af4b611 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx
Conflicts:

	lib_ppc/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-07 23:59:10 +02:00
Wolfgang Denk
23c5189e6c Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-04-07 23:55:47 +02:00
Wolfgang Denk
6de5420370 Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx 2008-04-07 23:52:32 +02:00
Stefan Roese
e54ec0f016 ppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3
This patch fixes a problem with the RGMII setup of the 460GT. The 460GT
has 2 RGMII instances and we need to configure the 2nd RGMII instance
for the EMAC2+3 channels.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-03 14:50:34 +02:00
Jean-Christophe PLAGNIOL-VILLARD
c2a545ce33 MPC8xx: Fix libfdt support introduced in commit 77ff7b74
fdt.c: In function 'ft_cpu_setup':
fdt.c:33: warning: implicit declaration of function 'do_fixup_by_prop_u32'
fdt.c:39: warning: implicit declaration of function 'do_fixup_by_compat_u32'
fdt.c:43: warning: implicit declaration of function 'fdt_fixup_ethernet'
fdt.c:45: warning: implicit declaration of function 'fdt_fixup_memory'

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-02 11:07:20 -04:00
Andy Fleming
4abd844d8e Fix fdt set command to conform to dts spec
The fdt set command was treating properties specified as <00> and <0011>
as byte streams, rather than as an array of cells.  As we already have
syntax for expressing the desire for a stream of bytes ([ xx xx ...]),
we should use the <> syntax to describe arrays of cells, which are always
32-bits per element.  If we imagine this likely (IMHO) scenario:

> fdt set /ethernet-phy@1 reg <1>

With the old code, this would create a bad fdt, since the reg cell would be
made to be one byte in length.  But the cell must be 4 bytes, so this would
break mysteriously.

Also, the dts spec calls for constants inside the angle brackets (<>)
to conform to C constant standards as they pertain to base.
Take this scenario:

> fdt set /ethernet@f00 reg <0xe250000\ 0x1000>

The old fdt command would complain that it couldn't parse that.  Or, if you
wanted to specify that a certain clock ran at 33 MHz, you'd be required to
do this:

> fdt set /mydev clock <1f78a40>

Whereas the new code will accept decimal numbers.

While I was in there, I extended the fdt command parser to handle property
strings which are split across multiple arguments:

> fdt set /ethernet@f00 interrupts < 33 2 34 2 36 2 >
> fdt p /ethernet@f00
ethernet@f00 {
	interrupts = <0x21 0x2 0x22 0x2 0x24 0x2>;
};

Lastly, the fdt print code was rearranged slightly to print arrays of cells
if the length of the property is a multiple of 4 bytes, and to not print
leading zeros.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-04-02 11:07:15 -04:00
Stefan Roese
1c2926abdd ppc4xx: Canyonlands: Init SATA/PCIe port correctly
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
correctly configures the SATA/PCIe PHY for SATA usage when this jumper
is installed.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-02 08:39:33 +02:00
Kim Phillips
6fe2946f19 remove remaining CONFIG_OF_HAS_{UBOOT_ENV,BD_T} code
finish off what commit 43ddd9c820,
"Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T"
started.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-01 19:46:44 -04:00
Jean-Christophe PLAGNIOL-VILLARD
b5873f1732 dataflash: Move CONFIG_HAS_DATAFLASH to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-01 07:30:51 +02:00
Tor Krill
2d934ea51f Add Vitesse 8601 support to TSEC driver
Add phy_info for Vitesse VSC8601.
Add config option, CFG_VSC8601_SKEWFIX, to enable RGMII skew timing compensation.

Signed-off-by: Tor Krill <tor@excito.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-31 23:11:46 -04:00
Daniel Hellstrom
3eac6402a5 SPARC: added SMC91111 driver in and out macros for LEON processors.
This patch makes SPARC/LEON processors able to read and write
to the SMC91111 chip using the chip external I/O bus of the memory
controller. This patchs defines the standard in and out macros
expected by the SMC9111 driver.

To access that I/O bus one must set up the memory controller
(MCTRL or FTMCTRL) correctly. It is assumed that the user sets
up this correctly when the other MCTRL parameters are set up. It
can be set up from the board configuration header file.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-31 23:11:33 -04:00
Stelian Pop
3ca7c558eb Add maintainership information for AT91CAP9ADK and AT91SAM9260EK boards
Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:46:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
4e03dde84d AT91SAM9260EK: Move CONFIG_CMD_NAND to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-01 01:46:12 +02:00
Stelian Pop
0176d43e75 Add support for AT91SAM9260EK
Support for booting from internal DataFlash, external DataFlash card
or NAND flash is available.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:46:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
1762f13b4a AT91SAM9: Move CONFIG_HAS_DATAFLASH to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-01 01:46:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
761712188b AT91CAP9ADK: Move CONFIG_CMD_NAND to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-04-01 01:46:01 +02:00
Stelian Pop
983c1db04c Port AT91CAP9 to the new headers
Adapt the existing AT91CAP9 code to the new headers and APIs.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:45:50 +02:00
Stelian Pop
177e8a5ac8 Finish header files reworking
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.

This is part 2 of the replacement: more header imports and edits.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:45:48 +02:00
Stelian Pop
6d1dbbbf9f Import several header files from Linux
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.

This is part 1 of the replacement: pristine header files import.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:45:46 +02:00
Stelian Pop
a8a78f2d99 Move at91cap9 specific files to at91sam9 directory
AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a
common infrastructure can be used. Let this infrastructure be
named after the AT91SAM9 family, and move the existing AT91CAP9
files to the new place.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:44:18 +02:00
Stelian Pop
61106a5658 Use timer_init() instead of board supplied interrupt_init()
The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by
the board, so use timer_init() instead of interrupt_init().

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:44:05 +02:00
Stelian Pop
5604e2178c Cleanup DataFlash partition handling
DataFlash partition information has become a mess. This patch
defines a single partition scheme for Atmel DataFlashes. This partition
scheme will be used by all AT91CAP9 and AT91SAM9 boards.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-04-01 01:43:59 +02:00
TsiChung Liew
9b46432fc6 ColdFire: Fix alignment issue after CONFIG_IDENT_STRING in start.S
When the version_string function in start.S is not 4-byte align,
it will cause the compiler generates "unaligned opcodes detected
in executable segment". This issue affects all ColdFire CPUs.
By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if
it is not aligned.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:32 -06:00
TsiChung Liew
bae61eefe1 ColdFire: Add dspi and serial flash support for MCF5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:29 -06:00
TsiChung Liew
48ead7a7a9 ColdFire: Remove R5200 board
This board never went into production

Signed-off-by: Zachary P. Landau <zachary.landau@labxtechnologies.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:24 -06:00
Matthew Fettke
545c8e0a7c ColdFire: Added M5275EVB support.
Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:11 -06:00
Matthew Fettke
f71d9d91a2 ColdFire: Added MCF5275 cpu support.
Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:09:08 -06:00
TsiChung Liew
44e5b9edab ColdFire: Define bootdelay in configuration file for M52277EVB
Signed-off-by: Matt Wadel <Matt.Waddel@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:17:10 -05:00
TsiChung Liew
77878f16ce ColdFire: Fix second memory Chipselect for M5475EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:17:10 -05:00
TsiChung Liew
43d6064239 ColdFire: Update correct FLASHBAR and RAMBAR1 for MCF5282
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:17:10 -05:00
Larry Johnson
eb14ebe813 ppc4xx: Add CFG_MEM_TOP_HIDE to Denali SPD-based SDRAM setup
Signed-off-by: Larry Johnson <lrj@acm.org>
2008-03-31 12:20:59 +02:00
Stefan Roese
02e3892021 ppc4xx: Small whitespace fix of esd patches
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-31 12:20:48 +02:00
Matthias Fuchs
034394abb5 ppc4xx: Cleanup PMC440 board support
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-03-31 11:48:02 +02:00
Matthias Fuchs
a6cc6c3718 ppc4xx: Add ptm configuration variables for PMC440
Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms
environment variables.

Cleanup pci_target_init.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-03-31 11:47:36 +02:00
Matthias Fuchs
7c91f51a2f ppc4xx: Minor updates for DU440 boards
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-03-31 11:47:09 +02:00
Mike Frysinger
d5bffeb868 Blackfin: cleanup and overhaul common board init functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-30 15:51:22 -04:00
Mike Frysinger
b86b3416f8 Blackfin: cleanup lib_blackfin/cache.c
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-30 15:50:30 -04:00
Mike Frysinger
9171fc8172 Blackfin: unify cpu and boot modes
All of the duplicated code for Blackfin processors and boot modes have been
unified.  After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-30 15:50:19 -04:00
Stelian Pop
880cc4381e Fix CFG_NO_FLASH compilation.
Many Atmel boards have no "real" (NOR) flash on board, and rely only
on DataFlash and NAND memories. This patch enables CFG_NO_FLASH to
be present in a board configuration file, while still enabling flash
commands like 'flinfo', 'protect', etc.

Signed-off-by: Stelian Pop <stelian@popies.net>
2008-03-30 21:19:40 +02:00
Mike Frysinger
9ce7e53abd Blackfin: BF537-stamp: cleanup spi flash driver
This punts the old spi flash driver for a new/generalized one until the
common one can be integrated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-30 15:13:42 -04:00
Ben Warren
bb8e3cf25b Fix macro typo in common/cmd_mii.c
This typo was introduced in commit 233a8bcd94.  I
actually applied the wrong patch.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-30 11:34:34 -04:00
Jean-Christophe PLAGNIOL-VILLARD
f1b985f2d7 use correct at91rm9200 register name in m501sk board
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2.  This
makes code use the register name from chip datasheets.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-03-30 16:41:57 +02:00
David Brownell
480ed1dea1 use correct at91rm9200 register name
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2.  This
makes code use the register name from chip datasheets.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2008-03-30 15:38:05 +02:00
David Brownell
a3543d6dc5 add missing ARM boards to MAKEALL
Add some missing ARM boards to MAKEALL.  These build correctly,
unlike several of the boards already listed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2008-03-30 14:09:55 +02:00
Peter Pearse
066bebd635 Bracket READ_TIMER macro in cpu/arm1136/omap24xx/interrupts.c
to prevent compilation error.

Signed-off-by: Peter Pearse <peter.pearse@arm.com>
2008-03-30 11:34:09 +01:00
Guennadi Liakhovetski
7a837b7310 Support for the MX31ADS evaluation board from Freescale
This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by Freescale.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-03-30 11:32:30 +01:00
Sascha Hauer
c88ae20580 Phytec Phycore-i.MX31 support
This patch adds support for the Phytec Phycore-i.MX31 board

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-03-30 11:32:27 +01:00
Sascha Hauer
a147e56f03 mx31 litekit support
This patch adds support for the mx31 litekit board

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-03-30 11:32:24 +01:00
Sascha Hauer
d6674e0e2a add SMSC LAN9x1x Network driver
This patch adds a driver for the following smsc network controllers:
LAN9115
LAN9116
LAN9117
LAN9215
LAN9216
LAN9217

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-03-30 11:32:21 +01:00
Sascha Hauer
8c8463cce4 add an i2c driver for mx31
This patch adds an i2c driver for Freescale i.MX processors

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-03-30 11:32:16 +01:00
Sascha Hauer
c98b47ad24 core support for Freescale mx31
This patch adds the core support for Freescale mx31

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-03-30 11:30:43 +01:00
Sascha Hauer
8bf69d8178 Separate omap24xx specific code from arm1136
Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
2008-03-30 11:28:46 +01:00
Peter Pearse
8c16cb0d3b Add pmdra into MAKEALL
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
2008-03-30 11:23:05 +01:00
Pieter Voorthuijsen
a574a73852 Adds support for the Prodrive PMDRA board, based on a DM6441
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
2008-03-30 11:21:58 +01:00
Pieter Voorthuijsen
1377b5583a Removes all board specific code from the arch. part for DM644x (DaVinci) boards
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
2008-03-30 11:11:34 +01:00
Dirk Behme
1704dc2091 - Remove *_masked() functions as noted by Wolfgang
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a
delay of factor 16 (e.g 2 seconds became 32). While the
overflow fix is basically okay, it missed to divide udelay by
16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x)
macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com>
and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for
the hints & testing!

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>

Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
2008-03-30 11:09:01 +01:00
Andre Schwarz
ac3315c26e new PHY @ e1000 - 2nd try
Add 82541ER device with latest integrated IGP2 PHY.
Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-30 00:37:08 -04:00
Daniel Hellstrom
c2b7da5522 SPARC/LEON3: Added GRETH Ethernet 10/100/1000 driver.
GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
a debug link (EDCL). The GRETH core is documented in GRIP.pdf
available at www.gaisler.com.

If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
offloading etc.) can be determined by a bit in the control register.
The GBIT MAC is supported by operating in GRTEH 10/100 legacy mode.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-30 00:33:28 -04:00
Tsi-Chung Liew
233a8bcd94 Add CONFIG_MII_INIT in cmd_mii.c
Provide common configuration in do_mii() to execute mii_init()
for all cpu architectures

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-30 00:15:35 -04:00
Tsi-Chung Liew
f605479de2 ColdFire: Fix FEC transmit issue for MCF5275
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-30 00:15:34 -04:00
Aras Vaichas
d9a2f416d6 DHCP request fix for Windows Server 2003
Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional
delay before sending "DHCP Request" in net/bootp.c. Required to overcome
interoperability problems with Windows Server 200x DHCP server when U-Boot
client responds too fast for server to handle.

Signed-off-by: Aras Vaichas <arasv@magtech.com.au>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-30 00:09:49 -04:00
Gerald Van Baren
3596d55eb2 Merge git://www.denx.de/git/u-boot into uboot 2008-03-29 18:08:02 -04:00
Daniel Hellstrom
97bf85d784 MTD/CFI: flash_read64 is defined a weak function (for SPARC)
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.

For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.

Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2008-03-29 06:51:04 +01:00
Joakim Tjernlund
70431e8a73 Make MPC83xx one step closer to full relocation.
Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
and use GOT relative reference.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 18:51:54 -05:00
Michael Barkowski
5b2793a3f3 mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.

It also makes the board take MAC addresses, if found, from EEPROM.

User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr.  Any unused addresses should be zero.  This group of
four six-byte values should have it's CRC at the end.  crc32 and
eeprom commands can be used to accomplish this.

If CRC fails, MAC addresses come from the environment.  If CRC
succeeds, the environment is overwritten at startup.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00
Michael Barkowski
8f325cff31 mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
Commit 55774b512f broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.

This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00
Kim Phillips
e5c4ade4db mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code
in the spirit of commit 1ced121600,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display.  Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler.  Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:01:06 -05:00
Kim Phillips
81fd52c6c8 mpc83xx: display ddr frequency in board_add_ram_info banner
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:32:09 -05:00
Kim Phillips
35cf155c5e mpc83xx: unreinvent mem_clk
delete ddr_clk and use mem_clk instead.  Rename other ddr_*_clk to
mem_*_clk for consistency's sake.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:32:07 -05:00
Kim Phillips
730e792926 mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boards
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:31:23 -05:00
Dave Liu
2eeb3e4fc5 mpc83xx: enable the SATA interface on mpc837xemds board
Enable the first two SATA interfaces on MPC837xEMDS board,
The two SATA ports are on LYNX1. (SATA0/1 on J4/5)

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:15:44 -05:00
Dave Liu
6f8c85e8d1 mpc83xx: initialize serdes for MPC837xEMDS boards
This patch is stolen from Anton Vorontsov's patch
for mpc837xerdb boards.

The reference clk and xcorevdd voltage of serdes1/2
is same between mpc837xemds and mpc837xerdb.

8377E: LYNX1- 2 SATA	LYNX2- 2 PCIE
8378E: LYNX1- 2 SGMII	LYNX2- 2 PCIE
8379E: LYNX1- 2 SATA	LYNX2- 2 SATA

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:11:51 -05:00
Stefan Roese
cc8e839abc ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
displays the current configuration upon bootup and changes the PCIe
init loop, to only initialize the availabel PCIe slots.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-28 14:09:04 +01:00
Tor Krill
90447ecbba MTD/CFI: Add support for 16bit legacy AMD flash
Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback

Signed-off-by: Tor Krill <tor@excito.com>
2008-03-28 11:44:23 +01:00
Stefan Roese
5e12e75d17 ppc: Small change to CFG_MEM_TOP_HIDE description
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-28 11:02:53 +01:00
Nobuhiro Iwamatsu
280df59a8d sh: Add support stat structure and stat.h
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:14 +09:00
Mark Jonas
4be9eb789e sh: Removed warning when compiling drivers/serial/serial_sh.c.
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:14 +09:00
Nobuhiro Iwamatsu
f309fa3892 sh: Remove disable_ctrlc function from R7780MP
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
6f4b266ff2 sh: Add maintainer of R7780MP to MAINTAINER file
Update MAINTAINER entry for R7780MP. And fix maintainer's name.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
f5e2466f7b sh: Add support Renesas Solutions R2D plus board
R2D plus is SH reference board used with SH7751R.
This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
one PCI bus, VGA, and two Ethernet controller.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
e92c95180b sh: Add support SH4 cache control
Add support SH4 cache control and flash_cache function

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
28e5efde4d sh: Add support PCI host driver for SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
ab8f4d40d0 sh: Move SuperH PCI driver from cpu/sh4 to drivers/pci
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
5669332781 sh: Add support SuperH SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Mark Jonas
3313e0e262 sh: Added support for SH7720 based board MPR2.
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Nobuhiro Iwamatsu
3ecff1d70a sh: Fix receive FIFO level register of SH4A
Receive FIFO level register is different in SH4A.
Because register is different, cannot occasionally receive data.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Yusuke Goda
c133c1fb0b sh: Add support Renesas Solutions R7780MP
Renesas Solutions R7780MP is a reference board on SH7780.
This board has serial, 10/100 base Ethernet deivice, CF slot
and VGA devices. This board can set extension board.
Extension board has 10/100/1000 base Ethernet device, PCI slot,
S-ATA, iDVR slot.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Yusuke Goda
1a2334a4eb sh: Add support PCI of SuperH and SH7780
This patch add support PCI of SuperH base code and SH7780 specific code.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
Yusuke Goda
b55523efff sh: Add support SH7780
SH7780 is CPU of Renesas Technology.
This CPU has
 - CPU clock 400MHz
 - PCI support
 - DDR-SDRAM controller
 - etc ...

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:12 +09:00
goda.yusuke
c2042f5952 sh: Add support Renesas Solutions Migo-R board
Migo-R is a board based on SH7722 and has may devices.
In this patch, supported SCIF, NOR flash and Ethernet.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:11 +09:00
Bartlomiej Sieka
74d1e66d22 Fix host tool build breakage, take two
Revert commit 87c8431f and fix build breakage so that the build continues
to work on FC systems.

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-27 23:49:12 +01:00
Stefan Roese
7e4a0d25ed ppc4xx: Enable ECC on LWMON5
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.

We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 11:01:49 +01:00
Larry Johnson
6433fa202a ppc4xx: Updates to Korat-specific code
This patch contains updates for changes for the Korat PPC440EPx board.
These changes include:

(1) Support for "permanent" and "upgradable" copies of U-Boot, as
described in the new "doc/README.korat" file;

(2) a new memory map for the registers in the board's CPLD;

(3) a revised format for manufacturer's data in serial EEPROM; and

(4) changes to track updates to U-Boot for the Sequoia board.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-03-27 10:52:03 +01:00
Markus Brunner
f766cdf89b ppc4xx: PPC405EP Set EMAC noise filter bits
This bug was introduced with commit aee747f19b
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.

Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:47:28 +01:00
Mike Nuss
f66e2c8b25 ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPx
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.

Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
2008-03-27 10:38:54 +01:00
Haavard Skinnemoen
87c8431fe2 new-image: Fix host tool build breakage
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2008-03-27 10:30:45 +01:00
Stefan Roese
6fb4b64056 ppc: Set CFG_MEM_TOP_HIDE to 0 if not already defined
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:24:03 +01:00
Stefan Roese
9462732a3e ppc4xx: Add fdt support to Prodrive alpr
Since this board will probably be ported to arch/powerpc in the
near future, we add device tree support now. This way we are
"ready" for arch/powerpc from now on.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:20:02 +01:00
Pieter Voorthuijsen
511e4f9e7f ppc4xx: Enable cache support on the ALPR board
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
2008-03-27 10:19:57 +01:00
Stefan Roese
14f73ca679 ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.

This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:

CHIP_11: End of memory range area restricted access.
Category: 3

Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.

Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.

Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.

This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia

The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:

PMC440.h:
/* esd expects pram at end of physical memory.
 * So no logbuffer at the moment.
 */

It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:12:07 +01:00
Stefan Roese
c664bf8c3c ppc4xx: Fix Canyonlands linker script (remove bogus ASSERT)
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 10:09:05 +01:00
Stefan Roese
d56a3ce179 ppc4xx: Correctly pass phyiscal FLASH base address into dtb
The routine ft_board_setup() configures the EBC NOR mappings for the
Linux physmap_of driver. Since on 460EX/GT we remap the FLASH from
0x4.fc00.0000 to 0x4.cc00.0000 because of the max. 16MByte boot-CS
problem, we need to pass the corrected address here too.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
9ad31989de ppc4xx: Fix compilation warning in 4xx_enet.c
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
4c9e855734 ppc4xx: Add AMCC Glacier 406GT eval board support
This patch adds support for the AMCC Glacier 460GT eval board.
The main difference to the Canyonlands board are listed here:

- 4 ethernet ports instead of 2
- no SATA port
- no USB port

Currently EMAC2+3 are not working. This will be fixed in a later
release.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:41 +01:00
Stefan Roese
d8bd643141 ppc4xx: Mask 'vec' with 0x1f in uic_interrupt() for bit set/clear
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-27 09:54:03 +01:00
Wolfgang Denk
234ea73c66 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master 2008-03-27 00:19:13 +01:00
Anatolij Gustschin
b9670dd85b Fix out of tree building issue
Currently U-Boot building in some external directory
doesn't work. This patch tries to fix the problem.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:18:58 +01:00
Wolfgang Denk
38b189fe74 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-03-27 00:16:34 +01:00
Wolfgang Denk
0207fefa4d Merge branch 'master' of git://www.denx.de/git/u-boot-usb 2008-03-27 00:16:18 +01:00
Anatolij Gustschin
d4ee711d8a README: update documentation (availability, links, etc.)
Fix typo in README

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:13:42 +01:00
Anatolij Gustschin
e813eae3bf Fix compilation error in cmd_usb.c
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-27 00:12:56 +01:00
Timur Tabi
d8c82db482 Add support for setting the I2C bus speed in fsl_i2c.c
Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying
the I2C bus speed.  Current 8[356]xx boards define the CFG_I2C_SPEED macro,
but fsl_i2c.c ignores it and uses conservative value when programming the
I2C bus speed.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-03-27 00:09:17 +01:00
Wolfgang Denk
d049cc7f71 Coding style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-27 00:03:57 +01:00
Dave Liu
fd0b1fe3c3 drivers: add the support for Freescale SATA controller
Add the Freescale on-chip SATA controller driver to u-boot,
The SATA controller is used on the 837x and 8315 targets,
The driver can be used to load kernel, fs and dtb.

The features list:
- 1.5/3 Gbps link speed
- LBA48, LBA28 support
- DMA and FPDMA support
- Two ports support

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:58 +01:00
Dave Liu
bede87f4c8 ata: add the readme for SATA command line
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:55 +01:00
Dave Liu
cd54081cd4 ata: enable the sata initialize on boot up
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:54 +01:00
Dave Liu
69386383c5 ata: add the fis struct for SATA
Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:54 +01:00
Dave Liu
ffc664e80d ata: add the libata support
add simple libata support in u-boot

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:53 +01:00
Dave Liu
8e9bb43429 ata: make the ata_piix driver using new SATA framework
original ata_piix driver is using IDE framework, not real
SATA framework. For now, the ata_piix driver is only used
by x86 sc520_cdp board. This patch makes the ata_piix driver
use the new SATA framework, so

- remove the duplicated command stuff
- remove the CONFIG_CMD_IDE define in the sc520_cdp.h
- add the CONFIG_CMD_SATA define to sc520_cdp.h

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:52 +01:00
Dave Liu
c7057b529c ata: add the support for SATA framework
- add the SATA framework
- add the SATA command line

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:51 +01:00
Dave Liu
83c7f470a4 ata: merge the header of ata_piix driver
move the sata.h from include/ to drivers/block/ata_piix.h

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:50 +01:00
Dave Liu
9eef62804d ata: merge the ata_piix driver
move the cmd_sata.c from common/ to drivers/ata_piix.c,
the cmd_sata.c have some part of ata_piix controller drivers.
consolidate the driver to have better framework.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-03-26 23:38:48 +01:00
Markus Klotzbuecher
b9e749e953 USB, Storage: fix a bug introduced in commit
f6b44e0e4d that will cause usb_stor_info
to only print only information on one storage device, but not for
multiple.

Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-03-26 18:26:43 +01:00
Anatolij Gustschin
841e5edd16 Fix compilation error in cmd_usb.c
This patch fixes compilation error
cmd_usb.c: In function 'do_usb':
cmd_usb.c:552: error: void value not ignored as it ought to be

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-03-26 18:09:55 +01:00
Kumar Gala
dd6c910aad 85xx: Add cpu_mp_lmb_reserve helper to reserve boot page
Provide a board_lmb_reserve helper function to ensure we reserve
the page of memory we are using for the boot page translation code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
Kumar Gala
79679d8002 85xx: Update multicore boot mechanism to ePAPR v0.81 spec
The following changes are needed to be inline with ePAPR v0.81:

* r4, r5 and now always set to 0 on boot release
* r7 is used to pass the size of the initial map area (IMA)
* EPAPR_MAGIC value changed for book-e processors
* changes in the spin table layout
* spin table supports a 64-bit physical release address

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
Jon Loeliger
25eedb2c19 FSL: Clean up board/freescale/common/Makefile
Each file that can be built here now follows some
CONFIG_ option so that they are appropriately built
or not, as needed.  And CONFIG_ defines were added
to various board config files to make sure that happens.

The other board/freescale/*/Makefiles no longer need
to reach up and over into ../common to build their
individually needed files any more.

Boards that are CDS specific were renamed with cds_ prefix.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-26 11:43:04 -05:00
Kumar Gala
a5af4b358a 85xx: Fix merge duplication
ft_fixup_cpu() got duplicated in some merge snafu.  Remove the duplicate.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
James Yang
5893b3d0a4 85xx: Expand CCSR space with more DDR controller registers.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
James Yang
a3e77fa535 85xx: Speed up get_ddr_freq() and get_bus_freq()
get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were
called.  However, get_sys_info() recalculates extraneous information when
called each time.  Have get_ddr_freq() and get_bus_freq() return memoized
values from global_data instead.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
James Yang
e9ea679918 85xx: Show DDR memory data rate in addition to the memory clock frequency.
Show the DDR memory data rate in addition to the memory clock
frequency.  For DDR/DDR2 memories the memory data rate is 2x the
memory clock.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
James Yang
591933ca6e 85xx: get_tbclk() speed up and rounding fix
Speed up get_tbclk() by referencing pre-computed bus clock
frequency value from global data instead of sys_info_t.  Fix
rounding of result to nearest; previously it was rounding
upwards.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
Andy Fleming
1ced121600 Update SVR numbers to expand support
FSL has taken to using SVR[16:23] as an SOC sub-version field.  This
is used to distinguish certain variants within an SOC family.  To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value.  We also add SVR numbers for all
of the current variants.  Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-03-26 11:43:04 -05:00
Andy Fleming
b83eef440c Add the Freescale PCI device IDs
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-03-26 11:43:04 -05:00
Kumar Gala
7aff0c051a 85xx: Added support for multicore boot mechanism
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.

Added support for using the ePAPR defined spin-table mechanism on 85xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-03-26 11:43:03 -05:00
Kumar Gala
ec2b74ffd3 85xx: Added support for multicore boot mechanism
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.

Added support for using the ePAPR defined spin-table mechanism on 85xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:03 -05:00
Kumar Gala
f69766e4b5 85xx: Add the concept of CFG_CCSRBAR_PHYS
When we go to 36-bit physical addresses we need to keep the concept of
the physical CCSRBAR address seperate from the virtual one.

For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:03 -05:00
Wolfgang Denk
5b5eb9ca5b Coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 15:38:47 +01:00
Joakim Tjernlund
da8808df7a Add CFG_RTC_DS1337_NOOSC to turn off OSC output
The default settings for RTC DS1337 keeps the OSC
output, 32,768 Hz, on. This add CFG_RTC_DS1337_NOOSC to
turn it off.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2008-03-26 15:17:42 +01:00
Wolfgang Denk
438a4c1126 Cleanup coding style, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 11:48:46 +01:00
Wolfgang Denk
b951f8d317 Merge branch 'master_merge_new-image' of /home/tur/git/u-boot 2008-03-26 10:41:48 +01:00
Wolfgang Denk
218ca724c0 README: update documentation (availability, links, etc.)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 10:40:12 +01:00
Bartlomiej Sieka
27f33e9f45 Merge branch 'new-image' of git://www.denx.de/git/u-boot-testing
Conflicts:

	common/cmd_bootm.c
	cpu/mpc8xx/cpu.c

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-26 09:38:06 +01:00
Aras Vaichas
f6b44e0e4d USB Storage, add meaningful return value
This patch changes the "usb storage" command to return success if it
finds a USB storage device, otherwise it returns error.

Signed-off-by: Markus Klotzbuecher <mk@denx.de>
2008-03-26 09:23:23 +01:00
Anton Vorontsov
18e69a35ef 83xx/fdt_support: let user specifiy FSL USB Dual-Role controller role
Linux understands "host" (default), "peripheral" and "otg" (broken).
Though, U-Boot doesn't restrict dr_mode variable to these values (think
of renames in future).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:19:39 -05:00
Anton Vorontsov
c7604783b2 tsec: fix link detection for the RTL8211B PHY
RTL8211B sets link state register after autonegotiation complete,
so with bootdelay=0 RTL8211B will report lack of the link.

To fix this, we should wait for aneg to complete, even if the
link is currently down.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:48 -05:00
Anton Vorontsov
7fa9cbb00d mpc83xx: add "fsl,soc" and "fsl,immr" compatible fixups
device_type = "soc" is being deprecated, newer device trees will use
"fsl,soc" and/or "fsl,immr" for the soc nodes.

This patch also adds clock-frequency property for soc nodes (the same
value as bus-frequency).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:48 -05:00
Joe D'Abbraccio
507e2d79c9 Modified the DDR SDRAM clock control register to delay MCK/MCK_B 3/4 clock
With the original value of 1/2 clock cycle delay, the system ran relatively
stable except when we run benchmarks that are intensive users of memory.
When I run samba connected disk with a HDBENCH test, the system locks-up
or reboots sporadically.

Signed-off by: Joe D'Abbraccio <Joe.D'abbraccio@freescale.com>
2008-03-25 19:16:48 -05:00
Scott Wood
a7ba32d480 mpc83xx: Set PCI I/O bus-address base to zero.
The device trees for these boards describe PCI I/O as starting from
address zero from the device's perspective.

Placing I/O elsewhere may cause problems with certain PCI boards, and may
cause problems with Linux.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-03-25 19:16:48 -05:00
Anton Vorontsov
f700e7df7f mpc83xx: MPC8360E-RDK: use 33.3(3)MHz CLKIN/SYS_CLK
At least on the "33MHz Pilot" board crystal is actually 33.3MHz.
This patch fixes "system time drifting" problem.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
3a0cfdd576 mpc83xx: MPC8360E-RDK: define CONFIG_OF_STDOUT_VIA_ALIAS
This is needed to update /choosen/linux,stdout-path properly.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
3419eb62f0 mpc83xx: MPC8360E-RDK: add dhcp command
Plus modify environment to use it and remove bootfile env variable,
it is internal and CONFIG_BOOTFILE is used for these purposes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
d892b2dbb4 mpc83xx: MPC8360E-RDK: rework ddr setup, enable ecc
Current DDR setup easily causes memory corruption, this patch fixes it.

Also fix TIMING_CFG0_MRS_CYC definition.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
d47d49cc37 mpc83xx: MPC8360E-RDK: configure pario pins for AD7843 and FHCI
This patch adds qe pario pins configuration for AD7843 ADC/Touchscreen
controller and FHCI (QE USB).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:47 -05:00
Anton Vorontsov
7ad9594909 mpc83xx: MPC8360E-RDK: add support for NAND
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
9a3e832aeb mpc83xx: MPC8360E-RDK: use RGMII_RXID interface mode
This is needed for BCM PHYs to work on this board.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
300615dc5d uec: add support for Broadcom BCM5481 Gigabit PHY
This patch adds basic support for Broadcom BCM5481 PHY.

RXD-RXC delay quirk comes from MPC8360E-RDK BSP source, author is
Peter Barada <peterb@logicpd.com>.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
6a600c3a18 uec: add support for RGMII_RXID interface mode
PHY drivers will use it to setup software delay between RXD and RXC
signals.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:46 -05:00
Anton Vorontsov
91cdaa3a9d uec: add support for gbit mii status readings
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
aabce7fb50 83xx: define CONFIG_OF_STDOUT_VIA_ALIAS for the MPC837XERDB boards
This is primarily for the early console support.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
2bd7460e92 83xx: initialize serdes for MPC837XRDB boards
On the MPC8377ERDB: 2 SATA and 2 PCI-E.
On the MPC8378ERDB: 2 PCI-E
On the MPC8379ERDB: 4 SATA

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
453316a2a1 83xx: serdes setup routines
This patch adds few routines to configure serdes on 837x targets.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Anton Vorontsov
a796cdf9c3 83xx: split COBJS onto separate lines
..plus get rid of some #ifdefs in the .c files.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:44 -05:00
Anton Vorontsov
46a3aeea73 83xx: nand support for MPC837XRDB boards
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:44 -05:00
Jerry Van Baren
82e45a2041 Enable CONFIG_FLASH_SHOW_PROGRESS on the MPC8360EMDS.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
0fa7a1b471 mpc8323erdb: remove RTC and add EEPROM
There's no on-board RTC on the MPC8323ERDB, but there is an EEPROM.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
5bbeea86eb mpc8323erdb: Improve the system performance
The following changes are based on kernel UCC ethernet performance:

1.  Make the CSB bus pipeline depth as 4, and enable the repeat mode
2.  Optimize transactions between QE and CSB.  Added CFG_SPCR_OPT
    switch to enable this setting.

The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:

3.  CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4.  CS0_CONFIG[ODT_WR_CONFIG] set to 1.  Was a reserved setting
    previously.
5.  TIMING_CFG_1[WRREC] is changed from 3clks to 2clks  (based on
    Twr=15ns, and this was already the setting in DDR_MODE)
6.  TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
    Trp=15ns)
7.  TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
    Tras=40ns)
8.  TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
    Trcd=15ns)
9.  TIMING_CFG_1[REFREC] changed from 21 clks to 11clks.  (based on
    Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks.  (based
    on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
    on CL=3 and WL=2).

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:44 -05:00
Michael Barkowski
fc549c871f mpc8323erdb: use readable DDR config macros
Use available shift/mask macros to define DDR configuration.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:43 -05:00
Timur Tabi
89c7784ed9 83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware.  Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-25 19:16:43 -05:00
Timur Tabi
b55d98c6d5 NET: Add Vitesse VSC7385 firmware uploading
The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX
and other boards.  A small firwmare must be uploaded to its on-board memory
before it can be enabled.  This patch adds the code which uploads firmware
(but not the firmware itself).

Previously, this feature was provided by a U-Boot application that was
made available only on Freescale BSPs.  The VSC7385 firmware must still
be obtained separately, but at least there is no longer a need for a separate
application.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2008-03-25 19:16:43 -05:00
Wolfgang Denk
aa6f6d171a Coding Style cleanyp; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 00:52:10 +01:00
Wolfgang Denk
6525489323 Merge branch 'master' of git://www.denx.de/git/u-boot-mips 2008-03-26 00:44:52 +01:00
Wolfgang Denk
08e9443230 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx 2008-03-26 00:44:32 +01:00
Jerry Van Baren
43ddd9c820 Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T
These defines embedded the u-boot env variables and/or the bd_t structure
in the fdt blob.  The conclusion of discussion on the u-boot email list
was that embedding these in the fdt blob is not useful: there are better
ways of passing the data (in fact, the fdt blob itself replaces the
bd_t struct).

The only board that enables these is the stxxtc and they don't appear
to be used by linux.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-26 00:22:39 +01:00
Stefan Roese
22ed228574 rtc: Remove 2nd reference to max6900.o in drivers/rtc/Makefile
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-26 00:06:19 +01:00
Kyungmin Park
1bb707c39a Add Flex-OneNAND booting support
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.

Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2008-03-26 00:05:32 +01:00
André Schwarz
c512389cc4 MPC5200: support setup without FEC
Include FEC specific nodes in ft_cpu_setup only if CONFIG_MPC5xxx_FEC is
defined. Systems without FEC, i.e. no FEC node in DTB, should be possible.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2008-03-25 23:59:43 +01:00
Jon Loeliger
aa3511e422 FSL: Move board/mpc8266ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:40 +01:00
Jon Loeliger
7f1d846e5c FSL: Move board/mpc7448hpc2 under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:36 +01:00
Jon Loeliger
b7e24d283e FSL: Move board/mpc8260ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 23:00:00 +01:00
goda.yusuke
6a8a5dc475 net: Add support AX88796L ethernet device
AX88796L is device of NE2000 compatible.
This patch support AX88796L ethernet device.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-25 22:55:15 +01:00
Wolfgang Denk
e0a6140dd3 ne2000 driver: change #ifdef to Makefile conditional compilation
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-25 22:50:41 +01:00
goda.yusuke
e710185aae net: Divided code of NE2000 ethernet driver
There are more devices of the NE2000 base.
A present code is difficult for us to support more devices.
To support more NE2000 clone devices, separated the function.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-25 22:48:58 +01:00
Mike Frysinger
395bce4f59 net/Blackfin: move on-chip MAC driver into drivers/net/
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board
directory, but it is not board specific, so relocate it to the drivers dir
so that other Blackfin ports can utilize it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-25 22:35:26 +01:00
Mike Frysinger
8a30b47009 smc91111: use SSYNC() rather than asm(ssync) for Blackfin
Since the "ssync" instruction may have hardware anomalies associated with
it, have the smc91111 driver use the SSYNC macro rather than invoking it
directly.  We workaround all the anomalies via this macro.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-25 22:32:25 +01:00
Bryan O'Donoghue
77ff7b7444 8xx: Update OF support on 8xx
This patch does some shifting around of OF support on 8xx.

Signed-off-by: Bryan O'Donoghue <bodonoghue@codehermit.ie>
2008-03-25 22:28:34 +01:00
Kumar Gala
9c666a7db0 ppc: Allow boards to specify how much memory they can map
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS.  However newer boards are capable of
mapping more memory (for example 85xx is capble of doing up to 2G).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-25 22:26:11 +01:00
Bryan O'Donoghue
a6f5f317cd 8xx : Add OF support to Adder875 board port - resubmit
Signed-off-by: Bryan O'Donoghue <bodonoghue@codehermit.ie>
2008-03-25 22:20:36 +01:00
Kumar Gala
d058698fd2 Add setexpr command
Add a simple expr style command that will set an env variable as the result
of the command.  This allows us to do simple math in shell.  The following
operations are supported: &, |, ^, +, -, *, /.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-25 22:16:15 +01:00
Jon Loeliger
3f105faa64 FSL: Move board/mpc7448hpc2 under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 09:51:43 -05:00
Jon Loeliger
449c703374 FSL: Move board/mpc8266ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 09:51:43 -05:00
Jon Loeliger
5863577989 FSL: Move board/mpc8260ads under board/freescale
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-03-25 09:51:43 -05:00
Shinya Kuribayashi
8a77398395 [MIPS] Move gth2_config from ARM section to MIPS
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:08 +09:00
Shinya Kuribayashi
373b16fc0c [MIPS] Extend MIPS_MAX_CACHE_SIZE upto 64kB
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:07 +09:00
Shinya Kuribayashi
d98e348e2e [MIPS] Fix dcache_status()
You can't judge UNCACHED by Config.K0 LSB.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:07 +09:00
Shinya Kuribayashi
b0c66af53e [MIPS] Introduce _machine_restart
Handles machine specific functions by using weak functions.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:07 +09:00
Shinya Kuribayashi
decaba6f5c [MIPS] Cleanup CP0 Status initialization
Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:07 +09:00
Shinya Kuribayashi
d43d43ef28 [MIPS] Initialize CP0 Cause before setting up CP0 Status register
Without this change, we'll be suffering from deffered WATCH exception
once Status.EXL is cleared. Make sure Cause.WP is cleared.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:07 +09:00
Shinya Kuribayashi
2613862323 [MIPS] INCA-IP: Move watchdog init code from start.S to lowlevel_init()
Move things to appropriate place.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:07 +09:00
Shinya Kuribayashi
ccf8f824ef [MIPS] Implement flush_cache()
We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you
don't need to do Hit_Invalidate_I, but flush_cache() needs it since this
function is used not only in U-Boot specfic programs but also at loading
target binaries.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:06 +09:00
Shinya Kuribayashi
2e0e5271aa [MIPS] Fix I-/D-cache initialization loops
Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I
again per a loop for I-cache initialization. But according to 'See MIPS
Run', we're encouraged to use three separate loops rather than combining
them *for both I- and D-cache*. This patch tries to fix this.

In accordance with fixing above, mips_init_[id]cache are separated from
mips_cache_reset(), and rewrite cache loops are completely rewritten with
useful macros.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:06 +09:00
Shinya Kuribayashi
1898840797 [MIPS] Replace memory clearance code with f_fill64
This routine fills memory with zero by 64 bytes, and is 64-bit capable.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:06 +09:00
Shinya Kuribayashi
2f5d414ccb [MIPS] cpu/mips/cache.S: Introduce NESTED/LEAF/END macros
This patch replaces the current function definitions with NESTED, LEAF
and END macro. They specify some more additional information about the
function; an alignment of symbol, type of symbol, stack frame usage, etc.
These information explicitly tells the assembler and the debugger about
the types of code we want to generate.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 21:30:06 +09:00
Shinya Kuribayashi
282223a607 [MIPS] asm headers' updates
Make some asm headers adjusted to the latest Linux kernel.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-03-25 11:43:17 +09:00
Shinya Kuribayashi
e1390801a3 [MIPS] Request for the 'mips_cache_lock()' removal
The initial intension of having mips_cache_lock() was to use the cache
as memory for temporary stack use so that a C environment can be set up
as early as possible.

But now mips_cache_lock() follow lowlevel_init(). We've already have the
real memory initilaized at this point, therefore we could/should use it.
No reason to lock at all.

Other problems:

Cache locking is not consistent across MIPS implementaions. Some imple-
mentations don't support locking at all. The style of locking varies -
some support per line locking, others per way, etc. Some parts use bits
in status registers instead of cache ops. Current mips_cache_lock() is
not necessarily general-purpose.

And this is worthy of special mention; once U-Boot/MIPS locks the lines,
they are never get unlocked, so the code relies on whatever gets loaded
after U-Boot to re-initialize the cache and clear the locks. We're sup-
posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
but leave the situation as it is for a long time.

For these reasons, I proposed the removal of mips_cache_lock() from the
global start-up code.

This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
*things have changed*. If he wants the same behavior as before, he needs
to have CFG_INIT_RAM_LOCK_MIPS in his config file.

If we don't have any regression report through several releases, then
we'll remove codes entirely.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Acked-by: Andrew Dyer <amdyer@gmail.com>
2008-03-25 11:39:29 +09:00
Yuri Tikhonov
0d48926c87 lwmon5 SYSMON POST: fix backlight control
If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be
run on the board, then the SYSMON POST controls the display backlight
(doesn't switch backlight ON if POST FAILED, and does switch the
backlight ON if PASSED).

If not, then the video driver controls the display backlight (just
switch ON the backlight upon initialization).

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-25 00:16:14 +01:00
Yuri Tikhonov
ff2bdfb2c1 lwmon5 SYSMON POST: fix handling of negative temperatures
Fix errors in the LWMON5 Sysmon POST for negative temperatures.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-25 00:14:46 +01:00
Wolfgang Denk
b38d7fc2f1 Merge branch 'master' of /home/wd/git/u-boot/master/ 2008-03-25 00:12:54 +01:00
Nobuhiro Iwamatsu
55774b512f pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.

When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
use this patch.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Stefan Roese <sr@denx.de>
2008-03-23 01:38:22 +01:00
Wolfgang Denk
47310715f4 Merge branch 'master' of git://www.denx.de/git/u-boot-tq-group 2008-03-23 00:57:40 +01:00
Wolfgang Denk
e334e05ba0 Merge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash 2008-03-23 00:53:43 +01:00
Wolfgang Denk
161efeb011 Merge branch 'master' of git://www.denx.de/git/u-boot-fdt 2008-03-23 00:52:58 +01:00
Wolfgang Denk
6887cb6817 Merge branch 'master' of /home/wd/git/u-boot/work 2008-03-22 23:27:43 +01:00
Yuri Tikhonov
86aea3eaef LWMON5: fix dsPIC POST
Add test for DPIC_SYS_ERROR_REG to be zero in the LWMON5 dsPIC POST.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com> ---
2008-03-22 23:26:08 +01:00
Gerald Van Baren
01026a6e61 Merge git://www.denx.de/git/u-boot into uboot 2008-03-21 11:58:22 -04:00
Gerald Van Baren
493a2b1dc9 Merge git://www.denx.de/git/u-boot into uboot 2008-03-21 11:42:54 -04:00
Bartlomiej Sieka
388b82fddc [new uImage] Enable new uImage support for the pcs440ep board.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-20 23:23:13 +01:00
Bartlomiej Sieka
95f4ec2b9c [new uImage] Do not compile new uImage format support by default
Disable default building of new uImage format support in preparation
for merge with the master. Support for new format can be enabled on
a per-board basis, by defining the following in the board's config file:

#define CONFIG_FIT             1
#define CONFIG_OF_LIBFDT       1

This can be optionally defined to give more verbose output:

#define CONFIG_FIT_VERBOSE     1 /* enable fit_format_{error,warning}() */

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-20 23:23:13 +01:00
Bartlomiej Sieka
dafaede8a4 [new uImage] Disable debuging output in preparation for merge with master
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-20 23:20:31 +01:00
Bartlomiej Sieka
fbe7a15502 [new uImage] Compilation and new uImage handling fixes for imxtract
Fix imxtract command not being compiled-in despite CONFIG_CMD_XIMG being in
include/config_cmd_default.h. Fix few warnings and handling of new format
images.

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-20 23:20:31 +01:00
Bartlomiej Sieka
36cc8cbb33 [new uImage] Fix autoscr command used with new uImage format
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-20 23:10:19 +01:00
Bartlomiej Sieka
43142e817f [new uImage] Fix *.its files location in documentation
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-20 23:10:19 +01:00
Wolfgang Denk
81a0ac62ea lwmon5 POST: remove unreachable code
plus some coding style cleanup

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-20 22:01:38 +01:00
Yuri Tikhonov
b73a19e160 LWMON5: POST RTC fix
Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
  0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
      and so on).

The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.

The POST RTC test was modified to detect the RTC faults utilizing
this new rtc_get() feature.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-20 21:48:46 +01:00
Martin Krause
a5cc5555cc TQM5200B: update MTD partition layout
- insert partition for dtb blob to TQM5200B MTD layout
- set env variables dependent on the configured board
  (TQM5200 or TQM5200B)

Signed-off-by: Martin Krause <martin.krause@tqs.de>
2008-03-19 14:33:17 +01:00
Stefan Roese
f0105727d1 CFI: Small cleanup for FLASH_SHOW_PROGRESS
With this patch we don't need that many #ifdef's in the code. It moves
the subtraction into the macro and defines a NOP-macro when
CONFIG_FLASH_SHOW_PROGRESS is not defined.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2008-03-19 13:41:25 +01:00
Jerry Van Baren
9a042e9ca5 Flash programming progress countdown.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-03-19 13:41:25 +01:00
Bartlomiej Sieka
5e339fd9ed [new uImage] Fix style issue spotted by Wolfgang Denk <wd@denx.org>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-19 10:00:06 +01:00
David Gibson
11abe45c48 libfdt: Remove no longer used code from fdt_node_offset_by_compatible()
Since fdt_node_offset_by_compatible() was converted to the new
fdt_next_node() iterator, a chunk of initialization code became
redundant, but was not removed by oversight.  This patch cleans it up.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2008-03-18 21:03:45 -04:00
David Gibson
d0ccb9b140 libfdt: Trivial cleanup for CHECK_HEADER)
Currently the CHECK_HEADER() macro is defined local to fdt_ro.c.
However, there are a handful of functions (fdt_move, rw_check_header,
fdt_open_into) from other files which could also use it (currently
they open-code something more-or-less identical).  Therefore, this
patch moves CHECK_HEADER() to libfdt_internal.h and uses it in those
places.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2008-03-18 21:03:45 -04:00
Kumar Gala
fe30a354cd Fix fdt boardsetup command parsing
The introduciton of the 'fdt bootcpu' broke parsing for 'fdt boardsetup'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-18 21:03:45 -04:00
Kumar Gala
804887e600 Add sub-commands to fdt
fdt header                          - Display header info
fdt bootcpu <id>                    - Set boot cpuid
fdt memory <addr> <size>            - Add/Update memory node
fdt rsvmem print                    - Show current mem reserves
fdt rsvmem add <addr> <size>        - Add a mem reserve
fdt rsvmem delete <index>           - Delete a mem reserves

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-18 21:03:45 -04:00
David Gibson
f84d65f9b0 libfdt: Fix NOP handling bug in fdt_add_subnode_namelen()
fdt_add_subnode_namelen() has a bug if asked to add a subnode to a
node which has NOP tags interspersed with its properties.  In this
case fdt_add_subnode_namelen() will put the new subnode before the
first NOP tag, even if there are properties after it, which will
result in an invalid blob.

This patch fixes the bug, and adds a testcase for it.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2008-03-18 21:03:45 -04:00
David Gibson
ae0b5908de libfdt: Add and use a node iteration helper function.
This patch adds an fdt_next_node() function which can be used to
iterate through nodes of the tree while keeping track of depth.  This
function is used to simplify the iteration code in a lot of other
functions, and is also exported for use by library users.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2008-03-18 21:03:45 -04:00
David Gibson
9eaeb07a71 libfdt: Add fdt_set_name() function
This patch adds an fdt_set_name() function to libfdt, mirroring
fdt_get_name().  This is a r/w function which alters the name of a
given device tree node.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2008-03-18 21:03:45 -04:00
Yuri Tikhonov
23e20aa648 lwmon5: Fix register test logic to match the specific GDC h/w.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:49 +01:00
Yuri Tikhonov
46bc0a9387 Fix backlight in the lwmon5 POST.
Backlight was switched on even when temperature was too low.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
3d61018643 The patch introduces the alternative configuration of the log buffer for the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory), the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ..., PPC440EPX_GPT0_COMP5).
To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).

 The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
0f009f781b Add support for the lwmon5 board reset via GPIO58.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
f694e32f93 Some fixes to dspic, fpga, and gdc post tests for lwmon5. Disable external watch-dog for now.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
b428f6a8c6 The patch introduces the CRITICAL feature of POST tests. If the test marked as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
8f15d4addd The patch adds new POST tests for the Lwmon5 board. These are:
* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:47 +01:00
Yuri Tikhonov
c2ed33efbf Enable CODEC POST with CFG_POST_CODEC rather than with CFG_POST_DSP.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
2008-03-18 22:24:47 +01:00
Wolfgang Denk
fdeb932b1c Merge branch 'master' of git://www.denx.de/git/u-boot-blackfin 2008-03-18 22:15:58 +01:00
Yuri Tikhonov
3a5d1e7f13 lwmon5: Fix register test logic to match the specific GDC h/w.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:05:37 +01:00
Yuri Tikhonov
0f855a1f05 Fix backlight in the lwmon5 POST.
Backlight was switcehd on even when temperature was too low.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:04:06 +01:00
Yuri Tikhonov
2d991958b1 The patch introduces the alternative configuration of the log buffer for
the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory),
the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ...,
PPC440EPX_GPT0_COMP5).

 To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).

 The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:24 +01:00
Yuri Tikhonov
ff818b21b0 Add support for the lwmon5 board reset via GPIO58.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:24 +01:00
Yuri Tikhonov
603f194e5a Some fixes to dspic, fpga, and gdc post tests for lwmon5.
Disable external watch-dog for now.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Yuri Tikhonov
e262efe357 The patch introduces the CRITICAL feature of POST tests. If the test
marked as POST_CRITICAL fails then the alternative, post_critical,
boot-command is used. If this command is not defined then U-Boot
enters into interactive mode.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Yuri Tikhonov
65b20dcefc The patch adds new POST tests for the Lwmon5 board.
These are:

* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Yuri Tikhonov
8dc3b2303d Enable CODEC POST with CFG_POST_CODEC rather than with CFG_POST_DSP.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
2008-03-18 21:59:23 +01:00
Wolfgang Denk
3515fd18d4 HMI1001: fix compile problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-18 17:35:51 +01:00
Mike Frysinger
1f2a997010 Blackfin: BF537-stamp: drop board-specific flash driver for CFI
The parallel flash on the BF537-STAMP is CFI compliant, so there is no need
for the board specific driver at all.  Just use the common CFI driver.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-15 22:17:21 -04:00
Mike Frysinger
5b22163fef Blackfin: add proper ELF markings to some assembly functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-15 22:14:57 -04:00
Mike Frysinger
cf675d3b2b Blackfin: new cplbinfo command for viewing cplb tables
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-15 22:14:54 -04:00
Mike Frysinger
aadb72503c Blackfin: update MAINTAINERS list
Add maintainer information for the Blackfin boards.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-15 22:14:49 -04:00
Mike Frysinger
f7ce12cb65 Blackfin: convert BFIN_CPU to CONFIG_BFIN_CPU
Stop tying things to the processor that should be tied to other defines and
change BFIN_CPU to CONFIG_BFIN_CPU so that it can be used in the build
system to select the -mcpu option.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-15 22:14:14 -04:00
Mike Frysinger
86a20fb920 Blackfin: move bootldr command to common code
This moves the Blackfin-common bootldr command out of the BF537-STAMP
specific board directory and into the common directory so that all Blackfin
boards may utilize it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2008-03-15 22:13:58 -04:00
Wolfgang Denk
e95bcc3661 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master
Conflicts:

	drivers/rtc/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-16 01:50:18 +01:00
Heiko Schocher
decbe029b2 mgcoge: update configuration
Fix configuration for mgcoge board

Signed-off-by: Heiko Schocher <hs@denx.de>
2008-03-16 01:26:27 +01:00
Wolfgang Denk
c136724cda drivers/rtc/Makefile: keep list sorted
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-16 01:22:59 +01:00
Tor Krill
9536dfcce0 Add support for Intersil isl1208 RTC
Signed-off-by: Tor Krill <tor@excito.com>
2008-03-16 01:21:30 +01:00
Jean-Christophe PLAGNIOL-VILLARD
0210cff3d0 cramfs: Fix ifdef
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-03-16 01:18:45 +01:00
Wolfgang Denk
0b8f2a2786 Conding style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-16 01:12:58 +01:00
Stefan Roese
41712b4e8c ppc4xx: Add USB OHCI support to AMCC Canyonlands 460EX eval board
This patch adds USB OHCI support to the Canyonlands board port. It also
enables EXT2 support.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:05 +01:00
Stefan Roese
2596f5b9d3 usb: Add CFG_OHCI_USE_NPS to common USB-OHCI driver
This patch adds CFG_OHCI_USE_NPS to the common USB-OHCI driver. This
way a board just needs to define this new option to enable the "force
NoPowerSwitching mode" instead of adding new CPU/architecture defines
to the USB source itself.

This new option will be used first with the new AMCC 460EX Canyonlands
board port, which will be posted in a few days.

This patch also fixes a small compilation problem when DEBUG is enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:05 +01:00
Stefan Roese
71665ebf88 ppc4xx: Add Canyonlands NAND booting support
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.

This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.

Tested with 512 byte page NAND device (32MByte) on Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:05 +01:00
Stefan Roese
c813f1f835 ppc4xx: Add AMCC Canyonlands support (460EX) (3/3)
This patch adds support for the AMCC Canyonlands 460EX evaluation
board.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:05 +01:00
Stefan Roese
6983fe21f7 ppc4xx: Add AMCC Canyonlands support (460EX) (2/3)
This patch adds support for the AMCC Canyonlands 460EX evaluation
board.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
8e1a3fe545 ppc4xx: Add AMCC Canyonlands support (460EX) (1/3)
This patch adds support for the AMCC Canyonlands 460EX evaluation
board.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
43c60992cd ppc4xx: Add basic support for AMCC 460EX/460GT (5/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
6f2eb3f3d8 ppc4xx: Add basic support for AMCC 460EX/460GT (4/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
999ecd5aca ppc4xx: Add basic support for AMCC 460EX/460GT (3/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
2801b2d2a9 ppc4xx: Add basic support for AMCC 460EX/460GT (2/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
8ac41e3e37 ppc4xx: Add basic support for AMCC 460EX/460GT (1/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Stefan Roese
56e4101783 ppc4xx: interrupt.c reworked
This patch is a rework of the 4xx interrupt handling done while
adding the 460EX/GT support. Interrupts are needed on 4xx for the
EMAC driver.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Stefan Roese
84a999b6cd ppc4xx: program_tlb now uses 64bit physical addess
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Stefan Roese
c3307fa186 ppc4xx: miiphy.c reworked
While adding the 460EX/GT support I reworked the 4xx miiphy code. It
badly neede some cleanup.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Stefan Roese
88aff62df3 rtc: Add M41T62 support
This patch add support for the STM M41T62 RTC. It is used and tested
on the AMCC Canyonlands 406EX platform.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Niklaus Giger
217d383e20 ppc4xx: Add 405GPr based MCU25 board specific files
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2008-03-15 07:26:32 +01:00
Niklaus Giger
75a66dcdb3 ppc4xx: Add 405GPr based MCU25 board config file
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2008-03-15 07:26:27 +01:00
Niklaus Giger
b05f35436b ppc4xx: Add 405GPr based MCU25 board. Global files
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2008-03-15 07:26:21 +01:00
Niklaus Giger
14c27b35ac ppc4xx: HCU4/5. remove obsolete hcu_flash.c
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2008-03-15 07:26:12 +01:00
Niklaus Giger
a079494853 ppc4xx: HCU4/5. Use FLASH_CFI_LEGACY
Cleanup: Remove custom flash driver for 8 bit boot-eprom and replace it with
the FLASH_CFI_LEGACY et al. config options.

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2008-03-15 07:25:50 +01:00
Stefan Roese
e4170e5a50 ppc4xx: Fix comment in 405EX DDR2 init code
Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:22:15 +01:00
Bartlomiej Sieka
766529fccc Add MD5 support to the new uImage format
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-14 16:22:34 +01:00
Bartlomiej Sieka
0ede0c3835 Add the MD5 algorithm
MD5 supoprt is turned on by defining CONFIG_MD5, the digest can be then
calculated using the md5() function -- see include/md5.h for details.
		    
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-14 16:22:34 +01:00
Wolfgang Denk
b8aa57b5d4 tools/setlocalversion: use a git-describe-ish format
Change the automatic local version to have the form -nnnnn-gSHA1SUMID,
where 'nnnnn' is the number of commits since the last tag (i.e.,
1.3.2-rc3).  This makes it much easier to recognize "newer" versions
and to see how much has been changed since the referenced tag.

Stolen from Linux kernel's scripts/setlocalversio, see commit d882421f.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-14 16:04:54 +01:00
Wolfgang Denk
c6dc21c84d HMI1001: add support for MPC5200 Rev. B processors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-13 14:32:03 +01:00
Wolfgang Denk
90f13dce7a TQM5200: remove dead code
This board never used a MGT5100 processor.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-13 14:29:49 +01:00
Marian Balakowicz
7e492d8258 Merge branch 'master' of git://www.denx.de/git/u-boot into new-image 2008-03-12 12:23:02 +01:00
Marian Balakowicz
afe45c87e3 [new uImage] Fix build issue on ARM
ARM platforms don't have a bd->bi_memsize so use bd->bi_dram[0].size instead.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-12 12:14:15 +01:00
Marian Balakowicz
3310c549a7 [new uImage] Add new uImage format documentation and examples
Create doc/uImage.FIT documentation directory with the following files:
- command_syntax_extensions.txt : extended command syntax description
- howto.txt                     : short usage howto
- source_file_format.txt        : internal new uImage format description

Add example image source files:
- kernel.its
- kernel_fdt.its
- multi.its

Update README appropriately.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-12 12:13:13 +01:00
Marian Balakowicz
1ec73761d2 [new uImage] Fix definition of common bootm_headers_t fields
verify, autostart and lmb fields are used regardless of CONFIG_FIT
setting, move their definitions to common section.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:35:52 +01:00
Marian Balakowicz
1d1cb4270e [new uImage] Fix build problems on trab board
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:35:51 +01:00
Marian Balakowicz
f773bea8e1 [new uImage] Add proper ramdisk/FDT handling when FIT configuration is used
Save FIT configuration provied in the first bootm argument and use it
when to get ramdisk/FDT subimages when second and third (ramdisk/FDT)
arguments are not specified.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:35:46 +01:00
Marian Balakowicz
2682ce8a42 [new uImage] More verbose kernel image uncompress error message
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:33:01 +01:00
Marian Balakowicz
1372cce2b9 [new uImage] Use show_boot_progress() for new uImage format
This patch allocates a set of show_boot_progress() IDs for new uImage format
and adds show_boot_progress() calls in new uImage format handling code.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:33:01 +01:00
Marian Balakowicz
c28c4d193d [new uImage] Add new uImage fromat support to fpga command
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:33:01 +01:00
Marian Balakowicz
09475f7527 [new uImage] Add new uImage format handling to other bootm related commands
Updated commands:

docboot  - cmd_doc.c
fdcboot  - cmd_fdc.c
diskboot - cmd_ide.c
nboot    - cmd_nand.c
scsiboot - cmd_scsi.c
usbboot  - cmd_usb.c

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:33:01 +01:00
Marian Balakowicz
1b7897f28d [new uImage] Add new uImage format support to imgextract command
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:33:00 +01:00
Marian Balakowicz
424c4abdd1 [new uImage] Add new uImage format support to autoscript routine
autoscript() routine is updated to accept second argument, which
is only used for FIT images and provides a FIT subimage unit name.

autoscript() routine callers must now pass two arguments. For
non-interactive use (like in cmd_load.c, cmd_net.c), new environment
variable 'autoscript_uname' is introduced and used as a FIT
subimage unit name source.

autoscript command accepts extended syntax of the addr argument:
addr:<subimg_uname>

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:33:00 +01:00
Marian Balakowicz
cd7c596e9f [new uImage] Add new uImage format support to arch specific do_bootm_linux() routines
This patch updates architecture specific implementations of
do_bootm_linux() adding new uImage format handling for
operations like get kernel entry point address, get kernel
image data start address.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:33:00 +01:00
Marian Balakowicz
3dfe110149 [new uImage] Add node offsets for FIT images listed in struct bootm_headers
This patch adds new node offset fields to struct bootm_headers
and updates bootm_headers processing code to make use of them.
Saved node offsets allow to avoid repeating fit_image_get_node() calls.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:32:59 +01:00
Marian Balakowicz
bc8ed486b1 [new uImage] ppc: Add new uImage format support to FDT handling routines
Support for new (FIT) format uImages is added to powerpc specific
boot_get_fdt() routine which now recognizes, sanity checks FIT image
and is able to access data sections of the requested component image.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:32:53 +01:00
Marian Balakowicz
a44a269a90 [new uImage] Re-enable interrupts for non automatic booting
Re-enable interrupts if we return from do_bootm_<os> and 'autostart'
environment variable is not set to 'yes'.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:14:57 +01:00
Marian Balakowicz
d985c8498c [new uImage] Remove unnecessary arguments passed to ramdisk routines
boot_get_ramdisk() and image_get_ramdisk() do not need all
cmdtp, flag, argc and argv arguments. Simplify routines definition.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:14:38 +01:00
Marian Balakowicz
c87796483b [new uImage] Add new uImage format support for ramdisk handling
This patch updates boot_get_ramdisk() routine adding format
verification and handling for new (FIT) uImages.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:12:37 +01:00
Marian Balakowicz
6986a38567 [new uImage] Add new uImage format support for kernel booting
New format uImages are recognized by the bootm command,
validity of specified kernel component image is checked and
its data section located and used for further processing
(uncompress, load, etc.)

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-12 10:01:05 +01:00
Marian Balakowicz
e32fea6adb [new uImage] Add new uImage format support for imls and iminfo commands
imls and iminfo can now recognize nad print out contents of the new (FIT)
format uImages.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-11 12:35:20 +01:00
Bartlomiej Sieka
9d25438fe7 [new uImage] Add support for new uImage format to mkimage tool
Support for the new uImage format (FIT) is added to mkimage tool.
Commandline syntax is appropriately extended:

mkimage [-D dtc_options] -f fit-image.its fit-image

mkimage (together with dtc) takes fit-image.its and referenced therein
binaries (like vmlinux.bin.gz) as inputs, and produces fit-image file -- the
final image that can be transferred to the target (e.g., via tftp) and then
booted using the bootm command in U-Boot.

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-03-11 12:34:47 +01:00
Marian Balakowicz
eb6175edd6 [new uImage] Make node unit names const in struct bootm_headers
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-10 17:53:49 +01:00
Marian Balakowicz
5dfb521386 [new uImage] New uImage low-level API
Add FDT-based functions for handling new format component images,
configurations, node operations, property get/set, etc.

fit_        - routines handling global new format uImage operations
              like get/set top level property, process all nodes, etc.
fit_image_  - routines handling component images subnodes
fit_conf_   - routines handling configurations node

Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-03-10 17:51:07 +01:00
Marian Balakowicz
05e07b1ea2 [new uImage] Fix FDT blob totalsize calculation in boot_relocate_fdt()
Do not use global fdt blob pointer, calculate blob size from routine
argument blob pointer.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 22:22:46 +01:00
David Gibson
d1cc52879c libfdt: Add and use a node iteration helper function.
This patch adds an fdt_next_node() function which can be used to
iterate through nodes of the tree while keeping track of depth.  This
function is used to simplify the iteration code in a lot of other
functions, and is also exported for use by library users.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2008-02-29 16:00:31 +01:00
Bartlomiej Sieka
8cf30809a8 [new uImage] Add libfdt support to mkimage
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-02-29 16:00:24 +01:00
Bartlomiej Sieka
a6e530f00d [new uImage] Add sha1.o object to mkimage binary build
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
2008-02-29 16:00:23 +01:00
Marian Balakowicz
df6f1b895c [new uImage] Fix component handling for legacy multi component images
Use uint32_t when accessing size table in image_multi_count() and
image_multi_getimg() for multi component images.

Add missing uimage_to_cpu() endianness conversion.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 16:00:06 +01:00
Marian Balakowicz
570abb0ad1 [new uImage] Share common uImage code between mkimage and U-boot
This patch adds the following common routines:

1) Dedicated mkimage print_header() is replaced with common
image_print_contents()
image_print_contents_noindent()

2) Common os/arch/type/comp fields name <--> id translation routines
genimg_get_os_name()
genimg_get_arch_name()
genimg_get_type_name()
genimg_get_comp_name()
genimg_get_os_id()
genimg_get_arch_id()
genimg_get_type_id()
genimg_get_comp_id()

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 15:59:59 +01:00
Marian Balakowicz
9a4daad0a3 [new uImage] Update naming convention for bootm/uImage related code
This patch introduces the following prefix convention for the
image format handling and bootm related code:

genimg_		- dual format shared code
image_		- legacy uImage format specific code
fit_		- new uImage format specific code
boot_		- booting process related code

Related routines are renamed and a few pieces of code are moved around and
re-grouped.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 14:58:34 +01:00
Marian Balakowicz
e18489e8c2 Merge branch 'master' of git://www.denx.de/git/u-boot into new-image 2008-02-29 13:56:44 +01:00
Kumar Gala
75fa002c47 [new uImage] Respect autostart setting in linux bootm
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 13:15:56 +01:00
Kumar Gala
d3f2fa0d27 [new uImage] Provide ability to restrict region used for boot images
Allow the user to set 'bootm_low' and 'bootm_size' env vars as a way
to restrict what memory range is used for bootm.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 13:15:56 +01:00
Kumar Gala
e822d7fc4d [new uImage] Use lmb for bootm allocations
Convert generic ramdisk_high(), get_boot_cmdline(), get_boot_kbd()
functions over to using lmb for allocation of the ramdisk, command line
and kernel bd info.

Convert PPC specific fdt_relocate() to use lmb for allocation of the device
tree.

Provided a weak function that board code can call to do additional
lmb reserves if needed.

Also introduce the concept of bootmap_base to specify the offset in
physical memory that the bootmap is located at.  This is used for
allocations of the cmdline, kernel bd, and device tree as they should
be contained within bootmap_base and bootmap_base + CFG_BOOTMAPSZ.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-29 13:15:56 +01:00
Kumar Gala
f5614e7926 [new uImage] Add autostart flag to bootm_headers structure
The autostart env variable was dropped as part of the initial new uImage
cleanup.  Add it back here so the arch specific code can decide if it
wants to really boot or not.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 13:15:56 +01:00
Kumar Gala
4ed6552f71 [new uImage] Introduce lmb from linux kernel for memory mgmt of boot images
Introduce the LMB lib used on PPC in the kernel as a clean way to manage
the memory spaces used by various boot images and structures.  This code
will allow us to simplify the code in bootm and its support functions.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-29 13:15:55 +01:00
Kumar Gala
4648c2e7a1 [new uImage] ppc: Allow boards to specify effective amount of memory
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS.  However newer boards are capable of
mapping more memory (for example 85xx is capable of doing up to 2G).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 13:15:24 +01:00
Kumar Gala
274cea2bdd [new uImage] rework error handling so common functions don't reset
Changed image_get_ramdisk() to just return NULL on error and have
get_ramdisk() propogate that error to the caller.  It's left to the
caller to call do_reset() if it wants to.

Also moved calling do_reset() in get_fdt() and fdt_relocate() on ppc
to a common location.  In the future we will change get_fdt() and
fdt_relocate() to return success/failure and not call do_reset() at all.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 12:32:50 +01:00
Kumar Gala
d2bc095a63 [new uImage] ppc: Re-order ramdisk/fdt handling sequence
Doing the fdt before the ramdisk allows us to grow the fdt w/o concern
however it does mean we have to go in and fixup the initrd info since
we don't know where it will be.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-29 12:30:14 +01:00
Kumar Gala
27953493ef [new uImage] ppc: Determine if we are booting an OF style
If we are bootin OF style than we can skip setting up some things
that are used for the old boot method.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 12:30:03 +01:00
Kumar Gala
a6612bdfe7 [new uImage] Don't pass kdb to ramdisk_high since we may not have one
We don't actually need the kdb param as we are just using it to get
bd->bi_memsize which we can get from gd->bd->bi_memsize.  Also, if we
boot via OF we might not actually fill out a kdb.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Marian Balakowicz <m8@semihalf.com>
2008-02-29 12:27:21 +01:00
Marian Balakowicz
4efbe9dbb1 [new uImage] Correct raw FDT blob handlig when CONFIG_FIT is disabled
Dual format image code must properly handle all three FDT passing methods:
- raw FDT blob passed
- FDT blob embedded in the legacy uImage
- FDT blob embedded in the new uImage

This patch enables proper raw FDT handling when no FIT imaeg support
is compiled in. This is a bit tricky as we must dected FIT format even
when FIT uImage handling is not enabled as both FIT uImages and raw FDT
blobs use tha same low level format (libfdt).

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-27 11:02:26 +01:00
Marian Balakowicz
ff0734cff0 [new uImage] POWERPC: Add image_get_fdt() routine
FDT blob may be passed either: (1) raw (2) or embedded in the legacy uImage
(3) or embedded in the new uImage. For the (2) case embedding image must be
verified before we get FDT from it. This patch factors out legacy image
specific verification routine to the separate helper routine.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-27 11:02:26 +01:00
Marian Balakowicz
1efd43601f [new uImage] Add image_get_kernel() routine
Legacy image specific verification is factored out to a separate helper
routine to keep get_kernel() generic and simple.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-27 11:02:07 +01:00
Marian Balakowicz
8a5ea3e616 [new uImage] Move image verify flag to bootm_headers structure
Do not pass image verification flag directly to related routines.
Simplify argument passing and move it to the bootm_header structure which
contains curently processed image specific data and is already being passed
on the argument list.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-27 11:01:04 +01:00
Marian Balakowicz
823afe7cef [Makefile] Sort COBJS in lib_<arch> Makefiles
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-27 11:00:47 +01:00
Marian Balakowicz
6f0f9dfc4e [new uImage] Optimize gen_get_image() flow control
When CONFIG_HAS_DATAFLASH is not defined gen_get_image() routine has nothing
to do, update its control flow to better reflect that simple case.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-27 11:00:47 +01:00
Marian Balakowicz
d2ced9eb19 [new uImage] POWERPC: Split get_fdt() into get and relocate routines
PPC specific FDT blob handling code is divided into two separate routines:

get_fdt()	- find and verify a FDT blob (either raw or image embedded)
fdt_relocate()	- move FDT blob to within BOOTMAP if needed

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-27 10:59:56 +01:00
Marian Balakowicz
d5934ad775 [new uImage] Add dual format uImage support framework
This patch adds framework for dual format images. Format detection is added
and the bootm controll flow is updated to include cases for new FIT format
uImages.

When the legacy (image_header based) format is detected appropriate
legacy specific handling is invoked. For the new (FIT based) format uImages
dual boot framework has a minial support, that will only print out a
corresponding debug messages. Implementation of the FIT specific handling will
be added in following patches.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-25 15:53:49 +01:00
Marian Balakowicz
5583cbf736 [new uImage] Fix erroneous use of image_get_magic() in fdc/usb cmds
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-21 17:27:49 +01:00
Marian Balakowicz
2242f53698 [new uImage] Rename and move print_image_hdr() routine
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-21 17:27:41 +01:00
Marian Balakowicz
f50433d670 [new uImage] Add fit_parse_conf() and fit_parse_subimage() routines
Introducing routines for parsing new uImage format bootm arguments:
[<addr>]#<conf>		- configuration specification
[<addr>]:<subimg>	- subimage specification

New format images can contain multiple subimages of the same type. For example
a single new format image file can contain three kernels, two ramdisks and a
couple of FDT blobs. Subimage and configuration specifications are extensions
to bootm (and other image-related commands) arguments' syntax that allow to
specify which particular subimage should be operated on.

Subimage specification is used to denote a particular subimage. Configurations
are a bit more complex -- they are used to define a particualr booting setup,
for example a (kernel, fdt blob) pair, or a (kernel, ramdisk, fdt blob) tuple,
etc.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-21 17:20:20 +01:00
Marian Balakowicz
fff888a199 [new uImage] Add gen_get_image() routine
This routine assures that image (whether legacy or FIT) is not
in a special dataflash storage.

If image address is a dataflash address image is moved to system RAM.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-21 17:20:19 +01:00
Marian Balakowicz
75d3e8fbd9 [new uImage] Pull in libfdt if CONFIG_FIT is enabled
New uImage format (Flattened Image Tree) requires libfdt
functionality, print out error message if CONFIG_OF_LIBFDT
is not defined.

New uImage support is enabled by defining CONFIG_FIT (and CONFIG_OF_LIBFDT).
This commit turns it on by default.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-21 17:20:18 +01:00
Marian Balakowicz
20c9395933 Merge branch 'master' of /home/git/u-boot 2008-02-21 17:18:01 +01:00
Marian Balakowicz
5cf746c303 [new uImage] Move kernel data find code to get_kernel() routine
Verification of the kernel image (in old format) and finding kernel
data is moved to a dedicated routine. The routine will also hold
support for, to be added, new image format.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:13:00 +01:00
Marian Balakowicz
7b325454fd [new uImage] Cleanup FDT handling in PPC do_boot_linux()
Move FDT blob finding and relocation to a dedicated
get_fdt() routine. It increases code readability and
will make adding support for new uImage format easier.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:13:00 +01:00
Marian Balakowicz
b6b0fe6460 [new uImage] Cleanup do_botm_linux() boot allocations
This patch moves common pre-boot allocation steps shared between PPC
and M68K to a helper routines:

common:
- get_boot_sp_limit()
- get_boot_cmline()
- get_boot_kbd()

platform:
- set_clocks_in_mhz()

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:13:00 +01:00
Marian Balakowicz
ceaed2b1e5 [new uImage] Move ramdisk loading to a common routine
Ramdisk loading code, including initrd_high variable handling,
was duplicated for PPC and M68K platforms. This patch creates
common helper routine that is being called from both platform
do_bootm_linux() routines.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:13:00 +01:00
Marian Balakowicz
68d4f05e6b [new uImage] Removed dead ramdisk code on microblaze architectures
Microblaze do_bootm_linux() includes ramdisk processing code but
the ramdisk does not get used anywhere later on.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:59 +01:00
Marian Balakowicz
5ad03eb385 [new uImage] Factor out common image_get_ramdisk() routine
Architecture specific do_bootm_linux() routines share common
ramdisk image processing code. Move this code to a common
helper routine.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:59 +01:00
Marian Balakowicz
d3c5eb6dd1 [new uImage] Move FDT error printing to common fdt_error() routine
FDT error handling in PPC do_bootm_linux() shares the same message format.
This patch moves error message printing to a helper fdt_error() routine.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2008-02-07 01:12:59 +01:00
Marian Balakowicz
42b73e8ee0 [new uImage] Factor out common routines for getting os/arch/type/comp names
Move numeric-id to name translation for image os/arch/type/comp header
fields to a helper routines: image_get_os_name(), image_get_arch_name(),
image_get_type_name(), image_get_comp_name().

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:58 +01:00
Marian Balakowicz
e99c26694a [new uImage] Remove standalone applications handling from boootm
Standalone applications are supposed to be run using the "go" command.
This patch removes standalone images handling from the do_bootm().

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:58 +01:00
Marian Balakowicz
4a2ad5ff64 [new uImage] Remove OF_FLAT_TREE support from PPC bootm code
Support for OF_FLAT_TREE is to be obsoleted in the near future,
remove related code from the bootm routines.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:57 +01:00
Marian Balakowicz
82850f3d32 [new uImage] Use image API in SH do_bootm_linux() routine
Introduce image handling API for lately added Hitachi SH architecture.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:57 +01:00
Marian Balakowicz
4a995edec1 [new uImage] Rename architecture specific bootm code files
Implementation of the do_bootm_linux() and other bootm helper routines is
architecture specific code. As such it resides in lib_<arch> directories
in files named <arch>_linux.c

This patch renames those files to a more clear and accurate
lib_<arch>/bootm.c form.

List of the renamed files:
   lib_arm/armlinux.c -> lib_arm/bootm.c
   lib_avr32/avr32_linux.c -> lib_avr32/bootm.c
   lib_blackfin/bf533_linux.c -> lib_blackfin/bootm.c
   lib_i386/i386_linux.c -> lib_i386/bootm.c
   lib_m68k/m68k_linux.c -> lib_m68k/bootm.c
   lib_microblaze/microblaze_linux.c -> lib_microblaze/bootm.c
   lib_mips/mips_linux.c -> lib_mips/bootm.c
   lib_nios/nios_linux.c -> lib_nios/bootm.c
   lib_nios2/nios_linux.c -> lib_nios2/bootm.c
   lib_ppc/ppc_linux.c -> lib_ppc/bootm.c
   lib_sh/sh_linux.c -> lib_sh/bootm.c

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:57 +01:00
Marian Balakowicz
7582438c28 [new uImage] Return error on image move/uncompress overwrites
Check for overwrites during image move/uncompress, return with error
when the original image gets corrupted. Report clear message to the user
and prevent further troubles when pointer to the corrupted images is passed
to do_bootm_linux routine.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:57 +01:00
Marian Balakowicz
f13e7b2e99 [new uImage] Cleanup image header pointer use in bootm code
- use single image header pointer instead of a set of auxilliary variables.
- add multi component image helper routines: get component size/data address

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:57 +01:00
Marian Balakowicz
1ee1180b6e [new uImage] Cleanup cmd_bootm.c
- sort and cleanup headers, declarations, etc.
- group related routines
- cleanup indentation, white spaces

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:56 +01:00
Marian Balakowicz
af13cdbc01 [new uImage] Add memmove_wd() common routine
Move common, watchdog sensible memmove code to a helper memmmove_wd() routine.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:56 +01:00
Marian Balakowicz
958fc48abd [new uImage] Fix FDT header verification in PPC do_boot_linux() routine
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:56 +01:00
Marian Balakowicz
15158971f4 [new uImage] Fix uImage header pointer use in i386 do_bootm_linux()
Use image header copy instead of a (possibly corrupted) pointer to
a initial image location.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:55 +01:00
Marian Balakowicz
261dcf4624 [new uImage] Remove I386 uImage fake_header() routine
I386 targets are not using a uImage format, instead fake header
is added to ram image before it is further processed by bootm.

Remove this fixup and force proper uImage use for I386.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:55 +01:00
Marian Balakowicz
559316faf7 [new uImage] Move CHUNKSZ definition to image.h
CHUNKSZ defined for PPC and M68K is set to the same value of 64K,
move this definition to a common header.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:55 +01:00
Marian Balakowicz
321359f208 [new uImage] Move gunzip() common code to common/gunzip.c
Move gunzip(), zalloc() and zfree() to a separate file.
Share zalloc() and zfree() with cramfs uncompress routine.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:55 +01:00
Marian Balakowicz
d45d5a18b6 [new uImage] Cleanup OF/FDT #if/#elif/#endif use in do_bootm_linux()
Make CONFIG_OF_LIBFDT and CONFIG_OF_FLAT_TREE use more
readable in PPC variant of do_bootm_linux() routine.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:55 +01:00
Marian Balakowicz
5d3cc55ecb [new uImage] Move PPC do_bootm_linux() to lib_ppc/ppc_linux.c
PPC implementation of do_bootm_linux() routine is moved to
a dedicated file lib_ppc/ppc_linux.c

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:54 +01:00
Marian Balakowicz
b97a2a0a21 [new uImage] Define a API for image handling operations
- Add inline helper macros for basic header processing
- Move common non inline code common/image.c
- Replace direct header access with the API routines
- Rename IH_CPU_* to IH_ARCH_*

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:53 +01:00
Marian Balakowicz
ed29bc4e81 Add missing cmd_ximg.o to common/Makefile
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
2008-02-07 01:12:53 +01:00
1268 changed files with 70454 additions and 26960 deletions

2
.gitignore vendored
View File

@@ -11,6 +11,7 @@
*.a
*.o
*~
*.patch
#
# Top-level generic files
@@ -37,6 +38,7 @@
# stgit generated dirs
patches-*
.stgit-edit.txt
# quilt's files
patches

7633
CHANGELOG

File diff suppressed because it is too large Load Diff

View File

@@ -236,6 +236,10 @@ E: mark.jonas@freescale.com
D: Support for Freescale Total5200 platform
W: http://www.mobilegt.com/
N: Mark Jonas
E: mark.jonas@de.bosch.com
D: Support for MPR2 board
N: Sam Song
E: samsongshu@yahoo.com.cn
D: Port to the RPXlite_DW board
@@ -431,6 +435,7 @@ D: Support for EP82xxM
N: Art Shipkowski
E: art@videon-central.com
D: Support for NetSilicon NS7520
D: Support for ColdFire MCF5275
N: Michal Simek
E: monstr@monstr.eu

View File

@@ -172,6 +172,7 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Niklaus Giger <niklaus.giger@netstal.com>
HCU4 PPC405GPr
MCU25 PPC405GPr
HCU5 PPC440EPx
Frank Gottschling <fgottschling@eltec.de>
@@ -319,7 +320,9 @@ Stefan Roese <sr@denx.de>
alpr PPC440GX
bamboo PPC440EP
bunbinga PPC405EP
canyonlands PPC460EX
ebony PPC440GP
glacier PPC460GT
haleakala PPC405EXr
katmai PPC440SPe
kilauea PPC405EX
@@ -405,6 +408,10 @@ John Zhan <zhanz@sinovee.com>
svm_sc8xx MPC8xx
Guennadi Liakhovetski <g.liakhovetski@gmx.de>
linkstation MPC8241
-------------------------------------------------------------------------
Unknown / orphaned boards:
@@ -527,6 +534,11 @@ Dave Peverley <dpeverley@mpc-data.co.uk>
omap730p2 ARM926EJS
Stelian Pop <stelian.pop@leadtechdesign.com>
at91cap9adk ARM926EJS (AT91CAP9 SoC)
at91sam9260ek ARM926EJS (AT91SAM9260 SoC)
Stefan Roese <sr@denx.de>
ixdpg425 xscale
@@ -552,6 +564,10 @@ Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
Kyungmin Park <kyungmin.park@samsung.com>
apollon ARM1136EJS
Alex Z<>pke <azu@sysgo.de>
lart SA1100
@@ -591,7 +607,7 @@ Thomas Lange <thomas@corelatus.se>
dbau1x00 MIPS32 Au1000
gth2 MIPS32 Au1000
Vlad Lungu <vlad@comsys.ro>
Vlad Lungu <vlad.lungu@windriver.com>
qemu_mips MIPS32
#########################################################################
@@ -652,10 +668,6 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
TASREG MCF5249
Zachary P. Landau <zachary.landau@labxtechnologies.com>
r5200 mcf52x2
TsiChung Liew <Tsi-Chung.Liew@freescale.com>
M52277EVB mcf5227x
@@ -692,15 +704,40 @@ Haavard Skinnemoen <hskinnemoen@atmel.com>
# Board CPU #
#########################################################################
Nobuhiro Iwmaatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
MS7750SE SH7750
MS7722SE SH7722
R7780MP SH7780
R2DPlus SH7751R
Mark Jonas <mark.jonas@de.bosch.com>
mpr2 SH7720
Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
MS7720SE SH7720
Yusuke Goda <goda.yusuke@renesas.com>
MIGO-R SH7722
#########################################################################
# Blackfin Systems: #
# #
# Maintainer Name, Email Address #
# Board CPU #
#########################################################################
Mike Frysinger <vapier@gentoo.org>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF533-EZKIT BF533
BF533-STAMP BF533
BF537-STAMP BF537
BF561-EZKIT BF561
#########################################################################
# End of MAINTAINERS list #
#########################################################################

76
MAKEALL
View File

@@ -42,6 +42,7 @@ LIST_5xxx=" \
fo300 \
icecube_5100 \
icecube_5200 \
inka4x0 \
lite5200b \
mcc200 \
mecp5200 \
@@ -165,6 +166,8 @@ LIST_4xx=" \
bamboo_nand \
bubinga \
CANBT \
canyonlands \
canyonlands_nand \
CMS700 \
CPCI2DP \
CPCI405 \
@@ -183,6 +186,7 @@ LIST_4xx=" \
ERIC \
EXBITGEN \
G2000 \
glacier \
haleakala \
haleakala_nand \
hcu4 \
@@ -198,6 +202,7 @@ LIST_4xx=" \
luan \
lwmon5 \
makalu \
mcu25 \
METROBOX \
MIP405 \
MIP405T \
@@ -256,6 +261,7 @@ LIST_824x=" \
debris \
eXalion \
HIDDEN_DRAGON \
linkstation_HGLAN \
MOUSSE \
MUSENKI \
MVBLUE \
@@ -300,6 +306,7 @@ LIST_8260=" \
TQM8260_AC \
TQM8260_AD \
TQM8260_AE \
TQM8272 \
ZPC1900 \
"
@@ -381,12 +388,6 @@ LIST_74xx=" \
ZUMA \
"
LIST_TSEC=" \
${LIST_85xx} \
${LIST_86xx} \
${LIST_83xx} \
"
LIST_7xx=" \
BAB7xx \
CPCI750 \
@@ -395,6 +396,16 @@ LIST_7xx=" \
ppmc7xx \
"
#########################################################################
## PowerPC groups
#########################################################################
LIST_TSEC=" \
${LIST_83xx} \
${LIST_85xx} \
${LIST_86xx} \
"
LIST_ppc=" \
${LIST_5xx} \
${LIST_512x} \
@@ -448,6 +459,7 @@ LIST_ARM7=" \
LIST_ARM9=" \
at91cap9adk \
at91rm9200dk \
at91sam9260ek \
cmc_pu2 \
ap920t \
ap922_XA10 \
@@ -459,6 +471,8 @@ LIST_ARM9=" \
cp926ejs \
cp946es \
cp966 \
csb637 \
kb9202 \
lpd7a400 \
m501sk \
mp2usb \
@@ -468,6 +482,7 @@ LIST_ARM9=" \
omap1510inn \
omap1610h2 \
omap1610inn \
omap5912osk \
omap730p2 \
sbc2410x \
scb9328 \
@@ -499,6 +514,9 @@ LIST_ARM11=" \
cp1136 \
omap2420h4 \
apollon \
imx31_litekit \
imx31_phycore \
mx31ads \
"
#########################################################################
@@ -533,6 +551,9 @@ LIST_ixp=" \
scpu \
"
#########################################################################
## ARM groups
#########################################################################
LIST_arm=" \
${LIST_SA} \
@@ -637,8 +658,8 @@ LIST_nios2=" \
#########################################################################
LIST_microblaze=" \
suzaku \
ml401 \
suzaku \
xupv2p \
"
@@ -657,13 +678,13 @@ LIST_coldfire=" \
M5253EVB \
M5271EVB \
M5272C3 \
M5275EVB \
M5282EVB \
M5329AFEE \
M5373EVB \
M54455EVB \
M5475AFE \
M5485AFE \
r5200 \
TASREG \
"
@@ -693,13 +714,17 @@ LIST_blackfin=" \
## SH Systems
#########################################################################
LIST_sh3=" \
mpr2 \
ms7720se \
"
LIST_sh4=" \
ms7750se \
ms7722se \
"
LIST_sh3=" \
ms7720se \
Migo-R \
r7780mp \
r2dplus \
"
LIST_sh=" \
@@ -707,6 +732,12 @@ LIST_sh=" \
${LIST_sh4} \
"
#########################################################################
## SPARC Systems
#########################################################################
LIST_sparc="gr_xc3s_1500 gr_cpci_ax2000 gr_ep2s60 grsim grsim_leon2"
#-----------------------------------------------------------------------
#----- for now, just run PPC by default -----
@@ -733,16 +764,17 @@ build_target() {
for arg in $@
do
case "$arg" in
arm|SA|ARM7|ARM9|ARM10|ARM11|ixp|pxa| \
avr32| \
blackfin| \
coldfire| \
microblaze| \
mips|mips_el| \
nios|nios2| \
ppc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx| \
x86|I486|TSEC| \
sh|sh4|sh3 \
arm|SA|ARM7|ARM9|ARM10|ARM11|ixp|pxa \
|avr32 \
|blackfin \
|coldfire \
|microblaze \
|mips|mips_el \
|nios|nios2 \
|ppc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx|TSEC \
|sh|sh3|sh4 \
|sparc \
|x86|I486 \
)
for target in `eval echo '$LIST_'${arg}`
do

236
Makefile
View File

@@ -23,7 +23,7 @@
VERSION = 1
PATCHLEVEL = 3
SUBLEVEL = 2
SUBLEVEL = 3
EXTRAVERSION =
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
VERSION_FILE = $(obj)include/version_autogenerated.h
@@ -123,6 +123,10 @@ unexport CDPATH
#########################################################################
ifeq ($(ARCH),powerpc)
ARCH = ppc
endif
ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
# load ARCH, BOARD, and CPU configuration
@@ -165,7 +169,10 @@ CROSS_COMPILE = avr32-linux-
endif
ifeq ($(ARCH),sh)
CROSS_COMPILE = sh4-linux-
endif # sh
endif
ifeq ($(ARCH),sparc)
CROSS_COMPILE = sparc-elf-
endif # sparc
endif # HOSTARCH,ARCH
endif # CROSS_COMPILE
@@ -194,7 +201,6 @@ OBJS := $(addprefix $(obj),$(OBJS))
LIBS = lib_generic/libgeneric.a
LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
"board/$(VENDOR)/common/lib$(VENDOR).a"; fi)
LIBS += board/$(BOARDDIR)/lib$(BOARD).a
LIBS += cpu/$(CPU)/lib$(CPU).a
ifdef SOC
LIBS += cpu/$(CPU)/$(SOC)/lib$(SOC).a
@@ -233,22 +239,17 @@ LIBS += drivers/rtc/librtc.a
LIBS += drivers/serial/libserial.a
LIBS += drivers/usb/libusb.a
LIBS += drivers/video/libvideo.a
LIBS += post/libpost.a post/drivers/libpostdrivers.a
LIBS += $(shell if [ -d post/lib_$(ARCH) ]; then echo \
"post/lib_$(ARCH)/libpost$(ARCH).a"; fi)
LIBS += $(shell if [ -d post/lib_$(ARCH)/fpu ]; then echo \
"post/lib_$(ARCH)/fpu/libpost$(ARCH)fpu.a"; fi)
LIBS += $(shell if [ -d post/cpu/$(CPU) ]; then echo \
"post/cpu/$(CPU)/libpost$(CPU).a"; fi)
LIBS += $(shell if [ -d post/board/$(BOARDDIR) ]; then echo \
"post/board/$(BOARDDIR)/libpost$(BOARD).a"; fi)
LIBS += common/libcommon.a
LIBS += libfdt/libfdt.a
LIBS += api/libapi.a
LIBS += post/libpost.a
LIBS := $(addprefix $(obj),$(LIBS))
.PHONY : $(LIBS) $(VERSION_FILE)
LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).a
LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
# Add GCC lib
PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
@@ -271,7 +272,7 @@ U_BOOT_ONENAND = $(obj)u-boot-onenand.bin
endif
__OBJS := $(subst $(obj),,$(OBJS))
__LIBS := $(subst $(obj),,$(LIBS))
__LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
#########################################################################
#########################################################################
@@ -314,8 +315,9 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin
$(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $< > $@
$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT)
UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-Map u-boot.map -o u-boot
@@ -326,6 +328,9 @@ $(OBJS): depend $(obj)include/autoconf.mk
$(LIBS): depend $(obj)include/autoconf.mk
$(MAKE) -C $(dir $(subst $(obj),,$@))
$(LIBBOARD): depend $(LIBS) $(obj)include/autoconf.mk
$(MAKE) -C $(dir $(subst $(obj),,$@))
$(SUBDIRS): depend $(obj)include/autoconf.mk
$(MAKE) -C $@ all
@@ -339,17 +344,17 @@ $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
$(VERSION_FILE):
@( echo -n "#define U_BOOT_VERSION \"U-Boot " ; \
echo -n "$(U_BOOT_VERSION)" ; \
echo -n $(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion \
$(TOPDIR)) ; \
echo "\"" ) > $@.tmp
@( printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' "$(U_BOOT_VERSION)" \
'$(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion $(TOPDIR))' \
) > $@.tmp
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
gdbtools:
@@ -419,13 +424,19 @@ $(obj)System.map: $(obj)u-boot
# This target actually generates 2 files; autoconf.mk and autoconf.mk.dep.
# the dep file is only include in this top level makefile to determine when
# to regenerate the autoconf.mk file.
$(obj)include/autoconf.mk: $(obj)include/config.h $(VERSION_FILE)
@$(XECHO) Generating include/autoconf.mk ; \
$(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
@$(XECHO) Generating $@ ; \
set -e ; \
: Generate the dependancies ; \
$(CC) -M $(HOST_CFLAGS) $(CPPFLAGS) -MQ $@ include/common.h > $@.dep ; \
$(CC) -x c -DDO_DEPS_ONLY -M $(HOST_CFLAGS) $(CPPFLAGS) \
-MQ $(obj)include/autoconf.mk include/common.h > $@
$(obj)include/autoconf.mk: $(obj)include/config.h
@$(XECHO) Generating $@ ; \
set -e ; \
: Extract the config macros ; \
$(CPP) $(CFLAGS) -dM include/common.h | sed -n -f tools/scripts/define2mk.sed > $@
$(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \
sed -n -f tools/scripts/define2mk.sed > $@
sinclude $(obj)include/autoconf.mk.dep
@@ -1170,6 +1181,25 @@ bubinga_config: unconfig
CANBT_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx canbt esd
# Canyonlands & Glacier use different U-Boot images
canyonlands_config \
glacier_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc
canyonlands_nand_config \
glacier_nand_config: unconfig
@mkdir -p $(obj)include $(obj)board/amcc/canyonlands
@mkdir -p $(obj)nand_spl/board/amcc/canyonlands
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_nand_config=)) | \
tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
@$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/canyonlands/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
CATcenter_config \
CATcenter_25_config \
CATcenter_33_config: unconfig
@@ -1281,6 +1311,10 @@ lwmon5_config: unconfig
makalu_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx makalu amcc
mcu25_config: unconfig
@mkdir -p $(obj)board/netstal/common
@$(MKCONFIG) $(@:_config=) ppc ppc4xx mcu25 netstal
METROBOX_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx metrobox sandburst
@@ -1477,6 +1511,18 @@ HIDDEN_DRAGON_config: unconfig
kvme080_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x kvme080 etin
# HDLAN is broken ATM. Should be fixed as soon as hardware is available and as
# time permits.
#linkstation_HDLAN_config \
# Remove this line when HDLAN is fixed
linkstation_HGLAN_config: unconfig
@mkdir -p $(obj)include
@case $@ in \
*HGLAN*) echo "#define CONFIG_HGLAN 1" >$(obj)include/config.h; ;; \
*HDLAN*) echo "#define CONFIG_HLAN 1" >$(obj)include/config.h; ;; \
esac
@$(MKCONFIG) -n $@ -a linkstation ppc mpc824x linkstation
MOUSSE_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc824x mousse
@@ -1594,7 +1640,7 @@ PQ2FADS-ZU_66MHz_config \
PQ2FADS-ZU_66MHz_lowboot_config \
: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/mpc8260ads
@mkdir -p $(obj)board/freescale/mpc8260ads
$(if $(findstring PQ2FADS,$@), \
@echo "#define CONFIG_ADSTYPE CFG_PQ2FADS" > $(obj)include/config.h, \
@echo "#define CONFIG_ADSTYPE CFG_"$(subst MPC,,$(word 1,$(subst _, ,$@))) > $(obj)include/config.h)
@@ -1603,13 +1649,13 @@ PQ2FADS-ZU_66MHz_lowboot_config \
$(if $(findstring VR,$@), \
@echo "#define CONFIG_8260_CLKIN 66000000" >> $(obj)include/config.h))
@[ -z "$(findstring lowboot_,$@)" ] || \
{ echo "TEXT_BASE = 0xFF800000" >$(obj)board/mpc8260ads/config.tmp ; \
{ echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp ; \
$(XECHO) "... with lowboot configuration" ; \
}
@$(MKCONFIG) -a MPC8260ADS ppc mpc8260 mpc8260ads
@$(MKCONFIG) -a MPC8260ADS ppc mpc8260 mpc8260ads freescale
MPC8266ADS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8260 mpc8266ads
@$(MKCONFIG) $(@:_config=) ppc mpc8260 mpc8266ads freescale
# PM825/PM826 default configuration: small (= 8 MB) Flash / boot from 64-bit flash
PM825_config \
@@ -1802,15 +1848,15 @@ M5271EVB_config : unconfig
M5272C3_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5272c3
M5275EVB_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5275evb freescale
M5282EVB_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
TASREG_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
r5200_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 r5200
M5329AFEE_config \
M5329BFEE_config : unconfig
@case "$@" in \
@@ -2228,7 +2274,7 @@ EVB64260_750CX_config: unconfig
@$(MKCONFIG) EVB64260 ppc 74xx_7xx evb64260
mpc7448hpc2_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx mpc7448hpc2
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx mpc7448hpc2 freescale
P3G4_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
@@ -2279,14 +2325,9 @@ shannon_config : unconfig
## ARM92xT Systems
#########################################################################
xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1))))
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
at91cap9adk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91cap9
#########################################################################
## Atmel AT91RM9200 Systems
#########################################################################
at91rm9200dk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
@@ -2297,12 +2338,25 @@ cmc_pu2_config : unconfig
csb637_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
kb9202_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
mp2usb_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
m501sk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
#########################################################################
## Atmel ARM926EJ-S Systems
#########################################################################
at91cap9adk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91sam9
at91sam9260ek_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91sam9
########################################################################
## ARM Integrator boards - see doc/README-integrator for more info.
integratorap_config \
@@ -2329,9 +2383,6 @@ cp922_XA10_config \
cp1026_config: unconfig
@board/integratorcp/split_by_variant.sh $@
kb9202_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
lpd7a400_config \
lpd7a404_config: unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
@@ -2360,6 +2411,8 @@ davinci_schmoogie_config : unconfig
davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
omap1610inn_config \
omap1610inn_cs0boot_config \
omap1610inn_cs3boot_config \
@@ -2381,6 +2434,8 @@ omap1610h2_cs_autoboot_config: unconfig
fi;
@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
omap730p2_config \
omap730p2_cs0boot_config \
omap730p2_cs3boot_config : unconfig
@@ -2410,6 +2465,8 @@ SX1_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t sx1
# TRAB default configuration: 8 MB Flash, 32 MB RAM
xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1))))
trab_config \
trab_bigram_config \
trab_bigflash_config \
@@ -2455,11 +2512,6 @@ cm4008_config : unconfig
cm41xx_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
gth2_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
@$(MKCONFIG) -a gth2 mips mips gth2
#########################################################################
## S3C44B0 Systems
#########################################################################
@@ -2575,14 +2627,23 @@ zylonite_config :
## ARM1136 Systems
#########################################################################
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
apollon_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
imx31_litekit_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_litekit NULL mx31
imx31_phycore_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 imx31_phycore NULL mx31
mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
#========================================================================
# i386
#========================================================================
@@ -2662,6 +2723,11 @@ pb1000_config : unconfig
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
gth2_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
@$(MKCONFIG) -a gth2 mips mips gth2
qemu_mips_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
@@ -2788,7 +2854,7 @@ xupv2p_config: unconfig
BFIN_BOARDS = bf533-ezkit bf533-stamp bf537-stamp bf561-ezkit
$(BFIN_BOARDS:%=%_config) : unconfig
@$(MKCONFIG) $(@:_config=) blackfin $(firstword $(subst -, ,$@)) $(@:_config=)
@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
$(BFIN_BOARDS):
$(MAKE) $@_config
@@ -2798,7 +2864,7 @@ $(BFIN_BOARDS):
# AVR32
#========================================================================
#########################################################################
## AT32AP7xxx
## AT32AP70xx
#########################################################################
atstk1002_config : unconfig
@@ -2820,6 +2886,11 @@ atngw100_config : unconfig
#########################################################################
## sh3 (Renesas SuperH)
#########################################################################
mpr2_config: unconfig
@ >include/config.h
@echo "#define CONFIG_MPR2 1" >> include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh3 mpr2
ms7720se_config: unconfig
@echo "#define CONFIG_MS7720SE 1" > include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh3 ms7720se
@@ -2835,6 +2906,53 @@ ms7722se_config : unconfig
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
MigoR_config : unconfig
@ >include/config.h
@echo "#define CONFIG_MIGO_R 1" >> include/config.h
@./mkconfig -a $(@:_config=) sh sh4 MigoR
r7780mp_config: unconfig
@ >include/config.h
@echo "#define CONFIG_R7780MP 1" >> include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r7780mp
r2dplus_config : unconfig
@ >include/config.h
@echo "#define CONFIG_R2DPLUS 1" >> include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r2dplus
#========================================================================
# SPARC
#========================================================================
#########################################################################
## LEON3
#########################################################################
# Gaisler GR-XC3S-1500 board
gr_xc3s_1500_config : unconfig
@$(MKCONFIG) $(@:_config=) sparc leon3 gr_xc3s_1500 gaisler
# Gaisler GR-CPCI-AX2000 board, a General purpose FPGA-AX system
gr_cpci_ax2000_config : unconfig
@$(MKCONFIG) $(@:_config=) sparc leon3 gr_cpci_ax2000 gaisler
# Gaisler GRLIB template design (GPL SPARC/LEON3) for Altera NIOS
# Development board Stratix II edition, FPGA Device EP2S60.
gr_ep2s60_config: unconfig
@$(MKCONFIG) $(@:_config=) sparc leon3 gr_ep2s60 gaisler
# Gaisler LEON3 GRSIM simulator
grsim_config : unconfig
@$(MKCONFIG) $(@:_config=) sparc leon3 grsim gaisler
#########################################################################
## LEON2
#########################################################################
# Gaisler LEON2 GRSIM simulator
grsim_leon2_config : unconfig
@$(MKCONFIG) $(@:_config=) sparc leon2 grsim_leon2 gaisler
#########################################################################
#########################################################################
#########################################################################
@@ -2856,9 +2974,11 @@ clean:
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/{integratorap,integratorcp}/u-boot.lds \
$(obj)board/{bf533-ezkit,bf533-stamp,bf537-stamp,bf561-ezkit}/u-boot.lds
@rm -f $(obj)include/bmp_logo.h $(obj)nand_spl/{u-boot-spl,u-boot-spl.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl.map}
$(obj)board/{bf533-ezkit,bf533-stamp,bf537-stamp,bf561-ezkit}/u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
@rm -f $(obj)api_examples/demo $(VERSION_FILE)
@find $(OBJTREE) -type f \
\( -name 'core' -o -name '*.bak' -o -name '*~' \
@@ -2873,7 +2993,9 @@ clobber: clean
@rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS \
$(obj)cscope.* $(obj)*.*~
@rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
@rm -f $(obj)tools/{crc32.c,environment.c,env/crc32.c,sha1.c,inca-swap-bytes}
@rm -f $(obj)tools/{crc32.c,environment.c,env/crc32.c,md5.c,sha1.c,inca-swap-bytes}
@rm -f $(obj)tools/{image.c,fdt.c,fdt_ro.c,fdt_rw.c,fdt_strerror.c,zlib.h}
@rm -f $(obj)tools/{fdt_wip.c,libfdt_internal.h}
@rm -f $(obj)cpu/mpc824x/bedbug_603e.c
@rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -lname "*" -print | xargs rm -f

343
README
View File

@@ -1,5 +1,5 @@
#
# (C) Copyright 2000 - 2005
# (C) Copyright 2000 - 2008
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -51,7 +51,8 @@ Makefile have been tested to some extent and can be considered
"working". In fact, many of them are used in production systems.
In case of problems see the CHANGELOG and CREDITS files to find out
who contributed the specific port.
who contributed the specific port. The MAINTAINERS file lists board
maintainers.
Where to get help:
@@ -65,6 +66,22 @@ before asking FAQ's. Please see
http://lists.sourceforge.net/lists/listinfo/u-boot-users/
Where to get source code:
=========================
The U-Boot source code is maintained in the git repository at
git://www.denx.de/git/u-boot.git ; you can browse it online at
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
The "snapshot" links on this page allow you to download tarballs of
any version you might be interested in. Ofifcial releases are also
available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
directory.
Pre-built (and tested) images are available from
ftp://ftp.denx.de/pub/u-boot/images/
Where we come from:
===================
@@ -81,6 +98,7 @@ Where we come from:
- create ARMBoot project (http://sourceforge.net/projects/armboot)
- add other CPU families (starting with ARM)
- create U-Boot project (http://sourceforge.net/projects/u-boot)
- current project page: see http://www.denx.de/wiki/UBoot
Names and Spelling:
@@ -135,6 +153,8 @@ Directory Hierarchy:
- at32ap Files specific to Atmel AVR32 AP CPUs
- i386 Files specific to i386 CPUs
- ixp Files specific to Intel XScale IXP CPUs
- leon2 Files specific to Gaisler LEON2 SPARC CPU
- leon3 Files specific to Gaisler LEON3 SPARC CPU
- mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
- mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
- mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
@@ -168,6 +188,7 @@ Directory Hierarchy:
- lib_mips Files generic to MIPS architecture
- lib_nios Files generic to NIOS architecture
- lib_ppc Files generic to PowerPC architecture
- lib_sparc Files generic to SPARC architecture
- libfdt Library files to support flattened device trees
- net Networking code
- post Power On Self Test
@@ -354,19 +375,6 @@ The following options need to be configured:
boards with QUICC Engines require OF_QE to set UCC mac addresses
CONFIG_OF_HAS_BD_T
* CONFIG_OF_LIBFDT - enables the "fdt bd_t" command
* CONFIG_OF_FLAT_TREE - The resulting flat device tree
will have a copy of the bd_t. Space should be
pre-allocated in the dts for the bd_t.
CONFIG_OF_HAS_UBOOT_ENV
* CONFIG_OF_LIBFDT - enables the "fdt env" command
* CONFIG_OF_FLAT_TREE - The resulting flat device tree
will have a copy of u-boot's environment variables
CONFIG_OF_BOARD_SETUP
Board code has addition modification that it wants to make
@@ -615,7 +623,6 @@ The following options need to be configured:
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
CONFIG_CMD_BSP * Board SPecific functions
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
@@ -664,12 +671,15 @@ The following options need to be configured:
CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
CONFIG_RTC_MC13783 - use MC13783 RTC
CONFIG_RTC_MC146818 - use MC146818 RTC
CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
CONFIG_RTC_DS164x - use Dallas DS164x RTC
CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
CFG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
@@ -686,8 +696,8 @@ The following options need to be configured:
and/or CONFIG_ISO_PARTITION
If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
CONFIG_CMD_SCSI) you must configure support for at least
one partition type as well.
CONFIG_CMD_SCSI) you must configure support for at
least one partition type as well.
- IDE Reset method:
CONFIG_IDE_RESET_ROUTINE - this is defined in several
@@ -731,6 +741,9 @@ The following options need to be configured:
CONFIG_E1000
Support for Intel 8254x gigabit chips.
CONFIG_E1000_FALLBACK_MAC
default MAC for empty eeprom after production.
CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
Optional CONFIG_EEPRO100_SROM_WRITE enables eeprom
@@ -1131,6 +1144,20 @@ The following options need to be configured:
of the "hostname" environment variable is passed as
option 12 to the DHCP server.
CONFIG_BOOTP_DHCP_REQUEST_DELAY
A 32bit value in microseconds for a delay between
receiving a "DHCP Offer" and sending the "DHCP Request".
This fixes a problem with certain DHCP servers that don't
respond 100% of the time to a "DHCP request". E.g. On an
AT91RM9200 processor running at 180MHz, this delay needed
to be *at least* 15,000 usec before a Windows Server 2003
DHCP server would reply 100% of the time. I recommend at
least 50,000 usec to be safe. The alternative is to hope
that one of the retries will be successful but note that
the DHCP timeout and retry process takes a longer than
this delay.
- CDP Options:
CONFIG_CDP_DEVICE_ID
@@ -1387,6 +1414,11 @@ The following options need to be configured:
Currently supported on some MPC8xxx processors. For an
example, see include/configs/mpc8349emds.h.
CONFIG_MXC_SPI
Enables the driver for the SPI controllers on i.MX and MXC
SoCs. Currently only i.MX31 is supported.
- FPGA Support: CONFIG_FPGA
Enables FPGA subsystem.
@@ -1528,6 +1560,10 @@ The following options need to be configured:
before giving up the operation. If not defined, a
default value of 5 is used.
CONFIG_ARP_TIMEOUT
Timeout waiting for an ARP reply in milliseconds.
- Command Interpreter:
CONFIG_AUTO_COMPLETE
@@ -1659,6 +1695,8 @@ The following options need to be configured:
example, some LED's) on your board. At the moment,
the following checkpoints are implemented:
Legacy uImage format:
Arg Where When
1 common/cmd_bootm.c before attempting to boot an image
-1 common/cmd_bootm.c Image header has bad magic number
@@ -1669,25 +1707,26 @@ The following options need to be configured:
4 common/cmd_bootm.c Image data has correct checksum
-4 common/cmd_bootm.c Image is for unsupported architecture
5 common/cmd_bootm.c Architecture check OK
-5 common/cmd_bootm.c Wrong Image Type (not kernel, multi, standalone)
-5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
6 common/cmd_bootm.c Image Type check OK
-6 common/cmd_bootm.c gunzip uncompression error
-7 common/cmd_bootm.c Unimplemented compression type
7 common/cmd_bootm.c Uncompression OK
-8 common/cmd_bootm.c Wrong Image Type (not kernel, multi, standalone)
8 common/cmd_bootm.c Image Type check OK
8 common/cmd_bootm.c No uncompress/copy overwrite error
-9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
9 common/cmd_bootm.c Start initial ramdisk verification
-10 common/cmd_bootm.c Ramdisk header has bad magic number
-11 common/cmd_bootm.c Ramdisk header has bad checksum
10 common/cmd_bootm.c Ramdisk header is OK
-12 common/cmd_bootm.c Ramdisk data has bad checksum
11 common/cmd_bootm.c Ramdisk data has correct checksum
12 common/cmd_bootm.c Ramdisk verification complete, start loading
-13 common/cmd_bootm.c Wrong Image Type (not PPC Linux Ramdisk)
13 common/cmd_bootm.c Start multifile image verification
14 common/cmd_bootm.c No initial ramdisk, no multifile, continue.
15 common/cmd_bootm.c All preparation done, transferring control to OS
9 common/image.c Start initial ramdisk verification
-10 common/image.c Ramdisk header has bad magic number
-11 common/image.c Ramdisk header has bad checksum
10 common/image.c Ramdisk header is OK
-12 common/image.c Ramdisk data has bad checksum
11 common/image.c Ramdisk data has correct checksum
12 common/image.c Ramdisk verification complete, start loading
-13 common/image.c Wrong Image Type (not PPC Linux Ramdisk)
13 common/image.c Start multifile image verification
14 common/image.c No initial ramdisk, no multifile, continue.
15 lib_<arch>/bootm.c All preparation done, transferring control to OS
-30 lib_ppc/board.c Fatal error, hang the system
-31 post/post.c POST test failed, detected by post_output_backlog()
@@ -1757,6 +1796,59 @@ The following options need to be configured:
-83 common/cmd_net.c some error in automatic boot or autoscript
84 common/cmd_net.c end without errors
FIT uImage format:
Arg Where When
100 common/cmd_bootm.c Kernel FIT Image has correct format
-100 common/cmd_bootm.c Kernel FIT Image has incorrect format
101 common/cmd_bootm.c No Kernel subimage unit name, using configuration
-101 common/cmd_bootm.c Can't get configuration for kernel subimage
102 common/cmd_bootm.c Kernel unit name specified
-103 common/cmd_bootm.c Can't get kernel subimage node offset
103 common/cmd_bootm.c Found configuration node
104 common/cmd_bootm.c Got kernel subimage node offset
-104 common/cmd_bootm.c Kernel subimage hash verification failed
105 common/cmd_bootm.c Kernel subimage hash verification OK
-105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
106 common/cmd_bootm.c Architecture check OK
-106 common/cmd_bootm.c Kernel subimage has wrong typea
107 common/cmd_bootm.c Kernel subimge type OK
-107 common/cmd_bootm.c Can't get kernel subimage data/size
108 common/cmd_bootm.c Got kernel subimage data/size
-108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
-109 common/cmd_bootm.c Can't get kernel subimage type
-110 common/cmd_bootm.c Can't get kernel subimage comp
-111 common/cmd_bootm.c Can't get kernel subimage os
-112 common/cmd_bootm.c Can't get kernel subimage load address
-113 common/cmd_bootm.c Image uncompress/copy overwrite error
120 common/image.c Start initial ramdisk verification
-120 common/image.c Ramdisk FIT image has incorrect format
121 common/image.c Ramdisk FIT image has correct format
122 common/image.c No Ramdisk subimage unit name, using configuration
-122 common/image.c Can't get configuration for ramdisk subimage
123 common/image.c Ramdisk unit name specified
-124 common/image.c Can't get ramdisk subimage node offset
125 common/image.c Got ramdisk subimage node offset
-125 common/image.c Ramdisk subimage hash verification failed
126 common/image.c Ramdisk subimage hash verification OK
-126 common/image.c Ramdisk subimage for unsupported architecture
127 common/image.c Architecture check OK
-127 common/image.c Can't get ramdisk subimage data/size
128 common/image.c Got ramdisk subimage data/size
129 common/image.c Can't get ramdisk load address
-129 common/image.c Got ramdisk load address
-130 common/cmd_doc.c Icorrect FIT image format
131 common/cmd_doc.c FIT image format OK
-140 common/cmd_ide.c Icorrect FIT image format
141 common/cmd_ide.c FIT image format OK
-150 common/cmd_nand.c Icorrect FIT image format
151 common/cmd_nand.c FIT image format OK
Modem Support:
--------------
@@ -1853,6 +1945,27 @@ Configuration Settings:
Scratch address used by the alternate memory test
You only need to set this if address zero isn't writeable
- CFG_MEM_TOP_HIDE (PPC only):
If CFG_MEM_TOP_HIDE is defined in the board config header,
this specified memory area will get subtracted from the top
(end) of ram and won't get "touched" at all by U-Boot. By
fixing up gd->ram_size the Linux kernel should gets passed
the now "corrected" memory size and won't touch it either.
This should work for arch/ppc and arch/powerpc. Only Linux
board ports in arch/powerpc with bootwrapper support that
recalculate the memory size from the SDRAM controller setup
will have to get fixed in Linux additionally.
This option can be used as a workaround for the 440EPx/GRx
CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
be touched.
WARNING: Please make sure that this value is a multiple of
the Linux page size (normally 4k). If this is not the case,
then the end address of the Linux memory will be located at a
non page size aligned address and this could cause major
problems.
- CFG_TFTP_LOADADDR:
Default load address for network file downloads
@@ -1893,8 +2006,11 @@ Configuration Settings:
- CFG_BOOTMAPSZ:
Maximum size of memory mapped by the startup code of
the Linux kernel; all data that must be processed by
the Linux kernel (bd_info, boot arguments, eventually
initrd image) must be put below this limit.
the Linux kernel (bd_info, boot arguments, FDT blob if
used) must be put below this limit, unless "bootm_low"
enviroment variable is defined and non-zero. In such case
all data for the Linux kernel must be between "bootm_low"
and "bootm_low" + CFG_BOOTMAPSZ.
- CFG_MAX_FLASH_BANKS:
Max number of Flash memory banks
@@ -1939,12 +2055,24 @@ Configuration Settings:
This option also enables the building of the cfi_flash driver
in the drivers directory
- CFG_FLASH_USE_BUFFER_WRITE
Use buffered writes to flash.
- CONFIG_FLASH_SPANSION_S29WS_N
s29ws-n MirrorBit flash has non-standard addresses for buffered
write commands.
- CFG_FLASH_QUIET_TEST
If this option is defined, the common CFI flash doesn't
print it's warning upon not recognized FLASH banks. This
is useful, if some of the configured banks are only
optionally available.
- CONFIG_FLASH_SHOW_PROGRESS
If defined (must be an integer), print out countdown
digits and dots. Recommended value: 45 (9..1) for 80
column displays, 15 (3..1) for 40 column displays.
- CFG_RX_ETH_BUFFER:
Defines the number of ethernet receive buffers. On some
ethernet controllers it is recommended to set this value
@@ -2318,22 +2446,24 @@ Low Level (hardware related) configuration options:
Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
- CONFIG_SPD_EEPROM
Get DDR timing information from an I2C EEPROM. Common with pluggable
memory modules such as SODIMMs
Get DDR timing information from an I2C EEPROM. Common
with pluggable memory modules such as SODIMMs
SPD_EEPROM_ADDRESS
I2C address of the SPD EEPROM
- CFG_SPD_BUS_NUM
If SPD EEPROM is on an I2C bus other than the first one, specify here.
Note that the value must resolve to something your driver can deal with.
If SPD EEPROM is on an I2C bus other than the first
one, specify here. Note that the value must resolve
to something your driver can deal with.
- CFG_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should be configured
using CS0 and CS1 instead of CS2 and CS3.
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
- CFG_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should be configured
using CS0 and CS1 instead of CS2 and CS3.
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
- CONFIG_ETHER_ON_FEC[12]
Define to enable FEC[12] on a 8xx series processor.
@@ -2399,20 +2529,21 @@ Low Level (hardware related) configuration options:
Building the Software:
======================
Building U-Boot has been tested in native PPC environments (on a
PowerBook G3 running LinuxPPC 2000) and in cross environments
(running RedHat 6.x and 7.x Linux on x86, Solaris 2.6 on a SPARC, and
NetBSD 1.5 on x86).
Building U-Boot has been tested in several native build environments
and in many different cross environments. Of course we cannot support
all possibly existing versions of cross development tools in all
(potentially obsolete) versions. In case of tool chain problems we
recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK)
which is extensively used to build and test U-Boot.
If you are not using a native PPC environment, it is assumed that you
have the GNU cross compiling tools available in your path and named
with a prefix of "powerpc-linux-". If this is not the case, (e.g. if
you are using Monta Vista's Hard Hat Linux CDK 1.2) you must change
the definition of CROSS_COMPILE in Makefile. For HHL on a 4xx CPU,
change it to:
CROSS_COMPILE = ppc_4xx-
If you are not using a native environment, it is assumed that you
have GNU cross compiling tools available in your path. In this case,
you must set the environment variable CROSS_COMPILE in your shell.
Note that no changes to the Makefile or any other source files are
necessary. For example using the ELDK on a 4xx CPU, please enter:
$ CROSS_COMPILE=ppc_4xx-
$ export CROSS_COMPILE
U-Boot is intended to be simple to build. After installing the
sources you must configure U-Boot for one specific board type. This
@@ -2420,8 +2551,8 @@ is done by typing:
make NAME_config
where "NAME_config" is the name of one of the existing
configurations; see the main Makefile for supported names.
where "NAME_config" is the name of one of the existing configu-
rations; see the main Makefile for supported names.
Note: for some board special configuration names may exist; check if
additional information is available from the board vendor; for
@@ -2501,7 +2632,7 @@ If you have modified U-Boot sources (for instance added a new board
or support for new devices, a new CPU, etc.) you are expected to
provide feedback to the other developers. The feedback normally takes
the form of a "patch", i. e. a context diff against a certain (latest
official or latest in CVS) version of U-Boot sources.
official or latest in the git repository) version of U-Boot sources.
But before you submit such a patch, please verify that your modifi-
cation did not break existing code. At least make sure that *ALL* of
@@ -2509,8 +2640,8 @@ the supported boards compile WITHOUT ANY compiler warnings. To do so,
just run the "MAKEALL" script, which will configure and build U-Boot
for ALL supported system. Be warned, this will take a while. You can
select which (cross) compiler to use by passing a `CROSS_COMPILE'
environment variable to the script, i. e. to use the cross tools from
MontaVista's Hard Hat Linux you can type
environment variable to the script, i. e. to use the ELDK cross tools
you can type
CROSS_COMPILE=ppc_8xx- MAKEALL
@@ -2518,20 +2649,21 @@ or to build on a native PowerPC system you can type
CROSS_COMPILE=' ' MAKEALL
When using the MAKEALL script, the default behaviour is to build U-Boot
in the source directory. This location can be changed by setting the
BUILD_DIR environment variable. Also, for each target built, the MAKEALL
script saves two log files (<target>.ERR and <target>.MAKEALL) in the
<source dir>/LOG directory. This default location can be changed by
setting the MAKEALL_LOGDIR environment variable. For example:
When using the MAKEALL script, the default behaviour is to build
U-Boot in the source directory. This location can be changed by
setting the BUILD_DIR environment variable. Also, for each target
built, the MAKEALL script saves two log files (<target>.ERR and
<target>.MAKEALL) in the <source dir>/LOG directory. This default
location can be changed by setting the MAKEALL_LOGDIR environment
variable. For example:
export BUILD_DIR=/tmp/build
export MAKEALL_LOGDIR=/tmp/log
CROSS_COMPILE=ppc_8xx- MAKEALL
With the above settings build objects are saved in the /tmp/build, log
files are saved in the /tmp/log and the source tree remains clean during
the whole build process.
With the above settings build objects are saved in the /tmp/build,
log files are saved in the /tmp/log and the source tree remains clean
during the whole build process.
See also "U-Boot Porting Guide" below.
@@ -2623,11 +2755,33 @@ Some configuration options can be set using Environment Variables:
bootfile - Name of the image to load with TFTP
bootm_low - Memory range available for image processing in the bootm
command can be restricted. This variable is given as
a hexadecimal number and defines lowest address allowed
for use by the bootm command. See also "bootm_size"
environment variable. Address defined by "bootm_low" is
also the base of the initial memory mapping for the Linux
kernel -- see the descripton of CFG_BOOTMAPSZ.
bootm_size - Memory range available for image processing in the bootm
command can be restricted. This variable is given as
a hexadecimal number and defines the size of the region
allowed for use by the bootm command. See also "bootm_low"
environment variable.
autoload - if set to "no" (any string beginning with 'n'),
"bootp" will just load perform a lookup of the
configuration from the BOOTP server, but not try to
load any image using TFTP
autoscript - if set to "yes" commands like "loadb", "loady",
"bootp", "tftpb", "rarpboot" and "nfs" will attempt
to automatically run script images (by internally
calling "autoscript").
autoscript_uname - if script image is in a format (FIT) this
variable is used to get script subimage unit name.
autostart - if set to "yes", an image loaded using the "bootp",
"rarpboot", "tftpboot" or "diskboot" commands will
be automatically started (by internally calling
@@ -2842,10 +2996,24 @@ o If neither SROM nor the environment contain a MAC address, an error
Image Formats:
==============
The "boot" commands of this monitor operate on "image" files which
can be basicly anything, preceeded by a special header; see the
definitions in include/image.h for details; basicly, the header
defines the following image properties:
U-Boot is capable of booting (and performing other auxiliary operations on)
images in two formats:
New uImage format (FIT)
-----------------------
Flexible and powerful format based on Flattened Image Tree -- FIT (similar
to Flattened Device Tree). It allows the use of images with multiple
components (several kernels, ramdisks, etc.), with contents protected by
SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
Old uImage format
-----------------
Old image format is based on binary files which can be basically anything,
preceded by a special header; see the definitions in include/image.h for
details; basically, the header defines the following image properties:
* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
@@ -3722,6 +3890,8 @@ may be rejected, even when they contain important and valuable stuff.
Patches shall be sent to the u-boot-users mailing list.
Please see http://www.denx.de/wiki/UBoot/Patches for details.
When you send a patch, please include the following information with
it:
@@ -3742,18 +3912,23 @@ it:
* If your patch adds new configuration options, don't forget to
document these in the README file.
* The patch itself. If you are accessing the CVS repository use "cvs
update; cvs diff -puRN"; else, use "diff -purN OLD NEW". If your
version of diff does not support these options, then get the latest
version of GNU diff.
* The patch itself. If you are using git (which is *strongly*
recommended) you can easily generate the patch using the
"git-format-patch". If you then use "git-send-email" to send it to
the U-Boot mailing list, you will avoid most of the common problems
with some other mail clients.
The current directory when running this command shall be the top
level directory of the U-Boot source tree, or it's parent directory
(i. e. please make sure that your patch includes sufficient
directory information for the affected files).
If you cannot use git, use "diff -purN OLD NEW". If your version of
diff does not support these options, then get the latest version of
GNU diff.
We accept patches as plain text, MIME attachments or as uuencoded
gzipped text.
The current directory when running this command shall be the parent
directory of the U-Boot source tree (i. e. please make sure that
your patch includes sufficient directory information for the
affected files).
We prefer patches as plain text. MIME attachments are discouraged,
and compressed attachments must not be used.
* If one logical set of modifications affects or creates several
files, all these changes shall be submitted in a SINGLE patch file.
@@ -3780,4 +3955,6 @@ Notes:
modification.
* Remember that there is a size limit of 40 kB per message on the
u-boot-users mailing list. Compression may help.
u-boot-users mailing list. Bigger patches will be moderated. If
they are reasonable and not bigger than 100 kB, they will be
acknowledged. Even bigger patches should be avoided.

View File

@@ -30,6 +30,7 @@
#include <command.h>
#include <common.h>
#include <malloc.h>
#include <environment.h>
#include <linux/types.h>
#include <api_public.h>
@@ -40,8 +41,6 @@
/* U-Boot routines needed */
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
extern uchar (*env_get_char)(int);
extern uchar *env_get_addr(int);
/*****************************************************************************
*
@@ -583,7 +582,7 @@ int syscall(int call, int *retval, ...)
va_list ap;
int rv;
if (call < 0 || call >= calls_no || calls_table[call] == NULL) {
if (call < 0 || call >= calls_no) {
debugf("invalid call #%d\n", call);
return 0;
}

View File

@@ -21,12 +21,19 @@
# MA 02111-1307 USA
#
CONFIG_BFIN_CPU := $(strip $(subst ",,$(CONFIG_BFIN_CPU)))
CONFIG_BFIN_BOOT_MODE := $(strip $(subst ",,$(CONFIG_BFIN_BOOT_MODE)))
PLATFORM_RELFLAGS += -ffixed-P5
PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN
ifneq (,$(CONFIG_BFIN_CPU))
PLATFORM_RELFLAGS += -mcpu=$(CONFIG_BFIN_CPU)
endif
SYM_PREFIX = _
LDR_FLAGS += --use-vmas
ifeq (,$(findstring s,$(MAKEFLAGS)))
ifneq (,$(findstring s,$(MAKEFLAGS)))
LDR_FLAGS += --quiet
endif

View File

@@ -22,7 +22,7 @@
# MA 02111-1307 USA
#
sinclude $(TOPDIR)/board/$(BOARDDIR)/textbase.mk
sinclude $(OBJTREE)/board/$(BOARDDIR)/textbase.mk
ifndef TEXT_BASE
TEXT_BASE = 0xFE000000
endif

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(m68k)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -31,7 +31,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -31,7 +31,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -29,7 +29,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -26,7 +26,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -26,7 +26,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

48
board/MigoR/Makefile Normal file
View File

@@ -0,0 +1,48 @@
#
# Copyright (C) 2007
# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
#
# Copyright (C) 2007
# Kenati Technologies, Inc.
#
# board/MigoR/Makefile
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS := migo_r.o
SOBJS := lowlevel_init.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-include .depend
#########################################################################

31
board/MigoR/config.mk Normal file
View File

@@ -0,0 +1,31 @@
#
# Copyright (C) 2007
# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
#
# Copyright (C) 2007
# Kenati Technologies, Inc.
#
# board/MigoR/config.mk
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# TEXT_BASE refers to image _after_ relocation.
#
# NOTE: Must match value used in u-boot.lds (in this directory).
#
TEXT_BASE = 0x8FFC0000

264
board/MigoR/lowlevel_init.S Normal file
View File

@@ -0,0 +1,264 @@
/*
* Copyright (C) 2007
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* Copyright (C) 2007
* Kenati Technologies, Inc.
*
* board/MigoR/lowlevel_init.S
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#include <asm/processor.h>
/*
* Board specific low level init code, called _very_ early in the
* startup sequence. Relocation to SDRAM has not happened yet, no
* stack is available, bss section has not been initialised, etc.
*
* (Note: As no stack is available, no subroutines can be called...).
*/
.global lowlevel_init
.text
.align 2
lowlevel_init:
mov.l CCR_A, r1 ! Address of Cache Control Register
mov.l CCR_D, r0 ! Instruction Cache Invalidate
mov.l r0, @r1
mov.l MMUCR_A, r1 ! Address of MMU Control Register
mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit
mov.l r0, @r1
mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0
mov.l MSTPCR0_D, r0 !
mov.l r0, @r1
mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2
mov.l MSTPCR2_D, r0 !
mov.l r0, @r1
mov.l PFC_PULCR_A, r1
mov.w PFC_PULCR_D, r0
mov.w r0,@r1
mov.l PFC_DRVCR_A, r1
mov.w PFC_DRVCR_D, r0
mov.w r0, @r1
mov.l SBSCR_A, r1 !
mov.w SBSCR_D, r0 !
mov.w r0, @r1
mov.l PSCR_A, r1 !
mov.w PSCR_D, r0 !
mov.w r0, @r1
mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max
mov.w r0, @r1
mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register)
mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear
mov.w r0, @r1
mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms
mov.w r0, @r1
mov.l DLLFRQ_A, r1 ! 20080115
mov.l DLLFRQ_D, r0 ! 20080115
mov.l r0, @r1
mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
mov.l FRQCR_D, r0 ! 20080115
mov.l r0, @r1
mov.l CCR_A, r1 ! Address of Cache Control Register
mov.l CCR_D_2, r0 ! ??
mov.l r0, @r1
bsc_init:
mov.l CMNCR_A, r1 ! CMNCR address -> R1
mov.l CMNCR_D, r0 ! CMNCR data -> R0
mov.l r0, @r1 ! CMNCR set
mov.l CS0BCR_A, r1 ! CS0BCR address -> R1
mov.l CS0BCR_D, r0 ! CS0BCR data -> R0
mov.l r0, @r1 ! CS0BCR set
mov.l CS4BCR_A, r1 ! CS4BCR address -> R1
mov.l CS4BCR_D, r0 ! CS4BCR data -> R0
mov.l r0, @r1 ! CS4BCR set
mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1
mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0
mov.l r0, @r1 ! CS5ABCR set
mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1
mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0
mov.l r0, @r1 ! CS5BBCR set
mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1
mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0
mov.l r0, @r1 ! CS6ABCR set
mov.l CS0WCR_A, r1 ! CS0WCR address -> R1
mov.l CS0WCR_D, r0 ! CS0WCR data -> R0
mov.l r0, @r1 ! CS0WCR set
mov.l CS4WCR_A, r1 ! CS4WCR address -> R1
mov.l CS4WCR_D, r0 ! CS4WCR data -> R0
mov.l r0, @r1 ! CS4WCR set
mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1
mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0
mov.l r0, @r1 ! CS5AWCR set
mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1
mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0
mov.l r0, @r1 ! CS5BWCR set
mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1
mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0
mov.l r0, @r1 ! CS6AWCR set
! SDRAM initialization
mov.l SDCR_A, r1 ! SB_SDCR address -> R1
mov.l SDCR_D, r0 ! SB_SDCR data -> R0
mov.l r0, @r1 ! SB_SDCR set
mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1
mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0
mov.l r0, @r1 ! SB_SDWCR set
mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1
mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0
mov.l r0, @r1 ! SB_SDPCR set
mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1
mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0
mov.l r0, @r1 ! SB_RTCOR set
mov.l RTCNT_A, r1 ! SB_RTCNT address -> R1
mov.l RTCNT_D, r0 ! SB_RTCNT data -> R0
mov.l r0, @r1
mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1
mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0
mov.l r0, @r1 ! SB_RTCSR set
mov.l RFCR_A, r1 ! SB_RFCR address -> R1
mov.l RFCR_D, r0 ! SB_RFCR data -> R0
mov.l r0, @r1
mov.l SDMR3_A, r1 ! SDMR3 address -> R1
mov #0x00, r0 ! SDMR3 data -> R0
mov.b r0, @r1 ! SDMR3 set
! BL bit off (init = ON) (?!?)
stc sr, r0 ! BL bit off(init=ON)
mov.l SR_MASK_D, r1
and r1, r0
ldc r0, sr
rts
mov #0, r0
.align 4
CCR_A: .long CCR
MMUCR_A: .long MMUCR
MSTPCR0_A: .long MSTPCR0
MSTPCR2_A: .long MSTPCR2
PFC_PULCR_A: .long PULCR
PFC_DRVCR_A: .long DRVCR
SBSCR_A: .long SBSCR
PSCR_A: .long PSCR
RWTCSR_A: .long RWTCSR
RWTCNT_A: .long RWTCNT
FRQCR_A: .long FRQCR
PLLCR_A: .long PLLCR
DLLFRQ_A: .long DLLFRQ
CCR_D: .long 0x00000800
CCR_D_2: .long 0x00000103
MMUCR_D: .long 0x00000004
MSTPCR0_D: .long 0x00001001
MSTPCR2_D: .long 0xffffffff
PFC_PULCR_D: .long 0x6000
PFC_DRVCR_D: .long 0x0464
FRQCR_D: .long 0x07033639
PLLCR_D: .long 0x00005000
DLLFRQ_D: .long 0x000004F6 ! 20080115
CMNCR_A: .long CMNCR
CMNCR_D: .long 0x0000001B ! 20080115
CS0BCR_A: .long CS0BCR ! Flash bank 1
CS0BCR_D: .long 0x24920400
CS4BCR_A: .long CS4BCR !
CS4BCR_D: .long 0x10003400 ! 20080115
CS5ABCR_A: .long CS5ABCR !
CS5ABCR_D: .long 0x24920400
CS5BBCR_A: .long CS5BBCR !
CS5BBCR_D: .long 0x24920400
CS6ABCR_A: .long CS6ABCR !
CS6ABCR_D: .long 0x24920400
CS0WCR_A: .long CS0WCR
CS0WCR_D: .long 0x00000380
CS4WCR_A: .long CS4WCR
CS4WCR_D: .long 0x00100A81 ! 20080115
CS5AWCR_A: .long CS5AWCR
CS5AWCR_D: .long 0x00000300
CS5BWCR_A: .long CS5BWCR
CS5BWCR_D: .long 0x00000300
CS6AWCR_A: .long CS6AWCR
CS6AWCR_D: .long 0x00000300
SDCR_A: .long SBSC_SDCR
SDCR_D: .long 0x80160809 ! 20080115
SDWCR_A: .long SBSC_SDWCR
SDWCR_D: .long 0x0014450C ! 20080115
SDPCR_A: .long SBSC_SDPCR
SDPCR_D: .long 0x00000087
RTCOR_A: .long SBSC_RTCOR
RTCNT_A: .long SBSC_RTCNT
RTCNT_D: .long 0xA55A0012
RTCOR_D: .long 0xA55A001C ! 20080115
RTCSR_A: .long SBSC_RTCSR
RFCR_A: .long SBSC_RFCR
RFCR_D: .long 0xA55A0221
RTCSR_D: .long 0xA55A009a ! 20080115
SDMR3_A: .long 0xFE581180 ! 20080115
SR_MASK_D: .long 0xEFFFFF0F
.align 2
SBSCR_D: .word 0x0044
PSCR_D: .word 0x0000
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA504 ! 20080115
RWTCNT_D: .word 0x5A00

53
board/MigoR/migo_r.c Normal file
View File

@@ -0,0 +1,53 @@
/*
* Copyright (C) 2007
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* Copyright (C) 2007
* Kenati Technologies, Inc.
*
* board/MigoR/migo_r.c
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/processor.h>
int checkboard(void)
{
puts("BOARD: Renesas MigoR\n");
return 0;
}
int board_init(void)
{
return 0;
}
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CFG_SDRAM_BASE;
gd->bd->bi_memsize = CFG_SDRAM_SIZE;
printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024));
return 0;
}
void led_set_state (unsigned short value)
{
}

105
board/MigoR/u-boot.lds Normal file
View File

@@ -0,0 +1,105 @@
/*
* Copyrigth (c) 2007
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
OUTPUT_ARCH(sh)
ENTRY(_start)
SECTIONS
{
/*
Base address of internal SDRAM is 0x0C000000.
Although size of SDRAM can be either 16 or 32 MBytes,
we assume 16 MBytes (ie ignore upper half if the full
32 MBytes is present).
NOTE: This address must match with the definition of
TEXT_BASE in config.mk (in this directory).
*/
. = 0x8C000000 + (64*1024*1024) - (256*1024);
PROVIDE (reloc_dst = .);
PROVIDE (_ftext = .);
PROVIDE (_fcode = .);
PROVIDE (_start = .);
.text :
{
cpu/sh4/start.o (.text)
. = ALIGN(8192);
common/environment.o (.ppcenv)
. = ALIGN(8192);
common/environment.o (.ppcenvr)
. = ALIGN(8192);
*(.text)
. = ALIGN(4);
} =0xFF
PROVIDE (_ecode = .);
.rodata :
{
*(.rodata)
. = ALIGN(4);
}
PROVIDE (_etext = .);
PROVIDE (_fdata = .);
.data :
{
*(.data)
. = ALIGN(4);
}
PROVIDE (_edata = .);
PROVIDE (_fgot = .);
.got :
{
*(.got)
. = ALIGN(4);
}
PROVIDE (_egot = .);
PROVIDE (__u_boot_cmd_start = .);
.u_boot_cmd :
{
*(.u_boot_cmd)
. = ALIGN(4);
}
PROVIDE (__u_boot_cmd_end = .);
PROVIDE (reloc_dst_end = .);
/* _reloc_dst_end = .; */
PROVIDE (bss_start = .);
PROVIDE (__bss_start = .);
.bss :
{
*(.bss)
. = ALIGN(4);
}
PROVIDE (bss_end = .);
PROVIDE (_end = .);
}

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -26,6 +26,9 @@
#include <common.h>
#include <mpc8xx.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
/*
* SDRAM is single Samsung K4S643232F-T70 chip (8MB)
@@ -111,3 +114,11 @@ int checkboard( void )
return 0;
}
#if defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
}
#endif

View File

@@ -28,7 +28,7 @@
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
TEXT_BASE = 0xFFFC0000
TEXT_BASE = 0xFFF80000
endif
ifeq ($(debug),1)

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
SECTIONS
{
/* Read-only sections, merged into text segment: */

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
SECTIONS
{
/* Read-only sections, merged into text segment: */

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -0,0 +1,52 @@
#
# (C) Copyright 2008
# Stefan Roese, DENX Software Engineering, sr@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o
COBJS += bootstrap.o
SOBJS := init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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@@ -0,0 +1,183 @@
/*
* (C) Copyright 2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/io.h>
/*
* NOR and NAND boot options change bytes 5, 6, 8, 9, 11. The
* values are independent of the rest of the clock settings.
*/
#define NAND_COMPATIBLE 0x01
#define NOR_COMPATIBLE 0x02
#define I2C_EEPROM_ADDR 0x52
static char *config_labels[] = {
"CPU: 600 PLB: 200 OPB: 100 EBC: 100",
"CPU: 800 PLB: 200 OPB: 100 EBC: 100",
NULL
};
static u8 boot_configs[][17] = {
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
}
};
/*
* Bytes 5,6,8,9,11 change for NAND boot
*/
#if 0
/*
* Values for 512 page size NAND chips, not used anymore, just
* keep them here for reference
*/
static u8 nand_boot[] = {
0x90, 0x01, 0xa0, 0x68, 0x58
};
#else
/*
* Values for 2k page size NAND chips
*/
static u8 nand_boot[] = {
0x90, 0x01, 0xa0, 0xe8, 0x58
};
#endif
static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
u8 *buf, b_nand;
int x, y, nbytes, selcfg;
extern char console_buffer[];
if (argc < 2) {
printf("Usage:\n%s\n", cmdtp->usage);
return 1;
}
if ((strcmp(argv[1], "nor") != 0) &&
(strcmp(argv[1], "nand") != 0)) {
printf("Unsupported boot-device - only nor|nand support\n");
return 1;
}
/* set the nand flag based on provided input */
if ((strcmp(argv[1], "nand") == 0))
b_nand = 1;
else
b_nand = 0;
printf("Available configurations: \n\n");
if (b_nand) {
for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
/* filter on nand compatible */
if (boot_configs[x][0] & NAND_COMPATIBLE) {
printf(" %d - %s\n", (y+1), config_labels[x]);
y++;
}
}
} else {
for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
/* filter on nor compatible */
if (boot_configs[x][0] & NOR_COMPATIBLE) {
printf(" %d - %s\n", (y+1), config_labels[x]);
y++;
}
}
}
do {
nbytes = readline(" Selection [1-x / quit]: ");
if (nbytes) {
if (strcmp(console_buffer, "quit") == 0)
return 0;
selcfg = simple_strtol(console_buffer, NULL, 10);
if ((selcfg < 1) || (selcfg > y))
nbytes = 0;
}
} while (nbytes == 0);
y = (selcfg - 1);
for (x = 0; boot_configs[x][0] != 0; x++) {
if (b_nand) {
if (boot_configs[x][0] & NAND_COMPATIBLE) {
if (y > 0)
y--;
else if (y < 1)
break;
}
} else {
if (boot_configs[x][0] & NOR_COMPATIBLE) {
if (y > 0)
y--;
else if (y < 1)
break;
}
}
}
buf = &boot_configs[x][1];
if (b_nand) {
buf[5] = nand_boot[0];
buf[6] = nand_boot[1];
buf[8] = nand_boot[2];
buf[9] = nand_boot[3];
buf[11] = nand_boot[4];
}
if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
printf("Done\n");
printf("Please power-cycle the board for the changes to take effect\n");
return 0;
}
U_BOOT_CMD(
bootstrap, 2, 0, do_bootstrap,
"bootstrap - program the I2C bootstrap EEPROM\n",
"<nand|nor> - strap to boot from NAND or NOR flash\n"
);

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/*
* (C) Copyright 2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <ppc440.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/mmu.h>
#include <asm/4xx_pcie.h>
#include <asm/gpio.h>
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
DECLARE_GLOBAL_DATA_PTR;
#define CFG_BCSR3_PCIE 0x10
#define BOARD_CANYONLANDS_PCIE 1
#define BOARD_CANYONLANDS_SATA 2
#define BOARD_GLACIER 3
int board_early_init_f(void)
{
u32 sdr0_cust0;
u32 pvr = get_pvr();
/*
* Setup the interrupt controller polarities, triggers, etc.
*/
mtdcr(uic0sr, 0xffffffff); /* clear all */
mtdcr(uic0er, 0x00000000); /* disable all */
mtdcr(uic0cr, 0x00000005); /* ATI & UIC1 crit are critical */
mtdcr(uic0pr, 0xffffffff); /* per ref-board manual */
mtdcr(uic0tr, 0x00000000); /* per ref-board manual */
mtdcr(uic0vr, 0x00000000); /* int31 highest, base=0x000 */
mtdcr(uic0sr, 0xffffffff); /* clear all */
mtdcr(uic1sr, 0xffffffff); /* clear all */
mtdcr(uic1er, 0x00000000); /* disable all */
mtdcr(uic1cr, 0x00000000); /* all non-critical */
mtdcr(uic1pr, 0xffffffff); /* per ref-board manual */
mtdcr(uic1tr, 0x00000000); /* per ref-board manual */
mtdcr(uic1vr, 0x00000000); /* int31 highest, base=0x000 */
mtdcr(uic1sr, 0xffffffff); /* clear all */
mtdcr(uic2sr, 0xffffffff); /* clear all */
mtdcr(uic2er, 0x00000000); /* disable all */
mtdcr(uic2cr, 0x00000000); /* all non-critical */
mtdcr(uic2pr, 0xffffffff); /* per ref-board manual */
mtdcr(uic2tr, 0x00000000); /* per ref-board manual */
mtdcr(uic2vr, 0x00000000); /* int31 highest, base=0x000 */
mtdcr(uic2sr, 0xffffffff); /* clear all */
mtdcr(uic3sr, 0xffffffff); /* clear all */
mtdcr(uic3er, 0x00000000); /* disable all */
mtdcr(uic3cr, 0x00000000); /* all non-critical */
mtdcr(uic3pr, 0xffffffff); /* per ref-board manual */
mtdcr(uic3tr, 0x00000000); /* per ref-board manual */
mtdcr(uic3vr, 0x00000000); /* int31 highest, base=0x000 */
mtdcr(uic3sr, 0xffffffff); /* clear all */
/* SDR Setting - enable NDFC */
mfsdr(SDR0_CUST0, sdr0_cust0);
sdr0_cust0 = SDR0_CUST0_MUX_NDFC_SEL |
SDR0_CUST0_NDFC_ENABLE |
SDR0_CUST0_NDFC_BW_8_BIT |
SDR0_CUST0_NDFC_ARE_MASK |
SDR0_CUST0_NDFC_BAC_ENCODE(3) |
(0x80000000 >> (28 + CFG_NAND_CS));
mtsdr(SDR0_CUST0, sdr0_cust0);
/*
* Configure PFC (Pin Function Control) registers
* UART0: 4 pins
*/
mtsdr(SDR0_PFC1, 0x00040000);
/* Enable PCI host functionality in SDR0_PCI0 */
mtsdr(SDR0_PCI0, 0xe0000000);
/* Enable ethernet and take out of reset */
out_8((void *)CFG_BCSR_BASE + 6, 0);
/* Remove NOR-FLASH, NAND-FLASH & EEPROM hardware write protection */
out_8((void *)CFG_BCSR_BASE + 5, 0);
/* Enable USB host & USB-OTG */
out_8((void *)CFG_BCSR_BASE + 7, 0);
mtsdr(SDR0_SRST1, 0); /* Pull AHB out of reset default=1 */
/* Setup PLB4-AHB bridge based on the system address map */
mtdcr(AHB_TOP, 0x8000004B);
mtdcr(AHB_BOT, 0x8000004B);
if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA)) {
/*
* Configure USB-STP pins as alternate and not GPIO
* It seems to be neccessary to configure the STP pins as GPIO
* input at powerup (perhaps while USB reset is asserted). So
* we configure those pins to their "real" function now.
*/
gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
}
return 0;
}
static void canyonlands_sata_init(int board_type)
{
u32 reg;
if (board_type == BOARD_CANYONLANDS_SATA) {
/* Put SATA in reset */
SDR_WRITE(SDR0_SRST1, 0x00020001);
/* Set the phy for SATA, not PCI-E port 0 */
reg = SDR_READ(PESDR0_PHY_CTL_RST);
SDR_WRITE(PESDR0_PHY_CTL_RST, (reg & 0xeffffffc) | 0x00000001);
reg = SDR_READ(PESDR0_L0CLK);
SDR_WRITE(PESDR0_L0CLK, (reg & 0xfffffff8) | 0x00000007);
SDR_WRITE(PESDR0_L0CDRCTL, 0x00003111);
SDR_WRITE(PESDR0_L0DRV, 0x00000104);
/* Bring SATA out of reset */
SDR_WRITE(SDR0_SRST1, 0x00000000);
}
}
int checkboard(void)
{
char *s = getenv("serial#");
u32 pvr = get_pvr();
if ((pvr == PVR_460GT_RA) || (pvr == PVR_460GT_SE_RA)) {
printf("Board: Glacier - AMCC PPC460GT Evaluation Board");
gd->board_type = BOARD_GLACIER;
} else {
printf("Board: Canyonlands - AMCC PPC460EX Evaluation Board");
if (in_8((void *)(CFG_BCSR_BASE + 3)) & CFG_BCSR3_PCIE)
gd->board_type = BOARD_CANYONLANDS_PCIE;
else
gd->board_type = BOARD_CANYONLANDS_SATA;
}
switch (gd->board_type) {
case BOARD_CANYONLANDS_PCIE:
case BOARD_GLACIER:
puts(", 2*PCIe");
break;
case BOARD_CANYONLANDS_SATA:
puts(", 1*PCIe/1*SATA");
break;
}
printf(", Rev. %X", in_8((void *)(CFG_BCSR_BASE + 0)));
if (s != NULL) {
puts(", serial# ");
puts(s);
}
putc('\n');
canyonlands_sata_init(gd->board_type);
return (0);
}
/*
* Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
u32 ddr_wrdtr(u32 default_val) {
return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_180_DEG_ADV | 0x823);
}
u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
}
#if defined(CONFIG_NAND_U_BOOT)
/*
* NAND booting U-Boot version uses a fixed initialization, since the whole
* I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot
* code.
*/
long int initdram(int board_type)
{
return CFG_MBYTES_SDRAM << 20;
}
#endif
#if defined(CFG_DRAM_TEST)
int testdram(void)
{
unsigned long *mem = (unsigned long *)0;
const unsigned long kend = (1024 / sizeof(unsigned long));
unsigned long k, n;
mtmsr(0);
for (k = 0; k < CFG_KBYTES_SDRAM;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0) {
printf("%3d MB\r", k / 1024);
}
memset(mem, 0xaaaaaaaa, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0xaaaaaaaa) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
memset(mem, 0x55555555, 1024);
for (n = 0; n < kend; ++n) {
if (mem[n] != 0x55555555) {
printf("SDRAM test fails at: %08x\n",
(uint) & mem[n]);
return 1;
}
}
}
printf("SDRAM test passes\n");
return 0;
}
#endif
/*
* pci_target_init
*
* The bootstrap configuration provides default settings for the pci
* inbound map (PIM). But the bootstrap config choices are limited and
* may not be sufficient for a given board.
*/
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*
* Disable everything
*/
out_le32((void *)PCIX0_PIM0SA, 0); /* disable */
out_le32((void *)PCIX0_PIM1SA, 0); /* disable */
out_le32((void *)PCIX0_PIM2SA, 0); /* disable */
out_le32((void *)PCIX0_EROMBA, 0); /* disable expansion rom */
/*
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
* strapping options to not support sizes such as 128/256 MB.
*/
out_le32((void *)PCIX0_PIM0LAL, CFG_SDRAM_BASE);
out_le32((void *)PCIX0_PIM0LAH, 0);
out_le32((void *)PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1);
out_le32((void *)PCIX0_BAR0, 0);
/*
* Program the board's subsystem id/vendor id
*/
out_le16((void *)PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID);
out_le16((void *)PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID);
out_le16((void *)PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY);
}
#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
#if defined(CONFIG_PCI)
/*
* is_pci_host
*
* This routine is called to determine if a pci scan should be
* performed. With various hardware environments (especially cPCI and
* PPMC) it's insufficient to depend on the state of the arbiter enable
* bit in the strap register, or generic host/adapter assumptions.
*
* Rather than hard-code a bad assumption in the general 440 code, the
* 440 pci code requires the board to decide at runtime.
*
* Return 0 for adapter mode, non-zero for host (monarch) mode.
*/
int is_pci_host(struct pci_controller *hose)
{
/* Board is always configured as host. */
return (1);
}
static struct pci_controller pcie_hose[2] = {{0},{0}};
void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
int ret = 0;
char *env;
unsigned int delay;
int start;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
bus = busno;
/*
* Canyonlands with SATA enabled has only one PCIe slot
* (2nd one).
*/
if (gd->board_type == BOARD_CANYONLANDS_SATA)
start = 1;
else
start = 0;
for (i = start; i <= 1; i++) {
if (is_end_point(i))
ret = ppc4xx_init_pcie_endport(i);
else
ret = ppc4xx_init_pcie_rootport(i);
if (ret) {
printf("PCIE%d: initialization as %s failed\n", i,
is_end_point(i) ? "endpoint" : "root-complex");
continue;
}
hose = &pcie_hose[i];
hose->first_busno = bus;
hose->last_busno = bus;
hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE,
CFG_PCIE_MEMBASE + i * CFG_PCIE_MEMSIZE,
CFG_PCIE_MEMSIZE,
PCI_REGION_MEM);
hose->region_count = 1;
pci_register_hose(hose);
if (is_end_point(i)) {
ppc4xx_setup_pcie_endpoint(hose, i);
/*
* Reson for no scanning is endpoint can not generate
* upstream configuration accesses.
*/
} else {
ppc4xx_setup_pcie_rootpoint(hose, i);
env = getenv ("pciscandelay");
if (env != NULL) {
delay = simple_strtoul(env, NULL, 10);
if (delay > 5)
printf("Warning, expect noticable delay before "
"PCIe scan due to 'pciscandelay' value!\n");
mdelay(delay * 1000);
}
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
bus = hose->last_busno + 1;
}
}
}
#endif /* CONFIG_PCI */
int board_early_init_r (void)
{
/*
* Canyonlands has 64MBytes of NOR FLASH (Spansion 29GL512), but the
* boot EBC mapping only supports a maximum of 16MBytes
* (4.ff00.0000 - 4.ffff.ffff).
* To solve this problem, the FLASH has to get remapped to another
* EBC address which accepts bigger regions:
*
* 0xfc00.0000 -> 4.cc00.0000
*/
/* Remap the NOR FLASH to 0xcc00.0000 ... 0xcfff.ffff */
#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
mtebc(pb3cr, CFG_FLASH_BASE_PHYS_L | 0xda000);
#else
mtebc(pb0cr, CFG_FLASH_BASE_PHYS_L | 0xda000);
#endif
/* Remove TLB entry of boot EBC mapping */
remove_tlb(CFG_BOOT_BASE_ADDR, 16 << 20);
/* Add TLB entry for 0xfc00.0000 -> 0x4.cc00.0000 */
program_tlb(CFG_FLASH_BASE_PHYS, CFG_FLASH_BASE, CFG_FLASH_SIZE,
TLB_WORD2_I_ENABLE);
/*
* Now accessing of the whole 64Mbytes of NOR FLASH at virtual address
* 0xfc00.0000 is possible
*/
/*
* Clear potential errors resulting from auto-calibration.
* If not done, then we could get an interrupt later on when
* exceptions are enabled.
*/
set_mcsr(get_mcsr());
return 0;
}
int misc_init_r(void)
{
u32 sdr0_srst1 = 0;
u32 eth_cfg;
u32 pvr = get_pvr();
/*
* Set EMAC mode/configuration (GMII, SGMII, RGMII...).
* This is board specific, so let's do it here.
*/
mfsdr(SDR0_ETH_CFG, eth_cfg);
/* disable SGMII mode */
eth_cfg &= ~(SDR0_ETH_CFG_SGMII2_ENABLE |
SDR0_ETH_CFG_SGMII1_ENABLE |
SDR0_ETH_CFG_SGMII0_ENABLE);
/* Set the for 2 RGMII mode */
/* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA))
eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
else
eth_cfg &= ~SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
mtsdr(SDR0_ETH_CFG, eth_cfg);
/*
* The AHB Bridge core is held in reset after power-on or reset
* so enable it now
*/
mfsdr(SDR0_SRST1, sdr0_srst1);
sdr0_srst1 &= ~SDR0_SRST1_AHB;
mtsdr(SDR0_SRST1, sdr0_srst1);
return 0;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = CFG_FLASH_BASE_PHYS_L; /* we fixed up this address */
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc) {
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
if (gd->board_type == BOARD_CANYONLANDS_SATA) {
/*
* When SATA is selected we need to disable the first PCIe
* node in the device tree, so that Linux doesn't initialize
* it.
*/
rc = fdt_find_and_setprop(blob, "/plb/pciex@d00000000", "status",
"disabled", sizeof("disabled"), 1);
if (rc) {
printf("Unable to update property status in PCIe node, err=%s\n",
fdt_strerror(rc));
}
}
if (gd->board_type == BOARD_CANYONLANDS_PCIE) {
/*
* When PCIe is selected we need to disable the SATA
* node in the device tree, so that Linux doesn't initialize
* it.
*/
rc = fdt_find_and_setprop(blob, "/plb/sata@bffd1000", "status",
"disabled", sizeof("disabled"), 1);
if (rc) {
printf("Unable to update property status in PCIe node, err=%s\n",
fdt_strerror(rc));
}
}
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

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@@ -0,0 +1,41 @@
#
# (C) Copyright 2008
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# AMCC 460EX/460GT Evaluation Board (Canyonlands) board
#
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef TEXT_BASE
TEXT_BASE = 0xFFFA0000
endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1
ifeq ($(debug),1)
PLATFORM_CPPFLAGS += -DDEBUG
endif
ifeq ($(dbcr),1)
PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
endif

View File

@@ -0,0 +1,123 @@
/*
* (C) Copyright 2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <ppc_asm.tmpl>
#include <config.h>
#include <asm-ppc/mmu.h>
/**************************************************************************
* TLB TABLE
*
* This table is used by the cpu boot code to setup the initial tlb
* entries. Rather than make broad assumptions in the cpu source tree,
* this table lets each board set things up however they like.
*
* Pointer to the table is returned in r1
*
*************************************************************************/
.section .bootpg,"ax"
.globl tlbtab
tlbtab:
tlbtab_start
/*
* BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to
* use the speed up boot process. It is patched after relocation to
* enable SA_I
*/
#ifndef CONFIG_NAND_SPL
tlbentry(CFG_BOOT_BASE_ADDR, SZ_16M, CFG_BOOT_BASE_ADDR, 4, AC_R|AC_W|AC_X|SA_G) /* TLB 0 */
#else
tlbentry(CFG_NAND_BOOT_SPL_SRC, SZ_4K, CFG_NAND_BOOT_SPL_SRC, 4, AC_R|AC_W|AC_X|SA_G)
tlbentry(CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
tlbentry(256 << 20, SZ_256M, 256 << 20, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
#endif
/*
* TLB entries for SDRAM are not needed on this platform.
* They are dynamically generated in the SPD DDR(2) detection
* routine.
*/
#ifdef CFG_INIT_RAM_DCACHE
/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
tlbentry(CFG_INIT_RAM_ADDR, SZ_4K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G)
#endif
tlbentry(CFG_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I)
/* PCIe UTL register */
tlbentry(CFG_PCIE_BASE, SZ_16K, 0x08010000, 0xC, AC_R|AC_W|SA_G|SA_I)
/* TLB-entry for NAND */
tlbentry(CFG_NAND_ADDR, SZ_16M, CFG_NAND_ADDR, 4, AC_R|AC_W|AC_X|SA_G|SA_I)
/* TLB-entry for CPLD */
tlbentry(CFG_BCSR_BASE, SZ_1K, CFG_BCSR_BASE, 4, AC_R|AC_W|SA_G|SA_I)
/* TLB-entry for OCM */
tlbentry(CFG_OCM_BASE, SZ_16K, 0x00040000, 4, AC_R|AC_W|AC_X|SA_I)
/* TLB-entry for Local Configuration registers => peripherals */
tlbentry(CFG_LOCAL_CONF_REGS, SZ_16M, CFG_LOCAL_CONF_REGS, 4, AC_R|AC_W|AC_X|SA_G|SA_I)
/* AHB: Internal USB Peripherals (USB, SATA) */
tlbentry(CFG_AHB_BASE, SZ_1M, 0xbff00000, 4, AC_R|AC_W|AC_X|SA_G|SA_I)
tlbtab_end
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
/*
* For NAND booting the first TLB has to be reconfigured to full size
* and with caching disabled after running from RAM!
*/
#define TLB00 TLB0(CFG_BOOT_BASE_ADDR, SZ_256M)
#define TLB01 TLB1(CFG_BOOT_BASE_ADDR, 1)
#define TLB02 TLB2(AC_R|AC_W|AC_X|SA_G|SA_I)
.globl reconfig_tlb0
reconfig_tlb0:
sync
isync
addi r4,r0,0x0000 /* TLB entry #0 */
lis r5,TLB00@h
ori r5,r5,TLB00@l
tlbwe r5,r4,0x0000 /* Save it out */
lis r5,TLB01@h
ori r5,r5,TLB01@l
tlbwe r5,r4,0x0001 /* Save it out */
lis r5,TLB02@h
ori r5,r5,TLB02@l
tlbwe r5,r4,0x0002 /* Save it out */
sync
isync
blr
#endif

View File

@@ -0,0 +1,136 @@
/*
* (C) Copyright 2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
/* Align to next NAND block */
. = ALIGN(0x20000);
common/environment.o (.ppcenv)
/* Keep some space here for redundant env and potential bad env blocks */
. = ALIGN(0x80000);
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -0,0 +1,143 @@
/*
* (C) Copyright 2008
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/ppc4xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
board/amcc/canyonlands/init.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -25,7 +25,7 @@
# AMCC 440SPe Evaluation (Katmai) board
#
TEXT_BASE = 0xfffc0000
TEXT_BASE = 0xFFFA0000
PLATFORM_CPPFLAGS += -DCONFIG_440=1

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2007
* (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* Based on code provided from UDTech and AMCC
@@ -64,7 +64,7 @@ ext_bus_cntlr_init:
/* SET SDRAM_MB3CF - Not enabled */
mtsdram_as(SDRAM_MB3CF, 0x00000000);
/* SDRAM_CLKTR: Adv Addr clock by 90 deg */
/* SDRAM_CLKTR: Adv Addr clock by 180 deg */
mtsdram_as(SDRAM_CLKTR, 0x80000000);
/* Refresh Time register (0x30) Refresh every 7.8125uS */

View File

@@ -230,14 +230,22 @@ int misc_init_r(void)
return 0;
}
int board_emac_count(void)
static int is_405exr(void)
{
u32 pvr = get_pvr();
if (pvr & 0x00000004)
return 0; /* bit 2 set -> 405EX */
return 1; /* bit 2 cleared -> 405EXr */
}
int board_emac_count(void)
{
/*
* 405EXr only has one EMAC interface, 405EX has two
*/
if ((pvr == PVR_405EXR1_RA) || (pvr == PVR_405EXR2_RA))
if (is_405exr())
return 1;
else
return 2;
@@ -245,12 +253,10 @@ int board_emac_count(void)
static int board_pcie_count(void)
{
u32 pvr = get_pvr();
/*
* 405EXr only has one EMAC interface, 405EX has two
*/
if ((pvr == PVR_405EXR1_RA) || (pvr == PVR_405EXR2_RA))
if (is_405exr())
return 1;
else
return 2;
@@ -259,9 +265,8 @@ static int board_pcie_count(void)
int checkboard (void)
{
char *s = getenv("serial#");
u32 pvr = get_pvr();
if ((pvr == PVR_405EXR1_RA) || (pvr == PVR_405EXR2_RA))
if (is_405exr())
printf("Board: Haleakala - AMCC PPC405EXr Evaluation Board");
else
printf("Board: Kilauea - AMCC PPC405EX Evaluation Board");

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
SECTIONS
{
/* Read-only sections, merged into text segment: */

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2007
* (C) Copyright 2007-2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* Based on code provided from Senao and AMCC
@@ -57,7 +57,7 @@ ext_bus_cntlr_init:
/* base=08000000, size=128MByte (5), mode=2 (n*10*4) */
mtsdram_as(SDRAM_MB1CF, (0x08000000 >> 3) | 0x5201);
/* SDRAM_CLKTR: Adv Addr clock by 90 deg */
/* SDRAM_CLKTR: Adv Addr clock by 180 deg */
mtsdram_as(SDRAM_CLKTR,0x80000000);
/* Refresh Time register (0x30) Refresh every 7.8125uS */

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
SECTIONS
{
/* Read-only sections, merged into text segment: */

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -26,6 +26,8 @@
#include <asm/processor.h>
#include <asm/io.h>
#include <spd_sdram.h>
#include <libfdt.h>
#include <fdt_support.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -554,3 +556,24 @@ void board_reset(void)
/* give reset to BCSR */
*(unsigned char *)(CFG_BCSR_BASE | 0x06) = 0x09;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = gd->bd->bi_flashstart;
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc)
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -22,7 +22,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -1,6 +1,6 @@
#
# (C) Copyright 2003-2008
# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
@@ -25,10 +25,13 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := at91cap9adk.o led.o nand.o
COBJS-y += at91cap9adk.o
COBJS-y += led.o
COBJS-y += partition.o
COBJS-$(CONFIG_CMD_NAND) += nand.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop <at> leadtechdesign.com>
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
@@ -23,7 +23,13 @@
*/
#include <common.h>
#include <asm/arch/AT91CAP9.h>
#include <asm/arch/at91cap9.h>
#include <asm/arch/at91cap9_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
@@ -40,126 +46,106 @@ DECLARE_GLOBAL_DATA_PTR;
static void at91cap9_serial_hw_init(void)
{
#ifdef CONFIG_USART0
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA22_TXD0 | AT91C_PA23_RXD0;
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;
at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */
at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
#endif
#ifdef CONFIG_USART1
AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_TXD1 | AT91C_PD1_RXD1;
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;
at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
#endif
#ifdef CONFIG_USART2
AT91C_BASE_PIOD->PIO_PDR = AT91C_PD2_TXD2 | AT91C_PD3_RXD2;
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;
at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
#endif
#ifdef CONFIG_USART3 /* DBGU */
AT91C_BASE_PIOC->PIO_PDR = AT91C_PC31_DTXD | AT91C_PC30_DRXD;
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS;
at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
#endif
}
static void at91cap9_nor_hw_init(void)
{
unsigned long csa;
/* Ensure EBI supply is 3.3V */
AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_SUP_3V3;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA,
csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
/* Configure SMC CS0 for parallel flash */
AT91C_BASE_SMC->SMC_SETUP0 = AT91C_FLASH_NWE_SETUP |
AT91C_FLASH_NCS_WR_SETUP |
AT91C_FLASH_NRD_SETUP |
AT91C_FLASH_NCS_RD_SETUP;
AT91C_BASE_SMC->SMC_PULSE0 = AT91C_FLASH_NWE_PULSE |
AT91C_FLASH_NCS_WR_PULSE |
AT91C_FLASH_NRD_PULSE |
AT91C_FLASH_NCS_RD_PULSE;
AT91C_BASE_SMC->SMC_CYCLE0 = AT91C_FLASH_NWE_CYCLE |
AT91C_FLASH_NRD_CYCLE;
AT91C_BASE_SMC->SMC_CTRL0 = AT91C_SMC_READMODE |
AT91C_SMC_WRITEMODE |
AT91C_SMC_NWAITM_NWAIT_DISABLE |
AT91C_SMC_BAT_BYTE_WRITE |
AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS |
(AT91C_SMC_TDF & (1 << 16));
at91_sys_write(AT91_SMC_SETUP(0),
AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2) |
AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2));
at91_sys_write(AT91_SMC_PULSE(0),
AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10) |
AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10));
at91_sys_write(AT91_SMC_CYCLE(0),
AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
at91_sys_write(AT91_SMC_MODE(0),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE |
AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
}
#ifdef CONFIG_CMD_NAND
static void at91cap9_nand_hw_init(void)
{
unsigned long csa;
/* Enable CS3 */
AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_CS3A_SM | AT91C_EBI_SUP_3V3;
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA,
csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA |
AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
/* Configure SMC CS3 for NAND/SmartMedia */
AT91C_BASE_SMC->SMC_SETUP3 = AT91C_SM_NWE_SETUP |
AT91C_SM_NCS_WR_SETUP |
AT91C_SM_NRD_SETUP |
AT91C_SM_NCS_RD_SETUP;
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1) |
AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6) |
AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
AT91_SMC_DBW_8 | AT91_SMC_TDF_(1));
AT91C_BASE_SMC->SMC_PULSE3 = AT91C_SM_NWE_PULSE |
AT91C_SM_NCS_WR_PULSE |
AT91C_SM_NRD_PULSE |
AT91C_SM_NCS_RD_PULSE;
AT91C_BASE_SMC->SMC_CYCLE3 = AT91C_SM_NWE_CYCLE |
AT91C_SM_NRD_CYCLE;
AT91C_BASE_SMC->SMC_CTRL3 = AT91C_SMC_READMODE |
AT91C_SMC_WRITEMODE |
AT91C_SMC_NWAITM_NWAIT_DISABLE |
AT91C_SMC_DBW_WIDTH_EIGTH_BITS |
AT91C_SM_TDF;
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
/* RDY/BSY is not connected */
/* Enable NandFlash */
AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD15;
AT91C_BASE_PIOD->PIO_OER = AT91C_PIO_PD15;
at91_set_gpio_output(AT91_PIN_PD15, 1);
}
#endif
#ifdef CONFIG_HAS_DATAFLASH
static void at91cap9_spi_hw_init(void)
{
AT91C_BASE_PIOD->PIO_BSR = AT91C_PD0_SPI0_NPCS2D |
AT91C_PD1_SPI0_NPCS3D;
AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_SPI0_NPCS2D |
AT91C_PD1_SPI0_NPCS3D;
at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */
AT91C_BASE_PIOA->PIO_ASR = AT91C_PA28_SPI0_NPCS3A;
AT91C_BASE_PIOA->PIO_BSR = AT91C_PA4_SPI0_NPCS2A |
AT91C_PA1_SPI0_MOSI |
AT91C_PA0_SPI0_MISO |
AT91C_PA3_SPI0_NPCS1 |
AT91C_PA5_SPI0_NPCS0 |
AT91C_PA2_SPI0_SPCK;
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA28_SPI0_NPCS3A |
AT91C_PA4_SPI0_NPCS2A |
AT91C_PA1_SPI0_MOSI |
AT91C_PA0_SPI0_MISO |
AT91C_PA3_SPI0_NPCS1 |
AT91C_PA5_SPI0_NPCS0 |
AT91C_PA2_SPI0_SPCK;
at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
/* Enable Clock */
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI0;
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
}
#endif
#ifdef CONFIG_MACB
static void at91cap9_macb_hw_init(void)
{
unsigned int gpio;
/* Enable clock */
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_EMAC;
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_EMAC);
/*
* Disable pull-up on:
@@ -169,54 +155,59 @@ static void at91cap9_macb_hw_init(void)
*
* PHY has internal pull-down
*/
AT91C_BASE_PIOB->PIO_PPUDR = AT91C_PB22_E_RXDV |
AT91C_PB25_E_RX0 |
AT91C_PB26_E_RX1;
writel(pin_to_mask(AT91_PIN_PB22) |
pin_to_mask(AT91_PIN_PB25) |
pin_to_mask(AT91_PIN_PB26),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
/* Need to reset PHY -> 500ms reset */
AT91C_BASE_RSTC->RSTC_RMR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
(AT91C_RSTC_ERSTL & (0x0D << 8)) |
AT91C_RSTC_URSTEN;
AT91C_BASE_RSTC->RSTC_RCR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
AT91C_RSTC_EXTRST;
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
AT91_RSTC_ERSTL | (0x0D << 8) |
AT91_RSTC_URSTEN);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
/* Wait for end hardware reset */
while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL));
while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
/* Re-enable pull-up */
AT91C_BASE_PIOB->PIO_PPUER = AT91C_PB22_E_RXDV |
AT91C_PB25_E_RX0 |
AT91C_PB26_E_RX1;
writel(pin_to_mask(AT91_PIN_PB22) |
pin_to_mask(AT91_PIN_PB25) |
pin_to_mask(AT91_PIN_PB26),
pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
#ifdef CONFIG_RMII
gpio = AT91C_PB30_E_MDIO |
AT91C_PB29_E_MDC |
AT91C_PB21_E_TXCK |
AT91C_PB27_E_RXER |
AT91C_PB25_E_RX0 |
AT91C_PB22_E_RXDV |
AT91C_PB26_E_RX1 |
AT91C_PB28_E_TXEN |
AT91C_PB23_E_TX0 |
AT91C_PB24_E_TX1;
AT91C_BASE_PIOB->PIO_ASR = gpio;
AT91C_BASE_PIOB->PIO_BSR = 0;
AT91C_BASE_PIOB->PIO_PDR = gpio;
#else
#error AT91CAP9A-DK works only in RMII mode
at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */
at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */
at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */
at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */
at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */
at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */
at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */
at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */
at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */
at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */
#ifndef CONFIG_RMII
at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */
at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
#endif
/* Unlock EMAC, 3 0 2 1 sequence */
#define MP_MAC_KEY0 0x5969cb2a
#define MP_MAC_KEY1 0xb4a1872e
#define MP_MAC_KEY2 0x05683fbc
#define MP_MAC_KEY3 0x3634fba4
#define UNLOCK_MAC 0x00000008
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_MAC_KEY3;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_MAC_KEY0;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_MAC_KEY2;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_MAC_KEY1;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_MAC;
writel(MP_MAC_KEY3, MP_BLOCK_3_BASE + 0x3c);
writel(MP_MAC_KEY0, MP_BLOCK_3_BASE + 0x30);
writel(MP_MAC_KEY2, MP_BLOCK_3_BASE + 0x38);
writel(MP_MAC_KEY1, MP_BLOCK_3_BASE + 0x34);
writel(UNLOCK_MAC, MP_BLOCK_3_BASE + 0x40);
}
#endif
@@ -229,11 +220,11 @@ static void at91cap9_uhp_hw_init(void)
#define MP_OHCI_KEY2 0x4823efbc
#define MP_OHCI_KEY3 0x8651aae4
#define UNLOCK_OHCI 0x00000010
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_OHCI_KEY3;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_OHCI_KEY2;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_OHCI_KEY0;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_OHCI_KEY1;
*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_OHCI;
writel(MP_OHCI_KEY3, MP_BLOCK_3_BASE + 0x3c);
writel(MP_OHCI_KEY2, MP_BLOCK_3_BASE + 0x38);
writel(MP_OHCI_KEY0, MP_BLOCK_3_BASE + 0x30);
writel(MP_OHCI_KEY1, MP_BLOCK_3_BASE + 0x34);
writel(UNLOCK_OHCI, MP_BLOCK_3_BASE + 0x40);
}
#endif

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop <at> leadtechdesign.com>
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
@@ -23,58 +23,55 @@
*/
#include <common.h>
#include <asm/arch/AT91CAP9.h>
#include <asm/arch/at91cap9.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#define RED_LED AT91C_PIO_PC29 /* this is the power led */
#define GREEN_LED AT91C_PIO_PA10 /* this is the user1 led */
#define YELLOW_LED AT91C_PIO_PA11 /* this is the user1 led */
#define RED_LED AT91_PIN_PC29 /* this is the power led */
#define GREEN_LED AT91_PIN_PA10 /* this is the user1 led */
#define YELLOW_LED AT91_PIN_PA11 /* this is the user1 led */
void red_LED_on(void)
{
AT91C_BASE_PIOC->PIO_SODR = RED_LED;
at91_set_gpio_value(RED_LED, 1);
}
void red_LED_off(void)
{
AT91C_BASE_PIOC->PIO_CODR = RED_LED;
at91_set_gpio_value(RED_LED, 0);
}
void green_LED_on(void)
{
AT91C_BASE_PIOA->PIO_CODR = GREEN_LED;
at91_set_gpio_value(GREEN_LED, 0);
}
void green_LED_off(void)
{
AT91C_BASE_PIOA->PIO_SODR = GREEN_LED;
at91_set_gpio_value(GREEN_LED, 1);
}
void yellow_LED_on(void)
{
AT91C_BASE_PIOA->PIO_CODR = YELLOW_LED;
at91_set_gpio_value(YELLOW_LED, 0);
}
void yellow_LED_off(void)
{
AT91C_BASE_PIOA->PIO_SODR = YELLOW_LED;
at91_set_gpio_value(YELLOW_LED, 1);
}
void coloured_LED_init(void)
{
/* Enable clock */
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
/* Disable peripherals on LEDs */
AT91C_BASE_PIOA->PIO_PER = GREEN_LED | YELLOW_LED;
/* Enable pins as outputs */
AT91C_BASE_PIOA->PIO_OER = GREEN_LED | YELLOW_LED;
/* Turn all LEDs OFF */
AT91C_BASE_PIOA->PIO_SODR = GREEN_LED | YELLOW_LED;
at91_set_gpio_output(RED_LED, 1);
at91_set_gpio_output(GREEN_LED, 1);
at91_set_gpio_output(YELLOW_LED, 1);
/* Disable peripherals on LEDs */
AT91C_BASE_PIOC->PIO_PER = RED_LED;
/* Enable pins as outputs */
AT91C_BASE_PIOC->PIO_OER = RED_LED;
/* Turn all LEDs OFF */
AT91C_BASE_PIOC->PIO_CODR = RED_LED;
at91_set_gpio_output(RED_LED, 0);
at91_set_gpio_output(GREEN_LED, 1);
at91_set_gpio_output(YELLOW_LED, 1);
}

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop <at> leadtechdesign.com>
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
@@ -25,9 +25,9 @@
*/
#include <common.h>
#include <asm/arch/hardware.h>
#ifdef CONFIG_CMD_NAND
#include <asm/arch/at91cap9.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91_pio.h>
#include <nand.h>
@@ -51,10 +51,10 @@ static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
IO_ADDR_W |= MASK_ALE;
break;
case NAND_CTL_CLRNCE:
AT91C_BASE_PIOD->PIO_SODR = AT91C_PIO_PD15;
at91_set_gpio_value(AT91_PIN_PD15, 1);
break;
case NAND_CTL_SETNCE:
AT91C_BASE_PIOD->PIO_CODR = AT91C_PIO_PD15;
at91_set_gpio_value(AT91_PIN_PD15, 0);
break;
}
this->IO_ADDR_W = (void *) IO_ADDR_W;
@@ -68,4 +68,3 @@ int board_nand_init(struct nand_chip *nand)
return 0;
}
#endif

View File

@@ -0,0 +1,39 @@
/*
* (C) Copyright 2008
* Ulf Samuelsson <ulf@atmel.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <config.h>
#include <asm/hardware.h>
#include <dataflash.h>
AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
};
/*define the area offsets*/
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
};

View File

@@ -1,6 +1,6 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de>
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.

View File

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := at91rm9200dk.o flash.o led.o mux.o
COBJS := at91rm9200dk.o flash.o led.o mux.o partition.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

View File

@@ -0,0 +1,40 @@
/*
* (C) Copyright 2008
* Ulf Samuelsson <ulf@atmel.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <config.h>
#include <asm/hardware.h>
#include <dataflash.h>
AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
{CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
};
/*define the area offsets*/
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
};

View File

@@ -0,0 +1,53 @@
#
# (C) Copyright 2003-2008
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y += at91sam9260ek.o
COBJS-y += led.o
COBJS-y += partition.o
COBJS-$(CONFIG_CMD_NAND) += nand.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,236 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/at91sam9260.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
*/
static void at91sam9260ek_serial_hw_init(void)
{
#ifdef CONFIG_USART0
at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
#endif
#ifdef CONFIG_USART1
at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
#endif
#ifdef CONFIG_USART2
at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
#endif
#ifdef CONFIG_USART3 /* DBGU */
at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
#endif
}
#ifdef CONFIG_CMD_NAND
static void at91sam9260ek_nand_hw_init(void)
{
unsigned long csa;
/* Enable CS3 */
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA,
csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* Configure SMC CS3 for NAND/SmartMedia */
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
AT91_SMC_DBW_8 | AT91_SMC_TDF_(2));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
/* Configure RDY/BSY */
at91_set_gpio_input(AT91_PIN_PC13, 1);
/* Enable NandFlash */
at91_set_gpio_output(AT91_PIN_PC14, 1);
}
#endif
#ifdef CONFIG_HAS_DATAFLASH
static void at91sam9260ek_spi_hw_init(void)
{
at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */
at91_set_B_periph(AT91_PIN_PC11, 0); /* SPI0_NPCS1 */
at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
}
#endif
#ifdef CONFIG_MACB
static void at91sam9260ek_macb_hw_init(void)
{
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
/*
* Disable pull-up on:
* RXDV (PA17) => PHY normal mode (not Test mode)
* ERX0 (PA14) => PHY ADDR0
* ERX1 (PA15) => PHY ADDR1
* ERX2 (PA25) => PHY ADDR2
* ERX3 (PA26) => PHY ADDR3
* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
*
* PHY has internal pull-down
*/
writel(pin_to_mask(AT91_PIN_PA14) |
pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA17) |
pin_to_mask(AT91_PIN_PA25) |
pin_to_mask(AT91_PIN_PA26) |
pin_to_mask(AT91_PIN_PA28),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
AT91_RSTC_ERSTL | (0x0D << 8) |
AT91_RSTC_URSTEN);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
/* Wait for end hardware reset */
while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
AT91_RSTC_ERSTL | (0x0 << 8) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PA14) |
pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA17) |
pin_to_mask(AT91_PIN_PA25) |
pin_to_mask(AT91_PIN_PA26) |
pin_to_mask(AT91_PIN_PA28),
pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
#ifndef CONFIG_RMII
at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
#endif
}
#endif
int board_init(void)
{
/* Enable Ctrlc */
console_init_f();
/* arch number of AT91SAM9260EK-Board */
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
at91sam9260ek_serial_hw_init();
#ifdef CONFIG_CMD_NAND
at91sam9260ek_nand_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
at91sam9260ek_spi_hw_init();
#endif
#ifdef CONFIG_MACB
at91sam9260ek_macb_hw_init();
#endif
return 0;
}
int dram_init(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
}
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
#ifdef CONFIG_MACB
/*
* Initialize ethernet HW addr prior to starting Linux,
* needed for nfsroot
*/
eth_init(gd->bd);
#endif
}
#endif

View File

@@ -0,0 +1 @@
TEXT_BASE = 0x23f00000

View File

@@ -0,0 +1,64 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/at91sam9260.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#define RED_LED AT91_PIN_PA9 /* this is the power led */
#define GREEN_LED AT91_PIN_PA6 /* this is the user led */
void red_LED_on(void)
{
at91_set_gpio_value(RED_LED, 1);
}
void red_LED_off(void)
{
at91_set_gpio_value(RED_LED, 0);
}
void green_LED_on(void)
{
at91_set_gpio_value(GREEN_LED, 0);
}
void green_LED_off(void)
{
at91_set_gpio_value(GREEN_LED, 1);
}
void coloured_LED_init(void)
{
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
at91_set_gpio_output(RED_LED, 1);
at91_set_gpio_output(GREEN_LED, 1);
at91_set_gpio_value(RED_LED, 0);
at91_set_gpio_value(GREEN_LED, 1);
}

View File

@@ -0,0 +1,76 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/at91sam9260.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91_pio.h>
#include <nand.h>
/*
* hardware specific access to control-lines
*/
#define MASK_ALE (1 << 21) /* our ALE is AD21 */
#define MASK_CLE (1 << 22) /* our CLE is AD22 */
static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
struct nand_chip *this = mtd->priv;
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
switch (cmd) {
case NAND_CTL_SETCLE:
IO_ADDR_W |= MASK_CLE;
break;
case NAND_CTL_SETALE:
IO_ADDR_W |= MASK_ALE;
break;
case NAND_CTL_CLRNCE:
at91_set_gpio_value(AT91_PIN_PC14, 1);
break;
case NAND_CTL_SETNCE:
at91_set_gpio_value(AT91_PIN_PC14, 0);
break;
}
this->IO_ADDR_W = (void *) IO_ADDR_W;
}
static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
{
return at91_get_gpio_value(AT91_PIN_PC13);
}
int board_nand_init(struct nand_chip *nand)
{
nand->eccmode = NAND_ECC_SOFT;
nand->hwcontrol = at91sam9260ek_nand_hwcontrol;
nand->dev_ready = at91sam9260ek_nand_ready;
nand->chip_delay = 20;
return 0;
}

View File

@@ -0,0 +1,40 @@
/*
* (C) Copyright 2008
* Ulf Samuelsson <ulf@atmel.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <config.h>
#include <asm/hardware.h>
#include <dataflash.h>
AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
{CFG_DATAFLASH_LOGIC_ADDR_CS1, 1}
};
/*define the area offsets*/
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
};

View File

@@ -0,0 +1,57 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

View File

@@ -82,7 +82,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
* 0xe210_0000 1M PCI2 IO
* 0xe300_0000 1M PCIe IO
*/
SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR,
SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 5, BOOKE_PAGESZ_64M, 1),
};

View File

@@ -21,7 +21,6 @@
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS

View File

@@ -39,7 +39,7 @@ $(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -P -Ubfin $^ > $@.tmp
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
mv -f $@.tmp $@
clean:

View File

@@ -34,13 +34,6 @@ DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
#if (BFIN_CPU == ADSP_BF531)
printf("CPU: ADSP BF531 Rev.: 0.%d\n", *pCHIPID >> 28);
#elif (BFIN_CPU == ADSP_BF532)
printf("CPU: ADSP BF532 Rev.: 0.%d\n", *pCHIPID >> 28);
#else
printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
#endif
printf("Board: ADI BF533 EZ-Kit Lite board\n");
printf(" Support: http://blackfin.uclinux.org/\n");
return 0;

View File

@@ -20,6 +20,6 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# TEXT_BASE should be defined as the MAX_SDRAM Address - 256k bytes
# 256k is defined as CFG_MONITOR_LEN in ./include/configs/<board>.h
TEXT_BASE = 0x01FC0000
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me

View File

@@ -1,7 +1,7 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2007 Analog Device Inc.
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -26,127 +26,113 @@
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CFG_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
MEMORY
{
ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
. = CFG_MONITOR_BASE;
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector before the environment sector. If it throws */
/* an error during compilation remove an object here to get */
/* it linked after the configuration sector. */
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/bf533/start.o (.text)
cpu/bf533/start1.o (.text)
cpu/bf533/traps.o (.text)
cpu/bf533/interrupt.o (.text)
cpu/bf533/serial.o (.text)
cpu/blackfin/start.o (.text)
cpu/blackfin/traps.o (.text)
cpu/blackfin/interrupt.o (.text)
cpu/blackfin/serial.o (.text)
common/dlmalloc.o (.text)
/* lib_blackfin/bf533_string.o (.text) */
/* lib_generic/vsprintf.o (.text) */
lib_generic/crc32.o (.text)
lib_generic/zlib.o (.text)
board/bf533-ezkit/bf533-ezkit.o (.text)
. = DEFINED(env_offset) ? env_offset : .;
common/environment.o (.text)
#endif
*(.text .text.*)
} >ram
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
*(.data)
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(.bss .bss.*)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
__bss_end = .;
} >ram
}

View File

@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o spi.o
COBJS := $(BOARD).o spi_flash.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
@@ -39,7 +39,7 @@ $(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -P -Ubfin $^ > $@.tmp
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
mv -f $@.tmp $@
clean:

View File

@@ -43,13 +43,6 @@ DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
#if (BFIN_CPU == ADSP_BF531)
printf("CPU: ADSP BF531 Rev.: 0.%d\n", *pCHIPID >> 28);
#elif (BFIN_CPU == ADSP_BF532)
printf("CPU: ADSP BF532 Rev.: 0.%d\n", *pCHIPID >> 28);
#else
printf("CPU: ADSP BF533 Rev.: 0.%d\n", *pCHIPID >> 28);
#endif
printf("Board: ADI BF533 Stamp board\n");
printf(" Support: http://blackfin.uclinux.org/\n");
return 0;

View File

@@ -20,6 +20,6 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# TEXT_BASE should be defined as the MAX_SDRAM Address - 256k bytes
# 256k is defined as CFG_MONITOR_LEN in ./include/configs/<board>.h
TEXT_BASE = 0x07FC0000
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me

View File

@@ -1,474 +0,0 @@
/****************************************************************************
* SPI flash driver for M25P64
****************************************************************************/
#include <common.h>
#include <linux/ctype.h>
#include <asm/io.h>
#include <asm/mach-common/bits/spi.h>
#if defined(CONFIG_SPI)
/*Application definitions */
#define NUM_SECTORS 128 /* number of sectors */
#define SECTOR_SIZE 0x10000
#define NOP_NUM 1000
#define COMMON_SPI_SETTINGS (SPE|MSTR|CPHA|CPOL) /*Settings to the SPI_CTL */
#define TIMOD01 (0x01) /*stes the SPI to work with core instructions */
/*Flash commands */
#define SPI_WREN (0x06) /*Set Write Enable Latch */
#define SPI_WRDI (0x04) /*Reset Write Enable Latch */
#define SPI_RDSR (0x05) /*Read Status Register */
#define SPI_WRSR (0x01) /*Write Status Register */
#define SPI_READ (0x03) /*Read data from memory */
#define SPI_PP (0x02) /*Program Data into memory */
#define SPI_SE (0xD8) /*Erase one sector in memory */
#define SPI_BE (0xC7) /*Erase all memory */
#define WIP (0x1) /*Check the write in progress bit of the SPI status register */
#define WEL (0x2) /*Check the write enable bit of the SPI status register */
#define TIMEOUT 350000000
typedef enum {
NO_ERR,
POLL_TIMEOUT,
INVALID_SECTOR,
INVALID_BLOCK,
} ERROR_CODE;
void spi_init_f(void);
void spi_init_r(void);
ssize_t spi_read(uchar *, int, uchar *, int);
ssize_t spi_write(uchar *, int, uchar *, int);
char ReadStatusRegister(void);
void Wait_For_SPIF(void);
void SetupSPI(const int spi_setting);
void SPI_OFF(void);
void SendSingleCommand(const int iCommand);
ERROR_CODE GetSectorNumber(unsigned long ulOffset, int *pnSector);
ERROR_CODE EraseBlock(int nBlock);
ERROR_CODE ReadData(unsigned long ulStart, long lCount, int *pnData);
ERROR_CODE WriteData(unsigned long ulStart, long lCount, int *pnData);
ERROR_CODE Wait_For_Status(char Statusbit);
ERROR_CODE Wait_For_WEL(void);
/* -------------------
* Variables
* ------------------- */
/* **************************************************************************
*
* Function: spi_init_f
*
* Description: Init SPI-Controller (ROM part)
*
* return: ---
*
* *********************************************************************** */
void spi_init_f(void)
{
}
/* **************************************************************************
*
* Function: spi_init_r
*
* Description: Init SPI-Controller (RAM part) -
* The malloc engine is ready and we can move our buffers to
* normal RAM
*
* return: ---
*
* *********************************************************************** */
void spi_init_r(void)
{
return;
}
/****************************************************************************
* Function: spi_write
**************************************************************************** */
ssize_t spi_write(uchar * addr, int alen, uchar * buffer, int len)
{
unsigned long offset;
int start_block, end_block;
int start_byte, end_byte;
ERROR_CODE result = NO_ERR;
uchar temp[SECTOR_SIZE];
int i, num;
offset = addr[0] << 16 | addr[1] << 8 | addr[2];
/* Get the start block number */
result = GetSectorNumber(offset, &start_block);
if (result == INVALID_SECTOR) {
printf("Invalid sector! ");
return 0;
}
/* Get the end block number */
result = GetSectorNumber(offset + len - 1, &end_block);
if (result == INVALID_SECTOR) {
printf("Invalid sector! ");
return 0;
}
for (num = start_block; num <= end_block; num++) {
ReadData(num * SECTOR_SIZE, SECTOR_SIZE, (int *)temp);
start_byte = num * SECTOR_SIZE;
end_byte = (num + 1) * SECTOR_SIZE - 1;
if (start_byte < offset)
start_byte = offset;
if (end_byte > (offset + len))
end_byte = (offset + len - 1);
for (i = start_byte; i <= end_byte; i++)
temp[i - num * SECTOR_SIZE] = buffer[i - offset];
EraseBlock(num);
result = WriteData(num * SECTOR_SIZE, SECTOR_SIZE, (int *)temp);
if (result != NO_ERR)
return 0;
printf(".");
}
return len;
}
/****************************************************************************
* Function: spi_read
**************************************************************************** */
ssize_t spi_read(uchar * addr, int alen, uchar * buffer, int len)
{
unsigned long offset;
offset = addr[0] << 16 | addr[1] << 8 | addr[2];
ReadData(offset, len, (int *)buffer);
return len;
}
void SendSingleCommand(const int iCommand)
{
unsigned short dummy;
/*turns on the SPI in single write mode */
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01));
/*sends the actual command to the SPI TX register */
*pSPI_TDBR = iCommand;
SSYNC();
/*The SPI status register will be polled to check the SPIF bit */
Wait_For_SPIF();
dummy = *pSPI_RDBR;
/*The SPI will be turned off */
SPI_OFF();
}
void SetupSPI(const int spi_setting)
{
if (icache_status() || dcache_status())
udelay(CONFIG_CCLK_HZ / 50000000);
/*sets up the PF2 to be the slave select of the SPI */
*pSPI_FLG = 0xFB04;
*pSPI_BAUD = CONFIG_SPI_BAUD;
*pSPI_CTL = spi_setting;
SSYNC();
}
void SPI_OFF(void)
{
*pSPI_CTL = 0x0400; /* disable SPI */
*pSPI_FLG = 0;
*pSPI_BAUD = 0;
SSYNC();
udelay(CONFIG_CCLK_HZ / 50000000);
}
void Wait_For_SPIF(void)
{
unsigned short dummyread;
while ((*pSPI_STAT & TXS)) ;
while (!(*pSPI_STAT & SPIF)) ;
while (!(*pSPI_STAT & RXS)) ;
dummyread = *pSPI_RDBR; /* Read dummy to empty the receive register */
}
ERROR_CODE Wait_For_WEL(void)
{
int i;
char status_register = 0;
ERROR_CODE ErrorCode = NO_ERR; /* tells us if there was an error erasing flash */
for (i = 0; i < TIMEOUT; i++) {
status_register = ReadStatusRegister();
if ((status_register & WEL)) {
ErrorCode = NO_ERR; /* tells us if there was an error erasing flash */
break;
}
ErrorCode = POLL_TIMEOUT; /* Time out error */
};
return ErrorCode;
}
ERROR_CODE Wait_For_Status(char Statusbit)
{
int i;
char status_register = 0xFF;
ERROR_CODE ErrorCode = NO_ERR; /* tells us if there was an error erasing flash */
for (i = 0; i < TIMEOUT; i++) {
status_register = ReadStatusRegister();
if (!(status_register & Statusbit)) {
ErrorCode = NO_ERR; /* tells us if there was an error erasing flash */
break;
}
ErrorCode = POLL_TIMEOUT; /* Time out error */
};
return ErrorCode;
}
char ReadStatusRegister(void)
{
char status_register = 0;
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01)); /* Turn on the SPI */
*pSPI_TDBR = SPI_RDSR; /* send instruction to read status register */
SSYNC();
Wait_For_SPIF(); /*wait until the instruction has been sent */
*pSPI_TDBR = 0; /*send dummy to receive the status register */
SSYNC();
Wait_For_SPIF(); /*wait until the data has been sent */
status_register = *pSPI_RDBR; /*read the status register */
SPI_OFF(); /* Turn off the SPI */
return status_register;
}
ERROR_CODE GetSectorNumber(unsigned long ulOffset, int *pnSector)
{
int nSector = 0;
ERROR_CODE ErrorCode = NO_ERR;
if (ulOffset > (NUM_SECTORS * 0x10000 - 1)) {
ErrorCode = INVALID_SECTOR;
return ErrorCode;
}
nSector = (int)ulOffset / 0x10000;
*pnSector = nSector;
/* ok */
return ErrorCode;
}
ERROR_CODE EraseBlock(int nBlock)
{
unsigned long ulSectorOff = 0x0, ShiftValue;
ERROR_CODE ErrorCode = NO_ERR;
/* if the block is invalid just return */
if ((nBlock < 0) || (nBlock > NUM_SECTORS)) {
ErrorCode = INVALID_BLOCK; /* tells us if there was an error erasing flash */
return ErrorCode;
}
/* figure out the offset of the block in flash */
if ((nBlock >= 0) && (nBlock < NUM_SECTORS)) {
ulSectorOff = (nBlock * SECTOR_SIZE);
} else {
ErrorCode = INVALID_BLOCK; /* tells us if there was an error erasing flash */
return ErrorCode;
}
/* A write enable instruction must previously have been executed */
SendSingleCommand(SPI_WREN);
/*The status register will be polled to check the write enable latch "WREN" */
ErrorCode = Wait_For_WEL();
if (POLL_TIMEOUT == ErrorCode) {
printf("SPI Erase block error\n");
return ErrorCode;
} else
/*Turn on the SPI to send single commands */
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01));
/* Send the erase block command to the flash followed by the 24 address */
/* to point to the start of a sector. */
*pSPI_TDBR = SPI_SE;
SSYNC();
Wait_For_SPIF();
ShiftValue = (ulSectorOff >> 16); /* Send the highest byte of the 24 bit address at first */
*pSPI_TDBR = ShiftValue;
SSYNC();
Wait_For_SPIF(); /* Wait until the instruction has been sent */
ShiftValue = (ulSectorOff >> 8); /* Send the middle byte of the 24 bit address at second */
*pSPI_TDBR = ShiftValue;
SSYNC();
Wait_For_SPIF(); /* Wait until the instruction has been sent */
*pSPI_TDBR = ulSectorOff; /* Send the lowest byte of the 24 bit address finally */
SSYNC();
Wait_For_SPIF(); /* Wait until the instruction has been sent */
/*Turns off the SPI */
SPI_OFF();
/* Poll the status register to check the Write in Progress bit */
/* Sector erase takes time */
ErrorCode = Wait_For_Status(WIP);
/* block erase should be complete */
return ErrorCode;
}
/*****************************************************************************
* ERROR_CODE ReadData()
*
* Read a value from flash for verify purpose
*
* Inputs: unsigned long ulStart - holds the SPI start address
* int pnData - pointer to store value read from flash
* long lCount - number of elements to read
***************************************************************************** */
ERROR_CODE ReadData(unsigned long ulStart, long lCount, int *pnData)
{
unsigned long ShiftValue;
char *cnData;
int i;
cnData = (char *)pnData; /* Pointer cast to be able to increment byte wise */
/* Start SPI interface */
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01));
*pSPI_TDBR = SPI_READ; /* Send the read command to SPI device */
SSYNC();
Wait_For_SPIF(); /* Wait until the instruction has been sent */
ShiftValue = (ulStart >> 16); /* Send the highest byte of the 24 bit address at first */
*pSPI_TDBR = ShiftValue; /* Send the byte to the SPI device */
SSYNC();
Wait_For_SPIF(); /* Wait until the instruction has been sent */
ShiftValue = (ulStart >> 8); /* Send the middle byte of the 24 bit address at second */
*pSPI_TDBR = ShiftValue; /* Send the byte to the SPI device */
SSYNC();
Wait_For_SPIF(); /* Wait until the instruction has been sent */
*pSPI_TDBR = ulStart; /* Send the lowest byte of the 24 bit address finally */
SSYNC();
Wait_For_SPIF(); /* Wait until the instruction has been sent */
/* After the SPI device address has been placed on the MOSI pin the data can be */
/* received on the MISO pin. */
for (i = 0; i < lCount; i++) {
*pSPI_TDBR = 0; /*send dummy */
SSYNC();
while (!(*pSPI_STAT & RXS)) ;
*cnData++ = *pSPI_RDBR; /*read */
if ((i >= SECTOR_SIZE) && (i % SECTOR_SIZE == 0))
printf(".");
}
SPI_OFF(); /* Turn off the SPI */
return NO_ERR;
}
ERROR_CODE WriteFlash(unsigned long ulStartAddr, long lTransferCount,
int *iDataSource, long *lWriteCount)
{
unsigned long ulWAddr;
long lWTransferCount = 0;
int i;
char iData;
char *temp = (char *)iDataSource;
ERROR_CODE ErrorCode = NO_ERR; /* tells us if there was an error erasing flash */
/* First, a Write Enable Command must be sent to the SPI. */
SendSingleCommand(SPI_WREN);
/* Second, the SPI Status Register will be tested whether the */
/* Write Enable Bit has been set. */
ErrorCode = Wait_For_WEL();
if (POLL_TIMEOUT == ErrorCode) {
printf("SPI Write Time Out\n");
return ErrorCode;
} else
/* Third, the 24 bit address will be shifted out the SPI MOSI bytewise. */
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01)); /* Turns the SPI on */
*pSPI_TDBR = SPI_PP;
SSYNC();
Wait_For_SPIF(); /*wait until the instruction has been sent */
ulWAddr = (ulStartAddr >> 16);
*pSPI_TDBR = ulWAddr;
SSYNC();
Wait_For_SPIF(); /*wait until the instruction has been sent */
ulWAddr = (ulStartAddr >> 8);
*pSPI_TDBR = ulWAddr;
SSYNC();
Wait_For_SPIF(); /*wait until the instruction has been sent */
ulWAddr = ulStartAddr;
*pSPI_TDBR = ulWAddr;
SSYNC();
Wait_For_SPIF(); /*wait until the instruction has been sent */
/* Fourth, maximum number of 256 bytes will be taken from the Buffer */
/* and sent to the SPI device. */
for (i = 0; (i < lTransferCount) && (i < 256); i++, lWTransferCount++) {
iData = *temp;
*pSPI_TDBR = iData;
SSYNC();
Wait_For_SPIF(); /*wait until the instruction has been sent */
temp++;
}
SPI_OFF(); /* Turns the SPI off */
/* Sixth, the SPI Write in Progress Bit must be toggled to ensure the */
/* programming is done before start of next transfer. */
ErrorCode = Wait_For_Status(WIP);
if (POLL_TIMEOUT == ErrorCode) {
printf("SPI Program Time out!\n");
return ErrorCode;
} else
*lWriteCount = lWTransferCount;
return ErrorCode;
}
ERROR_CODE WriteData(unsigned long ulStart, long lCount, int *pnData)
{
unsigned long ulWStart = ulStart;
long lWCount = lCount, lWriteCount;
long *pnWriteCount = &lWriteCount;
ERROR_CODE ErrorCode = NO_ERR;
while (lWCount != 0) {
ErrorCode = WriteFlash(ulWStart, lWCount, pnData, pnWriteCount);
/* After each function call of WriteFlash the counter must be adjusted */
lWCount -= *pnWriteCount;
/* Also, both address pointers must be recalculated. */
ulWStart += *pnWriteCount;
pnData += *pnWriteCount / 4;
}
/* return the appropriate error code */
return ErrorCode;
}
#endif /* CONFIG_SPI */

View File

@@ -0,0 +1,2 @@
/* Share the spi flash code */
#include "../bf537-stamp/spi_flash.c"

View File

@@ -1,7 +1,7 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2007 Analog Device Inc.
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -26,127 +26,111 @@
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CFG_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
MEMORY
{
ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
. = CFG_MONITOR_BASE;
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector before the environment sector. If it throws */
/* an error during compilation remove an object here to get */
/* it linked after the configuration sector. */
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/bf533/start.o (.text)
cpu/bf533/start1.o (.text)
cpu/bf533/traps.o (.text)
cpu/bf533/interrupt.o (.text)
cpu/bf533/serial.o (.text)
cpu/blackfin/start.o (.text)
cpu/blackfin/traps.o (.text)
cpu/blackfin/interrupt.o (.text)
cpu/blackfin/serial.o (.text)
common/dlmalloc.o (.text)
/* lib_blackfin/bf533_string.o (.text) */
/* lib_generic/vsprintf.o (.text) */
lib_generic/crc32.o (.text)
/* lib_generic/zlib.o (.text) */
/* board/stamp/stamp.o (.text) */
. = DEFINED(env_offset) ? env_offset : .;
common/environment.o (.text)
#endif
*(.text .text.*)
} >ram
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
*(.data)
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(.bss .bss.*)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
__bss_end = .;
} >ram
}

View File

@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o flash.o ether_bf537.o post-memory.o stm_m25p64.o cmd_bf537led.o nand.o
COBJS := $(BOARD).o post-memory.o spi_flash.o cmd_bf537led.o nand.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
@@ -39,7 +39,7 @@ $(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -P -Ubfin $^ > $@.tmp
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
mv -f $@.tmp $@
clean:

View File

@@ -31,7 +31,6 @@
#include <asm/blackfin.h>
#include <asm/io.h>
#include <net.h>
#include "ether_bf537.h"
#include <asm/mach-common/bits/bootrom.h>
/**
@@ -54,60 +53,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define POST_WORD_ADDR 0xFF903FFC
/*
* the bootldr command loads an address, checks to see if there
* is a Boot stream that the on-chip BOOTROM can understand,
* and loads it via the BOOTROM Callback. It is possible
* to also add booting from SPI, or TWI, but this function does
* not currently support that.
*/
int do_bootldr(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
ulong addr, entry;
ulong *data;
/* Get the address */
if (argc < 2) {
addr = load_addr;
} else {
addr = simple_strtoul(argv[1], NULL, 16);
}
/* Check if it is a LDR file */
data = (ulong *) addr;
if (*data == 0xFF800060 || *data == 0xFF800040 || *data == 0xFF800020) {
/* We want to boot from FLASH or SDRAM */
entry = _BOOTROM_BOOT_DXE_FLASH;
printf("## Booting ldr image at 0x%08lx ...\n", addr);
if (icache_status())
icache_disable();
if (dcache_status())
dcache_disable();
__asm__("R7=%[a];\n" "P0=%[b];\n" "JUMP (P0);\n":
:[a] "d"(addr),[b] "a"(entry)
:"R7", "P0");
} else {
printf("## No ldr image at address 0x%08lx\n", addr);
}
return 0;
}
U_BOOT_CMD(bootldr, 2, 0, do_bootldr,
"bootldr - boot ldr image from memory\n",
"[addr]\n - boot ldr image stored in memory\n");
int checkboard(void)
{
#if (BFIN_CPU == ADSP_BF534)
printf("CPU: ADSP BF534 Rev.: 0.%d\n", *pCHIPID >> 28);
#elif (BFIN_CPU == ADSP_BF536)
printf("CPU: ADSP BF536 Rev.: 0.%d\n", *pCHIPID >> 28);
#else
printf("CPU: ADSP BF537 Rev.: 0.%d\n", *pCHIPID >> 28);
#endif
printf("Board: ADI BF537 stamp board\n");
printf(" Support: http://blackfin.uclinux.org/\n");
return 0;
@@ -173,12 +120,10 @@ long int initdram(int board_type)
/* miscellaneous platform dependent initialisations */
int misc_init_r(void)
{
#if (BFIN_BOOT_MODE == BF537_BYPASS_BOOT)
#if defined(CONFIG_CMD_NET)
char nid[32];
unsigned char *pMACaddr = (unsigned char *)0x203F0000;
u8 SrcAddr[6] = { 0x02, 0x80, 0xAD, 0x20, 0x31, 0xB8 };
#if defined(CONFIG_CMD_NET)
/* The 0xFF check here is to make sure we don't use the address
* in flash if it's simply been erased (aka all 0xFF values) */
if (getenv("ethaddr") == NULL && is_valid_ether_addr(pMACaddr)) {
@@ -187,11 +132,7 @@ int misc_init_r(void)
pMACaddr[2], pMACaddr[3], pMACaddr[4], pMACaddr[5]);
setenv("ethaddr", nid);
}
if (getenv("ethaddr")) {
SetupMacAddr(SrcAddr);
}
#endif
#endif /* BFIN_BOOT_MODE == BF537_BYPASS_BOOT */
#if defined(CONFIG_BFIN_IDE)
#if defined(CONFIG_BFIN_TRUE_IDE)
@@ -214,13 +155,6 @@ int misc_init_r(void)
#endif /* CONFIG_MISC_INIT_R */
#ifdef CONFIG_POST
#if (BFIN_BOOT_MODE != BF537_BYPASS_BOOT)
/* Using sw10-PF5 as the hotkey */
int post_hotkeys_pressed(void)
{
return 0;
}
#else
/* Using sw10-PF5 as the hotkey */
int post_hotkeys_pressed(void)
{
@@ -253,7 +187,6 @@ int post_hotkeys_pressed(void)
}
}
#endif
#endif
#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
void post_word_store(ulong a)

View File

@@ -20,6 +20,10 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# TEXT_BASE should be defined as the MAX_SDRAM Address - 256k bytes
# 256k is defined as CFG_MONITOR_LEN in ./include/configs/<board>.h
TEXT_BASE = 0x03FC0000
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

View File

@@ -1,123 +0,0 @@
/*
* U-boot - flash-defines.h
*
* Copyright (c) 2005-2007 Analog Devices Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef __FLASHDEFINES_H__
#define __FLASHDEFINES_H__
#include <common.h>
#define V_ULONG(a) (*(volatile unsigned long *)( a ))
#define V_BYTE(a) (*(volatile unsigned char *)( a ))
#define TRUE 0x1
#define FALSE 0x0
#define BUFFER_SIZE 0x80000
#define NO_COMMAND 0
#define GET_CODES 1
#define RESET 2
#define WRITE 3
#define FILL 4
#define ERASE_ALL 5
#define ERASE_SECT 6
#define READ 7
#define GET_SECTNUM 8
#define FLASH_START_L 0x0000
#define FLASH_START_H 0x2000
#define FLASH_MAN_ST 2
#define RESET_VAL 0xF0
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
int get_codes(void);
int poll_toggle_bit(long lOffset);
void reset_flash(void);
int erase_flash(void);
int erase_block_flash(int);
void unlock_flash(long lOffset);
int write_data(long lStart, long lCount, uchar * pnData);
int read_flash(long nOffset, int *pnValue);
int write_flash(long nOffset, int nValue);
void get_sector_number(long lOffset, int *pnSector);
int GetSectorProtectionStatus(flash_info_t * info, int nSector);
int GetOffset(int nBlock);
int AFP_NumSectors = 71;
long AFP_SectorSize2 = 0x10000;
int AFP_SectorSize1 = 0x2000;
#define NUM_SECTORS 71
#define WRITESEQ1 0x0AAA
#define WRITESEQ2 0x0554
#define WRITESEQ3 0x0AAA
#define WRITESEQ4 0x0AAA
#define WRITESEQ5 0x0554
#define WRITESEQ6 0x0AAA
#define WRITEDATA1 0xaa
#define WRITEDATA2 0x55
#define WRITEDATA3 0x80
#define WRITEDATA4 0xaa
#define WRITEDATA5 0x55
#define WRITEDATA6 0x10
#define PriFlashABegin 0
#define SecFlashABegin 8
#define SecFlashBBegin 36
#define PriFlashAOff 0x0
#define PriFlashBOff 0x100000
#define SecFlashAOff 0x10000
#define SecFlashBOff 0x280000
#define INVALIDLOCNSTART 0x20270000
#define INVALIDLOCNEND 0x20280000
#define BlockEraseVal 0x30
#define UNLOCKDATA1 0xaa
#define UNLOCKDATA2 0x55
#define UNLOCKDATA3 0xa0
#define GETCODEDATA1 0xaa
#define GETCODEDATA2 0x55
#define GETCODEDATA3 0x90
#define SecFlashASec1Off 0x200000
#define SecFlashASec2Off 0x204000
#define SecFlashASec3Off 0x206000
#define SecFlashASec4Off 0x208000
#define SecFlashAEndOff 0x210000
#define SecFlashBSec1Off 0x280000
#define SecFlashBSec2Off 0x284000
#define SecFlashBSec3Off 0x286000
#define SecFlashBSec4Off 0x288000
#define SecFlashBEndOff 0x290000
#define SECT32 32
#define SECT33 33
#define SECT34 34
#define SECT35 35
#define SECT36 36
#define SECT37 37
#define SECT38 38
#define SECT39 39
#define FLASH_SUCCESS 0
#define FLASH_FAIL -1
#endif

View File

@@ -1,403 +0,0 @@
/*
* U-boot - flash.c Flash driver for PSD4256GV
*
* Copyright (c) 2005-2007 Analog Devices Inc.
* This file is based on BF533EzFlash.c originally written by Analog Devices, Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <malloc.h>
#include <config.h>
#include <asm/io.h>
#include "flash-defines.h"
void flash_reset(void)
{
reset_flash();
}
unsigned long flash_get_size(ulong baseaddr, flash_info_t * info, int bank_flag)
{
int id = 0, i = 0;
static int FlagDev = 1;
id = get_codes();
if (FlagDev) {
FlagDev = 0;
}
info->flash_id = id;
switch (bank_flag) {
case 0:
for (i = PriFlashABegin; i < SecFlashABegin; i++)
info->start[i] = (baseaddr + (i * AFP_SectorSize1));
for (i = SecFlashABegin; i < NUM_SECTORS; i++)
info->start[i] =
(baseaddr + SecFlashAOff +
((i - SecFlashABegin) * AFP_SectorSize2));
info->size = 0x400000;
info->sector_count = NUM_SECTORS;
break;
case 1:
info->start[0] = baseaddr + SecFlashASec1Off;
info->start[1] = baseaddr + SecFlashASec2Off;
info->start[2] = baseaddr + SecFlashASec3Off;
info->start[3] = baseaddr + SecFlashASec4Off;
info->size = 0x10000;
info->sector_count = 4;
break;
case 2:
info->start[0] = baseaddr + SecFlashBSec1Off;
info->start[1] = baseaddr + SecFlashBSec2Off;
info->start[2] = baseaddr + SecFlashBSec3Off;
info->start[3] = baseaddr + SecFlashBSec4Off;
info->size = 0x10000;
info->sector_count = 4;
break;
}
return (info->size);
}
unsigned long flash_init(void)
{
unsigned long size_b;
int i;
size_b = 0;
for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
size_b = flash_get_size(CFG_FLASH_BASE, &flash_info[0], 0);
if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b == 0) {
printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b, size_b >> 20);
}
/* flash_protect (int flag, ulong from, ulong to, flash_info_t *info) */
(void)flash_protect(FLAG_PROTECT_SET, CFG_FLASH_BASE,
(flash_info[0].start[2] - 1), &flash_info[0]);
#if (BFIN_BOOT_MODE == BF537_BYPASS_BOOT)
(void)flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF,
&flash_info[0]);
#endif
return (size_b);
}
void flash_print_info(flash_info_t * info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id) {
case (STM_ID_29W320EB & 0xFFFF):
case (STM_ID_29W320DB & 0xFFFF):
printf("ST Microelectronics ");
break;
default:
printf("Unknown Vendor: (0x%08X) ", info->flash_id);
break;
}
for (i = 0; i < info->sector_count; ++i) {
if ((i % 5) == 0)
printf("\n ");
printf(" %08lX%s",
info->start[i], info->protect[i] ? " (RO)" : " ");
}
printf("\n");
return;
}
int flash_erase(flash_info_t * info, int s_first, int s_last)
{
int cnt = 0, i;
int prot, sect;
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect])
prot++;
}
if (prot)
printf("- Warning: %d protected sectors will not be erased!\n",
prot);
else
printf("\n");
cnt = s_last - s_first + 1;
#if (BFIN_BOOT_MODE == BF537_BYPASS_BOOT)
printf("Erasing Flash locations, Please Wait\n");
for (i = s_first; i <= s_last; i++) {
if (info->protect[i] == 0) { /* not protected */
if (erase_block_flash(i) < 0) {
printf("Error Sector erasing \n");
return FLASH_FAIL;
}
}
}
#elif (BFIN_BOOT_MODE == BF537_SPI_MASTER_BOOT)
if (cnt == FLASH_TOT_SECT) {
printf("Erasing flash, Please Wait \n");
if (erase_flash() < 0) {
printf("Erasing flash failed \n");
return FLASH_FAIL;
}
} else {
printf("Erasing Flash locations, Please Wait\n");
for (i = s_first; i <= s_last; i++) {
if (info->protect[i] == 0) { /* not protected */
if (erase_block_flash(i) < 0) {
printf("Error Sector erasing \n");
return FLASH_FAIL;
}
}
}
}
#endif
printf("\n");
return FLASH_SUCCESS;
}
int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
int d;
if (addr % 2) {
read_flash(addr - 1 - CFG_FLASH_BASE, &d);
d = (int)((d & 0x00FF) | (*src++ << 8));
write_data(addr - 1, 2, (uchar *) & d);
write_data(addr + 1, cnt - 1, src);
} else
write_data(addr, cnt, src);
return FLASH_SUCCESS;
}
int write_data(long lStart, long lCount, uchar * pnData)
{
long i = 0;
unsigned long ulOffset = lStart - CFG_FLASH_BASE;
int d;
int nSector = 0;
int flag = 0;
if (lCount % 2) {
flag = 1;
lCount = lCount - 1;
}
for (i = 0; i < lCount - 1; i += 2, ulOffset += 2) {
get_sector_number(ulOffset, &nSector);
read_flash(ulOffset, &d);
if (d != 0xffff) {
printf
("Flash not erased at offset 0x%x Please erase to reprogram \n",
ulOffset);
return FLASH_FAIL;
}
unlock_flash(ulOffset);
d = (int)(pnData[i] | pnData[i + 1] << 8);
write_flash(ulOffset, d);
if (poll_toggle_bit(ulOffset) < 0) {
printf("Error programming the flash \n");
return FLASH_FAIL;
}
if ((i > 0) && (!(i % AFP_SectorSize2)))
printf(".");
}
if (flag) {
get_sector_number(ulOffset, &nSector);
read_flash(ulOffset, &d);
if (d != 0xffff) {
printf
("Flash not erased at offset 0x%x Please erase to reprogram \n",
ulOffset);
return FLASH_FAIL;
}
unlock_flash(ulOffset);
d = (int)(pnData[i] | (d & 0xFF00));
write_flash(ulOffset, d);
if (poll_toggle_bit(ulOffset) < 0) {
printf("Error programming the flash \n");
return FLASH_FAIL;
}
}
return FLASH_SUCCESS;
}
int write_flash(long nOffset, int nValue)
{
long addr;
addr = (CFG_FLASH_BASE + nOffset);
*(unsigned volatile short *)addr = nValue;
SSYNC();
#if (BFIN_BOOT_MODE == BF537_SPI_MASTER_BOOT)
if (icache_status())
udelay(CONFIG_CCLK_HZ / 1000000);
#endif
return FLASH_SUCCESS;
}
int read_flash(long nOffset, int *pnValue)
{
unsigned short *pFlashAddr =
(unsigned short *)(CFG_FLASH_BASE + nOffset);
*pnValue = *pFlashAddr;
return TRUE;
}
int poll_toggle_bit(long lOffset)
{
unsigned int u1, u2;
volatile unsigned long *FB =
(volatile unsigned long *)(CFG_FLASH_BASE + lOffset);
while (1) {
u1 = *(volatile unsigned short *)FB;
u2 = *(volatile unsigned short *)FB;
u1 ^= u2;
if (!(u1 & 0x0040))
break;
if (!(u2 & 0x0020))
continue;
else {
u1 = *(volatile unsigned short *)FB;
u2 = *(volatile unsigned short *)FB;
u1 ^= u2;
if (!(u1 & 0x0040))
break;
else {
reset_flash();
return FLASH_FAIL;
}
}
}
return FLASH_SUCCESS;
}
void reset_flash(void)
{
write_flash(WRITESEQ1, RESET_VAL);
/* Wait for 10 micro seconds */
udelay(10);
}
int erase_flash(void)
{
write_flash(WRITESEQ1, WRITEDATA1);
write_flash(WRITESEQ2, WRITEDATA2);
write_flash(WRITESEQ3, WRITEDATA3);
write_flash(WRITESEQ4, WRITEDATA4);
write_flash(WRITESEQ5, WRITEDATA5);
write_flash(WRITESEQ6, WRITEDATA6);
if (poll_toggle_bit(0x0000) < 0)
return FLASH_FAIL;
return FLASH_SUCCESS;
}
int erase_block_flash(int nBlock)
{
long ulSectorOff = 0x0;
if ((nBlock < 0) || (nBlock > AFP_NumSectors))
return FALSE;
/* figure out the offset of the block in flash */
if ((nBlock >= 0) && (nBlock < SecFlashABegin))
ulSectorOff = nBlock * AFP_SectorSize1;
else if ((nBlock >= SecFlashABegin) && (nBlock < NUM_SECTORS))
ulSectorOff =
SecFlashAOff + (nBlock - SecFlashABegin) * AFP_SectorSize2;
/* no such sector */
else
return FLASH_FAIL;
write_flash((WRITESEQ1 | ulSectorOff), WRITEDATA1);
write_flash((WRITESEQ2 | ulSectorOff), WRITEDATA2);
write_flash((WRITESEQ3 | ulSectorOff), WRITEDATA3);
write_flash((WRITESEQ4 | ulSectorOff), WRITEDATA4);
write_flash((WRITESEQ5 | ulSectorOff), WRITEDATA5);
write_flash(ulSectorOff, BlockEraseVal);
if (poll_toggle_bit(ulSectorOff) < 0)
return FLASH_FAIL;
printf(".");
return FLASH_SUCCESS;
}
void unlock_flash(long ulOffset)
{
unsigned long ulOffsetAddr = ulOffset;
ulOffsetAddr &= 0xFFFF0000;
write_flash((WRITESEQ1 | ulOffsetAddr), UNLOCKDATA1);
write_flash((WRITESEQ2 | ulOffsetAddr), UNLOCKDATA2);
write_flash((WRITESEQ3 | ulOffsetAddr), UNLOCKDATA3);
}
int get_codes()
{
int dev_id = 0;
write_flash(WRITESEQ1, GETCODEDATA1);
write_flash(WRITESEQ2, GETCODEDATA2);
write_flash(WRITESEQ3, GETCODEDATA3);
read_flash(0x0402, &dev_id);
dev_id &= 0x0000FFFF;
reset_flash();
return dev_id;
}
void get_sector_number(long ulOffset, int *pnSector)
{
int nSector = 0;
long lMainEnd = 0x400000;
long lBootEnd = 0x10000;
/* sector numbers for the FLASH A boot sectors */
if (ulOffset < lBootEnd) {
nSector = (int)ulOffset / AFP_SectorSize1;
}
/* sector numbers for the FLASH B boot sectors */
else if ((ulOffset >= lBootEnd) && (ulOffset < lMainEnd)) {
nSector = ((ulOffset / (AFP_SectorSize2)) + 7);
}
/* if it is a valid sector, set it */
if ((nSector >= 0) && (nSector < AFP_NumSectors))
*pnSector = nSector;
}

View File

@@ -0,0 +1,815 @@
/*
* SPI flash driver
*
* Enter bugs at http://blackfin.uclinux.org/
*
* Copyright (c) 2005-2007 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
/* Configuration options:
* CONFIG_SPI_BAUD - value to load into SPI_BAUD (divisor of SCLK to get SPI CLK)
* CONFIG_SPI_FLASH_SLOW_READ - force usage of the slower read
* WARNING: make sure your SCLK + SPI_BAUD is slow enough
*/
#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <asm/mach-common/bits/spi.h>
/* Forcibly phase out these */
#ifdef CONFIG_SPI_FLASH_NUM_SECTORS
# error do not set CONFIG_SPI_FLASH_NUM_SECTORS
#endif
#ifdef CONFIG_SPI_FLASH_SECTOR_SIZE
# error do not set CONFIG_SPI_FLASH_SECTOR_SIZE
#endif
#if defined(CONFIG_SPI)
struct flash_info {
char *name;
uint16_t id;
unsigned sector_size;
unsigned num_sectors;
};
/* SPI Speeds: 50 MHz / 33 MHz */
static struct flash_info flash_spansion_serial_flash[] = {
{ "S25FL016", 0x0215, 64 * 1024, 32 },
{ "S25FL032", 0x0216, 64 * 1024, 64 },
{ "S25FL064", 0x0217, 64 * 1024, 128 },
{ "S25FL0128", 0x0218, 256 * 1024, 64 },
{ NULL, 0, 0, 0 }
};
/* SPI Speeds: 50 MHz / 20 MHz */
static struct flash_info flash_st_serial_flash[] = {
{ "m25p05", 0x2010, 32 * 1024, 2 },
{ "m25p10", 0x2011, 32 * 1024, 4 },
{ "m25p20", 0x2012, 64 * 1024, 4 },
{ "m25p40", 0x2013, 64 * 1024, 8 },
{ "m25p16", 0x2015, 64 * 1024, 32 },
{ "m25p32", 0x2016, 64 * 1024, 64 },
{ "m25p64", 0x2017, 64 * 1024, 128 },
{ "m25p128", 0x2018, 256 * 1024, 64 },
{ NULL, 0, 0, 0 }
};
/* SPI Speeds: 66 MHz / 33 MHz */
static struct flash_info flash_atmel_dataflash[] = {
{ "AT45DB011x", 0x0c, 264, 512 },
{ "AT45DB021x", 0x14, 264, 1025 },
{ "AT45DB041x", 0x1c, 264, 2048 },
{ "AT45DB081x", 0x24, 264, 4096 },
{ "AT45DB161x", 0x2c, 528, 4096 },
{ "AT45DB321x", 0x34, 528, 8192 },
{ "AT45DB642x", 0x3c, 1056, 8192 },
{ NULL, 0, 0, 0 }
};
/* SPI Speed: 50 MHz / 25 MHz or 40 MHz / 20 MHz */
static struct flash_info flash_winbond_serial_flash[] = {
{ "W25X10", 0x3011, 16 * 256, 32 },
{ "W25X20", 0x3012, 16 * 256, 64 },
{ "W25X40", 0x3013, 16 * 256, 128 },
{ "W25X80", 0x3014, 16 * 256, 256 },
{ "W25P80", 0x2014, 256 * 256, 16 },
{ "W25P16", 0x2015, 256 * 256, 32 },
{ NULL, 0, 0, 0 }
};
struct flash_ops {
uint8_t read, write, erase, status;
};
#ifdef CONFIG_SPI_FLASH_SLOW_READ
# define OP_READ 0x03
#else
# define OP_READ 0x0B
#endif
static struct flash_ops flash_st_ops = {
.read = OP_READ,
.write = 0x02,
.erase = 0xD8,
.status = 0x05,
};
static struct flash_ops flash_atmel_ops = {
.read = OP_READ,
.write = 0x82,
.erase = 0x81,
.status = 0xD7,
};
static struct flash_ops flash_winbond_ops = {
.read = OP_READ,
.write = 0x02,
.erase = 0x20,
.status = 0x05,
};
struct manufacturer_info {
const char *name;
uint8_t id;
struct flash_info *flashes;
struct flash_ops *ops;
};
static struct {
struct manufacturer_info *manufacturer;
struct flash_info *flash;
struct flash_ops *ops;
uint8_t manufacturer_id, device_id1, device_id2;
unsigned int write_length;
unsigned long sector_size, num_sectors;
} flash;
enum {
JED_MANU_SPANSION = 0x01,
JED_MANU_ST = 0x20,
JED_MANU_ATMEL = 0x1F,
JED_MANU_WINBOND = 0xEF,
};
static struct manufacturer_info flash_manufacturers[] = {
{
.name = "Spansion",
.id = JED_MANU_SPANSION,
.flashes = flash_spansion_serial_flash,
.ops = &flash_st_ops,
},
{
.name = "ST",
.id = JED_MANU_ST,
.flashes = flash_st_serial_flash,
.ops = &flash_st_ops,
},
{
.name = "Atmel",
.id = JED_MANU_ATMEL,
.flashes = flash_atmel_dataflash,
.ops = &flash_atmel_ops,
},
{
.name = "Winbond",
.id = JED_MANU_WINBOND,
.flashes = flash_winbond_serial_flash,
.ops = &flash_winbond_ops,
},
};
#define TIMEOUT 5000 /* timeout of 5 seconds */
/* BF54x support */
#ifndef pSPI_CTL
# define pSPI_CTL pSPI0_CTL
# define pSPI_BAUD pSPI0_BAUD
# define pSPI_FLG pSPI0_FLG
# define pSPI_RDBR pSPI0_RDBR
# define pSPI_STAT pSPI0_STAT
# define pSPI_TDBR pSPI0_TDBR
# define SPI0_SCK 0x0001
# define SPI0_MOSI 0x0004
# define SPI0_MISO 0x0002
# define SPI0_SEL1 0x0010
#endif
/* Default to the SPI SSEL that we boot off of:
* BF54x, BF537, (everything new?): SSEL1
* BF533, BF561: SSEL2
*/
#ifndef CONFIG_SPI_FLASH_SSEL
# if defined(__ADSPBF531__) || defined(__ADSPBF532__) || \
defined(__ADSPBF533__) || defined(__ADSPBF561__)
# define CONFIG_SPI_FLASH_SSEL 2
# else
# define CONFIG_SPI_FLASH_SSEL 1
# endif
#endif
#define SSEL_MASK (1 << CONFIG_SPI_FLASH_SSEL)
static void SPI_INIT(void)
{
/* [#3541] This delay appears to be necessary, but not sure
* exactly why as the history behind it is non-existant.
*/
udelay(CONFIG_CCLK_HZ / 25000000);
/* enable SPI pins: SSEL, MOSI, MISO, SCK */
#ifdef __ADSPBF54x__
*pPORTE_FER |= (SPI0_SCK | SPI0_MOSI | SPI0_MISO | SPI0_SEL1);
#elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
*pPORTF_FER |= (PF10 | PF11 | PF12 | PF13);
#elif defined(__ADSPBF52x__)
bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_3);
bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG1 | PG2 | PG3 | PG4);
#endif
/* initate communication upon write of TDBR */
*pSPI_CTL = (SPE|MSTR|CPHA|CPOL|0x01);
*pSPI_BAUD = CONFIG_SPI_BAUD;
}
static void SPI_DEINIT(void)
{
/* put SPI settings back to reset state */
*pSPI_CTL = 0x0400;
*pSPI_BAUD = 0;
SSYNC();
}
static void SPI_ON(void)
{
/* toggle SSEL to reset the device so it'll take a new command */
*pSPI_FLG = 0xFF00 | SSEL_MASK;
SSYNC();
*pSPI_FLG = ((0xFF & ~SSEL_MASK) << 8) | SSEL_MASK;
SSYNC();
}
static void SPI_OFF(void)
{
/* put SPI settings back to reset state */
*pSPI_FLG = 0xFF00;
SSYNC();
}
static uint8_t spi_write_read_byte(uint8_t transmit)
{
*pSPI_TDBR = transmit;
SSYNC();
while ((*pSPI_STAT & TXS))
if (ctrlc())
break;
while (!(*pSPI_STAT & SPIF))
if (ctrlc())
break;
while (!(*pSPI_STAT & RXS))
if (ctrlc())
break;
/* Read dummy to empty the receive register */
return *pSPI_RDBR;
}
static uint8_t read_status_register(void)
{
uint8_t status_register;
/* send instruction to read status register */
SPI_ON();
spi_write_read_byte(flash.ops->status);
/* send dummy to receive the status register */
status_register = spi_write_read_byte(0);
SPI_OFF();
return status_register;
}
static int wait_for_ready_status(void)
{
ulong start = get_timer(0);
while (get_timer(0) - start < TIMEOUT) {
switch (flash.manufacturer_id) {
case JED_MANU_SPANSION:
case JED_MANU_ST:
case JED_MANU_WINBOND:
if (!(read_status_register() & 0x01))
return 0;
break;
case JED_MANU_ATMEL:
if (read_status_register() & 0x80)
return 0;
break;
}
if (ctrlc()) {
puts("\nAbort\n");
return -1;
}
}
puts("Timeout\n");
return -1;
}
/* Request and read the manufacturer and device id of parts which
* are compatible with the JEDEC standard (JEP106) and use that to
* setup other operating conditions.
*/
static int spi_detect_part(void)
{
uint16_t dev_id;
size_t i;
static char called_init;
if (called_init)
return 0;
SPI_ON();
/* Send the request for the part identification */
spi_write_read_byte(0x9F);
/* Now read in the manufacturer id bytes */
do {
flash.manufacturer_id = spi_write_read_byte(0);
if (flash.manufacturer_id == 0x7F)
puts("Warning: unhandled manufacturer continuation byte!\n");
} while (flash.manufacturer_id == 0x7F);
/* Now read in the first device id byte */
flash.device_id1 = spi_write_read_byte(0);
/* Now read in the second device id byte */
flash.device_id2 = spi_write_read_byte(0);
SPI_OFF();
dev_id = (flash.device_id1 << 8) | flash.device_id2;
for (i = 0; i < ARRAY_SIZE(flash_manufacturers); ++i) {
if (flash.manufacturer_id == flash_manufacturers[i].id)
break;
}
if (i == ARRAY_SIZE(flash_manufacturers))
goto unknown;
flash.manufacturer = &flash_manufacturers[i];
flash.ops = flash_manufacturers[i].ops;
switch (flash.manufacturer_id) {
case JED_MANU_SPANSION:
case JED_MANU_ST:
case JED_MANU_WINBOND:
for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
if (dev_id == flash.manufacturer->flashes[i].id)
break;
}
if (!flash.manufacturer->flashes[i].name)
goto unknown;
flash.flash = &flash.manufacturer->flashes[i];
flash.sector_size = flash.flash->sector_size;
flash.num_sectors = flash.flash->num_sectors;
flash.write_length = 256;
break;
case JED_MANU_ATMEL: {
uint8_t status = read_status_register();
for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
if ((status & 0x3c) == flash.manufacturer->flashes[i].id)
break;
}
if (!flash.manufacturer->flashes[i].name)
goto unknown;
flash.flash = &flash.manufacturer->flashes[i];
flash.sector_size = flash.flash->sector_size;
flash.num_sectors = flash.flash->num_sectors;
/* see if flash is in "power of 2" mode */
if (status & 0x1)
flash.sector_size &= ~(1 << (ffs(flash.sector_size) - 1));
flash.write_length = flash.sector_size;
break;
}
}
called_init = 1;
return 0;
unknown:
printf("Unknown SPI device: 0x%02X 0x%02X 0x%02X\n",
flash.manufacturer_id, flash.device_id1, flash.device_id2);
return 1;
}
/*
* Function: spi_init_f
* Description: Init SPI-Controller (ROM part)
* return: ---
*/
void spi_init_f(void)
{
}
/*
* Function: spi_init_r
* Description: Init SPI-Controller (RAM part) -
* The malloc engine is ready and we can move our buffers to
* normal RAM
* return: ---
*/
void spi_init_r(void)
{
#if defined(CONFIG_POST) && (CONFIG_POST & CFG_POST_SPI)
/* Our testing strategy here is pretty basic:
* - fill src memory with an 8-bit pattern
* - write the src memory to the SPI flash
* - read the SPI flash into the dst memory
* - compare src and dst memory regions
* - repeat a few times
* The variations we test for:
* - change the 8-bit pattern a bit
* - change the read/write block size so we know:
* - writes smaller/equal/larger than the buffer work
* - writes smaller/equal/larger than the sector work
* - change the SPI offsets so we know:
* - writing partial sectors works
*/
uint8_t *mem_src, *mem_dst;
size_t i, c, l, o;
size_t test_count, errors;
uint8_t pattern;
SPI_INIT();
if (spi_detect_part())
goto out;
eeprom_info();
ulong lengths[] = {
flash.write_length,
flash.write_length * 2,
flash.write_length / 2,
flash.sector_size,
flash.sector_size * 2,
flash.sector_size / 2
};
ulong offsets[] = {
0,
flash.write_length,
flash.write_length * 2,
flash.write_length / 2,
flash.write_length / 4,
flash.sector_size,
flash.sector_size * 2,
flash.sector_size / 2,
flash.sector_size / 4,
};
/* the exact addresses are arbitrary ... they just need to not overlap */
mem_src = (void *)(0);
mem_dst = (void *)(max(flash.write_length, flash.sector_size) * 2);
test_count = 0;
errors = 0;
pattern = 0x00;
for (i = 0; i < 16; ++i) { /* 16 = 8 bits * 2 iterations */
for (l = 0; l < ARRAY_SIZE(lengths); ++l) {
for (o = 0; o < ARRAY_SIZE(offsets); ++o) {
ulong len = lengths[l];
ulong off = offsets[o];
printf("Testing pattern 0x%02X of length %5lu and offset %5lu: ", pattern, len, off);
/* setup the source memory region */
memset(mem_src, pattern, len);
test_count += 4;
for (c = 0; c < 4; ++c) { /* 4 is just a random repeat count */
if (ctrlc()) {
puts("\nAbort\n");
goto out;
}
/* make sure background fill pattern != pattern */
memset(mem_dst, pattern ^ 0xFF, len);
/* write out the source memory and then read it back and compare */
eeprom_write(0, off, mem_src, len);
eeprom_read(0, off, mem_dst, len);
if (memcmp(mem_src, mem_dst, len)) {
for (c = 0; c < len; ++c)
if (mem_src[c] != mem_dst[c])
break;
printf(" FAIL @ offset %u, skipping repeats ", c);
++errors;
break;
}
/* XXX: should shrink write region here to test with
* leading/trailing canaries so we know surrounding
* bytes don't get screwed.
*/
}
puts("\n");
}
}
/* invert the pattern every other run and shift out bits slowly */
pattern ^= 0xFF;
if (i % 2)
pattern = (pattern | 0x01) << 1;
}
if (errors)
printf("SPI FAIL: Out of %i tests, there were %i errors ;(\n", test_count, errors);
else
printf("SPI PASS: %i tests worked!\n", test_count);
out:
SPI_DEINIT();
#endif
}
static void transmit_address(uint32_t addr)
{
/* Send the highest byte of the 24 bit address at first */
spi_write_read_byte(addr >> 16);
/* Send the middle byte of the 24 bit address at second */
spi_write_read_byte(addr >> 8);
/* Send the lowest byte of the 24 bit address finally */
spi_write_read_byte(addr);
}
/*
* Read a value from flash for verify purpose
* Inputs: unsigned long ulStart - holds the SPI start address
* int pnData - pointer to store value read from flash
* long lCount - number of elements to read
*/
static int read_flash(unsigned long address, long count, uchar *buffer)
{
size_t i;
/* Send the read command to SPI device */
SPI_ON();
spi_write_read_byte(flash.ops->read);
transmit_address(address);
#ifndef CONFIG_SPI_FLASH_SLOW_READ
/* Send dummy byte when doing SPI fast reads */
spi_write_read_byte(0);
#endif
/* After the SPI device address has been placed on the MOSI pin the data can be */
/* received on the MISO pin. */
for (i = 1; i <= count; ++i) {
*buffer++ = spi_write_read_byte(0);
if (i % flash.sector_size == 0)
puts(".");
}
SPI_OFF();
return 0;
}
static int enable_writing(void)
{
ulong start;
if (flash.manufacturer_id == JED_MANU_ATMEL)
return 0;
/* A write enable instruction must previously have been executed */
SPI_ON();
spi_write_read_byte(0x06);
SPI_OFF();
/* The status register will be polled to check the write enable latch "WREN" */
start = get_timer(0);
while (get_timer(0) - start < TIMEOUT) {
if (read_status_register() & 0x02)
return 0;
if (ctrlc()) {
puts("\nAbort\n");
return -1;
}
}
puts("Timeout\n");
return -1;
}
static long address_to_sector(unsigned long address)
{
if (address > (flash.num_sectors * flash.sector_size) - 1)
return -1;
return address / flash.sector_size;
}
static int erase_sector(int address)
{
/* sector gets checked in higher function, so assume it's valid
* here and figure out the offset of the sector in flash
*/
if (enable_writing())
return -1;
/*
* Send the erase block command to the flash followed by the 24 address
* to point to the start of a sector
*/
SPI_ON();
spi_write_read_byte(flash.ops->erase);
transmit_address(address);
SPI_OFF();
return wait_for_ready_status();
}
/* Write [count] bytes out of [buffer] into the given SPI [address] */
static long write_flash(unsigned long address, long count, uchar *buffer)
{
long i, write_buffer_size;
if (enable_writing())
return -1;
/* Send write command followed by the 24 bit address */
SPI_ON();
spi_write_read_byte(flash.ops->write);
transmit_address(address);
/* Shoot out a single write buffer */
write_buffer_size = min(count, flash.write_length);
for (i = 0; i < write_buffer_size; ++i)
spi_write_read_byte(buffer[i]);
SPI_OFF();
/* Wait for the flash to do its thing */
if (wait_for_ready_status()) {
puts("SPI Program Time out! ");
return -1;
}
return i;
}
/* Write [count] bytes out of [buffer] into the given SPI [address] */
static int write_sector(unsigned long address, long count, uchar *buffer)
{
long write_cnt;
while (count != 0) {
write_cnt = write_flash(address, count, buffer);
if (write_cnt == -1)
return -1;
/* Now that we've sent some bytes out to the flash, update
* our counters a bit
*/
count -= write_cnt;
address += write_cnt;
buffer += write_cnt;
}
/* return the appropriate error code */
return 0;
}
/*
* Function: spi_write
*/
ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
{
unsigned long offset;
int start_sector, end_sector;
int start_byte, end_byte;
uchar *temp = NULL;
int num, ret = 0;
SPI_INIT();
if (spi_detect_part())
goto out;
offset = addr[0] << 16 | addr[1] << 8 | addr[2];
/* Get the start block number */
start_sector = address_to_sector(offset);
if (start_sector == -1) {
puts("Invalid sector! ");
goto out;
}
end_sector = address_to_sector(offset + len - 1);
if (end_sector == -1) {
puts("Invalid sector! ");
goto out;
}
/* Since flashes operate in sector units but the eeprom command
* operates as a continuous stream of bytes, we need to emulate
* the eeprom behavior. So here we read in the sector, overlay
* any bytes we're actually modifying, erase the sector, and
* then write back out the new sector.
*/
temp = malloc(flash.sector_size);
if (!temp) {
puts("Malloc for sector failed! ");
goto out;
}
for (num = start_sector; num <= end_sector; num++) {
unsigned long address = num * flash.sector_size;
/* XXX: should add an optimization when spanning sectors:
* No point in reading in a sector if we're going to be
* clobbering the whole thing. Need to also add a test
* case to make sure the optimization is correct.
*/
if (read_flash(address, flash.sector_size, temp)) {
puts("Read sector failed! ");
len = 0;
break;
}
start_byte = max(address, offset);
end_byte = address + flash.sector_size - 1;
if (end_byte > (offset + len))
end_byte = (offset + len - 1);
memcpy(temp + start_byte - address,
buffer + start_byte - offset,
end_byte - start_byte + 1);
if (erase_sector(address)) {
puts("Erase sector failed! ");
goto out;
}
if (write_sector(address, flash.sector_size, temp)) {
puts("Write sector failed! ");
goto out;
}
puts(".");
}
ret = len;
out:
free(temp);
SPI_DEINIT();
return ret;
}
/*
* Function: spi_read
*/
ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
{
unsigned long offset;
SPI_INIT();
if (spi_detect_part())
len = 0;
else {
offset = addr[0] << 16 | addr[1] << 8 | addr[2];
read_flash(offset, len, buffer);
}
SPI_DEINIT();
return len;
}
/*
* Spit out some useful information about the SPI eeprom
*/
int eeprom_info(void)
{
int ret = 0;
SPI_INIT();
if (spi_detect_part())
ret = 1;
else
printf("SPI Device: %s 0x%02X (%s) 0x%02X 0x%02X\n"
"Parameters: num sectors = %i, sector size = %i, write size = %i\n"
"Flash Size: %i mbit (%i mbyte)\n"
"Status: 0x%02X\n",
flash.flash->name, flash.manufacturer_id, flash.manufacturer->name,
flash.device_id1, flash.device_id2, flash.num_sectors,
flash.sector_size, flash.write_length,
(flash.num_sectors * flash.sector_size) >> 17,
(flash.num_sectors * flash.sector_size) >> 20,
read_status_register());
SPI_DEINIT();
return ret;
}
#endif

View File

@@ -1,516 +0,0 @@
/****************************************************************************
* SPI flash driver for M25P64
****************************************************************************/
#include <common.h>
#include <linux/ctype.h>
#include <asm/io.h>
#include <asm/mach-common/bits/spi.h>
#if defined(CONFIG_SPI)
/* Application definitions */
#define NUM_SECTORS 128 /* number of sectors */
#define SECTOR_SIZE 0x10000
#define NOP_NUM 1000
#define COMMON_SPI_SETTINGS (SPE|MSTR|CPHA|CPOL) /* Settings to the SPI_CTL */
#define TIMOD01 (0x01) /* stes the SPI to work with core instructions */
/* Flash commands */
#define SPI_WREN (0x06) /*Set Write Enable Latch */
#define SPI_WRDI (0x04) /*Reset Write Enable Latch */
#define SPI_RDSR (0x05) /*Read Status Register */
#define SPI_WRSR (0x01) /*Write Status Register */
#define SPI_READ (0x03) /*Read data from memory */
#define SPI_FAST_READ (0x0B) /*Read data from memory */
#define SPI_PP (0x02) /*Program Data into memory */
#define SPI_SE (0xD8) /*Erase one sector in memory */
#define SPI_BE (0xC7) /*Erase all memory */
#define WIP (0x1) /*Check the write in progress bit of the SPI status register */
#define WEL (0x2) /*Check the write enable bit of the SPI status register */
#define TIMEOUT 350000000
typedef enum {
NO_ERR,
POLL_TIMEOUT,
INVALID_SECTOR,
INVALID_BLOCK,
} ERROR_CODE;
void spi_init_f(void);
void spi_init_r(void);
ssize_t spi_read(uchar *, int, uchar *, int);
ssize_t spi_write(uchar *, int, uchar *, int);
char ReadStatusRegister(void);
void Wait_For_SPIF(void);
void SetupSPI(const int spi_setting);
void SPI_OFF(void);
void SendSingleCommand(const int iCommand);
ERROR_CODE GetSectorNumber(unsigned long ulOffset, int *pnSector);
ERROR_CODE EraseBlock(int nBlock);
ERROR_CODE ReadData(unsigned long ulStart, long lCount, int *pnData);
ERROR_CODE WriteData(unsigned long ulStart, long lCount, int *pnData);
ERROR_CODE Wait_For_Status(char Statusbit);
ERROR_CODE Wait_For_WEL(void);
/*
* Function: spi_init_f
* Description: Init SPI-Controller (ROM part)
* return: ---
*/
void spi_init_f(void)
{
}
/*
* Function: spi_init_r
* Description: Init SPI-Controller (RAM part) -
* The malloc engine is ready and we can move our buffers to
* normal RAM
* return: ---
*/
void spi_init_r(void)
{
return;
}
/*
* Function: spi_write
*/
ssize_t spi_write(uchar * addr, int alen, uchar * buffer, int len)
{
unsigned long offset;
int start_block, end_block;
int start_byte, end_byte;
ERROR_CODE result = NO_ERR;
uchar temp[SECTOR_SIZE];
int i, num;
offset = addr[0] << 16 | addr[1] << 8 | addr[2];
/* Get the start block number */
result = GetSectorNumber(offset, &start_block);
if (result == INVALID_SECTOR) {
printf("Invalid sector! ");
return 0;
}
/* Get the end block number */
result = GetSectorNumber(offset + len - 1, &end_block);
if (result == INVALID_SECTOR) {
printf("Invalid sector! ");
return 0;
}
for (num = start_block; num <= end_block; num++) {
ReadData(num * SECTOR_SIZE, SECTOR_SIZE, (int *)temp);
start_byte = num * SECTOR_SIZE;
end_byte = (num + 1) * SECTOR_SIZE - 1;
if (start_byte < offset)
start_byte = offset;
if (end_byte > (offset + len))
end_byte = (offset + len - 1);
for (i = start_byte; i <= end_byte; i++)
temp[i - num * SECTOR_SIZE] = buffer[i - offset];
EraseBlock(num);
result = WriteData(num * SECTOR_SIZE, SECTOR_SIZE, (int *)temp);
if (result != NO_ERR)
return 0;
printf(".");
}
return len;
}
/*
* Function: spi_read
*/
ssize_t spi_read(uchar * addr, int alen, uchar * buffer, int len)
{
unsigned long offset;
offset = addr[0] << 16 | addr[1] << 8 | addr[2];
ReadData(offset, len, (int *)buffer);
return len;
}
void SendSingleCommand(const int iCommand)
{
unsigned short dummy;
/* turns on the SPI in single write mode */
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01));
/* sends the actual command to the SPI TX register */
*pSPI_TDBR = iCommand;
SSYNC();
/* The SPI status register will be polled to check the SPIF bit */
Wait_For_SPIF();
dummy = *pSPI_RDBR;
/* The SPI will be turned off */
SPI_OFF();
}
void SetupSPI(const int spi_setting)
{
if (icache_status() || dcache_status())
udelay(CONFIG_CCLK_HZ / 50000000);
/*sets up the PF10 to be the slave select of the SPI */
*pPORTF_FER |= (PF10 | PF11 | PF12 | PF13);
*pSPI_FLG = 0xFF02;
*pSPI_BAUD = CONFIG_SPI_BAUD;
*pSPI_CTL = spi_setting;
SSYNC();
*pSPI_FLG = 0xFD02;
SSYNC();
}
void SPI_OFF(void)
{
*pSPI_CTL = 0x0400; /* disable SPI */
*pSPI_FLG = 0;
*pSPI_BAUD = 0;
SSYNC();
udelay(CONFIG_CCLK_HZ / 50000000);
}
void Wait_For_SPIF(void)
{
unsigned short dummyread;
while ((*pSPI_STAT & TXS)) ;
while (!(*pSPI_STAT & SPIF)) ;
while (!(*pSPI_STAT & RXS)) ;
/* Read dummy to empty the receive register */
dummyread = *pSPI_RDBR;
}
ERROR_CODE Wait_For_WEL(void)
{
int i;
char status_register = 0;
ERROR_CODE ErrorCode = NO_ERR;
for (i = 0; i < TIMEOUT; i++) {
status_register = ReadStatusRegister();
if ((status_register & WEL)) {
ErrorCode = NO_ERR;
break;
}
ErrorCode = POLL_TIMEOUT; /* Time out error */
};
return ErrorCode;
}
ERROR_CODE Wait_For_Status(char Statusbit)
{
int i;
char status_register = 0xFF;
ERROR_CODE ErrorCode = NO_ERR;
for (i = 0; i < TIMEOUT; i++) {
status_register = ReadStatusRegister();
if (!(status_register & Statusbit)) {
ErrorCode = NO_ERR;
break;
}
ErrorCode = POLL_TIMEOUT; /* Time out error */
};
return ErrorCode;
}
char ReadStatusRegister(void)
{
char status_register = 0;
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01)); /* Turn on the SPI */
*pSPI_TDBR = SPI_RDSR; /* send instruction to read status register */
SSYNC();
Wait_For_SPIF(); /*wait until the instruction has been sent */
*pSPI_TDBR = 0; /*send dummy to receive the status register */
SSYNC();
Wait_For_SPIF(); /*wait until the data has been sent */
status_register = *pSPI_RDBR; /*read the status register */
SPI_OFF(); /* Turn off the SPI */
return status_register;
}
ERROR_CODE GetSectorNumber(unsigned long ulOffset, int *pnSector)
{
int nSector = 0;
ERROR_CODE ErrorCode = NO_ERR;
if (ulOffset > (NUM_SECTORS * 0x10000 - 1)) {
ErrorCode = INVALID_SECTOR;
return ErrorCode;
}
nSector = (int)ulOffset / 0x10000;
*pnSector = nSector;
return ErrorCode;
}
ERROR_CODE EraseBlock(int nBlock)
{
unsigned long ulSectorOff = 0x0, ShiftValue;
ERROR_CODE ErrorCode = NO_ERR;
/* if the block is invalid just return */
if ((nBlock < 0) || (nBlock > NUM_SECTORS)) {
ErrorCode = INVALID_BLOCK;
return ErrorCode;
}
/* figure out the offset of the block in flash */
if ((nBlock >= 0) && (nBlock < NUM_SECTORS)) {
ulSectorOff = (nBlock * SECTOR_SIZE);
} else {
ErrorCode = INVALID_BLOCK;
return ErrorCode;
}
/* A write enable instruction must previously have been executed */
SendSingleCommand(SPI_WREN);
/* The status register will be polled to check the write enable latch "WREN" */
ErrorCode = Wait_For_WEL();
if (POLL_TIMEOUT == ErrorCode) {
printf("SPI Erase block error\n");
return ErrorCode;
} else
/* Turn on the SPI to send single commands */
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01));
/*
* Send the erase block command to the flash followed by the 24 address
* to point to the start of a sector
*/
*pSPI_TDBR = SPI_SE;
SSYNC();
Wait_For_SPIF();
/* Send the highest byte of the 24 bit address at first */
ShiftValue = (ulSectorOff >> 16);
*pSPI_TDBR = ShiftValue;
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
/* Send the middle byte of the 24 bit address at second */
ShiftValue = (ulSectorOff >> 8);
*pSPI_TDBR = ShiftValue;
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
/* Send the lowest byte of the 24 bit address finally */
*pSPI_TDBR = ulSectorOff;
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
/* Turns off the SPI */
SPI_OFF();
/* Poll the status register to check the Write in Progress bit */
/* Sector erase takes time */
ErrorCode = Wait_For_Status(WIP);
/* block erase should be complete */
return ErrorCode;
}
/*
* ERROR_CODE ReadData()
* Read a value from flash for verify purpose
* Inputs: unsigned long ulStart - holds the SPI start address
* int pnData - pointer to store value read from flash
* long lCount - number of elements to read
*/
ERROR_CODE ReadData(unsigned long ulStart, long lCount, int *pnData)
{
unsigned long ShiftValue;
char *cnData;
int i;
/* Pointer cast to be able to increment byte wise */
cnData = (char *)pnData;
/* Start SPI interface */
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01));
#ifdef CONFIG_SPI_FLASH_FAST_READ
/* Send the read command to SPI device */
*pSPI_TDBR = SPI_FAST_READ;
#else
/* Send the read command to SPI device */
*pSPI_TDBR = SPI_READ;
#endif
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
/* Send the highest byte of the 24 bit address at first */
ShiftValue = (ulStart >> 16);
/* Send the byte to the SPI device */
*pSPI_TDBR = ShiftValue;
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
/* Send the middle byte of the 24 bit address at second */
ShiftValue = (ulStart >> 8);
/* Send the byte to the SPI device */
*pSPI_TDBR = ShiftValue;
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
/* Send the lowest byte of the 24 bit address finally */
*pSPI_TDBR = ulStart;
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
#ifdef CONFIG_SPI_FLASH_FAST_READ
/* Send dummy for FAST_READ */
*pSPI_TDBR = 0;
SSYNC();
/* Wait until the instruction has been sent */
Wait_For_SPIF();
#endif
/* After the SPI device address has been placed on the MOSI pin the data can be */
/* received on the MISO pin. */
for (i = 0; i < lCount; i++) {
*pSPI_TDBR = 0;
SSYNC();
while (!(*pSPI_STAT & RXS)) ;
*cnData++ = *pSPI_RDBR;
if ((i >= SECTOR_SIZE) && (i % SECTOR_SIZE == 0))
printf(".");
}
/* Turn off the SPI */
SPI_OFF();
return NO_ERR;
}
ERROR_CODE WriteFlash(unsigned long ulStartAddr, long lTransferCount,
int *iDataSource, long *lWriteCount)
{
unsigned long ulWAddr;
long lWTransferCount = 0;
int i;
char iData;
char *temp = (char *)iDataSource;
ERROR_CODE ErrorCode = NO_ERR;
/* First, a Write Enable Command must be sent to the SPI. */
SendSingleCommand(SPI_WREN);
/*
* Second, the SPI Status Register will be tested whether the
* Write Enable Bit has been set
*/
ErrorCode = Wait_For_WEL();
if (POLL_TIMEOUT == ErrorCode) {
printf("SPI Write Time Out\n");
return ErrorCode;
} else
/* Third, the 24 bit address will be shifted out
* the SPI MOSI bytewise.
* Turns the SPI on
*/
SetupSPI((COMMON_SPI_SETTINGS | TIMOD01));
*pSPI_TDBR = SPI_PP;
SSYNC();
/*wait until the instruction has been sent */
Wait_For_SPIF();
ulWAddr = (ulStartAddr >> 16);
*pSPI_TDBR = ulWAddr;
SSYNC();
/*wait until the instruction has been sent */
Wait_For_SPIF();
ulWAddr = (ulStartAddr >> 8);
*pSPI_TDBR = ulWAddr;
SSYNC();
/*wait until the instruction has been sent */
Wait_For_SPIF();
ulWAddr = ulStartAddr;
*pSPI_TDBR = ulWAddr;
SSYNC();
/*wait until the instruction has been sent */
Wait_For_SPIF();
/*
* Fourth, maximum number of 256 bytes will be taken from the Buffer
* and sent to the SPI device.
*/
for (i = 0; (i < lTransferCount) && (i < 256); i++, lWTransferCount++) {
iData = *temp;
*pSPI_TDBR = iData;
SSYNC();
/*wait until the instruction has been sent */
Wait_For_SPIF();
temp++;
}
/* Turns the SPI off */
SPI_OFF();
/*
* Sixth, the SPI Write in Progress Bit must be toggled to ensure the
* programming is done before start of next transfer
*/
ErrorCode = Wait_For_Status(WIP);
if (POLL_TIMEOUT == ErrorCode) {
printf("SPI Program Time out!\n");
return ErrorCode;
} else
*lWriteCount = lWTransferCount;
return ErrorCode;
}
ERROR_CODE WriteData(unsigned long ulStart, long lCount, int *pnData)
{
unsigned long ulWStart = ulStart;
long lWCount = lCount, lWriteCount;
long *pnWriteCount = &lWriteCount;
ERROR_CODE ErrorCode = NO_ERR;
while (lWCount != 0) {
ErrorCode = WriteFlash(ulWStart, lWCount, pnData, pnWriteCount);
/*
* After each function call of WriteFlash the counter
* must be adjusted
*/
lWCount -= *pnWriteCount;
/* Also, both address pointers must be recalculated. */
ulWStart += *pnWriteCount;
pnData += *pnWriteCount / 4;
}
/* return the appropriate error code */
return ErrorCode;
}
#endif /* CONFIG_SPI */

View File

@@ -1,7 +1,7 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2007 Analog Device Inc.
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -26,165 +26,111 @@
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CFG_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
MEMORY
{
ram : ORIGIN = (CFG_MONITOR_BASE), LENGTH = (256 * 1024)
l1_code : ORIGIN = 0xFFA00000, LENGTH = 0xC000
l1_data : ORIGIN = 0xFF900000, LENGTH = 0x4000
ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS; /*0x1000;*/
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
. = CFG_MONITOR_BASE;
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector before the environment sector. If it throws */
/* an error during compilation remove an object here to get */
/* it linked after the configuration sector. */
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/bf537/start.o (.text)
cpu/bf537/start1.o (.text)
cpu/bf537/traps.o (.text)
cpu/bf537/interrupt.o (.text)
cpu/bf537/serial.o (.text)
cpu/blackfin/start.o (.text)
cpu/blackfin/traps.o (.text)
cpu/blackfin/interrupt.o (.text)
cpu/blackfin/serial.o (.text)
common/dlmalloc.o (.text)
/* lib_blackfin/bf533_string.o (.text) */
/* lib_generic/vsprintf.o (.text) */
lib_generic/crc32.o (.text)
/* lib_generic/zlib.o (.text) */
/* board/bf537-stamp/bf537-stamp.o (.text) */
. = DEFINED(env_offset) ? env_offset : .;
common/environment.o (.text)
#endif
*(EXCLUDE_FILE (board/bf537-stamp/post-memory.o) .text)
*(.fixup)
*(.got1)
*(.text .text.*)
} >ram
_etext = .;
PROVIDE (etext = .);
.text_l1 :
{
. = ALIGN(4) ;
_text_l1 = .;
PROVIDE (text_l1 = .);
board/bf537-stamp/post-memory.o (.text)
. = ALIGN(4) ;
_etext_l1 = .;
PROVIDE (etext_l1 = .);
} > l1_code AT > ram
.rodata :
{
. = ALIGN(4);
*(EXCLUDE_FILE (board/bf537-stamp/post-memory.o) .rodata)
*(EXCLUDE_FILE (board/bf537-stamp/post-memory.o) .rodata1)
*(EXCLUDE_FILE (board/bf537-stamp/post-memory.o) .rodata.str1.4)
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
. = ALIGN(4);
_erodata = .;
PROVIDE (erodata = .);
.rodata_l1 :
{
. = ALIGN(4) ;
_rodata_l1 = .;
PROVIDE (rodata_l1 = .);
board/bf537-stamp/post-memory.o (.rodata)
board/bf537-stamp/post-memory.o (.rodata1)
board/bf537-stamp/post-memory.o (.rodata.str1.4)
. = ALIGN(4) ;
_erodata_l1 = .;
PROVIDE(erodata_l1 = .);
} > l1_data AT > ram
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
_edata = .;
PROVIDE (edata = .);
.u_boot_cmd :
{
___u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) } > ram
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
_end = . ;
PROVIDE (end = .);
}

View File

@@ -39,7 +39,7 @@ $(LIB): $(obj).depend $(OBJS) $(SOBJS) u-boot.lds
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -P -Ubfin $^ > $@.tmp
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P -Ubfin $^ > $@.tmp
mv -f $@.tmp $@
clean:

View File

@@ -20,6 +20,6 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# TEXT_BASE should be defined as the MAX_SDRAM Address - 256k bytes
# 256k is defined as CFG_MONITOR_LEN in ./include/configs/<board>.h
TEXT_BASE = 0x03FC0000
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me

View File

@@ -1,7 +1,7 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2007 Analog Device Inc.
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -26,128 +26,113 @@
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CFG_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
OUTPUT_ARCH(bfin)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
MEMORY
{
ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
. = CFG_MONITOR_BASE;
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector before the environment sector. If it throws */
/* an error during compilation remove an object here to get */
/* it linked after the configuration sector. */
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/bf561/start.o (.text)
cpu/bf561/start1.o (.text)
cpu/bf561/traps.o (.text)
cpu/bf561/interrupt.o (.text)
cpu/bf561/serial.o (.text)
cpu/blackfin/start.o (.text)
cpu/blackfin/traps.o (.text)
cpu/blackfin/interrupt.o (.text)
cpu/blackfin/serial.o (.text)
common/dlmalloc.o (.text)
/* lib_blackfin/bf533_string.o (.text) */
/* lib_generic/vsprintf.o (.text) */
lib_generic/crc32.o (.text)
lib_generic/zlib.o (.text)
board/bf561-ezkit/bf561-ezkit.o (.text)
. = DEFINED(env_offset) ? env_offset : .;
common/environment.o (.text)
#endif
*(.text .text.*)
} >ram
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
*(.data)
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(.bss .bss.*)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
__bss_end = .;
} >ram
}

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